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From: OpenOCD-Gerrit <ope...@us...> - 2022-05-07 11:03:10
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via b4f8d99c8d9e453b2beb3f6c9db7ff01c8d00756 (commit)
from 66335683fec62ac89da48d64932fd9d082314225 (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit b4f8d99c8d9e453b2beb3f6c9db7ff01c8d00756
Author: Antonio Borneo <bor...@gm...>
Date: Mon Feb 28 11:46:46 2022 +0100
smp: deprecate legacy SMP core switching support
The deprecation was already in the documentation since v0.11.0
through commit 85ba2dc4c6ab ("rtos/hwthread: add hardware-thread
pseudo rtos") but OpenOCD was not informing the user printing a
runtime message.
Remove the deprecated method from the documentation and print a
deprecated message at runtime.
There is no reliable way to print the same message in GDB console,
so we have to rely on user noticing it in the OpenOCD log.
Target is to remove the functionality after v0.12.0.
Change-Id: Idd2d9e3b6eccc92dcf0432c3c7de2f8a0fcabe9f
Signed-off-by: Antonio Borneo <bor...@gm...>
Reviewed-on: https://review.openocd.org/c/openocd/+/6862
Tested-by: jenkins
diff --git a/doc/openocd.texi b/doc/openocd.texi
index d55002733..07d4ad70a 100644
--- a/doc/openocd.texi
+++ b/doc/openocd.texi
@@ -11568,57 +11568,6 @@ The @command{step} and @command{stepi} commands can be used to step a specific c
while other cores are free-running or remain halted, depending on the
scheduler-locking mode configured in GDB.
-@section Legacy SMP core switching support
-@quotation Note
-This method is deprecated in favor of the @emph{hwthread} pseudo RTOS.
-@end quotation
-
-For SMP support following GDB serial protocol packet have been defined :
-@itemize @bullet
-@item j - smp status request
-@item J - smp set request
-@end itemize
-
-OpenOCD implements :
-@itemize @bullet
-@item @option{jc} packet for reading core id displayed by
-GDB connection. Reply is @option{XXXXXXXX} (8 hex digits giving core id) or
- @option{E01} for target not smp.
-@item @option{JcXXXXXXXX} (8 hex digits) packet for setting core id displayed at next GDB continue
-(core id -1 is reserved for returning to normal resume mode). Reply @option{E01}
-for target not smp or @option{OK} on success.
-@end itemize
-
-Handling of this packet within GDB can be done :
-@itemize @bullet
-@item by the creation of an internal variable (i.e @option{_core}) by mean
-of function allocate_computed_value allowing following GDB command.
-@example
-set $_core 1
-#Jc01 packet is sent
-print $_core
-#jc packet is sent and result is affected in $
-@end example
-
-@item by the usage of GDB maintenance command as described in following example (2 cpus in SMP with
-core id 0 and 1 @pxref{definecputargetsworkinginsmp,,Define CPU targets working in SMP}).
-
-@example
-# toggle0 : force display of coreid 0
-define toggle0
-maint packet Jc0
-continue
-main packet Jc-1
-end
-# toggle1 : force display of coreid 1
-define toggle1
-maint packet Jc1
-continue
-main packet Jc-1
-end
-@end example
-@end itemize
-
@node Tcl Scripting API
@chapter Tcl Scripting API
@cindex Tcl Scripting API
diff --git a/src/server/gdb_server.c b/src/server/gdb_server.c
index fcc87fba1..728cb53bb 100644
--- a/src/server/gdb_server.c
+++ b/src/server/gdb_server.c
@@ -3657,12 +3657,14 @@ static int gdb_input_inner(struct connection *connection)
break;
case 'j':
+ /* DEPRECATED */
/* packet supported only by smp target i.e cortex_a.c*/
/* handle smp packet replying coreid played to gbd */
gdb_read_smp_packet(connection, packet, packet_size);
break;
case 'J':
+ /* DEPRECATED */
/* packet supported only by smp target i.e cortex_a.c */
/* handle smp packet setting coreid to be played at next
* resume to gdb */
diff --git a/src/target/smp.c b/src/target/smp.c
index 3e1ded8bc..569abd786 100644
--- a/src/target/smp.c
+++ b/src/target/smp.c
@@ -28,6 +28,7 @@
#include "smp.h"
#include "helper/binarybuffer.h"
+/* DEPRECATED: gdb_read_smp_packet/gdb_write_smp_packet to be removed */
/* implementation of new packet in gdb interface for smp feature */
/* */
/* j : smp status request */
@@ -53,11 +54,15 @@
/* maint packet jc */
/* packet j :smp status request */
+#define DEPRECATED_MSG "DEPRECATED: This method is deprecated in favor of the hwthread pseudo RTOS"
int gdb_read_smp_packet(struct connection *connection,
char const *packet, int packet_size)
{
struct target *target = get_target_from_connection(connection);
int retval = ERROR_OK;
+
+ LOG_WARNING(DEPRECATED_MSG);
+
if (target->smp) {
if (strncmp(packet, "jc", 2) == 0) {
const uint32_t len = sizeof(target->gdb_service->core[0]);
@@ -83,6 +88,8 @@ int gdb_write_smp_packet(struct connection *connection,
int coreid = 0;
int retval = ERROR_OK;
+ LOG_WARNING(DEPRECATED_MSG);
+
/* skip command character */
if (target->smp) {
if (strncmp(packet, "Jc", 2) == 0) {
diff --git a/src/target/smp.h b/src/target/smp.h
index 490a49310..d373c90bc 100644
--- a/src/target/smp.h
+++ b/src/target/smp.h
@@ -30,8 +30,10 @@
extern const struct command_registration smp_command_handlers[];
+/* DEPRECATED */
int gdb_read_smp_packet(struct connection *connection,
char const *packet, int packet_size);
+/* DEPRECATED */
int gdb_write_smp_packet(struct connection *connection,
char const *packet, int packet_size);
-----------------------------------------------------------------------
Summary of changes:
doc/openocd.texi | 51 -------------------------------------------------
src/server/gdb_server.c | 2 ++
src/target/smp.c | 7 +++++++
src/target/smp.h | 2 ++
4 files changed, 11 insertions(+), 51 deletions(-)
hooks/post-receive
--
Main OpenOCD repository
|
|
From: OpenOCD-Gerrit <ope...@us...> - 2022-05-01 04:49:21
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 66335683fec62ac89da48d64932fd9d082314225 (commit)
from 12d1ad0c75298d56827debcacc83c679bfbe9ac2 (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit 66335683fec62ac89da48d64932fd9d082314225
Author: jihongbin <lo...@or...>
Date: Fri Apr 29 17:03:15 2022 +0800
drivers/cmsis-dap: Correct the DAP protocol parameter parsing error
Fixes: 01030fb89354 (drivers/cmsis-dap: tidy up buffer access)
Change-Id: Id192d3930a89980d641058b6444d12caec19ce6f
Signed-off-by: Hongbin Ji <lo...@or...>
Reviewed-on: https://review.openocd.org/c/openocd/+/6954
Tested-by: jenkins
Reviewed-by: Tomas Vanek <va...@fb...>
Reviewed-by: Antonio Borneo <bor...@gm...>
Reviewed-by: jihongbin <jh...@16...>
diff --git a/src/jtag/drivers/cmsis_dap.c b/src/jtag/drivers/cmsis_dap.c
index 63407be42..eaa65abc6 100644
--- a/src/jtag/drivers/cmsis_dap.c
+++ b/src/jtag/drivers/cmsis_dap.c
@@ -1405,18 +1405,18 @@ static void debug_parse_cmsis_buf(const uint8_t *cmd, int cmdlen)
for (int i = 0; i < cmdlen; ++i)
printf(" %02x", cmd[i]);
printf("\n");
- switch (cmd[1]) {
+ switch (cmd[0]) {
case CMD_DAP_JTAG_SEQ: {
- printf("cmsis-dap jtag sequence command %02x (n=%d)\n", cmd[1], cmd[2]);
+ printf("cmsis-dap jtag sequence command %02x (n=%d)\n", cmd[0], cmd[1]);
/*
- * #2 = number of sequences
- * #3 = sequence info 1
- * #4...4+n_bytes-1 = sequence 1
+ * #1 = number of sequences
+ * #2 = sequence info 1
+ * #3...4+n_bytes-1 = sequence 1
* #4+n_bytes = sequence info 2
* #5+n_bytes = sequence 2 (single bit)
*/
- int pos = 3;
- for (int seq = 0; seq < cmd[2]; ++seq) {
+ int pos = 2;
+ for (int seq = 0; seq < cmd[1]; ++seq) {
uint8_t info = cmd[pos++];
int len = info & DAP_JTAG_SEQ_TCK;
if (len == 0)
-----------------------------------------------------------------------
Summary of changes:
src/jtag/drivers/cmsis_dap.c | 14 +++++++-------
1 file changed, 7 insertions(+), 7 deletions(-)
hooks/post-receive
--
Main OpenOCD repository
|
|
From: OpenOCD-Gerrit <ope...@us...> - 2022-04-30 17:53:57
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 12d1ad0c75298d56827debcacc83c679bfbe9ac2 (commit)
from 8789513fa94ff54f08eaffedce0cc6c38f44311d (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit 12d1ad0c75298d56827debcacc83c679bfbe9ac2
Author: fatalc <cn...@gm...>
Date: Mon Apr 25 12:06:10 2022 +0800
target/disassembler: update capstone include path to <capstone.h>
on macos (homebrew base) `pkg-config --cflags capstone` output with
`-I/opt/homebrew/Cellar/capstone/4.0.2/include/capstone`
gcc not find headers on parent "include" path,
causes build error `fatal error: 'capstone/capstone.h' file not found`
it's ok to change to <capstone.h> for all platforms.
Signed-off-by: fatalc <cn...@gm...>
Change-Id: Ia2e2058024d4fc1a57a8b4ea847c664d74f67efb
Reviewed-on: https://review.openocd.org/c/openocd/+/6946
Tested-by: jenkins
Reviewed-by: Antonio Borneo <bor...@gm...>
diff --git a/src/target/a64_disassembler.c b/src/target/a64_disassembler.c
index bd78129dd..58ddf603e 100644
--- a/src/target/a64_disassembler.c
+++ b/src/target/a64_disassembler.c
@@ -26,7 +26,7 @@
#if HAVE_CAPSTONE
-#include <capstone/capstone.h>
+#include <capstone.h>
static void print_opcode(struct command_invocation *cmd, const cs_insn *insn)
{
diff --git a/src/target/arm_disassembler.c b/src/target/arm_disassembler.c
index 661859379..d3d27a93c 100644
--- a/src/target/arm_disassembler.c
+++ b/src/target/arm_disassembler.c
@@ -27,7 +27,7 @@
#include <helper/log.h>
#if HAVE_CAPSTONE
-#include <capstone/capstone.h>
+#include <capstone.h>
#endif
/*
-----------------------------------------------------------------------
Summary of changes:
src/target/a64_disassembler.c | 2 +-
src/target/arm_disassembler.c | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
hooks/post-receive
--
Main OpenOCD repository
|
|
From: OpenOCD-Gerrit <ope...@us...> - 2022-04-30 17:53:01
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 8789513fa94ff54f08eaffedce0cc6c38f44311d (commit)
via 9eddc21a585a813d7675d9d4ad07c5d8c97dee9b (commit)
via 20adf85f3484ee7137f2c11a491a6929b342d1f5 (commit)
from 9de084e0067a86b8040f8ea2c3f46dff0b9e6a70 (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit 8789513fa94ff54f08eaffedce0cc6c38f44311d
Author: Marc Schink <de...@za...>
Date: Sat Apr 23 13:13:06 2022 +0200
target/arm_cti: Fix error handling in 'cti create'
Handle JIM_CONTINUE return value of adiv5_jim_mem_ap_spot_configure(),
otherwise OpenOCD silently quits when an unknown option is provided.
Change-Id: I9b1351c0911e74999d8dd1260ede9760088510d7
Signed-off-by: Marc Schink <de...@za...>
Reviewed-on: https://review.openocd.org/c/openocd/+/6944
Tested-by: jenkins
Reviewed-by: Antonio Borneo <bor...@gm...>
diff --git a/src/target/arm_cti.c b/src/target/arm_cti.c
index c776e9c2a..96927bf94 100644
--- a/src/target/arm_cti.c
+++ b/src/target/arm_cti.c
@@ -435,8 +435,13 @@ static int cti_configure(struct jim_getopt_info *goi, struct arm_cti *cti)
/* parse config or cget options ... */
while (goi->argc > 0) {
int e = adiv5_jim_mem_ap_spot_configure(&cti->spot, goi);
+
+ if (e == JIM_CONTINUE)
+ Jim_SetResultFormatted(goi->interp, "unknown option '%s'",
+ Jim_String(goi->argv[0]));
+
if (e != JIM_OK)
- return e;
+ return JIM_ERR;
}
if (!cti->spot.dap) {
commit 9eddc21a585a813d7675d9d4ad07c5d8c97dee9b
Author: Steve Marple <ste...@go...>
Date: Tue Apr 19 23:29:55 2022 +0100
bcm2835gpio: Make buffer an output before the GPIO connected to it
The correct ordering is required to prevent two outputs connected
together.
Change-Id: I634a9ca7e0ccf337d1723011b8aee1f2d81efbcf
Signed-off-by: Steve Marple <ste...@go...>
Reviewed-on: https://review.openocd.org/c/openocd/+/6937
Tested-by: jenkins
Reviewed-by: Antonio Borneo <bor...@gm...>
diff --git a/src/jtag/drivers/bcm2835gpio.c b/src/jtag/drivers/bcm2835gpio.c
index fd6c28b96..b7a4d998c 100644
--- a/src/jtag/drivers/bcm2835gpio.c
+++ b/src/jtag/drivers/bcm2835gpio.c
@@ -565,6 +565,13 @@ static int bcm2835gpio_init(void)
}
if (transport_is_swd()) {
+ /* Make buffer an output before the GPIO connected to it */
+ if (swdio_dir_gpio != -1) {
+ swdio_dir_gpio_mode = MODE_GPIO(swdio_dir_gpio);
+ GPIO_SET = 1 << swdio_dir_gpio;
+ OUT_GPIO(swdio_dir_gpio);
+ }
+
swclk_gpio_mode = MODE_GPIO(swclk_gpio);
swdio_gpio_mode = MODE_GPIO(swdio_gpio);
@@ -580,12 +587,6 @@ static int bcm2835gpio_init(void)
OUT_GPIO(srst_gpio);
}
- if (swdio_dir_gpio != -1) {
- swdio_dir_gpio_mode = MODE_GPIO(swdio_dir_gpio);
- GPIO_SET = 1 << swdio_dir_gpio;
- OUT_GPIO(swdio_dir_gpio);
- }
-
LOG_DEBUG("saved pinmux settings: tck %d tms %d tdi %d "
"tdo %d trst %d srst %d", tck_gpio_mode, tms_gpio_mode,
tdi_gpio_mode, tdo_gpio_mode, trst_gpio_mode, srst_gpio_mode);
commit 20adf85f3484ee7137f2c11a491a6929b342d1f5
Author: Steve Marple <ste...@go...>
Date: Tue Apr 12 18:25:40 2022 +0100
linuxgpiod: add SWDIO buffer
The SWDIO buffer requires a direction pin to select input or output
direction. Output is selected by a high logic level (matches
bcm2835gpio driver).
Change-Id: I240cb99a5dfea08121bb33d4b5e2108ce7597468
Signed-off-by: Steve Marple <ste...@go...>
Reviewed-on: https://review.openocd.org/c/openocd/+/6936
Tested-by: jenkins
Reviewed-by: Antonio Borneo <bor...@gm...>
diff --git a/src/jtag/drivers/linuxgpiod.c b/src/jtag/drivers/linuxgpiod.c
index 9f9f27a9f..288035f2e 100644
--- a/src/jtag/drivers/linuxgpiod.c
+++ b/src/jtag/drivers/linuxgpiod.c
@@ -27,6 +27,7 @@ static int trst_gpio = -1;
static int srst_gpio = -1;
static int swclk_gpio = -1;
static int swdio_gpio = -1;
+static int swdio_dir_gpio = -1;
static int led_gpio = -1;
static int gpiochip = -1;
static int tck_gpiochip = -1;
@@ -37,6 +38,7 @@ static int trst_gpiochip = -1;
static int srst_gpiochip = -1;
static int swclk_gpiochip = -1;
static int swdio_gpiochip = -1;
+static int swdio_dir_gpiochip = -1;
static int led_gpiochip = -1;
static struct gpiod_chip *gpiod_chip_tck;
@@ -47,6 +49,7 @@ static struct gpiod_chip *gpiod_chip_trst;
static struct gpiod_chip *gpiod_chip_srst;
static struct gpiod_chip *gpiod_chip_swclk;
static struct gpiod_chip *gpiod_chip_swdio;
+static struct gpiod_chip *gpiod_chip_swdio_dir;
static struct gpiod_chip *gpiod_chip_led;
static struct gpiod_line *gpiod_tck;
@@ -56,6 +59,7 @@ static struct gpiod_line *gpiod_tdo;
static struct gpiod_line *gpiod_trst;
static struct gpiod_line *gpiod_swclk;
static struct gpiod_line *gpiod_swdio;
+static struct gpiod_line *gpiod_swdio_dir;
static struct gpiod_line *gpiod_srst;
static struct gpiod_line *gpiod_led;
@@ -63,6 +67,7 @@ static int last_swclk;
static int last_swdio;
static bool last_stored;
static bool swdio_input;
+static bool swdio_dir_is_active_high = true;
/* Bitbang interface read of TDO */
static bb_value_t linuxgpiod_read(void)
@@ -152,6 +157,11 @@ static void linuxgpiod_swdio_drive(bool is_output)
gpiod_line_release(gpiod_swdio);
if (is_output) {
+ if (gpiod_swdio_dir) {
+ retval = gpiod_line_set_value(gpiod_swdio_dir, swdio_dir_is_active_high ? 1 : 0);
+ if (retval < 0)
+ LOG_WARNING("Fail set swdio_dir");
+ }
retval = gpiod_line_request_output(gpiod_swdio, "OpenOCD", 1);
if (retval < 0)
LOG_WARNING("Fail request_output line swdio");
@@ -159,6 +169,11 @@ static void linuxgpiod_swdio_drive(bool is_output)
retval = gpiod_line_request_input(gpiod_swdio, "OpenOCD");
if (retval < 0)
LOG_WARNING("Fail request_input line swdio");
+ if (gpiod_swdio_dir) {
+ retval = gpiod_line_set_value(gpiod_swdio_dir, swdio_dir_is_active_high ? 0 : 1);
+ if (retval < 0)
+ LOG_WARNING("Fail set swdio_dir");
+ }
}
last_stored = false;
@@ -297,6 +312,8 @@ static int linuxgpiod_quit(void)
gpiod_chip_close(gpiod_chip_srst);
if (gpiod_chip_swdio != NULL)
gpiod_chip_close(gpiod_chip_swdio);
+ if (gpiod_chip_swdio_dir != NULL)
+ gpiod_chip_close(gpiod_chip_swdio_dir);
if (gpiod_chip_swclk != NULL)
gpiod_chip_close(gpiod_chip_swclk);
if (gpiod_chip_trst != NULL)
@@ -451,10 +468,26 @@ static int linuxgpiod_init(void)
goto out_error;
}
+ if (is_gpio_valid(swdio_dir_gpio)) {
+ gpiod_chip_swdio_dir = gpiod_chip_open_by_number(swdio_dir_gpiochip);
+ if (!gpiod_chip_swdio_dir) {
+ LOG_ERROR("Cannot open LinuxGPIOD swdio_dir_gpiochip %d", swdio_dir_gpiochip);
+ goto out_error;
+ }
+ }
+
gpiod_swclk = helper_get_output_line("swclk", gpiod_chip_swclk, swclk_gpio, 1);
if (!gpiod_swclk)
goto out_error;
+ /* Set buffer direction before making SWDIO an output */
+ if (is_gpio_valid(swdio_dir_gpio)) {
+ gpiod_swdio_dir = helper_get_output_line("swdio_dir", gpiod_chip_swdio_dir, swdio_dir_gpio,
+ swdio_dir_is_active_high ? 1 : 0);
+ if (!gpiod_swdio_dir)
+ goto out_error;
+ }
+
gpiod_swdio = helper_get_output_line("swdio", gpiod_chip_swdio, swdio_gpio, 1);
if (!gpiod_swdio)
goto out_error;
@@ -593,6 +626,12 @@ COMMAND_HANDLER(linuxgpiod_handle_swd_gpionum_swdio)
&swdio_gpio);
}
+COMMAND_HANDLER(linuxgpiod_handle_swd_gpionum_swdio_dir)
+{
+ return CALL_COMMAND_HANDLER(linuxgpiod_helper_gpionum, "swdio_dir", &swdio_dir_gpiochip,
+ &swdio_dir_gpio);
+}
+
COMMAND_HANDLER(linuxgpiod_handle_gpionum_led)
{
return CALL_COMMAND_HANDLER(linuxgpiod_helper_gpionum, "led", &led_gpiochip,
@@ -611,6 +650,7 @@ COMMAND_HANDLER(linuxgpiod_handle_gpiochip)
srst_gpiochip = gpiochip;
swclk_gpiochip = gpiochip;
swdio_gpiochip = gpiochip;
+ swdio_dir_gpiochip = gpiochip;
led_gpiochip = gpiochip;
}
@@ -689,6 +729,13 @@ static const struct command_registration linuxgpiod_subcommand_handlers[] = {
.help = "gpio chip number (optional) and gpio number for swdio.",
.usage = "[chip] swdio",
},
+ {
+ .name = "swdio_dir_num",
+ .handler = linuxgpiod_handle_swd_gpionum_swdio_dir,
+ .mode = COMMAND_CONFIG,
+ .help = "gpio chip number (optional) and gpio number for swdio_dir.",
+ .usage = "[chip] swdio_dir",
+ },
{
.name = "led_num",
.handler = linuxgpiod_handle_gpionum_led,
-----------------------------------------------------------------------
Summary of changes:
src/jtag/drivers/bcm2835gpio.c | 13 ++++++------
src/jtag/drivers/linuxgpiod.c | 47 ++++++++++++++++++++++++++++++++++++++++++
src/target/arm_cti.c | 7 ++++++-
3 files changed, 60 insertions(+), 7 deletions(-)
hooks/post-receive
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Main OpenOCD repository
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|
From: OpenOCD-Gerrit <ope...@us...> - 2022-04-24 08:28:01
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 9de084e0067a86b8040f8ea2c3f46dff0b9e6a70 (commit)
from 1c07229f8ca72e0f244e2289cefa28b65e21e774 (commit)
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- Log -----------------------------------------------------------------
commit 9de084e0067a86b8040f8ea2c3f46dff0b9e6a70
Author: Tomas Vanek <va...@fb...>
Date: Tue Nov 30 10:33:41 2021 +0100
flash/nor/stm32f1x: add can_load_options flag for GD32F1x0, F3x0 and E23x
According to GigaDevice user manuals the devices have OBRLD bit in FMC_CTL
register which is functionally compatible with OBL_LAUNCH @ FLASH_CR
of STM32 counterparts.
Change-Id: I84d231b38815fcb6452fd73b9153b269cce3b737
Signed-off-by: Tomas Vanek <va...@fb...>
Reviewed-on: https://review.openocd.org/c/openocd/+/6759
Tested-by: jenkins
Reviewed-by: Andrzej SierżÄga <as...@gm...>
diff --git a/src/flash/nor/stm32f1x.c b/src/flash/nor/stm32f1x.c
index dea8df759..c750ff080 100644
--- a/src/flash/nor/stm32f1x.c
+++ b/src/flash/nor/stm32f1x.c
@@ -896,10 +896,12 @@ static int stm32x_probe(struct flash_bank *bank)
stm32x_info->user_data_offset = 16;
stm32x_info->option_offset = 6;
max_flash_size_in_kb = 64;
+ stm32x_info->can_load_options = true;
break;
case 0x1704: /* gd32f3x0 */
stm32x_info->user_data_offset = 16;
stm32x_info->option_offset = 6;
+ stm32x_info->can_load_options = true;
break;
case 0x1906: /* gd32vf103 */
break;
@@ -907,6 +909,7 @@ static int stm32x_probe(struct flash_bank *bank)
stm32x_info->user_data_offset = 16;
stm32x_info->option_offset = 6;
max_flash_size_in_kb = 64;
+ stm32x_info->can_load_options = true;
break;
}
break;
-----------------------------------------------------------------------
Summary of changes:
src/flash/nor/stm32f1x.c | 3 +++
1 file changed, 3 insertions(+)
hooks/post-receive
--
Main OpenOCD repository
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|
From: OpenOCD-Gerrit <ope...@us...> - 2022-04-24 08:27:38
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 1c07229f8ca72e0f244e2289cefa28b65e21e774 (commit)
from f2b4897773a1c9db185dfb61d474055559fd507a (commit)
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- Log -----------------------------------------------------------------
commit 1c07229f8ca72e0f244e2289cefa28b65e21e774
Author: Tomas Vanek <va...@fb...>
Date: Wed Nov 17 17:33:29 2021 +0100
tcl/target/gd32vf103: add flash bank
The flash is compatible with stm32f1x, reuse the driver.
Extend the size of work area to RAM size of the smallest device.
Stop watchdogs before flash programming.
Change-Id: I67a7654a6e196f9d4b2409edaa7990c53334437e
Signed-off-by: Tomas Vanek <va...@fb...>
Reviewed-on: https://review.openocd.org/c/openocd/+/6711
Tested-by: jenkins
Reviewed-by: Tim Newsome <ti...@si...>
diff --git a/tcl/target/gd32vf103.cfg b/tcl/target/gd32vf103.cfg
index 0f4dcf375..cfc64783f 100644
--- a/tcl/target/gd32vf103.cfg
+++ b/tcl/target/gd32vf103.cfg
@@ -4,6 +4,8 @@
# https://www.gigadevice.com/products/microcontrollers/gd32/risc-v/
#
+source [find mem_helper.tcl]
+
transport select jtag
if { [info exists CHIPNAME] } {
@@ -12,10 +14,11 @@ if { [info exists CHIPNAME] } {
set _CHIPNAME gd32vf103
}
+# The smallest RAM size 6kB (GD32VF103C4/T4/R4)
if { [info exists WORKAREASIZE] } {
set _WORKAREASIZE $WORKAREASIZE
} else {
- set _WORKAREASIZE 0x800
+ set _WORKAREASIZE 0x1800
}
jtag newtap $_CHIPNAME cpu -irlen 5 -expected-id 0x1000563d
@@ -24,3 +27,14 @@ set _TARGETNAME $_CHIPNAME.cpu
target create $_TARGETNAME riscv -chain-position $_TARGETNAME
$_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0
+
+set _FLASHNAME $_CHIPNAME.flash
+flash bank $_FLASHNAME stm32f1x 0x08000000 0 0 0 $_TARGETNAME
+
+# DBGMCU_CR register cannot be set in examine-end event as the running RISC-V CPU
+# does not allow the debugger to access memory.
+# Stop watchdogs at least before flash programming.
+$_TARGETNAME configure -event reset-init {
+ # DBGMCU_CR |= DBG_WWDG_STOP | DBG_IWDG_STOP
+ mmw 0xE0042004 0x00000300 0
+}
-----------------------------------------------------------------------
Summary of changes:
tcl/target/gd32vf103.cfg | 16 +++++++++++++++-
1 file changed, 15 insertions(+), 1 deletion(-)
hooks/post-receive
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|
From: OpenOCD-Gerrit <ope...@us...> - 2022-04-24 08:27:03
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
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- Log -----------------------------------------------------------------
commit f2b4897773a1c9db185dfb61d474055559fd507a
Author: Tomas Vanek <va...@fb...>
Date: Tue Nov 16 12:23:48 2021 +0100
flash/stm32f1x: add support for RISC-V GigaDevice GD32VF103
The device has compatible flash macro with STM32F1 family, reuse
stm32f1x driver code.
Detect non-ARM target - for simplicy test target type name 'riscv'
and the address has 32 bits.
In case of RISC-V CPU use simple chunked write algo - async algo
cannot be used as the core implemented in this device doesn't
allow memory access while running.
Change-Id: Ie3886fbd8573652691f91a02335812a7300689f7
Signed-off-by: Tomas Vanek <va...@fb...>
Reviewed-on: https://review.openocd.org/c/openocd/+/6704
Tested-by: jenkins
Reviewed-by: Tim Newsome <ti...@si...>
diff --git a/contrib/loaders/flash/gd32vf103/Makefile b/contrib/loaders/flash/gd32vf103/Makefile
new file mode 100644
index 000000000..2c34e08c0
--- /dev/null
+++ b/contrib/loaders/flash/gd32vf103/Makefile
@@ -0,0 +1,28 @@
+BIN2C = ../../../../src/helper/bin2char.sh
+
+CROSS_COMPILE ?= riscv-none-embed-
+
+CC=$(CROSS_COMPILE)gcc
+OBJCOPY=$(CROSS_COMPILE)objcopy
+OBJDUMP=$(CROSS_COMPILE)objdump
+
+CFLAGS = -march=rv32i -mabi=ilp32 -static -nostartfiles -nostdlib -Os -g -fPIC
+
+all: gd32vf103.inc
+
+.PHONY: clean
+
+%.elf: %.c
+ $(CC) $(CFLAGS) $< -o $@
+
+%.lst: %.elf
+ $(OBJDUMP) -S $< > $@
+
+%.bin: %.elf
+ $(OBJCOPY) -Obinary $< $@
+
+%.inc: %.bin
+ $(BIN2C) < $< > $@
+
+clean:
+ -rm -f *.elf *.lst *.bin *.inc
diff --git a/contrib/loaders/flash/gd32vf103/gd32vf103.c b/contrib/loaders/flash/gd32vf103/gd32vf103.c
new file mode 100644
index 000000000..69225a026
--- /dev/null
+++ b/contrib/loaders/flash/gd32vf103/gd32vf103.c
@@ -0,0 +1,33 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
+#include <stdint.h>
+
+#define FLASH_BSY (1 << 0)
+#define FLASH_PGERR (1 << 2)
+#define FLASH_WRPRTERR (1 << 4)
+
+void flash_write(volatile uint32_t *flash_sr,
+ uint32_t hwords_count,
+ uint16_t *buffer,
+ uint16_t *target_addr) __attribute__((naked));
+
+void flash_write(volatile uint32_t *flash_sr,
+ uint32_t hwords_count,
+ uint16_t *buffer,
+ uint16_t *target_addr)
+{
+ do {
+ *target_addr = *buffer++;
+
+ register uint32_t sr;
+ do {
+ sr = *flash_sr;
+ } while (sr & FLASH_BSY);
+
+ if (sr & (FLASH_PGERR | FLASH_WRPRTERR))
+ break;
+
+ target_addr++;
+ } while (--hwords_count);
+ asm("ebreak");
+}
diff --git a/contrib/loaders/flash/gd32vf103/gd32vf103.inc b/contrib/loaders/flash/gd32vf103/gd32vf103.inc
new file mode 100644
index 000000000..05eabff21
--- /dev/null
+++ b/contrib/loaders/flash/gd32vf103/gd32vf103.inc
@@ -0,0 +1,4 @@
+/* Autogenerated with ../../../../src/helper/bin2char.sh */
+0x83,0x57,0x06,0x00,0x13,0x06,0x26,0x00,0x23,0x90,0xf6,0x00,0x83,0x27,0x05,0x00,
+0x13,0xf7,0x17,0x00,0xe3,0x1c,0x07,0xfe,0x93,0xf7,0x47,0x01,0x63,0x98,0x07,0x00,
+0x93,0x85,0xf5,0xff,0x93,0x86,0x26,0x00,0xe3,0x9c,0x05,0xfc,0x73,0x00,0x10,0x00,
diff --git a/doc/openocd.texi b/doc/openocd.texi
index 121873522..d55002733 100644
--- a/doc/openocd.texi
+++ b/doc/openocd.texi
@@ -7293,6 +7293,7 @@ applied to all of them.
All members of the STM32F0, STM32F1 and STM32F3 microcontroller families
from STMicroelectronics and all members of the GD32F1x0, GD32F3x0 and GD32E23x microcontroller
families from GigaDevice include internal flash and use ARM Cortex-M0/M3/M4/M23 cores.
+The driver also works with GD32VF103 powered by RISC-V core.
The driver automatically recognizes a number of these chips using
the chip identification register, and autoconfigures itself.
diff --git a/src/flash/nor/stm32f1x.c b/src/flash/nor/stm32f1x.c
index 8e66af368..dea8df759 100644
--- a/src/flash/nor/stm32f1x.c
+++ b/src/flash/nor/stm32f1x.c
@@ -26,6 +26,8 @@
#include "config.h"
#endif
+#include <string.h>
+
#include "imp.h"
#include <helper/binarybuffer.h>
#include <target/algorithm.h>
@@ -129,7 +131,6 @@ struct stm32x_flash_bank {
};
static int stm32x_mass_erase(struct flash_bank *bank);
-static int stm32x_get_device_id(struct flash_bank *bank, uint32_t *device_id);
static int stm32x_write_block(struct flash_bank *bank, const uint8_t *buffer,
uint32_t address, uint32_t hwords_count);
@@ -550,6 +551,109 @@ static int stm32x_write_block_async(struct flash_bank *bank, const uint8_t *buff
return retval;
}
+static int stm32x_write_block_riscv(struct flash_bank *bank, const uint8_t *buffer,
+ uint32_t address, uint32_t hwords_count)
+{
+ struct target *target = bank->target;
+ uint32_t buffer_size;
+ struct working_area *write_algorithm;
+ struct working_area *source;
+ static const uint8_t gd32vf103_flash_write_code[] = {
+#include "../../../contrib/loaders/flash/gd32vf103/gd32vf103.inc"
+ };
+
+ /* flash write code */
+ if (target_alloc_working_area(target, sizeof(gd32vf103_flash_write_code),
+ &write_algorithm) != ERROR_OK) {
+ LOG_WARNING("no working area available, can't do block memory writes");
+ return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
+ }
+
+ int retval = target_write_buffer(target, write_algorithm->address,
+ sizeof(gd32vf103_flash_write_code), gd32vf103_flash_write_code);
+ if (retval != ERROR_OK) {
+ target_free_working_area(target, write_algorithm);
+ return retval;
+ }
+
+ /* memory buffer */
+ buffer_size = target_get_working_area_avail(target);
+ buffer_size = MIN(hwords_count * 2, MAX(buffer_size, 256));
+
+ retval = target_alloc_working_area(target, buffer_size, &source);
+ /* Allocated size is always word aligned */
+ if (retval != ERROR_OK) {
+ target_free_working_area(target, write_algorithm);
+ LOG_WARNING("no large enough working area available, can't do block memory writes");
+ /* target_alloc_working_area() may return ERROR_FAIL if area backup fails:
+ * convert any error to ERROR_TARGET_RESOURCE_NOT_AVAILABLE
+ */
+ return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
+ }
+
+ struct reg_param reg_params[4];
+
+ init_reg_param(®_params[0], "a0", 32, PARAM_OUT); /* poiner to FLASH_SR */
+ init_reg_param(®_params[1], "a1", 32, PARAM_OUT); /* count (halfword-16bit) */
+ init_reg_param(®_params[2], "a2", 32, PARAM_OUT); /* buffer start */
+ init_reg_param(®_params[3], "a3", 32, PARAM_IN_OUT); /* target address */
+
+ while (hwords_count > 0) {
+ uint32_t thisrun_hwords = source->size / 2;
+
+ /* Limit to the amount of data we actually want to write */
+ if (thisrun_hwords > hwords_count)
+ thisrun_hwords = hwords_count;
+
+ /* Write data to buffer */
+ retval = target_write_buffer(target, source->address,
+ thisrun_hwords * 2, buffer);
+ if (retval != ERROR_OK)
+ break;
+
+ buf_set_u32(reg_params[0].value, 0, 32, stm32x_get_flash_reg(bank, STM32_FLASH_SR));
+ buf_set_u32(reg_params[1].value, 0, 32, thisrun_hwords);
+ buf_set_u32(reg_params[2].value, 0, 32, source->address);
+ buf_set_u32(reg_params[3].value, 0, 32, address);
+
+ retval = target_run_algorithm(target,
+ 0, NULL,
+ ARRAY_SIZE(reg_params), reg_params,
+ write_algorithm->address,
+ write_algorithm->address + sizeof(gd32vf103_flash_write_code) - 4,
+ 10000, NULL);
+
+ if (retval != ERROR_OK) {
+ LOG_ERROR("Failed to execute algorithm at 0x%" TARGET_PRIxADDR ": %d",
+ write_algorithm->address, retval);
+ break;
+ }
+
+ /* Actually we just need to check for programming errors
+ * stm32x_wait_status_busy also reports error and clears status bits
+ */
+ retval = stm32x_wait_status_busy(bank, 5);
+ if (retval != ERROR_OK) {
+ LOG_ERROR("flash write failed at address 0x%"PRIx32,
+ buf_get_u32(reg_params[3].value, 0, 32));
+ break;
+ }
+
+ /* Update counters */
+ buffer += thisrun_hwords * 2;
+ address += thisrun_hwords * 2;
+ hwords_count -= thisrun_hwords;
+ }
+
+ for (unsigned int i = 0; i < ARRAY_SIZE(reg_params); i++)
+ destroy_reg_param(®_params[i]);
+
+ target_free_working_area(target, source);
+ target_free_working_area(target, write_algorithm);
+
+ return retval;
+}
+
/** Writes a block to flash either using target algorithm
* or use fallback, host controlled halfword-by-halfword access.
* Flash controller must be unlocked before this call.
@@ -564,8 +668,15 @@ static int stm32x_write_block(struct flash_bank *bank,
*/
assert(address % 2 == 0);
- /* try using a block write - on ARM architecture or... */
- int retval = stm32x_write_block_async(bank, buffer, address, hwords_count);
+ int retval;
+ struct arm *arm = target_to_arm(target);
+ if (is_arm(arm)) {
+ /* try using a block write - on ARM architecture or... */
+ retval = stm32x_write_block_async(bank, buffer, address, hwords_count);
+ } else {
+ /* ... RISC-V architecture */
+ retval = stm32x_write_block_riscv(bank, buffer, address, hwords_count);
+ }
if (retval == ERROR_TARGET_RESOURCE_NOT_AVAILABLE) {
/* if block write failed (no sufficient working area),
@@ -631,11 +742,13 @@ reset_pg_and_lock:
return retval;
}
-static int stm32x_get_device_id(struct flash_bank *bank, uint32_t *device_id)
-{
- struct target *target = bank->target;
- uint32_t device_id_register = 0;
+struct stm32x_property_addr {
+ uint32_t device_id;
+ uint32_t flash_size;
+};
+static int stm32x_get_property_addr(struct target *target, struct stm32x_property_addr *addr)
+{
if (!target_was_examined(target)) {
LOG_ERROR("Target not examined yet");
return ERROR_TARGET_NOT_EXAMINED;
@@ -643,63 +756,61 @@ static int stm32x_get_device_id(struct flash_bank *bank, uint32_t *device_id)
switch (cortex_m_get_partno_safe(target)) {
case CORTEX_M0_PARTNO: /* STM32F0x devices */
- device_id_register = 0x40015800;
- break;
+ addr->device_id = 0x40015800;
+ addr->flash_size = 0x1FFFF7CC;
+ return ERROR_OK;
case CORTEX_M3_PARTNO: /* STM32F1x devices */
- device_id_register = 0xE0042000;
- break;
+ addr->device_id = 0xE0042000;
+ addr->flash_size = 0x1FFFF7E0;
+ return ERROR_OK;
case CORTEX_M4_PARTNO: /* STM32F3x devices */
- device_id_register = 0xE0042000;
- break;
+ addr->device_id = 0xE0042000;
+ addr->flash_size = 0x1FFFF7CC;
+ return ERROR_OK;
case CORTEX_M23_PARTNO: /* GD32E23x devices */
- device_id_register = 0x40015800;
- break;
+ addr->device_id = 0x40015800;
+ addr->flash_size = 0x1FFFF7E0;
+ return ERROR_OK;
+ case CORTEX_M_PARTNO_INVALID:
+ /* Check for GD32VF103 with RISC-V CPU */
+ if (strcmp(target_type_name(target), "riscv") == 0
+ && target_address_bits(target) == 32) {
+ /* There is nothing like arm common_magic in riscv_info_t
+ * check text name of target and if target is 32-bit
+ */
+ addr->device_id = 0xE0042000;
+ addr->flash_size = 0x1FFFF7E0;
+ return ERROR_OK;
+ }
+ /* fallthrough */
default:
LOG_ERROR("Cannot identify target as a stm32x");
return ERROR_FAIL;
}
+}
- /* read stm32 device id register */
- int retval = target_read_u32(target, device_id_register, device_id);
+static int stm32x_get_device_id(struct flash_bank *bank, uint32_t *device_id)
+{
+ struct target *target = bank->target;
+ struct stm32x_property_addr addr;
+
+ int retval = stm32x_get_property_addr(target, &addr);
if (retval != ERROR_OK)
return retval;
- return retval;
+ return target_read_u32(target, addr.device_id, device_id);
}
static int stm32x_get_flash_size(struct flash_bank *bank, uint16_t *flash_size_in_kb)
{
struct target *target = bank->target;
- uint32_t flash_size_reg;
-
- if (!target_was_examined(target)) {
- LOG_ERROR("Target not examined yet");
- return ERROR_TARGET_NOT_EXAMINED;
- }
-
- switch (cortex_m_get_partno_safe(target)) {
- case CORTEX_M0_PARTNO: /* STM32F0x devices */
- flash_size_reg = 0x1FFFF7CC;
- break;
- case CORTEX_M3_PARTNO: /* STM32F1x devices */
- flash_size_reg = 0x1FFFF7E0;
- break;
- case CORTEX_M4_PARTNO: /* STM32F3x devices */
- flash_size_reg = 0x1FFFF7CC;
- break;
- case CORTEX_M23_PARTNO: /* GD32E23x devices */
- flash_size_reg = 0x1FFFF7E0;
- break;
- default:
- LOG_ERROR("Cannot identify target as a stm32x");
- return ERROR_FAIL;
- }
+ struct stm32x_property_addr addr;
- int retval = target_read_u16(target, flash_size_reg, flash_size_in_kb);
+ int retval = stm32x_get_property_addr(target, &addr);
if (retval != ERROR_OK)
return retval;
- return retval;
+ return target_read_u16(target, addr.flash_size, flash_size_in_kb);
}
static int stm32x_probe(struct flash_bank *bank)
@@ -790,6 +901,8 @@ static int stm32x_probe(struct flash_bank *bank)
stm32x_info->user_data_offset = 16;
stm32x_info->option_offset = 6;
break;
+ case 0x1906: /* gd32vf103 */
+ break;
case 0x1909: /* gd32e23x */
stm32x_info->user_data_offset = 16;
stm32x_info->option_offset = 6;
@@ -1005,6 +1118,10 @@ static int get_stm32x_info(struct flash_bank *bank, struct command_invocation *c
device_str = "GD32F3x0";
break;
+ case 0x1906:
+ device_str = "GD32VF103";
+ break;
+
case 0x1909: /* gd32e23x */
device_str = "GD32E23x";
break;
-----------------------------------------------------------------------
Summary of changes:
contrib/loaders/flash/{nrf5 => gd32vf103}/Makefile | 8 +-
contrib/loaders/flash/gd32vf103/gd32vf103.c | 33 ++++
contrib/loaders/flash/gd32vf103/gd32vf103.inc | 4 +
doc/openocd.texi | 1 +
src/flash/nor/stm32f1x.c | 205 ++++++++++++++++-----
5 files changed, 203 insertions(+), 48 deletions(-)
copy contrib/loaders/flash/{nrf5 => gd32vf103}/Makefile (69%)
create mode 100644 contrib/loaders/flash/gd32vf103/gd32vf103.c
create mode 100644 contrib/loaders/flash/gd32vf103/gd32vf103.inc
hooks/post-receive
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From: OpenOCD-Gerrit <ope...@us...> - 2022-04-23 09:26:43
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via a26ee5344cf70e068265ac2f03a2915fae070e14 (commit)
via a213397323585188ad2622de7eb9d5fcddee7a02 (commit)
from 5ebb1bdea1dfff9cce430bd17d08e340eea38e03 (commit)
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- Log -----------------------------------------------------------------
commit a26ee5344cf70e068265ac2f03a2915fae070e14
Author: Julien Massot <jul...@io...h>
Date: Fri Feb 4 09:11:39 2022 +0100
rtos: zephyr: do not use deprecated symbols name
Zephyr plan to remove openocd specific symbols in favour
of more generic one.
These generic symbols has been introduced in Zephyr 2.6.
Signed-off-by: Julien Massot <jul...@io...h>
Change-Id: I89418c9c378fb8b8baa29763fc6f1b6e652dc7ef
Reviewed-on: https://review.openocd.org/c/openocd/+/6844
Tested-by: jenkins
Reviewed-by: Stephanos Ioannidis <ro...@st...>
Reviewed-by: Antonio Borneo <bor...@gm...>
diff --git a/src/rtos/zephyr.c b/src/rtos/zephyr.c
index 630511636..7f3325fea 100644
--- a/src/rtos/zephyr.c
+++ b/src/rtos/zephyr.c
@@ -375,15 +375,15 @@ static const struct symbol_table_elem zephyr_symbol_list[] = {
.optional = false
},
{
- .symbol_name = "_kernel_openocd_offsets",
+ .symbol_name = "_kernel_thread_info_offsets",
.optional = false
},
{
- .symbol_name = "_kernel_openocd_size_t_size",
+ .symbol_name = "_kernel_thread_info_size_t_size",
.optional = false
},
{
- .symbol_name = "_kernel_openocd_num_offsets",
+ .symbol_name = "_kernel_thread_info_num_offsets",
.optional = true
},
{
commit a213397323585188ad2622de7eb9d5fcddee7a02
Author: Jan Matyas <ma...@co...>
Date: Tue Apr 12 13:33:51 2022 +0200
target/image: fix - p_flags field in ELF64 segment headers is 64 bits wide
Fixed the reading of p_flags in ELF64 segment headers - that field
is 64 bits wide.
Change-Id: I053ca57d36efb54b7c638484acd6c7a2fbcbd05a
Signed-off-by: Jan Matyas <ma...@co...>
Reviewed-on: https://review.openocd.org/c/openocd/+/6927
Tested-by: jenkins
Reviewed-by: Antonio Borneo <bor...@gm...>
diff --git a/src/target/image.c b/src/target/image.c
index eafa73eaa..130ea6c1f 100644
--- a/src/target/image.c
+++ b/src/target/image.c
@@ -596,7 +596,7 @@ static int image_elf64_read_headers(struct image *image)
image->sections[j].base_address = field64(elf,
elf->segments64[i].p_paddr);
image->sections[j].private = &elf->segments64[i];
- image->sections[j].flags = field32(elf, elf->segments64[i].p_flags);
+ image->sections[j].flags = field64(elf, elf->segments64[i].p_flags);
j++;
}
}
@@ -1168,7 +1168,7 @@ int image_read_section(struct image *image,
return ERROR_OK;
}
-int image_add_section(struct image *image, target_addr_t base, uint32_t size, int flags, uint8_t const *data)
+int image_add_section(struct image *image, target_addr_t base, uint32_t size, uint64_t flags, uint8_t const *data)
{
struct imagesection *section;
diff --git a/src/target/image.h b/src/target/image.h
index 5b5d11f6b..bf06064ac 100644
--- a/src/target/image.h
+++ b/src/target/image.h
@@ -52,7 +52,7 @@ enum image_type {
struct imagesection {
target_addr_t base_address;
uint32_t size;
- int flags;
+ uint64_t flags;
void *private; /* private data */
};
@@ -108,7 +108,7 @@ int image_read_section(struct image *image, int section, target_addr_t offset,
void image_close(struct image *image);
int image_add_section(struct image *image, target_addr_t base, uint32_t size,
- int flags, uint8_t const *data);
+ uint64_t flags, uint8_t const *data);
int image_calculate_checksum(const uint8_t *buffer, uint32_t nbytes,
uint32_t *checksum);
-----------------------------------------------------------------------
Summary of changes:
src/rtos/zephyr.c | 6 +++---
src/target/image.c | 4 ++--
src/target/image.h | 4 ++--
3 files changed, 7 insertions(+), 7 deletions(-)
hooks/post-receive
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Main OpenOCD repository
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From: OpenOCD-Gerrit <ope...@us...> - 2022-04-23 09:26:14
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 5ebb1bdea1dfff9cce430bd17d08e340eea38e03 (commit)
from d8c81d72540a9e6a9f59412686332379ece1618f (commit)
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- Log -----------------------------------------------------------------
commit 5ebb1bdea1dfff9cce430bd17d08e340eea38e03
Author: Antonio Borneo <bor...@gm...>
Date: Wed Mar 30 23:55:04 2022 +0200
server/gdb: fix return of gdb remote monitor command
Current implementation for gdb remote monitor command uses the
command_run_line() to execute the command.
While command_run_line() has several advantages, it unfortunately
hides the error codes and outputs the result of the command
through LOG_USER(), which is not what gdb requires. See 'qRcmd' in
https://sourceware.org/gdb/onlinedocs/gdb/General-Query-Packets.html
Replace command_run_line() with Jim_EvalObj() and parse the output
to provide the proper result to gdb.
Can be tested by defining in OpenOCD:
proc a {} {return hello}
proc b {} {return -code 4}
proc c {} {return -code 4 "This is an error!"}
then by executing in gdb console:
monitor a
monitor b
monitor c
monitor foo
Change-Id: I1b85554d59221560e97861a499e16764e70c1172
Signed-off-by: Antonio Borneo <bor...@gm...>
Reported-by: Torbjorn Svensson <tor...@st...>
Reviewed-on: https://review.openocd.org/c/openocd/+/6886
Tested-by: jenkins
diff --git a/src/server/gdb_server.c b/src/server/gdb_server.c
index 82c8ce92b..fcc87fba1 100644
--- a/src/server/gdb_server.c
+++ b/src/server/gdb_server.c
@@ -2761,11 +2761,52 @@ static int gdb_query_packet(struct connection *connection,
/* some commands need to know the GDB connection, make note of current
* GDB connection. */
current_gdb_connection = gdb_connection;
- command_run_line(cmd_ctx, cmd);
+ struct target *saved_target_override = cmd_ctx->current_target_override;
+ cmd_ctx->current_target_override = target;
+
+ int retval = Jim_EvalObj(cmd_ctx->interp, Jim_NewStringObj(cmd_ctx->interp, cmd, -1));
+
+ cmd_ctx->current_target_override = saved_target_override;
current_gdb_connection = NULL;
target_call_timer_callbacks_now();
gdb_connection->output_flag = GDB_OUTPUT_NO;
free(cmd);
+ if (retval == JIM_RETURN)
+ retval = cmd_ctx->interp->returnCode;
+ int lenmsg;
+ const char *cretmsg = Jim_GetString(Jim_GetResult(cmd_ctx->interp), &lenmsg);
+ char *retmsg;
+ if (lenmsg && cretmsg[lenmsg - 1] != '\n') {
+ retmsg = alloc_printf("%s\n", cretmsg);
+ lenmsg++;
+ } else {
+ retmsg = strdup(cretmsg);
+ }
+ if (!retmsg)
+ return ERROR_GDB_BUFFER_TOO_SMALL;
+
+ if (retval == JIM_OK) {
+ if (lenmsg) {
+ char *hex_buffer = malloc(lenmsg * 2 + 1);
+ if (!hex_buffer) {
+ free(retmsg);
+ return ERROR_GDB_BUFFER_TOO_SMALL;
+ }
+
+ size_t pkt_len = hexify(hex_buffer, (const uint8_t *)retmsg, lenmsg,
+ lenmsg * 2 + 1);
+ gdb_put_packet(connection, hex_buffer, pkt_len);
+ free(hex_buffer);
+ } else {
+ gdb_put_packet(connection, "OK", 2);
+ }
+ } else {
+ if (lenmsg)
+ gdb_output_con(connection, retmsg);
+ gdb_send_error(connection, retval);
+ }
+ free(retmsg);
+ return ERROR_OK;
}
gdb_put_packet(connection, "OK", 2);
return ERROR_OK;
-----------------------------------------------------------------------
Summary of changes:
src/server/gdb_server.c | 43 ++++++++++++++++++++++++++++++++++++++++++-
1 file changed, 42 insertions(+), 1 deletion(-)
hooks/post-receive
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Main OpenOCD repository
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From: OpenOCD-Gerrit <ope...@us...> - 2022-04-23 09:25:37
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via d8c81d72540a9e6a9f59412686332379ece1618f (commit)
from 7ca770cbf9ecda1fe603379f6973a70ec9e913a7 (commit)
Those revisions listed above that are new to this repository have
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- Log -----------------------------------------------------------------
commit d8c81d72540a9e6a9f59412686332379ece1618f
Author: Markus Reiter <me...@re...>
Date: Sun Apr 17 16:01:24 2022 +0200
tcl/target/stm32l4x: align format/order/comments with stm32f4x
Change-Id: Ie97bb2f56b582bc735c238af5f160fcb28a61eb0
Signed-off-by: Markus Reiter <me...@re...>
Reviewed-on: https://review.openocd.org/c/openocd/+/6933
Tested-by: jenkins
Reviewed-by: Antonio Borneo <bor...@gm...>
diff --git a/tcl/target/stm32l4x.cfg b/tcl/target/stm32l4x.cfg
index dec2b2760..9bd7e37ba 100644
--- a/tcl/target/stm32l4x.cfg
+++ b/tcl/target/stm32l4x.cfg
@@ -49,8 +49,9 @@ target create $_TARGETNAME cortex_m -endian $_ENDIAN -dap $_CHIPNAME.dap
$_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0
-flash bank $_CHIPNAME.flash stm32l4x 0x08000000 0 0 0 $_TARGETNAME
-flash bank $_CHIPNAME.otp stm32l4x 0x1fff7000 0 0 0 $_TARGETNAME
+set _FLASHNAME $_CHIPNAME.flash
+flash bank $_FLASHNAME stm32l4x 0x08000000 0 0 0 $_TARGETNAME
+flash bank $_CHIPNAME.otp stm32l4x 0x1fff7000 0 0 0 $_TARGETNAME
if { [info exists QUADSPI] && $QUADSPI } {
set a [llength [flash list]]
@@ -90,6 +91,16 @@ if {![using_hla]} {
cortex_m reset_config sysresetreq
}
+$_TARGETNAME configure -event examine-end {
+ # Enable debug during low power modes (uses more power)
+ # DBGMCU_CR |= DBG_STANDBY | DBG_STOP | DBG_SLEEP
+ mmw 0xE0042004 0x00000007 0
+
+ # Stop watchdog counters during halt
+ # DBGMCU_APB1_FZ |= DBG_IWDG_STOP | DBG_WWDG_STOP
+ mmw 0xE0042008 0x00001800 0
+}
+
proc proc_post_enable {_chipname} {
targets $_chipname.cpu
@@ -127,6 +138,7 @@ $_TARGETNAME configure -event reset-init {
# 3 WS compliant with VOS == 2 and 24 MHz.
mww 0x40022000 0x00000103 ;# FLASH_ACR = PRFTBE | 3(Latency)
mww 0x40021000 0x00000099 ;# RCC_CR = MSI_ON | MSIRGSEL | MSI Range 9
+
# Boost JTAG frequency
adapter speed 4000
}
@@ -135,12 +147,3 @@ $_TARGETNAME configure -event reset-start {
# Reset clock is MSI (4 MHz)
adapter speed 500
}
-
-$_TARGETNAME configure -event examine-end {
- # DBGMCU_CR |= DBG_STANDBY | DBG_STOP | DBG_SLEEP
- mmw 0xE0042004 0x00000007 0
-
- # Stop watchdog counters during halt
- # DBGMCU_APB1_FZ |= DBG_IWDG_STOP | DBG_WWDG_STOP
- mmw 0xE0042008 0x00001800 0
-}
-----------------------------------------------------------------------
Summary of changes:
tcl/target/stm32l4x.cfg | 25 ++++++++++++++-----------
1 file changed, 14 insertions(+), 11 deletions(-)
hooks/post-receive
--
Main OpenOCD repository
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From: OpenOCD-Gerrit <ope...@us...> - 2022-04-23 09:25:26
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 7ca770cbf9ecda1fe603379f6973a70ec9e913a7 (commit)
from d47aaf6d92788efc90c6d3379d58132e7ddfa781 (commit)
Those revisions listed above that are new to this repository have
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- Log -----------------------------------------------------------------
commit 7ca770cbf9ecda1fe603379f6973a70ec9e913a7
Author: Markus Reiter <me...@re...>
Date: Sat Apr 16 19:04:50 2022 +0200
tcl/target/stm32l4x: switch to new TPIU/SWO support
Change-Id: I3362fa7292eae7a3ba119cf6183f8bc4cbd5cbd4
Signed-off-by: Markus Reiter <me...@re...>
Reviewed-on: https://review.openocd.org/c/openocd/+/6932
Tested-by: jenkins
Reviewed-by: Antonio Borneo <bor...@gm...>
diff --git a/tcl/target/stm32l4x.cfg b/tcl/target/stm32l4x.cfg
index 103d741e2..dec2b2760 100644
--- a/tcl/target/stm32l4x.cfg
+++ b/tcl/target/stm32l4x.cfg
@@ -38,6 +38,8 @@ if { [info exists CPUTAPID] } {
swj_newdap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu
+tpiu create $_CHIPNAME.tpiu -dap $_CHIPNAME.dap -ap-num 0 -baseaddr 0xE0040000
+
if {[using_jtag]} {
jtag newtap $_CHIPNAME bs -irlen 5
}
@@ -88,6 +90,37 @@ if {![using_hla]} {
cortex_m reset_config sysresetreq
}
+proc proc_post_enable {_chipname} {
+ targets $_chipname.cpu
+
+ if { [$_chipname.tpiu cget -protocol] eq "sync" } {
+ switch [$_chipname.tpiu cget -port-width] {
+ 1 {
+ mmw 0xE0042004 0x00000060 0x000000c0
+ mmw 0x48001020 0x00000000 0x0000ff00
+ mmw 0x48001000 0x000000a0 0x000000f0
+ mmw 0x48001008 0x000000f0 0x00000000
+ }
+ 2 {
+ mmw 0xE0042004 0x000000a0 0x000000c0
+ mmw 0x48001020 0x00000000 0x000fff00
+ mmw 0x48001000 0x000002a0 0x000003f0
+ mmw 0x48001008 0x000003f0 0x00000000
+ }
+ 4 {
+ mmw 0xE0042004 0x000000e0 0x000000c0
+ mmw 0x48001020 0x00000000 0x0fffff00
+ mmw 0x48001000 0x00002aa0 0x00003ff0
+ mmw 0x48001008 0x00003ff0 0x00000000
+ }
+ }
+ } else {
+ mmw 0xE0042004 0x00000020 0x000000c0
+ }
+}
+
+$_CHIPNAME.tpiu configure -event post-enable "proc_post_enable $_CHIPNAME"
+
$_TARGETNAME configure -event reset-init {
# CPU comes out of reset with MSI_ON | MSI_RDY | MSI Range 6 (4 MHz).
# Use MSI 24 MHz clock, compliant even with VOS == 2.
@@ -111,10 +144,3 @@ $_TARGETNAME configure -event examine-end {
# DBGMCU_APB1_FZ |= DBG_IWDG_STOP | DBG_WWDG_STOP
mmw 0xE0042008 0x00001800 0
}
-
-$_TARGETNAME configure -event trace-config {
- # Set TRACE_IOEN; TRACE_MODE is set to async; when using sync
- # change this value accordingly to configure trace pins
- # assignment
- mmw 0xE0042004 0x00000020 0
-}
-----------------------------------------------------------------------
Summary of changes:
tcl/target/stm32l4x.cfg | 40 +++++++++++++++++++++++++++++++++-------
1 file changed, 33 insertions(+), 7 deletions(-)
hooks/post-receive
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Main OpenOCD repository
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From: OpenOCD-Gerrit <ope...@us...> - 2022-04-23 09:24:13
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via d47aaf6d92788efc90c6d3379d58132e7ddfa781 (commit)
from a5035849d671fc7821b7b864f0e103d6a0521915 (commit)
Those revisions listed above that are new to this repository have
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- Log -----------------------------------------------------------------
commit d47aaf6d92788efc90c6d3379d58132e7ddfa781
Author: Markus Reiter <me...@re...>
Date: Sat Apr 16 19:02:21 2022 +0200
tcl/target/stm32l4x: set default WORKAREASIZE to smallest device
Change-Id: Ia8bfb664ff28bd0579492032ce513b010e71c593
Signed-off-by: Markus Reiter <me...@re...>
Reviewed-on: https://review.openocd.org/c/openocd/+/6931
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tar...@gm...>
Reviewed-by: Antonio Borneo <bor...@gm...>
Reviewed-by: Tomas Vanek <va...@fb...>
diff --git a/tcl/target/stm32l4x.cfg b/tcl/target/stm32l4x.cfg
index 589979193..103d741e2 100644
--- a/tcl/target/stm32l4x.cfg
+++ b/tcl/target/stm32l4x.cfg
@@ -15,11 +15,11 @@ if { [info exists CHIPNAME] } {
set _ENDIAN little
# Work-area is a space in RAM used for flash programming
-# Smallest current target has 64kB ram, use 32kB by default to avoid surprises
+# By default use 40kB (Available RAM in smallest device STM32L412)
if { [info exists WORKAREASIZE] } {
set _WORKAREASIZE $WORKAREASIZE
} else {
- set _WORKAREASIZE 0x8000
+ set _WORKAREASIZE 0xa000
}
#jtag scan chain
-----------------------------------------------------------------------
Summary of changes:
tcl/target/stm32l4x.cfg | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
hooks/post-receive
--
Main OpenOCD repository
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|
From: OpenOCD-Gerrit <ope...@us...> - 2022-04-23 09:24:00
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via a5035849d671fc7821b7b864f0e103d6a0521915 (commit)
from 2e5df83de7f2bceeeab762f24d1a15a850d75d9e (commit)
Those revisions listed above that are new to this repository have
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- Log -----------------------------------------------------------------
commit a5035849d671fc7821b7b864f0e103d6a0521915
Author: Markus Reiter <me...@re...>
Date: Sat Apr 16 18:59:49 2022 +0200
tcl/target/stm32f4x: fix name
Change-Id: I9baa79d8cf402991e6638c255a91728b8a77020c
Signed-off-by: Markus Reiter <me...@re...>
Reviewed-on: https://review.openocd.org/c/openocd/+/6930
Tested-by: jenkins
Reviewed-by: Tomas Vanek <va...@fb...>
Reviewed-by: Tarek BOCHKATI <tar...@gm...>
Reviewed-by: Antonio Borneo <bor...@gm...>
diff --git a/tcl/target/stm32f4x.cfg b/tcl/target/stm32f4x.cfg
index 2228de72f..aa2816e76 100644
--- a/tcl/target/stm32f4x.cfg
+++ b/tcl/target/stm32f4x.cfg
@@ -1,7 +1,7 @@
# script for stm32f4x family
#
-# stm32 devices support both JTAG and SWD transports.
+# stm32f4 devices support both JTAG and SWD transports.
#
source [find target/swj-dp.tcl]
source [find mem_helper.tcl]
-----------------------------------------------------------------------
Summary of changes:
tcl/target/stm32f4x.cfg | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
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From: OpenOCD-Gerrit <ope...@us...> - 2022-04-23 09:20:57
|
This is an automated email from the git hooks/post-receive script. It was
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commit 2e5df83de7f2bceeeab762f24d1a15a850d75d9e
Author: Antonio Borneo <bor...@gm...>
Date: Thu Mar 24 15:30:16 2022 +0100
nds32: deprecate it, together with aice adapter driver
The target nds32 and its companion adapter aice have not received
any real improvement since 2013.
It has been hard to keep them aligned during the evolution of
OpenOCD code, with no way for maintainers to really check if they
are still working.
No real documentation is present for them in OpenOCD.
The arch nds32 has been dropped from Linux kernel v5.18-rc1.
Deprecate both nds32 target and aice adapter with the target of
dropping them for v0.13.0.
Remove automatic build of aice, forcing user to select it.
Change-Id: Ib465d676246fa3b4e95c3d399ba9a5cf1f8b3baf
Signed-off-by: Antonio Borneo <bor...@gm...>
Reviewed-on: https://review.openocd.org/c/openocd/+/6887
Reviewed-by: Tomas Vanek <va...@fb...>
Tested-by: jenkins
diff --git a/configure.ac b/configure.ac
index 15d7229a4..7037656ae 100644
--- a/configure.ac
+++ b/configure.ac
@@ -122,8 +122,10 @@ m4_define([USB1_ADAPTERS],
[[opendous], [eStick/opendous JTAG Programmer], [OPENDOUS]],
[[armjtagew], [Olimex ARM-JTAG-EW Programmer], [ARMJTAGEW]],
[[rlink], [Raisonance RLink JTAG Programmer], [RLINK]],
- [[usbprog], [USBProg JTAG Programmer], [USBPROG]],
- [[aice], [Andes JTAG Programmer], [AICE]]])
+ [[usbprog], [USBProg JTAG Programmer], [USBPROG]]])
+
+m4_define([DEPRECATED_USB1_ADAPTERS],
+ [[[aice], [Andes JTAG Programmer (deprecated)], [AICE]]])
m4_define([HIDAPI_ADAPTERS],
[[[cmsis_dap], [CMSIS-DAP Compliant Debugger], [CMSIS_DAP_HID]],
@@ -256,6 +258,8 @@ AC_ARG_ADAPTERS([
LIBJAYLINK_ADAPTERS
],[auto])
+AC_ARG_ADAPTERS([DEPRECATED_USB1_ADAPTERS],[no])
+
AC_ARG_ENABLE([parport],
AS_HELP_STRING([--enable-parport], [Enable building the pc parallel port driver]),
[build_parport=$enableval], [build_parport=no])
@@ -660,6 +664,7 @@ m4_define([PROCESS_ADAPTERS], [
])
PROCESS_ADAPTERS([USB1_ADAPTERS], ["x$use_libusb1" = "xyes"], [libusb-1.x])
+PROCESS_ADAPTERS([DEPRECATED_USB1_ADAPTERS], ["x$use_libusb1" = "xyes"], [libusb-1.x])
PROCESS_ADAPTERS([HIDAPI_ADAPTERS], ["x$use_hidapi" = "xyes"], [hidapi])
PROCESS_ADAPTERS([HIDAPI_USB1_ADAPTERS], ["x$use_hidapi" = "xyes" -a "x$use_libusb1" = "xyes"], [hidapi and libusb-1.x])
PROCESS_ADAPTERS([LIBFTDI_ADAPTERS], ["x$use_libftdi" = "xyes"], [libftdi])
@@ -798,6 +803,7 @@ echo
echo OpenOCD configuration summary
echo --------------------------------------------------
m4_foreach([adapter], [USB1_ADAPTERS,
+ DEPRECATED_USB1_ADAPTERS,
HIDAPI_ADAPTERS, HIDAPI_USB1_ADAPTERS, LIBFTDI_ADAPTERS,
LIBFTDI_USB1_ADAPTERS,
LIBGPIOD_ADAPTERS,
diff --git a/doc/openocd.texi b/doc/openocd.texi
index 1b6d06302..121873522 100644
--- a/doc/openocd.texi
+++ b/doc/openocd.texi
@@ -4728,9 +4728,9 @@ specified, @xref{gdbportoverride,,option -gdb-port}.), and a fake ARM core will
be emulated to comply to GDB remote protocol.
@item @code{mips_m4k} -- a MIPS core.
@item @code{mips_mips64} -- a MIPS64 core.
-@item @code{nds32_v2} -- this is an Andes NDS32 v2 core.
-@item @code{nds32_v3} -- this is an Andes NDS32 v3 core.
-@item @code{nds32_v3m} -- this is an Andes NDS32 v3m core.
+@item @code{nds32_v2} -- this is an Andes NDS32 v2 core (deprecated; would be removed in v0.13.0).
+@item @code{nds32_v3} -- this is an Andes NDS32 v3 core (deprecated; would be removed in v0.13.0).
+@item @code{nds32_v3m} -- this is an Andes NDS32 v3m core (deprecated; would be removed in v0.13.0).
@item @code{or1k} -- this is an OpenRISC 1000 core.
The current implementation supports three JTAG TAP cores:
@itemize @minus
-----------------------------------------------------------------------
Summary of changes:
configure.ac | 10 ++++++++--
doc/openocd.texi | 6 +++---
2 files changed, 11 insertions(+), 5 deletions(-)
hooks/post-receive
--
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From: OpenOCD-Gerrit <ope...@us...> - 2022-04-13 16:56:44
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
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- Log -----------------------------------------------------------------
commit e83eeb44aa96e380f46d37980b8b76a908757dc6
Author: Tomas Vanek <va...@fb...>
Date: Tue Nov 16 20:12:53 2021 +0100
flash/nor/stm32f1x: lock flash in case of error
The current code locks the flash controller in case of error during
flash write only. An error in other flash operations may cause the
flash is left unlocked.
Implement locking also after error in erase, mass erase, options
write and erase.
Change-Id: I26c2ed7914e7847122306f29b777b9eefd1dc580
Signed-off-by: Tomas Vanek <va...@fb...>
Reviewed-on: https://review.openocd.org/c/openocd/+/6710
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tar...@gm...>
diff --git a/src/flash/nor/stm32f1x.c b/src/flash/nor/stm32f1x.c
index 26231e9cb..8e66af368 100644
--- a/src/flash/nor/stm32f1x.c
+++ b/src/flash/nor/stm32f1x.c
@@ -261,36 +261,39 @@ static int stm32x_erase_options(struct flash_bank *bank)
int retval = target_write_u32(target, STM32_FLASH_KEYR_B0, KEY1);
if (retval != ERROR_OK)
return retval;
-
retval = target_write_u32(target, STM32_FLASH_KEYR_B0, KEY2);
if (retval != ERROR_OK)
- return retval;
+ goto flash_lock;
/* unlock option flash registers */
retval = target_write_u32(target, STM32_FLASH_OPTKEYR_B0, KEY1);
if (retval != ERROR_OK)
- return retval;
+ goto flash_lock;
retval = target_write_u32(target, STM32_FLASH_OPTKEYR_B0, KEY2);
if (retval != ERROR_OK)
- return retval;
+ goto flash_lock;
/* erase option bytes */
retval = target_write_u32(target, STM32_FLASH_CR_B0, FLASH_OPTER | FLASH_OPTWRE);
if (retval != ERROR_OK)
- return retval;
+ goto flash_lock;
retval = target_write_u32(target, STM32_FLASH_CR_B0, FLASH_OPTER | FLASH_STRT | FLASH_OPTWRE);
if (retval != ERROR_OK)
- return retval;
+ goto flash_lock;
retval = stm32x_wait_status_busy(bank, FLASH_ERASE_TIMEOUT);
if (retval != ERROR_OK)
- return retval;
+ goto flash_lock;
/* clear read protection option byte
* this will also force a device unlock if set */
stm32x_info->option_bytes.rdp = stm32x_info->default_rdp;
return ERROR_OK;
+
+flash_lock:
+ target_write_u32(target, STM32_FLASH_CR_B0, FLASH_LOCK);
+ return retval;
}
static int stm32x_write_options(struct flash_bank *bank)
@@ -306,20 +309,20 @@ static int stm32x_write_options(struct flash_bank *bank)
return retval;
retval = target_write_u32(target, STM32_FLASH_KEYR_B0, KEY2);
if (retval != ERROR_OK)
- return retval;
+ goto flash_lock;
/* unlock option flash registers */
retval = target_write_u32(target, STM32_FLASH_OPTKEYR_B0, KEY1);
if (retval != ERROR_OK)
- return retval;
+ goto flash_lock;
retval = target_write_u32(target, STM32_FLASH_OPTKEYR_B0, KEY2);
if (retval != ERROR_OK)
- return retval;
+ goto flash_lock;
/* program option bytes */
retval = target_write_u32(target, STM32_FLASH_CR_B0, FLASH_OPTPG | FLASH_OPTWRE);
if (retval != ERROR_OK)
- return retval;
+ goto flash_lock;
uint8_t opt_bytes[16];
@@ -338,14 +341,14 @@ static int stm32x_write_options(struct flash_bank *bank)
* https://review.openocd.org/c/openocd/+/480
*/
retval = stm32x_write_block(bank, opt_bytes, STM32_OB_RDP, sizeof(opt_bytes) / 2);
- if (retval != ERROR_OK)
- return retval;
- retval = target_write_u32(target, STM32_FLASH_CR_B0, FLASH_LOCK);
- if (retval != ERROR_OK)
- return retval;
-
- return ERROR_OK;
+flash_lock:
+ {
+ int retval2 = target_write_u32(target, STM32_FLASH_CR_B0, FLASH_LOCK);
+ if (retval == ERROR_OK)
+ retval = retval2;
+ }
+ return retval;
}
static int stm32x_protect_check(struct flash_bank *bank)
@@ -389,31 +392,33 @@ static int stm32x_erase(struct flash_bank *bank, unsigned int first,
return retval;
retval = target_write_u32(target, stm32x_get_flash_reg(bank, STM32_FLASH_KEYR), KEY2);
if (retval != ERROR_OK)
- return retval;
+ goto flash_lock;
for (unsigned int i = first; i <= last; i++) {
retval = target_write_u32(target, stm32x_get_flash_reg(bank, STM32_FLASH_CR), FLASH_PER);
if (retval != ERROR_OK)
- return retval;
+ goto flash_lock;
retval = target_write_u32(target, stm32x_get_flash_reg(bank, STM32_FLASH_AR),
bank->base + bank->sectors[i].offset);
if (retval != ERROR_OK)
- return retval;
+ goto flash_lock;
retval = target_write_u32(target,
stm32x_get_flash_reg(bank, STM32_FLASH_CR), FLASH_PER | FLASH_STRT);
if (retval != ERROR_OK)
- return retval;
+ goto flash_lock;
retval = stm32x_wait_status_busy(bank, FLASH_ERASE_TIMEOUT);
if (retval != ERROR_OK)
- return retval;
+ goto flash_lock;
}
- retval = target_write_u32(target, stm32x_get_flash_reg(bank, STM32_FLASH_CR), FLASH_LOCK);
- if (retval != ERROR_OK)
- return retval;
-
- return ERROR_OK;
+flash_lock:
+ {
+ int retval2 = target_write_u32(target, stm32x_get_flash_reg(bank, STM32_FLASH_CR), FLASH_LOCK);
+ if (retval == ERROR_OK)
+ retval = retval2;
+ }
+ return retval;
}
static int stm32x_protect(struct flash_bank *bank, int set, unsigned int first,
@@ -1483,8 +1488,10 @@ COMMAND_HANDLER(stm32x_handle_options_load_command)
if (retval != ERROR_OK)
return retval;
retval = target_write_u32(target, stm32x_get_flash_reg(bank, STM32_FLASH_KEYR), KEY2);
- if (retval != ERROR_OK)
+ if (retval != ERROR_OK) {
+ (void)target_write_u32(target, stm32x_get_flash_reg(bank, STM32_FLASH_CR), FLASH_LOCK);
return retval;
+ }
/* force re-load of option bytes - generates software reset */
retval = target_write_u32(target, stm32x_get_flash_reg(bank, STM32_FLASH_CR), FLASH_OBL_LAUNCH);
@@ -1509,26 +1516,26 @@ static int stm32x_mass_erase(struct flash_bank *bank)
return retval;
retval = target_write_u32(target, stm32x_get_flash_reg(bank, STM32_FLASH_KEYR), KEY2);
if (retval != ERROR_OK)
- return retval;
+ goto flash_lock;
/* mass erase flash memory */
retval = target_write_u32(target, stm32x_get_flash_reg(bank, STM32_FLASH_CR), FLASH_MER);
if (retval != ERROR_OK)
- return retval;
+ goto flash_lock;
retval = target_write_u32(target, stm32x_get_flash_reg(bank, STM32_FLASH_CR),
FLASH_MER | FLASH_STRT);
if (retval != ERROR_OK)
- return retval;
+ goto flash_lock;
retval = stm32x_wait_status_busy(bank, FLASH_ERASE_TIMEOUT);
- if (retval != ERROR_OK)
- return retval;
- retval = target_write_u32(target, stm32x_get_flash_reg(bank, STM32_FLASH_CR), FLASH_LOCK);
- if (retval != ERROR_OK)
- return retval;
-
- return ERROR_OK;
+flash_lock:
+ {
+ int retval2 = target_write_u32(target, stm32x_get_flash_reg(bank, STM32_FLASH_CR), FLASH_LOCK);
+ if (retval == ERROR_OK)
+ retval = retval2;
+ }
+ return retval;
}
COMMAND_HANDLER(stm32x_handle_mass_erase_command)
-----------------------------------------------------------------------
Summary of changes:
src/flash/nor/stm32f1x.c | 85 ++++++++++++++++++++++++++----------------------
1 file changed, 46 insertions(+), 39 deletions(-)
hooks/post-receive
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Main OpenOCD repository
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From: OpenOCD-Gerrit <ope...@us...> - 2022-04-13 16:53:41
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
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- Log -----------------------------------------------------------------
commit b801452d42c189a13f6cc1ff769fc98bededc7c5
Author: Tomas Vanek <va...@fb...>
Date: Tue Nov 16 19:41:05 2021 +0100
flash/nor/stm32f1x: unify flash error reporting
stm32x_wait_status_busy() has two side effects in case of flash programming error:
- reports error
- clears error bit in status register
Use stm32x_wait_status_busy() to report also flash error during target
algo flash write.
While on it use more descriptive error codes in stm32x_wait_status_busy().
Change-Id: I6e1cffc2aa5411b918a23ed62d5194910888a9d1
Signed-off-by: Tomas Vanek <va...@fb...>
Reviewed-on: https://review.openocd.org/c/openocd/+/6709
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tar...@gm...>
diff --git a/src/flash/nor/stm32f1x.c b/src/flash/nor/stm32f1x.c
index f4b1daa56..26231e9cb 100644
--- a/src/flash/nor/stm32f1x.c
+++ b/src/flash/nor/stm32f1x.c
@@ -185,19 +185,19 @@ static int stm32x_wait_status_busy(struct flash_bank *bank, int timeout)
break;
if (timeout-- <= 0) {
LOG_ERROR("timed out waiting for flash");
- return ERROR_FAIL;
+ return ERROR_FLASH_BUSY;
}
alive_sleep(1);
}
if (status & FLASH_WRPRTERR) {
LOG_ERROR("stm32x device protected");
- retval = ERROR_FAIL;
+ retval = ERROR_FLASH_PROTECTED;
}
if (status & FLASH_PGERR) {
- LOG_ERROR("stm32x device programming failed");
- retval = ERROR_FAIL;
+ LOG_ERROR("stm32x device programming failed / flash not erased");
+ retval = ERROR_FLASH_OPERATION_FAILED;
}
/* Clear but report errors */
@@ -522,20 +522,18 @@ static int stm32x_write_block_async(struct flash_bank *bank, const uint8_t *buff
&armv7m_info);
if (retval == ERROR_FLASH_OPERATION_FAILED) {
- LOG_ERROR("flash write failed at address 0x%"PRIx32,
- buf_get_u32(reg_params[4].value, 0, 32));
-
- if (buf_get_u32(reg_params[0].value, 0, 32) & FLASH_PGERR) {
- LOG_ERROR("flash memory not erased before writing");
- /* Clear but report errors */
- target_write_u32(target, stm32x_get_flash_reg(bank, STM32_FLASH_SR), FLASH_PGERR);
- }
+ /* Actually we just need to check for programming errors
+ * stm32x_wait_status_busy also reports error and clears status bits.
+ *
+ * Target algo returns flash status in r0 only if properly finished.
+ * It is safer to re-read status register.
+ */
+ int retval2 = stm32x_wait_status_busy(bank, 5);
+ if (retval2 != ERROR_OK)
+ retval = retval2;
- if (buf_get_u32(reg_params[0].value, 0, 32) & FLASH_WRPRTERR) {
- LOG_ERROR("flash memory write protected");
- /* Clear but report errors */
- target_write_u32(target, stm32x_get_flash_reg(bank, STM32_FLASH_SR), FLASH_WRPRTERR);
- }
+ LOG_ERROR("flash write failed just before address 0x%"PRIx32,
+ buf_get_u32(reg_params[4].value, 0, 32));
}
for (unsigned int i = 0; i < ARRAY_SIZE(reg_params); i++)
-----------------------------------------------------------------------
Summary of changes:
src/flash/nor/stm32f1x.c | 32 +++++++++++++++-----------------
1 file changed, 15 insertions(+), 17 deletions(-)
hooks/post-receive
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From: OpenOCD-Gerrit <ope...@us...> - 2022-04-13 16:53:12
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
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- Log -----------------------------------------------------------------
commit e3f4ea0b574d952672d57792895a91065aa7a569
Author: Tomas Vanek <va...@fb...>
Date: Tue Nov 16 19:04:05 2021 +0100
flash/nor/stm32f1x: tidy up async algo supporting code
Use target_get_working_area_avail() instead of try-fail iteration.
Call destroy_reg_param() in a for cycle.
Change-Id: I1891d1ffdea99010c6ab66b9578400b9d7922e20
Signed-off-by: Tomas Vanek <va...@fb...>
Reviewed-on: https://review.openocd.org/c/openocd/+/6708
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tar...@gm...>
diff --git a/src/flash/nor/stm32f1x.c b/src/flash/nor/stm32f1x.c
index 664524b03..f4b1daa56 100644
--- a/src/flash/nor/stm32f1x.c
+++ b/src/flash/nor/stm32f1x.c
@@ -452,12 +452,11 @@ static int stm32x_write_block_async(struct flash_bank *bank, const uint8_t *buff
{
struct stm32x_flash_bank *stm32x_info = bank->driver_priv;
struct target *target = bank->target;
- uint32_t buffer_size = 16384;
+ uint32_t buffer_size;
struct working_area *write_algorithm;
struct working_area *source;
- struct reg_param reg_params[5];
struct armv7m_algorithm armv7m_info;
- int retval = ERROR_OK;
+ int retval;
static const uint8_t stm32x_flash_write_code[] = {
#include "../../../contrib/loaders/flash/stm32/stm32f1x.inc"
@@ -478,19 +477,28 @@ static int stm32x_write_block_async(struct flash_bank *bank, const uint8_t *buff
}
/* memory buffer */
- while (target_alloc_working_area_try(target, buffer_size, &source) != ERROR_OK) {
- buffer_size /= 2;
- buffer_size &= ~3UL; /* Make sure it's 4 byte aligned */
- if (buffer_size <= 256) {
- /* we already allocated the writing code, but failed to get a
- * buffer, free the algorithm */
- target_free_working_area(target, write_algorithm);
-
- LOG_WARNING("no large enough working area available, can't do block memory writes");
- return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
- }
+ buffer_size = target_get_working_area_avail(target);
+ buffer_size = MIN(hwords_count * 2, MAX(buffer_size, 256));
+ /* Normally we allocate all available working area.
+ * MIN shrinks buffer_size if the size of the written block is smaller.
+ * MAX prevents using async algo if the available working area is smaller
+ * than 256, the following allocation fails with
+ * ERROR_TARGET_RESOURCE_NOT_AVAILABLE and slow flashing takes place.
+ */
+
+ retval = target_alloc_working_area(target, buffer_size, &source);
+ /* Allocated size is always 32-bit word aligned */
+ if (retval != ERROR_OK) {
+ target_free_working_area(target, write_algorithm);
+ LOG_WARNING("no large enough working area available, can't do block memory writes");
+ /* target_alloc_working_area() may return ERROR_FAIL if area backup fails:
+ * convert any error to ERROR_TARGET_RESOURCE_NOT_AVAILABLE
+ */
+ return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
}
+ struct reg_param reg_params[5];
+
init_reg_param(®_params[0], "r0", 32, PARAM_IN_OUT); /* flash base (in), status (out) */
init_reg_param(®_params[1], "r1", 32, PARAM_OUT); /* count (halfword-16bit) */
init_reg_param(®_params[2], "r2", 32, PARAM_OUT); /* buffer start */
@@ -508,7 +516,7 @@ static int stm32x_write_block_async(struct flash_bank *bank, const uint8_t *buff
retval = target_run_flash_async_algorithm(target, buffer, hwords_count, 2,
0, NULL,
- 5, reg_params,
+ ARRAY_SIZE(reg_params), reg_params,
source->address, source->size,
write_algorithm->address, 0,
&armv7m_info);
@@ -530,15 +538,12 @@ static int stm32x_write_block_async(struct flash_bank *bank, const uint8_t *buff
}
}
+ for (unsigned int i = 0; i < ARRAY_SIZE(reg_params); i++)
+ destroy_reg_param(®_params[i]);
+
target_free_working_area(target, source);
target_free_working_area(target, write_algorithm);
- destroy_reg_param(®_params[0]);
- destroy_reg_param(®_params[1]);
- destroy_reg_param(®_params[2]);
- destroy_reg_param(®_params[3]);
- destroy_reg_param(®_params[4]);
-
return retval;
}
-----------------------------------------------------------------------
Summary of changes:
src/flash/nor/stm32f1x.c | 47 ++++++++++++++++++++++++++---------------------
1 file changed, 26 insertions(+), 21 deletions(-)
hooks/post-receive
--
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From: OpenOCD-Gerrit <ope...@us...> - 2022-04-13 16:52:41
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
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- Log -----------------------------------------------------------------
commit 10f933915d3234cda56f55752a14ec6c4734a6fd
Author: Tomas Vanek <va...@fb...>
Date: Tue Nov 16 18:26:53 2021 +0100
flash/nor/stm32f1x: remove write alignment code
Use flash infrastructure to ensure writes are halfword aligned.
Change-Id: Iddca3a256ace3486a23e1a9cb6a31c7a91ee58bf
Signed-off-by: Tomas Vanek <va...@fb...>
Reviewed-on: https://review.openocd.org/c/openocd/+/6707
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tar...@gm...>
diff --git a/src/flash/nor/stm32f1x.c b/src/flash/nor/stm32f1x.c
index 139f10ea8..664524b03 100644
--- a/src/flash/nor/stm32f1x.c
+++ b/src/flash/nor/stm32f1x.c
@@ -151,6 +151,9 @@ FLASH_BANK_COMMAND_HANDLER(stm32x_flash_bank_command)
stm32x_info->register_base = FLASH_REG_BASE_B0;
stm32x_info->user_bank_size = bank->size;
+ /* The flash write must be aligned to a halfword boundary */
+ bank->write_start_alignment = bank->write_end_alignment = 2;
+
return ERROR_OK;
}
@@ -548,6 +551,11 @@ static int stm32x_write_block(struct flash_bank *bank,
{
struct target *target = bank->target;
+ /* The flash write must be aligned to a halfword boundary.
+ * The flash infrastructure ensures it, do just a security check
+ */
+ assert(address % 2 == 0);
+
/* try using a block write - on ARM architecture or... */
int retval = stm32x_write_block_async(bank, buffer, address, hwords_count);
@@ -577,39 +585,24 @@ static int stm32x_write(struct flash_bank *bank, const uint8_t *buffer,
uint32_t offset, uint32_t count)
{
struct target *target = bank->target;
- uint8_t *new_buffer = NULL;
if (bank->target->state != TARGET_HALTED) {
LOG_ERROR("Target not halted");
return ERROR_TARGET_NOT_HALTED;
}
- if (offset & 0x1) {
- LOG_ERROR("offset 0x%" PRIx32 " breaks required 2-byte alignment", offset);
- return ERROR_FLASH_DST_BREAKS_ALIGNMENT;
- }
-
- /* If there's an odd number of bytes, the data has to be padded. Duplicate
- * the buffer and use the normal code path with a single block write since
- * it's probably cheaper than to special case the last odd write using
- * discrete accesses. */
- if (count & 1) {
- new_buffer = malloc(count + 1);
- if (!new_buffer) {
- LOG_ERROR("odd number of bytes to write and no memory for padding buffer");
- return ERROR_FAIL;
- }
- LOG_INFO("odd number of bytes to write, padding with 0xff");
- buffer = memcpy(new_buffer, buffer, count);
- new_buffer[count++] = 0xff;
- }
+ /* The flash write must be aligned to a halfword boundary.
+ * The flash infrastructure ensures it, do just a security check
+ */
+ assert(offset % 2 == 0);
+ assert(count % 2 == 0);
int retval, retval2;
/* unlock flash registers */
retval = target_write_u32(target, stm32x_get_flash_reg(bank, STM32_FLASH_KEYR), KEY1);
if (retval != ERROR_OK)
- goto cleanup;
+ return retval;
retval = target_write_u32(target, stm32x_get_flash_reg(bank, STM32_FLASH_KEYR), KEY2);
if (retval != ERROR_OK)
goto reset_pg_and_lock;
@@ -627,8 +620,6 @@ reset_pg_and_lock:
if (retval == ERROR_OK)
retval = retval2;
-cleanup:
- free(new_buffer);
return retval;
}
-----------------------------------------------------------------------
Summary of changes:
src/flash/nor/stm32f1x.c | 37 ++++++++++++++-----------------------
1 file changed, 14 insertions(+), 23 deletions(-)
hooks/post-receive
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From: OpenOCD-Gerrit <ope...@us...> - 2022-04-13 16:51:31
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via dd532e87c038ecd988b8bf83d6b1cf4515d5d2c9 (commit)
from 7c6d379cf4434c69a977af4f417fe1ab1f3f9178 (commit)
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- Log -----------------------------------------------------------------
commit dd532e87c038ecd988b8bf83d6b1cf4515d5d2c9
Author: Tomas Vanek <va...@fb...>
Date: Tue Nov 16 17:51:09 2021 +0100
flash/nor/stm32f1x: allow write fallback for flash options
Mostly refactoring.
Rename original stm32x_write_block() to stm32x_write_block_async()
as it uses target async algo.
Introduce new stm32x_write_block() and move slow, host controlled
fallback flash write there.
The change allows stm32x_write_options() to use slow flash write fallback.
While on it rename variables where halfword count is stored.
Change-Id: I386ae15cf052b1490461ed8f7eea5b4403d466f7
Signed-off-by: Tomas Vanek <va...@fb...>
Reviewed-on: https://review.openocd.org/c/openocd/+/6706
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tar...@gm...>
diff --git a/src/flash/nor/stm32f1x.c b/src/flash/nor/stm32f1x.c
index 6972bae2d..139f10ea8 100644
--- a/src/flash/nor/stm32f1x.c
+++ b/src/flash/nor/stm32f1x.c
@@ -131,7 +131,7 @@ struct stm32x_flash_bank {
static int stm32x_mass_erase(struct flash_bank *bank);
static int stm32x_get_device_id(struct flash_bank *bank, uint32_t *device_id);
static int stm32x_write_block(struct flash_bank *bank, const uint8_t *buffer,
- uint32_t address, uint32_t count);
+ uint32_t address, uint32_t hwords_count);
/* flash bank stm32x <base> <size> 0 0 <target#>
*/
@@ -329,12 +329,14 @@ static int stm32x_write_options(struct flash_bank *bank)
target_buffer_set_u16(target, opt_bytes + 12, (stm32x_info->option_bytes.protection >> 16) & 0xff);
target_buffer_set_u16(target, opt_bytes + 14, (stm32x_info->option_bytes.protection >> 24) & 0xff);
+ /* Block write is preferred in favour of operation with ancient ST-Link
+ * firmwares without 16-bit memory access. See
+ * 480: flash: stm32f1x: write option bytes using the loader
+ * https://review.openocd.org/c/openocd/+/480
+ */
retval = stm32x_write_block(bank, opt_bytes, STM32_OB_RDP, sizeof(opt_bytes) / 2);
- if (retval != ERROR_OK) {
- if (retval == ERROR_TARGET_RESOURCE_NOT_AVAILABLE)
- LOG_ERROR("working area required to erase options bytes");
+ if (retval != ERROR_OK)
return retval;
- }
retval = target_write_u32(target, STM32_FLASH_CR_B0, FLASH_LOCK);
if (retval != ERROR_OK)
@@ -442,8 +444,8 @@ static int stm32x_protect(struct flash_bank *bank, int set, unsigned int first,
return stm32x_write_options(bank);
}
-static int stm32x_write_block(struct flash_bank *bank, const uint8_t *buffer,
- uint32_t address, uint32_t count)
+static int stm32x_write_block_async(struct flash_bank *bank, const uint8_t *buffer,
+ uint32_t address, uint32_t hwords_count)
{
struct stm32x_flash_bank *stm32x_info = bank->driver_priv;
struct target *target = bank->target;
@@ -493,7 +495,7 @@ static int stm32x_write_block(struct flash_bank *bank, const uint8_t *buffer,
init_reg_param(®_params[4], "r4", 32, PARAM_IN_OUT); /* target address */
buf_set_u32(reg_params[0].value, 0, 32, stm32x_info->register_base);
- buf_set_u32(reg_params[1].value, 0, 32, count);
+ buf_set_u32(reg_params[1].value, 0, 32, hwords_count);
buf_set_u32(reg_params[2].value, 0, 32, source->address);
buf_set_u32(reg_params[3].value, 0, 32, source->address + source->size);
buf_set_u32(reg_params[4].value, 0, 32, address);
@@ -501,7 +503,7 @@ static int stm32x_write_block(struct flash_bank *bank, const uint8_t *buffer,
armv7m_info.common_magic = ARMV7M_COMMON_MAGIC;
armv7m_info.core_mode = ARM_MODE_THREAD;
- retval = target_run_flash_async_algorithm(target, buffer, count, 2,
+ retval = target_run_flash_async_algorithm(target, buffer, hwords_count, 2,
0, NULL,
5, reg_params,
source->address, source->size,
@@ -537,6 +539,40 @@ static int stm32x_write_block(struct flash_bank *bank, const uint8_t *buffer,
return retval;
}
+/** Writes a block to flash either using target algorithm
+ * or use fallback, host controlled halfword-by-halfword access.
+ * Flash controller must be unlocked before this call.
+ */
+static int stm32x_write_block(struct flash_bank *bank,
+ const uint8_t *buffer, uint32_t address, uint32_t hwords_count)
+{
+ struct target *target = bank->target;
+
+ /* try using a block write - on ARM architecture or... */
+ int retval = stm32x_write_block_async(bank, buffer, address, hwords_count);
+
+ if (retval == ERROR_TARGET_RESOURCE_NOT_AVAILABLE) {
+ /* if block write failed (no sufficient working area),
+ * we use normal (slow) single halfword accesses */
+ LOG_WARNING("couldn't use block writes, falling back to single memory accesses");
+
+ while (hwords_count > 0) {
+ retval = target_write_memory(target, address, 2, 1, buffer);
+ if (retval != ERROR_OK)
+ return retval;
+
+ retval = stm32x_wait_status_busy(bank, 5);
+ if (retval != ERROR_OK)
+ return retval;
+
+ hwords_count--;
+ buffer += 2;
+ address += 2;
+ }
+ }
+ return retval;
+}
+
static int stm32x_write(struct flash_bank *bank, const uint8_t *buffer,
uint32_t offset, uint32_t count)
{
@@ -568,7 +604,6 @@ static int stm32x_write(struct flash_bank *bank, const uint8_t *buffer,
new_buffer[count++] = 0xff;
}
- uint32_t words_remaining = count / 2;
int retval, retval2;
/* unlock flash registers */
@@ -577,34 +612,15 @@ static int stm32x_write(struct flash_bank *bank, const uint8_t *buffer,
goto cleanup;
retval = target_write_u32(target, stm32x_get_flash_reg(bank, STM32_FLASH_KEYR), KEY2);
if (retval != ERROR_OK)
- goto cleanup;
+ goto reset_pg_and_lock;
+ /* enable flash programming */
retval = target_write_u32(target, stm32x_get_flash_reg(bank, STM32_FLASH_CR), FLASH_PG);
if (retval != ERROR_OK)
- goto cleanup;
-
- /* try using a block write */
- retval = stm32x_write_block(bank, buffer, bank->base + offset, words_remaining);
-
- if (retval == ERROR_TARGET_RESOURCE_NOT_AVAILABLE) {
- /* if block write failed (no sufficient working area),
- * we use normal (slow) single halfword accesses */
- LOG_WARNING("couldn't use block writes, falling back to single memory accesses");
-
- while (words_remaining > 0) {
- retval = target_write_memory(target, bank->base + offset, 2, 1, buffer);
- if (retval != ERROR_OK)
- goto reset_pg_and_lock;
-
- retval = stm32x_wait_status_busy(bank, 5);
- if (retval != ERROR_OK)
- goto reset_pg_and_lock;
+ goto reset_pg_and_lock;
- words_remaining--;
- buffer += 2;
- offset += 2;
- }
- }
+ /* write to flash */
+ retval = stm32x_write_block(bank, buffer, bank->base + offset, count / 2);
reset_pg_and_lock:
retval2 = target_write_u32(target, stm32x_get_flash_reg(bank, STM32_FLASH_CR), FLASH_LOCK);
-----------------------------------------------------------------------
Summary of changes:
src/flash/nor/stm32f1x.c | 84 ++++++++++++++++++++++++++++--------------------
1 file changed, 50 insertions(+), 34 deletions(-)
hooks/post-receive
--
Main OpenOCD repository
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From: OpenOCD-Gerrit <ope...@us...> - 2022-04-03 20:15:03
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 7c6d379cf4434c69a977af4f417fe1ab1f3f9178 (commit)
from c3b9ae6977a5c1c5d3252ea430ed19d0fc98fde7 (commit)
Those revisions listed above that are new to this repository have
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- Log -----------------------------------------------------------------
commit 7c6d379cf4434c69a977af4f417fe1ab1f3f9178
Author: Marc Schink <de...@za...>
Date: Fri Mar 25 16:22:16 2022 +0100
tcl/board: Add NXP FRDM-K64F
Change-Id: I4b8fbfb2948c4295c2a34d641dd59a73c512d9fa
Signed-off-by: Marc Schink <de...@za...>
Reviewed-on: https://review.openocd.org/c/openocd/+/6884
Tested-by: jenkins
Reviewed-by: Antonio Borneo <bor...@gm...>
Reviewed-by: Tomas Vanek <va...@fb...>
diff --git a/tcl/board/nxp_frdm-k64f.cfg b/tcl/board/nxp_frdm-k64f.cfg
new file mode 100644
index 000000000..1581c9594
--- /dev/null
+++ b/tcl/board/nxp_frdm-k64f.cfg
@@ -0,0 +1,15 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
+# This is an NXP Freedom eval board with a single MK64FN1M0VLL12 chip.
+# https://www.nxp.com/design/development-boards/freedom-development-boards/mcu-boards/freedom-development-platform-for-kinetis-k64-k63-and-k24-mcus:FRDM-K64F
+#
+
+source [find interface/cmsis-dap.cfg]
+
+# Set working area to 16 KiB
+set WORKAREASIZE 0x4000
+
+set CHIPNAME k64f
+reset_config srst_only
+
+source [find target/kx.cfg]
-----------------------------------------------------------------------
Summary of changes:
tcl/board/nxp_frdm-k64f.cfg | 15 +++++++++++++++
1 file changed, 15 insertions(+)
create mode 100644 tcl/board/nxp_frdm-k64f.cfg
hooks/post-receive
--
Main OpenOCD repository
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From: OpenOCD-Gerrit <ope...@us...> - 2022-04-03 20:13:11
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via c3b9ae6977a5c1c5d3252ea430ed19d0fc98fde7 (commit)
from f0d8c3b0e024d045262ba50a516a3bd66bf22686 (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
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- Log -----------------------------------------------------------------
commit c3b9ae6977a5c1c5d3252ea430ed19d0fc98fde7
Author: Marc Schink <de...@za...>
Date: Fri Mar 25 16:08:56 2022 +0100
drivers/cmsis-dap: Remove stray whitespace
Change-Id: I7b60f9e87af2f582864ce94198d0343acf7d45f2
Signed-off-by: Marc Schink <de...@za...>
Reviewed-on: https://review.openocd.org/c/openocd/+/6883
Reviewed-by: Tomas Vanek <va...@fb...>
Tested-by: jenkins
diff --git a/src/jtag/drivers/cmsis_dap.c b/src/jtag/drivers/cmsis_dap.c
index 4621fdc99..63407be42 100644
--- a/src/jtag/drivers/cmsis_dap.c
+++ b/src/jtag/drivers/cmsis_dap.c
@@ -209,7 +209,7 @@ static bool swd_mode;
* None as yet... */
static const char * const info_caps_str[INFO_CAPS__NUM_CAPS] = {
- "SWD supported",
+ "SWD supported",
"JTAG supported",
"SWO-UART supported",
"SWO-MANCHESTER supported",
-----------------------------------------------------------------------
Summary of changes:
src/jtag/drivers/cmsis_dap.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
hooks/post-receive
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From: OpenOCD-Gerrit <ope...@us...> - 2022-04-03 20:12:36
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via f0d8c3b0e024d045262ba50a516a3bd66bf22686 (commit)
from 017d3ddafbfac459a799f7e60613312c61fa3195 (commit)
Those revisions listed above that are new to this repository have
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- Log -----------------------------------------------------------------
commit f0d8c3b0e024d045262ba50a516a3bd66bf22686
Author: Gabor Csapo <gab...@go...>
Date: Fri Mar 18 18:11:49 2022 +0800
libusb_helper.h: Increase USB timeout
When we debug a target that works as a USB device, halting
the target causes the USB communication with the USB host to
become unresponsive. The host will try to reconnect/reset/setup
the unresponsive device during which communication with other
devices on the same USB bus can get stalled for several seconds.
If the JTAG adapter is on the same bus, we need to make sure
openOCD will wait for packets at least as long as the host USB
stack. Otherwise the USB stack might deliver a valid packet, but
openOCD would ignore it due to the timeout. The xHCI spec uses 5
sec timeouts, so let's use that in openOCD with some margin.
Use this value in all libusb calls. HID API might have a libusb
backend and would probably be victim to the same bug, so it
should use this timeout, too.
Ticket: https://sourceforge.net/p/openocd/tickets/343/
Signed-off-by: Gabor Csapo <gab...@go...>
Change-Id: Ia3dc1356e676fe550f57a4c72f7a24ba296b6af2
Reviewed-on: https://review.openocd.org/c/openocd/+/6882
Tested-by: jenkins
Reviewed-by: Antonio Borneo <bor...@gm...>
diff --git a/src/jtag/drivers/cmsis_dap.c b/src/jtag/drivers/cmsis_dap.c
index e7562d087..4621fdc99 100644
--- a/src/jtag/drivers/cmsis_dap.c
+++ b/src/jtag/drivers/cmsis_dap.c
@@ -48,6 +48,7 @@
#include <target/cortex_m.h>
#include "cmsis_dap.h"
+#include "libusb_helper.h"
static const struct cmsis_dap_backend *const cmsis_dap_backends[] = {
#if BUILD_CMSIS_DAP_USB == 1
@@ -79,8 +80,6 @@ static uint16_t cmsis_dap_pid[MAX_USB_IDS + 1] = { 0 };
static int cmsis_dap_backend = -1;
static bool swd_mode;
-#define USB_TIMEOUT 1000
-
/* CMSIS-DAP General Commands */
#define CMD_DAP_INFO 0x00
#define CMD_DAP_LED 0x01
@@ -360,12 +359,12 @@ static int cmsis_dap_xfer(struct cmsis_dap *dap, int txlen)
}
uint8_t current_cmd = cmsis_dap_handle->command[0];
- int retval = dap->backend->write(dap, txlen, USB_TIMEOUT);
+ int retval = dap->backend->write(dap, txlen, LIBUSB_TIMEOUT_MS);
if (retval < 0)
return retval;
/* get reply */
- retval = dap->backend->read(dap, USB_TIMEOUT);
+ retval = dap->backend->read(dap, LIBUSB_TIMEOUT_MS);
if (retval < 0)
return retval;
@@ -826,7 +825,7 @@ static void cmsis_dap_swd_write_from_queue(struct cmsis_dap *dap)
}
}
- int retval = dap->backend->write(dap, idx, USB_TIMEOUT);
+ int retval = dap->backend->write(dap, idx, LIBUSB_TIMEOUT_MS);
if (retval < 0) {
queued_retval = retval;
goto skip;
@@ -854,7 +853,7 @@ static void cmsis_dap_swd_read_process(struct cmsis_dap *dap, int timeout_ms)
/* get reply */
int retval = dap->backend->read(dap, timeout_ms);
- if (retval == ERROR_TIMEOUT_REACHED && timeout_ms < USB_TIMEOUT)
+ if (retval == ERROR_TIMEOUT_REACHED && timeout_ms < LIBUSB_TIMEOUT_MS)
return;
if (retval <= 0) {
@@ -929,7 +928,7 @@ static int cmsis_dap_swd_run_queue(void)
cmsis_dap_swd_write_from_queue(cmsis_dap_handle);
while (pending_fifo_block_count)
- cmsis_dap_swd_read_process(cmsis_dap_handle, USB_TIMEOUT);
+ cmsis_dap_swd_read_process(cmsis_dap_handle, LIBUSB_TIMEOUT_MS);
pending_fifo_put_idx = 0;
pending_fifo_get_idx = 0;
@@ -953,7 +952,7 @@ static void cmsis_dap_swd_queue_cmd(uint8_t cmd, uint32_t *dst, uint32_t data)
cmsis_dap_swd_write_from_queue(cmsis_dap_handle);
if (pending_fifo_block_count >= cmsis_dap_handle->packet_count)
- cmsis_dap_swd_read_process(cmsis_dap_handle, USB_TIMEOUT);
+ cmsis_dap_swd_read_process(cmsis_dap_handle, LIBUSB_TIMEOUT_MS);
}
if (queued_retval != ERROR_OK)
diff --git a/src/jtag/drivers/libusb_helper.h b/src/jtag/drivers/libusb_helper.h
index 2ddb246b3..9d51464a7 100644
--- a/src/jtag/drivers/libusb_helper.h
+++ b/src/jtag/drivers/libusb_helper.h
@@ -22,6 +22,20 @@
#include <libusb.h>
+/* When we debug a target that works as a USB device, halting the target causes the
+ * USB communication with the USB host to become unresponsive. The host will try
+ * to reconnect/reset/setup the unresponsive device during which communication
+ * with other devices on the same USB bus can get stalled for several seconds.
+ * If the JTAG adapter is on the same bus, we need to make sure openOCD will wait
+ * for packets at least as long as the host USB stack. Otherwise the USB stack
+ * might deliver a valid packet, but openOCD would ignore it due to the timeout.
+ * The xHCI spec uses 5 sec timeouts, so let's use that in openOCD with some margin.
+ *
+ * Use this value in all libusb calls. HID API might have a libusb backend and
+ * would probably be victim to the same bug, so it should use this timeout, too.
+ */
+#define LIBUSB_TIMEOUT_MS (6000)
+
/* this callback should return a non NULL value only when the serial could not
* be retrieved by the standard 'libusb_get_string_descriptor_ascii' */
typedef char * (*adapter_get_alternate_serial_fn)(struct libusb_device_handle *device,
diff --git a/src/jtag/drivers/nulink_usb.c b/src/jtag/drivers/nulink_usb.c
index d4b8b53bc..84a4420e8 100644
--- a/src/jtag/drivers/nulink_usb.c
+++ b/src/jtag/drivers/nulink_usb.c
@@ -33,7 +33,9 @@
#include <hidapi.h>
-#define NULINK_READ_TIMEOUT 1000
+#include "libusb_helper.h"
+
+#define NULINK_READ_TIMEOUT LIBUSB_TIMEOUT_MS
#define NULINK_HID_MAX_SIZE (64)
#define NULINK2_HID_MAX_SIZE (1024)
diff --git a/src/jtag/drivers/rlink.c b/src/jtag/drivers/rlink.c
index 73be3c57e..0cf9dbbb2 100644
--- a/src/jtag/drivers/rlink.c
+++ b/src/jtag/drivers/rlink.c
@@ -59,8 +59,6 @@
#define USB_EP2IN_SIZE (USB_EP2OUT_SIZE)
#define USB_EP2BANK_SIZE (512)
-#define USB_TIMEOUT_MS (3 * 1000)
-
#define DTC_STATUS_POLL_BYTE (ST7_USB_BUF_EP0OUT + 0xff)
#define ST7_PD_NBUSY_LED ST7_PD0
@@ -133,7 +131,7 @@ static int ep1_generic_commandl(struct libusb_device_handle *hdev_param, size_t
hdev_param,
USB_EP1OUT_ADDR,
(char *)usb_buffer, sizeof(usb_buffer),
- USB_TIMEOUT_MS,
+ LIBUSB_TIMEOUT_MS,
&transferred
);
@@ -176,7 +174,7 @@ static ssize_t ep1_memory_read(
usb_ret = jtag_libusb_bulk_write(
hdev_param, USB_EP1OUT_ADDR,
(char *)usb_buffer, sizeof(usb_buffer),
- USB_TIMEOUT_MS,
+ LIBUSB_TIMEOUT_MS,
&transferred
);
@@ -186,7 +184,7 @@ static ssize_t ep1_memory_read(
usb_ret = jtag_libusb_bulk_read(
hdev_param, USB_EP1IN_ADDR,
(char *)buffer, length,
- USB_TIMEOUT_MS,
+ LIBUSB_TIMEOUT_MS,
&transferred
);
@@ -241,7 +239,7 @@ static ssize_t ep1_memory_write(struct libusb_device_handle *hdev_param, uint16_
usb_ret = jtag_libusb_bulk_write(
hdev_param, USB_EP1OUT_ADDR,
(char *)usb_buffer, sizeof(usb_buffer),
- USB_TIMEOUT_MS,
+ LIBUSB_TIMEOUT_MS,
&transferred
);
@@ -432,7 +430,7 @@ static int dtc_start_download(void)
usb_err = jtag_libusb_bulk_read(
hdev, USB_EP1IN_ADDR,
(char *)&ep2txr, 1,
- USB_TIMEOUT_MS,
+ LIBUSB_TIMEOUT_MS,
&transferred
);
if (usb_err != ERROR_OK)
@@ -462,7 +460,7 @@ static int dtc_start_download(void)
usb_err = jtag_libusb_bulk_read(
hdev, USB_EP1IN_ADDR,
(char *)&ep2txr, 1,
- USB_TIMEOUT_MS,
+ LIBUSB_TIMEOUT_MS,
&transferred
);
@@ -488,7 +486,7 @@ static int dtc_run_download(
hdev_param,
USB_EP2OUT_ADDR,
(char *)command_buffer, USB_EP2BANK_SIZE,
- USB_TIMEOUT_MS,
+ LIBUSB_TIMEOUT_MS,
&transferred
);
if (usb_err < 0)
@@ -512,7 +510,7 @@ static int dtc_run_download(
hdev_param,
USB_EP1IN_ADDR,
&dtc_status, 1,
- USB_TIMEOUT_MS,
+ LIBUSB_TIMEOUT_MS,
&transferred
);
if (usb_err < 0)
@@ -533,7 +531,7 @@ static int dtc_run_download(
hdev_param,
USB_EP2IN_ADDR,
(char *)reply_buffer, reply_buffer_size,
- USB_TIMEOUT_MS,
+ LIBUSB_TIMEOUT_MS,
&transferred
);
@@ -954,7 +952,7 @@ static void rlink_reset(int trst, int srst)
usb_err = jtag_libusb_bulk_read(
hdev, USB_EP1IN_ADDR,
(char *)&bitmap, 1,
- USB_TIMEOUT_MS,
+ LIBUSB_TIMEOUT_MS,
&transferred
);
if (usb_err != ERROR_OK || transferred < 1) {
@@ -990,7 +988,7 @@ static void rlink_reset(int trst, int srst)
usb_err = jtag_libusb_bulk_read(
hdev, USB_EP1IN_ADDR,
(char *)&bitmap, 1,
- USB_TIMEOUT_MS,
+ LIBUSB_TIMEOUT_MS,
&transferred
);
if (usb_err != ERROR_OK || transferred < 1) {
@@ -1021,7 +1019,7 @@ static void rlink_reset(int trst, int srst)
usb_err = jtag_libusb_bulk_read(
hdev, USB_EP1IN_ADDR,
(char *)&bitmap, 1,
- USB_TIMEOUT_MS,
+ LIBUSB_TIMEOUT_MS,
&transferred
);
if (usb_err != ERROR_OK || transferred < 1) {
@@ -1576,7 +1574,7 @@ static int rlink_init(void)
jtag_libusb_bulk_read(
hdev, USB_EP1IN_ADDR,
(char *)reply_buffer, 1,
- USB_TIMEOUT_MS,
+ LIBUSB_TIMEOUT_MS,
&transferred
);
@@ -1601,7 +1599,7 @@ static int rlink_init(void)
jtag_libusb_bulk_read(
hdev, USB_EP1IN_ADDR,
(char *)reply_buffer, 1,
- USB_TIMEOUT_MS,
+ LIBUSB_TIMEOUT_MS,
&transferred
);
diff --git a/src/jtag/drivers/stlink_usb.c b/src/jtag/drivers/stlink_usb.c
index 325848f86..2785d9b96 100644
--- a/src/jtag/drivers/stlink_usb.c
+++ b/src/jtag/drivers/stlink_usb.c
@@ -71,8 +71,8 @@
#define ENDPOINT_IN 0x80
#define ENDPOINT_OUT 0x00
-#define STLINK_WRITE_TIMEOUT 1000
-#define STLINK_READ_TIMEOUT 1000
+#define STLINK_WRITE_TIMEOUT (LIBUSB_TIMEOUT_MS)
+#define STLINK_READ_TIMEOUT (LIBUSB_TIMEOUT_MS)
#define STLINK_RX_EP (1|ENDPOINT_IN)
#define STLINK_TX_EP (2|ENDPOINT_OUT)
diff --git a/src/jtag/drivers/ti_icdi_usb.c b/src/jtag/drivers/ti_icdi_usb.c
index c94a1102f..e48d0e269 100644
--- a/src/jtag/drivers/ti_icdi_usb.c
+++ b/src/jtag/drivers/ti_icdi_usb.c
@@ -37,8 +37,8 @@
#define ICDI_WRITE_ENDPOINT 0x02
#define ICDI_READ_ENDPOINT 0x83
-#define ICDI_WRITE_TIMEOUT 1000
-#define ICDI_READ_TIMEOUT 1000
+#define ICDI_WRITE_TIMEOUT (LIBUSB_TIMEOUT_MS)
+#define ICDI_READ_TIMEOUT (LIBUSB_TIMEOUT_MS)
#define ICDI_PACKET_SIZE 2048
#define PACKET_START "$"
diff --git a/src/jtag/drivers/ulink.c b/src/jtag/drivers/ulink.c
index 20a036a78..50609a64b 100644
--- a/src/jtag/drivers/ulink.c
+++ b/src/jtag/drivers/ulink.c
@@ -56,9 +56,6 @@
/** USB interface number */
#define USB_INTERFACE 0
-/** libusb timeout in ms */
-#define USB_TIMEOUT 5000
-
/** Delay (in microseconds) to wait while EZ-USB performs ReNumeration. */
#define ULINK_RENUMERATION_DELAY 1500000
@@ -335,7 +332,7 @@ static int ulink_cpu_reset(struct ulink *device, unsigned char reset_bit)
ret = libusb_control_transfer(device->usb_device_handle,
(LIBUSB_ENDPOINT_OUT | LIBUSB_REQUEST_TYPE_VENDOR | LIBUSB_RECIPIENT_DEVICE),
- REQUEST_FIRMWARE_LOAD, CPUCS_REG, 0, &reset_bit, 1, USB_TIMEOUT);
+ REQUEST_FIRMWARE_LOAD, CPUCS_REG, 0, &reset_bit, 1, LIBUSB_TIMEOUT_MS);
/* usb_control_msg() returns the number of bytes transferred during the
* DATA stage of the control transfer - must be exactly 1 in this case! */
@@ -478,7 +475,7 @@ static int ulink_write_firmware_section(struct ulink *device,
ret = libusb_control_transfer(device->usb_device_handle,
(LIBUSB_ENDPOINT_OUT | LIBUSB_REQUEST_TYPE_VENDOR | LIBUSB_RECIPIENT_DEVICE),
REQUEST_FIRMWARE_LOAD, addr, FIRMWARE_ADDR, (unsigned char *)data_ptr,
- chunk_size, USB_TIMEOUT);
+ chunk_size, LIBUSB_TIMEOUT_MS);
if (ret != (int)chunk_size) {
/* Abort if libusb sent less data than requested */
@@ -662,7 +659,7 @@ static int ulink_append_queue(struct ulink *device, struct ulink_cmd *ulink_cmd)
if ((newsize_out > 64) || (newsize_in > 64)) {
/* New command does not fit. Execute all commands in queue before starting
* new queue with the current command as first entry. */
- ret = ulink_execute_queued_commands(device, USB_TIMEOUT);
+ ret = ulink_execute_queued_commands(device, LIBUSB_TIMEOUT_MS);
if (ret == ERROR_OK)
ret = ulink_post_process_queue(device);
@@ -1960,7 +1957,7 @@ static int ulink_execute_queue(void)
}
if (ulink_handle->commands_in_queue > 0) {
- ret = ulink_execute_queued_commands(ulink_handle, USB_TIMEOUT);
+ ret = ulink_execute_queued_commands(ulink_handle, LIBUSB_TIMEOUT_MS);
if (ret != ERROR_OK)
return ret;
-----------------------------------------------------------------------
Summary of changes:
src/jtag/drivers/cmsis_dap.c | 15 +++++++--------
src/jtag/drivers/libusb_helper.h | 14 ++++++++++++++
src/jtag/drivers/nulink_usb.c | 4 +++-
src/jtag/drivers/rlink.c | 30 ++++++++++++++----------------
src/jtag/drivers/stlink_usb.c | 4 ++--
src/jtag/drivers/ti_icdi_usb.c | 4 ++--
src/jtag/drivers/ulink.c | 11 ++++-------
7 files changed, 46 insertions(+), 36 deletions(-)
hooks/post-receive
--
Main OpenOCD repository
|
|
From: OpenOCD-Gerrit <ope...@us...> - 2022-04-03 20:12:08
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 017d3ddafbfac459a799f7e60613312c61fa3195 (commit)
from 6c9dd1c6ba9fba806ed7ed6f6ecb59723beb9cad (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit 017d3ddafbfac459a799f7e60613312c61fa3195
Author: Jan Matyas <ma...@co...>
Date: Thu Mar 17 14:27:58 2022 +0100
gdb_server: Improve logging of GDB-remote packets
- Print also the target name, not just the packet contents.
This is important when there are more GDB servers (more
debug-able targets) active in one OpenOCD session.
- Log also the received Ctrl-C requests coming from GDB
(one byte 0x3), ACKs ("+") and NACKs ("-").
- Do not print zero-length incoming packets (this occurred
when Ctrl-C packets were received).
- Removed a stray apostrophe "'" that got printed
in gdb_log_outgoing_packet()
Signed-off-by: Jan Matyas <ma...@co...>
Change-Id: If68fe0a8aa635165d0bbe6fa0e48a4645a02da67
Reviewed-on: https://review.openocd.org/c/openocd/+/6879
Tested-by: jenkins
Reviewed-by: Antonio Borneo <bor...@gm...>
diff --git a/src/server/gdb_server.c b/src/server/gdb_server.c
index f5736196e..82c8ce92b 100644
--- a/src/server/gdb_server.c
+++ b/src/server/gdb_server.c
@@ -371,11 +371,13 @@ static int gdb_write(struct connection *connection, void *data, int len)
return ERROR_SERVER_REMOTE_CLOSED;
}
-static void gdb_log_incoming_packet(char *packet)
+static void gdb_log_incoming_packet(struct connection *connection, char *packet)
{
if (!LOG_LEVEL_IS(LOG_LVL_DEBUG))
return;
+ struct target *target = get_target_from_connection(connection);
+
/* Avoid dumping non-printable characters to the terminal */
const unsigned packet_len = strlen(packet);
const char *nonprint = find_nonprint_char(packet, packet_len);
@@ -389,25 +391,31 @@ static void gdb_log_incoming_packet(char *packet)
if (packet_prefix_printable) {
const unsigned int prefix_len = colon - packet + 1; /* + 1 to include the ':' */
const unsigned int payload_len = packet_len - prefix_len;
- LOG_DEBUG("received packet: %.*s<binary-data-%u-bytes>", prefix_len, packet, payload_len);
+ LOG_TARGET_DEBUG(target, "received packet: %.*s<binary-data-%u-bytes>", prefix_len,
+ packet, payload_len);
} else {
- LOG_DEBUG("received packet: <binary-data-%u-bytes>", packet_len);
+ LOG_TARGET_DEBUG(target, "received packet: <binary-data-%u-bytes>", packet_len);
}
} else {
/* All chars printable, dump the packet as is */
- LOG_DEBUG("received packet: %s", packet);
+ LOG_TARGET_DEBUG(target, "received packet: %s", packet);
}
}
-static void gdb_log_outgoing_packet(char *packet_buf, unsigned int packet_len, unsigned char checksum)
+static void gdb_log_outgoing_packet(struct connection *connection, char *packet_buf,
+ unsigned int packet_len, unsigned char checksum)
{
if (!LOG_LEVEL_IS(LOG_LVL_DEBUG))
return;
+ struct target *target = get_target_from_connection(connection);
+
if (find_nonprint_char(packet_buf, packet_len))
- LOG_DEBUG("sending packet: $<binary-data-%u-bytes>#%2.2x", packet_len, checksum);
+ LOG_TARGET_DEBUG(target, "sending packet: $<binary-data-%u-bytes>#%2.2x",
+ packet_len, checksum);
else
- LOG_DEBUG("sending packet: $%.*s#%2.2x'", packet_len, packet_buf, checksum);
+ LOG_TARGET_DEBUG(target, "sending packet: $%.*s#%2.2x", packet_len, packet_buf,
+ checksum);
}
static int gdb_put_packet_inner(struct connection *connection,
@@ -450,7 +458,7 @@ static int gdb_put_packet_inner(struct connection *connection,
#endif
while (1) {
- gdb_log_outgoing_packet(buffer, len, my_checksum);
+ gdb_log_outgoing_packet(connection, buffer, len, my_checksum);
char local_buffer[1024];
local_buffer[0] = '$';
@@ -483,22 +491,27 @@ static int gdb_put_packet_inner(struct connection *connection,
if (retval != ERROR_OK)
return retval;
- if (reply == '+')
+ if (reply == '+') {
+ gdb_log_incoming_packet(connection, "+");
break;
- else if (reply == '-') {
+ } else if (reply == '-') {
/* Stop sending output packets for now */
gdb_con->output_flag = GDB_OUTPUT_NO;
+ gdb_log_incoming_packet(connection, "-");
LOG_WARNING("negative reply, retrying");
} else if (reply == 0x3) {
gdb_con->ctrl_c = true;
+ gdb_log_incoming_packet(connection, "<Ctrl-C>");
retval = gdb_get_char(connection, &reply);
if (retval != ERROR_OK)
return retval;
- if (reply == '+')
+ if (reply == '+') {
+ gdb_log_incoming_packet(connection, "+");
break;
- else if (reply == '-') {
+ } else if (reply == '-') {
/* Stop sending output packets for now */
gdb_con->output_flag = GDB_OUTPUT_NO;
+ gdb_log_incoming_packet(connection, "-");
LOG_WARNING("negative reply, retrying");
} else if (reply == '$') {
LOG_ERROR("GDB missing ack(1) - assumed good");
@@ -675,6 +688,7 @@ static int gdb_get_packet_inner(struct connection *connection,
case '$':
break;
case '+':
+ gdb_log_incoming_packet(connection, "+");
/* According to the GDB documentation
* (https://sourceware.org/gdb/onlinedocs/gdb/Packet-Acknowledgment.html):
* "gdb sends a final `+` acknowledgment of the stub's `OK`
@@ -692,9 +706,11 @@ static int gdb_get_packet_inner(struct connection *connection,
}
break;
case '-':
+ gdb_log_incoming_packet(connection, "-");
LOG_WARNING("negative acknowledgment, but no packet pending");
break;
case 0x3:
+ gdb_log_incoming_packet(connection, "<Ctrl-C>");
gdb_con->ctrl_c = true;
*len = 0;
return ERROR_OK;
@@ -3452,9 +3468,10 @@ static int gdb_input_inner(struct connection *connection)
/* terminate with zero */
gdb_packet_buffer[packet_size] = '\0';
- gdb_log_incoming_packet(gdb_packet_buffer);
-
if (packet_size > 0) {
+
+ gdb_log_incoming_packet(connection, gdb_packet_buffer);
+
retval = ERROR_OK;
switch (packet[0]) {
case 'T': /* Is thread alive? */
-----------------------------------------------------------------------
Summary of changes:
src/server/gdb_server.c | 45 +++++++++++++++++++++++++++++++--------------
1 file changed, 31 insertions(+), 14 deletions(-)
hooks/post-receive
--
Main OpenOCD repository
|
|
From: OpenOCD-Gerrit <ope...@us...> - 2022-03-26 13:36:40
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 6c9dd1c6ba9fba806ed7ed6f6ecb59723beb9cad (commit)
from 3fa695be2401c88dbd93b2c9dad1c098a948c4ca (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit 6c9dd1c6ba9fba806ed7ed6f6ecb59723beb9cad
Author: Antonio Borneo <bor...@gm...>
Date: Thu Feb 24 11:30:56 2022 +0100
helper/bits: add BIT_ULL and GENMASK macros
To support 64 bits bit and masks
Replace local definition of BIT in rtos/chromium-ec
Change-Id: I1f268d6e8790f1b07bf798680b797878ce81064b
Signed-off-by: Antonio Borneo <bor...@gm...>
Reviewed-on: https://review.openocd.org/c/openocd/+/6857
Tested-by: jenkins
diff --git a/src/helper/bits.h b/src/helper/bits.h
index 00d3c0270..6151b3340 100644
--- a/src/helper/bits.h
+++ b/src/helper/bits.h
@@ -28,8 +28,12 @@
#include <helper/types.h>
#define BIT(nr) (1UL << (nr))
+#define BIT_ULL(nr) (1ULL << (nr))
#define BITS_PER_BYTE 8
#define BITS_PER_LONG (BITS_PER_BYTE * sizeof(long))
+#define BITS_PER_LONG_LONG (BITS_PER_BYTE * sizeof(long long))
+#define GENMASK(h, l) (((~0UL) - (1UL << (l)) + 1) & (~0UL >> (BITS_PER_LONG - 1 - (h))))
+#define GENMASK_ULL(h, l) (((~0ULL) - (1ULL << (l)) + 1) & (~0ULL >> (BITS_PER_LONG_LONG - 1 - (h))))
#define BITS_TO_LONGS(nr) DIV_ROUND_UP(nr, BITS_PER_BYTE * sizeof(long))
#define BIT_MASK(nr) (1UL << ((nr) % BITS_PER_LONG))
#define BIT_WORD(nr) ((nr) / BITS_PER_LONG)
diff --git a/src/rtos/chromium-ec.c b/src/rtos/chromium-ec.c
index 2f1a0cf3c..95a228d0d 100644
--- a/src/rtos/chromium-ec.c
+++ b/src/rtos/chromium-ec.c
@@ -11,6 +11,7 @@
#include "config.h"
#endif
+#include <helper/bits.h>
#include <rtos/rtos.h>
#include <target/target.h>
#include <target/target_type.h>
@@ -20,7 +21,6 @@
#define CROS_EC_MAX_TASKS 32
#define CROS_EC_MAX_NAME 200
#define CROS_EC_IDLE_STRING "<< idle >>"
-#define BIT(x) (1 << (x))
struct chromium_ec_params {
const char *target_name;
-----------------------------------------------------------------------
Summary of changes:
src/helper/bits.h | 4 ++++
src/rtos/chromium-ec.c | 2 +-
2 files changed, 5 insertions(+), 1 deletion(-)
hooks/post-receive
--
Main OpenOCD repository
|
|
From: OpenOCD-Gerrit <ope...@us...> - 2022-03-26 13:34:59
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 3fa695be2401c88dbd93b2c9dad1c098a948c4ca (commit)
from 00d4699d0b559a0bb3e739a78f3ce1c5731f8dea (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit 3fa695be2401c88dbd93b2c9dad1c098a948c4ca
Author: Antonio Borneo <bor...@gm...>
Date: Thu Feb 24 11:39:15 2022 +0100
openocd: include config.h in every file .c
Including config.h as first is required for every C file.
Add it to the C files that still miss it.
Change-Id: I1a210e7d3a854958a85a290b086ad8a9f5176425
Signed-off-by: Antonio Borneo <bor...@gm...>
Reviewed-on: https://review.openocd.org/c/openocd/+/6856
Tested-by: jenkins
diff --git a/src/helper/jim-nvp.c b/src/helper/jim-nvp.c
index 738ed7943..0409a83cd 100644
--- a/src/helper/jim-nvp.c
+++ b/src/helper/jim-nvp.c
@@ -41,6 +41,10 @@
* official policies, either expressed or implied, of the Jim Tcl Project.
*/
+#ifdef HAVE_CONFIG_H
+#include "config.h"
+#endif
+
#include "jim-nvp.h"
#include <string.h>
diff --git a/src/rtos/chromium-ec.c b/src/rtos/chromium-ec.c
index 1c8f4e3f4..2f1a0cf3c 100644
--- a/src/rtos/chromium-ec.c
+++ b/src/rtos/chromium-ec.c
@@ -7,6 +7,10 @@
* Chromium-EC RTOS Task Awareness
*/
+#ifdef HAVE_CONFIG_H
+#include "config.h"
+#endif
+
#include <rtos/rtos.h>
#include <target/target.h>
#include <target/target_type.h>
diff --git a/src/rtt/rtt.c b/src/rtt/rtt.c
index bf3cca51b..3da3cce81 100644
--- a/src/rtt/rtt.c
+++ b/src/rtt/rtt.c
@@ -15,6 +15,10 @@
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
+#ifdef HAVE_CONFIG_H
+#include "config.h"
+#endif
+
#include <stdint.h>
#include <stdbool.h>
#include <string.h>
diff --git a/src/rtt/tcl.c b/src/rtt/tcl.c
index f5abf2e5e..4a34d8b98 100644
--- a/src/rtt/tcl.c
+++ b/src/rtt/tcl.c
@@ -15,6 +15,10 @@
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
+#ifdef HAVE_CONFIG_H
+#include "config.h"
+#endif
+
#include <helper/log.h>
#include <target/rtt.h>
diff --git a/src/server/rtt_server.c b/src/server/rtt_server.c
index c7141c0e0..3850c2687 100644
--- a/src/server/rtt_server.c
+++ b/src/server/rtt_server.c
@@ -15,6 +15,10 @@
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
+#ifdef HAVE_CONFIG_H
+#include "config.h"
+#endif
+
#include <stdint.h>
#include <rtt/rtt.h>
diff --git a/src/target/rtt.c b/src/target/rtt.c
index 7e556e1cb..41830213d 100644
--- a/src/target/rtt.c
+++ b/src/target/rtt.c
@@ -15,6 +15,10 @@
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
+#ifdef HAVE_CONFIG_H
+#include "config.h"
+#endif
+
#include <stddef.h>
#include <stdint.h>
#include <helper/log.h>
-----------------------------------------------------------------------
Summary of changes:
src/helper/jim-nvp.c | 4 ++++
src/rtos/chromium-ec.c | 4 ++++
src/rtt/rtt.c | 4 ++++
src/rtt/tcl.c | 4 ++++
src/server/rtt_server.c | 4 ++++
src/target/rtt.c | 4 ++++
6 files changed, 24 insertions(+)
hooks/post-receive
--
Main OpenOCD repository
|
