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From: OpenOCD-Gerrit <ope...@us...> - 2022-10-08 08:46:49
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via b991c416b7e1a070604be919d8762ffe0a930a3f (commit)
from 978c115dac5a2f420b9ef70207f384f09e380e35 (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit b991c416b7e1a070604be919d8762ffe0a930a3f
Author: Tomas Vanek <va...@fb...>
Date: Tue Nov 23 10:06:51 2021 +0100
target/cortex_m: make reset robust again
After merging [1] 'reset halt' does not work on not responding Cortex-M.
Relax the examined tests and try to set vector catch VC_CORERESET
if debug_ap is available.
While on it add an info about examination state to debug logs.
Fixes: [1] commit 98d9f1168cbd ("target: reset target examined flag if target::examine() fails")
Change-Id: Ie2e018610026180af5997d70231061a275f05c76
Signed-off-by: Tomas Vanek <va...@fb...>
Reviewed-on: https://review.openocd.org/c/openocd/+/6745
Tested-by: jenkins
Reviewed-by: Antonio Borneo <bor...@gm...>
diff --git a/src/target/cortex_m.c b/src/target/cortex_m.c
index 23d9065e2..94c75a1d4 100644
--- a/src/target/cortex_m.c
+++ b/src/target/cortex_m.c
@@ -1408,8 +1408,9 @@ static int cortex_m_assert_reset(struct target *target)
struct armv7m_common *armv7m = &cortex_m->armv7m;
enum cortex_m_soft_reset_config reset_config = cortex_m->soft_reset_config;
- LOG_TARGET_DEBUG(target, "target->state: %s",
- target_state_name(target));
+ LOG_TARGET_DEBUG(target, "target->state: %s,%s examined",
+ target_state_name(target),
+ target_was_examined(target) ? "" : " not");
enum reset_types jtag_reset_config = jtag_get_reset_config();
@@ -1428,24 +1429,32 @@ static int cortex_m_assert_reset(struct target *target)
bool srst_asserted = false;
- if (!target_was_examined(target)) {
- if (jtag_reset_config & RESET_HAS_SRST) {
- adapter_assert_reset();
+ if ((jtag_reset_config & RESET_HAS_SRST) &&
+ ((jtag_reset_config & RESET_SRST_NO_GATING) || !armv7m->debug_ap)) {
+ /* If we have no debug_ap, asserting SRST is the only thing
+ * we can do now */
+ adapter_assert_reset();
+ srst_asserted = true;
+ }
+
+ /* We need at least debug_ap to go further.
+ * Inform user and bail out if we don't have one. */
+ if (!armv7m->debug_ap) {
+ if (srst_asserted) {
if (target->reset_halt)
- LOG_TARGET_ERROR(target, "Target not examined, will not halt after reset!");
+ LOG_TARGET_ERROR(target, "Debug AP not available, will not halt after reset!");
+
+ /* Do not propagate error: reset was asserted, proceed to deassert! */
+ target->state = TARGET_RESET;
+ register_cache_invalidate(cortex_m->armv7m.arm.core_cache);
return ERROR_OK;
+
} else {
- LOG_TARGET_ERROR(target, "Target not examined, reset NOT asserted!");
+ LOG_TARGET_ERROR(target, "Debug AP not available, reset NOT asserted!");
return ERROR_FAIL;
}
}
- if ((jtag_reset_config & RESET_HAS_SRST) &&
- (jtag_reset_config & RESET_SRST_NO_GATING)) {
- adapter_assert_reset();
- srst_asserted = true;
- }
-
/* Enable debug requests */
int retval = cortex_m_read_dhcsr_atomic_sticky(target);
@@ -1546,7 +1555,7 @@ static int cortex_m_assert_reset(struct target *target)
if (retval != ERROR_OK)
return retval;
- if (target->reset_halt) {
+ if (target->reset_halt && target_was_examined(target)) {
retval = target_halt(target);
if (retval != ERROR_OK)
return retval;
@@ -1559,8 +1568,9 @@ static int cortex_m_deassert_reset(struct target *target)
{
struct armv7m_common *armv7m = &target_to_cm(target)->armv7m;
- LOG_TARGET_DEBUG(target, "target->state: %s",
- target_state_name(target));
+ LOG_TARGET_DEBUG(target, "target->state: %s,%s examined",
+ target_state_name(target),
+ target_was_examined(target) ? "" : " not");
/* deassert reset lines */
adapter_deassert_reset();
@@ -1569,7 +1579,7 @@ static int cortex_m_deassert_reset(struct target *target)
if ((jtag_reset_config & RESET_HAS_SRST) &&
!(jtag_reset_config & RESET_SRST_NO_GATING) &&
- target_was_examined(target)) {
+ armv7m->debug_ap) {
int retval = dap_dp_init_or_reconnect(armv7m->debug_ap->dap);
if (retval != ERROR_OK) {
-----------------------------------------------------------------------
Summary of changes:
src/target/cortex_m.c | 44 +++++++++++++++++++++++++++-----------------
1 file changed, 27 insertions(+), 17 deletions(-)
hooks/post-receive
--
Main OpenOCD repository
|
|
From: OpenOCD-Gerrit <ope...@us...> - 2022-10-08 08:00:38
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 978c115dac5a2f420b9ef70207f384f09e380e35 (commit)
from a69b382efd35f13e0f7e63194086a2f5ac24215b (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit 978c115dac5a2f420b9ef70207f384f09e380e35
Author: Antonio Borneo <bor...@gm...>
Date: Mon Sep 26 15:32:24 2022 +0200
openocd: fix build with 'configure --without-capstone'
When configure option --without-capstone is used, the macro
HAVE_CAPSTONE is not defined in config.h, and the following lines
are instead present:
/* 1 if you have Capstone disassembly framework. */
/* #undef HAVE_CAPSTONE */
This cause compile error with message:
arm_disassembler.h:190:5: error: "HAVE_CAPSTONE" is not
defined, evaluates to 0 [-Werror=undef]
190 | #if HAVE_CAPSTONE
| ^~~~~~~~~~~~~
This is caused by configure.ac that does not call AC_DEFINE when
--without-capstone option is present.
Fix configure.ac to always provide the autoconf macro
HAVE_CAPSTONE, with either value 0 or 1.
Change-Id: Ie5ac98b2c25746dd721812c91baaac61ec877ecd
Signed-off-by: Antonio Borneo <bor...@gm...>
Reviewed-on: https://review.openocd.org/c/openocd/+/7224
Tested-by: jenkins
diff --git a/configure.ac b/configure.ac
index cfd23846b..13c990465 100644
--- a/configure.ac
+++ b/configure.ac
@@ -631,7 +631,6 @@ AS_IF([test "x$enable_capstone" != xno], [
PKG_CHECK_MODULES([CAPSTONE], [capstone], [
AC_DEFINE([HAVE_CAPSTONE], [1], [1 if you have Capstone disassembly framework.])
], [
- AC_DEFINE([HAVE_CAPSTONE], [0], [0 if you don't have Capstone disassembly framework.])
if test "x$enable_capstone" != xauto; then
AC_MSG_ERROR([--with-capstone was given, but test for Capstone failed])
fi
@@ -639,6 +638,10 @@ AS_IF([test "x$enable_capstone" != xno], [
])
])
+AS_IF([test "x$enable_capstone" == xno], [
+ AC_DEFINE([HAVE_CAPSTONE], [0], [0 if you don't have Capstone disassembly framework.])
+])
+
for hidapi_lib in hidapi hidapi-hidraw hidapi-libusb; do
PKG_CHECK_MODULES([HIDAPI],[$hidapi_lib],[
use_hidapi=yes
-----------------------------------------------------------------------
Summary of changes:
configure.ac | 5 ++++-
1 file changed, 4 insertions(+), 1 deletion(-)
hooks/post-receive
--
Main OpenOCD repository
|
|
From: OpenOCD-Gerrit <ope...@us...> - 2022-10-08 07:56:02
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via a69b382efd35f13e0f7e63194086a2f5ac24215b (commit)
from 8bf5482754715f2e1b05be03de8780f26c305955 (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit a69b382efd35f13e0f7e63194086a2f5ac24215b
Author: Daniel Goehring <dgo...@os...>
Date: Tue Oct 4 00:03:42 2022 -0700
target/adiv5: 64-bit TAR setup bugfix
For 64-bit TAR setup, if 'tar_valid == false' perform the upper 32-bit
write even if the cached copy matches the upper TAR value to be written.
Signed-off-by: Daniel Goehring <dgo...@os...>
Change-Id: I320377dc90a9d1d7b64cbb281b2527e56c7621ee
Reviewed-on: https://review.openocd.org/c/openocd/+/7245
Reviewed-by: Tomas Vanek <va...@fb...>
Reviewed-by: Antonio Borneo <bor...@gm...>
Tested-by: jenkins
diff --git a/src/target/arm_adi_v5.c b/src/target/arm_adi_v5.c
index c44642825..da5da3197 100644
--- a/src/target/arm_adi_v5.c
+++ b/src/target/arm_adi_v5.c
@@ -113,7 +113,7 @@ static int mem_ap_setup_tar(struct adiv5_ap *ap, target_addr_t tar)
int retval = dap_queue_ap_write(ap, MEM_AP_REG_TAR(ap->dap), (uint32_t)(tar & 0xffffffffUL));
if (retval == ERROR_OK && is_64bit_ap(ap)) {
/* See if bits 63:32 of tar is different from last setting */
- if ((ap->tar_value >> 32) != (tar >> 32))
+ if (!ap->tar_valid || (ap->tar_value >> 32) != (tar >> 32))
retval = dap_queue_ap_write(ap, MEM_AP_REG_TAR64(ap->dap), (uint32_t)(tar >> 32));
}
if (retval != ERROR_OK) {
-----------------------------------------------------------------------
Summary of changes:
src/target/arm_adi_v5.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
hooks/post-receive
--
Main OpenOCD repository
|
|
From: OpenOCD-Gerrit <ope...@us...> - 2022-10-08 07:55:35
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 8bf5482754715f2e1b05be03de8780f26c305955 (commit)
from d6ae732f6e1646742bb179c5247ea6a96acfc47e (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit 8bf5482754715f2e1b05be03de8780f26c305955
Author: Nishanth Menon <nm...@ti...>
Date: Thu Jul 14 16:37:54 2022 -0500
tcl/target/ti_k3: Handle swd vs jtag
Since all the device definition when accessing device from jtag is also
valid when accessing from swd, lets make sure the configuration can
handle the same.
Signed-off-by: Nishanth Menon <nm...@ti...>
Change-Id: I5af071137fd8c3b52cc4ef72401f8eba952f9cad
Reviewed-on: https://review.openocd.org/c/openocd/+/7090
Tested-by: jenkins
Reviewed-by: Antonio Borneo <bor...@gm...>
diff --git a/tcl/target/ti_k3.cfg b/tcl/target/ti_k3.cfg
index 254bb6971..2454357fc 100644
--- a/tcl/target/ti_k3.cfg
+++ b/tcl/target/ti_k3.cfg
@@ -12,6 +12,8 @@
# Has 2 ARMV8 Cores and 4 R5 Cores, M4F and an M3
#
+source [find target/swj-dp.tcl]
+
if { [info exists SOC] } {
set _soc $SOC
} else {
@@ -164,7 +166,8 @@ switch $_soc {
}
}
-jtag newtap $_CHIPNAME cpu -irlen 4 -expected-id $_K3_DAP_TAPID -ignore-version
+swj_newdap $_CHIPNAME cpu -irlen 4 -expected-id $_K3_DAP_TAPID -ignore-version
+
dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu
set _TARGETNAME $_CHIPNAME.cpu
-----------------------------------------------------------------------
Summary of changes:
tcl/target/ti_k3.cfg | 5 ++++-
1 file changed, 4 insertions(+), 1 deletion(-)
hooks/post-receive
--
Main OpenOCD repository
|
|
From: OpenOCD-Gerrit <ope...@us...> - 2022-10-08 07:55:15
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via d6ae732f6e1646742bb179c5247ea6a96acfc47e (commit)
via d983114855eaf7ab6c63f0e5e6a553096e862a31 (commit)
from 0a7e17242037431671d52c7e92f72f216c6a4c57 (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit d6ae732f6e1646742bb179c5247ea6a96acfc47e
Author: Daniel Anselmi <dan...@gm...>
Date: Sun Oct 2 17:15:41 2022 +0200
fix leaky file-handle in virtex2 driver
Change-Id: I2784a66c42be71f2982dff7746f9fb2eb1dc8ca6
Signed-off-by: Daniel Anselmi <dan...@gm...>
Reviewed-on: https://review.openocd.org/c/openocd/+/7243
Tested-by: jenkins
Reviewed-by: Antonio Borneo <bor...@gm...>
diff --git a/src/pld/xilinx_bit.c b/src/pld/xilinx_bit.c
index 7911b8dc1..792b3375b 100644
--- a/src/pld/xilinx_bit.c
+++ b/src/pld/xilinx_bit.c
@@ -96,31 +96,37 @@ int xilinx_read_bit_file(struct xilinx_bit_file *bit_file, const char *filename)
read_count = fread(bit_file->unknown_header, 1, 13, input_file);
if (read_count != 13) {
LOG_ERROR("couldn't read unknown_header from file '%s'", filename);
+ fclose(input_file);
return ERROR_PLD_FILE_LOAD_FAILED;
}
if (read_section(input_file, 2, 'a', NULL, &bit_file->source_file) != ERROR_OK) {
xilinx_free_bit_file(bit_file);
+ fclose(input_file);
return ERROR_PLD_FILE_LOAD_FAILED;
}
if (read_section(input_file, 2, 'b', NULL, &bit_file->part_name) != ERROR_OK) {
xilinx_free_bit_file(bit_file);
+ fclose(input_file);
return ERROR_PLD_FILE_LOAD_FAILED;
}
if (read_section(input_file, 2, 'c', NULL, &bit_file->date) != ERROR_OK) {
xilinx_free_bit_file(bit_file);
+ fclose(input_file);
return ERROR_PLD_FILE_LOAD_FAILED;
}
if (read_section(input_file, 2, 'd', NULL, &bit_file->time) != ERROR_OK) {
xilinx_free_bit_file(bit_file);
+ fclose(input_file);
return ERROR_PLD_FILE_LOAD_FAILED;
}
if (read_section(input_file, 4, 'e', &bit_file->length, &bit_file->data) != ERROR_OK) {
xilinx_free_bit_file(bit_file);
+ fclose(input_file);
return ERROR_PLD_FILE_LOAD_FAILED;
}
commit d983114855eaf7ab6c63f0e5e6a553096e862a31
Author: Daniel Anselmi <dan...@gm...>
Date: Sun Oct 2 02:16:28 2022 +0200
don't return ERROR_OK in error cases
Change-Id: I7e046df85838692c9044fe9c9d67e8b2c821eb0f
Signed-off-by: Daniel Anselmi <dan...@gm...>
Reviewed-on: https://review.openocd.org/c/openocd/+/7236
Reviewed-by: Antonio Borneo <bor...@gm...>
Tested-by: jenkins
diff --git a/src/pld/virtex2.c b/src/pld/virtex2.c
index b4861e9cb..98fd58adb 100644
--- a/src/pld/virtex2.c
+++ b/src/pld/virtex2.c
@@ -175,7 +175,7 @@ COMMAND_HANDLER(virtex2_handle_read_stat_command)
device = get_pld_device_by_num(dev_id);
if (!device) {
command_print(CMD, "pld device '#%s' is out of bounds", CMD_ARGV[0]);
- return ERROR_OK;
+ return ERROR_FAIL;
}
virtex2_read_stat(device, &status);
@@ -197,7 +197,7 @@ PLD_DEVICE_COMMAND_HANDLER(virtex2_pld_device_command)
tap = jtag_tap_by_string(CMD_ARGV[1]);
if (!tap) {
command_print(CMD, "Tap: %s does not exist", CMD_ARGV[1]);
- return ERROR_OK;
+ return ERROR_FAIL;
}
virtex2_info = malloc(sizeof(struct virtex2_pld_device));
-----------------------------------------------------------------------
Summary of changes:
src/pld/virtex2.c | 4 ++--
src/pld/xilinx_bit.c | 6 ++++++
2 files changed, 8 insertions(+), 2 deletions(-)
hooks/post-receive
--
Main OpenOCD repository
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|
From: OpenOCD-Gerrit <ope...@us...> - 2022-10-08 07:54:33
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 0a7e17242037431671d52c7e92f72f216c6a4c57 (commit)
from cff2cf373f1b86233eb2abab8e590fb0f88c7449 (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit 0a7e17242037431671d52c7e92f72f216c6a4c57
Author: Daniel Anselmi <dan...@gm...>
Date: Sun Oct 2 01:17:15 2022 +0200
fix memory leak in virtex2 driver
Change-Id: Ia08f7aaad25631132885acd5898477c1106f0ec4
Signed-off-by: Daniel Anselmi <dan...@gm...>
Reviewed-on: https://review.openocd.org/c/openocd/+/7235
Tested-by: jenkins
Reviewed-by: Antonio Borneo <bor...@gm...>
diff --git a/src/pld/virtex2.c b/src/pld/virtex2.c
index 771af9939..b4861e9cb 100644
--- a/src/pld/virtex2.c
+++ b/src/pld/virtex2.c
@@ -157,6 +157,8 @@ static int virtex2_load(struct pld_device *pld_device, const char *filename)
virtex2_set_instr(virtex2_info->tap, 0x3f); /* BYPASS */
jtag_execute_queue();
+ xilinx_free_bit_file(&bit_file);
+
return ERROR_OK;
}
diff --git a/src/pld/xilinx_bit.c b/src/pld/xilinx_bit.c
index 25deb8082..7911b8dc1 100644
--- a/src/pld/xilinx_bit.c
+++ b/src/pld/xilinx_bit.c
@@ -87,26 +87,42 @@ int xilinx_read_bit_file(struct xilinx_bit_file *bit_file, const char *filename)
return ERROR_PLD_FILE_LOAD_FAILED;
}
+ bit_file->source_file = NULL;
+ bit_file->part_name = NULL;
+ bit_file->date = NULL;
+ bit_file->time = NULL;
+ bit_file->data = NULL;
+
read_count = fread(bit_file->unknown_header, 1, 13, input_file);
if (read_count != 13) {
LOG_ERROR("couldn't read unknown_header from file '%s'", filename);
return ERROR_PLD_FILE_LOAD_FAILED;
}
- if (read_section(input_file, 2, 'a', NULL, &bit_file->source_file) != ERROR_OK)
+ if (read_section(input_file, 2, 'a', NULL, &bit_file->source_file) != ERROR_OK) {
+ xilinx_free_bit_file(bit_file);
return ERROR_PLD_FILE_LOAD_FAILED;
+ }
- if (read_section(input_file, 2, 'b', NULL, &bit_file->part_name) != ERROR_OK)
+ if (read_section(input_file, 2, 'b', NULL, &bit_file->part_name) != ERROR_OK) {
+ xilinx_free_bit_file(bit_file);
return ERROR_PLD_FILE_LOAD_FAILED;
+ }
- if (read_section(input_file, 2, 'c', NULL, &bit_file->date) != ERROR_OK)
+ if (read_section(input_file, 2, 'c', NULL, &bit_file->date) != ERROR_OK) {
+ xilinx_free_bit_file(bit_file);
return ERROR_PLD_FILE_LOAD_FAILED;
+ }
- if (read_section(input_file, 2, 'd', NULL, &bit_file->time) != ERROR_OK)
+ if (read_section(input_file, 2, 'd', NULL, &bit_file->time) != ERROR_OK) {
+ xilinx_free_bit_file(bit_file);
return ERROR_PLD_FILE_LOAD_FAILED;
+ }
- if (read_section(input_file, 4, 'e', &bit_file->length, &bit_file->data) != ERROR_OK)
+ if (read_section(input_file, 4, 'e', &bit_file->length, &bit_file->data) != ERROR_OK) {
+ xilinx_free_bit_file(bit_file);
return ERROR_PLD_FILE_LOAD_FAILED;
+ }
LOG_DEBUG("bit_file: %s %s %s,%s %" PRIu32 "", bit_file->source_file, bit_file->part_name,
bit_file->date, bit_file->time, bit_file->length);
@@ -115,3 +131,12 @@ int xilinx_read_bit_file(struct xilinx_bit_file *bit_file, const char *filename)
return ERROR_OK;
}
+
+void xilinx_free_bit_file(struct xilinx_bit_file *bit_file)
+{
+ free(bit_file->source_file);
+ free(bit_file->part_name);
+ free(bit_file->date);
+ free(bit_file->time);
+ free(bit_file->data);
+}
diff --git a/src/pld/xilinx_bit.h b/src/pld/xilinx_bit.h
index e30ed2337..f443bf70e 100644
--- a/src/pld/xilinx_bit.h
+++ b/src/pld/xilinx_bit.h
@@ -22,4 +22,6 @@ struct xilinx_bit_file {
int xilinx_read_bit_file(struct xilinx_bit_file *bit_file, const char *filename);
+void xilinx_free_bit_file(struct xilinx_bit_file *bit_file);
+
#endif /* OPENOCD_PLD_XILINX_BIT_H */
-----------------------------------------------------------------------
Summary of changes:
src/pld/virtex2.c | 2 ++
src/pld/xilinx_bit.c | 35 ++++++++++++++++++++++++++++++-----
src/pld/xilinx_bit.h | 2 ++
3 files changed, 34 insertions(+), 5 deletions(-)
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From: OpenOCD-Gerrit <ope...@us...> - 2022-10-08 07:53:51
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via cff2cf373f1b86233eb2abab8e590fb0f88c7449 (commit)
from 10b08d5ac5086aed3259f4f48a67d8d807c8ef11 (commit)
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- Log -----------------------------------------------------------------
commit cff2cf373f1b86233eb2abab8e590fb0f88c7449
Author: Erhan Kurubas <erh...@es...>
Date: Wed Sep 28 21:18:49 2022 +0200
target/xtensa: pass correct buffer on read memory retry
Read values must be at albuff so that can be copied to buffer
on function exit.
Signed-off-by: Erhan Kurubas <erh...@es...>
Change-Id: I74a533e8f12f1002ca06a98a7c7cd928552b4cc5
Reviewed-on: https://review.openocd.org/c/openocd/+/7226
Tested-by: jenkins
Reviewed-by: Ian Thompson <ia...@ca...>
Reviewed-by: Antonio Borneo <bor...@gm...>
diff --git a/src/target/xtensa/xtensa.c b/src/target/xtensa/xtensa.c
index c73b80820..faff0afa8 100644
--- a/src/target/xtensa/xtensa.c
+++ b/src/target/xtensa/xtensa.c
@@ -1781,9 +1781,9 @@ int xtensa_read_memory(struct target *target, target_addr_t address, uint32_t si
if (res != ERROR_OK) {
if (xtensa->probe_lsddr32p != 0) {
/* Disable fast memory access instructions and retry before reporting an error */
- LOG_TARGET_INFO(target, "Disabling LDDR32.P/SDDR32.P");
+ LOG_TARGET_DEBUG(target, "Disabling LDDR32.P/SDDR32.P");
xtensa->probe_lsddr32p = 0;
- res = xtensa_read_memory(target, address, size, count, buffer);
+ res = xtensa_read_memory(target, address, size, count, albuff);
bswap = false;
} else {
LOG_TARGET_WARNING(target, "Failed reading %d bytes at address "TARGET_ADDR_FMT,
-----------------------------------------------------------------------
Summary of changes:
src/target/xtensa/xtensa.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
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From: OpenOCD-Gerrit <ope...@us...> - 2022-10-08 07:53:32
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 10b08d5ac5086aed3259f4f48a67d8d807c8ef11 (commit)
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commit 10b08d5ac5086aed3259f4f48a67d8d807c8ef11
Author: Erhan Kurubas <erh...@es...>
Date: Wed Sep 28 21:38:05 2022 +0200
target/xtensa: rename pc and ps macro names
Actually they are the base of epc and eps
Signed-off-by: Erhan Kurubas <erh...@es...>
Change-Id: I4f43b9609a9929399fb5d3fa0203efc8a98e94c9
Reviewed-on: https://review.openocd.org/c/openocd/+/7227
Tested-by: jenkins
Reviewed-by: Ian Thompson <ia...@ca...>
Reviewed-by: Antonio Borneo <bor...@gm...>
diff --git a/src/target/xtensa/xtensa.c b/src/target/xtensa/xtensa.c
index 4dfff6ab4..c73b80820 100644
--- a/src/target/xtensa/xtensa.c
+++ b/src/target/xtensa/xtensa.c
@@ -168,8 +168,9 @@
#define XT_REG_A3 (xtensa_regs[XT_REG_IDX_AR3].reg_num)
#define XT_REG_A4 (xtensa_regs[XT_REG_IDX_AR4].reg_num)
-#define XT_PS_REG_NUM_BASE (0xc0U) /* (EPS2 - 2), for adding DBGLEVEL */
-#define XT_PC_REG_NUM_BASE (0xb0U) /* (EPC1 - 1), for adding DBGLEVEL */
+#define XT_PS_REG_NUM (0xe6U)
+#define XT_EPS_REG_NUM_BASE (0xc0U) /* (EPS2 - 2), for adding DBGLEVEL */
+#define XT_EPC_REG_NUM_BASE (0xb0U) /* (EPC1 - 1), for adding DBGLEVEL */
#define XT_PC_REG_NUM_VIRTUAL (0xffU) /* Marker for computing PC (EPC[DBGLEVEL) */
#define XT_PC_DBREG_NUM_BASE (0x20U) /* External (i.e., GDB) access */
@@ -245,7 +246,7 @@ struct xtensa_reg_desc xtensa_regs[XT_NUM_REGS] = {
XT_MK_REG_DESC("ar63", 0x3F, XT_REG_GENERAL, 0),
XT_MK_REG_DESC("windowbase", 0x48, XT_REG_SPECIAL, 0),
XT_MK_REG_DESC("windowstart", 0x49, XT_REG_SPECIAL, 0),
- XT_MK_REG_DESC("ps", 0xE6, XT_REG_SPECIAL, 0), /* PS (not mapped through EPS[]) */
+ XT_MK_REG_DESC("ps", XT_PS_REG_NUM, XT_REG_SPECIAL, 0), /* PS (not mapped through EPS[]) */
XT_MK_REG_DESC("ibreakenable", 0x60, XT_REG_SPECIAL, 0),
XT_MK_REG_DESC("ddr", 0x68, XT_REG_DEBUG, XT_REGF_NOREAD),
XT_MK_REG_DESC("ibreaka0", 0x80, XT_REG_SPECIAL, 0),
@@ -630,7 +631,7 @@ static int xtensa_write_dirty_registers(struct target *target)
/* reg number of PC for debug interrupt depends on NDEBUGLEVEL
**/
reg_num =
- (XT_PC_REG_NUM_BASE +
+ (XT_EPC_REG_NUM_BASE +
xtensa->core_config->debug.irq_level);
xtensa_queue_exec_ins(xtensa, XT_INS_WSR(xtensa, reg_num, XT_REG_A3));
}
@@ -1105,10 +1106,10 @@ int xtensa_fetch_all_regs(struct target *target)
case XT_REG_SPECIAL:
if (reg_num == XT_PC_REG_NUM_VIRTUAL) {
/* reg number of PC for debug interrupt depends on NDEBUGLEVEL */
- reg_num = (XT_PC_REG_NUM_BASE + xtensa->core_config->debug.irq_level);
+ reg_num = XT_EPC_REG_NUM_BASE + xtensa->core_config->debug.irq_level;
} else if (reg_num == xtensa_regs[XT_REG_IDX_PS].reg_num) {
/* reg number of PS for debug interrupt depends on NDEBUGLEVEL */
- reg_num = (XT_PS_REG_NUM_BASE + xtensa->core_config->debug.irq_level);
+ reg_num = XT_EPS_REG_NUM_BASE + xtensa->core_config->debug.irq_level;
} else if (reg_num == xtensa_regs[XT_REG_IDX_CPENABLE].reg_num) {
/* CPENABLE already read/updated; don't re-read */
reg_fetched = false;
@@ -3441,8 +3442,8 @@ COMMAND_HELPER(xtensa_cmd_xtreg_do, struct xtensa *xtensa)
else
rptr->flags = 0;
- if ((rptr->reg_num == (XT_PS_REG_NUM_BASE + xtensa->core_config->debug.irq_level)) &&
- (xtensa->core_config->core_type == XT_LX) && (rptr->type == XT_REG_SPECIAL)) {
+ if (rptr->reg_num == (XT_EPS_REG_NUM_BASE + xtensa->core_config->debug.irq_level) &&
+ xtensa->core_config->core_type == XT_LX && rptr->type == XT_REG_SPECIAL) {
xtensa->eps_dbglevel_idx = XT_NUM_REGS + xtensa->num_optregs - 1;
LOG_DEBUG("Setting PS (%s) index to %d", rptr->name, xtensa->eps_dbglevel_idx);
}
-----------------------------------------------------------------------
Summary of changes:
src/target/xtensa/xtensa.c | 17 +++++++++--------
1 file changed, 9 insertions(+), 8 deletions(-)
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From: OpenOCD-Gerrit <ope...@us...> - 2022-10-08 07:52:58
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
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- Log -----------------------------------------------------------------
commit af75d70dc5e6d83c57c6e8ee1a23ef9b472d2d52
Author: Keith Packard <ke...@ke...>
Date: Wed Sep 28 14:02:52 2022 -0700
flash/nor/at91samd: Use 32-bit register writes for ST-Link compat
ST-Link v2 dongles can be used with many cortex-m parts, but they have
one limitation -- they can only perform 8-bit and 32-bit writes to the
target. 16-bit writes are done using a pair of 8-bit writes. While not
usually an issue, in the case of the at91samd flash driver, the 16-bit
'command' register must have both halves written in the same
operation.
Fortunately, this register has two pad bytes above it in the address
space, making it safe to always access with 32-bit operations.
Change-Id: I44b0db9406982a8db5818c0533d3101618741db2
Signed-off-by: Keith Packard <ke...@ke...>
Reviewed-on: https://review.openocd.org/c/openocd/+/7234
Tested-by: jenkins
Reviewed-by: Tomas Vanek <va...@fb...>
Reviewed-by: Antonio Borneo <bor...@gm...>
diff --git a/src/flash/nor/at91samd.c b/src/flash/nor/at91samd.c
index a0252a276..f213444d1 100644
--- a/src/flash/nor/at91samd.c
+++ b/src/flash/nor/at91samd.c
@@ -543,7 +543,8 @@ static int samd_issue_nvmctrl_command(struct target *target, uint16_t cmd)
}
/* Issue the NVM command */
- res = target_write_u16(target,
+ /* 32-bit write is used to ensure atomic operation on ST-Link */
+ res = target_write_u32(target,
SAMD_NVMCTRL + SAMD_NVMCTRL_CTRLA, SAMD_NVM_CMD(cmd));
if (res != ERROR_OK)
return res;
-----------------------------------------------------------------------
Summary of changes:
src/flash/nor/at91samd.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
hooks/post-receive
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From: OpenOCD-Gerrit <ope...@us...> - 2022-10-08 07:52:47
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 0cedf10f8fd618b78190ce32a40f26dec0fb8253 (commit)
from 759d581fdeec3063475349b2c4ac75140032c0e1 (commit)
Those revisions listed above that are new to this repository have
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- Log -----------------------------------------------------------------
commit 0cedf10f8fd618b78190ce32a40f26dec0fb8253
Author: Evgeniy Naydanov <evg...@sy...>
Date: Wed Sep 14 17:56:20 2022 +0300
Remove duplicate of a counter in hwthread_update_threads
There is no need to count number of examined threads twice.
Signed-off-by: Evgeniy Naydanov <evg...@sy...>
Change-Id: Id32ead853d1ddcd4e67062d6f795700feb20cb4b
Reviewed-on: https://review.openocd.org/c/openocd/+/7223
Tested-by: jenkins
Reviewed-by: Antonio Borneo <bor...@gm...>
Reviewed-by: Tomas Vanek <va...@fb...>
diff --git a/src/rtos/hwthread.c b/src/rtos/hwthread.c
index e5eaf425f..bdd5835c2 100644
--- a/src/rtos/hwthread.c
+++ b/src/rtos/hwthread.c
@@ -78,7 +78,6 @@ static int hwthread_fill_thread(struct rtos *rtos, struct target *curr, int thre
static int hwthread_update_threads(struct rtos *rtos)
{
int threads_found = 0;
- int thread_list_size = 0;
struct target_list *head;
struct target *target;
int64_t current_thread = 0;
@@ -100,13 +99,13 @@ static int hwthread_update_threads(struct rtos *rtos)
if (!target_was_examined(curr))
continue;
- ++thread_list_size;
+ ++threads_found;
}
} else
- thread_list_size = 1;
+ threads_found = 1;
/* create space for new thread details */
- rtos->thread_details = malloc(sizeof(struct thread_detail) * thread_list_size);
+ rtos->thread_details = malloc(sizeof(struct thread_detail) * threads_found);
if (target->smp) {
/* loop over all threads */
@@ -171,13 +170,10 @@ static int hwthread_update_threads(struct rtos *rtos)
default:
break;
}
-
- threads_found++;
}
} else {
hwthread_fill_thread(rtos, target, threads_found);
current_thread = threadid_from_target(target);
- threads_found++;
}
rtos->thread_count = threads_found;
-----------------------------------------------------------------------
Summary of changes:
src/rtos/hwthread.c | 10 +++-------
1 file changed, 3 insertions(+), 7 deletions(-)
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From: OpenOCD-Gerrit <ope...@us...> - 2022-10-08 07:52:28
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
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from 1d77fc74e11d8eed87111216dd01e94d900c00c0 (commit)
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- Log -----------------------------------------------------------------
commit 759d581fdeec3063475349b2c4ac75140032c0e1
Author: Tomas Vanek <va...@fb...>
Date: Wed Sep 21 14:46:27 2022 +0200
jtag/drivers/bitbang: reduce debug verbosity
The bitbang driver floods the log by many messages with very
little informational value.
Remove some LOG_DEBUGs, convert some others to LOG_DEBUG_IO.
Change-Id: I0c7539467b45543e12932c67dc71e86d58c8c6cd
Signed-off-by: Tomas Vanek <va...@fb...>
Reviewed-on: https://review.openocd.org/c/openocd/+/7220
Reviewed-by: Antonio Borneo <bor...@gm...>
Reviewed-by: Jonathan Bell <jon...@ra...>
Tested-by: jenkins
diff --git a/src/jtag/drivers/bitbang.c b/src/jtag/drivers/bitbang.c
index d49e16fa0..2ab0a2a76 100644
--- a/src/jtag/drivers/bitbang.c
+++ b/src/jtag/drivers/bitbang.c
@@ -380,8 +380,6 @@ static int bitbang_swd_init(void)
static void bitbang_swd_exchange(bool rnw, uint8_t buf[], unsigned int offset, unsigned int bit_cnt)
{
- LOG_DEBUG("bitbang_swd_exchange");
-
if (bitbang_interface->blink) {
/* FIXME: we should manage errors */
bitbang_interface->blink(1);
@@ -412,11 +410,9 @@ static void bitbang_swd_exchange(bool rnw, uint8_t buf[], unsigned int offset, u
static int bitbang_swd_switch_seq(enum swd_special_seq seq)
{
- LOG_DEBUG("bitbang_swd_switch_seq");
-
switch (seq) {
case LINE_RESET:
- LOG_DEBUG("SWD line reset");
+ LOG_DEBUG_IO("SWD line reset");
bitbang_swd_exchange(false, (uint8_t *)swd_seq_line_reset, 0, swd_seq_line_reset_len);
break;
case JTAG_TO_SWD:
@@ -459,7 +455,6 @@ static void swd_clear_sticky_errors(void)
static void bitbang_swd_read_reg(uint8_t cmd, uint32_t *value, uint32_t ap_delay_clk)
{
- LOG_DEBUG("bitbang_swd_read_reg");
assert(cmd & SWD_CMD_RNW);
if (queued_retval != ERROR_OK) {
@@ -481,7 +476,7 @@ static void bitbang_swd_read_reg(uint8_t cmd, uint32_t *value, uint32_t ap_delay
uint32_t data = buf_get_u32(trn_ack_data_parity_trn, 1 + 3, 32);
int parity = buf_get_u32(trn_ack_data_parity_trn, 1 + 3 + 32, 1);
- LOG_DEBUG("%s %s read reg %X = %08"PRIx32,
+ LOG_DEBUG_IO("%s %s read reg %X = %08" PRIx32,
ack == SWD_ACK_OK ? "OK" : ack == SWD_ACK_WAIT ? "WAIT" : ack == SWD_ACK_FAULT ? "FAULT" : "JUNK",
cmd & SWD_CMD_APNDP ? "AP" : "DP",
(cmd & SWD_CMD_A32) >> 1,
@@ -510,7 +505,6 @@ static void bitbang_swd_read_reg(uint8_t cmd, uint32_t *value, uint32_t ap_delay
static void bitbang_swd_write_reg(uint8_t cmd, uint32_t value, uint32_t ap_delay_clk)
{
- LOG_DEBUG("bitbang_swd_write_reg");
assert(!(cmd & SWD_CMD_RNW));
if (queued_retval != ERROR_OK) {
@@ -537,7 +531,7 @@ static void bitbang_swd_write_reg(uint8_t cmd, uint32_t value, uint32_t ap_delay
int ack = buf_get_u32(trn_ack_data_parity_trn, 1, 3);
- LOG_DEBUG("%s%s %s write reg %X = %08"PRIx32,
+ LOG_DEBUG_IO("%s%s %s write reg %X = %08" PRIx32,
check_ack ? "" : "ack ignored ",
ack == SWD_ACK_OK ? "OK" : ack == SWD_ACK_WAIT ? "WAIT" : ack == SWD_ACK_FAULT ? "FAULT" : "JUNK",
cmd & SWD_CMD_APNDP ? "AP" : "DP",
@@ -562,14 +556,13 @@ static void bitbang_swd_write_reg(uint8_t cmd, uint32_t value, uint32_t ap_delay
static int bitbang_swd_run_queue(void)
{
- LOG_DEBUG("bitbang_swd_run_queue");
/* A transaction must be followed by another transaction or at least 8 idle cycles to
* ensure that data is clocked through the AP. */
bitbang_swd_exchange(true, NULL, 0, 8);
int retval = queued_retval;
queued_retval = ERROR_OK;
- LOG_DEBUG("SWD queue return value: %02x", retval);
+ LOG_DEBUG_IO("SWD queue return value: %02x", retval);
return retval;
}
-----------------------------------------------------------------------
Summary of changes:
src/jtag/drivers/bitbang.c | 15 ++++-----------
1 file changed, 4 insertions(+), 11 deletions(-)
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From: OpenOCD-Gerrit <ope...@us...> - 2022-10-08 07:50:40
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
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- Log -----------------------------------------------------------------
commit 1d77fc74e11d8eed87111216dd01e94d900c00c0
Author: Tomas Vanek <va...@fb...>
Date: Wed Sep 21 09:47:05 2022 +0200
jtag/drivers/cmsis_dap: add LOG_DEBUG_IO to cmsis_dap_metacmd_targetsel
Make write to DP_TARGETSEL is logged the similar way as other DP register
read/writes.
While on it fix checkpatch message
'Concatenated strings should use spaces between elements'
Change-Id: I98f724c984e8c4610cc461340f4c4a7cc9627ed9
Signed-off-by: Tomas Vanek <va...@fb...>
Reviewed-on: https://review.openocd.org/c/openocd/+/7219
Reviewed-by: Antonio Borneo <bor...@gm...>
Reviewed-by: Jonathan Bell <jon...@ra...>
Tested-by: jenkins
diff --git a/src/jtag/drivers/cmsis_dap.c b/src/jtag/drivers/cmsis_dap.c
index e708d5252..2f5f9c907 100644
--- a/src/jtag/drivers/cmsis_dap.c
+++ b/src/jtag/drivers/cmsis_dap.c
@@ -573,6 +573,8 @@ static int cmsis_dap_metacmd_targetsel(uint32_t instance_id)
The purpose of this operation is to select the target
corresponding to the instance_id that is written */
+ LOG_DEBUG_IO("DP write reg TARGETSEL %" PRIx32, instance_id);
+
size_t idx = 0;
command[idx++] = CMD_DAP_SWD_SEQUENCE;
command[idx++] = 3; /* sequence count */
@@ -783,7 +785,7 @@ static void cmsis_dap_swd_write_from_queue(struct cmsis_dap *dap)
uint8_t cmd = transfer->cmd;
uint32_t data = transfer->data;
- LOG_DEBUG_IO("%s %s reg %x %"PRIx32,
+ LOG_DEBUG_IO("%s %s reg %x %" PRIx32,
cmd & SWD_CMD_APNDP ? "AP" : "DP",
cmd & SWD_CMD_RNW ? "read" : "write",
(cmd & SWD_CMD_A32) >> 1, data);
@@ -889,7 +891,7 @@ static void cmsis_dap_swd_read_process(struct cmsis_dap *dap, int timeout_ms)
uint32_t tmp = data;
idx += 4;
- LOG_DEBUG_IO("Read result: %"PRIx32, data);
+ LOG_DEBUG_IO("Read result: %" PRIx32, data);
/* Imitate posted AP reads */
if ((transfer->cmd & SWD_CMD_APNDP) ||
-----------------------------------------------------------------------
Summary of changes:
src/jtag/drivers/cmsis_dap.c | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
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From: OpenOCD-Gerrit <ope...@us...> - 2022-10-08 07:47:43
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 48507e3b1044eee218a6ba207269d33e51ae6040 (commit)
from bced97cce95a31987f18674bb022e6d263b4f29c (commit)
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- Log -----------------------------------------------------------------
commit 48507e3b1044eee218a6ba207269d33e51ae6040
Author: Tomas Vanek <va...@fb...>
Date: Fri Sep 30 13:56:59 2022 +0200
target/armv7m: show target name in 'halted' message
Change-Id: I13e9a33677632d52122585203252fc4ef0c52a2a
Signed-off-by: Tomas Vanek <va...@fb...>
Reviewed-on: https://review.openocd.org/c/openocd/+/7237
Tested-by: jenkins
Reviewed-by: Antonio Borneo <bor...@gm...>
diff --git a/src/target/armv7m.c b/src/target/armv7m.c
index 6f6a170b7..d9d01923a 100644
--- a/src/target/armv7m.c
+++ b/src/target/armv7m.c
@@ -729,8 +729,9 @@ int armv7m_arch_state(struct target *target)
ctrl = buf_get_u32(arm->core_cache->reg_list[ARMV7M_CONTROL].value, 0, 32);
sp = buf_get_u32(arm->core_cache->reg_list[ARMV7M_R13].value, 0, 32);
- LOG_USER("target halted due to %s, current mode: %s %s\n"
+ LOG_USER("[%s] halted due to %s, current mode: %s %s\n"
"xPSR: %#8.8" PRIx32 " pc: %#8.8" PRIx32 " %csp: %#8.8" PRIx32 "%s%s",
+ target_name(target),
debug_reason_name(target),
arm_mode_name(arm->core_mode),
armv7m_exception_string(armv7m->exception_number),
-----------------------------------------------------------------------
Summary of changes:
src/target/armv7m.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
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From: OpenOCD-Gerrit <ope...@us...> - 2022-10-08 07:47:25
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
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- Log -----------------------------------------------------------------
commit bced97cce95a31987f18674bb022e6d263b4f29c
Author: Tomas Vanek <va...@fb...>
Date: Sun Oct 2 09:30:50 2022 +0200
target/armv7m: prevent storing invalid register
armv7m_start_algorithm() stored all non-debug execution
registers from register cache without checking validity.
Check if the register cache is valid.
Try to read from CPU if not valid.
Issue a warning if register read fails.
Change-Id: I365f86d65243230cf521b13909575e5986a87a50
Signed-off-by: Tomas Vanek <va...@fb...>
Reviewed-on: https://review.openocd.org/c/openocd/+/7240
Tested-by: jenkins
Reviewed-by: Antonio Borneo <bor...@gm...>
Reviewed-by: Jonathan Bell <jon...@ra...>
diff --git a/src/target/armv7m.c b/src/target/armv7m.c
index 2db2ce2dd..6f6a170b7 100644
--- a/src/target/armv7m.c
+++ b/src/target/armv7m.c
@@ -528,11 +528,14 @@ int armv7m_start_algorithm(struct target *target,
/* Store all non-debug execution registers to armv7m_algorithm_info context */
for (unsigned i = 0; i < armv7m->arm.core_cache->num_regs; i++) {
+ struct reg *reg = &armv7m->arm.core_cache->reg_list[i];
+ if (!reg->valid)
+ armv7m_get_core_reg(reg);
- armv7m_algorithm_info->context[i] = buf_get_u32(
- armv7m->arm.core_cache->reg_list[i].value,
- 0,
- 32);
+ if (!reg->valid)
+ LOG_TARGET_WARNING(target, "Storing invalid register %s", reg->name);
+
+ armv7m_algorithm_info->context[i] = buf_get_u32(reg->value, 0, 32);
}
for (int i = 0; i < num_mem_params; i++) {
-----------------------------------------------------------------------
Summary of changes:
src/target/armv7m.c | 11 +++++++----
1 file changed, 7 insertions(+), 4 deletions(-)
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From: OpenOCD-Gerrit <ope...@us...> - 2022-10-08 07:47:06
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via dce9a03cb2c50ef6c3f084c7d13325369559ebce (commit)
from ae937791d35b0820e0bc9bf0ab134c2bebd113e4 (commit)
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- Log -----------------------------------------------------------------
commit dce9a03cb2c50ef6c3f084c7d13325369559ebce
Author: Tomas Vanek <va...@fb...>
Date: Tue Sep 27 10:13:18 2022 +0200
flash/nor/rp2040: fix setting sp
The num_reg_params parameter of target_run_algorithm() was not
updated when setting "sp" was introduced. Therefore "sp" as the last
register parameter was not passed to a target algo.
Introduce a new helper variable with correct count of register parameters
and use it everywhere needed.
Change-Id: I934a71380783d98917167f1569145808ef23540f
Signed-off-by: Tomas Vanek <va...@fb...>
Reviewed-on: https://review.openocd.org/c/openocd/+/7225
Tested-by: jenkins
Reviewed-by: Antonio Borneo <bor...@gm...>
Reviewed-by: Jonathan Bell <jon...@ra...>
diff --git a/src/flash/nor/rp2040.c b/src/flash/nor/rp2040.c
index be86bb81e..feff9a6f9 100644
--- a/src/flash/nor/rp2040.c
+++ b/src/flash/nor/rp2040.c
@@ -111,11 +111,12 @@ static int rp2040_call_rom_func(struct target *target, struct rp2040_flash_bank
/* Pass function pointer in r7 */
init_reg_param(&args[n_args], "r7", 32, PARAM_OUT);
buf_set_u32(args[n_args].value, 0, 32, func_offset);
+ /* Setup stack */
init_reg_param(&args[n_args + 1], "sp", 32, PARAM_OUT);
buf_set_u32(args[n_args + 1].value, 0, 32, stacktop);
+ unsigned int n_reg_params = n_args + 2; /* User arguments + r7 + sp */
-
- for (unsigned int i = 0; i < n_args + 2; ++i)
+ for (unsigned int i = 0; i < n_reg_params; ++i)
LOG_DEBUG("Set %s = 0x%" PRIx32, args[i].reg_name, buf_get_u32(args[i].value, 0, 32));
/* Actually call the function */
@@ -124,17 +125,19 @@ static int rp2040_call_rom_func(struct target *target, struct rp2040_flash_bank
int err = target_run_algorithm(
target,
0, NULL, /* No memory arguments */
- n_args + 1, args, /* User arguments + r7 */
+ n_reg_params, args, /* User arguments + r7 + sp */
priv->jump_debug_trampoline, priv->jump_debug_trampoline_end,
timeout_ms,
&alg_info
);
- for (unsigned int i = 0; i < n_args + 2; ++i)
+
+ for (unsigned int i = 0; i < n_reg_params; ++i)
destroy_reg_param(&args[i]);
+
if (err != ERROR_OK)
LOG_ERROR("Failed to invoke ROM function @0x%" PRIx16, func_offset);
- return err;
+ return err;
}
/* Finalize flash write/erase/read ID
-----------------------------------------------------------------------
Summary of changes:
src/flash/nor/rp2040.c | 13 ++++++++-----
1 file changed, 8 insertions(+), 5 deletions(-)
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From: OpenOCD-Gerrit <ope...@us...> - 2022-09-27 08:50:06
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
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- Log -----------------------------------------------------------------
commit ae937791d35b0820e0bc9bf0ab134c2bebd113e4
Author: Tomas Vanek <va...@fb...>
Date: Wed Sep 21 07:49:00 2022 +0200
flash/nor/rp2040: remove new line from error message
Change-Id: Idf3bce842b4507c1f12692b5fbcd6730637de9db
Signed-off-by: Tomas Vanek <va...@fb...>
Reviewed-on: https://review.openocd.org/c/openocd/+/7216
Reviewed-by: Antonio Borneo <bor...@gm...>
Reviewed-by: Jonathan Bell <jon...@ra...>
Tested-by: jenkins
diff --git a/src/flash/nor/rp2040.c b/src/flash/nor/rp2040.c
index 675f431b1..be86bb81e 100644
--- a/src/flash/nor/rp2040.c
+++ b/src/flash/nor/rp2040.c
@@ -132,7 +132,7 @@ static int rp2040_call_rom_func(struct target *target, struct rp2040_flash_bank
for (unsigned int i = 0; i < n_args + 2; ++i)
destroy_reg_param(&args[i]);
if (err != ERROR_OK)
- LOG_ERROR("Failed to invoke ROM function @0x%" PRIx16 "\n", func_offset);
+ LOG_ERROR("Failed to invoke ROM function @0x%" PRIx16, func_offset);
return err;
}
-----------------------------------------------------------------------
Summary of changes:
src/flash/nor/rp2040.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
hooks/post-receive
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From: OpenOCD-Gerrit <ope...@us...> - 2022-09-27 08:49:40
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 3fdd3249b56419ccf45f0859461fe4858cfb8da3 (commit)
from 931b357466ba029d9984ade1f1598371e20871f4 (commit)
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- Log -----------------------------------------------------------------
commit 3fdd3249b56419ccf45f0859461fe4858cfb8da3
Author: Tomas Vanek <va...@fb...>
Date: Sun Sep 11 16:35:54 2022 +0200
flash/nor/rp2040: use LOG_TARGET_xxx to show core name
Change-Id: Ic76e1c6306ece18b3590beaad4d5b224d4449aa0
Signed-off-by: Tomas Vanek <va...@fb...>
Reviewed-on: https://review.openocd.org/c/openocd/+/7188
Reviewed-by: Antonio Borneo <bor...@gm...>
Tested-by: jenkins
diff --git a/src/flash/nor/rp2040.c b/src/flash/nor/rp2040.c
index f131a3039..675f431b1 100644
--- a/src/flash/nor/rp2040.c
+++ b/src/flash/nor/rp2040.c
@@ -99,8 +99,7 @@ static int rp2040_call_rom_func(struct target *target, struct rp2040_flash_bank
}
target_addr_t stacktop = priv->stack->address + priv->stack->size;
- LOG_DEBUG("Calling ROM func @0x%" PRIx16 " with %d arguments", func_offset, n_args);
- LOG_DEBUG("Calling on core \"%s\"", target->cmd_name);
+ LOG_TARGET_DEBUG(target, "Calling ROM func @0x%" PRIx16 " with %u arguments", func_offset, n_args);
struct reg_param args[ARRAY_SIZE(regnames) + 2];
struct armv7m_algorithm alg_info;
-----------------------------------------------------------------------
Summary of changes:
src/flash/nor/rp2040.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
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From: OpenOCD-Gerrit <ope...@us...> - 2022-09-27 08:48:32
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 931b357466ba029d9984ade1f1598371e20871f4 (commit)
from 53611d8055d1130a925010b3feb39c7c8fa20a14 (commit)
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- Log -----------------------------------------------------------------
commit 931b357466ba029d9984ade1f1598371e20871f4
Author: Tomas Vanek <va...@fb...>
Date: Wed Sep 21 07:46:15 2022 +0200
flash/nor/rp2040: check target halted before flash operation
Flash read_id/erase/write operation on running target failed
in target_run_algorithm() anyway. It generated lot of error messages.
Check the target state and bail out early if target is running.
Change-Id: I903f5f38c8e61016e5002b235e5f07803bd2ec4e
Signed-off-by: Tomas Vanek <va...@fb...>
Reviewed-on: https://review.openocd.org/c/openocd/+/7215
Tested-by: jenkins
Reviewed-by: Antonio Borneo <bor...@gm...>
Reviewed-by: Jonathan Bell <jon...@ra...>
diff --git a/src/flash/nor/rp2040.c b/src/flash/nor/rp2040.c
index 7cc6434ff..f131a3039 100644
--- a/src/flash/nor/rp2040.c
+++ b/src/flash/nor/rp2040.c
@@ -211,6 +211,12 @@ static int rp2040_flash_write(struct flash_bank *bank, const uint8_t *buffer, ui
struct rp2040_flash_bank *priv = bank->driver_priv;
struct target *target = bank->target;
+
+ if (target->state != TARGET_HALTED) {
+ LOG_ERROR("Target not halted");
+ return ERROR_TARGET_NOT_HALTED;
+ }
+
struct working_area *bounce = NULL;
int err = rp2040_stack_grab_and_prep(bank);
@@ -266,6 +272,13 @@ cleanup:
static int rp2040_flash_erase(struct flash_bank *bank, unsigned int first, unsigned int last)
{
struct rp2040_flash_bank *priv = bank->driver_priv;
+ struct target *target = bank->target;
+
+ if (target->state != TARGET_HALTED) {
+ LOG_ERROR("Target not halted");
+ return ERROR_TARGET_NOT_HALTED;
+ }
+
uint32_t start_addr = bank->sectors[first].offset;
uint32_t length = bank->sectors[last].offset + bank->sectors[last].size - start_addr;
LOG_DEBUG("RP2040 erase %d bytes starting at 0x%" PRIx32, length, start_addr);
@@ -294,7 +307,7 @@ static int rp2040_flash_erase(struct flash_bank *bank, unsigned int first, unsig
*/
int timeout_ms = 2000 * (last - first) + 1000;
- err = rp2040_call_rom_func(bank->target, priv, priv->jump_flash_range_erase,
+ err = rp2040_call_rom_func(target, priv, priv->jump_flash_range_erase,
args, ARRAY_SIZE(args), timeout_ms);
cleanup:
@@ -362,6 +375,11 @@ static int rp2040_flash_probe(struct flash_bank *bank)
struct rp2040_flash_bank *priv = bank->driver_priv;
struct target *target = bank->target;
+ if (target->state != TARGET_HALTED) {
+ LOG_ERROR("Target not halted");
+ return ERROR_TARGET_NOT_HALTED;
+ }
+
int err = rp2040_lookup_symbol(target, FUNC_DEBUG_TRAMPOLINE, &priv->jump_debug_trampoline);
if (err != ERROR_OK) {
LOG_ERROR("Debug trampoline not found in RP2040 ROM.");
-----------------------------------------------------------------------
Summary of changes:
src/flash/nor/rp2040.c | 20 +++++++++++++++++++-
1 file changed, 19 insertions(+), 1 deletion(-)
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From: OpenOCD-Gerrit <ope...@us...> - 2022-09-27 08:42:24
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
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from 84d73d0225407594ed9cf646fa3dd8a5752df7ad (commit)
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- Log -----------------------------------------------------------------
commit 53611d8055d1130a925010b3feb39c7c8fa20a14
Author: Tomas Vanek <va...@fb...>
Date: Wed Sep 21 06:32:21 2022 +0200
flash/nor/rp2040: fix flash erase timeout
SPI flash erase often takes longer than the fixed timeout 3 seconds.
Introduce a configurable timeout_ms parameter to rp2040_call_rom_func().
Compute the erase timeout from the number of blocks to be erased.
While on it make the timeouts shorter for connect flash, flush cache and
enter/exit xip (1 second is enough).
Change-Id: I552bfa317ee17064de3a54ec2f0c63e84ba87222
Signed-off-by: Tomas Vanek <va...@fb...>
Reviewed-on: https://review.openocd.org/c/openocd/+/7214
Tested-by: jenkins
Reviewed-by: Antonio Borneo <bor...@gm...>
Reviewed-by: Jonathan Bell <jon...@ra...>
diff --git a/src/flash/nor/rp2040.c b/src/flash/nor/rp2040.c
index ce09fea08..7cc6434ff 100644
--- a/src/flash/nor/rp2040.c
+++ b/src/flash/nor/rp2040.c
@@ -87,7 +87,7 @@ static uint32_t rp2040_lookup_symbol(struct target *target, uint32_t tag, uint16
}
static int rp2040_call_rom_func(struct target *target, struct rp2040_flash_bank *priv,
- uint16_t func_offset, uint32_t argdata[], unsigned int n_args)
+ uint16_t func_offset, uint32_t argdata[], unsigned int n_args, int timeout_ms)
{
char *regnames[4] = { "r0", "r1", "r2", "r3" };
@@ -127,7 +127,7 @@ static int rp2040_call_rom_func(struct target *target, struct rp2040_flash_bank
0, NULL, /* No memory arguments */
n_args + 1, args, /* User arguments + r7 */
priv->jump_debug_trampoline, priv->jump_debug_trampoline_end,
- 3000, /* 3s timeout */
+ timeout_ms,
&alg_info
);
for (unsigned int i = 0; i < n_args + 2; ++i)
@@ -153,14 +153,14 @@ static int rp2040_finalize_stack_free(struct flash_bank *bank)
* chip select following a rp2040_flash_exit_xip().
*/
LOG_DEBUG("Flushing flash cache after write behind");
- int err = rp2040_call_rom_func(target, priv, priv->jump_flush_cache, NULL, 0);
+ int err = rp2040_call_rom_func(target, priv, priv->jump_flush_cache, NULL, 0, 1000);
if (err != ERROR_OK) {
LOG_ERROR("Failed to flush flash cache");
/* Intentionally continue after error and try to setup xip anyway */
}
LOG_DEBUG("Configuring SSI for execute-in-place");
- err = rp2040_call_rom_func(target, priv, priv->jump_enter_cmd_xip, NULL, 0);
+ err = rp2040_call_rom_func(target, priv, priv->jump_enter_cmd_xip, NULL, 0, 1000);
if (err != ERROR_OK)
LOG_ERROR("Failed to set SSI to XIP mode");
@@ -189,14 +189,14 @@ static int rp2040_stack_grab_and_prep(struct flash_bank *bank)
}
LOG_DEBUG("Connecting internal flash");
- err = rp2040_call_rom_func(target, priv, priv->jump_connect_internal_flash, NULL, 0);
+ err = rp2040_call_rom_func(target, priv, priv->jump_connect_internal_flash, NULL, 0, 1000);
if (err != ERROR_OK) {
LOG_ERROR("Failed to connect internal flash");
return err;
}
LOG_DEBUG("Kicking flash out of XIP mode");
- err = rp2040_call_rom_func(target, priv, priv->jump_flash_exit_xip, NULL, 0);
+ err = rp2040_call_rom_func(target, priv, priv->jump_flash_exit_xip, NULL, 0, 1000);
if (err != ERROR_OK) {
LOG_ERROR("Failed to exit flash XIP mode");
return err;
@@ -243,7 +243,8 @@ static int rp2040_flash_write(struct flash_bank *bank, const uint8_t *buffer, ui
bounce->address, /* data */
write_size /* count */
};
- err = rp2040_call_rom_func(target, priv, priv->jump_flash_range_program, args, ARRAY_SIZE(args));
+ err = rp2040_call_rom_func(target, priv, priv->jump_flash_range_program,
+ args, ARRAY_SIZE(args), 3000);
if (err != ERROR_OK) {
LOG_ERROR("Failed to invoke flash programming code on target");
break;
@@ -292,7 +293,9 @@ static int rp2040_flash_erase(struct flash_bank *bank, unsigned int first, unsig
an optional larger "block" (size and command provided in args).
*/
- err = rp2040_call_rom_func(bank->target, priv, priv->jump_flash_range_erase, args, ARRAY_SIZE(args));
+ int timeout_ms = 2000 * (last - first) + 1000;
+ err = rp2040_call_rom_func(bank->target, priv, priv->jump_flash_range_erase,
+ args, ARRAY_SIZE(args), timeout_ms);
cleanup:
rp2040_finalize_stack_free(bank);
-----------------------------------------------------------------------
Summary of changes:
src/flash/nor/rp2040.c | 19 +++++++++++--------
1 file changed, 11 insertions(+), 8 deletions(-)
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From: OpenOCD-Gerrit <ope...@us...> - 2022-09-27 08:40:33
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
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from 47ed1c1eab82ee329915e04ea61f857dae89fc6a (commit)
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- Log -----------------------------------------------------------------
commit 84d73d0225407594ed9cf646fa3dd8a5752df7ad
Author: Tomas Vanek <va...@fb...>
Date: Sun Sep 11 12:11:31 2022 +0200
flash/nor/rp2040: fix size of flash write buffer
The size of the flash write buffer should be rounded
down to the multiply of flash page size.
Using write chunks of unadjusted size results in write of chunks
unaligned to flash pages.
Change-Id: If7931362ee193dff4dc2df7ec78f13530658cf08
Signed-off-by: Tomas Vanek <va...@fb...>
Reviewed-on: https://review.openocd.org/c/openocd/+/7187
Tested-by: jenkins
Reviewed-by: Antonio Borneo <bor...@gm...>
diff --git a/src/flash/nor/rp2040.c b/src/flash/nor/rp2040.c
index 1c57424f9..ce09fea08 100644
--- a/src/flash/nor/rp2040.c
+++ b/src/flash/nor/rp2040.c
@@ -217,7 +217,11 @@ static int rp2040_flash_write(struct flash_bank *bank, const uint8_t *buffer, ui
if (err != ERROR_OK)
goto cleanup;
- const unsigned int chunk_size = target_get_working_area_avail(target);
+ unsigned int avail_pages = target_get_working_area_avail(target) / priv->dev->pagesize;
+ /* We try to allocate working area rounded down to device page size,
+ * al least 1 page, at most the write data size
+ */
+ unsigned int chunk_size = MIN(MAX(avail_pages, 1) * priv->dev->pagesize, count);
err = target_alloc_working_area(target, chunk_size, &bounce);
if (err != ERROR_OK) {
LOG_ERROR("Could not allocate bounce buffer for flash programming. Can't continue");
-----------------------------------------------------------------------
Summary of changes:
src/flash/nor/rp2040.c | 6 +++++-
1 file changed, 5 insertions(+), 1 deletion(-)
hooks/post-receive
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Main OpenOCD repository
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From: OpenOCD-Gerrit <ope...@us...> - 2022-09-27 08:39:21
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
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- Log -----------------------------------------------------------------
commit 47ed1c1eab82ee329915e04ea61f857dae89fc6a
Author: Tomas Vanek <va...@fb...>
Date: Sun Sep 11 11:18:29 2022 +0200
flash/nor/rp2040: fix memory leak of target stack workarea
While on it restore memory-mapped mode also after flash erase
(originally was restored after flash write only).
Change-Id: I5e153b79ac27a8439f57239ce90ce8a79c0bb8a1
Signed-off-by: Tomas Vanek <va...@fb...>
Reviewed-on: https://review.openocd.org/c/openocd/+/7186
Tested-by: jenkins
Reviewed-by: Antonio Borneo <bor...@gm...>
diff --git a/src/flash/nor/rp2040.c b/src/flash/nor/rp2040.c
index ba21d1c0f..1c57424f9 100644
--- a/src/flash/nor/rp2040.c
+++ b/src/flash/nor/rp2040.c
@@ -138,6 +138,43 @@ static int rp2040_call_rom_func(struct target *target, struct rp2040_flash_bank
}
+/* Finalize flash write/erase/read ID
+ * - flush cache
+ * - enters memory-mapped (XIP) mode to make flash data visible
+ * - deallocates target ROM func stack if previously allocated
+ */
+static int rp2040_finalize_stack_free(struct flash_bank *bank)
+{
+ struct rp2040_flash_bank *priv = bank->driver_priv;
+ struct target *target = bank->target;
+
+ /* Always flush before returning to execute-in-place, to invalidate stale
+ * cache contents. The flush call also restores regular hardware-controlled
+ * chip select following a rp2040_flash_exit_xip().
+ */
+ LOG_DEBUG("Flushing flash cache after write behind");
+ int err = rp2040_call_rom_func(target, priv, priv->jump_flush_cache, NULL, 0);
+ if (err != ERROR_OK) {
+ LOG_ERROR("Failed to flush flash cache");
+ /* Intentionally continue after error and try to setup xip anyway */
+ }
+
+ LOG_DEBUG("Configuring SSI for execute-in-place");
+ err = rp2040_call_rom_func(target, priv, priv->jump_enter_cmd_xip, NULL, 0);
+ if (err != ERROR_OK)
+ LOG_ERROR("Failed to set SSI to XIP mode");
+
+ target_free_working_area(target, priv->stack);
+ priv->stack = NULL;
+ return err;
+}
+
+/* Prepare flash write/erase/read ID
+ * - allocates a stack for target ROM func
+ * - switches the SPI interface from memory-mapped mode to direct command mode
+ * Always pair with a call of rp2040_finalize_stack_free()
+ * after flash operation finishes or fails.
+ */
static int rp2040_stack_grab_and_prep(struct flash_bank *bank)
{
struct rp2040_flash_bank *priv = bank->driver_priv;
@@ -154,14 +191,14 @@ static int rp2040_stack_grab_and_prep(struct flash_bank *bank)
LOG_DEBUG("Connecting internal flash");
err = rp2040_call_rom_func(target, priv, priv->jump_connect_internal_flash, NULL, 0);
if (err != ERROR_OK) {
- LOG_ERROR("RP2040 erase: failed to connect internal flash");
+ LOG_ERROR("Failed to connect internal flash");
return err;
}
LOG_DEBUG("Kicking flash out of XIP mode");
err = rp2040_call_rom_func(target, priv, priv->jump_flash_exit_xip, NULL, 0);
if (err != ERROR_OK) {
- LOG_ERROR("RP2040 erase: failed to exit flash XIP mode");
+ LOG_ERROR("Failed to exit flash XIP mode");
return err;
}
@@ -174,16 +211,17 @@ static int rp2040_flash_write(struct flash_bank *bank, const uint8_t *buffer, ui
struct rp2040_flash_bank *priv = bank->driver_priv;
struct target *target = bank->target;
- struct working_area *bounce;
+ struct working_area *bounce = NULL;
int err = rp2040_stack_grab_and_prep(bank);
if (err != ERROR_OK)
- return err;
+ goto cleanup;
const unsigned int chunk_size = target_get_working_area_avail(target);
- if (target_alloc_working_area(target, chunk_size, &bounce) != ERROR_OK) {
+ err = target_alloc_working_area(target, chunk_size, &bounce);
+ if (err != ERROR_OK) {
LOG_ERROR("Could not allocate bounce buffer for flash programming. Can't continue");
- return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
+ goto cleanup;
}
LOG_DEBUG("Allocated flash bounce buffer @" TARGET_ADDR_FMT, bounce->address);
@@ -211,23 +249,12 @@ static int rp2040_flash_write(struct flash_bank *bank, const uint8_t *buffer, ui
offset += write_size;
count -= write_size;
}
+
+cleanup:
target_free_working_area(target, bounce);
- if (err != ERROR_OK)
- return err;
+ rp2040_finalize_stack_free(bank);
- /* Flash is successfully programmed. We can now do a bit of poking to make the flash
- contents visible to us via memory-mapped (XIP) interface in the 0x1... memory region */
- LOG_DEBUG("Flushing flash cache after write behind");
- err = rp2040_call_rom_func(bank->target, priv, priv->jump_flush_cache, NULL, 0);
- if (err != ERROR_OK) {
- LOG_ERROR("RP2040 write: failed to flush flash cache");
- return err;
- }
- LOG_DEBUG("Configuring SSI for execute-in-place");
- err = rp2040_call_rom_func(bank->target, priv, priv->jump_enter_cmd_xip, NULL, 0);
- if (err != ERROR_OK)
- LOG_ERROR("RP2040 write: failed to flush flash cache");
return err;
}
@@ -240,7 +267,7 @@ static int rp2040_flash_erase(struct flash_bank *bank, unsigned int first, unsig
int err = rp2040_stack_grab_and_prep(bank);
if (err != ERROR_OK)
- return err;
+ goto cleanup;
LOG_DEBUG("Remote call flash_range_erase");
@@ -258,11 +285,14 @@ static int rp2040_flash_erase(struct flash_bank *bank, unsigned int first, unsig
https://github.com/raspberrypi/pico-bootrom/blob/master/bootrom/program_flash_generic.c
In theory, the function algorithm provides for erasing both a smaller "sector" (4096 bytes) and
- an optional larger "block" (size and command provided in args). OpenOCD's spi.c only uses "block" sizes.
+ an optional larger "block" (size and command provided in args).
*/
err = rp2040_call_rom_func(bank->target, priv, priv->jump_flash_range_erase, args, ARRAY_SIZE(args));
+cleanup:
+ rp2040_finalize_stack_free(bank);
+
return err;
}
@@ -376,11 +406,13 @@ static int rp2040_flash_probe(struct flash_bank *bank)
}
err = rp2040_stack_grab_and_prep(bank);
- if (err != ERROR_OK)
- return err;
uint32_t device_id = 0;
- err = rp2040_spi_read_flash_id(target, &device_id);
+ if (err == ERROR_OK)
+ err = rp2040_spi_read_flash_id(target, &device_id);
+
+ rp2040_finalize_stack_free(bank);
+
if (err != ERROR_OK)
return err;
-----------------------------------------------------------------------
Summary of changes:
src/flash/nor/rp2040.c | 82 +++++++++++++++++++++++++++++++++++---------------
1 file changed, 57 insertions(+), 25 deletions(-)
hooks/post-receive
--
Main OpenOCD repository
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|
From: OpenOCD-Gerrit <ope...@us...> - 2022-09-27 08:34:15
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via d25f0ae263f89a362f35b316a11a48428312344c (commit)
from 5f14140953ebf94dafa1150f8c7d3aeeff769bb7 (commit)
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- Log -----------------------------------------------------------------
commit d25f0ae263f89a362f35b316a11a48428312344c
Author: Tomas Vanek <va...@fb...>
Date: Sun Sep 11 10:47:03 2022 +0200
flash/nor/rp2040: preparatory refactoring
Prepend stack_grab_and_prep() function name by rp2040_ prefix.
Introduce target helper variable in rp2040_stack_grab_and_prep()
and use it instead of dereferencing bank->target several times.
Move flash ID reading code to the new rp2040_spi_read_flash_id()
function.
Change-Id: I9d6e51e17e36e6230155a586065499f2f260089a
Signed-off-by: Tomas Vanek <va...@fb...>
Reviewed-on: https://review.openocd.org/c/openocd/+/7185
Tested-by: jenkins
Reviewed-by: Antonio Borneo <bor...@gm...>
diff --git a/src/flash/nor/rp2040.c b/src/flash/nor/rp2040.c
index 667498ca3..ba21d1c0f 100644
--- a/src/flash/nor/rp2040.c
+++ b/src/flash/nor/rp2040.c
@@ -138,27 +138,28 @@ static int rp2040_call_rom_func(struct target *target, struct rp2040_flash_bank
}
-static int stack_grab_and_prep(struct flash_bank *bank)
+static int rp2040_stack_grab_and_prep(struct flash_bank *bank)
{
struct rp2040_flash_bank *priv = bank->driver_priv;
+ struct target *target = bank->target;
/* target_alloc_working_area always allocates multiples of 4 bytes, so no worry about alignment */
const int STACK_SIZE = 256;
- int err = target_alloc_working_area(bank->target, STACK_SIZE, &priv->stack);
+ int err = target_alloc_working_area(target, STACK_SIZE, &priv->stack);
if (err != ERROR_OK) {
LOG_ERROR("Could not allocate stack for flash programming code");
return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
}
LOG_DEBUG("Connecting internal flash");
- err = rp2040_call_rom_func(bank->target, priv, priv->jump_connect_internal_flash, NULL, 0);
+ err = rp2040_call_rom_func(target, priv, priv->jump_connect_internal_flash, NULL, 0);
if (err != ERROR_OK) {
LOG_ERROR("RP2040 erase: failed to connect internal flash");
return err;
}
LOG_DEBUG("Kicking flash out of XIP mode");
- err = rp2040_call_rom_func(bank->target, priv, priv->jump_flash_exit_xip, NULL, 0);
+ err = rp2040_call_rom_func(target, priv, priv->jump_flash_exit_xip, NULL, 0);
if (err != ERROR_OK) {
LOG_ERROR("RP2040 erase: failed to exit flash XIP mode");
return err;
@@ -175,7 +176,7 @@ static int rp2040_flash_write(struct flash_bank *bank, const uint8_t *buffer, ui
struct target *target = bank->target;
struct working_area *bounce;
- int err = stack_grab_and_prep(bank);
+ int err = rp2040_stack_grab_and_prep(bank);
if (err != ERROR_OK)
return err;
@@ -237,7 +238,7 @@ static int rp2040_flash_erase(struct flash_bank *bank, unsigned int first, unsig
uint32_t length = bank->sectors[last].offset + bank->sectors[last].size - start_addr;
LOG_DEBUG("RP2040 erase %d bytes starting at 0x%" PRIx32, length, start_addr);
- int err = stack_grab_and_prep(bank);
+ int err = rp2040_stack_grab_and_prep(bank);
if (err != ERROR_OK)
return err;
@@ -289,6 +290,36 @@ static int rp2040_ssel_active(struct target *target, bool active)
return ERROR_OK;
}
+static int rp2040_spi_read_flash_id(struct target *target, uint32_t *devid)
+{
+ uint32_t device_id = 0;
+ const target_addr_t ssi_dr0 = 0x18000060;
+
+ int err = rp2040_ssel_active(target, true);
+
+ /* write RDID request into SPI peripheral's FIFO */
+ for (int count = 0; (count < 4) && (err == ERROR_OK); count++)
+ err = target_write_u32(target, ssi_dr0, SPIFLASH_READ_ID);
+
+ /* by this time, there is a receive FIFO entry for every write */
+ for (int count = 0; (count < 4) && (err == ERROR_OK); count++) {
+ uint32_t status;
+ err = target_read_u32(target, ssi_dr0, &status);
+
+ device_id >>= 8;
+ device_id |= (status & 0xFF) << 24;
+ }
+
+ if (err == ERROR_OK)
+ *devid = device_id >> 8;
+
+ int err2 = rp2040_ssel_active(target, false);
+ if (err2 != ERROR_OK)
+ LOG_ERROR("SSEL inactive failed");
+
+ return err;
+}
+
static int rp2040_flash_probe(struct flash_bank *bank)
{
struct rp2040_flash_bank *priv = bank->driver_priv;
@@ -344,34 +375,14 @@ static int rp2040_flash_probe(struct flash_bank *bank)
return err;
}
- err = stack_grab_and_prep(bank);
+ err = rp2040_stack_grab_and_prep(bank);
if (err != ERROR_OK)
return err;
uint32_t device_id = 0;
- const target_addr_t ssi_dr0 = 0x18000060;
-
- err = rp2040_ssel_active(target, true);
-
- /* write RDID request into SPI peripheral's FIFO */
- for (int count = 0; (count < 4) && (err == ERROR_OK); count++)
- err = target_write_u32(target, ssi_dr0, SPIFLASH_READ_ID);
-
- /* by this time, there is a receive FIFO entry for every write */
- for (int count = 0; (count < 4) && (err == ERROR_OK); count++) {
- uint32_t status;
- err = target_read_u32(target, ssi_dr0, &status);
-
- device_id >>= 8;
- device_id |= (status & 0xFF) << 24;
- }
- device_id >>= 8;
-
- err = rp2040_ssel_active(target, false);
- if (err != ERROR_OK) {
- LOG_ERROR("SSEL inactive failed");
+ err = rp2040_spi_read_flash_id(target, &device_id);
+ if (err != ERROR_OK)
return err;
- }
/* search for a SPI flash Device ID match */
priv->dev = NULL;
-----------------------------------------------------------------------
Summary of changes:
src/flash/nor/rp2040.c | 69 +++++++++++++++++++++++++++++---------------------
1 file changed, 40 insertions(+), 29 deletions(-)
hooks/post-receive
--
Main OpenOCD repository
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|
From: OpenOCD-Gerrit <ope...@us...> - 2022-09-27 08:29:23
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 5f14140953ebf94dafa1150f8c7d3aeeff769bb7 (commit)
via b2f6b231177240af6693340e4e00d16c1e512692 (commit)
from 60abbda8bcb19e26e073605ec43fdd0f42416567 (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
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- Log -----------------------------------------------------------------
commit 5f14140953ebf94dafa1150f8c7d3aeeff769bb7
Author: Tomas Vanek <va...@fb...>
Date: Wed Sep 21 13:54:01 2022 +0200
target/adi_v5_swd: suppress reconnect in swd_multidrop_select()
swd_multidrop_select() uses its own retry loop.
If select fails, do_reconnect flag remains set on exit and causes
useless reconnect.
Clear do_reconnect flag in retry loop.
Change-Id: Ie06d6967d7f4a977774c8530bb8d4b3e5ab4f62c
Signed-off-by: Tomas Vanek <va...@fb...>
Reviewed-on: https://review.openocd.org/c/openocd/+/7217
Reviewed-by: Antonio Borneo <bor...@gm...>
Reviewed-by: Jonathan Bell <jon...@ra...>
Tested-by: jenkins
diff --git a/src/target/adi_v5_swd.c b/src/target/adi_v5_swd.c
index bd85eb217..aea730d4d 100644
--- a/src/target/adi_v5_swd.c
+++ b/src/target/adi_v5_swd.c
@@ -272,6 +272,8 @@ static int swd_multidrop_select(struct adiv5_dap *dap)
LOG_DEBUG("Failed to select multidrop %s, retrying...",
adiv5_dap_name(dap));
+ /* we going to retry localy, do not ask for full reconnect */
+ dap->do_reconnect = false;
}
return retval;
commit b2f6b231177240af6693340e4e00d16c1e512692
Author: Tomas Vanek <va...@fb...>
Date: Tue Sep 20 18:55:51 2022 +0200
target/adi_v5_swd: fix SWD multidrop
Implementation of ADI v6 introduced banking of DP reg 0.
The accompanying change preventing DP SELECT write before
DP IDR read during connect was added to swd_connect_single() only.
Unchanged swd_connect_multidrop() / swd_multidrop_select_inner()
was broken as it emited DP SELECT and put DP to protocol error state.
Copy dap->select handling to swd_multidrop_select_inner().
Fixes: 72fb88613f02 (adiv6: add low level swd transport)
Change-Id: I514cd6d9ae2ba97ce3657b459df22638c278a0b1
Signed-off-by: Tomas Vanek <va...@fb...>
Reviewed-on: https://review.openocd.org/c/openocd/+/7213
Tested-by: jenkins
Reviewed-by: Antonio Borneo <bor...@gm...>
Reviewed-by: Jonathan Bell <jon...@ra...>
diff --git a/src/target/adi_v5_swd.c b/src/target/adi_v5_swd.c
index 979c643e9..bd85eb217 100644
--- a/src/target/adi_v5_swd.c
+++ b/src/target/adi_v5_swd.c
@@ -177,6 +177,19 @@ static int swd_multidrop_select_inner(struct adiv5_dap *dap, uint32_t *dpidr_ptr
assert(dap_is_multidrop(dap));
swd_send_sequence(dap, LINE_RESET);
+ /* From ARM IHI 0074C ADIv6.0, chapter B4.3.3 "Connection and line reset
+ * sequence":
+ * - line reset sets DP_SELECT_DPBANK to zero;
+ * - read of DP_DPIDR takes the connection out of reset;
+ * - write of DP_TARGETSEL keeps the connection in reset;
+ * - other accesses return protocol error (SWDIO not driven by target).
+ *
+ * Read DP_DPIDR to get out of reset. Initialize dap->select to zero to
+ * skip the write to DP_SELECT, avoiding the protocol error. Set again
+ * dap->select to DP_SELECT_INVALID because the rest of the register is
+ * unknown after line reset.
+ */
+ dap->select = 0;
retval = swd_queue_dp_write_inner(dap, DP_TARGETSEL, dap->multidrop_targetsel);
if (retval != ERROR_OK)
@@ -196,6 +209,8 @@ static int swd_multidrop_select_inner(struct adiv5_dap *dap, uint32_t *dpidr_ptr
return retval;
}
+ dap->select = DP_SELECT_INVALID;
+
retval = swd_queue_dp_read_inner(dap, DP_DLPIDR, &dlpidr);
if (retval != ERROR_OK)
return retval;
@@ -342,6 +357,7 @@ static int swd_connect_single(struct adiv5_dap *dap)
dap->switch_through_dormant = !dap->switch_through_dormant;
} while (timeval_ms() < timeout);
+
dap->select = DP_SELECT_INVALID;
if (retval != ERROR_OK) {
-----------------------------------------------------------------------
Summary of changes:
src/target/adi_v5_swd.c | 18 ++++++++++++++++++
1 file changed, 18 insertions(+)
hooks/post-receive
--
Main OpenOCD repository
|
|
From: OpenOCD-Gerrit <ope...@us...> - 2022-09-23 21:27:59
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 60abbda8bcb19e26e073605ec43fdd0f42416567 (commit)
from 1293ddd65713d6551775b67169387622ada477c1 (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit 60abbda8bcb19e26e073605ec43fdd0f42416567
Author: Tomas Vanek <va...@fb...>
Date: Mon Aug 15 11:15:43 2022 +0200
target/stm32l5x,stm32u5x: fix trace settings
The STM32L5 and U5 devices have DBGMCU_CR trace related bits changed
wrt other STM32 devices.
Fix the setting in configuration script.
Change-Id: I0bbc48e7b1290b603c6966cf5ddd42df389e6ede
Signed-off-by: Tomas Vanek <va...@fb...>
Reviewed-on: https://review.openocd.org/c/openocd/+/7117
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tar...@gm...>
Reviewed-by: Antonio Borneo <bor...@gm...>
diff --git a/tcl/target/stm32x5x_common.cfg b/tcl/target/stm32x5x_common.cfg
index c506e224b..321abff80 100644
--- a/tcl/target/stm32x5x_common.cfg
+++ b/tcl/target/stm32x5x_common.cfg
@@ -152,10 +152,11 @@ lappend _telnet_autocomplete_skip _proc_pre_enable_$_CHIPNAME.tpiu
proc _proc_pre_enable_$_CHIPNAME.tpiu {_targetname} {
targets $_targetname
- # Set TRACE_IOEN; TRACE_MODE is set to async; when using sync
- # change this value accordingly to configure trace pins
+ # Set TRACE_EN and TRACE_IOEN in DBGMCU_CR
+ # Leave TRACE_MODE untouched (defaults to async).
+ # When using sync change this value accordingly to configure trace pins
# assignment
- mmw 0xE0044004 0x00000020 0
+ mmw 0xE0044004 0x00000030 0
}
$_CHIPNAME.tpiu configure -event pre-enable "_proc_pre_enable_$_CHIPNAME.tpiu $_TARGETNAME"
-----------------------------------------------------------------------
Summary of changes:
tcl/target/stm32x5x_common.cfg | 7 ++++---
1 file changed, 4 insertions(+), 3 deletions(-)
hooks/post-receive
--
Main OpenOCD repository
|
|
From: OpenOCD-Gerrit <ope...@us...> - 2022-09-23 21:27:20
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 1293ddd65713d6551775b67169387622ada477c1 (commit)
from 53d17e790128803a0fed453c4945c07b3377c4d3 (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
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- Log -----------------------------------------------------------------
commit 1293ddd65713d6551775b67169387622ada477c1
Author: Daniel Goehring <dgo...@os...>
Date: Wed Sep 21 17:17:04 2022 -0600
target/target: read_memory 64-bit bugfix
Increase "value_buf" size so it can hold a 64-bit number represented
as a string. Previous size could only hold a 32-bit number string.
Signed-off-by: Daniel Goehring <dgo...@os...>
Change-Id: If6fbc875236e6ddc59522fbc25db0129eb60ee27
Reviewed-on: https://review.openocd.org/c/openocd/+/7221
Tested-by: jenkins
Reviewed-by: Tomas Vanek <va...@fb...>
Reviewed-by: Antonio Borneo <bor...@gm...>
diff --git a/src/target/target.c b/src/target/target.c
index 794ee2f01..783159fec 100644
--- a/src/target/target.c
+++ b/src/target/target.c
@@ -4717,7 +4717,7 @@ static int target_jim_read_memory(Jim_Interp *interp, int argc,
break;
}
- char value_buf[11];
+ char value_buf[19];
snprintf(value_buf, sizeof(value_buf), "0x%" PRIx64, v);
Jim_ListAppendElement(interp, result_list,
-----------------------------------------------------------------------
Summary of changes:
src/target/target.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
hooks/post-receive
--
Main OpenOCD repository
|
