openocd-commit — OpenOCD commit maling list - read only

[Openocd-svn] r1418 - in trunk: doc src/jtag src/target/board

[<oh...@ma...>]

Author: oharboe
Date: 2009-03-19 16:51:28 +0100 (Thu, 19 Mar 2009)
New Revision: 1418

Modified:
   trunk/doc/openocd.texi
   trunk/src/jtag/jtag.c
   trunk/src/target/board/stm32f10x_128k_eval.cfg
Log:
Thomas Kindler <mai...@t-...> typos

Modified: trunk/doc/openocd.texi
===================================================================
--- trunk/doc/openocd.texi	2009-03-18 11:59:31 UTC (rev 1417)
+++ trunk/doc/openocd.texi	2009-03-19 15:51:28 UTC (rev 1418)
@@ -70,11 +70,11 @@
 * Sample Scripts::                   Sample Target Scripts
 * TFTP::                             TFTP
 * GDB and OpenOCD::                  Using GDB and OpenOCD
-* TCL scripting API::                Tcl scripting API
+* Tcl scripting API::                Tcl scripting API
 * Upgrading::                        Deprecated/Removed Commands
 * Target library::                   Target library
 * FAQ::                              Frequently Asked Questions
-* TCL Crash Course::                 TCL Crash Course
+* Tcl Crash Course::                 Tcl Crash Course
 * License::                          GNU Free Documentation License
 @comment DO NOT use the plain word ``Index'', reason: CYGWIN filename
 @comment case issue with ``Index.html'' and ``index.html''
@@ -92,14 +92,14 @@
 devices.
 
 @b{JTAG:} OpenOCD uses a ``hardware interface dongle'' to communicate
-with the JTAG (IEEE 1149.1) complient taps on your target board.
+with the JTAG (IEEE 1149.1) compliant taps on your target board.
 
-@b{Dongles:} OpenOCD currently many types of hardware dongles: USB
+@b{Dongles:} OpenOCD currently supports many types of hardware dongles: USB
 Based, Parallel Port Based, and other standalone boxes that run
 OpenOCD internally. See the section titled: @xref{JTAG Hardware Dongles}.
 
-@b{GDB Debug:} It allows ARM7 (ARM7TDMI and ARM720t), ARM9 (ARM920t,
-ARM922t, ARM926ej--s, ARM966e--s), XScale (PXA25x, IXP42x) and
+@b{GDB Debug:} It allows ARM7 (ARM7TDMI and ARM720t), ARM9 (ARM920T,
+ARM922T, ARM926EJ--S, ARM966E--S), XScale (PXA25x, IXP42x) and
 Cortex-M3 (Luminary Stellaris LM3 and ST STM32) based cores to be
 debugged via the GDB Protocol.
 
@@ -139,9 +139,9 @@
 
 @enumerate
 @item @b{Sell dongles} and include pre-built binaries
-@item @b{Supply tools} ie: A complete development solution
+@item @b{Supply tools} i.e.: A complete development solution
 @item @b{Supply IDEs} like Eclipse, or RHIDE, etc.
-@item @b{Build packages} ie: RPM files, or DEB files for a Linux Distro
+@item @b{Build packages} i.e.: RPM files, or DEB files for a Linux Distro
 @end enumerate
 
 As a @b{PACKAGER} - you are at the top of the food chain. You solve
@@ -151,8 +151,8 @@
 suggestions:
 
 @enumerate
-@item @b{Always build with Printer Ports Enabled}
-@item @b{Try where possible to use LIBFTDI + LIBUSB} You cover more bases
+@item @b{Always build with printer ports enabled}.
+@item @b{Try to use LIBFTDI + LIBUSB where possible}. You cover more bases.
 @end enumerate
 
 It is your decision..
@@ -166,7 +166,7 @@
 @item @b{MORE} platforms are supported
 @item @b{MORE} complete solution
 @end itemize
-@item @b{Why not LIBFTDI + LIBUSB} (ie: ftd2xx instead)
+@item @b{Why not LIBFTDI + LIBUSB} (i.e.: ftd2xx instead)
 @itemize @bullet
 @item @b{LESS} Some say it is slower.
 @item @b{LESS} complex to distribute (external dependencies)
@@ -208,7 +208,7 @@
 homepage (@uref{www.amontec.com}), as the JTAGkey uses a non-standard VID/PID. 
 @end itemize
 
-libftdi is supported under windows. Do not use versions earlier then 0.14.
+libftdi is supported under Windows. Do not use versions earlier then 0.14.
 
 In general, the D2XX driver provides superior performance (several times as fast),
 but has the draw-back of being binary-only - though that isn't that bad, as it isn't
@@ -282,7 +282,7 @@
 FTDICHIP.COM closed source driver, or (2) the open (and free) driver
 libftdi. Some claim the (closed) FTDICHIP.COM solution is faster.
 
-The FTDICHIP drivers come as either a (win32) ZIP file, or a (linux)
+The FTDICHIP drivers come as either a (win32) ZIP file, or a (Linux)
 TAR.GZ file. You must unpack them ``some where'' convient. As of this
 writing (12/26/2008) FTDICHIP does not supply means to install these
 files ``in an appropriate place'' As a result, there are two
@@ -315,7 +315,7 @@
 
 Cygwin/Linux LIBFTDI solution
     Assumes: 
-    1a) For Windows: The windows port of LIBUSB is in place.
+    1a) For Windows: The Windows port of LIBUSB is in place.
     1b) For Linux: libusb has been built and is inplace.
 
     2) And libftdi has been built and installed
@@ -344,11 +344,11 @@
 @node JTAG Hardware Dongles
 @chapter JTAG Hardware Dongles
 @cindex dongles
-@cindex ftdi
+@cindex FTDI
 @cindex wiggler
 @cindex zy1000
 @cindex printer port
-@cindex usb adapter
+@cindex USB adapter
 @cindex rtck
 
 Defined: @b{dongle}: A small device that plugins into a computer and serves as
@@ -378,7 +378,7 @@
 
 @section USB FT2232 Based
 
-There are many USB jtag dongles on the market, many of them are based
+There are many USB JTAG dongles on the market, many of them are based
 on a chip from ``Future Technology Devices International'' (FTDI)
 known as the FTDI FT2232.
 
@@ -505,7 +505,7 @@
 @itemize @bullet
 
 @item @b{ep93xx}
-@* An EP93xx based linux machine using the GPIO pins directly.
+@* An EP93xx based Linux machine using the GPIO pins directly.
 
 @item @b{at91rm9200}
 @* Like the EP93xx - but an ATMEL AT91RM9200 based solution using the GPIO pins on the chip.
@@ -589,8 +589,8 @@
 
 @section Small configuration file method
 
-This is the prefered method, it is simple and is works well for many
-people.  The developers of OpenOCD would encourage you to use this
+This is the preferred method. It is simple and works well for many
+people. The developers of OpenOCD would encourage you to use this
 method. If you create a new configuration please email new
 configurations to the development list.
 
@@ -663,10 +663,10 @@
 Some key things you should look at and understand are:
 
 @enumerate
-@item The RESET configuration of your debug environment as a hole
+@item The RESET configuration of your debug environment as a whole
 @item Is there a ``work area'' that OpenOCD can use?
 @* For ARM - work areas mean up to 10x faster downloads.
-@item For MMU/MPU based ARM chips (ie: ARM9 and later) will that work area still be available?
+@item For MMU/MPU based ARM chips (i.e.: ARM9 and later) will that work area still be available?
 @item For complex targets (multiple chips) the JTAG SPEED becomes an issue.
 @end enumerate
 
@@ -679,26 +679,25 @@
 OpenOCD. These are guidelines for creating new boards and new target
 configurations as of 28/Nov/2008.
 
-However, you the user of OpenOCD should be some what familiar with
+However, you, the user of OpenOCD, should be somewhat familiar with
 this section as it should help explain some of the internals of what
 you might be looking at.
 
-The user should find under @t{$(INSTALLDIR)/lib/openocd} the
-following directories:
+The user should find the following directories under @t{$(INSTALLDIR)/lib/openocd} :
 
 @itemize @bullet
 @item @b{interface}
-@*Think JTAG Dongle. Files that configure the jtag dongle go here.
+@*Think JTAG Dongle. Files that configure the JTAG dongle go here.
 @item @b{board}
-@* Thing Circuit Board, PWA, PCB, they go by many names.  Board files
+@* Think Circuit Board, PWA, PCB, they go by many names.  Board files
 contain initialization items that are specific to a board - for
 example: The SDRAM initialization sequence for the board, or the type
 of external flash and what address it is found at. Any initialization
-sequence to enable that external flash or sdram should be found in the
-board file. Boards may also contain multiple targets, ie: Two cpus, or
+sequence to enable that external flash or SDRAM should be found in the
+board file. Boards may also contain multiple targets, i.e.: Two CPUs, or
 a CPU and an FPGA or CPLD.
 @item @b{target}
-@* Think CHIP. The ``target'' directory represents a jtag tap (or
+@* Think chip. The ``target'' directory represents a JTAG tap (or
 chip) OpenOCD should control, not a board. Two common types of targets
 are ARM chips and FPGA or CPLD chips.
 @end itemize
@@ -722,7 +721,7 @@
 today, that said, perhaps some interfaces have only been used by the
 sole developer who created it.
 
-@b{FIXME/NOTE:} We need to add support for a variable like TCL variable
+@b{FIXME/NOTE:} We need to add support for a variable like Tcl variable
 tcl_platform(platform), it should be called jim_platform (because it
 is jim, not real tcl) and it should contain 1 of 3 words: ``linux'',
 ``cygwin'' or ``mingw''
@@ -745,12 +744,12 @@
 The board file should contain one or more @t{source [find
 target/FOO.cfg]} statements along with any board specific things.
 
-In summery the board files should contain (if present)
+In summary the board files should contain (if present)
 
 @enumerate
-@item External flash configuration (ie: the flash on CS0)
-@item SDRAM configuration (size, speed, etc)
-@item Board specific IO configuration (ie: GPIO pins might disable a 2nd flash)
+@item External flash configuration (i.e.: the flash on CS0)
+@item SDRAM configuration (size, speed, etc.
+@item Board specific IO configuration (i.e.: GPIO pins might disable a 2nd flash)
 @item Multiple TARGET source statements
 @item All things that are not ``inside a chip''
 @item Things inside a chip go in a 'target' file
@@ -766,7 +765,7 @@
   openocd -f target/FOOBAR.cfg
 @end example
 
-In summery the target files should contain
+In summary the target files should contain
 
 @enumerate 
 @item Set Defaults
@@ -793,8 +792,8 @@
 @* When OpenOCD examines the JTAG chain, it will attempt to identify
 every chip. If the @t{-expected-id} is nonzero, OpenOCD attempts
 to verify the tap id number verses configuration file and may issue an
-error or warning like this. The hope is this will help pin point
-problem OpenOCD configurations.
+error or warning like this. The hope is that this will help to pinpoint
+problems in OpenOCD configurations.
 
 @example
 Info:   JTAG tap: sam7x256.cpu tap/device found: 0x3f0f0f0f (Manufacturer: 0x787, Part: 0xf0f0, Version: 0x3)
@@ -830,12 +829,12 @@
 
 @end itemize
 
-@subsection TCL Variables Guide Line
+@subsection Tcl Variables Guide Line
 The Full Tcl/Tk language supports ``namespaces'' - JIM-Tcl does not.
 
 Thus the rule we follow in OpenOCD is this: Variables that begin with
-a leading underscore are temporal in nature, and can be modified and
-used at will within a ?TARGET? configuration file
+a leading underscore are temporary in nature, and can be modified and
+used at will within a ?TARGET? configuration file.
 
 @b{EXAMPLE:} The user should be able to do this:
 
@@ -849,14 +848,14 @@
    source [find target/pxa270.cfg]
    # variable: _TARGETNAME = network.cpu
    # other commands can refer to the "network.cpu" tap.
-   $_TARGETNAME configure .... params for this cpu..
+   $_TARGETNAME configure .... params for this CPU..
    
    set ENDIAN little
    set CHIPNAME video
    source [find target/pxa270.cfg]
    # variable: _TARGETNAME = video.cpu
    # other commands can refer to the "video.cpu" tap.
-   $_TARGETNAME configure .... params for this cpu..
+   $_TARGETNAME configure .... params for this CPU..
    
    unset ENDIAN
    set CHIPNAME xilinx
@@ -896,7 +895,7 @@
 @end example
 
 @subsection Creating Taps
-After the ``defaults'' are choosen, [see above], the taps are created.
+After the ``defaults'' are choosen [see above] the taps are created.
 
 @b{SIMPLE example:} such as an Atmel AT91SAM7X256
 
@@ -943,7 +942,7 @@
 
 @b{Tap Naming Convention}
 
-See the command ``jtag newtap'' for detail, but in breif the names you should use are:
+See the command ``jtag newtap'' for detail, but in brief the names you should use are:
 
 @itemize @bullet
 @item @b{tap}
@@ -963,20 +962,20 @@
 @subsection Work Areas
 
 Work areas are small RAM areas used by OpenOCD to speed up downloads,
-and to download small snippits of code to program flash chips.  
+and to download small snippets of code to program flash chips.  
 
-If the chip includes an form of ``on-chip-ram'' - and many do - define
+If the chip includes a form of ``on-chip-ram'' - and many do - define
 a reasonable work area and use the ``backup'' option.
 
 @b{PROBLEMS:} On more complex chips, this ``work area'' may become
-inaccessable if/when the application code enables or disables the MMU.
+inaccessible if/when the application code enables or disables the MMU.
 
 @subsection ARM Core Specific Hacks
 
-If the chip has a DCC, enable it. If the chip is an arm9 with some
-special high speed download - enable it.
+If the chip has a DCC, enable it. If the chip is an ARM9 with some
+special high speed download features - enable it.
 
-If the chip has an ARM ``vector catch'' feature - by defeault enable
+If the chip has an ARM ``vector catch'' feature - by default enable
 it for Undefined Instructions, Data Abort, and Prefetch Abort, if the
 user is really writing a handler for those situations - they can
 easily disable it.  Experiance has shown the ``vector catch'' is
@@ -1010,31 +1009,31 @@
 learn more about JIM here: @url{http://jim.berlios.de}
 
 @itemize @bullet
-@item @b{JIM vrs TCL}
+@item @b{JIM vs. Tcl}
 @* JIM-TCL is a stripped down version of the well known Tcl language,
 which can be found here: @url{http://www.tcl.tk}. JIM-Tcl has far
 fewer features. JIM-Tcl is a single .C file and a single .H file and
-impliments the basic TCL command set along. In contrast: Tcl 8.6 is a
-4.2MEG zip file containing 1540 files.
+impliments the basic Tcl command set along. In contrast: Tcl 8.6 is a
+4.2 MB .zip file containing 1540 files.
 
 @item @b{Missing Features}
-@* Our practice has been: Add/clone the Real TCL feature if/when
+@* Our practice has been: Add/clone the real Tcl feature if/when
 needed. We welcome JIM Tcl improvements, not bloat.
 
 @item @b{Scripts}
 @* OpenOCD configuration scripts are JIM Tcl Scripts. OpenOCD's
-command interpretor today (28/nov/2008) is a mixture of (newer)
-JIM-Tcl commands, and (older) the orginal command interpretor.
+command interpreter today (28/nov/2008) is a mixture of (newer)
+JIM-Tcl commands, and (older) the orginal command interpreter.
 
 @item @b{Commands}
 @* At the OpenOCD telnet command line (or via the GDB mon command) one
 can type a Tcl for() loop, set variables, etc.
 
 @item @b{Historical Note}
-@* JIM-Tcl was introduced to OpenOCD in Spring 2008.
+@* JIM-Tcl was introduced to OpenOCD in spring 2008.
 
-@item @b{Need a Crash Course In TCL?}
-@* See: @xref{TCL Crash Course}.
+@item @b{Need a Crash Course In Tcl?}
+@* See: @xref{Tcl Crash Course}.
 @end itemize
 
 
@@ -1071,9 +1070,9 @@
 @item @b{tcl_port} <@var{number}>
 @cindex tcl_port
 @*Intended as a machine interface. Port on which to listen for
-incoming TCL syntax. This port is intended as a simplified RPC
+incoming Tcl syntax. This port is intended as a simplified RPC
 connection that can be used by clients to issue commands and get the
-output from the TCL engine.
+output from the Tcl engine.
 
 @item @b{gdb_port} <@var{number}>
 @cindex gdb_port
@@ -1089,7 +1088,7 @@
 @*Force breakpoint type for gdb 'break' commands.
 The raison d'etre for this option is to support GDB GUI's without 
 a hard/soft breakpoint concept where the default OpenOCD and
-GDB behaviour is not sufficient. Note that GDB will use hardware
+GDB behavior is not sufficient. Note that GDB will use hardware
 breakpoints if the memory map has been set up for flash regions.
 
 This option replaces older arm7_9 target commands that addressed
@@ -1097,16 +1096,16 @@
 
 @item @b{gdb_detach} <@var{resume|reset|halt|nothing}>
 @cindex gdb_detach
-@*Configures what OpenOCD will do when gdb detaches from the daemon.
-Default behaviour is <@var{resume}>
+@*Configures what OpenOCD will do when GDB detaches from the daemon.
+Default behavior is <@var{resume}>
 
 @item @b{gdb_memory_map} <@var{enable|disable}>
 @cindex gdb_memory_map
-@*Set to <@var{enable}> to cause OpenOCD to send the memory configuration to gdb when
-requested. gdb will then know when to set hardware breakpoints, and program flash
-using the gdb load command. @option{gdb_flash_program enable} will also need enabling
+@*Set to <@var{enable}> to cause OpenOCD to send the memory configuration to GDB when
+requested. GDB will then know when to set hardware breakpoints, and program flash
+using the GDB load command. @option{gdb_flash_program enable} must also be enabled 
 for flash programming to work.
-Default behaviour is <@var{enable}>
+Default behavior is <@var{enable}>
 @xref{gdb_flash_program}.
 
 @item @b{gdb_flash_program} <@var{enable|disable}>
@@ -1114,7 +1113,7 @@
 @anchor{gdb_flash_program}
 @*Set to <@var{enable}> to cause OpenOCD to program the flash memory when a
 vFlash packet is received.
-Default behaviour is <@var{enable}>
+Default behavior is <@var{enable}>
 @comment END GDB Items
 @end itemize
 
@@ -1153,10 +1152,10 @@
 @verbatim
 interface arm-jtag-ew
 @end verbatim
-@section Interface Conmmand
+@section Interface Command
 
-The interface command tells OpenOCD what type of jtag dongle you are
-using. Depending upon the type of dongle, you may need to have one or
+The interface command tells OpenOCD what type of JTAG dongle you are
+using. Depending on the type of dongle, you may need to have one or
 more additional commands.
 
 @itemize @bullet
@@ -1194,16 +1193,16 @@
 @* Gateworks GW16012 JTAG programmer.
 
 @item @b{jlink}
-@* Segger jlink usb adapter
+@* Segger jlink USB adapter
 
 @item @b{rlink}
-@* Raisonance RLink usb adapter
+@* Raisonance RLink USB adapter
 
 @item @b{vsllink}
 @* vsllink is part of Versaloon which is a versatile USB programmer.
 
 @item @b{arm-jtag-ew}
-@* Olimex ARM-JTAG-EW usb adapter
+@* Olimex ARM-JTAG-EW USB adapter
 @comment - End parameters
 @end itemize
 @comment - End Interface
@@ -1283,7 +1282,7 @@
 specified, the FTDI default value is used. This setting is only valid
 if compiled with FTD2XX support.
 
-@b{TODO:} Confirm the following: On windows the name needs to end with
+@b{TODO:} Confirm the following: On Windows the name needs to end with
 a ``space A''? Or not? It has to do with the FTD2xx driver. When must
 this be added and when must it not be added? Why can't the code in the
 interface or in OpenOCD automatically add this if needed? -- Duane.
@@ -1300,7 +1299,7 @@
 @item @b{usbjtag}
 "USBJTAG-1" layout described in the original OpenOCD diploma thesis
 @item @b{jtagkey}
-Amontec JTAGkey and JTAGkey-tiny
+Amontec JTAGkey and JTAGkey-Tiny
 @item @b{signalyzer}
 Signalyzer
 @item @b{olimex-jtag}
@@ -1326,17 +1325,17 @@
 
 @item @b{ft2232_vid_pid} <@var{vid}> <@var{pid}>
 @*The vendor ID and product ID of the FTDI FT2232 device. If not specified, the FTDI
-default values are used. Multiple <@var{vid}>, <@var{pid}> pairs may be given, eg.
+default values are used. Multiple <@var{vid}>, <@var{pid}> pairs may be given, e.g.
 @example
 ft2232_vid_pid 0x0403 0xcff8 0x15ba 0x0003
 @end example
 @item @b{ft2232_latency} <@var{ms}>
-@*On some systems using ft2232 based JTAG interfaces the FT_Read function call in
+@*On some systems using FT2232 based JTAG interfaces the FT_Read function call in
 ft2232_read() fails to return the expected number of bytes. This can be caused by
 USB communication delays and has proved hard to reproduce and debug. Setting the
-FT2232 latency timer to a larger value increases delays for short USB packages but it
+FT2232 latency timer to a larger value increases delays for short USB packets but it
 also reduces the risk of timeouts before receiving the expected number of bytes.
-The OpenOCD default value is 2 and for some systems a value of 10 has proved useful. 
+The OpenOCD default value is 2 and for some systems a value of 10 has proved useful.
 @end itemize
 
 @subsection ep93xx options
@@ -1349,9 +1348,9 @@
 @cindex jtag_khz
 
 It is debatable if this command belongs here - or in a board
-configuration file. In fact, in some situations the jtag speed is
-changed during the target initialization process (ie: (1) slow at
-reset, (2) program the cpu clocks, (3) run fast)
+configuration file. In fact, in some situations the JTAG speed is
+changed during the target initialization process (i.e.: (1) slow at
+reset, (2) program the CPU clocks, (3) run fast)
 
 Speed 0 (khz) selects RTCK method. A non-zero speed is in KHZ. Hence: 3000 is 3mhz. 
 
@@ -1359,11 +1358,11 @@
 support the rate asked for, or can not translate from kHz to
 jtag_speed, then an error is returned.
 
-Make sure the jtag clock is no more than @math{1/6th CPU-Clock}. This is
+Make sure the JTAG clock is no more than @math{1/6th CPU-Clock}. This is
 especially true for synthesized cores (-S). Also see RTCK.
 
 @b{NOTE: Script writers} If the target chip requires/uses RTCK -
-please use the command: 'jtag_rclk FREQ'. This TCL proc (in
+please use the command: 'jtag_rclk FREQ'. This Tcl proc (in
 startup.tcl) attempts to enable RTCK, if that fails it falls back to
 the specified frequency.
 
@@ -1372,7 +1371,7 @@
     jtag_rclk 3000
 @end example
 
-@item @b{DEPRICATED} @b{jtag_speed} - please use jtag_khz above.
+@item @b{DEPRECATED} @b{jtag_speed} - please use jtag_khz above.
 @cindex jtag_speed
 @*Limit the maximum speed of the JTAG interface. Usually, a value of zero means maximum
 speed. The actual effect of this option depends on the JTAG interface used. 
@@ -1416,7 +1415,7 @@
 
 @section reset_config
 
-@b{Note:} To maintainer types and integrators. Where exactly the
+@b{Note:} To maintainer and integrators: Where exactly the
 ``reset configuration'' goes is a good question. It touches several
 things at once. In the end, if you have a board file - the board file
 should define it and assume 100% that the DONGLE supports
@@ -1426,17 +1425,17 @@
 
 @* @b{Problems:} 
 @enumerate
-@item Every JTAG Dongle is slightly different, some dongles impliment reset differently.
+@item Every JTAG Dongle is slightly different, some dongles implement reset differently.
 @item Every board is also slightly different; some boards tie TRST and SRST together.
 @item Every chip is slightly different; some chips internally tie the two signals together.
-@item Some may not impliment all of the signals the same way.
+@item Some may not implement all of the signals the same way.
 @item Some signals might be push-pull, others open-drain/collector.
 @end enumerate
 @b{Best Case:} OpenOCD can hold the SRST (push-button-reset), then
 reset the TAP via TRST and send commands through the JTAG tap to halt
 the CPU at the reset vector before the 1st instruction is executed,
 and finally release the SRST signal.
-@*Depending upon your board vendor, your chip vendor, etc, these
+@*Depending on your board vendor, chip vendor, etc., these
 signals may have slightly different names. 
 
 OpenOCD defines these signals in these terms:
@@ -1459,12 +1458,12 @@
 
 [@var{combination}] is an optional value specifying broken reset
 signal implementations.  @option{srst_pulls_trst} states that the
-testlogic is reset together with the reset of the system (e.g. Philips
+test logic is reset together with the reset of the system (e.g. Philips
 LPC2000, "broken" board layout), @option{trst_pulls_srst} says that
 the system is reset together with the test logic (only hypothetical, I
 haven't seen hardware with such a bug, and can be worked around).
-@option{combined} imples both @option{srst_pulls_trst} and
-@option{trst_pulls_srst}.  The default behaviour if no option given is
+@option{combined} implies both @option{srst_pulls_trst} and
+@option{trst_pulls_srst}.  The default behavior if no option given is
 @option{separate}.
 
 The [@var{trst_type}] and [@var{srst_type}] parameters allow the
@@ -1498,7 +1497,7 @@
 @itemize @bullet
 @item @b{Debug Target} A tap can be used by a GDB debug target
 @item @b{Flash Programing} Some chips program the flash via JTAG
-@item @b{Boundry Scan} Some chips support boundry scan.
+@item @b{Boundry Scan} Some chips support boundary scan.
 @end itemize
 
 
@@ -1529,7 +1528,7 @@
 the size of the IR.
 @comment END REQUIRED
 @end itemize
-An example of a FOOBAR Tap
+An example of a FOOBAR tap
 @example
 jtag newtap foobar tap -irlen 7 -ircapture 0x42 -irmask 0x55
 @end example
@@ -1542,12 +1541,12 @@
 @itemize @bullet
 @item @b{-expected-id NUMBER}
 @* By default it is zero. If non-zero represents the
-expected tap ID used when the Jtag Chain is examined. See below.
+expected tap ID used when the JTAG chain is examined. See below.
 @item @b{-disable}
 @item @b{-enable}
 @* By default not specified the tap is enabled. Some chips have a
-jtag route controller (JRC) that is used to enable and/or disable
-specific jtag taps. You can later enable or disable any JTAG tap via
+JTAG route controller (JRC) that is used to enable and/or disable
+specific JTAG taps. You can later enable or disable any JTAG tap via
 the command @b{jtag tapenable DOTTED.NAME} or @b{jtag tapdisable 
 DOTTED.NAME}
 @comment END Optional
@@ -1562,22 +1561,22 @@
 @* newtap is a sub command of the ``jtag'' command
 @item @b{Big Picture Background}
 @*GDB Talks to OpenOCD using the GDB protocol via
-tcpip. OpenOCD then uses the JTAG interface (the dongle) to
+TCP/IP. OpenOCD then uses the JTAG interface (the dongle) to
 control the JTAG chain on your board. Your board has one or more chips
 in a @i{daisy chain configuration}. Each chip may have one or more
-jtag taps. GDB ends up talking via OpenOCD to one of the taps.
+JTAG taps. GDB ends up talking via OpenOCD to one of the taps.
 @item @b{NAME Rules}
 @*Names follow ``C'' symbol name rules (start with alpha ...)
 @item @b{TAPNAME - Conventions}
 @itemize @bullet
 @item @b{tap} - should be used only FPGA or CPLD like devices with a single tap.
-@item @b{cpu} - the main cpu of the chip, alternatively @b{foo.arm} and @b{foo.dsp}
+@item @b{cpu} - the main CPU of the chip, alternatively @b{foo.arm} and @b{foo.dsp}
 @item @b{flash} - if the chip has a flash tap, example: str912.flash
 @item @b{bs} - for boundary scan if this is a seperate tap.
-@item @b{jrc} - for jtag route controller (example: OMAP3530 found on Beagleboards)
+@item @b{jrc} - for JTAG route controller (example: OMAP3530 found on Beagleboards)
 @item @b{unknownN} - where N is a number if you have no idea what the tap is for
 @item @b{Other names} - Freescale IMX31 has a SDMA (smart dma) with a JTAG tap, that tap should be called the ``sdma'' tap.
-@item @b{When in doubt} - use the chip makers name in their data sheet.
+@item @b{When in doubt} - use the chip maker's name in their data sheet.
 @end itemize
 @item @b{DOTTED.NAME}
 @* @b{CHIPNAME}.@b{TAPNAME} creates the tap name, aka: the
@@ -1591,12 +1590,12 @@
 @item @b{Multi Tap Example}
 @* This example is based on the ST Microsystems STR912. See the ST
 document titled: @b{STR91xFAxxx, Section 3.15 Jtag Interface, Page:
-28/102, Figure 3: Jtag chaining inside the STR91xFA}.
+28/102, Figure 3: JTAG chaining inside the STR91xFA}.
 
 @url{http://eu.st.com/stonline/products/literature/ds/13495.pdf}
 @*@b{checked: 28/nov/2008}
 
-The diagram shows the TDO pin connects to the flash tap, flash TDI
+The diagram shows that the TDO pin connects to the flash tap, flash TDI
 connects to the CPU debug tap, CPU TDI connects to the boundary scan
 tap which then connects to the TDI pin.
 
@@ -1631,7 +1630,7 @@
 @* @b{Removed: 28/nov/2008} This command has been removed and replaced
 by the ``jtag newtap'' command. The documentation remains here so that
 one can easily convert the old syntax to the new syntax. About the old
-syntax: The old syntax is positional, ie: The 3rd parameter is the
+syntax: The old syntax is positional, i.e.: The 3rd parameter is the
 ``irmask''. The new syntax requires named prefixes, and supports
 additional options, for example ``-expected-id 0x3f0f0f0f''. Please refer to the
 @b{jtag newtap} command for details.
@@ -1657,20 +1656,20 @@
 @cindex JRC
 @cindex route controller
 
-These commands are used when your target has a JTAG Route controller
-that effectively adds or removes a tap from the jtag chain in a
+These commands are used when your target has a JTAG route controller
+that effectively adds or removes a tap from the JTAG chain in a
 non-standard way.
 
 The ``standard way'' to remove a tap would be to place the tap in
 bypass mode. But with the advent of modern chips, this is not always a
 good solution. Some taps operate slowly, others operate fast, and
-there are other JTAG clock syncronization problems one must face. To
-solve that problem, the JTAG Route controller was introduced. Rather
-then ``bypass'' the tap, the tap is completely removed from the
+there are other JTAG clock synchronization problems one must face. To
+solve that problem, the JTAG route controller was introduced. Rather
+than ``bypass'' the tap, the tap is completely removed from the
 circuit and skipped.
 
 
-From OpenOCD's view point, a JTAG TAP is in one of 3 states:
+From OpenOCD's point of view, a JTAG tap is in one of 3 states:
 
 @itemize @bullet
 @item @b{Enabled - Not In ByPass} and has a variable bit length
@@ -1685,15 +1684,15 @@
 
 This command returns 1 if the named tap is currently enabled, 0 if not.
 This command exists so that scripts that manipulate a JRC (like the
-Omap3530 has) can determine if OpenOCD thinks a tap is presently
-enabled, or disabled.
+OMAP3530 has) can determine if OpenOCD thinks a tap is presently
+enabled or disabled.
 
 @page
 @node Target Configuration
 @chapter Target Configuration
 
-This chapter discusses how to create a GDB Debug Target.  Before
-creating a ``target'' a JTAG Tap DOTTED.NAME must exist first.
+This chapter discusses how to create a GDB debug target.  Before
+creating a ``target'' a JTAG tap DOTTED.NAME must exist first.
 
 @section targets [NAME]
 @b{Note:} This command name is PLURAL - not singular.  
@@ -1701,8 +1700,8 @@
 With NO parameter, this plural @b{targets} command lists all known
 targets in a human friendly form.
 
-With a parameter, this pural @b{targets} command sets the current
-target to the given name. (ie: If there are multiple debug targets)
+With a parameter, this plural @b{targets} command sets the current
+target to the given name. (i.e.: If there are multiple debug targets)
 
 Example:
 @verbatim
@@ -1722,7 +1721,7 @@
 The TARGET command accepts these sub-commands:
 @itemize @bullet
 @item @b{create} .. parameters ..
-@* creates a new target, See below for details.
+@* creates a new target, see below for details.
 @item @b{types}
 @* Lists all supported target types (perhaps some are not yet in this document).
 @item @b{names}
@@ -1768,8 +1767,8 @@
 
 @b{Model:} The Tcl/Tk language has the concept of object commands. A
 good example is a on screen button, once a button is created a button
-has a name (a path in TK terms) and that name is useable as a 1st
-class command. For example in TK, one can create a button and later
+has a name (a path in Tk terms) and that name is useable as a 1st
+class command. For example in Tk, one can create a button and later
 configure it like this:
 
 @example
@@ -1784,13 +1783,13 @@
 @end example
     
 In OpenOCD's terms, the ``target'' is an object just like a Tcl/Tk
-button. Commands avaialble as a ``target object'' are:
+button. Commands available as a ``target object'' are:
 
 @comment START targetobj commands.
 @itemize @bullet
 @item @b{configure} - configure the target; see Target Config/Cget Options below
 @item @b{cget} - query the target configuration; see Target Config/Cget Options below
-@item @b{curstate} - current target state (running, halt, etc)
+@item @b{curstate} - current target state (running, halt, etc.
 @item @b{eventlist}
 @* Intended for a human to see/read the currently configure target events.
 @item @b{Various Memory Commands} See the ``mww'' command elsewhere.
@@ -1845,7 +1844,7 @@
 via ``$_TARGETNAME configure'' see this example.
 
 Syntactially, the option is: ``-event NAME BODY'' where NAME is a
-target event name, and BODY is a tcl procedure or string of commands
+target event name, and BODY is a Tcl procedure or string of commands
 to execute. 
 
 The programmers model is the ``-command'' option used in Tcl/Tk
@@ -1865,9 +1864,9 @@
 The following events are available:
 @itemize @bullet
 @item @b{debug-halted}
-@* The target has halted for debug reasons (ie: breakpoint)
+@* The target has halted for debug reasons (i.e.: breakpoint)
 @item @b{debug-resumed}
-@* The target has resumed (ie: gdb said run)
+@* The target has resumed (i.e.: gdb said run)
 @item @b{early-halted}
 @* Occurs early in the halt process
 @item @b{examine-end}
@@ -1889,7 +1888,7 @@
 @item @b{gdb-flash-write-end}
 @* After GDB writes to the flash
 @item @b{gdb-start}
-@* Before the taret steps, gdb is trying to start/resume the tarfget
+@* Before the taret steps, gdb is trying to start/resume the target
 @item @b{halted}
 @* The target has halted
 @item @b{old-gdb_program_config}
@@ -1960,7 +1959,7 @@
 DOTTED.NAME, this name is also used to create the target object
 command.
 @item @b{TYPE}
-@* Specifies the target type, ie: arm7tdmi, or cortexM3. Currently supported targes are:
+@* Specifies the target type, i.e.: ARM7TDMI, or Cortex-M3. Currently supported targets are:
 @comment START types
 @itemize @minus
 @item @b{arm7tdmi}
@@ -1978,8 +1977,7 @@
 @comment end TYPES
 @end itemize
 @item @b{PARAMS}
-@*PARAMs are various target configure parameters, the following are mandatory
-at configuration:
+@*PARAMs are various target configuration parameters. The following ones are mandatory:
 @comment START mandatory
 @itemize @bullet
 @item @b{-endian big|little}
@@ -2000,7 +1998,7 @@
 @item @b{-work-area-size [ADDRESS]} specify/set the work area
 @item @b{-work-area-backup [0|1]} does the work area get backed up
 @item @b{-endian  [big|little]} 
-@item @b{-variant [NAME]} some chips have varients OpenOCD needs to know about
+@item @b{-variant [NAME]} some chips have variants OpenOCD needs to know about
 @item @b{-chain-position DOTTED.NAME} the tap name this target refers to.
 @end itemize
 Example:
@@ -2013,14 +2011,14 @@
   @}
 @end example
 
-@section Target Varients
+@section Target Variants
 @itemize @bullet
 @item @b{arm7tdmi}
 @* Unknown (please write me)
 @item @b{arm720t}
-@* Unknown (please write me) (simular to arm7tdmi)
+@* Unknown (please write me) (similar to arm7tdmi)
 @item @b{arm9tdmi}
-@* Varients: @option{arm920t}, @option{arm922t} and @option{arm940t}
+@* Variants: @option{arm920t}, @option{arm922t} and @option{arm940t}
 This enables the hardware single-stepping support found on these
 cores.
 @item @b{arm920t}
@@ -2028,10 +2026,10 @@
 @item @b{arm966e}
 @* None (this is also used as the ARM946)
 @item @b{cortex_m3}
-@* use variant <@var{-variant lm3s}> when debugging luminary lm3s targets. This will cause
+@* use variant <@var{-variant lm3s}> when debugging Luminary lm3s targets. This will cause
 OpenOCD to use a software reset rather than asserting SRST to avoid a issue with clearing
 the debug registers. This is fixed in Fury Rev B, DustDevil Rev B, Tempest, these revisions will
-be detected and the normal reset behaviour used.
+be detected and the normal reset behavior used.
 @item @b{xscale}
 @* Supported variants are @option{ixp42x}, @option{ixp45x}, @option{ixp46x},@option{pxa250}, @option{pxa255}, @option{pxa26x}.
 @item @b{arm11}
@@ -2042,7 +2040,7 @@
 OpenOCD to instead use an EJTAG software reset command to reset the
 processor.  You still need to enable @option{srst} on the reset
 configuration command to enable OpenOCD hardware reset functionality.
-@comment END varients
+@comment END variants
 @end itemize
 @section working_area - Command Removed
 @cindex working_area
@@ -2068,7 +2066,7 @@
 @cindex Flash Configuration
 
 @b{Note:} As of 28/nov/2008 OpenOCD does not know how to program a SPI
-flash that a micro may boot from. Perhaps you the reader would like to
+flash that a micro may boot from. Perhaps you, the reader, would like to
 contribute support for this.
 
 Flash Steps:
@@ -2081,7 +2079,7 @@
 flash on your board.
 @item GDB Flashing
 @* Flashing via GDB requires the flash be configured via ``flash
-bank'', and the GDB flash features be enabled. See the Daemon
+bank'', and the GDB flash features be enabled. See the daemon
 configuration section for more details.
 @end enumerate
 
@@ -2175,16 +2173,16 @@
 
 @subsection External Flash - cfi options
 @cindex cfi options
-CFI flash are external flash chips - often they are connected to a
-specific chip select on the micro. By default at hard reset most
-micros have the ablity to ``boot'' from some flash chip - typically
-attached to the chips CS0 pin.
+CFI flashes are external flash chips - often they are connected to a
+specific chip select on the CPU. By default, at hard reset, most
+CPUs have the ablity to ``boot'' from some flash chip - typically
+attached to the CPU's CS0 pin.
 
 For other chip selects: OpenOCD does not know how to configure, or
-access a specific chip select. Instead you the human might need to via
-other commands (like: mww) configure additional chip selects, or
+access a specific chip select. Instead you, the human, might need to 
+configure additional chip selects via other commands (like: mww) , or
 perhaps configure a GPIO pin that controls the ``write protect'' pin
-on the FLASH chip.
+on the flash chip.
 
 @b{flash bank cfi} <@var{base}> <@var{size}> <@var{chip_width}> <@var{bus_width}>
 <@var{target#}> [@var{jedec_probe}|@var{x16_as_x8}]
@@ -2194,11 +2192,11 @@
 
 @var{chip_width} and @var{bus_width} are specified in bytes.
 
-The @var{jedec_probe} option is used to detect certain non-CFI flash roms, like AM29LV010 and similar types.
+The @var{jedec_probe} option is used to detect certain non-CFI flash ROMs, like AM29LV010 and similar types.
 
 @var{x16_as_x8} ???
 
-@subsection Internal Flash (Micro Controllers)
+@subsection Internal Flash (Microcontrollers)
 @subsubsection lpc2000 options
 @cindex lpc2000 options
 
@@ -2230,7 +2228,7 @@
 @cindex str9 options
 
 @b{flash bank str9x} <@var{base}> <@var{size}> 0 0 <@var{target#}>
-@*The str9 needs the flash controller to be configured prior to Flash programming, eg.
+@*The str9 needs the flash controller to be configured prior to Flash programming, e.g.
 @example
 str9x flash_config 0 4 2 0 0x80000
 @end example
@@ -2239,17 +2237,17 @@
 @subsubsection str9 options (str9xpec driver)
 
 @b{flash bank str9xpec} <@var{base}> <@var{size}> 0 0 <@var{target#}>
-@*Before using the flash commands the turbo mode will need enabling using str9xpec
+@*Before using the flash commands the turbo mode must be enabled using str9xpec
 @option{enable_turbo} <@var{num>.}
 
 Only use this driver for locking/unlocking the device or configuring the option bytes.
 Use the standard str9 driver for programming. @xref{STR9 specific commands}.
 
-@subsubsection stellaris (LM3Sxxx) options
-@cindex stellaris (LM3Sxxx) options
+@subsubsection Stellaris (LM3Sxxx) options
+@cindex Stellaris (LM3Sxxx) options
 
 @b{flash bank stellaris} <@var{base}> <@var{size}> 0 0 <@var{target#}>
-@*stellaris flash plugin only require the @var{target#}. 
+@*Stellaris flash plugin only require the @var{target#}. 
 
 @subsubsection stm32x options
 @cindex stm32x options
@@ -2283,12 +2281,12 @@
 mflash bank pxa270 0x08000000 2 2 43 -1 51 0  
 @end example
 
-@section Micro Controller Specific Flash Commands
+@section Microcontroller specific flash commands
 
 @subsection AT91SAM7 specific commands
 @cindex AT91SAM7 specific commands
 The flash configuration is deduced from the chip identification register. The flash
-controller handles erases automatically on a page (128/265 byte) basis so erase is
+controller handles erases automatically on a page (128/265 byte) basis, so erase is
 not necessary for flash programming. AT91SAM7 processors with less than 512K flash
 only have a single flash bank embedded on chip. AT91SAM7xx512 have two flash planes
 that can be erased separatly. Only an EraseAll command is supported by the controller
@@ -2308,11 +2306,11 @@
 @itemize @bullet
 @item @b{str9xpec enable_turbo} <@var{num}>
 @cindex str9xpec enable_turbo
-@*enable turbo mode, simply this will remove the str9 from the chain and talk
+@*enable turbo mode, will simply remove the str9 from the chain and talk
 directly to the embedded flash controller. 
 @item @b{str9xpec disable_turbo} <@var{num}>
 @cindex str9xpec disable_turbo
-@*restore the str9 into jtag chain. 
+@*restore the str9 into JTAG chain. 
 @item @b{str9xpec lock} <@var{num}>
 @cindex str9xpec lock
 @*lock str9 device. The str9 will only respond to an unlock command that will
@@ -2336,13 +2334,13 @@
 Standard driver @option{str9x} programmed via the str9 core. Normally used for
 flash programming as it is faster than the @option{str9xpec} driver.
 @item
-Direct programming @option{str9xpec} using the flash controller, this is
+Direct programming @option{str9xpec} using the flash controller. This is an
 ISC compilant (IEEE 1532) tap connected in series with the str9 core. The str9
 core does not need to be running to program using this flash driver. Typical use
 for this driver is locking/unlocking the target and programming the option bytes.
 @end enumerate
 
-Before we run any cmds using the @option{str9xpec} driver we must first disable
+Before we run any commands using the @option{str9xpec} driver we must first disable
 the str9 core. This example assumes the @option{str9xpec} driver has been
 configured for flash bank 0.
 @example
@@ -2363,7 +2361,7 @@
 The above example will read the str9 option bytes.
 When performing a unlock remember that you will not be able to halt the str9 - it
 has been locked. Halting the core is not required for the @option{str9xpec} driver
-as mentioned above, just issue the cmds above manually or from a telnet prompt.
+as mentioned above, just issue the commands above manually or from a telnet prompt.
 
 @subsection STR9 configuration
 @cindex STR9 configuration
@@ -2373,7 +2371,7 @@
 @cindex str9x flash_config
 @*Configure str9 flash controller.
 @example
-eg. str9x flash_config 0 4 2 0 0x80000
+e.g. str9x flash_config 0 4 2 0 0x80000
 This will setup
 BBSR - Boot Bank Size register
 NBBSR - Non Boot Bank Size register
@@ -2433,12 +2431,12 @@
 @end itemize
 
  
-@node General Commands
-@chapter General Commands
+@node General commands
+@chapter General commands
 @cindex commands
 
 The commands documented in this chapter here are common commands that
-you a human may want to type and see the output of. Configuration type
+you, as a human, may want to type and see the output of. Configuration type
 commands are documented elsewhere.
 
 Intent:
@@ -2446,10 +2444,10 @@
 @item @b{Source Of Commands}
 @* OpenOCD commands can occur in a configuration script (discussed
 elsewhere) or typed manually by a human or supplied programatically,
-or via one of several Tcp/Ip Ports.
+or via one of several TCP/IP Ports.
 
 @item @b{From the human}
-@* A human should interact with the Telnet interface (default port: 4444,
+@* A human should interact with the telnet interface (default port: 4444,
 or via GDB, default port 3333)
 
 To issue commands from within a GDB session, use the @option{monitor}
@@ -2457,7 +2455,7 @@
 command. All output is relayed through the GDB session.
 
 @item @b{Machine Interface}
-The TCL interface intent is to be a machine interface. The default TCL
+The Tcl interface's intent is to be a machine interface. The default Tcl
 port is 5555.
 @end itemize
 
@@ -2471,7 +2469,7 @@
 
 @subsection shutdown
 @cindex shutdown
-@*Close the OpenOCD daemon, disconnecting all clients (GDB, Telnet, Other). 
+@*Close the OpenOCD daemon, disconnecting all clients (GDB, telnet, other). 
 
 @subsection debug_level [@var{n}]
 @cindex debug_level
@@ -2480,13 +2478,13 @@
 
 @subsection fast [@var{enable|disable}]
 @cindex fast
-@*Default disabled. Set default behaviour of OpenOCD to be "fast and dangerous". For instance ARM7/9 DCC memory
+@*Default disabled. Set default behavior of OpenOCD to be "fast and dangerous". For instance ARM7/9 DCC memory
 downloads and fast memory access will work if the JTAG interface isn't too fast and
 the core doesn't run at a too low frequency. Note that this option only changes the default
 and that the indvidual options, like DCC memory downloads, can be enabled and disabled
 individually. 
 
-The target specific "dangerous" optimisation tweaking options may come and go
+The target specific "dangerous" optimization tweaking options may come and go
 as more robust and user friendly ways are found to ensure maximum throughput
 and robustness with a minimum of configuration. 
 
@@ -2503,7 +2501,7 @@
 @subsection script <@var{file}>
 @cindex script
 @*Execute commands from <file> 
-Also see: ``source [find FILENAME]''
+See also: ``source [find FILENAME]''
 
 @section Target state handling
 @subsection power <@var{on}|@var{off}>
@@ -2516,8 +2514,8 @@
 @cindex reg
 @*Access a single register by its number[@option{#}] or by its [@option{name}].
 No arguments: list all available registers for the current target.
-Number or name argument: display a register
-Number or name and value arguments: set register value
+Number or name argument: display a register.
+Number or name and value arguments: set register value.
 
 @subsection poll [@option{on}|@option{off}]
 @cindex poll
@@ -2536,7 +2534,7 @@
 @cindex wait_halt
 @*Wait for the target to enter debug mode. Optional [@option{ms}] is
 a timeout in milliseconds. Default [@option{ms}] is 5 seconds if no
-arg given.
+arg is given.
 
 @subsection resume [@var{address}]
 @cindex resume
@@ -2567,18 +2565,18 @@
 
 @subsection soft_reset_halt
 @cindex reset
-@*Requesting target halt and executing a soft reset.  This often used
+@*Requesting target halt and executing a soft reset. This is often used
 when a target cannot be reset and halted. The target, after reset is
 released begins to execute code. OpenOCD attempts to stop the CPU and
-then sets the Program counter back at the reset vector. Unfortunatlly
-that code that was executed may have left hardware in an unknown
+then sets the program counter back to the reset vector. Unfortunately
+the code that was executed may have left the hardware in an unknown
 state.
 
 
 @section Memory access commands
 @subsection meminfo
-display available ram memory.
-@subsection Memory Peek/Poke type commands
+display available RAM memory.
+@subsection Memory peek/poke type commands
 These commands allow accesses of a specific size to the memory
 system. Often these are used to configure the current target in some
 special way. For example - one may need to write certian values to the
@@ -2586,7 +2584,7 @@
 
 @enumerate
 @item To change the current target see the ``targets'' (plural) command
-@item In system level scripts these commands are depricated, please use the TARGET object versions.
+@item In system level scripts these commands are deprecated, please use the TARGET object versions.
 @end enumerate
 
 @itemize @bullet
@@ -2610,7 +2608,7 @@
 @*write memory byte (8bit)
 @end itemize
 
-@section Image Loading Commands
+@section Image loading commands
 @subsection load_image
 @b{load_image} <@var{file}> <@var{address}> [@option{bin}|@option{ihex}|@option{elf}]
 @cindex load_image
@@ -2621,18 +2619,18 @@
 @cindex fast_load_image
 @anchor{fast_load_image}
 @*Normally you should be using @b{load_image} or GDB load. However, for
-testing purposes or when IO overhead is significant(OpenOCD running on embedded
-host), then storing the image in memory and uploading the image to the target
+testing purposes or when I/O overhead is significant(OpenOCD running on an embedded
+host), storing the image in memory and uploading the image to the target
 can be a way to upload e.g. multiple debug sessions when the binary does not change.
-Arguments as @b{load_image}, but image is stored in OpenOCD host
+Arguments are the same as @b{load_image}, but the image is stored in OpenOCD host
 memory, i.e. does not affect target.  This approach is also useful when profiling
-target programming performance as IO and target programming can easily be profiled
-seperately.
+target programming performance as I/O and target programming can easily be profiled
+separately.
 @subsection fast_load
 @b{fast_load}
 @cindex fast_image
 @anchor{fast_image}
-@*Loads image stored in memory by @b{fast_load_image} to current target. Must be preceeded by fast_load_image.
+@*Loads an image stored in memory by @b{fast_load_image} to the current target. Must be preceeded by fast_load_image.
 @subsection dump_image
 @b{dump_image} <@var{file}> <@var{address}> <@var{size}>
 @cindex dump_image
@@ -2643,7 +2641,7 @@
 @b{verify_image} <@var{file}> <@var{address}> [@option{bin}|@option{ihex}|@option{elf}]
 @cindex verify_image
 @*Verify <@var{file}> against target memory starting at <@var{address}>.
-This will first attempt comparison using a crc checksum, if this fails it will try a binary compare.
+This will first attempt a comparison using a CRC checksum, if this fails it will try a binary compare.
 
 
 @section Breakpoint commands
@@ -2663,21 +2661,22 @@
 @*remove watchpoint <adress>
 @end itemize
 
-@section Misc Commands
-@cindex Other Target Commands
+@section Misc commands
+@cindex Other target commands
 @itemize
 @item @b{profile} <@var{seconds}> <@var{gmon.out}>
 
-Profiling samples the CPU PC as quickly as OpenOCD is able, which will be used as a random sampling of PC.
+Profiling samples the CPU's program counter as quickly as possible, which is useful for non-intrusive stochastic profiling.
+
 @end itemize
 
-@section Target Specific Commands
-@cindex Target Specific Commands
+@section Target specific commands
+@cindex Target specific commands
 
 
 @page
-@section Architecture Specific Commands
-@cindex Architecture Specific Commands
+@section Architecture specific commands
+@cindex Architecture specific commands
 
 @subsection ARMV4/5 specific commands
 @cindex ARMV4/5 specific commands
@@ -2700,7 +2699,7 @@
 @cindex ARM7/9 specific commands
 
 These commands are specific to ARM7 and ARM9 targets, like ARM7TDMI, ARM720t,
-ARM920t or ARM926EJ-S.
+ARM920T or ARM926EJ-S.
 @itemize @bullet
 @item @b{arm7_9 dbgrq} <@var{enable}|@var{disable}>
 @cindex arm7_9 dbgrq
@@ -2711,13 +2710,13 @@
 @anchor{arm7_9 fast_memory_access}
 @*Allow OpenOCD to read and write memory without checking completion of
 the operation. This provides a huge speed increase, especially with USB JTAG
-cables (FT2232), but might be unsafe if used with targets running at a very low
-speed, like the 32kHz startup clock of an AT91RM9200. 
+cables (FT2232), but might be unsafe if used with targets running at very low
+speeds, like the 32kHz startup clock of an AT91RM9200. 
 @item @b{arm7_9 dcc_downloads} <@var{enable}|@var{disable}>
 @cindex arm7_9 dcc_downloads
 @*Enable the use of the debug communications channel (DCC) to write larger (>128 byte)
 amounts of memory. DCC downloads offer a huge speed increase, but might be potentially
-unsafe, especially with targets running at a very low speed. This command was introduced
+unsafe, especially with targets running at very low speeds. This command was introduced
 with OpenOCD rev. 60. 
 @end itemize
 
@@ -2749,7 +2748,7 @@
 @option{reset} @option{undef} @option{swi} @option{pabt} @option{dabt} @option{reserved}
 @option{irq} @option{fiq}.
 
-Can also be used on other arm9 based cores, arm966, arm920t and arm926ejs.
+Can also be used on other ARM9 based cores such as ARM966, ARM920T and ARM926EJ-S.
 @end itemize
 
 @subsection ARM966E specific commands
@@ -2773,8 +2772,8 @@
 @*display/modify cp15 (interpreted access) <@option{opcode}> [@option{value}] [@option{address}]
 @item @b{arm920t cache_info}
 @cindex arm920t cache_info
-@*Print information about the caches found. This allows you to see if your target
-is a ARM920T (2x16kByte cache) or ARM922T (2x8kByte cache). 
+@*Print information about the caches found. This allows to see whether your target
+is an ARM920T (2x16kByte cache) or ARM922T (2x8kByte cache). 
 @item @b{arm920t md<bhw>_phys} <@var{addr}> [@var{count}]
 @cindex arm920t md<bhw>_phys
 @*Display memory at physical address addr. 
@@ -2792,8 +2791,8 @@
 @*Translate a virtual address to a physical address. 
 @end itemize
 
-@subsection ARM926EJS specific commands
-@cindex ARM926EJS specific commands
+@subsection ARM926EJ-S specific commands
+@cindex ARM926EJ-S specific commands
 
 @itemize @bullet
 @item @b{arm926ejs cp15} <@var{num}> [@var{value}]
@@ -2845,8 +2844,8 @@
 encoding of the [M4:M0] bits of the PSR. 
 @end itemize
 
-@section Target Requests
-@cindex Target Requests
+@section Target requests
+@cindex Target requests
 OpenOCD can handle certain target requests, currently debugmsg are only supported for arm7_9 and cortex_m3.
 See libdcc in the contrib dir for more details.
 @itemize @bullet
@@ -2857,13 +2856,13 @@
 
 @node JTAG Commands
 @chapter JTAG Commands
-@cindex JTAG commands
+@cindex JTAG Commands
 Generally most people will not use the bulk of these commands. They
 are mostly used by the OpenOCD developers or those who need to
 directly manipulate the JTAG taps.
 
 In general these commands control JTAG taps at a very low level. For
-example if you need to control a JTAG Route Controller (ie: the
+example if you need to control a JTAG Route Controller (i.e.: the
 OMAP3530 on the Beagle Board has one) you might use these commands in
 a script or an event procedure.
 @section Commands
@@ -2943,27 +2942,27 @@
 @node TFTP
 @chapter TFTP
 @cindex TFTP
-If OpenOCD runs on an embedded host(as ZY1000 does), then tftp can
-be used to access files on PCs(either developer PC or some other PC).
+If OpenOCD runs on an embedded host(as ZY1000 does), then TFTP can
+be used to access files on PCs (Either the developer's PC or some other PC).
 
 The way this works on the ZY1000 is to prefix a filename by
-"/tftp/ip/" and append the tftp path on the tftp
-server(tftpd). E.g. "load_image /tftp/10.0.0.96/c:\temp\abc.elf" will
+"/tftp/ip/" and append the TFTP path on the TFTP
+server (tftpd). E.g. "load_image /tftp/10.0.0.96/c:\temp\abc.elf" will
 load c:\temp\abc.elf from the developer pc (10.0.0.96) into memory as
 if the file was hosted on the embedded host.
 
-In order to achieve decent performance, you must choose a tftp server
-that supports a packet size bigger than the default packet size(512 bytes). There
-are numerous tftp servers out there(free and commercial) and you will have to do
+In order to achieve decent performance, you must choose a TFTP server
+that supports a packet size bigger than the default packet size (512 bytes). There
+are numerous TFTP servers out there (free and commercial) and you will have to do
 a bit of googling to find something that fits your requirements.
 
-@node Sample Scripts
-@chapter Sample Scripts
+@node Sample scripts
+@chapter Sample scripts
 @cindex scripts
 
 This page shows how to use the target library.
 
-The configuration script can be divided in the following section:
+The configuration script can be divided into the following sections:
 @itemize @bullet
 @item daemon configuration
 @item interface
@@ -2993,14 +2992,14 @@
 @cindex Connecting to GDB
 @anchor{Connecting to GDB}
 Use GDB 6.7 or newer with OpenOCD if you run into trouble. For
-instance 6.3 has a known bug where it produces bogus memory access
+instance GDB 6.3 has a known bug that produces bogus memory access
 errors, which has since been fixed: look up 1836 in
 @url{http://sourceware.org/cgi-bin/gnatsweb.pl?database=gdb}
 
 @*OpenOCD can communicate with GDB in two ways:
 @enumerate
 @item
-A socket (tcp) connection is typically started as follows:
+A socket (TCP) connection is typically started as follows:
 @example
 target remote localhost:3333
 @end example
@@ -3016,14 +3015,14 @@
 @end enumerate
 
 @*To see a list of available OpenOCD commands type @option{monitor help} on the
-GDB commandline.
+GDB command line.
 
 OpenOCD supports the gdb @option{qSupported} packet, this enables information
-to be sent by the gdb server (OpenOCD) to GDB. Typical information includes
-packet size and device memory map.
+to be sent by the GDB remote server (i.e. OpenOCD) to GDB. Typical information includes
+packet size and the device's memory map.
 
 Previous versions of OpenOCD required the following GDB options to increase
-the packet size and speed up GDB communication.
+the packet size and speed up GDB communication:
 @example
 set remote memory-write-packet-size 1024
 set remote memory-write-packet-size fixed
@@ -3035,25 +3034,25 @@
 @section Programming using GDB
 @cindex Programming using GDB
 
-By default the target memory map is sent to GDB, this can be disabled by
-the following OpenOCD config option:
+By default the target memory map is sent to GDB. This can be disabled by
+the following OpenOCD configuration option:
 @example
 gdb_memory_map disable
 @end example
-For this to function correctly a valid flash config must also be configured
+For this to function correctly a valid flash configuration must also be set
 in OpenOCD. For faster performance you should also configure a valid 
 working area.
 
 Informing GDB of the memory map of the target will enable GDB to protect any
-flash area of the target and use hardware breakpoints by default. This means
+flash areas of the target and use hardware breakpoints by default. This means
 that the OpenOCD option @option{gdb_breakpoint_override} is not required when
 using a memory map. @xref{gdb_breakpoint_override}.
 
-To view the configured memory map in GDB, use the gdb command @option{info mem}
-All other unasigned addresses within GDB are treated as RAM.
+To view the configured memory map in GDB, use the GDB command @option{info mem}
+All other unassigned addresses within GDB are treated as RAM.
 
-GDB 6.8 and higher set any memory area not in the memory map as inaccessible,
-this can be changed to the old behaviour by using the following GDB command.
+GDB 6.8 and higher set any memory area not in the memory map as inaccessible.
+This can be changed to the old behavior by using the following GDB command
 @example
 set mem inaccessible-by-default off
 @end example
@@ -3066,7 +3065,7 @@
 will be used.
 
 If the target needs configuring before GDB programming, an event
-script can be executed.
+script can be executed:
 @example
 $_TARGETNAME configure -event EVENTNAME BODY
 @end example
@@ -3074,11 +3073,11 @@
 To verify any flash programming the GDB command @option{compare-sections}
 can be used.
 
-@node TCL scripting API
-@chapter TCL scripts
-@cindex TCL scripting API
-@cindex TCL scripts
-@section API Rules
+@node Tcl scripting API
+@chapter Tcl scripts
+@cindex Tcl scripting API
+@cindex Tcl scripts
+@section API rules
 
 The commands are stateless. E.g. the telnet command line has a concept
 of currently active target, the Tcl API proc's take this sort of state
@@ -3115,36 +3114,36 @@
 Lists returned must be relatively small. Otherwise a range
 should be passed in to the proc in question.
 
-@section Internal Low Level Commands
+@section Internal low-level Commands
 
-By Low level, the intent is a human would not directly use these commands.
+By low-level, the intent is a human would not directly use these commands.
 
-Low level commands are (should be) prefixed with "openocd_", e.g. openocd_flash_banks
+Low-level commands are (should be) prefixed with "openocd_", e.g. openocd_flash_banks
 is the low level API upon which "flash banks" is implemented.
 
 @itemize @bullet
 @item @b{ocd_mem2array} <@var{varname}> <@var{width}> <@var{addr}> <@var{nelems}>
 
-Read memory and return as a TCL array for script processing
+Read memory and return as a Tcl array for script processing
 @item @b{ocd_array2mem} <@var{varname}> <@var{width}> <@var{addr}> <@var{nelems}>
 
-Convert a TCL array to memory locations and write the values
+Convert a Tcl array to memory locations and write the values
 @item @b{ocd_flash_banks} <@var{driver}> <@var{base}> <@var{size}> <@var{chip_width}> <@var{bus_width}> <@var{target}> [@option{driver options} ...]
 
 Return information about the flash banks
 @end itemize
 
 OpenOCD commands can consist of two words, e.g. "flash banks". The
-startup.tcl "unknown" proc will translate this into a tcl proc
+startup.tcl "unknown" proc will translate this into a Tcl proc
 called "flash_banks".
 
-@section OpenOCD specific Global Variables
+@section OpenOCD specific global variables
 
 @subsection HostOS
 
-Real TCL has ::tcl_platfo...
 
[truncated message content]

[Openocd-svn] r1417 - in trunk: doc src/server

[oharboe at B. <oh...@ma...>]

Author: oharboe
Date: 2009-03-18 12:59:31 +0100 (Wed, 18 Mar 2009)
New Revision: 1417

Modified:
   trunk/doc/openocd.texi
   trunk/src/server/gdb_server.c
Log:
Hiroshi Ito <it...@ml...> typos

Modified: trunk/doc/openocd.texi
===================================================================
--- trunk/doc/openocd.texi	2009-03-18 11:43:09 UTC (rev 1416)
+++ trunk/doc/openocd.texi	2009-03-18 11:59:31 UTC (rev 1417)
@@ -1083,7 +1083,7 @@
 
 @section GDB Items
 @itemize @bullet
-@item @b{gdb_breakpoint_override} <@var{hard|soft|disabled}>
+@item @b{gdb_breakpoint_override} <@var{hard|soft|disable}>
 @cindex gdb_breakpoint_override
 @anchor{gdb_breakpoint_override}
 @*Force breakpoint type for gdb 'break' commands.
@@ -1097,7 +1097,7 @@
 
 @item @b{gdb_detach} <@var{resume|reset|halt|nothing}>
 @cindex gdb_detach
-@*Configures what OpenOCD will do when gdb detaches from the daeman.
+@*Configures what OpenOCD will do when gdb detaches from the daemon.
 Default behaviour is <@var{resume}>
 
 @item @b{gdb_memory_map} <@var{enable|disable}>

Modified: trunk/src/server/gdb_server.c
===================================================================
--- trunk/src/server/gdb_server.c	2009-03-18 11:43:09 UTC (rev 1416)
+++ trunk/src/server/gdb_server.c	2009-03-18 11:59:31 UTC (rev 1417)
@@ -2387,7 +2387,7 @@
 	register_command(command_context, NULL, "gdb_report_data_abort", handle_gdb_report_data_abort_command,
 			COMMAND_CONFIG, "enable or disable report data");
 	register_command(command_context, NULL, "gdb_breakpoint_override", handle_gdb_breakpoint_override_command,
-			COMMAND_EXEC, "hard/soft/disabled - force breakpoint type for gdb 'break' commands."
+			COMMAND_EXEC, "hard/soft/disable - force breakpoint type for gdb 'break' commands."
 			"The raison d'etre for this option is to support GDB GUI's without "
 			"a hard/soft breakpoint concept where the default OpenOCD behaviour "
 			"is not sufficient");

[Openocd-svn] r1416 - trunk/src/target

[oharboe at B. <oh...@ma...>]

Author: oharboe
Date: 2009-03-18 12:43:09 +0100 (Wed, 18 Mar 2009)
New Revision: 1416

Modified:
   trunk/src/target/trace.c
Log:
Hiroshi Ito <it...@ml...> fix division by 0

Modified: trunk/src/target/trace.c
===================================================================
--- trunk/src/target/trace.c	2009-03-17 10:22:26 UTC (rev 1415)
+++ trunk/src/target/trace.c	2009-03-18 11:43:09 UTC (rev 1416)
@@ -128,7 +128,11 @@
 		int i;
 		int first = 0;
 		int last = trace->trace_history_pos;
-		
+
+		if ( !trace->trace_history_size ) {
+			command_print(cmd_ctx, "trace history buffer is not allocated");
+			return ERROR_OK;
+		}
 		if (trace->trace_history_overflowed)
 		{
 			first = trace->trace_history_pos;

[Openocd-svn] r1415 - in trunk/src: helper jtag target

[ntfreak at B. <nt...@ma...>]

Author: ntfreak
Date: 2009-03-17 11:22:26 +0100 (Tue, 17 Mar 2009)
New Revision: 1415

Modified:
   trunk/src/helper/log.c
   trunk/src/jtag/jtag.c
   trunk/src/target/xscale.c
Log:
- remove build warnings

Modified: trunk/src/helper/log.c
===================================================================
--- trunk/src/helper/log.c	2009-03-17 09:48:46 UTC (rev 1414)
+++ trunk/src/helper/log.c	2009-03-17 10:22:26 UTC (rev 1415)
@@ -27,6 +27,8 @@
 #include "config.h"
 #endif
 
+#include "replacements.h"
+
 #include "log.h"
 #include "configuration.h"
 #include "time_support.h"
@@ -36,6 +38,7 @@
 #include <stdio.h>
 #include <stdlib.h>
 #include <string.h>
+#include <unistd.h>
 #include <stdarg.h>
 
 #define PRINT_MEM() 0

Modified: trunk/src/jtag/jtag.c
===================================================================
--- trunk/src/jtag/jtag.c	2009-03-17 09:48:46 UTC (rev 1414)
+++ trunk/src/jtag/jtag.c	2009-03-17 10:22:26 UTC (rev 1415)
@@ -4,11 +4,11 @@
  *                                                                         *
  *   Copyright (C) 2007,2008 vind Harboe                                 *
  *   oyv...@zy...                                               *
- *
- *   Copyright (C) 2009 SoftPLC Corporation
- * 	 http://softplc.com
- *   di...@so...
  *                                                                         *
+ *   Copyright (C) 2009 SoftPLC Corporation                                *
+ * 	 http://softplc.com                                                    *
+ *   di...@so...                                                      *
+ *                                                                         *
  *   This program is free software; you can redistribute it and/or modify  *
  *   it under the terms of the GNU General Public License as published by  *
  *   the Free Software Foundation; either version 2 of the License, or     *
@@ -44,7 +44,6 @@
 */
 int jtag_error=ERROR_OK;
 
-
 typedef struct cmd_queue_page_s
 {
 	void *address;
@@ -220,8 +219,8 @@
 void jtag_add_end_state(tap_state_t endstate);
 void jtag_add_sleep(u32 us);
 int jtag_execute_queue(void);
+int tap_state_by_name(const char *name);
 
-
 /* jtag commands */
 int handle_interface_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
 int handle_jtag_speed_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
@@ -276,14 +275,13 @@
 	return n;
 }
 
-
 jtag_tap_t *jtag_TapByString( const char *s )
 {
 	jtag_tap_t *t;
 	char *cp;
 
 	t = jtag_AllTaps();
-	// try name first
+	/* try name first */
 	while(t){
 		if( 0 == strcmp( t->dotted_name, s ) ){
 			break;
@@ -291,7 +289,7 @@
 			t = t->next_tap;
 		}
 	}
-	// backup plan is by number
+	/* backup plan is by number */
 	if( t == NULL ){
 		/* ok - is "s" a number? */
 		int n;
@@ -538,7 +536,6 @@
 	int nth_tap;
 	int scan_size = 0;
 
-
 	last_cmd = jtag_get_last_command_p();
 
 	/* allocate memory for a new list member */
@@ -560,7 +557,7 @@
 	for(;;){
 		int found = 0;
 
-		// do this here so it is not forgotten
+		/* do this here so it is not forgotten */
 		tap = jtag_NextEnabledTap(tap);
 		if( tap == NULL ){
 			break;
@@ -1510,7 +1507,7 @@
 		return ERROR_JTAG_INIT_FAILED;
 	}
 
-	// point at the 1st tap
+	/* point at the 1st tap */
 	tap = jtag_NextEnabledTap(NULL);
 	if( tap == NULL ){
 		LOG_ERROR("JTAG: No taps enabled?");
@@ -1714,9 +1711,7 @@
 	{ .name = NULL,          .value = -1 }
 };
 
-static int
-jtag_tap_configure_cmd( Jim_GetOptInfo *goi,
-		jtag_tap_t * tap)
+static int jtag_tap_configure_cmd( Jim_GetOptInfo *goi, jtag_tap_t * tap)
 {
 	Jim_Nvp *n;
 	Jim_Obj *o;
@@ -2741,14 +2736,14 @@
 		return ERROR_COMMAND_SYNTAX_ERROR;
 	}
 
-	// optional "-endstate"
-	//          "statename"
-	// at the end of the arguments.
-	// assume none.
+	/* optional "-endstate" */
+	/*          "statename" */
+	/* at the end of the arguments. */
+	/* assume none. */
 	endstate = -1;
 	if( argc >= 4 ){
-		// have at least one pair of numbers.
-		// is last pair the magic text?
+		/* have at least one pair of numbers. */
+		/* is last pair the magic text? */
 		if( 0 == strcmp( "-endstate", args[ argc - 2 ] ) ){
 			const char *cpA;
 			const char *cpS;
@@ -2762,13 +2757,12 @@
 			if( endstate >= 16 ){
 				return ERROR_COMMAND_SYNTAX_ERROR;
 			} else {
-				// found - remove the last 2 args
+				/* found - remove the last 2 args */
 				argc -= 2;
 			}
 		}
 	}
 
-
 	fields = malloc(sizeof(scan_field_t) * argc / 2);
 
 	for (i = 0; i < argc / 2; i++)
@@ -2791,7 +2785,7 @@
 	}
 
 	jtag_add_ir_scan(argc / 2, fields, -1);
-	// did we have an endstate?
+	/* did we have an endstate? */
 	if( endstate >= 0 ){
 		jtag_add_end_state(endstate);
 	}
@@ -2819,9 +2813,9 @@
 	 * args[2] = num_bits
 	 * args[3] = hex string
 	 * ... repeat num bits and hex string ...
-	 * 
+	 *
 	 * .. optionally:
-     *     args[N-2] = "-endstate"
+	*     args[N-2] = "-endstate"
 	 *     args[N-1] = statename
 	 */
 	if ((argc < 4) || ((argc % 2)!=0))
@@ -2832,13 +2826,12 @@
 
 	/* assume no endstate */
 	endstate = -1;
-	// validate arguments as numbers
+	/* validate arguments as numbers */
 	e = JIM_OK;
 	for (i = 2; i < argc; i+=2)
 	{
 		long bits;
 		const char *cp;
-		
 
 		e = Jim_GetLong(interp, args[i], &bits);
 		/* If valid - try next arg */
@@ -2877,7 +2870,7 @@
 		/* Still an error? */
 		if( e != JIM_OK ){
 			return e; /* too bad */
-		} 
+		}
 	} /* validate args */
 
 	tap = jtag_TapByJimObj( interp, args[1] );
@@ -2907,9 +2900,9 @@
 		fields[field_count].in_handler = NULL;
 		fields[field_count++].in_handler_priv = NULL;
 	}
-		
+
 	jtag_add_dr_scan(num_fields, fields, -1);
-	// did we get an end state?
+	/* did we get an end state? */
 	if( endstate >= 0 ){
 		jtag_add_end_state( (tap_state_t)endstate );
 	}
@@ -3009,7 +3002,6 @@
 	}
 }
 
-
 /*-----<Cable Helper API>---------------------------------------*/
 
 /*  these Cable Helper API functions are all documented in the jtag.h header file,
@@ -3085,7 +3077,6 @@
 	return ndx;
 }
 
-
 int tap_get_tms_path( tap_state_t from, tap_state_t to )
 {
 	/* tap_move[i][j]: tap movement command to go from state i to state j
@@ -3278,11 +3269,10 @@
 	return ret;
 }
 
-int
-tap_state_by_name( const char *name )
+int tap_state_by_name( const char *name )
 {
 	int x;
-	
+
 	for( x = 0 ; x < 16 ; x++ ){
 		/* be nice to the human */
 		if( 0 == strcasecmp( name, tap_state_name(x) ) ){

Modified: trunk/src/target/xscale.c
===================================================================
--- trunk/src/target/xscale.c	2009-03-17 09:48:46 UTC (rev 1414)
+++ trunk/src/target/xscale.c	2009-03-17 10:22:26 UTC (rev 1415)
@@ -1450,17 +1450,18 @@
 	armv4_5_common_t *armv4_5 = target->arch_info;
 	xscale_common_t *xscale = armv4_5->arch_info;
 
-	u32 current_pc, next_pc;
+	u32 next_pc;
 	int retval;
 	int i;
 
-
 	target->debug_reason = DBG_REASON_SINGLESTEP;
 
 	/* calculate PC of next instruction */
 	if ((retval = arm_simulate_step(target, &next_pc)) != ERROR_OK)
 	{
-		u32 current_opcode;
+		u32 current_opcode, current_pc;
+		current_pc = buf_get_u32(armv4_5->core_cache->reg_list[15].value, 0, 32);
+
 		target_read_u32(target, current_pc, &current_opcode);
 		LOG_ERROR("BUG: couldn't calculate PC of next instruction, current opcode was 0x%8.8x", current_opcode);
 		return retval;

[Openocd-svn] r1414 - trunk/src/target/target

[ntfreak at B. <nt...@ma...>]

Author: ntfreak
Date: 2009-03-17 10:48:46 +0100 (Tue, 17 Mar 2009)
New Revision: 1414

Modified:
   trunk/src/target/target/stm32stick.cfg
Log:
- fix incorrect stm32stick.cfg

Modified: trunk/src/target/target/stm32stick.cfg
===================================================================
--- trunk/src/target/target/stm32stick.cfg	2009-03-16 22:42:29 UTC (rev 1413)
+++ trunk/src/target/target/stm32stick.cfg	2009-03-17 09:48:46 UTC (rev 1414)
@@ -30,10 +30,10 @@
   # Section 26.6.3
    set _CPUTAPID 0x3ba00477
 }
-jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0xf -irmask 0xe -expected-id $_CPUTAPID
+jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
 
 # The boundery scan register, leave the "expected-id" undefined.
-jtag newtap $_CHIPNAME bs  -irlen 5 -ircapture 0x1 -irmask 0x1e 
+jtag newtap $_CHIPNAME bs  -irlen 5 -ircapture 0x1 -irmask 0x1 
 
 # configure str750 connected to jtag chain
 jtag newtap $_CHIPNAME unknown -irlen 4 -ircapture 0x1 -irmask 0x0f

[Openocd-svn] r1413 - trunk/src/target

[ntfreak at B. <nt...@ma...>]

Author: ntfreak
Date: 2009-03-16 23:42:29 +0100 (Mon, 16 Mar 2009)
New Revision: 1413

Modified:
   trunk/src/target/cortex_m3.c
Log:
- fix issue with cortex_m3 reset run. Thanks Perry Hung
- https://lists.berlios.de/pipermail/openocd-development/2009-March/005028.html

Modified: trunk/src/target/cortex_m3.c
===================================================================
--- trunk/src/target/cortex_m3.c	2009-03-14 18:39:05 UTC (rev 1412)
+++ trunk/src/target/cortex_m3.c	2009-03-16 22:42:29 UTC (rev 1413)
@@ -243,6 +243,10 @@
 	swjdp_transaction_endcheck(swjdp);
 	
 	armv7m_invalidate_core_regs(target);
+	
+	/* make sure we have latest dhcsr flags */
+	ahbap_read_system_atomic_u32(swjdp, DCB_DHCSR, &cortex_m3->dcb_dhcsr);
+	
 	return ERROR_OK;
 }
 
@@ -724,8 +728,12 @@
 		/* Set/Clear C_MASKINTS in a separate operation */
 		if (cortex_m3->dcb_dhcsr & C_MASKINTS)
 			ahbap_write_system_atomic_u32(swjdp, DCB_DHCSR, DBGKEY | C_DEBUGEN | C_HALT);
-	
+
+		/* clear any debug flags before resuming */
 		cortex_m3_clear_halt(target);
+		
+		/* clear C_HALT in dhcsr reg */
+		cortex_m3_write_debug_halt_mask(target, 0, C_HALT);
 							
 		/* Enter debug state on reset, cf. end_reset_event() */	
 		ahbap_write_system_u32(swjdp, DCB_DEMCR, TRCENA | VC_HARDERR | VC_BUSERR);

[Openocd-svn] r1412 - trunk/src/target/interface

[<oh...@ma...>]

Author: oharboe
Date: 2009-03-14 19:39:05 +0100 (Sat, 14 Mar 2009)
New Revision: 1412

Modified:
   trunk/src/target/interface/parport.cfg
   trunk/src/target/interface/parport_dlc5.cfg
Log:
Uwe Hermann <uw...@he...>  clean out stuff that doesn't belong in interface(telnet/gdb port).

Modified: trunk/src/target/interface/parport.cfg
===================================================================
--- trunk/src/target/interface/parport.cfg	2009-03-12 14:48:51 UTC (rev 1411)
+++ trunk/src/target/interface/parport.cfg	2009-03-14 18:39:05 UTC (rev 1412)
@@ -1,8 +1,4 @@
-telnet_port 4444
-gdb_port 2001
-
 interface parport
 parport_port 0xc8b8
 parport_cable wiggler
 jtag_speed 0
-

Modified: trunk/src/target/interface/parport_dlc5.cfg
===================================================================
--- trunk/src/target/interface/parport_dlc5.cfg	2009-03-12 14:48:51 UTC (rev 1411)
+++ trunk/src/target/interface/parport_dlc5.cfg	2009-03-14 18:39:05 UTC (rev 1412)
@@ -1,6 +1,3 @@
-telnet_port 4444
-gdb_port 2001
-
 interface parport
 parport_port /dev/parport0
 parport_cable dlc5

[Openocd-svn] r1411 - in trunk: . src src/target/target src/tcl testing/examples/STM32-103

[oharboe at B. <oh...@ma...>]

Author: oharboe
Date: 2009-03-12 15:48:51 +0100 (Thu, 12 Mar 2009)
New Revision: 1411

Modified:
   trunk/BUGS
   trunk/src/scripting.txt
   trunk/src/target/target/readme.txt
   trunk/src/tcl/README_ABOUT_TCL.txt
   trunk/testing/examples/STM32-103/readme.txt
Log:
Uwe Hermann <uw...@he...> typos

Modified: trunk/BUGS
===================================================================
--- trunk/BUGS	2009-03-11 22:42:35 UTC (rev 1410)
+++ trunk/BUGS	2009-03-12 14:48:51 UTC (rev 1411)
@@ -4,7 +4,7 @@
 
 To minimize work for OpenOCD developers, you can include
 all the information below.  If you feel that some of the
-items below are unecessary for a clear bug report, you
+items below are unnecessary for a clear bug report, you
 leave them out.
 
 

Modified: trunk/src/scripting.txt
===================================================================
--- trunk/src/scripting.txt	2009-03-11 22:42:35 UTC (rev 1410)
+++ trunk/src/scripting.txt	2009-03-12 14:48:51 UTC (rev 1411)
@@ -31,7 +31,7 @@
     is to ignore serial number and write a raw binary file
     to beginning of first flash. Target script can dictate
     file format and structure of serialnumber. Tcl allows
-    an argument to consit of e.g. a list so the structure of
+    an argument to consist of e.g. a list so the structure of
     the serial number is not limited to a single string.
   - reset handling. Precise control of how srst, trst & 
     tms is handled.

Modified: trunk/src/target/target/readme.txt
===================================================================
--- trunk/src/target/target/readme.txt	2009-03-11 22:42:35 UTC (rev 1410)
+++ trunk/src/target/target/readme.txt	2009-03-12 14:48:51 UTC (rev 1411)
@@ -36,6 +36,6 @@
 
 Note that a target/xxx.cfg file can invoke another target/yyy.cfg file,
 so one can create target subtype configurations where e.g. only
-amount of DRAM, oscilator speeds differ and having a single
+amount of DRAM, oscillator speeds differ and having a single
 config file for the default/common settings.
 

Modified: trunk/src/tcl/README_ABOUT_TCL.txt
===================================================================
--- trunk/src/tcl/README_ABOUT_TCL.txt	2009-03-11 22:42:35 UTC (rev 1410)
+++ trunk/src/tcl/README_ABOUT_TCL.txt	2009-03-12 14:48:51 UTC (rev 1411)
@@ -215,8 +215,8 @@
 		   LEN
 		   HUMAN
 		   TYPE
-		   RWX - the access ablity.
-		   WIDTH - the accessable width.
+		   RWX - the access ability.
+		   WIDTH - the accessible width.
 
         ie: Some regions of memory are not 'word' 
 	accessible.

Modified: trunk/testing/examples/STM32-103/readme.txt
===================================================================
--- trunk/testing/examples/STM32-103/readme.txt	2009-03-11 22:42:35 UTC (rev 1410)
+++ trunk/testing/examples/STM32-103/readme.txt	2009-03-12 14:48:51 UTC (rev 1411)
@@ -1,4 +1,4 @@
-Olimx STM32-p103 board.
+Olimex STM32-p103 board.
 
 main.elf is a file that can be programmed to flash for
 testing purposes(e.g. test GDB load performance).

[Openocd-svn] r1410 - trunk/src/jtag/rlink

[ntfreak at B. <nt...@ma...>]

Author: ntfreak
Date: 2009-03-11 23:42:35 +0100 (Wed, 11 Mar 2009)
New Revision: 1410

Modified:
   trunk/src/jtag/rlink/ep1_cmd.h
   trunk/src/jtag/rlink/rlink.c
Log:
- add support for standalone rlink
https://lists.berlios.de/pipermail/openocd-development/2009-March/004965.html

Modified: trunk/src/jtag/rlink/ep1_cmd.h
===================================================================
--- trunk/src/jtag/rlink/ep1_cmd.h	2009-03-11 01:53:23 UTC (rev 1409)
+++ trunk/src/jtag/rlink/ep1_cmd.h	2009-03-11 22:42:35 UTC (rev 1410)
@@ -46,8 +46,8 @@
 /* a quick way to just read back one byte */
 #define EP1_CMD_DTC_GET_CACHED_STATUS	(0x16)
 
-/* Writes upper 2 bits port D with argument */
-#define EP1_CMD_SET_PORTD_UPPER			(0x19)
+/* Writes upper 2 bits (SHDN and SEL) of port D with argument */
+#define EP1_CMD_SET_PORTD_VPP			(0x19)
 /* Writes lower 2 bits (BUSY and ERROR) of port D with argument */
 #define EP1_CMD_SET_PORTD_LEDS			(0x1a)
 

Modified: trunk/src/jtag/rlink/rlink.c
===================================================================
--- trunk/src/jtag/rlink/rlink.c	2009-03-11 01:53:23 UTC (rev 1409)
+++ trunk/src/jtag/rlink/rlink.c	2009-03-11 22:42:35 UTC (rev 1410)
@@ -72,25 +72,40 @@
 #define DTC_STATUS_POLL_BYTE	(ST7_USB_BUF_EP0OUT + 0xff)
 
 
-/* Symbolic names for some pins */
-#define ST7_PA_NJTAG_TRST		ST7_PA1
-#define ST7_PA_NRLINK_RST		ST7_PA3
-#define ST7_PA_NLINE_DRIVER_ENABLE	ST7_PA5
-
-/* mask for negative-logic pins */
-#define ST7_PA_NUNASSERTED	(0	\
-	| ST7_PA_NJTAG_TRST	\
-	| ST7_PA_NRLINK_RST	\
-	| ST7_PA_NLINE_DRIVER_ENABLE	\
-)
-
 #define ST7_PD_NBUSY_LED		ST7_PD0
-#define ST7_PD_NERROR_LED		ST7_PD1
-#define ST7_PD_NRUN_LED			ST7_PD7
+#define ST7_PD_NRUN_LED			ST7_PD1
+/* low enables VPP at adapter header, high connects it to GND instead */
+#define ST7_PD_VPP_SEL			ST7_PD6
+/* low: VPP = 12v, high: VPP <= 5v */
+#define ST7_PD_VPP_SHDN			ST7_PD7
 
+/* These pins are connected together */
 #define ST7_PE_ADAPTER_SENSE_IN		ST7_PE3
 #define ST7_PE_ADAPTER_SENSE_OUT	ST7_PE4
 
+/* Symbolic mapping between port pins and numbered IO lines */
+#define ST7_PA_IO1	ST7_PA1
+#define ST7_PA_IO2	ST7_PA2
+#define ST7_PA_IO4	ST7_PA4
+#define ST7_PA_IO8	ST7_PA6
+#define ST7_PA_IO10	ST7_PA7
+#define ST7_PB_IO5	ST7_PB5
+#define ST7_PC_IO9	ST7_PC1
+#define ST7_PC_IO3	ST7_PC2
+#define ST7_PC_IO7	ST7_PC3
+#define ST7_PE_IO6	ST7_PE5
+
+/* Symbolic mapping between numbered IO lines and adapter signals */
+#define ST7_PA_RTCK	ST7_PA_IO0
+#define ST7_PA_NTRST	ST7_PA_IO1
+#define ST7_PC_TDI	ST7_PC_IO3
+#define ST7_PA_DBGRQ	ST7_PA_IO4
+#define ST7_PB_NSRST	ST7_PB_IO5
+#define ST7_PE_TMS	ST7_PE_IO6
+#define ST7_PC_TCK	ST7_PC_IO7
+#define ST7_PC_TDO	ST7_PC_IO9
+#define ST7_PA_DBGACK	ST7_PA_IO10
+
 static usb_dev_handle *pHDev;
 
 
@@ -986,37 +1001,92 @@
 	u8			bitmap;
 	int			usb_err;
 
-	bitmap = ((~(ST7_PA_NLINE_DRIVER_ENABLE)) & ST7_PA_NUNASSERTED);
+	/* Read port A for bit op */
+	usb_err = ep1_generic_commandl(
+		pHDev, 4,
+		EP1_CMD_MEMORY_READ,
+			ST7_PADR >> 8,
+			ST7_PADR,
+			1
+	);
+	if(usb_err < 0) {
+		LOG_ERROR("%s", usb_strerror());
+		exit(1);
+	}
 
+	usb_err = usb_bulk_read(
+		pHDev, USB_EP1IN_ADDR,
+		(char *)&bitmap, 1,
+		USB_TIMEOUT_MS
+	);
+	if(usb_err < 1) {
+		LOG_ERROR("%s", usb_strerror());
+		exit(1);
+	}
+
 	if(trst) {
-		bitmap &= ~ST7_PA_NJTAG_TRST;
+		bitmap &= ~ST7_PA_NTRST;
+	} else {
+		bitmap |= ST7_PA_NTRST;
 	}
+
+	/* Write port A and read port B for bit op */
+	/* port B has no OR, and we want to emulate open drain on NSRST, so we initialize DR to 0 and assert NSRST by setting DDR to 1. */
+	usb_err = ep1_generic_commandl(
+		pHDev, 9,
+		EP1_CMD_MEMORY_WRITE,
+			ST7_PADR >> 8,
+			ST7_PADR,
+			1,
+		 	bitmap,
+		EP1_CMD_MEMORY_READ,
+			ST7_PBDDR >> 8,
+			ST7_PBDDR,
+			1
+	);
+	if(usb_err < 0) {
+		LOG_ERROR("%s", usb_strerror());
+		exit(1);
+	}
+
+	usb_err = usb_bulk_read(
+		pHDev, USB_EP1IN_ADDR,
+		(char *)&bitmap, 1,
+		USB_TIMEOUT_MS
+	);
+	if(usb_err < 1) {
+		LOG_ERROR("%s", usb_strerror());
+		exit(1);
+	}
+
 	if(srst) {
-		bitmap &= ~ST7_PA_NRLINK_RST;
+		bitmap |= ST7_PB_NSRST;
+	} else {
+		bitmap &= ~ST7_PB_NSRST;
 	}
 
+	/* write port B and read dummy to ensure completion before returning */
 	usb_err = ep1_generic_commandl(
 		pHDev, 6,
-
 		EP1_CMD_MEMORY_WRITE,
-			ST7_PADR >> 8,
-			ST7_PADR,
+			ST7_PBDDR >> 8,
+			ST7_PBDDR,
 			1,
 			bitmap,
 		EP1_CMD_DTC_GET_CACHED_STATUS
 	);
 	if(usb_err < 0) {
-		LOG_ERROR("%s: %s\n", __func__, usb_strerror());
+		LOG_ERROR("%s", usb_strerror());
 		exit(1);
 	}
 
 	usb_err = usb_bulk_read(
 		pHDev, USB_EP1IN_ADDR,
-		&bitmap, 1,
+		(char *)&bitmap, 1,
 		USB_TIMEOUT_MS
 	);
 	if(usb_err < 1) {
-		LOG_ERROR("%s: %s\n", __func__, usb_strerror());
+		LOG_ERROR("%s", usb_strerror());
 		exit(1);
 	}
 }
@@ -1691,9 +1761,9 @@
 			ST7_PEDR >> 8,
 			ST7_PEDR,
 			3,
-			0x00,
-			ST7_PE_ADAPTER_SENSE_OUT,
-			ST7_PE_ADAPTER_SENSE_OUT,
+			0x00,						/* DR */
+			ST7_PE_ADAPTER_SENSE_OUT,	/* DDR */
+			ST7_PE_ADAPTER_SENSE_OUT,	/* OR */
 		EP1_CMD_MEMORY_READ,	/* Read back */
 			ST7_PEDR >> 8,
 			ST7_PEDR,
@@ -1725,9 +1795,9 @@
 			ST7_PEDR >> 8,
 			ST7_PEDR,
 			3,
-			0x00,
-			0x00,
-			0x00
+			0x00,	/* DR */
+			0x00,	/* DDR */
+			0x00	/* OR */
 	);
 
 	usb_bulk_read(
@@ -1741,24 +1811,40 @@
 		LOG_WARNING("target not plugged in\n");
 	}
 
-	/* float port A, make sure DTC is stopped, set upper 2 bits of port D, and set up port A */
+	/* float ports A and B */
 	ep1_generic_commandl(
-		pHDev, 15,
+		pHDev, 11,
 		EP1_CMD_MEMORY_WRITE,
 			ST7_PADDR >> 8,
 			ST7_PADDR,
 			2,
 			0x00,
 			0x00,
+		EP1_CMD_MEMORY_WRITE,
+			ST7_PBDDR >> 8,
+			ST7_PBDDR,
+			1,
+			0x00
+	);
+
+	/* make sure DTC is stopped, set VPP control, set up ports A and B */
+	ep1_generic_commandl(
+		pHDev, 14,
 		EP1_CMD_DTC_STOP,
-		EP1_CMD_SET_PORTD_UPPER,
-			~(ST7_PD_NRUN_LED),
+		EP1_CMD_SET_PORTD_VPP,
+			~(ST7_PD_VPP_SHDN),
 		EP1_CMD_MEMORY_WRITE,
 			ST7_PADR >> 8,
 			ST7_PADR,
 			2,
-			((~(ST7_PA_NLINE_DRIVER_ENABLE)) & ST7_PA_NUNASSERTED),
-			(ST7_PA_NLINE_DRIVER_ENABLE | ST7_PA_NRLINK_RST | ST7_PA_NJTAG_TRST)
+			((~(0)) & (ST7_PA_NTRST)),
+		 	(ST7_PA_NTRST),
+	/* port B has no OR, and we want to emulate open drain on NSRST, so we set DR to 0 here and later assert NSRST by setting DDR bit to 1. */
+		EP1_CMD_MEMORY_WRITE,
+			ST7_PBDR >> 8,
+			ST7_PBDR,
+			1,
+			0x00
 	);
 
 	/* set LED updating mode and make sure they're unlit */
@@ -1792,7 +1878,7 @@
 		EP1_CMD_LEDUE_NONE,
 		EP1_CMD_SET_PORTD_LEDS,
 			~0,
-		EP1_CMD_SET_PORTD_UPPER,
+		EP1_CMD_SET_PORTD_VPP,
 			~0
 	);
 

[Openocd-svn] r1409 - in trunk/src/target: board target

[<du...@ma...>]

Author: duane
Date: 2009-03-11 02:53:23 +0100 (Wed, 11 Mar 2009)
New Revision: 1409

Modified:
   trunk/src/target/board/ti_beagleboard.cfg
   trunk/src/target/target/omap3530.cfg
Log:
Added eol-style props


Property changes on: trunk/src/target/board/ti_beagleboard.cfg
___________________________________________________________________
Name: svn:eol-style
   + native


Property changes on: trunk/src/target/target/omap3530.cfg
___________________________________________________________________
Name: svn:eol-style
   + native

[Openocd-svn] r1408 - in trunk/src/target: board target

[<du...@ma...>]

Author: duane
Date: 2009-03-11 02:48:54 +0100 (Wed, 11 Mar 2009)
New Revision: 1408

Added:
   trunk/src/target/board/ti_beagleboard.cfg
   trunk/src/target/target/omap3530.cfg
Log:
Commit OMAP3530 and TI_BEAGLEBOARD config files from Kees, Dick, Derk, and others

Added: trunk/src/target/board/ti_beagleboard.cfg
===================================================================
--- trunk/src/target/board/ti_beagleboard.cfg	2009-03-11 01:42:05 UTC (rev 1407)
+++ trunk/src/target/board/ti_beagleboard.cfg	2009-03-11 01:48:54 UTC (rev 1408)
@@ -0,0 +1,11 @@
+
+source [find target/omap3530.cfg]
+
+reset_config trst_and_srst
+jtag_reset 1 1
+sleep 10
+runtest 10
+jtag_reset 0 0
+
+endstate IDLE
+

Added: trunk/src/target/target/omap3530.cfg
===================================================================
--- trunk/src/target/target/omap3530.cfg	2009-03-11 01:42:05 UTC (rev 1407)
+++ trunk/src/target/target/omap3530.cfg	2009-03-11 01:48:54 UTC (rev 1408)
@@ -0,0 +1,40 @@
+#File omap3530.cfg - as found on the BEAGLEBOARD
+#  Assumption is it is generic for all OMAP3530 
+
+#TI OMAP3 processor - http://www.ti.com 
+
+if { [info exists CHIPNAME] } {	
+   set  _CHIPNAME $CHIPNAME    
+} else {	 
+   set  _CHIPNAME omap3
+}
+
+if { [info exists ENDIAN] } {	
+   set  _ENDIAN $ENDIAN    
+} else {	 
+  # this defaults to a little endianness
+  set  _ENDIAN little
+}
+
+if { [info exists CPUTAPID ] } {
+   set _CPUTAPID $CPUTAPID
+} else {
+  # force an error till we get a good number
+  set _CPUTAPID 0x0B6D602F
+}
+
+#jtag scan chain
+jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0x0 -expected-id $_CPUTAPID -disable
+jtag newtap $_CHIPNAME jrc -irlen 6 -ircapture 0x1 -irmask 0xf -expected-id 0x0b7ae02f
+
+jtag configure $_CHIPNAME.cpu -event tap-enable {
+	puts "Enabling Cortex-A8 @ OMAP3"
+	irscan omap3.jrc 7 -endstate IRPAUSE
+	drscan omap3.jrc 8 0x89 -endstate DRPAUSE
+	irscan omap3.jrc 2 -endstate IRPAUSE
+	drscan omap3.jrc 32 0xa3002108  -endstate IDLE
+	irscan omap3.jrc 0x3F -endstate IDLE
+	runtest 10
+	puts "Cortex-A8 @ OMAP3 enabled"
+}
+

[Openocd-svn] r1407 - trunk/src/jtag

[<du...@ma...>]

Author: duane
Date: 2009-03-11 02:42:05 +0100 (Wed, 11 Mar 2009)
New Revision: 1407

Modified:
   trunk/src/jtag/jtag.c
Log:
Added -endstate to irscan and drscan to support beagleboard (omap3530)

Modified: trunk/src/jtag/jtag.c
===================================================================
--- trunk/src/jtag/jtag.c	2009-03-09 21:04:33 UTC (rev 1406)
+++ trunk/src/jtag/jtag.c	2009-03-11 01:42:05 UTC (rev 1407)
@@ -2657,7 +2657,7 @@
 
 int handle_endstate_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
 {
-	tap_state_t state;
+	int state;
 
 	if (argc < 1)
 	{
@@ -2665,14 +2665,13 @@
 	}
 	else
 	{
-		for (state = 0; state < 16; state++)
-		{
-			if (strcmp(args[0], tap_state_name(state)) == 0)
-			{
-				jtag_add_end_state(state);
-				jtag_execute_queue();
-			}
+		state = tap_state_by_name( args[0] );
+		if( state < 0 ){
+			command_print( cmd_ctx, "Invalid state name: %s\n", args[0] );
+			return ERROR_COMMAND_SYNTAX_ERROR;
 		}
+		jtag_add_end_state( (tap_state_t)(state));
+		jtag_execute_queue();
 	}
 	command_print(cmd_ctx, "current endstate: %s", tap_state_name(cmd_queue_end_state));
 
@@ -2735,12 +2734,41 @@
 	int i;
 	scan_field_t *fields;
 	jtag_tap_t *tap;
+	int endstate;
 
 	if ((argc < 2) || (argc % 2))
 	{
 		return ERROR_COMMAND_SYNTAX_ERROR;
 	}
 
+	// optional "-endstate"
+	//          "statename"
+	// at the end of the arguments.
+	// assume none.
+	endstate = -1;
+	if( argc >= 4 ){
+		// have at least one pair of numbers.
+		// is last pair the magic text?
+		if( 0 == strcmp( "-endstate", args[ argc - 2 ] ) ){
+			const char *cpA;
+			const char *cpS;
+			cpA = args[ argc-1 ];
+			for( endstate = 0 ; endstate < 16 ; endstate++ ){
+				cpS = tap_state_name( endstate );
+				if( 0 == strcmp( cpA, cpS ) ){
+					break;
+				}
+			}
+			if( endstate >= 16 ){
+				return ERROR_COMMAND_SYNTAX_ERROR;
+			} else {
+				// found - remove the last 2 args
+				argc -= 2;
+			}
+		}
+	}
+
+
 	fields = malloc(sizeof(scan_field_t) * argc / 2);
 
 	for (i = 0; i < argc / 2; i++)
@@ -2763,6 +2791,10 @@
 	}
 
 	jtag_add_ir_scan(argc / 2, fields, -1);
+	// did we have an endstate?
+	if( endstate >= 0 ){
+		jtag_add_end_state(endstate);
+	}
 	jtag_execute_queue();
 
 	for (i = 0; i < argc / 2; i++)
@@ -2781,11 +2813,16 @@
 	int field_count = 0;
 	int i, e;
 	jtag_tap_t *tap;
+	int endstate;
 
 	/* args[1] = device
 	 * args[2] = num_bits
 	 * args[3] = hex string
 	 * ... repeat num bits and hex string ...
+	 * 
+	 * .. optionally:
+     *     args[N-2] = "-endstate"
+	 *     args[N-1] = statename
 	 */
 	if ((argc < 4) || ((argc % 2)!=0))
 	{
@@ -2793,15 +2830,56 @@
 		return JIM_ERR;
 	}
 
+	/* assume no endstate */
+	endstate = -1;
+	// validate arguments as numbers
+	e = JIM_OK;
 	for (i = 2; i < argc; i+=2)
 	{
 		long bits;
+		const char *cp;
+		
 
 		e = Jim_GetLong(interp, args[i], &bits);
-		if (e != JIM_OK)
+		/* If valid - try next arg */
+		if( e == JIM_OK ){
+			continue;
+		}
+
+		/* Not valid.. are we at the end? */
+		if ( ((i+2) != argc) ){
+			/* nope, then error */
 			return e;
-	}
+		}
 
+		/* it could be: "-endstate FOO" */
+
+		/* get arg as a string. */
+		cp = Jim_GetString( args[i], NULL );
+		/* is it the magic? */
+		if( 0 == strcmp( "-endstate", cp ) ){
+			/* is the statename valid? */
+			cp = Jim_GetString( args[i+1], NULL );
+
+			/* see if it is a valid state name */
+			endstate = tap_state_by_name(cp);
+			if( endstate < 0 ){
+				/* update the error message */
+				Jim_SetResult_sprintf(interp,"endstate: %s invalid", cp );
+			} else {
+				/* valid - so clear the error */
+				e = JIM_OK;
+				/* and remove the last 2 args */
+				argc -= 2;
+			}
+		}
+
+		/* Still an error? */
+		if( e != JIM_OK ){
+			return e; /* too bad */
+		} 
+	} /* validate args */
+
 	tap = jtag_TapByJimObj( interp, args[1] );
 	if( tap == NULL ){
 		return JIM_ERR;
@@ -2829,8 +2907,12 @@
 		fields[field_count].in_handler = NULL;
 		fields[field_count++].in_handler_priv = NULL;
 	}
-
+		
 	jtag_add_dr_scan(num_fields, fields, -1);
+	// did we get an end state?
+	if( endstate >= 0 ){
+		jtag_add_end_state( (tap_state_t)endstate );
+	}
 	retval = jtag_execute_queue();
 	if (retval != ERROR_OK)
 	{
@@ -3196,4 +3278,19 @@
 	return ret;
 }
 
+int
+tap_state_by_name( const char *name )
+{
+	int x;
+	
+	for( x = 0 ; x < 16 ; x++ ){
+		/* be nice to the human */
+		if( 0 == strcasecmp( name, tap_state_name(x) ) ){
+			return x;
+		}
+	}
+	/* not found */
+	return -1;
+}
+
 /*-----</Cable Helper API>--------------------------------------*/

[Openocd-svn] r1406 - trunk/doc

[ntfreak at B. <nt...@ma...>]

Author: ntfreak
Date: 2009-03-09 22:04:33 +0100 (Mon, 09 Mar 2009)
New Revision: 1406

Modified:
   trunk/doc/openocd.texi
Log:
- fix small typo in texi (section HostOS)

Modified: trunk/doc/openocd.texi
===================================================================
--- trunk/doc/openocd.texi	2009-03-08 21:19:36 UTC (rev 1405)
+++ trunk/doc/openocd.texi	2009-03-09 21:04:33 UTC (rev 1406)
@@ -3146,7 +3146,7 @@
 variables. JimTCL, as implimented in OpenOCD creates $HostOS which
 holds one of the following values.
 
-@itemize bullet 
+@itemize @bullet 
 @item @b{winxx}    Built using Microsoft Visual Studio
 @item @b{linux}    Linux is the underlying operating sytem
 @item @b{darwin}   Darwin (mac-os) is the underlying operating sytem.

[Openocd-svn] r1405 - in trunk/src: jtag target/interface

[ntfreak at B. <nt...@ma...>]

Author: ntfreak
Date: 2009-03-08 22:19:36 +0100 (Sun, 08 Mar 2009)
New Revision: 1405

Modified:
   trunk/src/jtag/arm-jtag-ew.c
   trunk/src/target/interface/arm-jtag-ew.cfg
Log:
- add svn props from previous commit


Property changes on: trunk/src/jtag/arm-jtag-ew.c
___________________________________________________________________
Name: svn:eol-style
   + native


Property changes on: trunk/src/target/interface/arm-jtag-ew.cfg
___________________________________________________________________
Name: svn:eol-style
   + native

[Openocd-svn] r1404 - trunk/src/target

[<du...@ma...>]

Author: duane
Date: 2009-03-08 22:14:35 +0100 (Sun, 08 Mar 2009)
New Revision: 1404

Modified:
   trunk/src/target/target.c
Log:
Commands: reg, profile, ocd_mem2array, ocd_array2mem, fast_load, etc only work *IF* there is an actual target

Modified: trunk/src/target/target.c
===================================================================
--- trunk/src/target/target.c	2009-03-08 20:29:54 UTC (rev 1403)
+++ trunk/src/target/target.c	2009-03-08 21:14:35 UTC (rev 1404)
@@ -927,23 +927,12 @@
 {
 
 	register_command(cmd_ctx, NULL, "targets", handle_targets_command, COMMAND_EXEC, "change the current command line target (one parameter) or lists targets (with no parameter)");
-	register_command(cmd_ctx, NULL, "virt2phys", handle_virt2phys_command, COMMAND_ANY, "translate a virtual address into a physical address");
-	register_command(cmd_ctx, NULL, "profile", handle_profile_command, COMMAND_EXEC, "profiling samples the CPU PC");
 
-	register_command(cmd_ctx, NULL, "fast_load_image", handle_fast_load_image_command, COMMAND_ANY,
-			"same args as load_image, image stored in memory - mainly for profiling purposes");
 
-	register_command(cmd_ctx, NULL, "fast_load", handle_fast_load_command, COMMAND_ANY,
-			"loads active fast load image to current target - mainly for profiling purposes");
 
 
-
 	register_jim(cmd_ctx, "target", jim_target, "configure target" );
 
-
-	/* script procedures */
-	register_jim(cmd_ctx, "ocd_mem2array", jim_mem2array, "read memory and return as a TCL array for script processing");
-	register_jim(cmd_ctx, "ocd_array2mem", jim_array2mem, "convert a TCL array to memory locations and write the values");
 	return ERROR_OK;
 }
 
@@ -1305,6 +1294,21 @@
 int target_register_user_commands(struct command_context_s *cmd_ctx)
 {
 	int retval = ERROR_OK;
+
+
+	/* script procedures */
+	register_command(cmd_ctx, NULL, "profile", handle_profile_command, COMMAND_EXEC, "profiling samples the CPU PC");
+	register_jim(cmd_ctx, "ocd_mem2array", jim_mem2array, "read memory and return as a TCL array for script processing");
+	register_jim(cmd_ctx, "ocd_array2mem", jim_array2mem, "convert a TCL array to memory locations and write the values");
+
+	register_command(cmd_ctx, NULL, "fast_load_image", handle_fast_load_image_command, COMMAND_ANY,
+			"same args as load_image, image stored in memory - mainly for profiling purposes");
+
+	register_command(cmd_ctx, NULL, "fast_load", handle_fast_load_command, COMMAND_ANY,
+			"loads active fast load image to current target - mainly for profiling purposes");
+
+
+	register_command(cmd_ctx, NULL, "virt2phys", handle_virt2phys_command, COMMAND_ANY, "translate a virtual address into a physical address");
 	register_command(cmd_ctx,  NULL, "reg", handle_reg_command, COMMAND_EXEC, "display or set a register");
 	register_command(cmd_ctx,  NULL, "poll", handle_poll_command, COMMAND_EXEC, "poll target state");
 	register_command(cmd_ctx,  NULL, "wait_halt", handle_wait_halt_command, COMMAND_EXEC, "wait for target halt [time (s)]");

[Openocd-svn] r1403 - trunk/src/target/interface

[<du...@ma...>]

Author: duane
Date: 2009-03-08 21:29:54 +0100 (Sun, 08 Mar 2009)
New Revision: 1403

Modified:
   trunk/src/target/interface/olimex-jtag-tiny-a.cfg
Log:
Added VID/PID pair to olimex-jtag-tiny-a the non-a version already has the vid pid

Modified: trunk/src/target/interface/olimex-jtag-tiny-a.cfg
===================================================================
--- trunk/src/target/interface/olimex-jtag-tiny-a.cfg	2009-03-08 15:14:18 UTC (rev 1402)
+++ trunk/src/target/interface/olimex-jtag-tiny-a.cfg	2009-03-08 20:29:54 UTC (rev 1403)
@@ -2,3 +2,4 @@
 interface ft2232
 ft2232_device_desc "Olimex OpenOCD JTAG TINY A"
 ft2232_layout olimex-jtag
+ft2232_vid_pid 0x15ba 0x0004

[Openocd-svn] r1402 - in trunk: . contrib doc src/jtag src/target/interface

[<du...@ma...>]

Author: duane
Date: 2009-03-08 16:14:18 +0100 (Sun, 08 Mar 2009)
New Revision: 1402

Added:
   trunk/src/jtag/arm-jtag-ew.c
   trunk/src/target/interface/arm-jtag-ew.cfg
Modified:
   trunk/configure.in
   trunk/contrib/openocd.udev
   trunk/doc/openocd.texi
   trunk/src/jtag/Makefile.am
   trunk/src/jtag/jtag.c
Log:
Patch from Dimitar Dimitrov adding support for Olimex ARM-JTAG-EW

Modified: trunk/configure.in
===================================================================
--- trunk/configure.in	2009-03-07 15:51:26 UTC (rev 1401)
+++ trunk/configure.in	2009-03-08 15:14:18 UTC (rev 1402)
@@ -273,6 +273,10 @@
   AS_HELP_STRING([--enable-rlink], [Enable building support for the Raisonance RLink JTAG Programmer]),
   [build_rlink=$enableval], [build_rlink=no])
 
+AC_ARG_ENABLE(arm-jtag-ew,
+  AS_HELP_STRING([--enable-arm-jtag-ew], [Enable building support for the Olimex ARM-JTAG-EW Programmer]),
+  [build_armjtagew=$enableval], [build_armjtagew=no])
+
 case $host in 
   *-cygwin*) 
     is_win32=yes
@@ -448,6 +452,12 @@
   AC_DEFINE(BUILD_RLINK, 0, [0 if you don't want the RLink JTAG driver.])
 fi
 
+if test $build_armjtagew = yes; then
+  AC_DEFINE(BUILD_ARMJTAGEW, 1, [1 if you want the ARM-JTAG-EW JTAG driver.])
+else
+  AC_DEFINE(BUILD_ARMJTAGEW, 0, [0 if you don't want the ARM-JTAG-EW JTAG driver.])
+fi
+
 #-- Deal with MingW/Cygwin FTD2XX issues
 
 if test $is_win32 = yes; then
@@ -661,6 +671,7 @@
 AM_CONDITIONAL(JLINK, test $build_jlink = yes)
 AM_CONDITIONAL(VSLLINK, test $build_vsllink = yes)
 AM_CONDITIONAL(RLINK, test $build_rlink = yes)
+AM_CONDITIONAL(ARMJTAGEW, test $build_armjtagew = yes)
 AM_CONDITIONAL(IS_CYGWIN, test $is_cygwin = yes)
 AM_CONDITIONAL(IS_MINGW, test $is_mingw = yes)
 AM_CONDITIONAL(IS_WIN32, test $is_win32 = yes)

Modified: trunk/contrib/openocd.udev
===================================================================
--- trunk/contrib/openocd.udev	2009-03-07 15:51:26 UTC (rev 1401)
+++ trunk/contrib/openocd.udev	2009-03-08 15:14:18 UTC (rev 1402)
@@ -21,5 +21,8 @@
 # Raisonance RLink
 SYSFS{idVendor}=="138e", SYSFS{idProduct}=="9000", MODE="664", GROUP="plugdev"
 
+# Olimex ARM-JTAG-EW
+SYSFS{idVendor}=="15ba", SYSFS{idProduct}=="001e", MODE="664", GROUP="plugdev"
+
 LABEL="openocd_rules_end"
 

Modified: trunk/doc/openocd.texi
===================================================================
--- trunk/doc/openocd.texi	2009-03-07 15:51:26 UTC (rev 1401)
+++ trunk/doc/openocd.texi	2009-03-08 15:14:18 UTC (rev 1402)
@@ -265,6 +265,8 @@
 @option{--enable-vsllink}
 @item
 @option{--enable-rlink} - Raisonance.com dongle.
+@item
+@option{--enable-arm-jtag-ew} - Olimex ARM-JTAG-EW dongle.
 @end itemize
 
 @section Parallel Port Dongles
@@ -445,6 +447,9 @@
 
 @item @b{Versaloon-Link}
 @* Link: @url{http://www.simonqian.com/en/Versaloon}
+
+@item @b{ARM-JTAG-EW}
+@* Link: @url{http://www.olimex.com/dev/arm-jtag-ew.html}
 @end itemize
 
 @section IBM PC Parallel Printer Port Based
@@ -1144,6 +1149,10 @@
 parport_cable wiggler
 jtag_speed 0
 @end verbatim
+@b{ARM-JTAG-EW}
+@verbatim
+interface arm-jtag-ew
+@end verbatim
 @section Interface Conmmand
 
 The interface command tells OpenOCD what type of jtag dongle you are
@@ -1192,6 +1201,9 @@
 
 @item @b{vsllink}
 @* vsllink is part of Versaloon which is a versatile USB programmer.
+
+@item @b{arm-jtag-ew}
+@* Olimex ARM-JTAG-EW usb adapter
 @comment - End parameters
 @end itemize
 @comment - End Interface

Modified: trunk/src/jtag/Makefile.am
===================================================================
--- trunk/src/jtag/Makefile.am	2009-03-07 15:51:26 UTC (rev 1401)
+++ trunk/src/jtag/Makefile.am	2009-03-08 15:14:18 UTC (rev 1402)
@@ -102,8 +102,14 @@
 VSLLINKFILES =
 endif
 
+if ARMJTAGEW
+ARMJTAGEWFILES = arm-jtag-ew.c
+else
+ARMJTAGEWFILES =
+endif
+
 libjtag_a_SOURCES = jtag.c $(BITBANGFILES) $(PARPORTFILES) $(DUMMYFILES) $(FT2232FILES) $(AMTJTAGACCELFILES) $(EP93XXFILES) \
-	$(AT91RM9200FILES) $(GW16012FILES) $(BITQFILES) $(PRESTOFILES) $(USBPROGFILES) $(ECOSBOARDFILES) $(JLINKFILES) $(RLINKFILES) $(VSLLINKFILES)
+	$(AT91RM9200FILES) $(GW16012FILES) $(BITQFILES) $(PRESTOFILES) $(USBPROGFILES) $(ECOSBOARDFILES) $(JLINKFILES) $(RLINKFILES) $(VSLLINKFILES) $(ARMJTAGEWFILES)
 
 noinst_HEADERS = bitbang.h jtag.h bitq.h rlink/dtc_cmd.h rlink/ep1_cmd.h rlink/rlink.h rlink/st7.h
 

Added: trunk/src/jtag/arm-jtag-ew.c
===================================================================
--- trunk/src/jtag/arm-jtag-ew.c	2009-03-07 15:51:26 UTC (rev 1401)
+++ trunk/src/jtag/arm-jtag-ew.c	2009-03-08 15:14:18 UTC (rev 1402)
@@ -0,0 +1,903 @@
+// vim:ts=4 sw=4: 
+
+/***************************************************************************
+ *   Copyright (C) 2009 by Dimitar Dimitrov <di...@gm...>            *
+ *   based on Dominic Rath's and Benedikt Sauter's usbprog.c               *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ *                                                                         *
+ *   This program is distributed in the hope that it will be useful,       *
+ *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ *   GNU General Public License for more details.                          *
+ *                                                                         *
+ *   You should have received a copy of the GNU General Public License     *
+ *   along with this program; if not, write to the                         *
+ *   Free Software Foundation, Inc.,                                       *
+ *   59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ ***************************************************************************/
+
+#ifdef HAVE_CONFIG_H
+#include "config.h"
+#endif
+
+#include "replacements.h"
+
+#include "jtag.h"
+#include <usb.h>
+#include <string.h>
+#include <ctype.h>
+
+/* system includes */
+
+#include "log.h"
+
+/* enable this to debug communication
+ */
+#if 1
+#define _DEBUG_USB_COMMS_
+#define _DEBUG_JTAG_IO_
+#endif
+
+#ifdef _DEBUG_JTAG_IO_
+#define DEBUG_JTAG_IO(expr ...)	LOG_DEBUG(expr)
+#else
+#define DEBUG_JTAG_IO(expr ...)
+#endif
+
+#define USB_VID						0x15ba
+#define USB_PID						0x001e
+
+#define ARMJTAGEW_EPT_BULK_OUT		0x01u
+#define ARMJTAGEW_EPT_BULK_IN		0x82u
+
+#define ARMJTAGEW_USB_TIMEOUT		2000
+
+#define ARMJTAGEW_IN_BUFFER_SIZE	(4*1024)
+#define ARMJTAGEW_OUT_BUFFER_SIZE	(4*1024)
+
+
+/* USB command request codes. */
+#define CMD_GET_VERSION				0x00
+#define CMD_SELECT_DPIMPL			0x10
+#define CMD_SET_TCK_FREQUENCY		0x11
+#define CMD_GET_TCK_FREQUENCY		0x12
+#define CMD_MEASURE_MAX_TCK_FREQ	0x15
+#define CMD_MEASURE_RTCK_RESPONSE	0x16
+#define CMD_TAP_SHIFT				0x17
+#define CMD_SET_TAPHW_STATE			0x20
+#define CMD_GET_TAPHW_STATE			0x21
+#define CMD_TGPWR_SETUP				0x22
+
+/* Global USB buffers */
+static u8 usb_in_buffer[ARMJTAGEW_IN_BUFFER_SIZE];
+static u8 usb_out_buffer[ARMJTAGEW_OUT_BUFFER_SIZE];
+
+/* External interface functions */
+int armjtagew_execute_queue(void);
+int armjtagew_speed(int speed);
+int armjtagew_khz(int khz, int *jtag_speed);
+int armjtagew_register_commands(struct command_context_s *cmd_ctx);
+int armjtagew_init(void);
+int armjtagew_quit(void);
+
+/* CLI command handler functions */
+int armjtagew_handle_armjtagew_info_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
+
+/* Queue command functions */
+void armjtagew_end_state(tap_state_t state);
+void armjtagew_state_move(void);
+void armjtagew_path_move(int num_states, tap_state_t *path);
+void armjtagew_runtest(int num_cycles);
+void armjtagew_scan(int ir_scan, enum scan_type type, u8 *buffer, int scan_size, scan_command_t *command);
+void armjtagew_reset(int trst, int srst);
+void armjtagew_simple_command(u8 command);
+int armjtagew_get_status(void);
+
+/* tap buffer functions */
+void armjtagew_tap_init(void);
+int armjtagew_tap_execute(void);
+void armjtagew_tap_ensure_space(int scans, int bits);
+void armjtagew_tap_append_step(int tms, int tdi);
+void armjtagew_tap_append_scan(int length, u8 *buffer, scan_command_t *command);
+
+/* ARM-JTAG-EW lowlevel functions */
+typedef struct armjtagew_jtag
+{
+	struct usb_dev_handle* usb_handle;
+} armjtagew_jtag_t;
+
+armjtagew_jtag_t *armjtagew_usb_open(void);
+void armjtagew_usb_close(armjtagew_jtag_t *armjtagew_jtag);
+int armjtagew_usb_message(armjtagew_jtag_t *armjtagew_jtag, int out_length, int in_length);
+int armjtagew_usb_write(armjtagew_jtag_t *armjtagew_jtag, int out_length);
+int armjtagew_usb_read(armjtagew_jtag_t *armjtagew_jtag, int exp_in_length);
+
+/* helper functions */
+int armjtagew_get_version_info(void);
+
+#ifdef _DEBUG_USB_COMMS_
+void armjtagew_debug_buffer(u8 *buffer, int length);
+#endif
+
+armjtagew_jtag_t* armjtagew_jtag_handle;
+
+
+
+/***************************************************************************/
+/* External interface implementation */
+
+jtag_interface_t armjtagew_interface =
+{
+	.name = "arm-jtag-ew",
+	.execute_queue = armjtagew_execute_queue,
+	.speed = armjtagew_speed,
+	.khz = armjtagew_khz,
+	.register_commands = armjtagew_register_commands,
+	.init = armjtagew_init,
+	.quit = armjtagew_quit
+};
+
+
+int armjtagew_execute_queue(void)
+{
+	jtag_command_t *cmd = jtag_command_queue;
+	int scan_size;
+	enum scan_type type;
+	u8 *buffer;
+
+	while (cmd != NULL)
+	{
+		switch (cmd->type)
+		{
+			case JTAG_END_STATE:
+				DEBUG_JTAG_IO("end_state: %i", cmd->cmd.end_state->end_state);
+
+				if (cmd->cmd.end_state->end_state != -1)
+				{
+					armjtagew_end_state(cmd->cmd.end_state->end_state);
+				}
+				break;
+
+			case JTAG_RUNTEST:
+				DEBUG_JTAG_IO( "runtest %i cycles, end in %i", cmd->cmd.runtest->num_cycles, \
+					cmd->cmd.runtest->end_state);
+
+				if (cmd->cmd.runtest->end_state != -1)
+				{
+					armjtagew_end_state(cmd->cmd.runtest->end_state);
+				}
+				armjtagew_runtest(cmd->cmd.runtest->num_cycles);
+				break;
+
+			case JTAG_STATEMOVE:
+				DEBUG_JTAG_IO("statemove end in %i", cmd->cmd.statemove->end_state);
+
+				if (cmd->cmd.statemove->end_state != -1)
+				{
+					armjtagew_end_state(cmd->cmd.statemove->end_state);
+				}
+				armjtagew_state_move();
+				break;
+
+			case JTAG_PATHMOVE:
+				DEBUG_JTAG_IO("pathmove: %i states, end in %i", \
+					cmd->cmd.pathmove->num_states, \
+					cmd->cmd.pathmove->path[cmd->cmd.pathmove->num_states - 1]);
+
+				armjtagew_path_move(cmd->cmd.pathmove->num_states, cmd->cmd.pathmove->path);
+				break;
+
+			case JTAG_SCAN:
+				DEBUG_JTAG_IO("scan end in %i", cmd->cmd.scan->end_state);
+
+				if (cmd->cmd.scan->end_state != -1)
+				{
+					armjtagew_end_state(cmd->cmd.scan->end_state);
+				}
+
+				scan_size = jtag_build_buffer(cmd->cmd.scan, &buffer);
+				DEBUG_JTAG_IO("scan input, length = %d", scan_size);
+
+#ifdef _DEBUG_USB_COMMS_
+				armjtagew_debug_buffer(buffer, (scan_size + 7) / 8);
+#endif
+				type = jtag_scan_type(cmd->cmd.scan);
+				armjtagew_scan(cmd->cmd.scan->ir_scan, type, buffer, scan_size, cmd->cmd.scan);
+				break;
+
+			case JTAG_RESET:
+				DEBUG_JTAG_IO("reset trst: %i srst %i", cmd->cmd.reset->trst, cmd->cmd.reset->srst);
+
+				armjtagew_tap_execute();
+
+				if (cmd->cmd.reset->trst == 1)
+				{
+					tap_set_state(TAP_RESET);
+				}
+				armjtagew_reset(cmd->cmd.reset->trst, cmd->cmd.reset->srst);
+				break;
+
+			case JTAG_SLEEP:
+				DEBUG_JTAG_IO("sleep %i", cmd->cmd.sleep->us);
+				armjtagew_tap_execute();
+				jtag_sleep(cmd->cmd.sleep->us);
+				break;
+
+			default:
+				LOG_ERROR("BUG: unknown JTAG command type encountered");
+				exit(-1);
+		}
+		cmd = cmd->next;
+	}
+
+	return armjtagew_tap_execute();
+}
+
+
+/* Sets speed in kHz. */
+int armjtagew_speed(int speed)
+{
+    int result;
+    int speed_real;
+
+
+    usb_out_buffer[0] = CMD_SET_TCK_FREQUENCY;
+	buf_set_u32(usb_out_buffer+1, 0, 32, speed);
+
+    result = armjtagew_usb_message(armjtagew_jtag_handle, 4, 4);
+
+    if (result < 0)
+    {
+        LOG_ERROR("ARM-JTAG-EW setting speed failed (%d)", result);
+        return ERROR_JTAG_DEVICE_ERROR;
+    }
+
+	usb_out_buffer[0] = CMD_GET_TCK_FREQUENCY;
+    result = armjtagew_usb_message(armjtagew_jtag_handle, 1, 4);
+	speed_real = (int)buf_get_u32(usb_in_buffer,0,32);
+	if(result < 0) 
+	{
+        LOG_ERROR("ARM-JTAG-EW getting speed failed (%d)", result);
+        return ERROR_JTAG_DEVICE_ERROR;
+	} 
+	else
+	{
+    	LOG_INFO("Requested speed %dkHz, emulator reported %dkHz.", speed, speed_real);
+	}
+
+    return ERROR_OK;
+}
+
+
+int armjtagew_khz(int khz, int *jtag_speed)
+{
+	*jtag_speed = khz;
+
+	return ERROR_OK;
+}
+
+int armjtagew_register_commands(struct command_context_s *cmd_ctx)
+{
+	register_command(cmd_ctx, NULL, "armjtagew_info", armjtagew_handle_armjtagew_info_command, COMMAND_EXEC,
+		"query armjtagew info");
+	return ERROR_OK;
+}
+
+int armjtagew_init(void)
+{
+	int check_cnt;
+
+	armjtagew_jtag_handle = armjtagew_usb_open();
+
+	if (armjtagew_jtag_handle == 0)
+	{
+		LOG_ERROR("Cannot find ARM-JTAG-EW Interface! Please check connection and permissions.");
+		return ERROR_JTAG_INIT_FAILED;
+	}
+
+	check_cnt = 0;
+	while (check_cnt < 3)
+	{
+		if (armjtagew_get_version_info() == ERROR_OK)
+		{
+			/* attempt to get status */
+			armjtagew_get_status();
+			break;
+		}
+
+		check_cnt++;
+	}
+
+	if (check_cnt == 3)
+	{
+		LOG_INFO("ARM-JTAG-EW initial read failed, don't worry");
+	}
+
+	LOG_INFO("ARM-JTAG-EW JTAG Interface ready");
+
+	armjtagew_reset(0, 0);
+	armjtagew_tap_init();
+
+	return ERROR_OK;
+}
+
+int armjtagew_quit(void)
+{
+	armjtagew_usb_close(armjtagew_jtag_handle);
+	return ERROR_OK;
+}
+
+/***************************************************************************/
+/* Queue command implementations */
+
+void armjtagew_end_state(tap_state_t state)
+{
+	if (tap_is_state_stable(state))
+	{
+		tap_set_end_state(state);
+	}
+	else
+	{
+		LOG_ERROR("BUG: %i is not a valid end state", state);
+		exit(-1);
+	}
+}
+
+/* Goes to the end state. */
+void armjtagew_state_move(void)
+{
+	int i;
+	int tms = 0;
+	u8 tms_scan = tap_get_tms_path(tap_get_state(), tap_get_end_state());
+
+	for (i = 0; i < 7; i++)
+	{
+		tms = (tms_scan >> i) & 1;
+		armjtagew_tap_append_step(tms, 0);
+	}
+
+	tap_set_state(tap_get_end_state());
+}
+
+void armjtagew_path_move(int num_states, tap_state_t *path)
+{
+	int i;
+
+	for (i = 0; i < num_states; i++)
+	{
+		/*
+		 * TODO: The ARM-JTAG-EW hardware delays TDI with 3 TCK cycles when in RTCK mode. 
+		 * Either handle that here, or update the documentation with examples
+		 * how to fix that in the configuration files.
+		 */
+		if (path[i] == tap_state_transition(tap_get_state(), false))
+		{
+			armjtagew_tap_append_step(0, 0);
+		}
+		else if (path[i] == tap_state_transition(tap_get_state(), true))
+		{
+			armjtagew_tap_append_step(1, 0);
+		}
+		else
+		{
+			LOG_ERROR("BUG: %s -> %s isn't a valid TAP transition", tap_state_name(tap_get_state()), tap_state_name(path[i]));
+			exit(-1);
+		}
+
+		tap_set_state(path[i]);
+	}
+
+	tap_set_end_state(tap_get_state());
+}
+
+void armjtagew_runtest(int num_cycles)
+{
+	int i;
+
+	tap_state_t saved_end_state = tap_get_end_state();
+
+	/* only do a state_move when we're not already in IDLE */
+	if (tap_get_state() != TAP_IDLE)
+	{
+		armjtagew_end_state(TAP_IDLE);
+		armjtagew_state_move();
+	}
+
+	/* execute num_cycles */
+	for (i = 0; i < num_cycles; i++)
+	{
+		armjtagew_tap_append_step(0, 0);
+	}
+
+	/* finish in end_state */
+	armjtagew_end_state(saved_end_state);
+	if (tap_get_state() != tap_get_end_state())
+	{
+		armjtagew_state_move();
+	}
+}
+
+void armjtagew_scan(int ir_scan, enum scan_type type, u8 *buffer, int scan_size, scan_command_t *command)
+{
+	tap_state_t saved_end_state;
+
+	armjtagew_tap_ensure_space(1, scan_size + 8);
+
+	saved_end_state = tap_get_end_state();
+
+	/* Move to appropriate scan state */
+	armjtagew_end_state(ir_scan ? TAP_IRSHIFT : TAP_DRSHIFT);
+
+	armjtagew_state_move();
+	armjtagew_end_state(saved_end_state);
+
+	/* Scan */
+	armjtagew_tap_append_scan(scan_size, buffer, command);
+
+	/* We are in Exit1, go to Pause */
+	armjtagew_tap_append_step(0, 0);
+
+	tap_set_state(ir_scan ? TAP_IRPAUSE : TAP_DRPAUSE);
+
+	if (tap_get_state() != tap_get_end_state())
+	{
+		armjtagew_state_move();
+	}
+}
+
+void armjtagew_reset(int trst, int srst)
+{
+	const u8 trst_mask = (1u<<5);
+	const u8 srst_mask = (1u<<6);
+	u8 val = 0;
+	u8 outp_en = 0;
+	u8 change_mask = 0;
+	int result;
+
+	LOG_DEBUG("trst: %i, srst: %i", trst, srst);
+
+	if (srst == 0)
+	{
+		val |= srst_mask;
+		outp_en &= ~srst_mask;		/* tristate */
+		change_mask |= srst_mask;
+	}
+	else if (srst == 1)
+	{
+		val &= ~srst_mask;
+		outp_en |= srst_mask;
+		change_mask |= srst_mask;
+	}
+
+	if (trst == 0)
+	{
+		val |= trst_mask;
+		outp_en &= ~trst_mask;		/* tristate */
+		change_mask |= trst_mask;
+	}
+	else if (trst == 1)
+	{
+		val &= ~trst_mask;
+		outp_en |= trst_mask;
+		change_mask |= trst_mask;
+	}
+
+	usb_out_buffer[0] = CMD_SET_TAPHW_STATE;
+	usb_out_buffer[1] = val;
+	usb_out_buffer[2] = outp_en;
+	usb_out_buffer[3] = change_mask;
+	result = armjtagew_usb_write(armjtagew_jtag_handle, 4);
+	if (result != 4)
+	{
+		LOG_ERROR("ARM-JTAG-EW TRST/SRST pin set failed failed (%d)", result);
+	}
+}
+
+
+int armjtagew_get_status(void)
+{
+	int result;
+
+	usb_out_buffer[0] = CMD_GET_TAPHW_STATE;
+	result = armjtagew_usb_message(armjtagew_jtag_handle, 1, 12);
+
+	if (result == 0)
+	{
+		unsigned int u_tg = buf_get_u32(usb_in_buffer, 0, 16);
+		LOG_INFO("U_tg = %d mV, U_aux = %d mV, U_tgpwr = %d mV, I_tgpwr = %d mA, D1 = %d, Target power %s %s\n", \
+			buf_get_u32(usb_in_buffer + 0, 0, 16), \
+			buf_get_u32(usb_in_buffer + 2, 0, 16), \
+			buf_get_u32(usb_in_buffer + 4, 0, 16), \
+			buf_get_u32(usb_in_buffer + 6, 0, 16), \
+			usb_in_buffer[9], \
+			usb_in_buffer[11] ? "OVERCURRENT" : "OK", \
+			usb_in_buffer[10] ? "enabled" : "disabled");
+
+		if (u_tg < 1500)
+		{
+			LOG_ERROR("Vref too low. Check Target Power\n");
+		}
+	}
+	else
+	{
+		LOG_ERROR("ARM-JTAG-EW command CMD_GET_TAPHW_STATE failed (%d)\n", result);
+	}
+
+	return ERROR_OK;
+}
+
+int armjtagew_get_version_info(void)
+{
+	int result;
+	char sn[16];
+	char auxinfo[257];
+
+	/* query hardware version */
+	usb_out_buffer[0] = CMD_GET_VERSION;
+	result = armjtagew_usb_message(armjtagew_jtag_handle, 1, 4+15+256);
+
+	if (result != 0) 
+	{
+		LOG_ERROR("ARM-JTAG-EW command CMD_GET_VERSION failed (%d)\n", result);
+		return ERROR_JTAG_DEVICE_ERROR;
+	}
+
+
+	memcpy(sn, usb_in_buffer+4, 15);
+	sn[15] = '\0';
+	memcpy(auxinfo, usb_in_buffer+4+15, 256);
+	auxinfo[256] = '\0';
+
+	LOG_INFO("ARM-JTAG-EW firmware version %d.%d, hardware revision %c, SN=%s, Additional info: %s", \
+			usb_in_buffer[1], usb_in_buffer[0], \
+			isgraph(usb_in_buffer[2]) ? usb_in_buffer[2] : 'X', \
+			sn, auxinfo);
+	return ERROR_OK;
+}
+
+int armjtagew_handle_armjtagew_info_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
+{
+	if (armjtagew_get_version_info() == ERROR_OK)
+	{
+		/* attempt to get status */
+		armjtagew_get_status();
+	}
+
+	return ERROR_OK;
+}
+
+/***************************************************************************/
+/* ARM-JTAG-EW tap functions */
+
+/* 2048 is the max value we can use here */
+#define ARMJTAGEW_TAP_BUFFER_SIZE 2048
+
+static int tap_length;
+static u8 tms_buffer[ARMJTAGEW_TAP_BUFFER_SIZE];
+static u8 tdi_buffer[ARMJTAGEW_TAP_BUFFER_SIZE];
+static u8 tdo_buffer[ARMJTAGEW_TAP_BUFFER_SIZE];
+
+typedef struct
+{
+	int first;	/* First bit position in tdo_buffer to read */
+	int length; /* Number of bits to read */
+	scan_command_t *command; /* Corresponding scan command */
+	u8 *buffer;
+} pending_scan_result_t;
+
+#define MAX_PENDING_SCAN_RESULTS 256
+
+static int pending_scan_results_length;
+static pending_scan_result_t pending_scan_results_buffer[MAX_PENDING_SCAN_RESULTS];
+
+static int last_tms;
+
+void armjtagew_tap_init(void)
+{
+	tap_length = 0;
+	pending_scan_results_length = 0;
+}
+
+void armjtagew_tap_ensure_space(int scans, int bits)
+{
+	int available_scans = MAX_PENDING_SCAN_RESULTS - pending_scan_results_length;
+	int available_bits = ARMJTAGEW_TAP_BUFFER_SIZE * 8 - tap_length;
+
+	if (scans > available_scans || bits > available_bits)
+	{
+		armjtagew_tap_execute();
+	}
+}
+
+void armjtagew_tap_append_step(int tms, int tdi)
+{
+	last_tms = tms;
+	int index = tap_length / 8;
+
+	if (index < ARMJTAGEW_TAP_BUFFER_SIZE)
+	{
+		int bit_index = tap_length % 8;
+		u8 bit = 1 << bit_index;
+
+		if (tms)
+		{
+			tms_buffer[index] |= bit;
+		}
+		else
+		{
+			tms_buffer[index] &= ~bit;
+		}
+
+		if (tdi)
+		{
+			tdi_buffer[index] |= bit;
+		}
+		else
+		{
+			tdi_buffer[index] &= ~bit;
+		}
+
+		tap_length++;
+	}
+	else
+	{
+		LOG_ERROR("armjtagew_tap_append_step, overflow");
+	}
+}
+
+void armjtagew_tap_append_scan(int length, u8 *buffer, scan_command_t *command)
+{
+	pending_scan_result_t *pending_scan_result = &pending_scan_results_buffer[pending_scan_results_length];
+	int i;
+
+	pending_scan_result->first = tap_length;
+	pending_scan_result->length = length;
+	pending_scan_result->command = command;
+	pending_scan_result->buffer = buffer;
+
+	for (i = 0; i < length; i++)
+	{
+		armjtagew_tap_append_step((i < length-1 ? 0 : 1), (buffer[i/8] >> (i%8)) & 1);
+	}
+	pending_scan_results_length++;
+}
+
+/* Pad and send a tap sequence to the device, and receive the answer.
+ * For the purpose of padding we assume that we are in idle or pause state. */
+int armjtagew_tap_execute(void)
+{
+	int byte_length;
+	int tms_offset;
+	int tdi_offset;
+	int i;
+	int result;
+
+	if (tap_length > 0)
+	{
+		/* Pad last byte so that tap_length is divisible by 8 */
+		while (tap_length % 8 != 0)
+		{
+			/* More of the last TMS value keeps us in the same state,
+			 * analogous to free-running JTAG interfaces. */
+			armjtagew_tap_append_step(last_tms, 0);
+		}
+
+		byte_length = tap_length / 8;
+
+		usb_out_buffer[0] = CMD_TAP_SHIFT;
+		buf_set_u32(usb_out_buffer+1, 0, 16, byte_length);
+
+		tms_offset = 3;
+		for (i = 0; i < byte_length; i++)
+		{
+			usb_out_buffer[tms_offset + i] = flip_u32(tms_buffer[i],8);
+		}
+
+		tdi_offset = tms_offset + byte_length;
+		for (i = 0; i < byte_length; i++)
+		{
+			usb_out_buffer[tdi_offset + i] = flip_u32(tdi_buffer[i],8);
+		}
+
+		result = armjtagew_usb_message(armjtagew_jtag_handle, 3 + 2 * byte_length, byte_length + 4);
+
+		if (result == 0)
+		{
+			int stat;
+
+			stat = (int)buf_get_u32(usb_in_buffer + byte_length, 0, 32);
+			if(stat) {
+				LOG_ERROR("armjtagew_tap_execute, emulator returned error code %d for a CMD_TAP_SHIFT command", stat);
+				return ERROR_JTAG_QUEUE_FAILED;
+			}
+
+			for (i = 0; i < byte_length; i++)
+			{
+				tdo_buffer[i] = flip_u32(usb_in_buffer[i],8);
+			}
+
+			for (i = 0; i < pending_scan_results_length; i++)
+			{
+				pending_scan_result_t *pending_scan_result = &pending_scan_results_buffer[i];
+				u8 *buffer = pending_scan_result->buffer;
+				int length = pending_scan_result->length;
+				int first = pending_scan_result->first;
+				scan_command_t *command = pending_scan_result->command;
+
+				/* Copy to buffer */
+				buf_set_buf(tdo_buffer, first, buffer, 0, length);
+
+				DEBUG_JTAG_IO("pending scan result, length = %d", length);
+
+#ifdef _DEBUG_USB_COMMS_
+				armjtagew_debug_buffer(buffer, byte_length);
+#endif
+
+				if (jtag_read_buffer(buffer, command) != ERROR_OK)
+				{
+					armjtagew_tap_init();
+					return ERROR_JTAG_QUEUE_FAILED;
+				}
+
+				if (pending_scan_result->buffer != NULL)
+				{
+					free(pending_scan_result->buffer);
+				}
+			}
+		}
+		else
+		{
+			LOG_ERROR("armjtagew_tap_execute, wrong result %d, expected %d", result, byte_length);
+			return ERROR_JTAG_QUEUE_FAILED;
+		}
+
+		armjtagew_tap_init();
+	}
+
+	return ERROR_OK;
+}
+
+/*****************************************************************************/
+/* JLink USB low-level functions */
+
+armjtagew_jtag_t* armjtagew_usb_open()
+{
+	struct usb_bus *busses;
+	struct usb_bus *bus;
+	struct usb_device *dev;
+
+	armjtagew_jtag_t *result;
+
+	result = (armjtagew_jtag_t*) malloc(sizeof(armjtagew_jtag_t));
+
+	usb_init();
+	usb_find_busses();
+	usb_find_devices();
+
+	busses = usb_get_busses();
+
+	/* find armjtagew_jtag device in usb bus */
+
+	for (bus = busses; bus; bus = bus->next)
+	{
+		for (dev = bus->devices; dev; dev = dev->next)
+		{
+			if ((dev->descriptor.idVendor == USB_VID) && (dev->descriptor.idProduct == USB_PID))
+			{
+				result->usb_handle = usb_open(dev);
+
+#if 0
+				/* usb_set_configuration required under win32 */
+				usb_set_configuration(result->usb_handle, dev->config[0].bConfigurationValue);
+#endif
+				usb_claim_interface(result->usb_handle, 0);
+
+#if 0
+				/*
+				 * This makes problems under Mac OS X. And is not needed
+				 * under Windows. Hopefully this will not break a linux build
+				 */
+				usb_set_altinterface(result->usb_handle, 0);
+#endif
+				return result;
+			}
+		}
+	}
+
+	free(result);
+	return NULL;
+}
+
+void armjtagew_usb_close(armjtagew_jtag_t *armjtagew_jtag)
+{
+	usb_close(armjtagew_jtag->usb_handle);
+	free(armjtagew_jtag);
+}
+
+/* Send a message and receive the reply. */
+int armjtagew_usb_message(armjtagew_jtag_t *armjtagew_jtag, int out_length, int in_length)
+{
+	int result;
+
+	result = armjtagew_usb_write(armjtagew_jtag, out_length);
+	if (result == out_length)
+	{
+		result = armjtagew_usb_read(armjtagew_jtag, in_length);
+		if (result != in_length) 
+		{
+			LOG_ERROR("usb_bulk_read failed (requested=%d, result=%d)", in_length, result);
+			return -1;
+		}
+	}
+	else
+	{
+		LOG_ERROR("usb_bulk_write failed (requested=%d, result=%d)", out_length, result);
+		return -1;
+	}
+	return 0;
+}
+
+/* Write data from out_buffer to USB. */
+int armjtagew_usb_write(armjtagew_jtag_t *armjtagew_jtag, int out_length)
+{
+	int result;
+
+	if (out_length > ARMJTAGEW_OUT_BUFFER_SIZE)
+	{
+		LOG_ERROR("armjtagew_jtag_write illegal out_length=%d (max=%d)", out_length, ARMJTAGEW_OUT_BUFFER_SIZE);
+		return -1;
+	}
+
+	result = usb_bulk_write(armjtagew_jtag->usb_handle, ARMJTAGEW_EPT_BULK_OUT, \
+		(char*)usb_out_buffer, out_length, ARMJTAGEW_USB_TIMEOUT);
+
+	DEBUG_JTAG_IO("armjtagew_usb_write, out_length = %d, result = %d", out_length, result);
+
+#ifdef _DEBUG_USB_COMMS_
+	armjtagew_debug_buffer(usb_out_buffer, out_length);
+#endif
+	return result;
+}
+
+/* Read data from USB into in_buffer. */
+int armjtagew_usb_read(armjtagew_jtag_t *armjtagew_jtag, int exp_in_length)
+{
+	int result = usb_bulk_read(armjtagew_jtag->usb_handle, ARMJTAGEW_EPT_BULK_IN, \
+		(char*)usb_in_buffer, exp_in_length, ARMJTAGEW_USB_TIMEOUT);
+
+	DEBUG_JTAG_IO("armjtagew_usb_read, result = %d", result);
+
+#ifdef _DEBUG_USB_COMMS_
+	armjtagew_debug_buffer(usb_in_buffer, result);
+#endif
+	return result;
+}
+
+
+#ifdef _DEBUG_USB_COMMS_
+#define BYTES_PER_LINE  16
+
+void armjtagew_debug_buffer(u8 *buffer, int length)
+{
+	char line[81];
+	char s[4];
+	int i;
+	int j;
+
+	for (i = 0; i < length; i += BYTES_PER_LINE)
+	{
+		snprintf(line, 5, "%04x", i);
+		for (j = i; j < i + BYTES_PER_LINE && j < length; j++)
+		{
+			snprintf(s, 4, " %02x", buffer[j]);
+			strcat(line, s);
+		}
+		LOG_DEBUG(line);
+	}
+}
+#endif
+

Modified: trunk/src/jtag/jtag.c
===================================================================
--- trunk/src/jtag/jtag.c	2009-03-07 15:51:26 UTC (rev 1401)
+++ trunk/src/jtag/jtag.c	2009-03-08 15:14:18 UTC (rev 1402)
@@ -155,6 +155,10 @@
 	extern jtag_interface_t rlink_interface;
 #endif
 
+#if BUILD_ARMJTAGEW == 1
+	extern jtag_interface_t armjtagew_interface;
+#endif
+
 jtag_interface_t *jtag_interfaces[] = {
 #if BUILD_ECOSBOARD == 1
 	&zy1000_interface,
@@ -198,6 +202,9 @@
 #if BUILD_RLINK == 1
 	&rlink_interface,
 #endif
+#if BUILD_ARMJTAGEW == 1
+	&armjtagew_interface,
+#endif
 	NULL,
 };
 

Added: trunk/src/target/interface/arm-jtag-ew.cfg
===================================================================
--- trunk/src/target/interface/arm-jtag-ew.cfg	2009-03-07 15:51:26 UTC (rev 1401)
+++ trunk/src/target/interface/arm-jtag-ew.cfg	2009-03-08 15:14:18 UTC (rev 1402)
@@ -0,0 +1,2 @@
+# Interface ARM-JTAG-EW
+interface arm-jtag-ew

[Openocd-svn] r1401 - trunk/src/jtag

[<du...@ma...>]

Author: duane
Date: 2009-03-07 16:51:26 +0100 (Sat, 07 Mar 2009)
New Revision: 1401

Modified:
   trunk/src/jtag/ft2232.c
Log:
Accept/create both A and Non-A ft2232 based descriptions

Modified: trunk/src/jtag/ft2232.c
===================================================================
--- trunk/src/jtag/ft2232.c	2009-03-07 15:19:21 UTC (rev 1400)
+++ trunk/src/jtag/ft2232.c	2009-03-07 15:51:26 UTC (rev 1401)
@@ -97,6 +97,7 @@
 static int ft2232_stableclocks(int num_cycles, jtag_command_t* cmd);
 
 
+char *        ft2232_device_desc_A = NULL;
 char*         ft2232_device_desc = NULL;
 char*         ft2232_serial  = NULL;
 char*         ft2232_layout  = NULL;
@@ -1570,7 +1571,28 @@
 		return ERROR_JTAG_INIT_FAILED;
 	}
 
-	if ( ( status = FT_OpenEx(openex_string, openex_flags, &ftdih) ) != FT_OK )
+	status = FT_OpenEx(openex_string, openex_flags, &ftdih);
+	if( status != FT_OK ){
+		// under Win32, the FTD2XX driver appends an "A" to the end
+		// of the description, if we tried by the desc, then
+		// try by the alternate "A" description.
+		if( openex_string == ft2232_device_desc ){
+			// Try the alternate method.
+			openex_string = ft2232_device_desc_A;
+			status = FT_OpenEx(openex_string, openex_flags, &ftdih);
+			if( status == FT_OK ){
+				// yea, the "alternate" method worked!
+			} else {
+				// drat, give the user a meaningfull message.
+				// telling the use we tried *BOTH* methods.
+				LOG_WARNING("Unable to open FTDI Device tried: '%s' and '%s'\n",
+							ft2232_device_desc,
+							ft2232_device_desc_A );
+			}
+		}
+	}
+
+	if ( status != FT_OK )
 	{
 		DWORD num_devices;
 
@@ -2414,9 +2436,29 @@
 
 int ft2232_handle_device_desc_command(struct command_context_s* cmd_ctx, char* cmd, char** args, int argc)
 {
+	char *cp;
+	char buf[200];
 	if (argc == 1)
 	{
 		ft2232_device_desc = strdup(args[0]);
+		cp = strchr( ft2232_device_desc, 0 );
+		// under Win32, the FTD2XX driver appends an "A" to the end
+		// of the description, this examines the given desc
+		// and creates the 'missing' _A or non_A variable.
+		if( (cp[-1] == 'A') && (cp[-2]==' ') ){
+			// it was, so make this the "A" version.
+			ft2232_device_desc_A = ft2232_device_desc;
+			// and *CREATE* the non-A version.
+			strcpy( buf, ft2232_device_desc );
+			cp = strchr( buf, 0 );
+			cp[-2] = 0;
+			ft2232_device_desc =  strdup( buf );
+		} else {
+			// <space>A not defined
+			// so create it
+			sprintf( buf, "%s A", ft2232_device_desc );
+			ft2232_device_desc_A = strdup( buf );
+		}
 	}
 	else
 	{

[Openocd-svn] r1400 - in trunk: doc src/helper

[<du...@ma...>]

Author: duane
Date: 2009-03-07 16:19:21 +0100 (Sat, 07 Mar 2009)
New Revision: 1400

Modified:
   trunk/doc/openocd.texi
   trunk/src/helper/command.c
Log:
Added HostOS variable

Modified: trunk/doc/openocd.texi
===================================================================
--- trunk/doc/openocd.texi	2009-03-05 07:41:04 UTC (rev 1399)
+++ trunk/doc/openocd.texi	2009-03-07 15:19:21 UTC (rev 1400)
@@ -3063,9 +3063,10 @@
 can be used.
 
 @node TCL scripting API
-@chapter TCL scripting API
+@chapter TCL scripts
 @cindex TCL scripting API
-API rules
+@cindex TCL scripts
+@section API Rules
 
 The commands are stateless. E.g. the telnet command line has a concept
 of currently active target, the Tcl API proc's take this sort of state
@@ -3102,7 +3103,11 @@
 Lists returned must be relatively small. Otherwise a range
 should be passed in to the proc in question.
 
-Low level commands are prefixed with "openocd_", e.g. openocd_flash_banks
+@section Internal Low Level Commands
+
+By Low level, the intent is a human would not directly use these commands.
+
+Low level commands are (should be) prefixed with "openocd_", e.g. openocd_flash_banks
 is the low level API upon which "flash banks" is implemented.
 
 @itemize @bullet
@@ -3121,7 +3126,25 @@
 startup.tcl "unknown" proc will translate this into a tcl proc
 called "flash_banks".
 
+@section OpenOCD specific Global Variables
 
+@subsection HostOS
+
+Real TCL has ::tcl_platform(), and platform::identify, and many other
+variables. JimTCL, as implimented in OpenOCD creates $HostOS which
+holds one of the following values.
+
+@itemize bullet 
+@item @b{winxx}    Built using Microsoft Visual Studio
+@item @b{linux}    Linux is the underlying operating sytem
+@item @b{darwin}   Darwin (mac-os) is the underlying operating sytem.
+@item @b{cygwin}   Running under Cygwin
+@item @b{mingw32}  Running under MingW32
+@item @b{other}    Unknown, none of the above.
+@end itemize
+
+Note: 'winxx' was choosen because today (March-2009) no distinction is made between Win32 and Win64.
+
 @node Upgrading
 @chapter Deprecated/Removed Commands
 @cindex Deprecated/Removed Commands

Modified: trunk/src/helper/command.c
===================================================================
--- trunk/src/helper/command.c	2009-03-05 07:41:04 UTC (rev 1399)
+++ trunk/src/helper/command.c	2009-03-07 15:19:21 UTC (rev 1400)
@@ -672,6 +672,7 @@
 {
 	command_context_t* context = malloc(sizeof(command_context_t));
 	extern const char startup_tcl[];
+	const char *HostOs;
 
 	context->mode = COMMAND_EXEC;
 	context->commands = NULL;
@@ -687,6 +688,28 @@
 	Jim_RegisterCoreCommands(interp);
 #endif
 
+#if defined( _MSC_VER )
+	/* WinXX - is generic, the forward
+	 * looking problem is this:
+	 * 
+	 *   "win32" or "win64"
+	 *
+	 * "winxx" is generic.
+	 */
+	HostOs = "winxx";
+#elif defined( __LINUX__)
+	HostOs = "linux";
+#elif defined( __DARWIN__ )
+	HostOs = "darwin";
+#elif defined( __CYGWIN__ )
+	HostOs = "cygwin";
+#elif defined( __MINGW32__ )
+	HostOs = "mingw32";
+#else
+	HostOs = "other";
+#endif
+	Jim_SetGlobalVariableStr( interp, "ocd_HOSTOS", Jim_NewStringObj( interp, HostOs , strlen(HostOs)) );
+
 	Jim_CreateCommand(interp, "ocd_find", jim_find, NULL, NULL);
 	Jim_CreateCommand(interp, "echo", jim_echo, NULL, NULL);
 	Jim_CreateCommand(interp, "capture", jim_capture, NULL, NULL);

[Openocd-svn] r1399 - trunk/src/flash

[oharboe at B. <oh...@ma...>]

Author: oharboe
Date: 2009-03-05 08:41:04 +0100 (Thu, 05 Mar 2009)
New Revision: 1399

Modified:
   trunk/src/flash/flash.c
Log:
Audrius Urmanavi?\196?\141ius <did...@gm...>  cleanup flash fill

Modified: trunk/src/flash/flash.c
===================================================================
--- trunk/src/flash/flash.c	2009-03-05 06:55:35 UTC (rev 1398)
+++ trunk/src/flash/flash.c	2009-03-05 07:41:04 UTC (rev 1399)
@@ -727,6 +727,7 @@
 	u32 count;
 	u8 chunk[1024];
 	u32 wrote = 0;
+	u32 cur_size = 0;
 	int chunk_count;
 	char *duration_text;
 	duration_t duration;
@@ -786,9 +787,9 @@
 
 	duration_start_measure(&duration);
 
-	for (wrote=0; wrote<(count*wordsize); wrote+=sizeof(chunk))
+	for (wrote=0; wrote<(count*wordsize); wrote += cur_size)
 	{
-		int cur_size = MIN( (count*wordsize - wrote) , 1024 );
+		cur_size = MIN( (count*wordsize - wrote), sizeof(chunk) );
 		flash_bank_t *bank;
 		bank = get_flash_bank_by_addr(target, address);
 		if(bank == NULL)
@@ -798,7 +799,6 @@
 		err = flash_driver_write(bank, chunk, address - bank->base + wrote, cur_size);
 		if (err!=ERROR_OK)
 			return err;
-		wrote += cur_size;
 	}
 
 	if ((retval = duration_stop_measure(&duration, &duration_text)) != ERROR_OK)

[Openocd-svn] r1398 - trunk/src/target

[oharboe at B. <oh...@ma...>]

Author: oharboe
Date: 2009-03-05 07:55:35 +0100 (Thu, 05 Mar 2009)
New Revision: 1398

Modified:
   trunk/src/target/target.c
Log:
Nicolas Pitre <ni...@ca...> fix "halt 0" to only halt and not to poll/wait afterwards. This follows the intention in the docs.

Modified: trunk/src/target/target.c
===================================================================
--- trunk/src/target/target.c	2009-03-04 21:28:50 UTC (rev 1397)
+++ trunk/src/target/target.c	2009-03-05 06:55:35 UTC (rev 1398)
@@ -1759,6 +1759,16 @@
 		return retval;
 	}
 
+	if (argc == 1)
+	{
+		int wait;
+		char *end;
+
+		wait = strtoul(args[0], &end, 0);
+		if (!*end && !wait)
+			return ERROR_OK;
+	}
+
 	return handle_wait_halt_command(cmd_ctx, cmd, args, argc);
 }
 

[Openocd-svn] r1397 - trunk/src/target/board

[<oh...@ma...>]

Author: oharboe
Date: 2009-03-04 22:28:50 +0100 (Wed, 04 Mar 2009)
New Revision: 1397

Modified:
   trunk/src/target/board/sheevaplug.cfg
Log:
Nicolas Pitre <ni...@ca...> making reset+halt on the
SheevaPlug 100% reliable (needs patch in target.c to fix "halt 0").

Modified: trunk/src/target/board/sheevaplug.cfg
===================================================================
--- trunk/src/target/board/sheevaplug.cfg	2009-03-03 12:05:49 UTC (rev 1396)
+++ trunk/src/target/board/sheevaplug.cfg	2009-03-04 21:28:50 UTC (rev 1397)
@@ -3,8 +3,6 @@
 source [find interface/sheevaplug.cfg]
 source [find target/feroceon.cfg]
 
-$_TARGETNAME configure -event reset-init { sheevaplug_init }
-
 $_TARGETNAME configure \
 	-work-area-phys 0x10000000 \
 	-work-area-size 65536 \
@@ -17,6 +15,13 @@
 
 proc sheevaplug_init { } {
 
+	# We need to assert DBGRQ while holding nSRST down.
+	# However DBGACK will be set only when nSRST is released.
+	jtag_reset 0 1
+	halt 0
+	jtag_reset 0 0
+	wait_halt
+
 	arm926ejs cp15 0 0 1 0 0x00052078
 
 	mww 0xD0001400 0x43000C30 #  DDR SDRAM Configuration Register
@@ -90,8 +95,8 @@
 
 proc sheevaplug_reflash_uboot { } {
 
-	# reflash the u-Boot binary
-	#reset init
+	# reflash the u-Boot binary and reboot into it
+	sheevaplug_init
 	nand probe 0
 	nand erase 0 0 4
 	nand write 0 uboot.bin 0
@@ -101,8 +106,8 @@
 
 proc sheevaplug_load_uboot { } {
 
-	# load u-Boot into RAM
-	#reset init
+	# load u-Boot into RAM and execute it
+	sheevaplug_init
 	load_image /tmp/uboot.elf
 	verify_image uboot.elf
 	resume 0x00600000

[Openocd-svn] r1396 - trunk/src/target

[oharboe at B. <oh...@ma...>]

Author: oharboe
Date: 2009-03-03 13:05:49 +0100 (Tue, 03 Mar 2009)
New Revision: 1396

Modified:
   trunk/src/target/target.c
Log:
test code for elf parsing.

Modified: trunk/src/target/target.c
===================================================================
--- trunk/src/target/target.c	2009-03-02 12:51:42 UTC (rev 1395)
+++ trunk/src/target/target.c	2009-03-03 12:05:49 UTC (rev 1396)
@@ -76,6 +76,7 @@
 int handle_load_image_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
 int handle_dump_image_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
 int handle_verify_image_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
+int handle_test_image_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
 int handle_bp_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
 int handle_rbp_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
 int handle_wp_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
@@ -1329,6 +1330,7 @@
 	register_command(cmd_ctx,  NULL, "load_image", handle_load_image_command, COMMAND_EXEC, "load_image <file> <address> ['bin'|'ihex'|'elf'|'s19'] [min_address] [max_length]");
 	register_command(cmd_ctx,  NULL, "dump_image", handle_dump_image_command, COMMAND_EXEC, "dump_image <file> <address> <size>");
 	register_command(cmd_ctx,  NULL, "verify_image", handle_verify_image_command, COMMAND_EXEC, "verify_image <file> [offset] [type]");
+	register_command(cmd_ctx,  NULL, "test_image", handle_test_image_command, COMMAND_EXEC, "test_image <file> [offset] [type]");
 
 	if((retval = target_request_register_commands(cmd_ctx)) != ERROR_OK)
 		return retval;
@@ -2161,7 +2163,7 @@
 	return ERROR_OK;
 }
 
-int handle_verify_image_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
+int handle_verify_image_command_internal(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, int verify)
 {
 	u8 *buffer;
 	u32 buf_cnt;
@@ -2225,55 +2227,61 @@
 			break;
 		}
 
-		/* calculate checksum of image */
-		image_calculate_checksum( buffer, buf_cnt, &checksum );
-
-		retval = target_checksum_memory(target, image.sections[i].base_address, buf_cnt, &mem_checksum);
-		if( retval != ERROR_OK )
+		if (verify)
 		{
-			free(buffer);
-			break;
-		}
+			/* calculate checksum of image */
+			image_calculate_checksum( buffer, buf_cnt, &checksum );
 
-		if( checksum != mem_checksum )
-		{
-			/* failed crc checksum, fall back to a binary compare */
-			u8 *data;
+			retval = target_checksum_memory(target, image.sections[i].base_address, buf_cnt, &mem_checksum);
+			if( retval != ERROR_OK )
+			{
+				free(buffer);
+				break;
+			}
 
-			command_print(cmd_ctx, "checksum mismatch - attempting binary compare");
+			if( checksum != mem_checksum )
+			{
+				/* failed crc checksum, fall back to a binary compare */
+				u8 *data;
 
-			data = (u8*)malloc(buf_cnt);
+				command_print(cmd_ctx, "checksum mismatch - attempting binary compare");
 
-			/* Can we use 32bit word accesses? */
-			int size = 1;
-			int count = buf_cnt;
-			if ((count % 4) == 0)
-			{
-				size *= 4;
-				count /= 4;
-			}
-			retval = target->type->read_memory(target, image.sections[i].base_address, size, count, data);
-			if (retval == ERROR_OK)
-			{
-				int t;
-				for (t = 0; t < buf_cnt; t++)
+				data = (u8*)malloc(buf_cnt);
+
+				/* Can we use 32bit word accesses? */
+				int size = 1;
+				int count = buf_cnt;
+				if ((count % 4) == 0)
 				{
-					if (data[t] != buffer[t])
+					size *= 4;
+					count /= 4;
+				}
+				retval = target->type->read_memory(target, image.sections[i].base_address, size, count, data);
+				if (retval == ERROR_OK)
+				{
+					int t;
+					for (t = 0; t < buf_cnt; t++)
 					{
-						command_print(cmd_ctx, "Verify operation failed address 0x%08x. Was 0x%02x instead of 0x%02x\n", t + image.sections[i].base_address, data[t], buffer[t]);
-						free(data);
-						free(buffer);
-						retval=ERROR_FAIL;
-						goto done;
+						if (data[t] != buffer[t])
+						{
+							command_print(cmd_ctx, "Verify operation failed address 0x%08x. Was 0x%02x instead of 0x%02x\n", t + image.sections[i].base_address, data[t], buffer[t]);
+							free(data);
+							free(buffer);
+							retval=ERROR_FAIL;
+							goto done;
+						}
+						if ((t%16384)==0)
+						{
+							keep_alive();
+						}
 					}
-					if ((t%16384)==0)
-					{
-						keep_alive();
-					}
 				}
+
+				free(data);
 			}
-
-			free(data);
+		} else
+		{
+			command_print(cmd_ctx, "address 0x%08x length 0x%08x", image.sections[i].base_address, buf_cnt);
 		}
 
 		free(buffer);
@@ -2298,6 +2306,16 @@
 	return retval;
 }
 
+int handle_verify_image_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
+{
+	return handle_verify_image_command_internal(cmd_ctx, cmd, args, argc, 1);
+}
+
+int handle_test_image_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
+{
+	return handle_verify_image_command_internal(cmd_ctx, cmd, args, argc, 0);
+}
+
 int handle_bp_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
 {
 	int retval;
@@ -4198,17 +4216,18 @@
 	int i;
 	int ms=timeval_ms();
 	int size=0;
+	int retval=ERROR_OK;
 	for (i=0; i<fastload_num;i++)
 	{
-		int retval;
 		target_t *target = get_current_target(cmd_ctx);
-		if ((retval = target_write_buffer(target, fastload[i].address, fastload[i].length, fastload[i].data)) != ERROR_OK)
+		command_print(cmd_ctx, "Write to 0x%08x, length 0x%08x", fastload[i].address, fastload[i].length);
+		if (retval==ERROR_OK)
 		{
-			return retval;
+			retval = target_write_buffer(target, fastload[i].address, fastload[i].length, fastload[i].data);
 		}
 		size+=fastload[i].length;
 	}
 	int after=timeval_ms();
 	command_print(cmd_ctx, "Loaded image %f kBytes/s", (float)(size/1024.0)/((float)(after-ms)/1000.0));
-	return ERROR_OK;
+	return retval;
 }

[Openocd-svn] r1395 - in trunk/src: flash target/board target/interface target/target target/test

[ntfreak at B. <nt...@ma...>]

Author: ntfreak
Date: 2009-03-02 13:51:42 +0100 (Mon, 02 Mar 2009)
New Revision: 1395

Modified:
   trunk/src/flash/orion_nand.c
   trunk/src/target/board/sheevaplug.cfg
   trunk/src/target/interface/sheevaplug.cfg
   trunk/src/target/target/feroceon.cfg
   trunk/src/target/test/syntax1.cfg
Log:
- add missing svn props from previous commit

Modified: trunk/src/flash/orion_nand.c
===================================================================
--- trunk/src/flash/orion_nand.c	2009-03-01 21:07:44 UTC (rev 1394)
+++ trunk/src/flash/orion_nand.c	2009-03-02 12:51:42 UTC (rev 1395)
@@ -1,256 +1,256 @@
-/***************************************************************************
- *   Copyright (C) 2009 by Marvell Semiconductors, Inc.                    *
- *   Written by Nicolas Pitre <nico at marvell.com>                           *
- *                                                                         *
- *   This program is free software; you can redistribute it and/or modify  *
- *   it under the terms of the GNU General Public License as published by  *
- *   the Free Software Foundation; either version 2 of the License, or     *
- *   (at your option) any later version.                                   *
- *                                                                         *
- *   This program is distributed in the hope that it will be useful,       *
- *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
- *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
- *   GNU General Public License for more details.                          *
- *                                                                         *
- *   You should have received a copy of the GNU General Public License     *
- *   along with this program; if not, write to the                         *
- *   Free Software Foundation, Inc.,                                       *
- *   59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
- ***************************************************************************/
-
-/*
- * NAND controller interface for Marvell Orion/Kirkwood SoCs.
- */
-
-#ifdef HAVE_CONFIG_H
-#include "config.h"
-#endif
-
-#include "replacements.h"
-#include "log.h"
-
-#include <stdlib.h>
-#include <string.h>
-
-#include "nand.h"
-#include "target.h"
-#include "armv4_5.h"
-#include "binarybuffer.h"
-
-typedef struct orion_nand_controller_s
-{
-	struct target_s	*target;
-	working_area_t *copy_area;
-
-	u32		cmd;
-	u32		addr;
-	u32		data;
-} orion_nand_controller_t;
-
-#define CHECK_HALTED \
-	do { \
-		if (target->state != TARGET_HALTED) { \
-			LOG_ERROR("NAND flash access requires halted target"); \
-			return ERROR_NAND_OPERATION_FAILED; \
-		} \
-	} while (0)
-
-int orion_nand_command(struct nand_device_s *device, u8 command)
-{
-	orion_nand_controller_t *hw = device->controller_priv;
-	target_t *target = hw->target;
-
-	CHECK_HALTED;
-	target_write_u8(target, hw->cmd, command);
-	return ERROR_OK;
-}
-
-int orion_nand_address(struct nand_device_s *device, u8 address)
-{
-	orion_nand_controller_t *hw = device->controller_priv;
-	target_t *target = hw->target;
-
-	CHECK_HALTED;
-	target_write_u8(target, hw->addr, address);
-	return ERROR_OK;
-}
-
-int orion_nand_read(struct nand_device_s *device, void *data)
-{
-	orion_nand_controller_t *hw = device->controller_priv;
-	target_t *target = hw->target;
-
-	CHECK_HALTED;
-	target_read_u8(target, hw->data, data);
-	return ERROR_OK;
-}
-
-int orion_nand_write(struct nand_device_s *device, u16 data)
-{
-	orion_nand_controller_t *hw = device->controller_priv;
-	target_t *target = hw->target;
-
-	CHECK_HALTED;
-	target_write_u8(target, hw->data, data);
-	return ERROR_OK;
-}
-
-int orion_nand_slow_block_write(struct nand_device_s *device, u8 *data, int size)
-{
-	while (size--)
-		orion_nand_write(device, *data++);
-	return ERROR_OK;
-}
-
-int orion_nand_fast_block_write(struct nand_device_s *device, u8 *data, int size)
-{
-	orion_nand_controller_t *hw = device->controller_priv;
-	target_t *target = hw->target;
-	armv4_5_algorithm_t algo;
-	reg_param_t reg_params[3];
-	u32 target_buf;
-	int retval;
-
-	static const u32 code[] = {
-		0xe4d13001,	/* ldrb	r3, [r1], #1	*/
-		0xe5c03000,	/* strb	r3, [r0]	*/
-		0xe2522001,	/* subs	r2, r2, #1	*/
-		0x1afffffb,	/* bne	0		*/
-		0xeafffffe,	/* b	.		*/
-	};
-	int code_size = sizeof(code);
-
-	if (!hw->copy_area) {
-		u8 code_buf[code_size];
-		int i;
-
-		/* make sure we have a working area */
-		if (target_alloc_working_area(target,
-					      code_size + device->page_size,
-					      &hw->copy_area) != ERROR_OK)
-		{
-			return orion_nand_slow_block_write(device, data, size);
-		}
-
-		/* copy target instructions to target endianness */
-		for (i = 0; i < code_size/4; i++)
-			target_buffer_set_u32(target, code_buf + i*4, code[i]);
-
-		/* write code to working area */
-                retval = target->type->write_memory(target,
-					hw->copy_area->address,
-					4, code_size/4, code_buf);
-		if (retval != ERROR_OK)
-			return retval;
-	}
-
-	/* copy data to target's memory */
-	target_buf = hw->copy_area->address + code_size;
-	retval = target->type->bulk_write_memory(target, target_buf,
-						 size/4, data);
-	if (retval == ERROR_OK && size & 3) {
-		retval = target->type->write_memory(target,
-					target_buf + (size & ~3),
-					1, size & 3, data + (size & ~3));
-	}
-	if (retval != ERROR_OK)
-		return retval;
-
-	algo.common_magic = ARMV4_5_COMMON_MAGIC;
-	algo.core_mode = ARMV4_5_MODE_SVC;
-	algo.core_state = ARMV4_5_STATE_ARM;
-
-	init_reg_param(&reg_params[0], "r0", 32, PARAM_IN);
-	init_reg_param(&reg_params[1], "r1", 32, PARAM_IN);
-	init_reg_param(&reg_params[2], "r2", 32, PARAM_IN);
-
-	buf_set_u32(reg_params[0].value, 0, 32, hw->data);
-	buf_set_u32(reg_params[1].value, 0, 32, target_buf);
-	buf_set_u32(reg_params[2].value, 0, 32, size);
-
-	retval = target->type->run_algorithm(target, 0, NULL, 3, reg_params,
-					hw->copy_area->address,
-					hw->copy_area->address + code_size - 4,
-					1000, &algo);
-	if (retval != ERROR_OK)
-		LOG_ERROR("error executing hosted NAND write");
-
-	destroy_reg_param(&reg_params[0]);
-	destroy_reg_param(&reg_params[1]);
-	destroy_reg_param(&reg_params[2]);
-	return retval;
-}
-
-int orion_nand_reset(struct nand_device_s *device)
-{
-	return orion_nand_command(device, NAND_CMD_RESET);
-}
-
-int orion_nand_controller_ready(struct nand_device_s *device, int timeout)
-{
-	return 1;
-}
-
-int orion_nand_register_commands(struct command_context_s *cmd_ctx)
-{
-	return ERROR_OK;
-}
-
-int orion_nand_device_command(struct command_context_s *cmd_ctx, char *cmd,
-			      char **args, int argc,
-			      struct nand_device_s *device)
-{
-	orion_nand_controller_t *hw;
-	u32 base;
-	u8 ale, cle;
-
-	if (argc != 3) {
-		LOG_ERROR("arguments must be: <target_number> <NAND_address>\n");
-		return ERROR_NAND_DEVICE_INVALID;
-	}
-
-	hw = calloc(1, sizeof(*hw));
-	if (!hw) {
-		LOG_ERROR("no memory for nand controller\n");
-		return ERROR_NAND_DEVICE_INVALID;
-	}
-
-	device->controller_priv = hw;
-	hw->target = get_target_by_num(strtoul(args[1], NULL, 0));
-	if (!hw->target) {
-		LOG_ERROR("no target '%s' configured", args[1]);
-		free(hw);
-		return ERROR_NAND_DEVICE_INVALID;
-	}
-
-	base = strtoul(args[2], NULL, 0);
-	cle = 0;
-	ale = 1;
-
-	hw->data = base;
-	hw->cmd = base + (1 << cle);
-	hw->addr = base + (1 << ale);
-
-	return ERROR_OK;
-}
-
-int orion_nand_init(struct nand_device_s *device)
-{
-	return ERROR_OK;
-}
-
-nand_flash_controller_t orion_nand_controller =
-{
-	.name			= "orion",
-	.command		= orion_nand_command,
-	.address		= orion_nand_address,
-	.read_data		= orion_nand_read,
-	.write_data		= orion_nand_write,
-	.write_block_data	= orion_nand_fast_block_write,
-	.reset			= orion_nand_reset,
-	.controller_ready	= orion_nand_controller_ready,
-	.nand_device_command	= orion_nand_device_command,
-	.register_commands	= orion_nand_register_commands,
-	.init			= orion_nand_init,
-};
-
+/***************************************************************************
+ *   Copyright (C) 2009 by Marvell Semiconductors, Inc.                    *
+ *   Written by Nicolas Pitre <nico at marvell.com>                           *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ *                                                                         *
+ *   This program is distributed in the hope that it will be useful,       *
+ *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ *   GNU General Public License for more details.                          *
+ *                                                                         *
+ *   You should have received a copy of the GNU General Public License     *
+ *   along with this program; if not, write to the                         *
+ *   Free Software Foundation, Inc.,                                       *
+ *   59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ ***************************************************************************/
+
+/*
+ * NAND controller interface for Marvell Orion/Kirkwood SoCs.
+ */
+
+#ifdef HAVE_CONFIG_H
+#include "config.h"
+#endif
+
+#include "replacements.h"
+#include "log.h"
+
+#include <stdlib.h>
+#include <string.h>
+
+#include "nand.h"
+#include "target.h"
+#include "armv4_5.h"
+#include "binarybuffer.h"
+
+typedef struct orion_nand_controller_s
+{
+	struct target_s	*target;
+	working_area_t *copy_area;
+
+	u32		cmd;
+	u32		addr;
+	u32		data;
+} orion_nand_controller_t;
+
+#define CHECK_HALTED \
+	do { \
+		if (target->state != TARGET_HALTED) { \
+			LOG_ERROR("NAND flash access requires halted target"); \
+			return ERROR_NAND_OPERATION_FAILED; \
+		} \
+	} while (0)
+
+int orion_nand_command(struct nand_device_s *device, u8 command)
+{
+	orion_nand_controller_t *hw = device->controller_priv;
+	target_t *target = hw->target;
+
+	CHECK_HALTED;
+	target_write_u8(target, hw->cmd, command);
+	return ERROR_OK;
+}
+
+int orion_nand_address(struct nand_device_s *device, u8 address)
+{
+	orion_nand_controller_t *hw = device->controller_priv;
+	target_t *target = hw->target;
+
+	CHECK_HALTED;
+	target_write_u8(target, hw->addr, address);
+	return ERROR_OK;
+}
+
+int orion_nand_read(struct nand_device_s *device, void *data)
+{
+	orion_nand_controller_t *hw = device->controller_priv;
+	target_t *target = hw->target;
+
+	CHECK_HALTED;
+	target_read_u8(target, hw->data, data);
+	return ERROR_OK;
+}
+
+int orion_nand_write(struct nand_device_s *device, u16 data)
+{
+	orion_nand_controller_t *hw = device->controller_priv;
+	target_t *target = hw->target;
+
+	CHECK_HALTED;
+	target_write_u8(target, hw->data, data);
+	return ERROR_OK;
+}
+
+int orion_nand_slow_block_write(struct nand_device_s *device, u8 *data, int size)
+{
+	while (size--)
+		orion_nand_write(device, *data++);
+	return ERROR_OK;
+}
+
+int orion_nand_fast_block_write(struct nand_device_s *device, u8 *data, int size)
+{
+	orion_nand_controller_t *hw = device->controller_priv;
+	target_t *target = hw->target;
+	armv4_5_algorithm_t algo;
+	reg_param_t reg_params[3];
+	u32 target_buf;
+	int retval;
+
+	static const u32 code[] = {
+		0xe4d13001,	/* ldrb	r3, [r1], #1	*/
+		0xe5c03000,	/* strb	r3, [r0]	*/
+		0xe2522001,	/* subs	r2, r2, #1	*/
+		0x1afffffb,	/* bne	0		*/
+		0xeafffffe,	/* b	.		*/
+	};
+	int code_size = sizeof(code);
+
+	if (!hw->copy_area) {
+		u8 code_buf[code_size];
+		int i;
+
+		/* make sure we have a working area */
+		if (target_alloc_working_area(target,
+					      code_size + device->page_size,
+					      &hw->copy_area) != ERROR_OK)
+		{
+			return orion_nand_slow_block_write(device, data, size);
+		}
+
+		/* copy target instructions to target endianness */
+		for (i = 0; i < code_size/4; i++)
+			target_buffer_set_u32(target, code_buf + i*4, code[i]);
+
+		/* write code to working area */
+                retval = target->type->write_memory(target,
+					hw->copy_area->address,
+					4, code_size/4, code_buf);
+		if (retval != ERROR_OK)
+			return retval;
+	}
+
+	/* copy data to target's memory */
+	target_buf = hw->copy_area->address + code_size;
+	retval = target->type->bulk_write_memory(target, target_buf,
+						 size/4, data);
+	if (retval == ERROR_OK && size & 3) {
+		retval = target->type->write_memory(target,
+					target_buf + (size & ~3),
+					1, size & 3, data + (size & ~3));
+	}
+	if (retval != ERROR_OK)
+		return retval;
+
+	algo.common_magic = ARMV4_5_COMMON_MAGIC;
+	algo.core_mode = ARMV4_5_MODE_SVC;
+	algo.core_state = ARMV4_5_STATE_ARM;
+
+	init_reg_param(&reg_params[0], "r0", 32, PARAM_IN);
+	init_reg_param(&reg_params[1], "r1", 32, PARAM_IN);
+	init_reg_param(&reg_params[2], "r2", 32, PARAM_IN);
+
+	buf_set_u32(reg_params[0].value, 0, 32, hw->data);
+	buf_set_u32(reg_params[1].value, 0, 32, target_buf);
+	buf_set_u32(reg_params[2].value, 0, 32, size);
+
+	retval = target->type->run_algorithm(target, 0, NULL, 3, reg_params,
+					hw->copy_area->address,
+					hw->copy_area->address + code_size - 4,
+					1000, &algo);
+	if (retval != ERROR_OK)
+		LOG_ERROR("error executing hosted NAND write");
+
+	destroy_reg_param(&reg_params[0]);
+	destroy_reg_param(&reg_params[1]);
+	destroy_reg_param(&reg_params[2]);
+	return retval;
+}
+
+int orion_nand_reset(struct nand_device_s *device)
+{
+	return orion_nand_command(device, NAND_CMD_RESET);
+}
+
+int orion_nand_controller_ready(struct nand_device_s *device, int timeout)
+{
+	return 1;
+}
+
+int orion_nand_register_commands(struct command_context_s *cmd_ctx)
+{
+	return ERROR_OK;
+}
+
+int orion_nand_device_command(struct command_context_s *cmd_ctx, char *cmd,
+			      char **args, int argc,
+			      struct nand_device_s *device)
+{
+	orion_nand_controller_t *hw;
+	u32 base;
+	u8 ale, cle;
+
+	if (argc != 3) {
+		LOG_ERROR("arguments must be: <target_number> <NAND_address>\n");
+		return ERROR_NAND_DEVICE_INVALID;
+	}
+
+	hw = calloc(1, sizeof(*hw));
+	if (!hw) {
+		LOG_ERROR("no memory for nand controller\n");
+		return ERROR_NAND_DEVICE_INVALID;
+	}
+
+	device->controller_priv = hw;
+	hw->target = get_target_by_num(strtoul(args[1], NULL, 0));
+	if (!hw->target) {
+		LOG_ERROR("no target '%s' configured", args[1]);
+		free(hw);
+		return ERROR_NAND_DEVICE_INVALID;
+	}
+
+	base = strtoul(args[2], NULL, 0);
+	cle = 0;
+	ale = 1;
+
+	hw->data = base;
+	hw->cmd = base + (1 << cle);
+	hw->addr = base + (1 << ale);
+
+	return ERROR_OK;
+}
+
+int orion_nand_init(struct nand_device_s *device)
+{
+	return ERROR_OK;
+}
+
+nand_flash_controller_t orion_nand_controller =
+{
+	.name			= "orion",
+	.command		= orion_nand_command,
+	.address		= orion_nand_address,
+	.read_data		= orion_nand_read,
+	.write_data		= orion_nand_write,
+	.write_block_data	= orion_nand_fast_block_write,
+	.reset			= orion_nand_reset,
+	.controller_ready	= orion_nand_controller_ready,
+	.nand_device_command	= orion_nand_device_command,
+	.register_commands	= orion_nand_register_commands,
+	.init			= orion_nand_init,
+};
+


Property changes on: trunk/src/flash/orion_nand.c
___________________________________________________________________
Name: svn:eol-style
   + native

Modified: trunk/src/target/board/sheevaplug.cfg
===================================================================
--- trunk/src/target/board/sheevaplug.cfg	2009-03-01 21:07:44 UTC (rev 1394)
+++ trunk/src/target/board/sheevaplug.cfg	2009-03-02 12:51:42 UTC (rev 1395)
@@ -1,111 +1,111 @@
-# Marvell SheevaPlug 
-
-source [find interface/sheevaplug.cfg]
-source [find target/feroceon.cfg]
-
-$_TARGETNAME configure -event reset-init { sheevaplug_init }
-
-$_TARGETNAME configure \
-	-work-area-phys 0x10000000 \
-	-work-area-size 65536 \
-	-work-area-backup 0
-
-arm7_9 dcc_downloads enable
-
-# this assumes the hardware default peripherals location before u-Boot moves it
-nand device orion 0 0xd8000000
-
-proc sheevaplug_init { } {
-
-	arm926ejs cp15 0 0 1 0 0x00052078
-
-	mww 0xD0001400 0x43000C30 #  DDR SDRAM Configuration Register
-	mww 0xD0001404 0x39543000 #  Dunit Control Low Register
-	mww 0xD0001408 0x22125451 #  DDR SDRAM Timing (Low) Register
-	mww 0xD000140C 0x00000833 #  DDR SDRAM Timing (High) Register
-	mww 0xD0001410 0x000000CC #  DDR SDRAM Address Control Register
-	mww 0xD0001414 0x00000000 #  DDR SDRAM Open Pages Control Register
-	mww 0xD0001418 0x00000000 #  DDR SDRAM Operation Register
-	mww 0xD000141C 0x00000C52 #  DDR SDRAM Mode Register
-	mww 0xD0001420 0x00000042 #  DDR SDRAM Extended Mode Register
-	mww 0xD0001424 0x0000F17F #  Dunit Control High Register
-	mww 0xD0001428 0x00085520 #  Dunit Control High Register
-	mww 0xD000147c 0x00008552 #  Dunit Control High Register
-	mww 0xD0001504 0x0FFFFFF1 #  CS0n Size Register
-	mww 0xD0001508 0x10000000 #  CS1n Base Register
-	mww 0xD000150C 0x0FFFFFF5 #  CS1n Size Register
-	mww 0xD0001514 0x00000000 #  CS2n Size Register
-	mww 0xD000151C 0x00000000 #  CS3n Size Register
-	mww 0xD0001494 0x003C0000 #  DDR2 SDRAM ODT Control (Low) Register
-	mww 0xD0001498 0x00000000 #  DDR2 SDRAM ODT Control (High) REgister
-	mww 0xD000149C 0x0000F80F #  DDR2 Dunit ODT Control Register
-	mww 0xD0001480 0x00000001 #  DDR SDRAM Initialization Control Register
-	mww 0xD0020204 0x00000000 #  Main IRQ Interrupt Mask Register
-	mww 0xD0020204 0x00000000 #              "
-	mww 0xD0020204 0x00000000 #              "
-	mww 0xD0020204 0x00000000 #              "
-	mww 0xD0020204 0x00000000 #              "
-	mww 0xD0020204 0x00000000 #              "
-	mww 0xD0020204 0x00000000 #              "
-	mww 0xD0020204 0x00000000 #              "
-	mww 0xD0020204 0x00000000 #              "
-	mww 0xD0020204 0x00000000 #              "
-	mww 0xD0020204 0x00000000 #              "
-	mww 0xD0020204 0x00000000 #              "
-	mww 0xD0020204 0x00000000 #              "
-	mww 0xD0020204 0x00000000 #              "
-	mww 0xD0020204 0x00000000 #              "
-	mww 0xD0020204 0x00000000 #              "
-	mww 0xD0020204 0x00000000 #              "
-	mww 0xD0020204 0x00000000 #              "
-	mww 0xD0020204 0x00000000 #              "
-	mww 0xD0020204 0x00000000 #              "
-	mww 0xD0020204 0x00000000 #              "
-	mww 0xD0020204 0x00000000 #              "
-	mww 0xD0020204 0x00000000 #              "
-	mww 0xD0020204 0x00000000 #              "
-	mww 0xD0020204 0x00000000 #              "
-	mww 0xD0020204 0x00000000 #              "
-	mww 0xD0020204 0x00000000 #              "
-	mww 0xD0020204 0x00000000 #              "
-	mww 0xD0020204 0x00000000 #              "
-	mww 0xD0020204 0x00000000 #              "
-	mww 0xD0020204 0x00000000 #              "
-	mww 0xD0020204 0x00000000 #              "
-	mww 0xD0020204 0x00000000 #              "
-	mww 0xD0020204 0x00000000 #              "
-	mww 0xD0020204 0x00000000 #              "
-	mww 0xD0020204 0x00000000 #              "
-	mww 0xD0020204 0x00000000 #              "
-
-	mww 0xD0010000 0x01111111 #  MPP  0 to 7
-	mww 0xD0010004 0x11113322 #  MPP  8 to 15
-	mww 0xD0010008 0x00001111 #  MPP 16 to 23
-
-	mww 0xD0010418 0x003E07CF #  NAND Read Parameters REgister
-	mww 0xD001041C 0x000F0F0F #  NAND Write Parameters Register
-	mww 0xD0010470 0x01C7D943 #  NAND Flash Control Register
-
-}
-
-proc sheevaplug_reflash_uboot { } {
-
-	# reflash the u-Boot binary
-	#reset init
-	nand probe 0
-	nand erase 0 0 4
-	nand write 0 uboot.bin 0
-	reset run
-
-}
-
-proc sheevaplug_load_uboot { } {
-
-	# load u-Boot into RAM
-	#reset init
-	load_image /tmp/uboot.elf
-	verify_image uboot.elf
-	resume 0x00600000
-
-}
-
+# Marvell SheevaPlug 
+
+source [find interface/sheevaplug.cfg]
+source [find target/feroceon.cfg]
+
+$_TARGETNAME configure -event reset-init { sheevaplug_init }
+
+$_TARGETNAME configure \
+	-work-area-phys 0x10000000 \
+	-work-area-size 65536 \
+	-work-area-backup 0
+
+arm7_9 dcc_downloads enable
+
+# this assumes the hardware default peripherals location before u-Boot moves it
+nand device orion 0 0xd8000000
+
+proc sheevaplug_init { } {
+
+	arm926ejs cp15 0 0 1 0 0x00052078
+
+	mww 0xD0001400 0x43000C30 #  DDR SDRAM Configuration Register
+	mww 0xD0001404 0x39543000 #  Dunit Control Low Register
+	mww 0xD0001408 0x22125451 #  DDR SDRAM Timing (Low) Register
+	mww 0xD000140C 0x00000833 #  DDR SDRAM Timing (High) Register
+	mww 0xD0001410 0x000000CC #  DDR SDRAM Address Control Register
+	mww 0xD0001414 0x00000000 #  DDR SDRAM Open Pages Control Register
+	mww 0xD0001418 0x00000000 #  DDR SDRAM Operation Register
+	mww 0xD000141C 0x00000C52 #  DDR SDRAM Mode Register
+	mww 0xD0001420 0x00000042 #  DDR SDRAM Extended Mode Register
+	mww 0xD0001424 0x0000F17F #  Dunit Control High Register
+	mww 0xD0001428 0x00085520 #  Dunit Control High Register
+	mww 0xD000147c 0x00008552 #  Dunit Control High Register
+	mww 0xD0001504 0x0FFFFFF1 #  CS0n Size Register
+	mww 0xD0001508 0x10000000 #  CS1n Base Register
+	mww 0xD000150C 0x0FFFFFF5 #  CS1n Size Register
+	mww 0xD0001514 0x00000000 #  CS2n Size Register
+	mww 0xD000151C 0x00000000 #  CS3n Size Register
+	mww 0xD0001494 0x003C0000 #  DDR2 SDRAM ODT Control (Low) Register
+	mww 0xD0001498 0x00000000 #  DDR2 SDRAM ODT Control (High) REgister
+	mww 0xD000149C 0x0000F80F #  DDR2 Dunit ODT Control Register
+	mww 0xD0001480 0x00000001 #  DDR SDRAM Initialization Control Register
+	mww 0xD0020204 0x00000000 #  Main IRQ Interrupt Mask Register
+	mww 0xD0020204 0x00000000 #              "
+	mww 0xD0020204 0x00000000 #              "
+	mww 0xD0020204 0x00000000 #              "
+	mww 0xD0020204 0x00000000 #              "
+	mww 0xD0020204 0x00000000 #              "
+	mww 0xD0020204 0x00000000 #              "
+	mww 0xD0020204 0x00000000 #              "
+	mww 0xD0020204 0x00000000 #              "
+	mww 0xD0020204 0x00000000 #              "
+	mww 0xD0020204 0x00000000 #              "
+	mww 0xD0020204 0x00000000 #              "
+	mww 0xD0020204 0x00000000 #              "
+	mww 0xD0020204 0x00000000 #              "
+	mww 0xD0020204 0x00000000 #              "
+	mww 0xD0020204 0x00000000 #              "
+	mww 0xD0020204 0x00000000 #              "
+	mww 0xD0020204 0x00000000 #              "
+	mww 0xD0020204 0x00000000 #              "
+	mww 0xD0020204 0x00000000 #              "
+	mww 0xD0020204 0x00000000 #              "
+	mww 0xD0020204 0x00000000 #              "
+	mww 0xD0020204 0x00000000 #              "
+	mww 0xD0020204 0x00000000 #              "
+	mww 0xD0020204 0x00000000 #              "
+	mww 0xD0020204 0x00000000 #              "
+	mww 0xD0020204 0x00000000 #              "
+	mww 0xD0020204 0x00000000 #              "
+	mww 0xD0020204 0x00000000 #              "
+	mww 0xD0020204 0x00000000 #              "
+	mww 0xD0020204 0x00000000 #              "
+	mww 0xD0020204 0x00000000 #              "
+	mww 0xD0020204 0x00000000 #              "
+	mww 0xD0020204 0x00000000 #              "
+	mww 0xD0020204 0x00000000 #              "
+	mww 0xD0020204 0x00000000 #              "
+	mww 0xD0020204 0x00000000 #              "
+
+	mww 0xD0010000 0x01111111 #  MPP  0 to 7
+	mww 0xD0010004 0x11113322 #  MPP  8 to 15
+	mww 0xD0010008 0x00001111 #  MPP 16 to 23
+
+	mww 0xD0010418 0x003E07CF #  NAND Read Parameters REgister
+	mww 0xD001041C 0x000F0F0F #  NAND Write Parameters Register
+	mww 0xD0010470 0x01C7D943 #  NAND Flash Control Register
+
+}
+
+proc sheevaplug_reflash_uboot { } {
+
+	# reflash the u-Boot binary
+	#reset init
+	nand probe 0
+	nand erase 0 0 4
+	nand write 0 uboot.bin 0
+	reset run
+
+}
+
+proc sheevaplug_load_uboot { } {
+
+	# load u-Boot into RAM
+	#reset init
+	load_image /tmp/uboot.elf
+	verify_image uboot.elf
+	resume 0x00600000
+
+}
+


Property changes on: trunk/src/target/board/sheevaplug.cfg
___________________________________________________________________
Name: svn:eol-style
   + native

Modified: trunk/src/target/interface/sheevaplug.cfg
===================================================================
--- trunk/src/target/interface/sheevaplug.cfg	2009-03-01 21:07:44 UTC (rev 1394)
+++ trunk/src/target/interface/sheevaplug.cfg	2009-03-02 12:51:42 UTC (rev 1395)
@@ -1,4 +1,4 @@
-interface ft2232
-ft2232_layout sheevaplug
-ft2232_vid_pid 0x0403 0x6010
-jtag_khz 3000
+interface ft2232
+ft2232_layout sheevaplug
+ft2232_vid_pid 0x0403 0x6010
+jtag_khz 3000


Property changes on: trunk/src/target/interface/sheevaplug.cfg
___________________________________________________________________
Name: svn:eol-style
   + native

Modified: trunk/src/target/target/feroceon.cfg
===================================================================
--- trunk/src/target/target/feroceon.cfg	2009-03-01 21:07:44 UTC (rev 1394)
+++ trunk/src/target/target/feroceon.cfg	2009-03-02 12:51:42 UTC (rev 1395)
@@ -1,30 +1,30 @@
-######################################
-# Target:    Marvell Feroceon CPU core
-######################################
-
-if { [info exists CHIPNAME] } {	
-   set  _CHIPNAME $CHIPNAME    
-} else {	 
-   set  _CHIPNAME feroceon
-}
-
-if { [info exists ENDIAN] } {	
-   set  _ENDIAN $ENDIAN    
-} else {	 
-   set  _ENDIAN little
-}
-
-if { [info exists CPUTAPID ] } {
-   set _CPUTAPID $CPUTAPID
-} else {
-   set _CPUTAPID 0x20a023d3
-}
-
-jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
-set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
-target create $_TARGETNAME feroceon -endian $_ENDIAN -chain-position $_TARGETNAME
-
-reset_config trst_and_srst
-jtag_nsrst_delay 200
-jtag_ntrst_delay 200
-
+######################################
+# Target:    Marvell Feroceon CPU core
+######################################
+
+if { [info exists CHIPNAME] } {	
+   set  _CHIPNAME $CHIPNAME    
+} else {	 
+   set  _CHIPNAME feroceon
+}
+
+if { [info exists ENDIAN] } {	
+   set  _ENDIAN $ENDIAN    
+} else {	 
+   set  _ENDIAN little
+}
+
+if { [info exists CPUTAPID ] } {
+   set _CPUTAPID $CPUTAPID
+} else {
+   set _CPUTAPID 0x20a023d3
+}
+
+jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
+set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
+target create $_TARGETNAME feroceon -endian $_ENDIAN -chain-position $_TARGETNAME
+
+reset_config trst_and_srst
+jtag_nsrst_delay 200
+jtag_ntrst_delay 200
+


Property changes on: trunk/src/target/target/feroceon.cfg
___________________________________________________________________
Name: svn:eol-style
   + native

Modified: trunk/src/target/test/syntax1.cfg
===================================================================
--- trunk/src/target/test/syntax1.cfg	2009-03-01 21:07:44 UTC (rev 1394)
+++ trunk/src/target/test/syntax1.cfg	2009-03-02 12:51:42 UTC (rev 1395)
@@ -1,29 +1,29 @@
-jtag_nsrst_delay 200
-jtag_ntrst_delay 200
-
-#use combined on interfaces or targets that can't set TRST/SRST separately
-reset_config trst_and_srst srst_pulls_trst
-
-#LPCs need reset pulled while RTCK is low. 0 to activate JTAG, power-on reset is not enough
-jtag_reset 1 1
-jtag_reset 0 0
-
-#jtag scan chain
-#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
-jtag newtap lpc2148 one -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id 0x4f1f0f0f
-
-#target configuration
-#daemon_startup reset
-
-set _TARGETNAME [format "%s.cpu" lpc2148]
-target create lpc2148.cpu arm7tdmi -endian little -work-area-size 0x4000 -work-area-phys 0x40000000 -work-area-virt 0 -work-area-backup 0
-
-$_TARGETNAME configure -event reset-init { 
-soft_reset_halt 
-mvb 0xE01FC040 0x01 
-}
-
-
-
-flash bank lpc2000 0x0 0x7d000 0 0 0 lpc2000_v2 14765
-
+jtag_nsrst_delay 200
+jtag_ntrst_delay 200
+
+#use combined on interfaces or targets that can't set TRST/SRST separately
+reset_config trst_and_srst srst_pulls_trst
+
+#LPCs need reset pulled while RTCK is low. 0 to activate JTAG, power-on reset is not enough
+jtag_reset 1 1
+jtag_reset 0 0
+
+#jtag scan chain
+#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
+jtag newtap lpc2148 one -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id 0x4f1f0f0f
+
+#target configuration
+#daemon_startup reset
+
+set _TARGETNAME [format "%s.cpu" lpc2148]
+target create lpc2148.cpu arm7tdmi -endian little -work-area-size 0x4000 -work-area-phys 0x40000000 -work-area-virt 0 -work-area-backup 0
+
+$_TARGETNAME configure -event reset-init { 
+soft_reset_halt 
+mvb 0xE01FC040 0x01 
+}
+
+
+
+flash bank lpc2000 0x0 0x7d000 0 0 0 lpc2000_v2 14765
+


Property changes on: trunk/src/target/test/syntax1.cfg
___________________________________________________________________
Name: svn:eol-style
   + native

[Openocd-svn] r1394 - trunk/src/jtag

[<oh...@ma...>]

Author: oharboe
Date: 2009-03-01 22:07:44 +0100 (Sun, 01 Mar 2009)
New Revision: 1394

Modified:
   trunk/src/jtag/ft2232.c
Log:
Daniel Gimpelevich <da...@gi...> Cosmetic OpenOCD patch for Flyswatter

Modified: trunk/src/jtag/ft2232.c
===================================================================
--- trunk/src/jtag/ft2232.c	2009-03-01 21:06:06 UTC (rev 1393)
+++ trunk/src/jtag/ft2232.c	2009-03-01 21:07:44 UTC (rev 1394)
@@ -139,6 +139,7 @@
 
 /* blink procedures for layouts that support a blinking led */
 void olimex_jtag_blink(void);
+void flyswatter_jtag_blink(void);
 void turtle_jtag_blink(void);
 
 ft2232_layout_t            ft2232_layouts[] =
@@ -150,7 +151,7 @@
 	{ "signalyzer",           usbjtag_init,              usbjtag_reset,      NULL                    },
 	{ "evb_lm3s811",          usbjtag_init,              usbjtag_reset,      NULL                    },
 	{ "olimex-jtag",          olimex_jtag_init,          olimex_jtag_reset,  olimex_jtag_blink       },
-	{ "flyswatter",           flyswatter_init,           flyswatter_reset,   NULL                    },
+	{ "flyswatter",           flyswatter_init,           flyswatter_reset,   flyswatter_jtag_blink   },
 	{ "turtelizer2",          turtle_init,               turtle_reset,       turtle_jtag_blink       },
 	{ "comstick",             comstick_init,             comstick_reset,     NULL                    },
 	{ "stm32stick",           stm32stick_init,           stm32stick_reset,   NULL                    },
@@ -2136,7 +2137,7 @@
 	high_output    = 0x00;
 	high_direction = 0x0c;
 
-	/* turn red LED1 on, LED2 off */
+	/* turn red LED3 on, LED2 off */
 	high_output |= 0x08;
 
 	/* initialize high port */
@@ -2357,6 +2358,19 @@
 }
 
 
+void flyswatter_jtag_blink(void)
+{
+	/*
+	 * Flyswatter has two LEDs connected to ACBUS2 and ACBUS3
+	 */
+	high_output ^= 0x0c;
+
+	BUFFER_ADD = 0x82;
+	BUFFER_ADD = high_output;
+	BUFFER_ADD = high_direction;
+}
+
+
 void turtle_jtag_blink(void)
 {
 	/*