openocd-commit — OpenOCD commit maling list - read only

[Openocd-svn] r1893 - trunk/src/jtag

[<zw...@ma...>]

Author: zwelch
Date: 2009-05-23 22:52:18 +0200 (Sat, 23 May 2009)
New Revision: 1893

Modified:
   trunk/src/jtag/ft2232.c
Log:
Submitted by Magnus Lundin <lu...@ml...>:
- Remove FTDI driver tap_set_state call; performed by jtag_add_reset.


Modified: trunk/src/jtag/ft2232.c
===================================================================
--- trunk/src/jtag/ft2232.c	2009-05-23 20:50:06 UTC (rev 1892)
+++ trunk/src/jtag/ft2232.c	2009-05-23 20:52:18 UTC (rev 1893)
@@ -1629,10 +1629,6 @@
 		first_unsent = cmd;
 	}
 
-	if ( (cmd->cmd.reset->trst == 1) || ( cmd->cmd.reset->srst && (jtag_reset_config & RESET_SRST_PULLS_TRST) ) )
-	{
-		tap_set_state(TAP_RESET);
-	}
 	layout->reset(cmd->cmd.reset->trst, cmd->cmd.reset->srst);
 	require_send = 1;
 

[Openocd-svn] r1892 - trunk/src/jtag

[<zw...@ma...>]

Author: zwelch
Date: 2009-05-23 22:50:06 +0200 (Sat, 23 May 2009)
New Revision: 1892

Modified:
   trunk/src/jtag/jtag.c
Log:
Submitted by Magnus Lundin <lu...@ml...>:
- Add jtag_execute_queue in jtag_add_reset after interface_jtag_add_reset.
- Use tap_set_state to demark TAP_RESET, instead of cmd_queue_cur_state
  - cmd_queue_cur_state needs to be retired.


Modified: trunk/src/jtag/jtag.c
===================================================================
--- trunk/src/jtag/jtag.c	2009-05-23 20:29:53 UTC (rev 1891)
+++ trunk/src/jtag/jtag.c	2009-05-23 20:50:06 UTC (rev 1892)
@@ -1253,6 +1253,7 @@
 		jtag_error=retval;
 		return;
 	}
+	jtag_execute_queue();
 
 	if (jtag_srst)
 	{
@@ -1280,7 +1281,7 @@
 		 * and inform possible listeners about this
 		 */
 		LOG_DEBUG("TRST line asserted");
-		cmd_queue_cur_state = TAP_RESET;
+		tap_set_state(TAP_RESET);
 		jtag_call_event_callbacks(JTAG_TRST_ASSERTED);
 	}
 	else

[Openocd-svn] r1891 - trunk

[<zw...@ma...>]

Author: zwelch
Date: 2009-05-23 22:29:53 +0200 (Sat, 23 May 2009)
New Revision: 1891

Modified:
   trunk/Makefile.am
Log:
Fix make docs rule to work with out-of-tree builds.

Modified: trunk/Makefile.am
===================================================================
--- trunk/Makefile.am	2009-05-23 18:26:06 UTC (rev 1890)
+++ trunk/Makefile.am	2009-05-23 20:29:53 UTC (rev 1891)
@@ -16,7 +16,7 @@
 docs: pdf html doxygen
 
 doxygen::
-	doxygen Doxyfile 2>&1 | perl tools/logger.pl > doxygen.log
+	(cd $(srcdir) && doxygen Doxyfile 2>&1 | perl tools/logger.pl ) > doxygen.log
 
 doxygen-clean:
 	rm -f -r doxygen doxygen.log

[Openocd-svn] r1890 - trunk/src/target/target

[<mi...@ma...>]

Author: mifi
Date: 2009-05-23 20:26:06 +0200 (Sat, 23 May 2009)
New Revision: 1890

Modified:
   trunk/src/target/target/sam7se512.cfg
   trunk/src/target/target/sam7x256.cfg
Log:
Change the setting for the sam7se512 and sam7x256 
flash driver because of the new at91sam7 version.

Modified: trunk/src/target/target/sam7se512.cfg
===================================================================
--- trunk/src/target/target/sam7se512.cfg	2009-05-23 03:42:13 UTC (rev 1889)
+++ trunk/src/target/target/sam7se512.cfg	2009-05-23 18:26:06 UTC (rev 1890)
@@ -34,5 +34,6 @@
 
 $_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x00200000 -work-area-size 0x4000 -work-area-backup 0
 
-flash bank at91sam7 0 0 0 0 0
+#flash bank <driver> <base_addr> <size> <chip_width> <bus_width> <target_number> [<target_name> <banks> <sectors_per_bank> <pages_per_sector> <page_size> <num_nvmbits> <ext_freq_khz>]
+flash bank at91sam7 0 0 0 0 0 0 0 0 0 0 0 0 18432
 

Modified: trunk/src/target/target/sam7x256.cfg
===================================================================
--- trunk/src/target/target/sam7x256.cfg	2009-05-23 03:42:13 UTC (rev 1889)
+++ trunk/src/target/target/sam7x256.cfg	2009-05-23 18:26:06 UTC (rev 1890)
@@ -45,8 +45,8 @@
 
 $_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x00200000 -work-area-size 0x4000 -work-area-backup 0
 
-#flash bank <driver> <base> <size> <chip_width> <bus_width>
-flash bank at91sam7 0 0 0 0 0
+#flash bank <driver> <base_addr> <size> <chip_width> <bus_width> <target_number> [<target_name> <banks> <sectors_per_bank> <pages_per_sector> <page_size> <num_nvmbits> <ext_freq_khz>]
+flash bank at91sam7 0 0 0 0 0 0 0 0 0 0 0 0 18432
 
 # For more information about the configuration files, take a look at:
 # openocd.texi

[Openocd-svn] r1889 - trunk/src/jtag

[<zw...@ma...>]

Author: zwelch
Date: 2009-05-23 05:42:13 +0200 (Sat, 23 May 2009)
New Revision: 1889

Modified:
   trunk/src/jtag/jlink.c
Log:
Submitted by Magnus Lundin <lu...@ml...>:

Updates to the J-Link interface driver to support more device versions:
- Add capability detection:
  - if capable, detect protocol version; otherwise, assume v2 protocol.
  - if capable, detect buffer size; otherwise, assume minimal.
- Disable command result queries for devices using v2 protocol.
- Defined and use JTAG2 command with v2 protocol; JTAG3 is v3 protocol.
- Add TCL command to allow explicit setting of J-Link protocol version.

With approval, I revised the patch to make the following changes:
- add static keywords to new jlink-specific variables
- factor calculation of major_version to be more readable
- remove braces around simple one-line statements in if/else clauses
- remove (rather than #if 0) duplicate reset code; it is in SVN
- use &function to be clearer when passing function pointers
- add symbols for EMU_CMD_GET_CAPS bits; do not hard-code constants!
- almost renamed jlink_handle_jlink_hw_jtag_command  (seriously?!?!)
  - rewrote that function using a switch statement.
  - made version request processing easier to understand and modify
- improve alternate endpoint detection:
  - make code easier to read by using temporary variables
  - eliminate extra level of indentation and redundant logging
- use ternary conditional to select JTAG2 or JTAG3 command
- reverse version test in jlink_usb_message to reduce indentation
  - this had the biggest effect in cleaning up this patch
- use C99's ability to declare new/changed variables with less scope
- add spaces around binary operators in new/changed code
- revert other superfluous whitespace/comment style changes


Modified: trunk/src/jtag/jlink.c
===================================================================
--- trunk/src/jtag/jlink.c	2009-05-23 01:25:39 UTC (rev 1888)
+++ trunk/src/jtag/jlink.c	2009-05-23 03:42:13 UTC (rev 1889)
@@ -36,6 +36,10 @@
 #define JLINK_WRITE_ENDPOINT	0x02
 #define JLINK_READ_ENDPOINT		0x81
 
+static unsigned int jlink_write_ep = JLINK_WRITE_ENDPOINT;
+static unsigned int jlink_read_ep = JLINK_READ_ENDPOINT;
+static unsigned int jlink_hw_jtag_version = 2;
+
 #define JLINK_USB_TIMEOUT		1000
 
 // See Section 1.3.2 of the Segger JLink USB protocol manual
@@ -60,6 +64,7 @@
 #define EMU_CMD_HW_CLOCK			0xc8
 #define EMU_CMD_HW_TMS0 			0xc9
 #define EMU_CMD_HW_TMS1 			0xca
+#define EMU_CMD_HW_JTAG2    		0xce
 #define EMU_CMD_HW_JTAG3    		0xcf
 #define EMU_CMD_GET_MAX_MEM_BLOCK	0xd4
 #define EMU_CMD_HW_RESET0   		0xdc
@@ -67,7 +72,12 @@
 #define EMU_CMD_HW_TRST0    		0xde
 #define EMU_CMD_HW_TRST1    		0xdf
 #define EMU_CMD_GET_CAPS    		0xe8
+#define EMU_CMD_GET_HW_VERSION  	0xf0
 
+/* bits return from EMU_CMD_GET_CAPS */
+#define EMU_CAP_GET_HW_VERSION 		1
+#define EMU_CAP_GET_MAX_BLOCK_SIZE	11
+
 /* max speed 12MHz v5.0 jlink */
 #define JLINK_MAX_SPEED 12000
 
@@ -82,6 +92,7 @@
 
 /* CLI command handler functions */
 static int jlink_handle_jlink_info_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
+static int jlink_handle_jlink_hw_jtag_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
 
 /* Queue command functions */
 static void jlink_end_state(tap_state_t state);
@@ -208,12 +219,6 @@
 			cmd->cmd.reset->trst, cmd->cmd.reset->srst);
 
 	jlink_tap_execute();
-
-	if ( (cmd->cmd.reset->trst == 1) || ( cmd->cmd.reset->srst && (jtag_reset_config & RESET_SRST_PULLS_TRST) ) )
-	{
-		tap_set_state(TAP_RESET);
-	}
-
 	jlink_reset(cmd->cmd.reset->trst, cmd->cmd.reset->srst);
 	jlink_tap_execute();
 }
@@ -301,8 +306,13 @@
 
 static int jlink_register_commands(struct command_context_s *cmd_ctx)
 {
-	register_command(cmd_ctx, NULL, "jlink_info", jlink_handle_jlink_info_command, COMMAND_EXEC,
+
+	register_command(cmd_ctx, NULL, "jlink_info", 
+		&jlink_handle_jlink_info_command, COMMAND_EXEC,
 		"query jlink info");
+	register_command(cmd_ctx, NULL, "jlink_hw_jtag",
+		&jlink_handle_jlink_hw_jtag_command, COMMAND_EXEC,
+		"set/get jlink hw jtag command version [2|3]");
 	return ERROR_OK;
 }
 
@@ -318,6 +328,7 @@
 		return ERROR_JTAG_INIT_FAILED;
 	}
 
+	jlink_hw_jtag_version = 2;
 	check_cnt = 0;
 	while (check_cnt < 3)
 	{
@@ -556,6 +567,12 @@
 	}
 
 	len = buf_get_u32(usb_in_buffer, 0, 16);
+	if (len > JLINK_IN_BUFFER_SIZE)
+	{
+		LOG_ERROR("J-Link command EMU_CMD_VERSION impossible return length 0x%0x", len);
+		len = JLINK_IN_BUFFER_SIZE;
+	}
+	
 	result = jlink_usb_read(jlink_jtag_handle, len);
 	if (result != len)
 	{
@@ -579,21 +596,42 @@
 	jlink_caps = buf_get_u32(usb_in_buffer, 0, 32);
 	LOG_INFO("JLink caps 0x%x", jlink_caps);
 
+	if (jlink_caps & (1 << EMU_CAP_GET_HW_VERSION))
+	{
+		/* query hardware version */
+		jlink_simple_command(EMU_CMD_GET_HW_VERSION);
 
-	/* query hardware maximum memory block */
-	jlink_simple_command(EMU_CMD_GET_MAX_MEM_BLOCK);
+		result = jlink_usb_read(jlink_jtag_handle, 4);
+		if (4 != result)
+		{
+			LOG_ERROR("J-Link command EMU_CMD_GET_HW_VERSION failed (%d)\n", result);
+			return ERROR_JTAG_DEVICE_ERROR;
+		}
 
-	result = jlink_usb_read(jlink_jtag_handle, 4);
-	if (4 != result)
-	{
-		LOG_ERROR("J-Link command EMU_CMD_GET_MAX_MEM_BLOCK failed (%d)\n", result);
-		return ERROR_JTAG_DEVICE_ERROR;
+		u32 jlink_hw_version = buf_get_u32(usb_in_buffer, 0, 32);
+		u32 major_revision = (jlink_hw_version / 10000) % 100;
+		if (major_revision >= 5)
+			jlink_hw_jtag_version = 3;
+
+		LOG_INFO("JLink hw version %i", jlink_hw_version);
 	}
 
-	jlink_max_size = buf_get_u32(usb_in_buffer, 0, 32);
-	LOG_INFO("JLink max mem block %i", jlink_max_size);
+	if (jlink_caps & (1 << EMU_CAP_GET_MAX_BLOCK_SIZE))
+	{
+		/* query hardware maximum memory block */
+		jlink_simple_command(EMU_CMD_GET_MAX_MEM_BLOCK);
 
+		result = jlink_usb_read(jlink_jtag_handle, 4);
+		if (4 != result)
+		{
+			LOG_ERROR("J-Link command EMU_CMD_GET_MAX_MEM_BLOCK failed (%d)\n", result);
+			return ERROR_JTAG_DEVICE_ERROR;
+		}
 
+		jlink_max_size = buf_get_u32(usb_in_buffer, 0, 32);
+		LOG_INFO("JLink max mem block %i", jlink_max_size);
+	}
+
 	return ERROR_OK;
 }
 
@@ -608,6 +646,30 @@
 	return ERROR_OK;
 }
 
+static int jlink_handle_jlink_hw_jtag_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
+{
+	switch (argc) {
+	case 0:
+		command_print(cmd_ctx, "jlink hw jtag  %i", jlink_hw_jtag_version);
+		break;
+	case 1: {
+		int request_version = atoi(args[0]);
+		switch (request_version) {
+		case 2: case 3:
+			jlink_hw_jtag_version = request_version;
+			break;
+		default:
+			return ERROR_COMMAND_SYNTAX_ERROR;
+		}
+		break;
+	}
+	default:
+		return ERROR_COMMAND_SYNTAX_ERROR;
+	}
+
+	return ERROR_OK;
+}
+
 /***************************************************************************/
 /* J-Link tap functions */
 
@@ -721,7 +783,8 @@
 	// number of full bytes (plus one if some would be left over)
 	byte_length = TAP_SCAN_BYTES(tap_length);
 
-	usb_out_buffer[0] = EMU_CMD_HW_JTAG3;
+	bool use_jtag3 = jlink_hw_jtag_version >= 3;
+	usb_out_buffer[0] = use_jtag3 ? EMU_CMD_HW_JTAG3 : EMU_CMD_HW_JTAG2;
 	usb_out_buffer[1] = 0;
 	usb_out_buffer[2] = (tap_length >> 0) & 0xff;
 	usb_out_buffer[3] = (tap_length >> 8) & 0xff;
@@ -814,6 +877,19 @@
 				 */
 				usb_set_altinterface(result->usb_handle, 0);
 #endif
+				struct usb_interface *iface = dev->config->interface;
+				struct usb_interface_descriptor *desc = iface->altsetting;
+				for (int i = 0; i < desc->bNumEndpoints; i++)
+				{
+					u8 epnum = desc->endpoint[i].bEndpointAddress;
+					bool is_input = epnum & 0x80;
+					LOG_DEBUG("usb ep %s %02x", is_input ? "in" : "out", epnum);
+					if (is_input)
+						jlink_read_ep = epnum;
+					else
+						jlink_write_ep = epnum;
+				}
+
 				return result;
 			}
 		}
@@ -833,7 +909,6 @@
 static int jlink_usb_message(jlink_jtag_t *jlink_jtag, int out_length, int in_length)
 {
 	int result;
-	int result2;
 
 	result = jlink_usb_write(jlink_jtag, out_length);
 	if (result != out_length)
@@ -851,6 +926,10 @@
 		return ERROR_JTAG_DEVICE_ERROR;
 	}
 
+	if (jlink_hw_jtag_version < 3)
+		return result;
+
+	int result2 = ERROR_OK;
 	if (result == in_length)
 	{
 		/* Must read the result from the EMU too */
@@ -937,7 +1016,7 @@
 		return -1;
 	}
 
-	result = usb_bulk_write_ex(jlink_jtag->usb_handle, JLINK_WRITE_ENDPOINT,
+	result = usb_bulk_write_ex(jlink_jtag->usb_handle, jlink_write_ep,
 		(char *)usb_out_buffer, out_length, JLINK_USB_TIMEOUT);
 
 	DEBUG_JTAG_IO("jlink_usb_write, out_length = %d, result = %d", out_length, result);
@@ -951,7 +1030,7 @@
 /* Read data from USB into in_buffer. */
 static int jlink_usb_read(jlink_jtag_t *jlink_jtag, int expected_size)
 {
-	int result = usb_bulk_read_ex(jlink_jtag->usb_handle, JLINK_READ_ENDPOINT,
+	int result = usb_bulk_read_ex(jlink_jtag->usb_handle, jlink_read_ep,
 		(char *)usb_in_buffer, expected_size, JLINK_USB_TIMEOUT);
 
 	DEBUG_JTAG_IO("jlink_usb_read, result = %d", result);
@@ -965,7 +1044,7 @@
 /* Read the result from the previous EMU cmd into result_buffer. */
 static int jlink_usb_read_emu_result(jlink_jtag_t *jlink_jtag)
 {
-	int result = usb_bulk_read_ex(jlink_jtag->usb_handle, JLINK_READ_ENDPOINT,
+	int result = usb_bulk_read_ex(jlink_jtag->usb_handle, jlink_read_ep,
 		(char *)usb_emu_result_buffer, 1 /* JLINK_EMU_RESULT_BUFFER_SIZE */,
 		JLINK_USB_TIMEOUT);
 

[Openocd-svn] r1888 - trunk/src/xsvf

[<zw...@ma...>]

Author: zwelch
Date: 2009-05-23 03:25:39 +0200 (Sat, 23 May 2009)
New Revision: 1888

Modified:
   trunk/src/xsvf/xsvf.c
Log:
More printf fixes stemming from format string change in r1882.

Modified: trunk/src/xsvf/xsvf.c
===================================================================
--- trunk/src/xsvf/xsvf.c	2009-05-23 00:51:13 UTC (rev 1887)
+++ trunk/src/xsvf/xsvf.c	2009-05-23 01:25:39 UTC (rev 1888)
@@ -1020,9 +1020,10 @@
 
 	if (unsupported)
 	{
+		off_t offset = lseek(xsvf_fd, 0, SEEK_CUR) - 1;
 		command_print(cmd_ctx,
-			 "unsupported xsvf command: 0x%02X in xsvf file at offset %jd, aborting",
-					  uc,  lseek(xsvf_fd, 0, SEEK_CUR)-1 );
+				"unsupported xsvf command (0x%02X) at offset %jd, aborting",
+				uc, (intmax_t)offset);
 		return ERROR_FAIL;
 	}
 

[Openocd-svn] r1887 - trunk

[<zw...@ma...>]

Author: zwelch
Date: 2009-05-23 02:51:13 +0200 (Sat, 23 May 2009)
New Revision: 1887

Modified:
   trunk/Doxyfile
Log:
Change doxygen configuration to show code comments in documentation.

Modified: trunk/Doxyfile
===================================================================
--- trunk/Doxyfile	2009-05-22 17:49:28 UTC (rev 1886)
+++ trunk/Doxyfile	2009-05-23 00:51:13 UTC (rev 1887)
@@ -697,7 +697,7 @@
 # doxygen to hide any special comment blocks from generated source code
 # fragments. Normal C and C++ comments will always remain visible.
 
-STRIP_CODE_COMMENTS    = YES
+STRIP_CODE_COMMENTS    = NO
 
 # If the REFERENCED_BY_RELATION tag is set to YES 
 # then for each documented function all documented

[Openocd-svn] r1886 - trunk/src/flash

[kc8apf at B. <kc...@ma...>]

Author: kc8apf
Date: 2009-05-22 19:49:28 +0200 (Fri, 22 May 2009)
New Revision: 1886

Modified:
   trunk/src/flash/cfi.c
Log:
Author: Ra?\195?\186l S?\195?\161nchez Siles <rsa...@in...>
	- Fix multi-byte reads on x16 devices used as x8


Modified: trunk/src/flash/cfi.c
===================================================================
--- trunk/src/flash/cfi.c	2009-05-22 17:48:26 UTC (rev 1885)
+++ trunk/src/flash/cfi.c	2009-05-22 17:49:28 UTC (rev 1886)
@@ -204,9 +204,18 @@
 static u16 cfi_query_u16(flash_bank_t *bank, int sector, u32 offset)
 {
 	target_t *target = bank->target;
+	cfi_flash_bank_t *cfi_info = bank->driver_priv;
 	u8 data[CFI_MAX_BUS_WIDTH * 2];
 
-	target->type->read_memory(target, flash_address(bank, sector, offset), bank->bus_width, 2, data);
+	if(cfi_info->x16_as_x8)
+	{
+		u8 i;
+		for(i=0;i<2;i++)
+			target->type->read_memory(target, flash_address(bank, sector, offset+i), bank->bus_width, 1,
+				&data[i*bank->bus_width] );
+	}
+	else
+		target->type->read_memory(target, flash_address(bank, sector, offset), bank->bus_width, 2, data);
 
 	if (bank->target->endianness == TARGET_LITTLE_ENDIAN)
 		return data[0] | data[bank->bus_width] << 8;
@@ -217,9 +226,18 @@
 static u32 cfi_query_u32(flash_bank_t *bank, int sector, u32 offset)
 {
 	target_t *target = bank->target;
+	cfi_flash_bank_t *cfi_info = bank->driver_priv;
 	u8 data[CFI_MAX_BUS_WIDTH * 4];
 
-	target->type->read_memory(target, flash_address(bank, sector, offset), bank->bus_width, 4, data);
+	if(cfi_info->x16_as_x8)
+	{
+		u8 i;
+		for(i=0;i<4;i++)
+			target->type->read_memory(target, flash_address(bank, sector, offset+i), bank->bus_width, 1,
+				&data[i*bank->bus_width] );
+	}
+	else
+		target->type->read_memory(target, flash_address(bank, sector, offset), bank->bus_width, 4, data);
 
 	if (bank->target->endianness == TARGET_LITTLE_ENDIAN)
 		return data[0] | data[bank->bus_width] << 8 | data[bank->bus_width * 2] << 16 | data[bank->bus_width * 3] << 24;

[Openocd-svn] r1885 - trunk/src/flash

[kc8apf at B. <kc...@ma...>]

Author: kc8apf
Date: 2009-05-22 19:48:26 +0200 (Fri, 22 May 2009)
New Revision: 1885

Modified:
   trunk/src/flash/cfi.c
Log:
Author: Ra?\195?\186l S?\195?\161nchez Siles <rsa...@in...>
	- Fix calculation of flash_address for x16 devices used as x8


Modified: trunk/src/flash/cfi.c
===================================================================
--- trunk/src/flash/cfi.c	2009-05-22 17:47:07 UTC (rev 1884)
+++ trunk/src/flash/cfi.c	2009-05-22 17:48:26 UTC (rev 1885)
@@ -112,9 +112,11 @@
 /* inline u32 flash_address(flash_bank_t *bank, int sector, u32 offset) */
 static __inline__ u32 flash_address(flash_bank_t *bank, int sector, u32 offset)
 {
+	cfi_flash_bank_t *cfi_info = bank->driver_priv;
+
 	/* while the sector list isn't built, only accesses to sector 0 work */
 	if (sector == 0)
-		return bank->base + offset * bank->bus_width;
+		return bank->base + (offset * bank->bus_width << cfi_info->x16_as_x8 );
 	else
 	{
 		if (!bank->sectors)
@@ -122,7 +124,7 @@
 			LOG_ERROR("BUG: sector list not yet built");
 			exit(-1);
 		}
-		return bank->base + bank->sectors[sector].offset + offset * bank->bus_width;
+		return bank->base + bank->sectors[sector].offset + (offset * bank->bus_width << cfi_info->x16_as_x8 );
 	}
 
 }

[Openocd-svn] r1884 - trunk/src/flash

[kc8apf at B. <kc...@ma...>]

Author: kc8apf
Date: 2009-05-22 19:47:07 +0200 (Fri, 22 May 2009)
New Revision: 1884

Modified:
   trunk/src/flash/cfi.c
Log:
Author: Ra?\195?\186l S?\195?\161nchez Siles <rsa...@in...>
	- Consistently use flash_address


Modified: trunk/src/flash/cfi.c
===================================================================
--- trunk/src/flash/cfi.c	2009-05-22 17:44:04 UTC (rev 1883)
+++ trunk/src/flash/cfi.c	2009-05-22 17:47:07 UTC (rev 1884)
@@ -2129,11 +2129,11 @@
 	if (bank->chip_width == 1)
 	{
 		u8 manufacturer, device_id;
-		if((retval = target_read_u8(target, bank->base + 0x0, &manufacturer)) != ERROR_OK)
+		if((retval = target_read_u8(target, flash_address(bank, 0, 0x00), &manufacturer)) != ERROR_OK)
 		{
 			return retval;
 		}
-		if((retval = target_read_u8(target, bank->base + 0x1, &device_id)) != ERROR_OK)
+		if((retval = target_read_u8(target, flash_address(bank, 0, 0x01), &device_id)) != ERROR_OK)
 		{
 			return retval;
 		}
@@ -2142,11 +2142,11 @@
 	}
 	else if (bank->chip_width == 2)
 	{
-		if((retval = target_read_u16(target, bank->base + 0x0, &cfi_info->manufacturer)) != ERROR_OK)
+		if((retval = target_read_u16(target, flash_address(bank, 0, 0x00), &cfi_info->manufacturer)) != ERROR_OK)
 		{
 			return retval;
 		}
-		if((retval = target_read_u16(target, bank->base + 0x2, &cfi_info->device_id)) != ERROR_OK)
+		if((retval = target_read_u16(target, flash_address(bank, 0, 0x02), &cfi_info->device_id)) != ERROR_OK)
 		{
 			return retval;
 		}

[Openocd-svn] r1883 - trunk/src/flash

[kc8apf at B. <kc...@ma...>]

Author: kc8apf
Date: 2009-05-22 19:44:04 +0200 (Fri, 22 May 2009)
New Revision: 1883

Modified:
   trunk/src/flash/nand.c
Log:
Author: David Brownell <da...@pa...>

Remove un-implemented and dubious "nand copy" command.

Doing this efficiently would mean doing the copying on
the target CPU, instead of back and forth through JTAG.
If anyone ever needs this functionality, that's what
they should implement.

Also, update on-line "help" for "nand dump" to display
its two optional flags; and for "nand write" to display
a recently added flag.



Modified: trunk/src/flash/nand.c
===================================================================
--- trunk/src/flash/nand.c	2009-05-22 17:41:54 UTC (rev 1882)
+++ trunk/src/flash/nand.c	2009-05-22 17:44:04 UTC (rev 1883)
@@ -35,7 +35,6 @@
 static int handle_nand_probe_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
 static int handle_nand_check_bad_blocks_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
 static int handle_nand_info_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
-static int handle_nand_copy_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
 static int handle_nand_write_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
 static int handle_nand_dump_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
 static int handle_nand_erase_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
@@ -311,12 +310,11 @@
 						 "check NAND flash device <num> for bad blocks [<first> <last>]");
 		register_command(cmd_ctx, nand_cmd, "erase", handle_nand_erase_command, COMMAND_EXEC,
 						 "erase blocks on NAND flash device <num> <first> <last>");
-		register_command(cmd_ctx, nand_cmd, "copy", handle_nand_copy_command, COMMAND_EXEC,
-						 "copy from NAND flash device <num> <offset> <length> <ram-address>");
 		register_command(cmd_ctx, nand_cmd, "dump", handle_nand_dump_command, COMMAND_EXEC,
-						 "dump from NAND flash device <num> <filename> <offset> <size> [options]");
+						 "dump from NAND flash device <num> <filename> "
+						 "<offset> <size> [oob_raw|oob_only]");
 		register_command(cmd_ctx, nand_cmd, "write", handle_nand_write_command, COMMAND_EXEC,
-						 "write to NAND flash device <num> <filename> <offset> [oob_raw|oob_only|oob_softecc]");
+						 "write to NAND flash device <num> <filename> <offset> [oob_raw|oob_only|oob_softecc|oob_softecc_kw]");
 		register_command(cmd_ctx, nand_cmd, "raw_access", handle_nand_raw_access_command, COMMAND_EXEC,
 						 "raw access to NAND flash device <num> ['enable'|'disable']");
 	}
@@ -1270,29 +1268,6 @@
 	return ERROR_OK;
 }
 
-static int handle_nand_copy_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
-{
-	nand_device_t *p;
-
-	if (argc != 4)
-	{
-		return ERROR_COMMAND_SYNTAX_ERROR;
-
-	}
-
-	p = get_nand_device_by_num(strtoul(args[0], NULL, 0));
-	if (p)
-	{
-
-	}
-	else
-	{
-		command_print(cmd_ctx, "NAND flash device '#%s' is out of bounds", args[0]);
-	}
-
-	return ERROR_OK;
-}
-
 static int handle_nand_write_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
 {
 	u32 offset;

[Openocd-svn] r1882 - in trunk/src: pld xsvf

[kc8apf at B. <kc...@ma...>]

Author: kc8apf
Date: 2009-05-22 19:41:54 +0200 (Fri, 22 May 2009)
New Revision: 1882

Modified:
   trunk/src/pld/pld.c
   trunk/src/xsvf/xsvf.c
Log:
Author: Rick Altherr <kc...@kc...>
	- printf conversion fixes for variably-sized types


Modified: trunk/src/pld/pld.c
===================================================================
--- trunk/src/pld/pld.c	2009-05-22 02:32:31 UTC (rev 1881)
+++ trunk/src/pld/pld.c	2009-05-22 17:41:54 UTC (rev 1882)
@@ -189,9 +189,9 @@
 		gettimeofday(&end, NULL);	
 		timeval_subtract(&duration, &end, &start);
 
-		command_print(cmd_ctx, "loaded file %s to pld device %lu in %lis %lius",
+		command_print(cmd_ctx, "loaded file %s to pld device %lu in %jis %jius",
 			args[1], strtoul(args[0], NULL, 0),
-			duration.tv_sec, duration.tv_usec);
+			(intmax_t)duration.tv_sec, (intmax_t)duration.tv_usec);
 	}
 	
 	return ERROR_OK;

Modified: trunk/src/xsvf/xsvf.c
===================================================================
--- trunk/src/xsvf/xsvf.c	2009-05-22 02:32:31 UTC (rev 1881)
+++ trunk/src/xsvf/xsvf.c	2009-05-22 17:41:54 UTC (rev 1882)
@@ -1021,7 +1021,7 @@
 	if (unsupported)
 	{
 		command_print(cmd_ctx,
-			 "unsupported xsvf command: 0x%02X in xsvf file at offset %ld, aborting",
+			 "unsupported xsvf command: 0x%02X in xsvf file at offset %jd, aborting",
 					  uc,  lseek(xsvf_fd, 0, SEEK_CUR)-1 );
 		return ERROR_FAIL;
 	}

[Openocd-svn] r1881 - in trunk/src/target: board target

[<zw...@ma...>]

Author: zwelch
Date: 2009-05-22 04:32:31 +0200 (Fri, 22 May 2009)
New Revision: 1881

Added:
   trunk/src/target/board/dm355evm.cfg
   trunk/src/target/target/davinci.cfg
Modified:
   trunk/src/target/target/ti_dm355.cfg
Log:
Submitted by David Brownell <da...@pa...>:

Improve support for the DM355 EVM board, and eventually other boards based
on DaVinci chips:

 - Provide generic "davinci.cfg" to hold utilities that can be reused by
   different chips in this family.  Start with PINMUX, PSC, and PLL setup.

 - DM355 chip support updates:  provide a dictionary with chip-specific
   symbols, load those utilities.

 - Create a new dm355evm board file, with a reset-init event handler
   which uses those utilities to set up PLLs and clocks, configure the
   pins, and improve the JTAG speed limit.

Also a minor tweak:  provide a virtual address for the work area, matching
what the very latest kernels do.  It's probably unwise to use OpenOCD while
the MMU is active though.

The DRAM isn't yet accessible, but NAND access is mostly ready.


Added: trunk/src/target/board/dm355evm.cfg
===================================================================
--- trunk/src/target/board/dm355evm.cfg	2009-05-22 02:27:30 UTC (rev 1880)
+++ trunk/src/target/board/dm355evm.cfg	2009-05-22 02:32:31 UTC (rev 1881)
@@ -0,0 +1,111 @@
+#
+# DM355 EVM board
+#   http://focus.ti.com/docs/toolsw/folders/print/tmdsevm355.html
+#   http://c6000.spectrumdigital.com/evmdm355/
+
+source [find target/ti_dm355.cfg]
+
+reset_config trst_and_srst separate
+
+# NOTE:  disable or replace this call to dm355evm_init if you're
+# debugging new UBL code from SRAM.
+$_TARGETNAME configure -event reset-init { dm355evm_init }
+
+#
+# This post-reset init is called when the MMU isn't active, all IRQs
+# are disabled, etc.  It should do most of what a UBL does, except for
+# loading code (like U-Boot) into DRAM and running it.
+#
+proc dm355evm_init {} {
+	global dm355
+
+	puts "Initialize DM355 EVM board"
+
+	# CLKIN	= 24 MHz ... can't talk quickly to ARM yet
+	jtag_khz 1500
+
+	########################
+	# PLL1		= 432 MHz (/8, x144)
+	# ...SYSCLK1	= 216 MHz (/2)  ... ARM, MJCP
+	# ...SYSCLK2	= 108 MHz (/4)  ... Peripherals
+	# ...SYSCLK3	= 27  MHz (/16) ... VPBE, DAC
+	# ...SYSCLK4	= 108 MHz (/4)  ... VPSS
+	#	pll1.{prediv,div1,div2} are fixed
+	#	pll1.postdiv set in MISC (for *this* speed grade)
+
+	set addr [dict get $dm355 pllc1]
+	set pll_divs [dict create]
+	dict set pll_divs div3 16
+	dict set pll_divs div4 8
+	pll_setup $addr 144 $pll_divs
+
+	# ARM is now running at 216 MHz, so JTAG can go faster
+	jtag_khz 20000
+
+	########################
+	# PLL2		= 342 MHz (/8, x114)
+	# ....SYSCLK1	= 342 MHz (/1)  ... DDR PHY at 171 MHz, 2x clock
+	#	pll2.{postdiv,div1} are fixed
+
+	set addr [dict get $dm355 pllc2]
+	set pll_divs [dict create]
+	dict set pll_divs prediv 8
+	pll_setup $addr 114 $pll_divs
+
+	########################
+	# PINMUX
+
+	# All Video Inputs
+	davinci_pinmux $dm355 0 0x00007f55
+	# All Video Outputs
+	davinci_pinmux $dm355 1 0x00145555
+	# EMIFA (NOTE: more could be set up for use as GPIOs)
+	davinci_pinmux $dm355 2 0x00000c08
+	# SPI0, SPI1, UART1, I2C, SD0, SD1, McBSP0, CLKOUTs
+	davinci_pinmux $dm355 3 0x1bff55ff
+	# MMC/SD0 instead of MS; SPI0
+	davinci_pinmux $dm355 4 0x00000000
+
+	########################
+	# PSC setup (minimal)
+
+	# DDR EMIF/13, AEMIF/14, UART0/19
+	psc_enable 13
+	psc_enable 14
+	psc_enable 19
+	psc_go
+
+	########################
+	# DDR2 EMIF
+
+	# FIXME setup
+
+	########################
+	# ASYNC EMIF
+
+	set addr [dict get $dm355 a_emif]
+
+	# slow/pessimistic timings
+	set nand_timings 0x40400204
+	# fast (25% faster page reads)
+	#set nand_timings 0x0400008c
+
+	# AWCCR
+	mww [expr $addr + 0x04] 0xff
+	# CS0 == socketed NAND (default MT29F16G08FAA, 2GByte)
+	mww [expr $addr + 0x10] $nand_timings
+	# CS1 == dm9000 Ethernet
+	mww [expr $addr + 0x14] 0x00a00505
+	# NANDFCR -- only CS0 has NAND
+	mww [expr $addr + 0x60] 0x01
+
+	########################
+	# UART0
+
+	# FIXME setup
+}
+
+# FIXME
+#  - declare the NAND flash; use the 4-bit ECC
+#  - support writing UBL with its header (new layout only with new ROMs)
+#  - support writing ABL/U-Boot with its header (both layouts)


Property changes on: trunk/src/target/board/dm355evm.cfg
___________________________________________________________________
Name: svn:eol-style
   + native

Added: trunk/src/target/target/davinci.cfg
===================================================================
--- trunk/src/target/target/davinci.cfg	2009-05-22 02:27:30 UTC (rev 1880)
+++ trunk/src/target/target/davinci.cfg	2009-05-22 02:32:31 UTC (rev 1881)
@@ -0,0 +1,170 @@
+#
+# Utility code for DaVinci-family chips
+#
+
+# davinci_pinmux:  assigns PINMUX$reg <== $value
+proc davinci_pinmux {soc reg value} {
+	mww [expr [dict get $soc sysbase] + 4 * $reg] $value
+}
+
+# mrw: "memory read word", returns value of $reg
+proc mrw {reg} {
+	set value ""
+	ocd_mem2array value 32 $reg 1
+	return $value(0)
+}
+
+# mmw: "memory modify word", updates value of $reg
+#	$reg <== ((value & ~$clearbits) | $setbits)
+proc mmw {reg setbits clearbits} {
+	set old [mrw $reg]
+	set new [expr ($old & ~$clearbits) | $setbits]
+	mww $reg $new
+}
+
+#
+# pll_setup: initialize PLL
+#  - pll_addr ... physical addr of controller
+#  - mult ... pll multiplier
+#  - config ... dict mapping { prediv, postdiv, div[1-9] } to dividers
+#
+# For PLLs that don't have a given register (e.g. plldiv8), or where a
+# given divider is non-programmable, caller provides *NO* config mapping.
+#
+# REVISIT there are minor differences between the PLL controllers.
+# Handle those; maybe check the ID register.  This version behaves
+# for at least the dm355.  On dm6446 and dm357 the PLLRST polarity
+# is different.  On dm365 there are more changes.
+#
+proc pll_setup {pll_addr mult config} {
+	set pll_ctrl_addr [expr $pll_addr + 0x100]
+	set pll_ctrl [mrw $pll_ctrl_addr]
+
+	# 1 - clear CLKMODE (bit 8) iff using on-chip oscillator
+	# NOTE:  this assumes we should clear that bit
+	set pll_ctrl [expr $pll_ctrl & ~0x0100]
+	mww $pll_ctrl_addr $pll_ctrl
+
+	# 2 - clear PLLENSRC (bit 5)
+	set pll_ctrl [expr $pll_ctrl & ~0x0020]
+	mww $pll_ctrl_addr $pll_ctrl
+
+	# 3 - clear PLLEN (bit 0) ... enter bypass mode
+	set pll_ctrl [expr $pll_ctrl & ~0x0001]
+	mww $pll_ctrl_addr $pll_ctrl
+
+	# 4 - wait at least 4 refclk cycles
+	sleep 1
+
+	# 5 - set PLLRST (bit 3)
+	set pll_ctrl [expr $pll_ctrl | 0x0008]
+	mww $pll_ctrl_addr $pll_ctrl
+
+	# 6 - set PLLDIS (bit 4)
+	set pll_ctrl [expr $pll_ctrl | 0x0010]
+	mww $pll_ctrl_addr $pll_ctrl
+
+	# 7 - clear PLLPWRDN (bit 1)
+	set pll_ctrl [expr $pll_ctrl & ~0x0002]
+	mww $pll_ctrl_addr $pll_ctrl
+
+	# 8 - clear PLLDIS (bit 4)
+	set pll_ctrl [expr $pll_ctrl & ~0x0010]
+	mww $pll_ctrl_addr $pll_ctrl
+
+	# 9 - optional:  write prediv, postdiv, and pllm
+	# NOTE:  for dm355 PLL1, postdiv is controlled via MISC register
+	mww [expr $pll_addr + 0x0110] [expr ($mult - 1) & 0xff]
+	if { [dict exists $config prediv] } {
+		set div [dict get $config prediv]
+		set div [expr 0x8000 | ($div - 1)]
+		mww [expr $pll_addr + 0x0114] $div
+	}
+	if { [dict exists $config postdiv] } {
+		set div [dict get $config postdiv]
+		set div [expr 0x8000 | ($div - 1)]
+		mww [expr $pll_addr + 0x0128] $div
+	}
+
+	# 10 - optional:  set plldiv1, plldiv2, ...
+	# NOTE:  this assumes some registers have their just-reset values:
+	#	- PLLSTAT.GOSTAT is clear when we enter
+	#	- ALNCTL has everything set
+	set go 0
+	if { [dict exists $config div1] } {
+		set div [dict get $config div1]
+		set div [expr 0x8000 | ($div - 1)]
+		mww [expr $pll_addr + 0x0118] $div
+		set go 1
+	}
+	if { [dict exists $config div2] } {
+		1et div [dict get $config div2]
+		set div [expr 0x8000 | ($div - 1)]
+		mww [expr $pll_addr + 0x011c] $div
+		set go 1
+	}
+	if { [dict exists $config div3] } {
+		set div [dict get $config div3]
+		set div [expr 0x8000 | ($div - 1)]
+		mww [expr $pll_addr + 0x011c] $div
+		set go 1
+	}
+	if { [dict exists $config div4] } {
+		set div [dict get $config div4]
+		set div [expr 0x8000 | ($div - 1)]
+		mww [expr $pll_addr + 0x0160] $div
+		set go 1
+	}
+	if { [dict exists $config div5] } {
+		set div [dict get $config div5]
+		set div [expr 0x8000 | ($div - 1)]
+		mww [expr $pll_addr + 0x0164] $div
+		set go 1
+	}
+	if {$go != 0} {
+		# write pllcmd.GO; poll pllstat.GO
+		mww [expr $pll_addr + 0x0138] 0x01
+		set pllstat [expr $pll_addr + 0x013c]
+		while {[expr [mrw $pllstat] & 0x01] != 0} { sleep 1 }
+	}
+
+	# 11 - wait at least 5 usec for reset to finish
+	# (assume covered by overheads including JTAG messaging)
+
+	# 12 - clear PLLRST (bit 3)
+	set pll_ctrl [expr $pll_ctrl & ~0x0008]
+	mww $pll_ctrl_addr $pll_ctrl
+
+	# 13 - wait at least 8000 refclk cycles for PLL to lock
+	# if we assume 24 MHz (slowest osc), that's 1/3 msec
+	sleep 3
+
+	# 14 - set PLLEN (bit 0) ... leave bypass mode
+	set pll_ctrl [expr $pll_ctrl | 0x0001]
+	mww $pll_ctrl_addr $pll_ctrl
+}
+
+# NOTE:  dm6446 requires EMURSTIE set in MDCTL before certain
+# modules can be enabled.
+
+# prepare a non-DSP module to be enabled; finish with psc_go
+proc psc_enable {module} {
+	set psc_addr 0x01c41000
+	# write MDCTL
+	mmw [expr $psc_addr + 0x0a00 + (4 * $module)] 0x03 0x1f
+}
+
+# execute non-DSP PSC transition(s) set up by psc_enable
+proc psc_go {} {
+	set psc_addr 0x01c41000
+	set ptstat_addr [expr $psc_addr + 0x0128]
+
+	# just in case PTSTAT.go isn't clear
+	while { [expr [mrw $ptstat_addr] & 0x01] != 0 } { sleep 1 }
+
+	# write PTCMD.go ... ignoring any DSP power domain
+	mww [expr $psc_addr + 0x0120] 1
+
+	# wait for PTSTAT.go to clear (again ignoring DSP power domain)
+	while { [expr [mrw $ptstat_addr] & 0x01] != 0 } { sleep 1 }
+}


Property changes on: trunk/src/target/target/davinci.cfg
___________________________________________________________________
Name: svn:eol-style
   + native

Modified: trunk/src/target/target/ti_dm355.cfg
===================================================================
--- trunk/src/target/target/ti_dm355.cfg	2009-05-22 02:27:30 UTC (rev 1880)
+++ trunk/src/target/target/ti_dm355.cfg	2009-05-22 02:32:31 UTC (rev 1881)
@@ -44,13 +44,45 @@
 }
 jtag newtap $_CHIPNAME jrc -irlen 6 -ircapture 0x1 -irmask 0x3f -expected-id $_JRC_TAPID
 
+################
+
+# various symbol definitions, to avoid hard-wiring addresses
+# and enable some sharing of DaVinci-family utility code
+global dm355
+set dm355 [ dict create ]
+
+# Physical addresses for controllers and memory
+# (Some of these are valid for many DaVinci family chips)
+dict set dm355 sram0		0x00010000
+dict set dm355 sram1		0x00014000
+dict set dm355 sysbase		0x01c40000
+dict set dm355 pllc1		0x01c40800
+dict set dm355 pllc2		0x01c40c00
+dict set dm355 psc		0x01c41000
+dict set dm355 gpio		0x01c67000
+dict set dm355 a_emif		0x01e10000
+dict set dm355 a_emif_cs0	0x02000000
+dict set dm355 a_emif_cs1	0x04000000
+dict set dm355 ddr_emif		0x20000000
+dict set dm355 ddr		0x80000000
+
+source [find target/davinci.cfg]
+
+################
 # GDB target:  the ARM, using SRAM1 for scratch.  SRAM0 (also 16K)
 # and the ETB memory (4K) are other options, while trace is unused.
 set _TARGETNAME $_CHIPNAME.arm
 
 target create $_TARGETNAME arm926ejs -endian $_ENDIAN -chain-position $_TARGETNAME
-$_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x00014000 -work-area-size 0x4000 -work-area-backup 0
 
+# NOTE that work-area-virt presumes a Linux 2.6.30-rc2+ kernel,
+# and that the work area is used only with a kernel mmu context ...
+$_TARGETNAME configure \
+	-work-area-virt [expr 0xfffe0000 + 0x4000] \
+	-work-area-phys [dict get $dm355 sram1] \
+	-work-area-size 0x4000 \
+	-work-area-backup 0
+
 arm7_9 dbgrq enable
 arm7_9 fast_memory_access enable
 arm7_9 dcc_downloads enable

[Openocd-svn] r1880 - trunk/src/target

[<zw...@ma...>]

Author: zwelch
Date: 2009-05-22 04:27:30 +0200 (Fri, 22 May 2009)
New Revision: 1880

Modified:
   trunk/src/target/arm7_9_common.c
   trunk/src/target/arm7_9_common.h
Log:
Submitted by Dean Glazeski <dn...@gm...>:

Add doxygen comments in arm7_9_common source and header files.


Modified: trunk/src/target/arm7_9_common.c
===================================================================
--- trunk/src/target/arm7_9_common.c	2009-05-22 02:25:18 UTC (rev 1879)
+++ trunk/src/target/arm7_9_common.c	2009-05-22 02:27:30 UTC (rev 1880)
@@ -773,6 +773,14 @@
 	return ERROR_OK;
 }
 
+/**
+ * Get some data from the ARM7/9 target.
+ *
+ * @param target Pointer to the ARM7/9 target to read data from
+ * @param size The number of 32bit words to be read
+ * @param buffer Pointer to the buffer that will hold the data
+ * @return The result of receiving data from the Embedded ICE unit
+ */
 int arm7_9_target_request_data(target_t *target, u32 size, u8 *buffer)
 {
 	armv4_5_common_t *armv4_5 = target->arch_info;
@@ -786,6 +794,7 @@
 
 	retval = embeddedice_receive(jtag_info, data, size);
 
+	/* return the 32-bit ints in the 8-bit array */
 	for (i = 0; i < size; i++)
 	{
 		h_u32_to_le(buffer + (i * 4), data[i]);
@@ -796,6 +805,15 @@
 	return retval;
 }
 
+/**
+ * Handles requests to an ARM7/9 target.  If debug messaging is enabled, the
+ * target is running and the DCC control register has the W bit high, this will
+ * execute the request on the target.
+ *
+ * @param priv Void pointer expected to be a target_t pointer
+ * @return ERROR_OK unless there are issues with the JTAG queue or when reading
+ *                  from the Embedded ICE unit
+ */
 int arm7_9_handle_target_request(void *priv)
 {
 	int retval = ERROR_OK;
@@ -838,6 +856,26 @@
 	return ERROR_OK;
 }
 
+/**
+ * Polls an ARM7/9 target for its current status.  If DBGACK is set, the target
+ * is manipulated to the right halted state based on its current state.  This is
+ * what happens:
+ *
+ * <table>
+ * 		<tr><th>State</th><th>Action</th></tr>
+ * 		<tr><td>TARGET_RUNNING | TARGET_RESET</td><td>Enters debug mode.  If TARGET_RESET, pc may be checked</td></tr>
+ * 		<tr><td>TARGET_UNKNOWN</td><td>Warning is logged</td></tr>
+ * 		<tr><td>TARGET_DEBUG_RUNNING</td><td>Enters debug mode</td></tr>
+ * 		<tr><td>TARGET_HALTED</td><td>Nothing</td></tr>
+ * </table>
+ *
+ * If the target does not end up in the halted state, a warning is produced.  If
+ * DBGACK is cleared, then the target is expected to either be running or
+ * running in debug.
+ *
+ * @param target Pointer to the ARM7/9 target to poll
+ * @return ERROR_OK or an error status if a command fails
+ */
 int arm7_9_poll(target_t *target)
 {
 	int retval;
@@ -907,7 +945,7 @@
 		}
 		if (target->state != TARGET_HALTED)
 		{
-			LOG_WARNING("DBGACK set, but the target did not end up in the halted stated %d", target->state);
+			LOG_WARNING("DBGACK set, but the target did not end up in the halted state %d", target->state);
 		}
 	}
 	else
@@ -919,14 +957,17 @@
 	return ERROR_OK;
 }
 
-/*
-  Some -S targets (ARM966E-S in the STR912 isn't affected, ARM926EJ-S
-  in the LPC3180 and AT91SAM9260 is affected) completely stop the JTAG clock
-  while the core is held in reset(SRST). It isn't possible to program the halt
-  condition once reset was asserted, hence a hook that allows the target to set
-  up its reset-halt condition prior to asserting reset.
-*/
-
+/**
+ * Asserts the reset (SRST) on an ARM7/9 target.  Some -S targets (ARM966E-S in
+ * the STR912 isn't affected, ARM926EJ-S in the LPC3180 and AT91SAM9260 is
+ * affected) completely stop the JTAG clock while the core is held in reset
+ * (SRST).  It isn't possible to program the halt condition once reset is
+ * asserted, hence a hook that allows the target to set up its reset-halt
+ * condition is setup prior to asserting reset.
+ *
+ * @param target Pointer to an ARM7/9 target to assert reset on
+ * @return ERROR_FAIL if the JTAG device does not have SRST, otherwise ERROR_OK
+ */
 int arm7_9_assert_reset(target_t *target)
 {
 	armv4_5_common_t *armv4_5 = target->arch_info;
@@ -965,7 +1006,7 @@
 		}
 	}
 
-	/* here we should issue a srst only, but we may have to assert trst as well */
+	/* here we should issue an SRST only, but we may have to assert TRST as well */
 	if (jtag_reset_config & RESET_SRST_PULLS_TRST)
 	{
 		jtag_add_reset(1, 1);
@@ -988,6 +1029,15 @@
 	return ERROR_OK;
 }
 
+/**
+ * Deassert the reset (SRST) signal on an ARM7/9 target.  If SRST pulls TRST
+ * and the target is being reset into a halt, a warning will be triggered
+ * because it is not possible to reset into a halted mode in this case.  The
+ * target is halted using the target's functions.
+ *
+ * @param target Pointer to the target to have the reset deasserted
+ * @return ERROR_OK or an error from polling or halting the target
+ */
 int arm7_9_deassert_reset(target_t *target)
 {
 	int retval=ERROR_OK;
@@ -1018,6 +1068,15 @@
 	return retval;
 }
 
+/**
+ * Clears the halt condition for an ARM7/9 target.  If it isn't coming out of
+ * reset and if DBGRQ is used, it is progammed to be deasserted.  If the reset
+ * vector catch was used, it is restored.  Otherwise, the control value is
+ * restored and the watchpoint unit is restored if it was in use.
+ *
+ * @param target Pointer to the ARM7/9 target to have halt cleared
+ * @return Always ERROR_OK
+ */
 int arm7_9_clear_halt(target_t *target)
 {
 	armv4_5_common_t *armv4_5 = target->arch_info;
@@ -1066,6 +1125,16 @@
 	return ERROR_OK;
 }
 
+/**
+ * Issue a software reset and halt to an ARM7/9 target.  The target is halted
+ * and then there is a wait until the processor shows the halt.  This wait can
+ * timeout and results in an error being returned.  The software reset involves
+ * clearing the halt, updating the debug control register, changing to ARM mode,
+ * reset of the program counter, and reset of all of the registers.
+ *
+ * @param target Pointer to the ARM7/9 target to be reset and halted by software
+ * @return Error status if any of the commands fail, otherwise ERROR_OK
+ */
 int arm7_9_soft_reset_halt(struct target_s *target)
 {
 	armv4_5_common_t *armv4_5 = target->arch_info;
@@ -1163,6 +1232,15 @@
 	return ERROR_OK;
 }
 
+/**
+ * Halt an ARM7/9 target.  This is accomplished by either asserting the DBGRQ
+ * line or by programming a watchpoint to trigger on any address.  It is
+ * considered a bug to call this function while the target is in the
+ * TARGET_RESET state.
+ *
+ * @param target Pointer to the ARM7/9 target to be halted
+ * @return Always ERROR_OK
+ */
 int arm7_9_halt(target_t *target)
 {
 	if (target->state==TARGET_RESET)
@@ -1215,6 +1293,17 @@
 	return ERROR_OK;
 }
 
+/**
+ * Handle an ARM7/9 target's entry into debug mode.  The halt is cleared on the
+ * ARM.  The JTAG queue is then executed and the reason for debug entry is
+ * examined.  Once done, the target is verified to be halted and the processor
+ * is forced into ARM mode.  The core registers are saved for the current core
+ * mode and the program counter (register 15) is updated as needed.  The core
+ * registers and CPSR and SPSR are saved for restoration later.
+ *
+ * @param target Pointer to target that is entering debug mode
+ * @return Error code if anything fails, otherwise ERROR_OK
+ */
 int arm7_9_debug_entry(target_t *target)
 {
 	int i;
@@ -1376,6 +1465,15 @@
 	return ERROR_OK;
 }
 
+/**
+ * Validate the full context for an ARM7/9 target in all processor modes.  If
+ * there are any invalid registers for the target, they will all be read.  This
+ * includes the PSR.
+ *
+ * @param target Pointer to the ARM7/9 target to capture the full context from
+ * @return Error if the target is not halted, has an invalid core mode, or if
+ *         the JTAG queue fails to execute
+ */
 int arm7_9_full_context(target_t *target)
 {
 	int i;
@@ -1457,6 +1555,18 @@
 	return ERROR_OK;
 }
 
+/**
+ * Restore the processor context on an ARM7/9 target.  The full processor
+ * context is analyzed to see if any of the registers are dirty on this end, but
+ * have a valid new value.  If this is the case, the processor is changed to the
+ * appropriate mode and the new register values are written out to the
+ * processor.  If there happens to be a dirty register with an invalid value, an
+ * error will be logged.
+ *
+ * @param target Pointer to the ARM7/9 target to have its context restored
+ * @return Error status if the target is not halted or the core mode in the
+ *         armv4_5 struct is invalid.
+ */
 int arm7_9_restore_context(target_t *target)
 {
 	armv4_5_common_t *armv4_5 = target->arch_info;
@@ -1599,6 +1709,14 @@
 	return ERROR_OK;
 }
 
+/**
+ * Restart the core of an ARM7/9 target.  A RESTART command is sent to the
+ * instruction register and the JTAG state is set to TAP_IDLE causing a core
+ * restart.
+ *
+ * @param target Pointer to the ARM7/9 target to be restarted
+ * @return Result of executing the JTAG queue
+ */
 int arm7_9_restart_core(struct target_s *target)
 {
 	armv4_5_common_t *armv4_5 = target->arch_info;
@@ -1617,6 +1735,12 @@
 	return jtag_execute_queue();
 }
 
+/**
+ * Enable the watchpoints on an ARM7/9 target.  The target's watchpoints are
+ * iterated through and are set on the target if they aren't already set.
+ *
+ * @param target Pointer to the ARM7/9 target to enable watchpoints on
+ */
 void arm7_9_enable_watchpoints(struct target_s *target)
 {
 	watchpoint_t *watchpoint = target->watchpoints;
@@ -1629,6 +1753,12 @@
 	}
 }
 
+/**
+ * Enable the breakpoints on an ARM7/9 target.  The target's breakpoints are
+ * iterated through and are set on the target.
+ *
+ * @param target Pointer to the ARM7/9 target to enable breakpoints on
+ */
 void arm7_9_enable_breakpoints(struct target_s *target)
 {
 	breakpoint_t *breakpoint = target->breakpoints;

Modified: trunk/src/target/arm7_9_common.h
===================================================================
--- trunk/src/target/arm7_9_common.h	2009-05-22 02:25:18 UTC (rev 1879)
+++ trunk/src/target/arm7_9_common.h	2009-05-22 02:27:30 UTC (rev 1880)
@@ -32,52 +32,55 @@
 #include "breakpoints.h"
 #include "etm.h"
 
-#define	ARM7_9_COMMON_MAGIC 0x0a790a79
+#define	ARM7_9_COMMON_MAGIC 0x0a790a79 /**< */
 
+/**
+ * Structure for items that are common between both ARM7 and ARM9 targets.
+ */
 typedef struct arm7_9_common_s
 {
 	u32 common_magic;
 
-	arm_jtag_t jtag_info;
-	reg_cache_t *eice_cache;
+	arm_jtag_t jtag_info; /**< JTAG information for target */
+	reg_cache_t *eice_cache; /**< Embedded ICE register cache */
 
-	u32 arm_bkpt;
-	u16 thumb_bkpt;
-	int sw_breakpoints_added;
-	int breakpoint_count;
-	int wp_available;
-	int wp_available_max;
-	int wp0_used;
-	int wp1_used;
-	int wp1_used_default;
+	u32 arm_bkpt; /**< ARM breakpoint instruction */
+	u16 thumb_bkpt; /**< Thumb breakpoint instruction */
+	int sw_breakpoints_added; /**< Specifies which watchpoint software breakpoints are setup on */
+	int breakpoint_count; /**< Current number of set breakpoints */
+	int wp_available; /**< Current number of available watchpoint units */
+	int wp_available_max; /**< Maximum number of available watchpoint units */
+	int wp0_used; /**< Specifies if and how watchpoint unit 0 is used */
+	int wp1_used; /**< Specifies if and how watchpoint unit 1 is used */
+	int wp1_used_default; /**< Specifies if and how watchpoint unit 1 is used by default */
 	int force_hw_bkpts;
-	int dbgreq_adjust_pc;
-	int use_dbgrq;
-	int need_bypass_before_restart;
+	int dbgreq_adjust_pc; /**< Amount of PC adjustment caused by a DBGREQ */
+	int use_dbgrq; /**< Specifies if DBGRQ should be used to halt the target */
+	int need_bypass_before_restart; /**< Specifies if there should be a bypass before a JTAG restart */
 
 	etm_context_t *etm_ctx;
 
 	int has_single_step;
 	int has_monitor_mode;
-	int has_vector_catch;
+	int has_vector_catch; /**< Specifies if the target has a reset vector catch */
 
-	int debug_entry_from_reset;
+	int debug_entry_from_reset; /**< Specifies if debug entry was from a reset */
 
 	struct working_area_s *dcc_working_area;
 
 	int fast_memory_access;
 	int dcc_downloads;
 
-	int (*examine_debug_reason)(target_t *target);
+	int (*examine_debug_reason)(target_t *target); /**< Function for determining why debug state was entered */
 
-	void (*change_to_arm)(target_t *target, u32 *r0, u32 *pc);
+	void (*change_to_arm)(target_t *target, u32 *r0, u32 *pc); /**< Function for changing from Thumb to ARM mode */
 
-	void (*read_core_regs)(target_t *target, u32 mask, u32 *core_regs[16]);
+	void (*read_core_regs)(target_t *target, u32 mask, u32 *core_regs[16]); /**< Function for reading the core registers */
 	void (*read_core_regs_target_buffer)(target_t *target, u32 mask, void *buffer, int size);
-	void (*read_xpsr)(target_t *target, u32 *xpsr, int spsr);
+	void (*read_xpsr)(target_t *target, u32 *xpsr, int spsr); /**< Function for reading CPSR or SPSR */
 
-	void (*write_xpsr)(target_t *target, u32 xpsr, int spsr);
-	void (*write_xpsr_im8)(target_t *target, u8 xpsr_im, int rot, int spsr);
+	void (*write_xpsr)(target_t *target, u32 xpsr, int spsr); /**< Function for writing to CPSR or SPSR */
+	void (*write_xpsr_im8)(target_t *target, u8 xpsr_im, int rot, int spsr); /**< Function for writing an immediate value to CPSR or SPSR */
 	void (*write_core_regs)(target_t *target, u32 mask, u32 core_regs[16]);
 
 	void (*load_word_regs)(target_t *target, u32 mask);
@@ -88,20 +91,20 @@
 	void (*store_hword_reg)(target_t *target, int num);
 	void (*store_byte_reg)(target_t *target, int num);
 
-	void (*write_pc)(target_t *target, u32 pc);
+	void (*write_pc)(target_t *target, u32 pc); /**< Function for writing to the program counter */
 	void (*branch_resume)(target_t *target);
 	void (*branch_resume_thumb)(target_t *target);
 
 	void (*enable_single_step)(target_t *target, u32 next_pc);
 	void (*disable_single_step)(target_t *target);
 
-	void (*set_special_dbgrq)(target_t *target);
+	void (*set_special_dbgrq)(target_t *target); /**< Function for setting DBGRQ if the normal way won't work */
 
-	void (*pre_debug_entry)(target_t *target);
-	void (*post_debug_entry)(target_t *target);
+	void (*pre_debug_entry)(target_t *target); /**< Callback function called before entering debug mode */
+	void (*post_debug_entry)(target_t *target); /**< Callback function called after entering debug mode */
 
-	void (*pre_restore_context)(target_t *target);
-	void (*post_restore_context)(target_t *target);
+	void (*pre_restore_context)(target_t *target); /**< Callback function called before restoring the processor context */
+	void (*post_restore_context)(target_t *target); /**< Callback function called after restoring the processor context */
 
 	armv4_5_common_t armv4_5_common;
 	void *arch_info;

[Openocd-svn] r1879 - trunk/doc

[<zw...@ma...>]

Author: zwelch
Date: 2009-05-22 04:25:18 +0200 (Fri, 22 May 2009)
New Revision: 1879

Modified:
   trunk/doc/openocd.texi
Log:
Submitted by David Brownell <da...@pa...>:

Add a "NAND Commands" section to to the TEXI docs, covering the basic
commands except for those previously discussed as being due for removal
("nand copy") or switching to use byte offsets not block numbers.

This uses the "@deffn..." syntax for defining commands, as somewhat
suggested by the TEXI documentation, and adds a new "Command Index".
We might prefer to merge those indexes for the near term, but I think
the "@deffn" approch is probably worth switching to.

Updates a few other bits to clarify that "flash" doesn't just mean NOR.  
And to fix one niggling falsity:  the "reset-init" event *is* used, and
in fact it's quite important.


Modified: trunk/doc/openocd.texi
===================================================================
--- trunk/doc/openocd.texi	2009-05-21 17:44:04 UTC (rev 1878)
+++ trunk/doc/openocd.texi	2009-05-22 02:25:18 UTC (rev 1879)
@@ -65,6 +65,7 @@
 * Tap Creation::                     Tap Creation
 * Target Configuration::             Target Configuration
 * Flash Configuration::              Flash Configuration
+* NAND Flash Commands::              NAND Flash Commands
 * General Commands::                 General Commands
 * JTAG Commands::                    JTAG Commands
 * Sample Scripts::                   Sample Target Scripts
@@ -80,7 +81,8 @@
 @comment case issue with ``Index.html'' and ``index.html''
 @comment Occurs when creating ``--html --no-split'' output
 @comment This fix is based on: http://sourceware.org/ml/binutils/2006-05/msg00215.html
-* OpenOCD Index::                    Main Index
+* OpenOCD Concept Index::            Concept Index
+* OpenOCD Command Index::            Command Index
 @end menu
 
 @node About
@@ -104,10 +106,10 @@
 debugged via the GDB protocol.
 
 @b{Flash Programing:} Flash writing is supported for external CFI
-compatible flashes (Intel and AMD/Spansion command set) and several
+compatible NOR flashes (Intel and AMD/Spansion command set) and several
 internal flashes (LPC2000, AT91SAM7, STR7x, STR9x, LM3, and
-STM32x). Preliminary support for using the LPC3180's NAND flash
-controller is included.
+STM32x). Preliminary support for various NAND flash controllers
+(LPC3180, Orion, S3C24xx, more) controller is included.
 
 @node Developers
 @chapter Developers
@@ -812,7 +814,7 @@
 In summary the board files should contain (if present)
 
 @enumerate
-@item External flash configuration (i.e.: the flash on CS0)
+@item External flash configuration (i.e.: NOR flash on CS0, two NANDs on CS2)
 @item SDRAM configuration (size, speed, etc.
 @item Board specific IO configuration (i.e.: GPIO pins might disable a 2nd flash)
 @item Multiple TARGET source statements
@@ -1077,8 +1079,8 @@
 This applies @b{ONLY TO MICROCONTROLLERS} that have flash built in.
 
 @b{Never ever} in the ``target configuration file'' define any type of
-flash that is external to the chip. (For example the BOOT flash on
-Chip Select 0). The BOOT flash information goes in a board file - not
+flash that is external to the chip. (For example a BOOT flash on
+Chip Select 0.) Such flash information goes in a board file - not
 the TARGET (chip) file.
 
 Examples:
@@ -1148,7 +1150,7 @@
 openocd.cfg file to force OpenOCD to ``initialize'' and make the
 targets ready. For example: If your openocd.cfg file needs to
 read/write memory on your target - the init command must occur before
-the memory read/write commands.
+the memory read/write commands.  This includes @command{nand probe}.
 
 @section TCP/IP Ports
 @itemize @bullet
@@ -1585,7 +1587,8 @@
 Tap Uses:
 @itemize @bullet
 @item @b{Debug Target} A tap can be used by a GDB debug target
-@item @b{Flash Programing} Some chips program the flash via JTAG
+@item @b{Flash Programing} Some chips program the flash directly via JTAG,
+instead of indirectly by making a CPU do it.
 @item @b{Boundry Scan} Some chips support boundary scan.
 @end itemize
 
@@ -2003,7 +2006,10 @@
 @item @b{reset-halt-pre}
 @* Currently not used
 @item @b{reset-init}
-@* Currently not used
+@* Used by @b{reset init} command for board-specific initialization.
+This is where you would configure PLLs and clocking, set up DRAM so
+you can download programs that don't fit in on-chip SRAM, set up pin
+multiplexing, and so on.
 @item @b{reset-start}
 @* Currently not used
 @item @b{reset-wait-pos}
@@ -2158,6 +2164,16 @@
 @chapter Flash programming
 @cindex Flash Configuration
 
+OpenOCD has different commands for NOR and NAND flash;
+the ``flash'' command works with NOR flash, while
+the ``nand'' command works with NAND flash.
+This partially reflects different hardware technologies:
+NOR flash usually supports direct CPU instruction and data bus access,
+while data from a NAND flash must be copied to memory before it can be
+used.  (SPI flash must also be copied to memory before use.)
+However, the documentation also uses ``flash'' as a generic term;
+for example, ``Put flash configuration in board-specific files''.
+
 @b{Note:} As of 28/nov/2008 OpenOCD does not know how to program a SPI
 flash that a micro may boot from. Perhaps you, the reader, would like to
 contribute support for this.
@@ -2525,6 +2541,286 @@
 @*mass erase flash memory. 
 @end itemize
 
+@node NAND Flash Commands
+@chapter NAND Flash Commands
+@cindex NAND
+
+Compared to NOR or SPI flash, NAND devices are inexpensive
+and high density.  Today's NAND chips, and multi-chip modules,
+commonly hold multiple GigaBytes of data.
+
+NAND chips consist of a number of ``erase blocks'' of a given
+size (such as 128 KBytes), each of which is divided into a
+number of pages (of perhaps 512 or 2048 bytes each).  Each
+page of a NAND flash has an ``out of band'' (OOB) area to hold
+Error Correcting Code (ECC) and other metadata, usually 16 bytes
+of OOB for every 512 bytes of page data.
+
+One key characteristic of NAND flash is that its error rate
+is higher than that of NOR flash.  In normal operation, that
+ECC is used to correct and detect errors.  However, NAND
+blocks can also wear out and become unusable; those blocks
+are then marked "bad".  NAND chips are even shipped from the
+manufacturer with a few bad blocks.  The highest density chips
+use a technology (MLC) that wears out more quickly, so ECC
+support is increasingly important as a way to detect blocks
+that have begun to fail, and help to preserve data integrity
+with techniques such as wear leveling.
+
+Software is used to manage the ECC.  Some controllers don't
+support ECC directly; in those cases, software ECC is used.
+Other controllers speed up the ECC calculations with hardware.
+Single-bit error correction hardware is routine.  Controllers
+geared for newer MLC chips may correct 4 or more errors for
+every 512 bytes of data.
+
+You will need to make sure that any data you write using
+OpenOCD includes the apppropriate kind of ECC.  For example,
+that may mean passing the @code{oob_softecc} flag when
+writing NAND data, or ensuring that the correct hardware
+ECC mode is used.
+
+The basic steps for using NAND devices include:
+@enumerate
+@item Declare via the command @command{nand device}
+@* Do this in a board-specific configuration file,
+passing parameters as needed by the controller.
+@item Configure each device using @command{nand probe}.
+@* Do this only after the associated target is set up,
+such as in its reset-init script or in procures defined
+to access that device.
+@item Operate on the flash via @command{nand subcommand}
+@* Often commands to manipulate the flash are typed by a human, or run
+via a script in some automated way.  Common task include writing a
+boot loader, operating system, or other data needed to initialize or
+de-brick a board.
+@end enumerate
+
+@section NAND Configuration Commands
+@cindex NAND configuration
+
+NAND chips must be declared in configuration scripts,
+plus some additional configuration that's done after
+OpenOCD has initialized.
+
+@deffn {Config Command} {nand device} controller target [configparams...]
+Declares a NAND device, which can be read and written to
+after it has been configured through @command{nand probe}.
+In OpenOCD, devices are single chips; this is unlike some
+operating systems, which may manage multiple chips as if
+they were a single (larger) device.
+In some cases, configuring a device will activate extra
+commands; see the controller-specific documentation.
+
+@b{NOTE:} This command is not available after OpenOCD
+initialization has completed.  Use it in board specific
+configuration files, not interactively.
+
+@itemize @bullet
+@item @var{controller} ... identifies a the controller driver
+associated with the NAND device being declared.
+@xref{NAND Driver List}.
+@item @var{target} ... names the target used when issuing
+commands to the NAND controller.
+@comment Actually, it's currently a controller-specific parameter...
+@item @var{configparams} ... controllers may support, or require,
+additional parameters.  See the controller-specific documentation
+for more information.
+@end itemize
+@end deffn
+
+@deffn Command {nand list}
+Prints a one-line summary of each device declared
+using @command{nand device}, numbered from zero.
+Note that un-probed devices show no details.
+@end deffn
+
+@deffn Command {nand probe} num
+Probes the specified device to determine key characteristics
+like its page and block sizes, and how many blocks it has.
+The @var{num} parameter is the value shown by @command{nand list}.
+You must (successfully) probe a device before you can use
+it with most other NAND commands.
+@end deffn
+
+@section Erasing, Reading, Writing to NAND Flash
+
+@deffn Command {nand dump} num filename offset length [oob_option]
+@cindex NAND reading
+Reads binary data from the NAND device and writes it to the file,
+starting at the specified offset.
+The @var{num} parameter is the value shown by @command{nand list}.
+
+Use a complete path name for @var{filename}, so you don't depend
+on the directory used to start the OpenOCD server.
+
+The @var{offset} and @var{length} must be exact multiples of the
+device's page size.  They describe a data region; the OOB data
+associated with each such page may also be accessed.
+
+@b{NOTE:} At the time this text was written, no error correction
+was done on the data that's read, unless raw access was disabled
+and the underlying NAND controller driver had a @code{read_page}
+method which handled that error correction.
+
+By default, only page data is saved to the specified file.
+Use an @var{oob_option} parameter to save OOB data:
+@itemize @bullet
+@item no oob_* parameter
+@*Output file holds only page data; OOB is discarded.
+@item @code{oob_raw}
+@*Output file interleaves page data and OOB data;
+the file will be longer than "length" by the size of the
+spare areas associated with each data page.
+Note that this kind of "raw" access is different from
+what's implied by @command{nand raw_access}, which just
+controls whether a hardware-aware access method is used.
+@item @code{oob_only}
+@*Output file has only raw OOB data, and will
+be smaller than "length" since it will contain only the
+spare areas associated with each data page.
+@end itemize
+@end deffn
+
+@deffn Command {nand erase} num ...
+@cindex NAND erasing
+@b{NOTE:} Syntax is in flux.
+@end deffn
+
+@deffn Command {nand write} num filename offset [option...]
+@cindex NAND writing
+Writes binary data from the file into the specified NAND device,
+starting at the specified offset.  Those pages should already
+have been erased; you can't change zero bits to one bits.
+The @var{num} parameter is the value shown by @command{nand list}.
+
+Use a complete path name for @var{filename}, so you don't depend
+on the directory used to start the OpenOCD server.
+
+The @var{offset} must be an exact multiple of the device's page size.
+All data in the file will be written, assuming it doesn't run
+past the end of the device.
+Only full pages are written, and any extra space in the last
+page will be filled with 0xff bytes.  (That includes OOB data,
+if that's being written.)
+
+@b{NOTE:} At the time this text was written, bad blocks are
+ignored.  That is, this routine will not skip bad blocks,
+but will instead try to write them.  This can cause problems.
+
+Provide at most one @var{option} parameter.  With some
+NAND drivers, the meanings of these parameters may change
+if @command{nand raw_access} was used to disable hardware ECC.
+@itemize @bullet
+@item no oob_* parameter
+@*File has only page data, which is written.
+If raw acccess is in use, the OOB area will not be written.
+Otherwise, if the underlying NAND controller driver has
+a @code{write_page} routine, that routine may write the OOB
+with hardware-computed ECC data.
+@item @code{oob_only}
+@*File has only raw OOB data, which is written to the OOB area.
+Each page's data area stays untouched.  @i{This can be a dangerous
+option}, since it can invalidate the ECC data.
+You may need to force raw access to use this mode.
+@item @code{oob_raw}
+@*File interleaves data and OOB data, both of which are written
+If raw access is enabled, the data is written first, then the
+un-altered OOB.
+Otherwise, if the underlying NAND controller driver has
+a @code{write_page} routine, that routine may modify the OOB
+before it's written, to include hardware-computed ECC data.
+@item @code{oob_softecc}
+@*File has only page data, which is written.
+The OOB area is filled with 0xff, except for a standard 1-bit
+software ECC code stored in conventional locations.
+You might need to force raw access to use this mode, to prevent
+the underlying driver from applying hardware ECC.
+@item @code{oob_softecc_kw}
+@*File has only page data, which is written.
+The OOB area is filled with 0xff, except for a 4-bit software ECC
+specific to the boot ROM in Marvell Kirkwood SoCs.
+You might need to force raw access to use this mode, to prevent
+the underlying driver from applying hardware ECC.
+@end itemize
+@end deffn
+
+@section Other NAND commands
+@cindex NAND other commands
+
+@deffn Command {nand check_bad} num ...
+@b{NOTE:} Syntax is in flux.
+@end deffn
+
+@deffn Command {nand info} num
+The @var{num} parameter is the value shown by @command{nand list}.
+This prints the one-line summary from "nand list", plus for
+devices which have been probed this also prints any known
+status for each block.
+@end deffn
+
+@deffn Command {nand raw_access} num <enable|disable>
+Sets or clears an flag affecting how page I/O is done.
+The @var{num} parameter is the value shown by @command{nand list}.
+
+This flag is cleared (disabled) by default, but changing that
+value won't affect all NAND devices.  The key factor is whether
+the underlying driver provides @code{read_page} or @code{write_page}
+methods.  If it doesn't provide those methods, the setting of
+this flag is irrelevant; all access is effectively ``raw''.
+
+When those methods exist, they are normally used when reading
+data (@command{nand dump} or reading bad block markers) or
+writing it (@command{nand write}).  However, enabling
+raw access (setting the flag) prevents use of those methods,
+bypassing hardware ECC logic.
+@i{This can be a dangerous option}, since writing blocks
+with the wrong ECC data can cause them to be marked as bad.
+@end deffn
+
+@section NAND Drivers; Driver-specific Options and Commands
+@anchor{NAND Driver List}
+As noted above, the @command{nand device} command allows
+driver-specific options and behaviors.
+Some controllers also activate controller-specific commands.
+
+@deffn {NAND Driver} lpc3180
+These controllers require an extra @command{nand device}
+parameter:  the clock rate used by the controller.
+@deffn Command {nand lpc3180 select} num [mlc|slc]
+Configures use of the MLC or SLC controller mode.
+MLC implies use of hardware ECC.
+The @var{num} parameter is the value shown by @command{nand list}.
+@end deffn
+
+At this writing, this driver includes @code{write_page}
+and @code{read_page} methods.  Using @command{nand raw_access}
+to disable those methods will prevent use of hardware ECC
+in the MLC controller mode, but won't change SLC behavior.
+@end deffn
+@comment current lpc3180 code won't issue 5-byte address cycles
+
+@deffn {NAND Driver} orion
+These controllers require an extra @command{nand device}
+parameter:  the address of the controller.
+@example
+nand device orion 0xd8000000
+@end example
+These controllers don't define any specialized commands.
+At this writing, their drivers don't include @code{write_page}
+or @code{read_page} methods, so @command{nand raw_access} won't
+change any behavior.
+@end deffn
+
+@deffn {NAND Driver} {s3c2410, s3c2412, s3c2440, s3c2443}
+These S3C24xx family controllers don't have any special
+@command{nand device} options, and don't define any
+specialized commands.
+At this writing, their drivers don't include @code{write_page}
+or @code{read_page} methods, so @command{nand raw_access} won't
+change any behavior.
+@end deffn
+
 @node General Commands
 @chapter General Commands
 @cindex commands
@@ -3530,6 +3826,11 @@
 
 You can use the ``scan_chain'' command to verify and display the tap order.
 
+Also, some commands can't execute until after @command{init} has been
+processed.  Such commands include @command{nand probe} and everything
+else that needs to write to controller registers, perhaps for setting
+up DRAM and loading it with code.
+
 @item @b{JTAG Tap Order} JTAG tap order - command order
 
 Many newer devices have multiple JTAG taps. For example: ST
@@ -3956,13 +4257,17 @@
 
 @include fdl.texi
 
-@node OpenOCD Index
+@node OpenOCD Concept Index
 @comment DO NOT use the plain word ``Index'', reason: CYGWIN filename
 @comment case issue with ``Index.html'' and ``index.html''
 @comment Occurs when creating ``--html --no-split'' output
 @comment This fix is based on: http://sourceware.org/ml/binutils/2006-05/msg00215.html
-@unnumbered OpenOCD Index
+@unnumbered OpenOCD Concept Index
 
 @printindex cp
 
+@node OpenOCD Command Index
+@unnumbered OpenOCD Command Index
+@printindex fn
+
 @bye

[Openocd-svn] r1878 - trunk/src/helper

[<oh...@ma...>]

Author: oharboe
Date: 2009-05-21 19:44:04 +0200 (Thu, 21 May 2009)
New Revision: 1878

Modified:
   trunk/src/helper/ioutil.c
Log:
delete unused code

Modified: trunk/src/helper/ioutil.c
===================================================================
--- trunk/src/helper/ioutil.c	2009-05-21 17:42:19 UTC (rev 1877)
+++ trunk/src/helper/ioutil.c	2009-05-21 17:44:04 UTC (rev 1878)
@@ -492,32 +492,6 @@
 	return JIM_OK;
 }
 
-int handle_peek_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
-{
-	if (argc != 1)
-	{
-		return ERROR_COMMAND_SYNTAX_ERROR;
-	}
-	unsigned long addr = strtoul(args[0], NULL, 0);
-	volatile unsigned *address = (volatile unsigned *)addr;
-	unsigned value = *address;
-	command_print(cmd_ctx, "0x%p : 0x%x", address, (int)value);
-	return ERROR_OK;
-}
-
-int handle_poke_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
-{
-	if (argc != 2)
-	{
-		return ERROR_INVALID_ARGUMENTS;
-	}
-	unsigned long addr = strtoul(args[0], NULL, 0);
-	volatile int *address = (volatile int *)addr;
-	int value=strtoul(args[1], NULL, 0);
-	*address=value;
-	return ERROR_OK;
-}
-
 static int
 zylinjtag_Jim_Command_peek(Jim_Interp *interp,
                                    int argc,

[Openocd-svn] r1877 - trunk/src/helper

[<oh...@ma...>]

Author: oharboe
Date: 2009-05-21 19:42:19 +0200 (Thu, 21 May 2009)
New Revision: 1877

Modified:
   trunk/src/helper/ioutil.c
Log:
fix warning. Use %p for pointers

Modified: trunk/src/helper/ioutil.c
===================================================================
--- trunk/src/helper/ioutil.c	2009-05-21 17:20:05 UTC (rev 1876)
+++ trunk/src/helper/ioutil.c	2009-05-21 17:42:19 UTC (rev 1877)
@@ -501,7 +501,7 @@
 	unsigned long addr = strtoul(args[0], NULL, 0);
 	volatile unsigned *address = (volatile unsigned *)addr;
 	unsigned value = *address;
-	command_print(cmd_ctx, "0x%x : 0x%x", (intptr_t)address, value);
+	command_print(cmd_ctx, "0x%p : 0x%x", address, (int)value);
 	return ERROR_OK;
 }
 

[Openocd-svn] r1876 - trunk/src/jtag

[kc8apf at B. <kc...@ma...>]

Author: kc8apf
Date: 2009-05-21 19:20:05 +0200 (Thu, 21 May 2009)
New Revision: 1876

Modified:
   trunk/src/jtag/jtag.c
Log:
Author: Michael Bruck <mb...@di...>
    -jtag.c, interface_jtag_add_ir_scan() [2/2] (version without goto):
    	- change 'found' to bool
    	- add comments on loops



Modified: trunk/src/jtag/jtag.c
===================================================================
--- trunk/src/jtag/jtag.c	2009-05-21 16:15:41 UTC (rev 1875)
+++ trunk/src/jtag/jtag.c	2009-05-21 17:20:05 UTC (rev 1876)
@@ -641,15 +641,19 @@
 
 	for (jtag_tap_t * tap = jtag_NextEnabledTap(NULL); tap != NULL; tap = jtag_NextEnabledTap(tap))
 	{
-		int found = 0;
+		/* search the input field list for fields for the current TAP */
 
+		bool found = false;
+
 		for (int j = 0; j < in_num_fields; j++)
 		{
 			if (tap != in_fields[j].tap)
 				continue;
 
-			found = 1;
+			/* if TAP is listed in input fields, copy the value */
 
+			found = true;
+
 			tap->bypass = 0;
 
 			assert(in_fields[j].num_bits == tap->ir_length); /* input fields must have the same length as the TAP's IR */
@@ -662,6 +666,7 @@
 		if (!found)
 		{
 			/* if a TAP isn't listed in input fields, set it to BYPASS */
+
 			tap->bypass = 1;
 
 			field->tap			= tap;

[Openocd-svn] r1875 - in trunk/src/target: board target

[<oh...@ma...>]

Author: oharboe
Date: 2009-05-21 18:15:41 +0200 (Thu, 21 May 2009)
New Revision: 1875

Modified:
   trunk/src/target/board/ti_beagleboard.cfg
   trunk/src/target/target/omap3530.cfg
Log:
Dirk Behme <dir...@go...> Minor updates for OMAP3 scripts

Modified: trunk/src/target/board/ti_beagleboard.cfg
===================================================================
--- trunk/src/target/board/ti_beagleboard.cfg	2009-05-21 09:49:19 UTC (rev 1874)
+++ trunk/src/target/board/ti_beagleboard.cfg	2009-05-21 16:15:41 UTC (rev 1875)
@@ -9,3 +9,6 @@
 
 endstate RUN/IDLE
 
+init
+
+omap3_dbginit

Modified: trunk/src/target/target/omap3530.cfg
===================================================================
--- trunk/src/target/target/omap3530.cfg	2009-05-21 09:49:19 UTC (rev 1874)
+++ trunk/src/target/target/omap3530.cfg	2009-05-21 16:15:41 UTC (rev 1875)
@@ -27,6 +27,8 @@
 jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0x0 -expected-id $_CPUTAPID -disable
 jtag newtap $_CHIPNAME jrc -irlen 6 -ircapture 0x1 -irmask 0xf -expected-id 0x0b7ae02f
 
+target create omap3.cpu cortex_m3 -endian little -chain-position omap3.cpu
+
 jtag configure $_CHIPNAME.cpu -event tap-enable {
 	puts "Enabling Cortex-A8 @ OMAP3"
 	irscan omap3.jrc 7 -endstate IRPAUSE
@@ -38,3 +40,18 @@
 	puts "Cortex-A8 @ OMAP3 enabled"
 }
 
+proc omap3_dbginit { } {
+     version
+     jtag tapenable omap3.cpu
+     targets
+     # sleep 1000
+     # dap apsel 1
+     # sleep 1000
+     # dap apsel 1
+     # dap info 1
+     omap3.cpu mww 0x54011FB0 0xC5ACCE55 4
+     omap3.cpu mdw 0x54011314
+     omap3.cpu mdw 0x54011314
+     # omap3.cpu mdw 0x54011080
+     omap3.cpu mww 0x5401d030 0x00002000 4
+}

[Openocd-svn] r1874 - trunk/src/helper

[<zw...@ma...>]

Author: zwelch
Date: 2009-05-21 11:49:19 +0200 (Thu, 21 May 2009)
New Revision: 1874

Modified:
   trunk/src/helper/ioutil.c
Log:
Additional format warning fixes in ioutil, required by r1873 changes.

Modified: trunk/src/helper/ioutil.c
===================================================================
--- trunk/src/helper/ioutil.c	2009-05-21 09:28:57 UTC (rev 1873)
+++ trunk/src/helper/ioutil.c	2009-05-21 09:49:19 UTC (rev 1874)
@@ -155,7 +155,7 @@
 	int retval = loadFile(args[0], &data, &len);
 	if (retval == ERROR_OK)
 	{
-		command_print(cmd_ctx, "%s", data);
+		command_print(cmd_ctx, "%s", (char *)data);
 		free(data);
 	}
 	else
@@ -501,7 +501,7 @@
 	unsigned long addr = strtoul(args[0], NULL, 0);
 	volatile unsigned *address = (volatile unsigned *)addr;
 	unsigned value = *address;
-	command_print(cmd_ctx, "0x%x : 0x%x", address, value);
+	command_print(cmd_ctx, "0x%x : 0x%x", (intptr_t)address, value);
 	return ERROR_OK;
 }
 

[Openocd-svn] r1873 - in trunk/src: flash helper pld svf target

[<zw...@ma...>]

Author: zwelch
Date: 2009-05-21 11:28:57 +0200 (Thu, 21 May 2009)
New Revision: 1873

Modified:
   trunk/src/flash/flash.c
   trunk/src/flash/nand.c
   trunk/src/helper/command.h
   trunk/src/pld/pld.c
   trunk/src/svf/svf.c
   trunk/src/target/armv4_5.c
   trunk/src/target/armv4_5_mmu.c
   trunk/src/target/etm.c
   trunk/src/target/target.c
   trunk/src/target/trace.c
Log:
David Brownell <da...@pa...>:  This patch adds annotations to
the key command_*() helper functions, fixng the bugs that turned up.

Several of these bugs were from misuse of PRIi64; that's for 64-bit
integers, NOT for "long long" or "u64" (which work best with %lld).


Modified: trunk/src/flash/flash.c
===================================================================
--- trunk/src/flash/flash.c	2009-05-21 05:46:29 UTC (rev 1872)
+++ trunk/src/flash/flash.c	2009-05-21 09:28:57 UTC (rev 1873)
@@ -432,7 +432,7 @@
 		int j;
 		if ((retval = p->driver->erase_check(p)) == ERROR_OK)
 		{
-			command_print(cmd_ctx, "successfully checked erase state", p->driver->name, p->base);
+			command_print(cmd_ctx, "successfully checked erase state");
 		}
 		else
 		{
@@ -567,7 +567,8 @@
 				return retval;
 			}
 
-			command_print(cmd_ctx, "erased sectors %i through %i on flash bank %i in %s", first, last, strtoul(args[0], 0, 0), duration_text);
+			command_print(cmd_ctx, "erased sectors %i through %i on flash bank %li in %s",
+				first, last, strtoul(args[0], 0, 0), duration_text);
 			free(duration_text);
 		}
 	}
@@ -606,7 +607,9 @@
 		retval = flash_driver_protect(p, set, first, last);
 		if (retval == ERROR_OK)
 		{
-			command_print(cmd_ctx, "%s protection for sectors %i through %i on flash bank %i", (set) ? "set" : "cleared", first, last, strtoul(args[0], 0, 0));
+			command_print(cmd_ctx, "%s protection for sectors %i through %i on flash bank %li",
+				(set) ? "set" : "cleared", first,
+				last, strtoul(args[0], 0, 0));
 		}
 	}
 	else
@@ -873,7 +876,7 @@
 	}
 	if (retval==ERROR_OK)
 	{
-	command_print(cmd_ctx, "wrote  %"PRIi64" byte from file %s to flash bank %i at offset 0x%8.8x in %s (%f kb/s)",
+	command_print(cmd_ctx, "wrote  %lld byte from file %s to flash bank %li at offset 0x%8.8x in %s (%f kb/s)",
 		fileio.size, args[1], strtoul(args[0], NULL, 0), offset, duration_text,
 		(float)fileio.size / 1024.0 / ((float)duration.duration.tv_sec + ((float)duration.duration.tv_usec / 1000000.0)));
 	}

Modified: trunk/src/flash/nand.c
===================================================================
--- trunk/src/flash/nand.c	2009-05-21 05:46:29 UTC (rev 1872)
+++ trunk/src/flash/nand.c	2009-05-21 09:28:57 UTC (rev 1873)
@@ -1148,7 +1148,7 @@
 		}
 		else
 		{
-			command_print(cmd_ctx, "#%i: not probed");
+			command_print(cmd_ctx, "#%s: not probed", args[0]);
 		}
 	}
 
@@ -1251,7 +1251,7 @@
 	{
 		if ((retval = nand_build_bbt(p, first, last)) == ERROR_OK)
 		{
-			command_print(cmd_ctx, "checked NAND flash device for bad blocks, use \"nand info\" command to list blocks", p->device->name);
+			command_print(cmd_ctx, "checked NAND flash device for bad blocks, use \"nand info\" command to list blocks");
 		}
 		else if (retval == ERROR_NAND_OPERATION_FAILED)
 		{
@@ -1570,13 +1570,13 @@
 			fileio_close(&fileio);
 
 			duration_stop_measure(&duration, &duration_text);
-			command_print(cmd_ctx, "dumped %"PRIi64" byte in %s", fileio.size, duration_text);
+			command_print(cmd_ctx, "dumped %lld byte in %s", fileio.size, duration_text);
 			free(duration_text);
 			duration_text = NULL;
 		}
 		else
 		{
-			command_print(cmd_ctx, "#%i: not probed");
+			command_print(cmd_ctx, "#%s: not probed", args[0]);
 		}
 	}
 	else
@@ -1621,7 +1621,7 @@
 		}
 		else
 		{
-			command_print(cmd_ctx, "#%i: not probed");
+			command_print(cmd_ctx, "#%s: not probed", args[0]);
 		}
 	}
 	else

Modified: trunk/src/helper/command.h
===================================================================
--- trunk/src/helper/command.h	2009-05-21 05:46:29 UTC (rev 1872)
+++ trunk/src/helper/command.h	2009-05-21 09:28:57 UTC (rev 1873)
@@ -83,10 +83,14 @@
 extern int command_context_mode(command_context_t *context, enum command_mode mode);
 extern command_context_t* command_init(void);
 extern int command_done(command_context_t *context);
-extern void command_print(command_context_t *context, char *format, ...);
-extern void command_print_sameline(command_context_t *context, char *format, ...);
+
+extern void command_print(command_context_t *context, char *format, ...)
+		__attribute__ ((format (printf, 2, 3)));
+extern void command_print_sameline(command_context_t *context, char *format, ...)
+		__attribute__ ((format (printf, 2, 3)));
 extern int command_run_line(command_context_t *context, char *line);
-extern int command_run_linef(command_context_t *context, char *format, ...);
+extern int command_run_linef(command_context_t *context, char *format, ...)
+		__attribute__ ((format (printf, 2, 3)));
 extern void command_output_text(command_context_t *context, const char *data);
 
 extern void process_jim_events(void);

Modified: trunk/src/pld/pld.c
===================================================================
--- trunk/src/pld/pld.c	2009-05-21 05:46:29 UTC (rev 1872)
+++ trunk/src/pld/pld.c	2009-05-21 09:28:57 UTC (rev 1873)
@@ -178,7 +178,7 @@
 	
 	if ((retval = p->driver->load(p, args[1])) != ERROR_OK)
 	{
-		command_print(cmd_ctx, "failed loading file %s to pld device %i",
+		command_print(cmd_ctx, "failed loading file %s to pld device %lu",
 			args[1], strtoul(args[0], NULL, 0));
 		switch (retval)
 		{
@@ -188,9 +188,10 @@
 	{
 		gettimeofday(&end, NULL);	
 		timeval_subtract(&duration, &end, &start);
-		
-		command_print(cmd_ctx, "loaded file %s to pld device %i in %is %ius", 
-			args[1], strtoul(args[0], NULL, 0), duration.tv_sec, duration.tv_usec);
+
+		command_print(cmd_ctx, "loaded file %s to pld device %lu in %lis %lius",
+			args[1], strtoul(args[0], NULL, 0),
+			duration.tv_sec, duration.tv_usec);
 	}
 	
 	return ERROR_OK;

Modified: trunk/src/svf/svf.c
===================================================================
--- trunk/src/svf/svf.c	2009-05-21 05:46:29 UTC (rev 1872)
+++ trunk/src/svf/svf.c	2009-05-21 09:28:57 UTC (rev 1873)
@@ -330,7 +330,7 @@
 	}
 
 	// print time
-	command_print(cmd_ctx, "%d ms used", timeval_ms() - time_ago);
+	command_print(cmd_ctx, "%lld ms used", timeval_ms() - time_ago);
 
 free_all:
 

Modified: trunk/src/target/armv4_5.c
===================================================================
--- trunk/src/target/armv4_5.c	2009-05-21 05:46:29 UTC (rev 1872)
+++ trunk/src/target/armv4_5.c	2009-05-21 09:28:57 UTC (rev 1873)
@@ -342,7 +342,7 @@
 			output_len += snprintf(output + output_len, 128 - output_len, "%8s: %8.8x ", ARMV4_5_CORE_REG_MODENUM(armv4_5->core_cache, mode, num).name,
 				buf_get_u32(ARMV4_5_CORE_REG_MODENUM(armv4_5->core_cache, mode, num).value, 0, 32));
 		}
-		command_print(cmd_ctx, output);
+		command_print(cmd_ctx, "%s", output);
 	}
 	command_print(cmd_ctx, "    cpsr: %8.8x spsr_fiq: %8.8x spsr_irq: %8.8x spsr_svc: %8.8x spsr_abt: %8.8x spsr_und: %8.8x",
 			  buf_get_u32(armv4_5->core_cache->reg_list[ARMV4_5_CPSR].value, 0, 32),

Modified: trunk/src/target/armv4_5_mmu.c
===================================================================
--- trunk/src/target/armv4_5_mmu.c	2009-05-21 05:46:29 UTC (rev 1872)
+++ trunk/src/target/armv4_5_mmu.c	2009-05-21 09:28:57 UTC (rev 1873)
@@ -299,7 +299,7 @@
 
 		if ((i % 8 == 7) || (i == count - 1))
 		{
-			command_print(cmd_ctx, output);
+			command_print(cmd_ctx, "%s", output);
 			output_len = 0;
 		}
 	}

Modified: trunk/src/target/etm.c
===================================================================
--- trunk/src/target/etm.c	2009-05-21 05:46:29 UTC (rev 1872)
+++ trunk/src/target/etm.c	2009-05-21 09:28:57 UTC (rev 1873)
@@ -1674,7 +1674,7 @@
 
 		if ((new_value < 2) || (new_value > 100))
 		{
-			command_print(cmd_ctx, "valid settings are 2% to 100%");
+			command_print(cmd_ctx, "valid settings are 2%% to 100%%");
 		}
 		else
 		{

Modified: trunk/src/target/target.c
===================================================================
--- trunk/src/target/target.c	2009-05-21 05:46:29 UTC (rev 1872)
+++ trunk/src/target/target.c	2009-05-21 09:28:57 UTC (rev 1873)
@@ -1910,7 +1910,7 @@
 
 			if ((i%line_modulo == line_modulo-1) || (i == count - 1))
 			{
-				command_print(cmd_ctx, output);
+				command_print(cmd_ctx, "%s", output);
 				output_len = 0;
 			}
 		}
@@ -2168,7 +2168,8 @@
 
 	if (retval==ERROR_OK)
 	{
-		command_print(cmd_ctx, "dumped %"PRIi64" byte in %s", fileio.size, duration_text);
+		command_print(cmd_ctx, "dumped %lld byte in %s",
+				fileio.size, duration_text);
 		free(duration_text);
 	}
 
@@ -2369,7 +2370,8 @@
 		}
 		else
 		{
-			command_print(cmd_ctx, "breakpoint added at address 0x%8.8x", strtoul(args[0], NULL, 0));
+			command_print(cmd_ctx, "breakpoint added at address 0x%8.8lx",
+					strtoul(args[0], NULL, 0));
 		}
 	}
 	else

Modified: trunk/src/target/trace.c
===================================================================
--- trunk/src/target/trace.c	2009-05-21 05:46:29 UTC (rev 1872)
+++ trunk/src/target/trace.c	2009-05-21 09:28:57 UTC (rev 1873)
@@ -60,7 +60,7 @@
 		
 		for (i = 0; i < trace->num_trace_points; i++)
 		{
-			command_print(cmd_ctx, "trace point 0x%8.8x (%"PRIi64" times hit)",
+			command_print(cmd_ctx, "trace point 0x%8.8x (%lld times hit)",
 					trace->trace_points[i].address,
 					trace->trace_points[i].hit_counter);
 		}

[Openocd-svn] r1872 - trunk

[kc8apf at B. <kc...@ma...>]

Author: kc8apf
Date: 2009-05-21 07:46:29 +0200 (Thu, 21 May 2009)
New Revision: 1872

Modified:
   trunk/PATCHES
Log:
Author: David Brownell <da...@pa...>
	- Update PATCHES to better describe the policies in place


Modified: trunk/PATCHES
===================================================================
--- trunk/PATCHES	2009-05-21 05:33:36 UTC (rev 1871)
+++ trunk/PATCHES	2009-05-21 05:46:29 UTC (rev 1872)
@@ -1,35 +1,45 @@
 Please mail patches to:
 
-op...@li...
+	ope...@li...
 
 Note that you can't send patches to that list unless
 you're a member, despite what the list info page says.
 
 The patch should be against svn trunk using an SVN
-diff. 
+diff. If you use git-svn, a git diff or patch is OK
+too; likewise a quilt patch, if you use quilt.
 
+It should be a "good patch": focus it on a single
+issue, and make it be easily reviewable. Don't make
+it so large that it's hard to review; split large
+patches into smaller ones. (That can also help
+track down bugs later on.) All patches should
+be "clean", which includes preserving the existing
+coding style and updating documentation as needed.j
+
 Attach the patch to the email as a .txt file and
 also write a short change log entry that maintainers
 can copy and paste into the commit message
 
-(However, don't expect the maintainers to actually
-include such entries in their commit messages if
-they're longer than a single $SUBJECT line.)
+Say if it's a bugfix (describe the bug) or a new
+feature. Don't expect patches to merge immediately
+for the next release. Be ready to rework patches
+in response to feedback.
 
 Add yourself to the GPL copyright for non-trivial changes.
 
 To create a patch from the command line:
  
-svn diff >mypatch.txt
+	svn diff >mypatch.txt
 
-http://svnbook.red-bean.com/en/1.0/re09.html
+See:
 
+	http://svnbook.red-bean.com/en/1.0/re09.html
+
 NB! remember to use "svn add" on new files first!
 
-http://svnbook.red-bean.com/en/1.0/re01.html
+	http://svnbook.red-bean.com/en/1.0/re01.html
 
-
-
 If you have a decent SVN GUI, then that should be
 able to create and apply patches as well...
- 
\ No newline at end of file
+ 

[Openocd-svn] r1871 - trunk/src/jtag/rlink

[kc8apf at B. <kc...@ma...>]

Author: kc8apf
Date: 2009-05-21 07:33:36 +0200 (Thu, 21 May 2009)
New Revision: 1871

Modified:
   trunk/src/jtag/rlink/rlink.c
Log:
Author: Thomas Kindler <ma...@t-...>
	- Increase DTC status retry count to avoid problems with STM Primer


Modified: trunk/src/jtag/rlink/rlink.c
===================================================================
--- trunk/src/jtag/rlink/rlink.c	2009-05-21 05:12:32 UTC (rev 1870)
+++ trunk/src/jtag/rlink/rlink.c	2009-05-21 05:33:36 UTC (rev 1871)
@@ -517,7 +517,7 @@
 
 
 	/* Wait for DTC to finish running command buffer */
-	for(i = 5;;) {
+	for(i = 10;;) {
 		usb_err = ep1_generic_commandl(
 			pHDev, 4,
 

[Openocd-svn] r1870 - trunk/src/target

[kc8apf at B. <kc...@ma...>]

Author: kc8apf
Date: 2009-05-21 07:12:32 +0200 (Thu, 21 May 2009)
New Revision: 1870

Modified:
   trunk/src/target/target.c
Log:
Author: ?\195?\152yvind Harboe <oyv...@zy...>
	- Allow target_read/write_buffer of size 0


Modified: trunk/src/target/target.c
===================================================================
--- trunk/src/target/target.c	2009-05-21 05:07:06 UTC (rev 1869)
+++ trunk/src/target/target.c	2009-05-21 05:12:32 UTC (rev 1870)
@@ -985,6 +985,10 @@
 		return ERROR_FAIL;
 	}
 
+	if (size == 0) {
+		return ERROR_OK;
+	}
+
 	if ((address + size - 1) < address)
 	{
 		/* GDB can request this when e.g. PC is 0xfffffffc*/
@@ -1060,6 +1064,10 @@
 		return ERROR_FAIL;
 	}
 
+	if (size == 0) {
+		return ERROR_OK;
+	}
+
 	if ((address + size - 1) < address)
 	{
 		/* GDB can request this when e.g. PC is 0xfffffffc*/

[Openocd-svn] r1869 - trunk/src/jtag

[kc8apf at B. <kc...@ma...>]

Author: kc8apf
Date: 2009-05-21 07:07:06 +0200 (Thu, 21 May 2009)
New Revision: 1869

Modified:
   trunk/src/jtag/ft2232.c
Log:
Author: Holger Schurig <hs...@ma...>
	-Prevent freezing of target when doing a 'shutdown'.


Modified: trunk/src/jtag/ft2232.c
===================================================================
--- trunk/src/jtag/ft2232.c	2009-05-21 04:54:38 UTC (rev 1868)
+++ trunk/src/jtag/ft2232.c	2009-05-21 05:07:06 UTC (rev 1869)
@@ -2642,8 +2642,6 @@
 
 	status = FT_Close(ftdih);
 #elif BUILD_FT2232_LIBFTDI == 1
-	ftdi_disable_bitbang(&ftdic);
-
 	ftdi_usb_close(&ftdic);
 
 	ftdi_deinit(&ftdic);