openocd-commit — OpenOCD commit maling list - read only

[Openocd-svn] r1993 - trunk/src/jtag

[<zw...@ma...>]

Author: zwelch
Date: 2009-06-02 08:21:49 +0200 (Tue, 02 Jun 2009)
New Revision: 1993

Modified:
   trunk/src/jtag/jtag.c
   trunk/src/jtag/jtag.h
Log:
More JTAG interface driver cleanup:
- Make interface_jtag_execute_queue call new helper function.
- Add default_interface_jtag_execute_queue to wrap jtag interface access.

This patch may look useless on its own, but it helps to isolate the core
JTAG variables from the interface_jtag_* routines, so the later can be
moved into jtag_driver.c in a pending patch.


Modified: trunk/src/jtag/jtag.c
===================================================================
--- trunk/src/jtag/jtag.c	2009-06-02 05:47:00 UTC (rev 1992)
+++ trunk/src/jtag/jtag.c	2009-06-02 06:21:49 UTC (rev 1993)
@@ -1570,7 +1570,7 @@
 		return ERROR_FAIL;
 	}
 
-	retval = jtag->execute_queue();
+	retval = default_interface_jtag_execute_queue();
 
 	if (retval == ERROR_OK)
 	{
@@ -1592,6 +1592,11 @@
 }
 #endif
 
+int default_interface_jtag_execute_queue(void)
+{
+	return jtag->execute_queue();
+}
+
 void jtag_execute_queue_noclear(void)
 {
 	/* each flush can take as much as 1-2ms on high bandwidth low latency interfaces.

Modified: trunk/src/jtag/jtag.h
===================================================================
--- trunk/src/jtag/jtag.h	2009-06-02 05:47:00 UTC (rev 1992)
+++ trunk/src/jtag/jtag.h	2009-06-02 06:21:49 UTC (rev 1993)
@@ -869,6 +869,13 @@
 extern int interface_jtag_add_clocks(int num_cycles);
 extern int interface_jtag_execute_queue(void);
 
+/**
+ * Calls the interface callback to execute the queue.  This routine
+ * is used by the JTAG driver layer and should not be called directly.
+ */
+extern int default_interface_jtag_execute_queue(void);
+
+
 #endif // INCLUDE_JTAG_MINIDRIVER_H
 
 /* this allows JTAG devices to implement the entire jtag_xxx() layer in hw/sw */

[Openocd-svn] r1992 - trunk/src/jtag

[<zw...@ma...>]

Author: zwelch
Date: 2009-06-02 07:47:00 +0200 (Tue, 02 Jun 2009)
New Revision: 1992

Modified:
   trunk/src/jtag/jtag.c
Log:
Clean up jtag command queue handling:
- Rename last_command_pointer as next_command_pointer, because this variable
  stores the address where jtag_queue_command() will store a command pointer.
- Make that variable static, since it is only used internally in jtag.c.
- Remove superfluous accessor for that now-static variable.
- Deobfuscate use of variables in jtag_command_queue.
- Add jtag_command_queue_reset helper function.
- Use it in interface_jtag_execute_queue.


Modified: trunk/src/jtag/jtag.c
===================================================================
--- trunk/src/jtag/jtag.c	2009-06-02 04:55:05 UTC (rev 1991)
+++ trunk/src/jtag/jtag.c	2009-06-02 05:47:00 UTC (rev 1992)
@@ -91,7 +91,7 @@
 
 
 jtag_command_t *jtag_command_queue = NULL;
-jtag_command_t **last_command_pointer = &jtag_command_queue;
+static jtag_command_t **next_command_pointer = &jtag_command_queue;
 static jtag_tap_t *jtag_all_taps = NULL;
 
 enum reset_types jtag_reset_config = RESET_NONE;
@@ -423,40 +423,20 @@
 	return ERROR_OK;
 }
 
-/* returns a pointer to the pointer of the last command in queue
- * this may be a pointer to the root pointer (jtag_command_queue)
- * or to the next member of the last but one command
- */
-jtag_command_t** jtag_get_last_command_p(void)
-{
-/*	jtag_command_t *cmd = jtag_command_queue;
-
-	if (cmd)
-		while (cmd->next)
-			cmd = cmd->next;
-	else
-		return &jtag_command_queue;
-
-	return &cmd->next;*/
-
-	return last_command_pointer;
-}
-
-
 void jtag_queue_command(jtag_command_t * cmd)
 {
-	jtag_command_t **last_cmd;
+	// this command goes on the end, so ensure the queue terminates
+	cmd->next = NULL;
 
-	last_cmd = jtag_get_last_command_p();
-
+	jtag_command_t **last_cmd = next_command_pointer;
+	assert(NULL != last_cmd);
+	assert(NULL == *last_cmd);
 	*last_cmd = cmd;
 
-	(*last_cmd)->next = NULL;
-
-	last_command_pointer = &((*last_cmd)->next);
+	// store location where the next command pointer will be stored
+	next_command_pointer = &cmd->next;
 }
 
-
 void* cmd_queue_alloc(size_t size)
 {
 	cmd_queue_page_t **p_page = &cmd_queue_pages;
@@ -533,6 +513,14 @@
 	cmd_queue_pages = NULL;
 }
 
+void jtag_command_queue_reset(void)
+{
+	cmd_queue_free();
+
+	jtag_command_queue = NULL;
+	next_command_pointer = &jtag_command_queue;
+}
+
 /**
  * Copy a scan_field_t for insertion into the queue.
  *
@@ -1595,13 +1583,10 @@
 		}
 	}
 
-	cmd_queue_free();
-
 	jtag_callback_queue_head = NULL;
 	jtag_callback_queue_tail = NULL;
 
-	jtag_command_queue = NULL;
-	last_command_pointer = &jtag_command_queue;
+	jtag_command_queue_reset();
 
 	return retval;
 }

[Openocd-svn] r1991 - trunk/src/jtag

[<zw...@ma...>]

Author: zwelch
Date: 2009-06-02 06:55:05 +0200 (Tue, 02 Jun 2009)
New Revision: 1991

Modified:
   trunk/src/jtag/jtag.h
Log:
Encapsulate JTAG command interfaces for moving to jtag_interface.h.

Modified: trunk/src/jtag/jtag.h
===================================================================
--- trunk/src/jtag/jtag.h	2009-06-02 04:31:49 UTC (rev 1990)
+++ trunk/src/jtag/jtag.h	2009-06-02 04:55:05 UTC (rev 1991)
@@ -279,6 +279,8 @@
 	u8			intmp[4];			/* temporary storage for checking synchronously */
 } scan_field_t;
 
+#ifdef INCLUDE_JTAG_INTERFACE_H
+
 enum scan_type {
 	/* IN: from device to host, OUT: from host to device */
 	SCAN_IN = 1, SCAN_OUT = 2, SCAN_IO = 3
@@ -363,6 +365,8 @@
 
 extern jtag_command_t* jtag_command_queue;
 
+#endif // INCLUDE_JTAG_INTERFACE_H
+
 /* forward declaration */
 typedef struct jtag_tap_event_action_s jtag_tap_event_action_t;
 
@@ -804,10 +808,13 @@
 /* execute jtag queue and check value and use mask if mask is != NULL. invokes
  * jtag_set_error() with any error. */
 extern void jtag_check_value_mask(scan_field_t *field, u8 *value, u8 *mask);
+
+#ifdef INCLUDE_JTAG_INTERFACE_H
 extern enum scan_type jtag_scan_type(const scan_command_t* cmd);
 extern int            jtag_scan_size(const scan_command_t* cmd);
 extern int            jtag_read_buffer(u8* buffer, const scan_command_t* cmd);
 extern int            jtag_build_buffer(const scan_command_t* cmd, u8** buffer);
+#endif  // INCLUDE_JTAG_INTERFACE_H
 
 extern void           jtag_sleep(u32 us);
 extern int            jtag_call_event_callbacks(enum jtag_event event);

[Openocd-svn] r1990 - trunk/src/jtag

[<zw...@ma...>]

Author: zwelch
Date: 2009-06-02 06:31:49 +0200 (Tue, 02 Jun 2009)
New Revision: 1990

Modified:
   trunk/src/jtag/jtag.h
Log:
Remove the useless invalidstruct from jtag.h.

Modified: trunk/src/jtag/jtag.h
===================================================================
--- trunk/src/jtag/jtag.h	2009-06-02 03:38:50 UTC (rev 1989)
+++ trunk/src/jtag/jtag.h	2009-06-02 04:31:49 UTC (rev 1990)
@@ -800,11 +800,7 @@
 extern int            jtag_srst_asserted(int* srst_asserted);
 
 /* JTAG support functions */
-struct invalidstruct
-{
 
-};
-
 /* execute jtag queue and check value and use mask if mask is != NULL. invokes
  * jtag_set_error() with any error. */
 extern void jtag_check_value_mask(scan_field_t *field, u8 *value, u8 *mask);

[Openocd-svn] r1989 - trunk/src/jtag

[<zw...@ma...>]

Author: zwelch
Date: 2009-06-02 05:38:50 +0200 (Tue, 02 Jun 2009)
New Revision: 1989

Modified:
   trunk/src/jtag/jtag.c
Log:
Start clean-up of JTAG driver interface:
- Factor jtag_add_scan_check to call new jtag_add_scan_check_alloc helper.
- Use conditional logic to define two versions of the helper.
- These helpers will be moved to other files in future patches.


Modified: trunk/src/jtag/jtag.c
===================================================================
--- trunk/src/jtag/jtag.c	2009-06-01 23:30:58 UTC (rev 1988)
+++ trunk/src/jtag/jtag.c	2009-06-02 03:38:50 UTC (rev 1989)
@@ -740,31 +740,39 @@
 	return jtag_check_value_inner(in, (u8 *)data1, (u8 *)data2, (int)data3);
 }
 
+#ifdef HAVE_JTAG_MINIDRIVER_H
+void interface_jtag_add_scan_check_alloc(scan_field_t *field)
+{
+	/* We're executing this synchronously, so try to use local storage. */
+	if (field->num_bits > 32)
+	{
+		unsigned num_bytes = TAP_SCAN_BYTES(field->num_bits);
+		field->in_value = (u8 *)malloc(num_bytes);
+		field->allocated = 1;
+	}
+	else
+		field->in_value = field->intmp;
+}
+#else
+void interface_jtag_add_scan_check_alloc(scan_field_t *field)
+{
+	unsigned num_bytes = TAP_SCAN_BYTES(field->num_bits);
+	field->in_value = (u8 *)cmd_queue_alloc(num_bytes);
+}
+#endif
+
 static void jtag_add_scan_check(void (*jtag_add_scan)(int in_num_fields, const scan_field_t *in_fields, tap_state_t state),
 		int in_num_fields, scan_field_t *in_fields, tap_state_t state)
 {
 	for (int i = 0; i < in_num_fields; i++)
 	{
-		in_fields[i].allocated = 0;
-		in_fields[i].modified = 0;
-		if ((in_fields[i].check_value != NULL) && (in_fields[i].in_value == NULL))
-		{
-			in_fields[i].modified = 1;
-			/* we need storage space... */
-#ifdef HAVE_JTAG_MINIDRIVER_H
-			if (in_fields[i].num_bits <= 32)
-			{
-				/* This is enough space and we're executing this synchronously */
-				in_fields[i].in_value = in_fields[i].intmp;
-			} else
-			{
-				in_fields[i].in_value = (u8 *)malloc(CEIL(in_fields[i].num_bits, 8));
-				in_fields[i].allocated = 1;
-			}
-#else
-			in_fields[i].in_value = (u8 *)cmd_queue_alloc(CEIL(in_fields[i].num_bits, 8));
-#endif
-		}
+		struct scan_field_s *field = &in_fields[i];
+		field->allocated = 0;
+		field->modified = 0;
+		if (field->check_value || field->in_value)
+			continue;
+		interface_jtag_add_scan_check_alloc(field);
+		field->modified = 1;
 	}
 
 	jtag_add_scan(in_num_fields, in_fields, state);

[Openocd-svn] r1988 - trunk/src/jtag

[<zw...@ma...>]

Author: zwelch
Date: 2009-06-02 01:30:58 +0200 (Tue, 02 Jun 2009)
New Revision: 1988

Modified:
   trunk/src/jtag/jtag.c
Log:
David Brownell <da...@pa...>:

Make the TCL "drscan" and "irscan" commands finish in RUN/IDLE
unless the user specifies otherwise ... usually they'd choose
something like DRPAUSE or IRPAUSE, avoiding RUN/IDLE.

The current "end" state is whatever the preceding commands left
in "cmd_queue_end_state", which to TCL scripts isn't knowable.
This change should forestall various surprises/bugs.

Also check that any "end" state specified is safe in case this
adapter's JTAG clock is free-running.  For now, just issue a
warning; eventually a hard failure is probably correct.


Modified: trunk/src/jtag/jtag.c
===================================================================
--- trunk/src/jtag/jtag.c	2009-06-01 23:13:24 UTC (rev 1987)
+++ trunk/src/jtag/jtag.c	2009-06-01 23:30:58 UTC (rev 1988)
@@ -2955,6 +2955,26 @@
 
 }
 
+/*
+ * For "irscan" or "drscan" commands, the "end" (really, "next") state
+ * should be stable ... and *NOT* a shift state, otherwise free-running
+ * jtag clocks could change the values latched by the update state.
+ */
+static bool scan_is_safe(tap_state_t state)
+{
+	switch (state)
+	{
+	case TAP_RESET:
+	case TAP_IDLE:
+	case TAP_DRPAUSE:
+	case TAP_IRPAUSE:
+		return true;
+	default:
+		return false;
+	}
+}
+
+
 static int handle_irscan_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
 {
 	int i;
@@ -2967,11 +2987,12 @@
 		return ERROR_COMMAND_SYNTAX_ERROR;
 	}
 
-	/* optional "-endstate" */
-	/*          "statename" */
-	/* at the end of the arguments. */
-	/* assume none. */
-	endstate = cmd_queue_end_state;
+	/* optional "-endstate" "statename" at the end of the arguments,
+	 * so that e.g. IRPAUSE can let us load the data register before
+	 * entering RUN/IDLE to execute the instruction we load here.
+	 */
+	endstate = TAP_IDLE;
+
 	if( argc >= 4 ){
 		/* have at least one pair of numbers. */
 		/* is last pair the magic text? */
@@ -2988,6 +3009,9 @@
 			if( endstate >= TAP_NUM_STATES ){
 				return ERROR_COMMAND_SYNTAX_ERROR;
 			} else {
+				if (!scan_is_safe(endstate))
+					LOG_WARNING("irscan with unsafe "
+							"endstate \"%s\"", cpA);
 				/* found - remove the last 2 args */
 				argc -= 2;
 			}
@@ -3052,8 +3076,8 @@
 		return JIM_ERR;
 	}
 
-	/* assume no endstate */
-	endstate = cmd_queue_end_state;
+	endstate = TAP_IDLE;
+
 	/* validate arguments as numbers */
 	e = JIM_OK;
 	for (i = 2; i < argc; i+=2)
@@ -3073,7 +3097,10 @@
 			return e;
 		}
 
-		/* it could be: "-endstate FOO" */
+		/* it could be: "-endstate FOO"
+		 * e.g. DRPAUSE so we can issue more instructions
+		 * before entering RUN/IDLE and executing them.
+		 */
 
 		/* get arg as a string. */
 		cp = Jim_GetString( args[i], NULL );
@@ -3088,6 +3115,10 @@
 				/* update the error message */
 				Jim_SetResult_sprintf(interp,"endstate: %s invalid", cp );
 			} else {
+				if (!scan_is_safe(endstate))
+					LOG_WARNING("drscan with unsafe "
+							"endstate \"%s\"", cp);
+
 				/* valid - so clear the error */
 				e = JIM_OK;
 				/* and remove the last 2 args */

[Openocd-svn] r1987 - trunk/src/jtag

[<zw...@ma...>]

Author: zwelch
Date: 2009-06-02 01:13:24 +0200 (Tue, 02 Jun 2009)
New Revision: 1987

Modified:
   trunk/src/jtag/jtag.c
Log:
David Brownell <da...@pa...>:

Whitespace fixes in jtag.c ... mostly end-of-line crap.
Flag "jtag_device" command as obsolete in its helptext.


Modified: trunk/src/jtag/jtag.c
===================================================================
--- trunk/src/jtag/jtag.c	2009-06-01 23:09:19 UTC (rev 1986)
+++ trunk/src/jtag/jtag.c	2009-06-01 23:13:24 UTC (rev 1987)
@@ -6,7 +6,7 @@
  *   oyv...@zy...                                               *
  *                                                                         *
  *   Copyright (C) 2009 SoftPLC Corporation                                *
- * 	 http://softplc.com                                                    *
+ *       http://softplc.com                                                *
  *   di...@so...                                                      *
  *                                                                         *
  *   This program is free software; you can redistribute it and/or modify  *
@@ -595,12 +595,10 @@
 {
 	if (jtag_verify&&jtag_verify_capture_ir)
 	{
-		/* 8 x 32 bit id's is enough for all invoations */
+		/* 8 x 32 bit id's is enough for all invocations */
 
 		for (int j = 0; j < in_num_fields; j++)
 		{
-			in_fields[j].check_value=NULL;
-			in_fields[j].check_mask=NULL;
 			/* if we are to run a verification of the ir scan, we need to get the input back.
 			 * We may have to allocate space if the caller didn't ask for the input back.
 			 */
@@ -716,7 +714,7 @@
 	jtag_command_t * cmd		= cmd_queue_alloc(sizeof(jtag_command_t));
 	scan_command_t * scan		= cmd_queue_alloc(sizeof(scan_command_t));
 	scan_field_t * out_fields	= cmd_queue_alloc(in_num_fields * sizeof(scan_field_t));
-	
+
 	jtag_queue_command(cmd);
 
 	cmd->type				= JTAG_SCAN;
@@ -844,9 +842,9 @@
 	jtag_command_t * cmd		= cmd_queue_alloc(sizeof(jtag_command_t));
 	scan_command_t * scan		= cmd_queue_alloc(sizeof(scan_command_t));
 	scan_field_t * out_fields	= cmd_queue_alloc((in_num_fields + bypass_devices) * sizeof(scan_field_t));
-	
+
 	jtag_queue_command(cmd);
-	
+
 	cmd->type				= JTAG_SCAN;
 	cmd->cmd.scan			= scan;
 
@@ -880,7 +878,7 @@
 
 			assert(field > start_field);	/* must have at least one input field per not bypassed TAP */
 		}
-		
+
 		/* if a TAP is bypassed, generated a dummy bit*/
 		else
 		{
@@ -2322,7 +2320,7 @@
 		COMMAND_ANY, "set maximum jtag speed (if supported); "
 		"parameter is maximum khz, or 0 for adaptive clocking (RTCK).");
 	register_command(cmd_ctx, NULL, "jtag_device", handle_jtag_device_command,
-		COMMAND_CONFIG, "jtag_device <ir_length> <ir_expected> <ir_mask>");
+		COMMAND_CONFIG, "(DEPRECATED) jtag_device <ir_length> <ir_expected> <ir_mask>");
 	register_command(cmd_ctx, NULL, "reset_config", handle_reset_config_command,
 		COMMAND_ANY,
 		"[none/trst_only/srst_only/trst_and_srst] [srst_pulls_trst/trst_pulls_srst] [combined/separate] [trst_push_pull/trst_open_drain] [srst_push_pull/srst_open_drain]");
@@ -3369,7 +3367,7 @@
 	 * N.B. OOCD clocks TMS from LSB first, so read these right-to-left.
 	 * N.B. These values are tightly bound to the table in tap_get_tms_path_len().
 	 * N.B. Reset only needs to be 0b11111, but in JLink an even byte of 1's is more stable.
-	 * 		These extra ones cause no TAP state problem, because we go into reset and stay in reset.
+	 * These extra ones cause no TAP state problem, because we go into reset and stay in reset.
 	 */
 
 
@@ -3388,7 +3386,7 @@
 
 static const struct tms_sequences short_tms_seqs[6][6] =		/*  [from_state_ndx][to_state_ndx] */
 {
-	/* 	this is the table submitted by Jeff Williams on 3/30/2009 with this comment:
+	/* this is the table submitted by Jeff Williams on 3/30/2009 with this comment:
 
 		OK, I added Peter's version of the state table, and it works OK for
 		me on MC1322x. I've recreated the jlink portion of patch with this
@@ -3443,7 +3441,7 @@
 {
 	bool is_stable;
 
-	/* 	A switch() is used because it is symbol dependent
+	/*	A switch() is used because it is symbol dependent
 		(not value dependent like an array), and can also check bounds.
 	*/
 	switch( astate )
@@ -3467,7 +3465,7 @@
 {
 	tap_state_t new_state;
 
-	/* 	A switch is used because it is symbol dependent and not value dependent
+	/*	A switch is used because it is symbol dependent and not value dependent
 		like an array.  Also it can check for out of range conditions.
 	*/
 

[Openocd-svn] r1986 - trunk/doc

[<zw...@ma...>]

Author: zwelch
Date: 2009-06-02 01:09:19 +0200 (Tue, 02 Jun 2009)
New Revision: 1986

Modified:
   trunk/doc/openocd.texi
Log:
David Brownell <da...@pa...>:

Remove two sections about deprecated/removed commands, documenting
them briefly in the chapter on deprecated/removed commands.  The
"working_area" command just duplicated text; "jtag_device" wasn't
listed in that chapter before.

Also start de-emphasizing those commands.  Don't index them, and
include a disclaimer that their documentation may start to vanish
about a year after the code does (e.g. in January 2010).


Modified: trunk/doc/openocd.texi
===================================================================
--- trunk/doc/openocd.texi	2009-06-01 23:06:17 UTC (rev 1985)
+++ trunk/doc/openocd.texi	2009-06-01 23:09:19 UTC (rev 1986)
@@ -1823,9 +1823,9 @@
 @end itemize
 
 
+@anchor{jtag newtap}
 @section jtag newtap
 @b{@t{jtag newtap CHIPNAME TAPNAME  configparams ....}}
-@cindex jtag_device
 @cindex jtag newtap
 @cindex tap
 @cindex tap order
@@ -1946,25 +1946,7 @@
 @comment END NOTES
 @end itemize
 @comment at command level
-@comment DOCUMENT old command
-@section jtag_device - REMOVED
-@example
-@b{jtag_device} <@var{IR length}> <@var{IR capture}> <@var{IR mask}> <@var{IDCODE instruction}>
-@end example
-@cindex jtag_device
 
-@* @b{Removed: 28/nov/2008} This command has been removed and replaced
-by the ``jtag newtap'' command. The documentation remains here so that
-one can easily convert the old syntax to the new syntax. About the old
-syntax: The old syntax is positional, i.e.: The 3rd parameter is the
-``irmask''. The new syntax requires named prefixes, and supports
-additional options, for example ``-expected-id 0x3f0f0f0f''. Please refer to the
-@b{jtag newtap} command for details.
-@example
-OLD: jtag_device 8 0x01 0xe3 0xfe
-NEW: jtag newtap CHIPNAME TAPNAME -irlen 8 -ircapture 0x01 -irmask 0xe3
-@end example
-
 @section Enable/Disable Taps
 @b{Note:} These commands are intended to be used as a machine/script
 interface. Humans might find the ``scan_chain'' command more helpful
@@ -2376,15 +2358,6 @@
 configuration command to enable OpenOCD hardware reset functionality.
 @comment END variants
 @end itemize
-@section working_area - Command Removed
-@cindex working_area
-@*@b{Please use the ``$_TARGETNAME configure -work-area-... parameters instead}
-@* This documentation remains because there are existing scripts that
-still use this that need to be converted.
-@example
-  working_area target# address  size backup| [virtualaddress]
-@end example
-@* The target# is a the 0 based target numerical index.
 
 @node Flash Commands
 @chapter Flash Commands
@@ -4515,42 +4488,54 @@
 @node Upgrading
 @chapter Deprecated/Removed Commands
 @cindex Deprecated/Removed Commands
-Certain OpenOCD commands have been deprecated/removed during the various revisions.
+Certain OpenOCD commands have been deprecated or
+removed during the various revisions.
 
+Upgrade your scripts as soon as possible.
+These descriptions for old commands may be removed
+a year after the command itself was removed.
+This means that in January 2010 this chapter may
+become much shorter.
+
 @itemize @bullet
 @item @b{arm7_9 fast_writes}
 @cindex arm7_9 fast_writes
 @*Use @command{arm7_9 fast_memory_access} instead.
 @xref{arm7_9 fast_memory_access}.
 @item @b{arm7_9 force_hw_bkpts}
-@cindex arm7_9 force_hw_bkpts
 @*Use @command{gdb_breakpoint_override} instead. Note that GDB will use hardware breakpoints
 for flash if the GDB memory map has been set up(default when flash is declared in
 target configuration). @xref{gdb_breakpoint_override}.
 @item @b{arm7_9 sw_bkpts}
-@cindex arm7_9 sw_bkpts
 @*On by default. @xref{gdb_breakpoint_override}.
 @item @b{daemon_startup}
-@cindex daemon_startup
 @*this config option has been removed, simply adding @option{init} and @option{reset halt} to
 the end of your config script will give the same behaviour as using @option{daemon_startup reset}
 and @option{target cortex_m3 little reset_halt 0}.
 @item @b{dump_binary}
-@cindex dump_binary
 @*use @option{dump_image} command with same args. @xref{dump_image}.
 @item @b{flash erase}
-@cindex flash erase
 @*use @option{flash erase_sector} command with same args. @xref{flash erase_sector}.
 @item @b{flash write}
-@cindex flash write
 @*use @option{flash write_bank} command with same args. @xref{flash write_bank}.
 @item @b{flash write_binary}
-@cindex flash write_binary
 @*use @option{flash write_bank} command with same args. @xref{flash write_bank}.
 @item @b{flash auto_erase}
-@cindex flash auto_erase
 @*use @option{flash write_image} command passing @option{erase} as the first parameter. @xref{flash write_image}.
 
+@item @b{jtag_device}
+@*use the @command{jtag newtap} command, converting from positional syntax
+to named prefixes, and naming the TAP.
+@xref{jtag newtap}.
+Note that if you try to use the old command, a message will tell you the
+right new command to use; and that the fourth parameter in the old syntax
+was never actually used.
+@example
+OLD: jtag_device 8 0x01 0xe3 0xfe
+NEW: jtag newtap CHIPNAME TAPNAME \
+           -irlen 8 -ircapture 0x01 -irmask 0xe3
+@end example
+
 @item @b{jtag_speed} value
 @*@xref{JTAG Speed}.
 Usually, a value of zero means maximum
@@ -4565,10 +4550,8 @@
 @end itemize
 
 @item @b{load_binary}
-@cindex load_binary
 @*use @option{load_image} command with same args. @xref{load_image}.
 @item @b{run_and_halt_time}
-@cindex run_and_halt_time
 @*This command has been removed for simpler reset behaviour, it can be simulated with the
 following commands:
 @smallexample
@@ -4577,13 +4560,10 @@
 halt
 @end smallexample
 @item @b{target} <@var{type}> <@var{endian}> <@var{jtag-position}>
-@cindex target
 @*use the create subcommand of @option{target}.
 @item @b{target_script} <@var{target#}> <@var{eventname}> <@var{scriptname}>
-@cindex target_script
 @*use <@var{target_name}> configure -event <@var{eventname}> "script <@var{scriptname}>"
 @item @b{working_area}
-@cindex working_area
 @*use the @option{configure} subcommand of @option{target} to set the work-area-virt, work-area-phy, work-area-size, and work-area-backup properties of the target.
 @end itemize
 

[Openocd-svn] r1985 - trunk/tcl/board

[<zw...@ma...>]

Author: zwelch
Date: 2009-06-02 01:06:17 +0200 (Tue, 02 Jun 2009)
New Revision: 1985

Added:
   trunk/tcl/board/osk5912.cfg
Log:
David Brownell <da...@pa...>:

This is the missing half of the r1974 patch:
OSK5912 board support, which was split out from
the omap5912 target config.


Added: trunk/tcl/board/osk5912.cfg
===================================================================
--- trunk/tcl/board/osk5912.cfg	2009-06-01 23:01:24 UTC (rev 1984)
+++ trunk/tcl/board/osk5912.cfg	2009-06-01 23:06:17 UTC (rev 1985)
@@ -0,0 +1,28 @@
+# http://omap.spectrumdigital.com/osk5912/
+
+source [find target/omap5912.cfg]
+
+# NOTE: this assumes you're using the ARM 20-pin ("Multi-ICE")
+# JTAG connector, and accordingly have J1 connecting pins 1 & 2.
+# The TI-14 pin needs "trst_only", and J1 connecting 2 & 3.
+reset_config trst_and_srst separate
+
+# NOTE:  an expansion board could add a trace connector ... if
+# it does, change this appropriately.  And reset_config too,
+# assuming JTAG_DIS reroutes JTAG to that connector.
+etm config $_TARGETNAME 8 demultiplexed full dummy
+etm_dummy config $_TARGETNAME
+
+# standard boards populate two 16 MB chips, but manufacturing
+# options or an expansion board could change this config.
+flash bank cfi 0x00000000 0x01000000 2 2 $_TARGETNAME
+flash bank cfi 0x01000000 0x01000000 2 2 $_TARGETNAME
+
+proc osk5912_init {} {
+	omap5912_reset
+
+	# detect flash
+	flash probe 0
+	flash probe 1
+}
+$_TARGETNAME configure -event reset-init { osk5912_init }


Property changes on: trunk/tcl/board/osk5912.cfg
___________________________________________________________________
Name: svn:eol-style
   + native

[Openocd-svn] r1984 - in trunk/src: jtag jtag/rlink xsvf

[<zw...@ma...>]

Author: zwelch
Date: 2009-06-02 01:01:24 +0200 (Tue, 02 Jun 2009)
New Revision: 1984

Modified:
   trunk/src/jtag/amt_jtagaccel.c
   trunk/src/jtag/arm-jtag-ew.c
   trunk/src/jtag/at91rm9200.c
   trunk/src/jtag/bitbang.c
   trunk/src/jtag/bitq.c
   trunk/src/jtag/dummy.c
   trunk/src/jtag/ep93xx.c
   trunk/src/jtag/ft2232.c
   trunk/src/jtag/gw16012.c
   trunk/src/jtag/jlink.c
   trunk/src/jtag/jtag.c
   trunk/src/jtag/jtag.h
   trunk/src/jtag/parport.c
   trunk/src/jtag/presto.c
   trunk/src/jtag/rlink/rlink.c
   trunk/src/jtag/usbprog.c
   trunk/src/jtag/vsllink.c
   trunk/src/jtag/zy1000.c
   trunk/src/xsvf/xsvf.c
Log:
Encapsulate JTAG Cable API and interface structure, plan for new header file.

Modified: trunk/src/jtag/amt_jtagaccel.c
===================================================================
--- trunk/src/jtag/amt_jtagaccel.c	2009-06-01 22:54:42 UTC (rev 1983)
+++ trunk/src/jtag/amt_jtagaccel.c	2009-06-01 23:01:24 UTC (rev 1984)
@@ -21,6 +21,7 @@
 #include "config.h"
 #endif
 
+#define INCLUDE_JTAG_INTERFACE_H
 #include "jtag.h"
 
 

Modified: trunk/src/jtag/arm-jtag-ew.c
===================================================================
--- trunk/src/jtag/arm-jtag-ew.c	2009-06-01 22:54:42 UTC (rev 1983)
+++ trunk/src/jtag/arm-jtag-ew.c	2009-06-01 23:01:24 UTC (rev 1984)
@@ -24,6 +24,7 @@
 #include "config.h"
 #endif
 
+#define INCLUDE_JTAG_INTERFACE_H
 #include "jtag.h"
 #include <usb.h>
 

Modified: trunk/src/jtag/at91rm9200.c
===================================================================
--- trunk/src/jtag/at91rm9200.c	2009-06-01 22:54:42 UTC (rev 1983)
+++ trunk/src/jtag/at91rm9200.c	2009-06-01 23:01:24 UTC (rev 1984)
@@ -21,6 +21,7 @@
 #include "config.h"
 #endif
 
+#define INCLUDE_JTAG_INTERFACE_H
 #include "jtag.h"
 #include "bitbang.h"
 

Modified: trunk/src/jtag/bitbang.c
===================================================================
--- trunk/src/jtag/bitbang.c	2009-06-01 22:54:42 UTC (rev 1983)
+++ trunk/src/jtag/bitbang.c	2009-06-01 23:01:24 UTC (rev 1984)
@@ -25,6 +25,7 @@
 #endif
 
 #include "bitbang.h"
+#define INCLUDE_JTAG_INTERFACE_H
 #include "jtag.h"
 
 /**

Modified: trunk/src/jtag/bitq.c
===================================================================
--- trunk/src/jtag/bitq.c	2009-06-01 22:54:42 UTC (rev 1983)
+++ trunk/src/jtag/bitq.c	2009-06-01 23:01:24 UTC (rev 1984)
@@ -21,6 +21,7 @@
 #include "config.h"
 #endif
 
+#define INCLUDE_JTAG_INTERFACE_H
 #include "bitq.h"
 
 

Modified: trunk/src/jtag/dummy.c
===================================================================
--- trunk/src/jtag/dummy.c	2009-06-01 22:54:42 UTC (rev 1983)
+++ trunk/src/jtag/dummy.c	2009-06-01 23:01:24 UTC (rev 1984)
@@ -21,6 +21,7 @@
 #include "config.h"
 #endif
 
+#define INCLUDE_JTAG_INTERFACE_H
 #include "jtag.h"
 #include "bitbang.h"
 

Modified: trunk/src/jtag/ep93xx.c
===================================================================
--- trunk/src/jtag/ep93xx.c	2009-06-01 22:54:42 UTC (rev 1983)
+++ trunk/src/jtag/ep93xx.c	2009-06-01 23:01:24 UTC (rev 1984)
@@ -21,6 +21,7 @@
 #include "config.h"
 #endif
 
+#define INCLUDE_JTAG_INTERFACE_H
 #include "jtag.h"
 #include "bitbang.h"
 

Modified: trunk/src/jtag/ft2232.c
===================================================================
--- trunk/src/jtag/ft2232.c	2009-06-01 22:54:42 UTC (rev 1983)
+++ trunk/src/jtag/ft2232.c	2009-06-01 23:01:24 UTC (rev 1984)
@@ -40,6 +40,7 @@
 #endif
 
 /* project specific includes */
+#define INCLUDE_JTAG_INTERFACE_H
 #include "jtag.h"
 #include "time_support.h"
 

Modified: trunk/src/jtag/gw16012.c
===================================================================
--- trunk/src/jtag/gw16012.c	2009-06-01 22:54:42 UTC (rev 1983)
+++ trunk/src/jtag/gw16012.c	2009-06-01 23:01:24 UTC (rev 1984)
@@ -21,6 +21,7 @@
 #include "config.h"
 #endif
 
+#define INCLUDE_JTAG_INTERFACE_H
 #include "jtag.h"
 
 

Modified: trunk/src/jtag/jlink.c
===================================================================
--- trunk/src/jtag/jlink.c	2009-06-01 22:54:42 UTC (rev 1983)
+++ trunk/src/jtag/jlink.c	2009-06-01 23:01:24 UTC (rev 1984)
@@ -25,6 +25,7 @@
 #include "config.h"
 #endif
 
+#define INCLUDE_JTAG_INTERFACE_H
 #include "jtag.h"
 
 #include <usb.h>

Modified: trunk/src/jtag/jtag.c
===================================================================
--- trunk/src/jtag/jtag.c	2009-06-01 22:54:42 UTC (rev 1983)
+++ trunk/src/jtag/jtag.c	2009-06-01 23:01:24 UTC (rev 1984)
@@ -29,6 +29,7 @@
 #endif
 
 #define INCLUDE_JTAG_MINIDRIVER_H
+#define INCLUDE_JTAG_INTERFACE_H
 #include "jtag.h"
 
 #ifdef HAVE_STRINGS_H

Modified: trunk/src/jtag/jtag.h
===================================================================
--- trunk/src/jtag/jtag.h	2009-06-01 22:54:42 UTC (rev 1983)
+++ trunk/src/jtag/jtag.h	2009-06-01 23:01:24 UTC (rev 1984)
@@ -105,6 +105,8 @@
 //extern tap_transition_t tap_transitions[16];    /* describe the TAP state diagram */
 
 
+#ifdef INCLUDE_JTAG_INTERFACE_H
+
 /*-----<Cable Helper API>-------------------------------------------*/
 
 /* The "Cable Helper API" is what the cable drivers can use to help implement
@@ -254,7 +256,9 @@
 
 /*-----</Cable Helper API>------------------------------------------*/
 
+#endif // INCLUDE_JTAG_INTERFACE_H
 
+
 extern tap_state_t cmd_queue_end_state;         /* finish DR scans in dr_end_state */
 extern tap_state_t cmd_queue_cur_state;         /* current TAP state */
 
@@ -428,6 +432,8 @@
 	LINE_PUSH_PULL  = 0x1,
 };
 
+#ifdef INCLUDE_JTAG_INTERFACE_H
+
 typedef struct jtag_interface_s
 {
 	char* name;
@@ -477,6 +483,8 @@
 	int (*srst_asserted)(int* srst_asserted);
 } jtag_interface_t;
 
+#endif // INCLUDE_JTAG_INTERFACE_H
+
 enum jtag_event {
 	JTAG_TRST_ASSERTED
 };

Modified: trunk/src/jtag/parport.c
===================================================================
--- trunk/src/jtag/parport.c	2009-06-01 22:54:42 UTC (rev 1983)
+++ trunk/src/jtag/parport.c	2009-06-01 23:01:24 UTC (rev 1984)
@@ -24,6 +24,7 @@
 #include "config.h"
 #endif
 
+#define INCLUDE_JTAG_INTERFACE_H
 #include "jtag.h"
 #include "bitbang.h"
 

Modified: trunk/src/jtag/presto.c
===================================================================
--- trunk/src/jtag/presto.c	2009-06-01 22:54:42 UTC (rev 1983)
+++ trunk/src/jtag/presto.c	2009-06-01 23:01:24 UTC (rev 1984)
@@ -25,6 +25,7 @@
 #include "windows.h"
 #endif
 
+#define INCLUDE_JTAG_INTERFACE_H
 #include "jtag.h"
 #include "time_support.h"
 #include "bitq.h"

Modified: trunk/src/jtag/rlink/rlink.c
===================================================================
--- trunk/src/jtag/rlink/rlink.c	2009-06-01 22:54:42 UTC (rev 1983)
+++ trunk/src/jtag/rlink/rlink.c	2009-06-01 23:01:24 UTC (rev 1984)
@@ -28,6 +28,7 @@
 #endif
 
 /* project specific includes */
+#define INCLUDE_JTAG_INTERFACE_H
 #include "jtag.h"
 #include "rlink.h"
 #include "st7.h"

Modified: trunk/src/jtag/usbprog.c
===================================================================
--- trunk/src/jtag/usbprog.c	2009-06-01 22:54:42 UTC (rev 1983)
+++ trunk/src/jtag/usbprog.c	2009-06-01 23:01:24 UTC (rev 1984)
@@ -34,6 +34,7 @@
 #include "config.h"
 #endif
 
+#define INCLUDE_JTAG_INTERFACE_H
 #include "jtag.h"
 
 #include <usb.h>

Modified: trunk/src/jtag/vsllink.c
===================================================================
--- trunk/src/jtag/vsllink.c	2009-06-01 22:54:42 UTC (rev 1983)
+++ trunk/src/jtag/vsllink.c	2009-06-01 23:01:24 UTC (rev 1984)
@@ -26,6 +26,7 @@
 #include "config.h"
 #endif
 
+#define INCLUDE_JTAG_INTERFACE_H
 #include "jtag.h"
 
 #include <usb.h>

Modified: trunk/src/jtag/zy1000.c
===================================================================
--- trunk/src/jtag/zy1000.c	2009-06-01 22:54:42 UTC (rev 1983)
+++ trunk/src/jtag/zy1000.c	2009-06-01 23:01:24 UTC (rev 1984)
@@ -21,6 +21,7 @@
 #endif
 
 #define INCLUDE_JTAG_MINIDRIVER_H
+#define INCLUDE_JTAG_INTERFACE_H
 #include "embeddedice.h"
 #include "bitbang.h"
 

Modified: trunk/src/xsvf/xsvf.c
===================================================================
--- trunk/src/xsvf/xsvf.c	2009-06-01 22:54:42 UTC (rev 1983)
+++ trunk/src/xsvf/xsvf.c	2009-06-01 23:01:24 UTC (rev 1984)
@@ -41,6 +41,7 @@
 #include "config.h"
 #endif
 
+#define INCLUDE_JTAG_INTERFACE_H
 #include "xsvf.h"
 #include "jtag.h"
 

[Openocd-svn] r1983 - trunk/src/jtag

[<zw...@ma...>]

Author: zwelch
Date: 2009-06-02 00:54:42 +0200 (Tue, 02 Jun 2009)
New Revision: 1983

Modified:
   trunk/src/jtag/jtag.c
   trunk/src/jtag/jtag.h
   trunk/src/jtag/zy1000.c
Log:
Encapsulate JTAG minidriver functions, plan for new header file.

Modified: trunk/src/jtag/jtag.c
===================================================================
--- trunk/src/jtag/jtag.c	2009-06-01 21:54:35 UTC (rev 1982)
+++ trunk/src/jtag/jtag.c	2009-06-01 22:54:42 UTC (rev 1983)
@@ -28,6 +28,7 @@
 #include "config.h"
 #endif
 
+#define INCLUDE_JTAG_MINIDRIVER_H
 #include "jtag.h"
 
 #ifdef HAVE_STRINGS_H

Modified: trunk/src/jtag/jtag.h
===================================================================
--- trunk/src/jtag/jtag.h	2009-06-01 21:54:35 UTC (rev 1982)
+++ trunk/src/jtag/jtag.h	2009-06-01 22:54:42 UTC (rev 1983)
@@ -557,7 +557,6 @@
 extern void jtag_add_ir_scan(int num_fields, scan_field_t* fields, tap_state_t endstate);
 /* same as jtag_add_ir_scan except no verify is performed */
 extern void jtag_add_ir_scan_noverify(int num_fields, const scan_field_t *fields, tap_state_t state);
-extern int  interface_jtag_add_ir_scan(int num_fields, const scan_field_t* fields, tap_state_t endstate);
 extern void jtag_add_dr_scan(int num_fields, const scan_field_t* fields, tap_state_t endstate);
 
 /* set in_value to point to 32 bits of memory to scan into. This function
@@ -582,11 +581,8 @@
 
 /* This version of jtag_add_dr_scan() uses the check_value/mask fields */
 extern void jtag_add_dr_scan_check(int num_fields, scan_field_t* fields, tap_state_t endstate);
-extern int  interface_jtag_add_dr_scan(int num_fields, const scan_field_t* fields, tap_state_t endstate);
 extern void jtag_add_plain_ir_scan(int num_fields, const scan_field_t* fields, tap_state_t endstate);
-extern int  interface_jtag_add_plain_ir_scan(int num_fields, const scan_field_t* fields, tap_state_t endstate);
 extern void jtag_add_plain_dr_scan(int num_fields, const scan_field_t* fields, tap_state_t endstate);
-extern int  interface_jtag_add_plain_dr_scan(int num_fields, const scan_field_t* fields, tap_state_t endstate);
 
 
 /* Simplest/typical callback - do some conversion on the data clocked in.
@@ -657,7 +653,6 @@
  * of start state.
  */
 extern void jtag_add_tlr(void);
-extern int  interface_jtag_add_tlr(void);
 
 /* Application code *must* assume that interfaces will
  * implement transitions between states with different
@@ -701,7 +696,6 @@
  * application.
  */
 extern void jtag_add_pathmove(int num_states, const tap_state_t* path);
-extern int  interface_jtag_add_pathmove(int num_states, const tap_state_t* path);
 
 /* go to TAP_IDLE, if we're not already there and cycle
  * precisely num_cycles in the TAP_IDLE after which move
@@ -711,7 +705,6 @@
  * to endstate via TAP_IDLE
  */
 extern void jtag_add_runtest(int num_cycles, tap_state_t endstate);
-extern int  interface_jtag_add_runtest(int num_cycles, tap_state_t endstate);
 
 /* A reset of the TAP state machine can be requested.
  *
@@ -737,18 +730,8 @@
  */
 extern void jtag_add_reset(int req_tlr_or_trst, int srst);
 
-/* this drives the actual srst and trst pins. srst will always be 0
- * if jtag_reset_config & RESET_SRST_PULLS_TRST != 0 and ditto for
- * trst.
- *
- * the higher level jtag_add_reset will invoke jtag_add_tlr() if
- * approperiate
- */
-extern int  interface_jtag_add_reset(int trst, int srst);
 extern void jtag_add_end_state(tap_state_t endstate);
-extern int  interface_jtag_add_end_state(tap_state_t endstate);
 extern void jtag_add_sleep(u32 us);
-extern int  interface_jtag_add_sleep(u32 us);
 
 
 /**
@@ -757,7 +740,6 @@
  * stable, then queues up clock_count clocks for transmission.
  */
 void jtag_add_clocks(int num_cycles);
-int  interface_jtag_add_clocks(int num_cycles);
 
 
 /*
@@ -806,7 +788,6 @@
 
 
 /* can be implemented by hw+sw */
-extern int            interface_jtag_execute_queue(void);
 extern int            jtag_power_dropout(int* dropout);
 extern int            jtag_srst_asserted(int* srst_asserted);
 
@@ -843,7 +824,42 @@
 #define ERROR_JTAG_NOT_STABLE_STATE  (-105)
 #define ERROR_JTAG_DEVICE_ERROR      (-107)
 
+#ifdef INCLUDE_JTAG_MINIDRIVER_H
 
+extern int interface_jtag_add_ir_scan(
+		int num_fields, const scan_field_t* fields,
+		tap_state_t endstate);
+extern int interface_jtag_add_plain_ir_scan(
+		int num_fields, const scan_field_t* fields,
+		tap_state_t endstate);
+
+extern int interface_jtag_add_dr_scan(
+		int num_fields, const scan_field_t* fields,
+		tap_state_t endstate);
+extern int interface_jtag_add_plain_dr_scan(
+		int num_fields, const scan_field_t* fields,
+		tap_state_t endstate);
+
+extern int interface_jtag_add_tlr(void);
+extern int interface_jtag_add_pathmove(int num_states, const tap_state_t* path);
+extern int interface_jtag_add_runtest(int num_cycles, tap_state_t endstate);
+
+/**
+ * This drives the actual srst and trst pins. srst will always be 0
+ * if jtag_reset_config & RESET_SRST_PULLS_TRST != 0 and ditto for
+ * trst.
+ *
+ * the higher level jtag_add_reset will invoke jtag_add_tlr() if
+ * approperiate
+ */
+extern int interface_jtag_add_reset(int trst, int srst);
+extern int interface_jtag_add_end_state(tap_state_t endstate);
+extern int interface_jtag_add_sleep(u32 us);
+extern int interface_jtag_add_clocks(int num_cycles);
+extern int interface_jtag_execute_queue(void);
+
+#endif // INCLUDE_JTAG_MINIDRIVER_H
+
 /* this allows JTAG devices to implement the entire jtag_xxx() layer in hw/sw */
 #ifdef HAVE_JTAG_MINIDRIVER_H
 /* Here a #define MINIDRIVER() and an inline version of hw fifo interface_jtag_add_dr_out can be defined */

Modified: trunk/src/jtag/zy1000.c
===================================================================
--- trunk/src/jtag/zy1000.c	2009-06-01 21:54:35 UTC (rev 1982)
+++ trunk/src/jtag/zy1000.c	2009-06-01 22:54:42 UTC (rev 1983)
@@ -20,6 +20,7 @@
 #include "config.h"
 #endif
 
+#define INCLUDE_JTAG_MINIDRIVER_H
 #include "embeddedice.h"
 #include "bitbang.h"
 

[Openocd-svn] r1982 - trunk/src/jtag

[<zw...@ma...>]

Author: zwelch
Date: 2009-06-01 23:54:35 +0200 (Mon, 01 Jun 2009)
New Revision: 1982

Modified:
   trunk/src/jtag/jtag.h
Log:
Remove unused in_handler_t type definition from jtag.h

Modified: trunk/src/jtag/jtag.h
===================================================================
--- trunk/src/jtag/jtag.h	2009-06-01 21:53:19 UTC (rev 1981)
+++ trunk/src/jtag/jtag.h	2009-06-01 21:54:35 UTC (rev 1982)
@@ -258,9 +258,6 @@
 extern tap_state_t cmd_queue_end_state;         /* finish DR scans in dr_end_state */
 extern tap_state_t cmd_queue_cur_state;         /* current TAP state */
 
-struct scan_field_s;
-typedef int (*in_handler_t)(u8* in_value, void* priv, struct scan_field_s* field);
-
 typedef struct scan_field_s
 {
 	jtag_tap_t* tap;                /* tap pointer this instruction refers to */

[Openocd-svn] r1981 - trunk/src/target

[<zw...@ma...>]

Author: zwelch
Date: 2009-06-01 23:53:19 +0200 (Mon, 01 Jun 2009)
New Revision: 1981

Modified:
   trunk/src/target/mips_ejtag.c
   trunk/src/target/mips_ejtag.h
   trunk/src/target/mips_m4k.c
Log:
Scrub final vestiges of in_handler from mips target APIs.

Modified: trunk/src/target/mips_ejtag.c
===================================================================
--- trunk/src/target/mips_ejtag.c	2009-06-01 19:58:20 UTC (rev 1980)
+++ trunk/src/target/mips_ejtag.c	2009-06-01 21:53:19 UTC (rev 1981)
@@ -56,7 +56,7 @@
 	return ERROR_OK;
 }
 
-int mips_ejtag_get_idcode(mips_ejtag_t *ejtag_info, u32 *idcode, in_handler_t handler)
+int mips_ejtag_get_idcode(mips_ejtag_t *ejtag_info, u32 *idcode)
 {
 	scan_field_t field;
 
@@ -83,7 +83,7 @@
 	return ERROR_OK;
 }
 
-int mips_ejtag_get_impcode(mips_ejtag_t *ejtag_info, u32 *impcode, in_handler_t handler)
+int mips_ejtag_get_impcode(mips_ejtag_t *ejtag_info, u32 *impcode)
 {
 	scan_field_t field;
 
@@ -258,7 +258,7 @@
 {
 	u32 ejtag_version;
 
-	mips_ejtag_get_impcode(ejtag_info, &ejtag_info->impcode, NULL);
+	mips_ejtag_get_impcode(ejtag_info, &ejtag_info->impcode);
 	LOG_DEBUG("impcode: 0x%8.8x", ejtag_info->impcode);
 
 	/* get ejtag version */

Modified: trunk/src/target/mips_ejtag.h
===================================================================
--- trunk/src/target/mips_ejtag.h	2009-06-01 19:58:20 UTC (rev 1980)
+++ trunk/src/target/mips_ejtag.h	2009-06-01 21:53:19 UTC (rev 1981)
@@ -109,8 +109,8 @@
 extern int mips_ejtag_set_instr(mips_ejtag_t *ejtag_info, int new_instr, void *delete_me_and_submit_patch);
 extern int mips_ejtag_enter_debug(mips_ejtag_t *ejtag_info);
 extern int mips_ejtag_exit_debug(mips_ejtag_t *ejtag_info);
-extern int mips_ejtag_get_impcode(mips_ejtag_t *ejtag_info, u32 *impcode, in_handler_t handler);
-extern int mips_ejtag_get_idcode(mips_ejtag_t *ejtag_info, u32 *idcode, in_handler_t handler);
+extern int mips_ejtag_get_impcode(mips_ejtag_t *ejtag_info, u32 *impcode);
+extern int mips_ejtag_get_idcode(mips_ejtag_t *ejtag_info, u32 *idcode);
 extern int mips_ejtag_drscan_32(mips_ejtag_t *ejtag_info, u32 *data);
 
 extern int mips_ejtag_init(mips_ejtag_t *ejtag_info);

Modified: trunk/src/target/mips_m4k.c
===================================================================
--- trunk/src/target/mips_m4k.c	2009-06-01 19:58:20 UTC (rev 1980)
+++ trunk/src/target/mips_m4k.c	2009-06-01 21:53:19 UTC (rev 1981)
@@ -857,7 +857,7 @@
 
 	if (!target_was_examined(target))
 	{
-		mips_ejtag_get_idcode(ejtag_info, &idcode, NULL);
+		mips_ejtag_get_idcode(ejtag_info, &idcode);
 		ejtag_info->idcode = idcode;
 		
 		if (((idcode >> 1) & 0x7FF) == 0x29)

[Openocd-svn] r1980 - in trunk/src: jtag xsvf

[<oh...@ma...>]

Author: oharboe
Date: 2009-06-01 21:58:20 +0200 (Mon, 01 Jun 2009)
New Revision: 1980

Modified:
   trunk/src/jtag/jtag.c
   trunk/src/jtag/jtag.h
   trunk/src/xsvf/xsvf.c
Log:
added jtag_add_statemove() helper fn(actual fn written by Dick Hollonbeck, I just moved it).

Modified: trunk/src/jtag/jtag.c
===================================================================
--- trunk/src/jtag/jtag.c	2009-06-01 19:06:11 UTC (rev 1979)
+++ trunk/src/jtag/jtag.c	2009-06-01 19:58:20 UTC (rev 1980)
@@ -3719,3 +3719,90 @@
 }
 
 /*-----</Cable Helper API>--------------------------------------*/
+
+
+/**
+ * Function jtag_add_statemove
+ * moves from the current state to the goal \a state. This needs
+ * to be handled according to the xsvf spec, see the XSTATE command
+ * description.
+ */
+int jtag_add_statemove(tap_state_t goal_state)
+{
+	int retval = ERROR_OK;
+
+	tap_state_t moves[8];
+	tap_state_t cur_state = cmd_queue_cur_state;
+	int i;
+	int tms_bits;
+	int	tms_count;
+
+	LOG_DEBUG( "cur_state=%s goal_state=%s",
+		tap_state_name(cur_state),
+		tap_state_name(goal_state) );
+
+
+	/*	From the XSVF spec, pertaining to XSTATE:
+
+		For special states known as stable states (Test-Logic-Reset,
+		Run-Test/Idle, Pause-DR, Pause- IR), an XSVF interpreter follows
+		predefined TAP state paths when the starting state is a stable state and
+		when the XSTATE specifies a new stable state (see the STATE command in
+		the [Ref 5] for the TAP state paths between stable states). For
+		non-stable states, XSTATE should specify a state that is only one TAP
+		state transition distance from the current TAP state to avoid undefined
+		TAP state paths. A sequence of multiple XSTATE commands can be issued to
+		transition the TAP through a specific state path.
+	*/
+
+	if (goal_state==cur_state )
+		;	/* nothing to do */
+
+	else if( goal_state==TAP_RESET )
+	{
+		jtag_add_tlr();
+	}
+
+	else if( tap_is_state_stable(cur_state) && tap_is_state_stable(goal_state) )
+	{
+		/* 	note: unless tms_bits holds a path that agrees with [Ref 5] in above
+			spec, then this code is not fully conformant to the xsvf spec.  This
+			puts a burden on tap_get_tms_path() function from the xsvf spec.
+			If in doubt, you should confirm that that burden is being met.
+		*/
+
+		tms_bits  = tap_get_tms_path(cur_state, goal_state);
+		tms_count = tap_get_tms_path_len(cur_state, goal_state);
+
+		assert( (unsigned) tms_count < DIM(moves) );
+
+		for (i=0;   i<tms_count;   i++, tms_bits>>=1)
+		{
+			bool bit = tms_bits & 1;
+
+			cur_state = tap_state_transition(cur_state, bit);
+			moves[i] = cur_state;
+		}
+
+		jtag_add_pathmove(tms_count, moves);
+	}
+
+	/* 	else state must be immediately reachable in one clock cycle, and does not
+		need to be a stable state.
+	*/
+	else if( tap_state_transition(cur_state, true)  == goal_state
+		||   tap_state_transition(cur_state, false) == goal_state )
+	{
+		/* move a single state */
+		moves[0] = goal_state;
+		jtag_add_pathmove( 1, moves );
+	}
+
+	else
+	{
+		retval = ERROR_FAIL;
+	}
+
+	return retval;
+}
+

Modified: trunk/src/jtag/jtag.h
===================================================================
--- trunk/src/jtag/jtag.h	2009-06-01 19:06:11 UTC (rev 1979)
+++ trunk/src/jtag/jtag.h	2009-06-01 19:58:20 UTC (rev 1980)
@@ -894,4 +894,14 @@
 }
 
 
+
+
+/**
+ * Function jtag_add_statemove
+ * moves from the current state to the goal \a state. This needs
+ * to be handled according to the xsvf spec, see the XSTATE command
+ * description.
+ */
+extern int jtag_add_statemove(tap_state_t goal_state);
+
 #endif /* JTAG_H */

Modified: trunk/src/xsvf/xsvf.c
===================================================================
--- trunk/src/xsvf/xsvf.c	2009-06-01 19:06:11 UTC (rev 1979)
+++ trunk/src/xsvf/xsvf.c	2009-06-01 19:58:20 UTC (rev 1980)
@@ -160,92 +160,7 @@
 }
 
 
-/**
- * Function xsvf_add_statemove
- * moves from the current state to the goal \a state. This needs
- * to be handled according to the xsvf spec, see the XSTATE command
- * description.
- */
-static int xsvf_add_statemove(tap_state_t goal_state)
-{
-	int retval = ERROR_OK;
 
-	tap_state_t moves[8];
-	tap_state_t cur_state = cmd_queue_cur_state;
-	int i;
-	int tms_bits;
-	int	tms_count;
-
-	LOG_DEBUG( "cur_state=%s goal_state=%s",
-		tap_state_name(cur_state),
-		tap_state_name(goal_state) );
-
-
-	/*	From the XSVF spec, pertaining to XSTATE:
-
-		For special states known as stable states (Test-Logic-Reset,
-		Run-Test/Idle, Pause-DR, Pause- IR), an XSVF interpreter follows
-		predefined TAP state paths when the starting state is a stable state and
-		when the XSTATE specifies a new stable state (see the STATE command in
-		the [Ref 5] for the TAP state paths between stable states). For
-		non-stable states, XSTATE should specify a state that is only one TAP
-		state transition distance from the current TAP state to avoid undefined
-		TAP state paths. A sequence of multiple XSTATE commands can be issued to
-		transition the TAP through a specific state path.
-	*/
-
-	if (goal_state==cur_state )
-		;	/* nothing to do */
-
-	else if( goal_state==TAP_RESET )
-	{
-		jtag_add_tlr();
-	}
-
-	else if( tap_is_state_stable(cur_state) && tap_is_state_stable(goal_state) )
-	{
-		/* 	note: unless tms_bits holds a path that agrees with [Ref 5] in above
-			spec, then this code is not fully conformant to the xsvf spec.  This
-			puts a burden on tap_get_tms_path() function from the xsvf spec.
-			If in doubt, you should confirm that that burden is being met.
-		*/
-
-		tms_bits  = tap_get_tms_path(cur_state, goal_state);
-		tms_count = tap_get_tms_path_len(cur_state, goal_state);
-
-		assert( (unsigned) tms_count < DIM(moves) );
-
-		for (i=0;   i<tms_count;   i++, tms_bits>>=1)
-		{
-			bool bit = tms_bits & 1;
-
-			cur_state = tap_state_transition(cur_state, bit);
-			moves[i] = cur_state;
-		}
-
-		jtag_add_pathmove(tms_count, moves);
-	}
-
-	/* 	else state must be immediately reachable in one clock cycle, and does not
-		need to be a stable state.
-	*/
-	else if( tap_state_transition(cur_state, true)  == goal_state
-		||   tap_state_transition(cur_state, false) == goal_state )
-	{
-		/* move a single state */
-		moves[0] = goal_state;
-		jtag_add_pathmove( 1, moves );
-	}
-
-	else
-	{
-		retval = ERROR_FAIL;
-	}
-
-	return retval;
-}
-
-
 int xsvf_register_commands(struct command_context_s *cmd_ctx)
 {
 	register_command(cmd_ctx, NULL, "xsvf", handle_xsvf_command,
@@ -518,7 +433,7 @@
 				/* See page 19 of XSVF spec regarding opcode "XSDR" */
 				if (xruntest)
 				{
-					xsvf_add_statemove(TAP_IDLE);
+					jtag_add_statemove(TAP_IDLE);
 
 					if (runtest_requires_tck)
 						jtag_add_clocks(xruntest);
@@ -526,7 +441,7 @@
 						jtag_add_sleep(xruntest);
 				}
 				else if (xendir != TAP_DRPAUSE)	/* we are already in TAP_DRPAUSE */
-					xsvf_add_statemove(xenddr);
+					jtag_add_statemove(xenddr);
 			}
 			break;
 
@@ -590,7 +505,7 @@
 					the XSTATE.
 				*/
 
-				if( xsvf_add_statemove( mystate ) != ERROR_OK )
+				if( jtag_add_statemove( mystate ) != ERROR_OK )
 				{
 					/*	For special states known as stable states
 						(Test-Logic-Reset, Run-Test/Idle, Pause-DR, Pause- IR),
@@ -794,9 +709,9 @@
 				}
 				else
 				{
-					xsvf_add_statemove( wait_state );
+					jtag_add_statemove( wait_state );
 					jtag_add_sleep(delay);
-					xsvf_add_statemove( end_state );
+					jtag_add_statemove( end_state );
 				}
 			}
 			break;
@@ -847,13 +762,13 @@
 					unsupported = 1;
 				}
 
-				xsvf_add_statemove( wait_state );
+				jtag_add_statemove( wait_state );
 
 				jtag_add_clocks( clock_count );
 
 				jtag_add_sleep( usecs );
 
-				xsvf_add_statemove( end_state );
+				jtag_add_statemove( end_state );
 			}
 			break;
 
@@ -925,7 +840,7 @@
 				{
 					scan_field_t field;
 
-					xsvf_add_statemove( loop_state );
+					jtag_add_statemove( loop_state );
 					jtag_add_clocks(loop_clocks);
 					jtag_add_sleep(loop_usecs);
 
@@ -1003,7 +918,7 @@
 			LOG_DEBUG("xsvf failed, setting taps to reasonable state");
 
 			/* upon error, return the TAPs to a reasonable state */
-			xsvf_add_statemove( TAP_IDLE );
+			jtag_add_statemove( TAP_IDLE );
 			jtag_execute_queue();
 			break;
 		}

[Openocd-svn] r1979 - trunk/src/target

[<oh...@ma...>]

Author: oharboe
Date: 2009-06-01 21:06:11 +0200 (Mon, 01 Jun 2009)
New Revision: 1979

Modified:
   trunk/src/target/target.c
Log:
fix warning for a variable that GCC thought might be uninitialized(which it can't be).

Modified: trunk/src/target/target.c
===================================================================
--- trunk/src/target/target.c	2009-06-01 19:00:54 UTC (rev 1978)
+++ trunk/src/target/target.c	2009-06-01 19:06:11 UTC (rev 1979)
@@ -1962,7 +1962,7 @@
 					"0x%8.8x: ", address + (i*size));
 		}
 
-		u32 value;
+		u32 value=0;
 		const u8 *value_ptr = buffer + i * size;
 		switch (size) {
 		case 4: value = target_buffer_get_u32(target, value_ptr); break;

[Openocd-svn] r1978 - trunk/src/svf

[<oh...@ma...>]

Author: oharboe
Date: 2009-06-01 21:00:54 +0200 (Mon, 01 Jun 2009)
New Revision: 1978

Modified:
   trunk/src/svf/svf.c
Log:
simon qian <sim...@gm...> stop incestious communication with lower jtag.c layers

Modified: trunk/src/svf/svf.c
===================================================================
--- trunk/src/svf/svf.c	2009-06-01 03:06:46 UTC (rev 1977)
+++ trunk/src/svf/svf.c	2009-06-01 19:00:54 UTC (rev 1978)
@@ -90,6 +90,38 @@
 	"ABSENT"
 };
 
+typedef struct
+{
+	tap_state_t from;
+	tap_state_t to;
+	u32 num_of_moves;
+	tap_state_t paths[8];
+}svf_statemove_t;
+
+svf_statemove_t svf_statemoves[] = 
+{
+	// from			to				num_of_moves,	paths[8]
+//	{TAP_RESET,		TAP_RESET,		1,				{TAP_RESET}},
+	{TAP_RESET,		TAP_IDLE,		2,				{TAP_RESET, TAP_IDLE}},
+	{TAP_RESET,		TAP_DRPAUSE,	6,				{TAP_RESET, TAP_IDLE, TAP_DRSELECT, TAP_DRCAPTURE, TAP_DREXIT1, TAP_DRPAUSE}},
+	{TAP_RESET,		TAP_IRPAUSE,	7,				{TAP_RESET, TAP_IDLE, TAP_DRSELECT, TAP_IRSELECT, TAP_IRCAPTURE, TAP_IREXIT1, TAP_IRPAUSE}},
+	
+//	{TAP_IDLE,		TAP_RESET,		4,				{TAP_IDLE, TAP_DRSELECT, TAP_IRSELECT, TAP_RESET}},
+	{TAP_IDLE,		TAP_IDLE,		1,				{TAP_IDLE}},
+	{TAP_IDLE,		TAP_DRPAUSE,	5,				{TAP_IDLE, TAP_DRSELECT, TAP_DRCAPTURE, TAP_DREXIT1, TAP_DRPAUSE}},
+	{TAP_IDLE,		TAP_IRPAUSE,	6,				{TAP_IDLE, TAP_DRSELECT, TAP_IRSELECT, TAP_IRCAPTURE, TAP_IREXIT1, TAP_IRPAUSE}},
+	
+//	{TAP_DRPAUSE,	TAP_RESET,		6,				{TAP_DRPAUSE, TAP_DREXIT2, TAP_DRUPDATE, TAP_DRSELECT, TAP_IRSELECT, TAP_RESET}},
+	{TAP_DRPAUSE,	TAP_IDLE,		4,				{TAP_DRPAUSE, TAP_DREXIT2, TAP_DRUPDATE, TAP_IDLE}},
+	{TAP_DRPAUSE,	TAP_DRPAUSE,	7,				{TAP_DRPAUSE, TAP_DREXIT2, TAP_DRUPDATE, TAP_DRSELECT, TAP_DRCAPTURE, TAP_DREXIT1, TAP_DRPAUSE}},
+	{TAP_DRPAUSE,	TAP_IRPAUSE,	8,				{TAP_DRPAUSE, TAP_DREXIT2, TAP_DRUPDATE, TAP_DRSELECT, TAP_IRSELECT, TAP_IRCAPTURE, TAP_IREXIT1, TAP_IRPAUSE}},
+	
+//	{TAP_IRPAUSE,	TAP_RESET,		6,				{TAP_IRPAUSE, TAP_IREXIT2, TAP_IRUPDATE, TAP_DRSELECT, TAP_IRSELECT, TAP_RESET}},
+	{TAP_IRPAUSE,	TAP_IDLE,		4,				{TAP_IRPAUSE, TAP_IREXIT2, TAP_IRUPDATE, TAP_IDLE}},
+	{TAP_IRPAUSE,	TAP_DRPAUSE,	7,				{TAP_IRPAUSE, TAP_IREXIT2, TAP_IRUPDATE, TAP_DRSELECT, TAP_DRCAPTURE, TAP_DREXIT1, TAP_DRPAUSE}},
+	{TAP_IRPAUSE,	TAP_IRPAUSE,	8,				{TAP_IRPAUSE, TAP_IREXIT2, TAP_IRUPDATE, TAP_DRSELECT, TAP_IRSELECT, TAP_IRCAPTURE, TAP_IREXIT1, TAP_IRPAUSE}}
+};
+
 char *svf_tap_state_name[TAP_NUM_STATES];
 
 #define XXR_TDI						(1 << 0)
@@ -175,7 +207,6 @@
 static int svf_line_number = 1;
 
 static jtag_tap_t *tap = NULL;
-static tap_state_t last_state = TAP_RESET;
 
 #define SVF_MAX_BUFFER_SIZE_TO_COMMIT	(4 * 1024)
 static u8 *svf_tdi_buffer = NULL, *svf_tdo_buffer = NULL, *svf_mask_buffer = NULL;
@@ -266,6 +297,38 @@
 	return ret;
 }
 
+static int svf_add_statemove(tap_state_t state_to)
+{
+	tap_state_t state_from = cmd_queue_cur_state;
+	u8 index;
+
+	for (index = 0; index < dimof(svf_statemoves); index++)
+	{
+		if ((svf_statemoves[index].from == state_from) 
+			&& (svf_statemoves[index].to == state_to))
+		{
+			if (TAP_RESET == state_from)
+			{
+				jtag_add_tlr();
+				if (svf_statemoves[index].num_of_moves > 1)
+				{
+					jtag_add_pathmove(svf_statemoves[index].num_of_moves - 1, svf_statemoves[index].paths + 1);
+				}
+			}
+			else
+			{
+				if (svf_statemoves[index].num_of_moves > 0)
+				{
+					jtag_add_pathmove(svf_statemoves[index].num_of_moves, svf_statemoves[index].paths);
+				}
+			}
+			return ERROR_OK;
+		}
+	}
+	LOG_ERROR("can not move to %s", tap_state_svf_name(state_to));
+	return ERROR_FAIL;
+}
+
 static int handle_svf_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
 {
 #define SVF_NUM_OF_OPTIONS			1
@@ -355,6 +418,7 @@
 	{
 		svf_tap_state_name[i] = (char *)tap_state_svf_name(i);
 	}
+
 	// TAP_RESET
 	jtag_add_tlr();
 
@@ -739,10 +803,6 @@
 	return ERROR_OK;
 }
 
-// not good to use this
-extern void* cmd_queue_alloc(size_t size);
-extern void jtag_queue_command(jtag_command_t * cmd);
-
 static int svf_run_command(struct command_context_s *cmd_ctx, char *cmd_str)
 {
 	char *argus[256], command;
@@ -1030,16 +1090,10 @@
 			field.tap = tap;
 			field.num_bits = i;
 			field.out_value = &svf_tdi_buffer[svf_buffer_index];
-			
 			field.in_value = &svf_tdi_buffer[svf_buffer_index];
-			
-			
-			
-			
 			jtag_add_plain_dr_scan(1, &field, svf_para.dr_end_state);
 
 			svf_buffer_index += (i + 7) >> 3;
-			last_state = svf_para.dr_end_state;
 		}
 		else if (SIR == command)
 		{
@@ -1131,16 +1185,10 @@
 			field.tap = tap;
 			field.num_bits = i;
 			field.out_value = &svf_tdi_buffer[svf_buffer_index];
-			
 			field.in_value = &svf_tdi_buffer[svf_buffer_index];
-			
-			
-			
-			
 			jtag_add_plain_ir_scan(1, &field, svf_para.ir_end_state);
 
 			svf_buffer_index += (i + 7) >> 3;
-			last_state = svf_para.ir_end_state;
 		}
 		break;
 	case PIO:
@@ -1240,35 +1288,19 @@
 				// TODO: do runtest
 #if 1
 				// enter into run_state if necessary
-				if (last_state != svf_para.runtest_run_state)
+				if (cmd_queue_cur_state != svf_para.runtest_run_state)
 				{
-					jtag_command_t * cmd = cmd_queue_alloc(sizeof(jtag_command_t));
-					
-					jtag_queue_command(cmd);
-				
-					cmd->type = JTAG_STATEMOVE;
-					cmd->cmd.statemove = cmd_queue_alloc(sizeof(statemove_command_t));
-					cmd->cmd.statemove->end_state = svf_para.runtest_run_state;
-
-					cmd_queue_end_state = cmd_queue_cur_state = cmd->cmd.statemove->end_state;
+					svf_add_statemove(svf_para.runtest_run_state);
 				}
 
 				// call jtag_add_clocks
 				jtag_add_clocks(run_count);
 
+				// move to end_state if necessary
 				if (svf_para.runtest_end_state != svf_para.runtest_run_state)
 				{
-					// move to end_state
-					jtag_command_t * cmd = cmd_queue_alloc(sizeof(jtag_command_t));
-					
-					jtag_queue_command(cmd);
-					cmd->type = JTAG_STATEMOVE;
-					cmd->cmd.statemove = cmd_queue_alloc(sizeof(statemove_command_t));
-					cmd->cmd.statemove->end_state = svf_para.runtest_end_state;
-
-					cmd_queue_end_state = cmd_queue_cur_state = cmd->cmd.statemove->end_state;
+					svf_add_statemove(svf_para.runtest_end_state);
 				}
-				last_state = svf_para.runtest_end_state;
 #else
 				if (svf_para.runtest_run_state != TAP_IDLE)
 				{
@@ -1332,7 +1364,6 @@
 					// last state MUST be stable state
 					// TODO: call path_move
 					jtag_add_pathmove(num_of_argu, path);
-					last_state = path[num_of_argu - 1];
 					LOG_DEBUG("\tmove to %s by path_move", svf_tap_state_name[path[num_of_argu - 1]]);
 				}
 				else
@@ -1355,18 +1386,9 @@
 			if (svf_tap_state_is_stable(state))
 			{
 				// TODO: move to state
-				jtag_command_t * cmd = cmd_queue_alloc(sizeof(jtag_command_t));
-					
-				jtag_queue_command(cmd);
-				
-				cmd->type = JTAG_STATEMOVE;
-				cmd->cmd.statemove = cmd_queue_alloc(sizeof(statemove_command_t));
-				cmd->cmd.statemove->end_state = state;
+				svf_add_statemove(state);
 
-				cmd_queue_end_state = cmd_queue_cur_state = cmd->cmd.statemove->end_state;
-				last_state = state;
-
-				LOG_DEBUG("\tmove to %s by state_move", svf_tap_state_name[state]);
+				LOG_DEBUG("\tmove to %s by svf_add_statemove", svf_tap_state_name[state]);
 			}
 			else
 			{
@@ -1392,7 +1414,6 @@
 			switch (i_tmp)
 			{
 			case TRST_ON:
-				last_state = TAP_RESET;
 				jtag_add_reset(1, 0);
 				break;
 			case TRST_Z:

[Openocd-svn] r1977 - trunk/doc

[<zw...@ma...>]

Author: zwelch
Date: 2009-06-01 05:06:46 +0200 (Mon, 01 Jun 2009)
New Revision: 1977

Modified:
   trunk/doc/openocd.texi
Log:
David Brownell <da...@pa...>:

Uplevel the arch commands to be a chapter; they really
don't fit in the "general commands" category.


Modified: trunk/doc/openocd.texi
===================================================================
--- trunk/doc/openocd.texi	2009-06-01 03:06:25 UTC (rev 1976)
+++ trunk/doc/openocd.texi	2009-06-01 03:06:46 UTC (rev 1977)
@@ -74,6 +74,7 @@
 * Flash Commands::                   Flash Commands
 * NAND Flash Commands::              NAND Flash Commands
 * General Commands::                 General Commands
+* Architecture and Core Commands::   Architecture and Core Commands
 * JTAG Commands::                    JTAG Commands
 * Sample Scripts::                   Sample Target Scripts
 * TFTP::                             TFTP
@@ -3617,17 +3618,18 @@
 
 @end itemize
 
-@section Architecture and Core Specific Commands
+@node Architecture and Core Commands
+@chapter Architecture and Core Commands
 @cindex Architecture Specific Commands
 @cindex Core Specific Commands
 
 Most CPUs have specialized JTAG operations to support debugging.
 OpenOCD packages most such operations in its standard command framework.
 Some of those operations don't fit well in that framework, so they are
-exposed here using architecture or implementation specific commands.
+exposed here as architecture or implementation (core) specific commands.
 
 @anchor{ARM Tracing}
-@subsection ARM Tracing
+@section ARM Tracing
 @cindex ETM
 @cindex ETB
 
@@ -3670,7 +3672,7 @@
 shared with eventual Nexus-style trace module support.
 @end quotation
 
-@subsubsection ETM Configuration
+@subsection ETM Configuration
 ETM setup is coupled with the trace port driver configuration.
 
 @deffn {Config Command} {etm config} target width mode clocking driver
@@ -3722,7 +3724,7 @@
 @emph{Buggy and effectively a NOP ... @var{percent} from 2..100}
 @end deffn
 
-@subsubsection ETM Trace Operation
+@subsection ETM Trace Operation
 
 After setting up the ETM, you can use it to collect data.
 That data can be exported to files for later analysis.
@@ -3754,7 +3756,7 @@
 @end deffn
 
 @anchor{Trace Port Drivers}
-@subsubsection Trace Port Drivers
+@subsection Trace Port Drivers
 
 To use an ETM trace port it must be associated with a driver.
 
@@ -3801,7 +3803,7 @@
 @end deffn
 
 
-@subsection ARMv4 and ARMv5 Architecture
+@section ARMv4 and ARMv5 Architecture
 @cindex ARMv4 specific commands
 @cindex ARMv5 specific commands
 
@@ -3833,7 +3835,7 @@
 register value. 
 @end deffn
 
-@subsubsection ARM7 and ARM9 specific commands
+@subsection ARM7 and ARM9 specific commands
 @cindex ARM7 specific commands
 @cindex ARM9 specific commands
 
@@ -3900,7 +3902,7 @@
 with @command{arm7_9 write_xpsr}.
 @end deffn
 
-@subsubsection ARM720T specific commands
+@subsection ARM720T specific commands
 @cindex ARM720T specific commands
 
 These commands are available to ARM720T based CPUs,
@@ -3935,7 +3937,7 @@
 and display the result.
 @end deffn
 
-@subsubsection ARM9TDMI specific commands
+@subsection ARM9TDMI specific commands
 @cindex ARM9TDMI specific commands
 
 Many ARM9-family CPUs are built around ARM9TDMI integer cores,
@@ -3949,7 +3951,7 @@
 @option{irq} @option{fiq}.
 @end deffn
 
-@subsubsection ARM920T specific commands
+@subsection ARM920T specific commands
 @cindex ARM920T specific commands
 
 These commands are available to ARM920T based CPUs,
@@ -4005,7 +4007,7 @@
 and display the result.
 @end deffn
 
-@subsubsection ARM926EJ-S specific commands
+@subsection ARM926EJ-S specific commands
 @cindex ARM926EJ-S specific commands
 
 These commands are available to ARM926EJ-S based CPUs,
@@ -4047,7 +4049,7 @@
 and display the result.
 @end deffn
 
-@subsubsection ARM966E specific commands
+@subsection ARM966E specific commands
 @cindex ARM966E specific commands
 
 These commands are available to ARM966 based CPUs,
@@ -4060,7 +4062,7 @@
 else if a @var{value} is provided, that value is written to that register.
 @end deffn
 
-@subsubsection XScale specific commands
+@subsection XScale specific commands
 @cindex XScale specific commands
 
 These commands are available to XScale based CPUs,
@@ -4121,9 +4123,9 @@
 Provide a bitmask showing the vectors to catch.
 @end deffn
 
-@subsection ARMv6 Architecture
+@section ARMv6 Architecture
 
-@subsubsection ARM11 specific commands
+@subsection ARM11 specific commands
 @cindex ARM11 specific commands
 
 @deffn Command {arm11 mcr} p1 p2 p3 p4 p5
@@ -4160,9 +4162,9 @@
 If @var{value} is defined, first assigns that.
 @end deffn
 
-@subsection ARMv7 Architecture
+@section ARMv7 Architecture
 
-@subsubsection Cortex-M3 specific commands
+@subsection Cortex-M3 specific commands
 @cindex Cortex-M3 specific commands
 
 @deffn Command {cortex_m3 maskisr} (on|off)

[Openocd-svn] r1976 - trunk/doc

[<zw...@ma...>]

Author: zwelch
Date: 2009-06-01 05:06:25 +0200 (Mon, 01 Jun 2009)
New Revision: 1976

Modified:
   trunk/doc/openocd.texi
Log:
David Brownell <da...@pa...>:

Fix minor goofage in previous doc updates:

 * The ETM dummy driver name is "dummy" not "etm_dummy";
   re-alphabetize.

 * DCC trace message mode "charmsg" is a format type
   (and what Linux needs)


Modified: trunk/doc/openocd.texi
===================================================================
--- trunk/doc/openocd.texi	2009-06-01 03:06:11 UTC (rev 1975)
+++ trunk/doc/openocd.texi	2009-06-01 03:06:25 UTC (rev 1976)
@@ -3758,6 +3758,16 @@
 
 To use an ETM trace port it must be associated with a driver.
 
+@deffn {Trace Port Driver} dummy
+Use the @option{dummy} driver if you are configuring an ETM that's
+not connected to anything (on-chip ETB or off-chip trace connector).
+@emph{This driver lets OpenOCD talk to the ETM, but it does not expose
+any trace data collection.}
+@deffn {Config Command} {etm_dummy config} target
+Associates the ETM for @var{target} with a dummy driver.
+@end deffn
+@end deffn
+
 @deffn {Trace Port Driver} etb
 Use the @option{etb} driver if you are configuring an ETM
 to use on-chip ETB memory.
@@ -3767,16 +3777,6 @@
 @end deffn
 @end deffn
 
-@deffn {Trace Port Driver} etm_dummy
-Use the @option{etm_dummy} driver if you are configuring an ETM that's
-not connected to anything (on-chip ETB or off-chip trace connector).
-@emph{This driver lets OpenOCD talk to the ETM, but it does not expose
-any trace data collection.}
-@deffn {Config Command} {etm_dummy config} target
-Associates the ETM for @var{target} with a dummy driver.
-@end deffn
-@end deffn
-
 @deffn {Trace Port Driver} oocd_trace
 This driver isn't available unless OpenOCD was explicitly configured
 with the @option{--enable-oocd_trace} option.  You probably don't want
@@ -4186,8 +4186,11 @@
 @deffn Command {target_request debugmsgs} [enable|disable|charmsg]
 Displays current handling of target DCC message requests.
 These messages may be sent to the debugger while the target is running.
-The optional @option{enable} and @option{charmsg} parameters are
-equivalent; both enable the messages, @option{disable} disables them.
+The optional @option{enable} and @option{charmsg} parameters
+both enable the messages, while @option{disable} disables them.
+With @option{charmsg} the DCC words each contain one character,
+as used by Linux with CONFIG_DEBUG_ICEDCC;
+otherwise the libdcc format is used.
 @end deffn
 
 @node JTAG Commands

[Openocd-svn] r1975 - trunk/doc

[<zw...@ma...>]

Author: zwelch
Date: 2009-06-01 05:06:11 +0200 (Mon, 01 Jun 2009)
New Revision: 1975

Modified:
   trunk/doc/openocd.texi
Log:
David Brownell <da...@pa...>:

Various updates, mostly small/formatting changes:

 * Small content tweaks:
    - Re-title:  "OpenOCD User's Guide".
    - For users, URLS for latest doc and SparkFun forum
    - Mention GIT-SVN
 * Fix some front-matter goofage, matching texinfo docs:
    - "paragraphintent" location matters
    - put release version/date description with the copyright
 * Fix some other stuff matching texinfo docs:
    - no tabs
    - tweak some refs and anchors
 * whitespace-at-end-o-line fixes


Modified: trunk/doc/openocd.texi
===================================================================
--- trunk/doc/openocd.texi	2009-06-01 03:05:59 UTC (rev 1974)
+++ trunk/doc/openocd.texi	2009-06-01 03:06:11 UTC (rev 1975)
@@ -1,18 +1,23 @@
-\input texinfo	@c -*-texinfo-*-
+\input texinfo @c -*-texinfo-*-
 @c %**start of header
 @setfilename openocd.info
-@settitle Open On-Chip Debugger (OpenOCD)
+@settitle OpenOCD User's Guide
 @dircategory Development
 @direntry
+* OpenOCD: (openocd).      OpenOCD User's Guide
+@end direntry
 @paragraphindent 0
-* OpenOCD: (openocd).      Open On-Chip Debugger.
-@end direntry
 @c %**end of header
 
 @include version.texi
 
 @copying
 
+This User's Guide documents
+release @value{VERSION},
+dated @value{UPDATED},
+of the Open On-Chip Debugger (OpenOCD).
+
 @itemize @bullet
 @item Copyright @copyright{} 2008 The OpenOCD Project
 @item Copyright @copyright{} 2007-2008 Spencer Oliver @email{spen@@spen-soft.co.uk}
@@ -31,9 +36,12 @@
 @end copying
 
 @titlepage
-@title Open On-Chip Debugger (OpenOCD)
-@subtitle Edition @value{EDITION} for OpenOCD version @value{VERSION}
+@titlefont{@emph{Open On-Chip Debugger:}}
+@sp 1
+@title OpenOCD User's Guide
+@subtitle for release @value{VERSION}
 @subtitle @value{UPDATED}
+
 @page
 @vskip 0pt plus 1filll
 @insertcopying
@@ -42,13 +50,12 @@
 @summarycontents
 @contents
 
-@node Top, About, , (dir)
-@top OpenOCD
+@ifnottex
+@node Top
+@top OpenOCD User's Guide
 
-This manual documents edition @value{EDITION} of the Open On-Chip Debugger
-(OpenOCD) version @value{VERSION}, @value{UPDATED}.
-
 @insertcopying
+@end ifnottex
 
 @menu
 * About::                            About OpenOCD
@@ -77,6 +84,7 @@
 * FAQ::                              Frequently Asked Questions
 * Tcl Crash Course::                 Tcl Crash Course
 * License::                          GNU Free Documentation License
+
 @comment DO NOT use the plain word ``Index'', reason: CYGWIN filename
 @comment case issue with ``Index.html'' and ``index.html''
 @comment Occurs when creating ``--html --no-split'' output
@@ -125,7 +133,25 @@
 
 @uref{http://openocd.berlios.de/web/}
 
+@section Latest User's Guide:
 
+The user's guide you are now reading may not be the latest one
+available.  A version for more recent code may be available.
+Its HTML form is published irregularly at:
+
+@uref{http://openocd.berlios.de/doc/}
+
+PDF form is likewise published at:
+
+@uref{http://openocd.berlios.de/doc/pdf/}
+
+@section OpenOCD User's Forum
+
+There is an OpenOCD forum (phpBB) hosted by SparkFun:
+
+@uref{http://forum.sparkfun.com/viewforum.php?f=18}
+
+
 @node Developers
 @chapter OpenOCD Developer Resources
 @cindex developers
@@ -167,13 +193,14 @@
 The OpenOCD Developer Mailing List provides the primary means of
 communication between developers:
 
-	@uref{https://lists.berlios.de/mailman/listinfo/openocd-development}
+@uref{https://lists.berlios.de/mailman/listinfo/openocd-development}
 
 All drivers developers are enouraged to also subscribe to the list of
 SVN commits to keep pace with the ongoing changes:
 
-	@uref{https://lists.berlios.de/mailman/listinfo/openocd-svn}
+@uref{https://lists.berlios.de/mailman/listinfo/openocd-svn}
 
+
 @node Building OpenOCD
 @chapter Building OpenOCD
 @cindex building
@@ -247,7 +274,14 @@
  svn checkout svn://svn.berlios.de/openocd/trunk openocd
 @end example
 
-Building OpenOCD requires a recent version of the GNU autotools (autoconf >= 2.59 and automake >= 1.9).
+If you prefer GIT based tools, the @command{git-svn} package works too:
+
+@example
+ git svn clone -s svn://svn.berlios.de/openocd
+@end example
+
+Building OpenOCD from a repository requires a recent version of the
+GNU autotools (autoconf >= 2.59 and automake >= 1.9).
 For building on Windows,
 you have to use Cygwin. Make sure that your @env{PATH} environment variable contains no
 other locations with Unix utils (like UnxUtils) - these can't handle the Cygwin
@@ -951,14 +985,14 @@
    # variable: _TARGETNAME = network.cpu
    # other commands can refer to the "network.cpu" tap.
    $_TARGETNAME configure .... params for this CPU..
-   
+
    set ENDIAN little
    set CHIPNAME video
    source [find target/pxa270.cfg]
    # variable: _TARGETNAME = video.cpu
    # other commands can refer to the "video.cpu" tap.
    $_TARGETNAME configure .... params for this CPU..
-   
+
    unset ENDIAN
    set CHIPNAME xilinx
    source [find target/spartan3.cfg]
@@ -976,15 +1010,15 @@
 
 @example
 # SIMPLE example
-if @{ [info exists CHIPNAME] @} @{	
-   set  _CHIPNAME $CHIPNAME    
-@} else @{	 
+if @{ [info exists CHIPNAME] @} @{
+   set  _CHIPNAME $CHIPNAME
+@} else @{
    set  _CHIPNAME sam7x256
 @}
 
-if @{ [info exists ENDIAN] @} @{	
-   set  _ENDIAN $ENDIAN    
-@} else @{	 
+if @{ [info exists ENDIAN] @} @{
+   set  _ENDIAN $ENDIAN
+@} else @{
    set  _ENDIAN little
 @}
 
@@ -1069,7 +1103,7 @@
 @subsection Work Areas
 
 Work areas are small RAM areas used by OpenOCD to speed up downloads,
-and to download small snippets of code to program flash chips.  
+and to download small snippets of code to program flash chips.
 
 If the chip includes a form of ``on-chip-ram'' - and many do - define
 a reasonable work area and use the ``backup'' option.
@@ -1155,7 +1189,7 @@
 @* JIM-Tcl was introduced to OpenOCD in spring 2008.
 
 @item @b{Need a crash course in Tcl?}
-@* See: @xref{Tcl Crash Course}.
+@*@xref{Tcl Crash Course}.
 @end itemize
 
 @node Daemon Configuration
@@ -1232,8 +1266,8 @@
 the port @var{number} defaults to 4444.
 @end deffn
 
+@anchor{GDB Configuration}
 @section GDB Configuration
-@anchor{GDB Configuration}
 @cindex GDB
 @cindex GDB configuration
 You can reconfigure some GDB behaviors if needed.
@@ -1241,8 +1275,8 @@
 @xref{Target Create}, about declaring individual targets.
 @xref{Target Events}, about configuring target-specific event handling.
 
+@anchor{gdb_breakpoint_override}
 @deffn {Command} gdb_breakpoint_override <hard|soft|disable>
-@anchor{gdb_breakpoint_override}
 Force breakpoint type for gdb @command{break} commands.
 The raison d'etre for this option is to support GDB GUI's which don't
 distinguish hard versus soft breakpoints, if the default OpenOCD and
@@ -1258,8 +1292,8 @@
 Default behaviour is @var{resume}.
 @end deffn
 
+@anchor{gdb_flash_program}
 @deffn {Config command} gdb_flash_program <enable|disable>
-@anchor{gdb_flash_program}
 Set to @var{enable} to cause OpenOCD to program the flash memory when a
 vFlash packet is received.
 The default behaviour is @var{enable}.
@@ -1508,8 +1542,8 @@
 @cindex ep93xx options
 Currently, there are no options available for the ep93xx interface.
 
+@anchor{JTAG Speed}
 @section JTAG Speed
-@anchor{JTAG Speed}
 JTAG clock setup is part of system setup.
 It @emph{does not belong with interface setup} since any interface
 only knows a few of the constraints for the JTAG clock speed.
@@ -1987,7 +2021,7 @@
 creating a ``target'' a JTAG tap DOTTED.NAME must exist first.
 
 @section targets [NAME]
-@b{Note:} This command name is PLURAL - not singular.  
+@b{Note:} This command name is PLURAL - not singular.
 
 With NO parameter, this plural @b{targets} command lists all known
 targets in a human friendly form.
@@ -1998,7 +2032,7 @@
 Example:
 @verbatim
 (gdb) mon targets
-      CmdName     Type     Endian    ChainPos   State     
+      CmdName     Type     Endian    ChainPos   State
 --  ---------- ---------- ---------- -------- ----------
     0: target0  arm7tdmi   little        0      halted
 @end verbatim
@@ -2018,7 +2052,7 @@
 @* Lists all supported target types (perhaps some are not yet in this document).
 @item @b{names}
 @* Lists all current debug target names, for example: 'str912.cpu' or 'pxa27.cpu' example usage:
-@verbatim  
+@verbatim
 	foreach t [target names] {
 	    puts [format "Target: %s\n" $t]
 	}
@@ -2073,7 +2107,7 @@
     # Report
     puts [format "The button is %s" $x]
 @end example
-    
+
 In OpenOCD's terms, the ``target'' is an object just like a Tcl/Tk
 button. Commands available as a ``target object'' are:
 
@@ -2120,9 +2154,9 @@
 @* Invokes the specific event manually for the target
 @end itemize
 
+@anchor{Target Events}
 @section Target Events
 @cindex events
-@anchor{Target Events}
 At various times, certain things can happen, or you want them to happen.
 
 Examples:
@@ -2152,8 +2186,8 @@
    @}
    mychip.cpu configure -event gdb-attach my_attach_proc 
    mychip.cpu configure -event gdb-attach @{
-	   puts "Reset..."
-	   reset halt
+       puts "Reset..."
+       reset halt
    @}
 @end example
 
@@ -2243,8 +2277,8 @@
 @end example
 @end itemize
 
+@anchor{Target Create}
 @section Target Create
-@anchor{Target Create}
 @cindex target
 @cindex target creation
 
@@ -2455,8 +2489,7 @@
 is that for read access, it acts exactly like any other addressible memory.
 This means you can use normal memory read commands like @command{mdw} or
 @command{dump_image} with it, with no special @command{flash} subcommands.
-@xref{Memory access}.
-@xref{Image access}.
+@xref{Memory access}, and @ref{Image access}.
 
 Write access works differently.  Flash memory normally needs to be erased
 before it's written.  Erasing a sector turns all of its bits to ones, and
@@ -2570,8 +2603,8 @@
 @comment @option{flash erase_sector} using the same syntax.
 @end deffn
 
+@anchor{Flash Driver List}
 @section Flash Drivers, Options, and Commands
-@anchor{Flash Driver List}
 As noted above, the @command{flash bank} command requires a driver name,
 and allows driver-specific options and behaviors.
 Some drivers also activate driver-specific commands.
@@ -3273,8 +3306,8 @@
 with the wrong ECC data can cause them to be marked as bad.
 @end deffn
 
+@anchor{NAND Driver List}
 @section NAND Drivers, Options, and Commands
-@anchor{NAND Driver List}
 As noted above, the @command{nand device} command allows
 driver-specific options and behaviors.
 Some controllers also activate controller-specific commands.
@@ -3376,9 +3409,9 @@
 @cindex shutdown
 @*Close the OpenOCD daemon, disconnecting all clients (GDB, telnet, other). 
 
+@anchor{debug_level}
 @subsection debug_level [@var{n}]
 @cindex debug_level
-@anchor{debug_level}
 @*Display or adjust debug level to n<0-3> 
 
 @subsection fast [@var{enable|disable}]
@@ -3485,8 +3518,8 @@
 state.
 
 
+@anchor{Memory access}
 @section Memory access commands
-@anchor{Memory access}
 @subsection meminfo
 display available RAM memory on OpenOCD host. Used in OpenOCD regression testing scripts. Mainly
 useful on embedded targets, PC type hosts have complimentary tools like Valgrind to address
@@ -3523,17 +3556,16 @@
 @*write memory byte (8bit)
 @end itemize
 
+@anchor{Image access}
 @section Image loading commands
-@anchor{Image access}
+@anchor{load_image}
 @subsection load_image
 @b{load_image} <@var{file}> <@var{address}> [@option{bin}|@option{ihex}|@option{elf}]
 @cindex load_image
-@anchor{load_image}
 @*Load image <@var{file}> to target memory at <@var{address}> 
 @subsection fast_load_image
 @b{fast_load_image} <@var{file}> <@var{address}> [@option{bin}|@option{ihex}|@option{elf}]
 @cindex fast_load_image
-@anchor{fast_load_image}
 @*Normally you should be using @b{load_image} or GDB load. However, for
 testing purposes or when I/O overhead is significant(OpenOCD running on an embedded
 host), storing the image in memory and uploading the image to the target
@@ -3545,12 +3577,11 @@
 @subsection fast_load
 @b{fast_load}
 @cindex fast_image
-@anchor{fast_image}
 @*Loads an image stored in memory by @b{fast_load_image} to the current target. Must be preceeded by fast_load_image.
+@anchor{dump_image}
 @subsection dump_image
 @b{dump_image} <@var{file}> <@var{address}> <@var{size}>
 @cindex dump_image
-@anchor{dump_image}
 @*Dump <@var{size}> bytes of target memory starting at <@var{address}> to a
 (binary) <@var{file}>.
 @subsection verify_image
@@ -4299,9 +4330,9 @@
 OpenOCD complies with the remote gdbserver protocol, and as such can be used
 to debug remote targets.
 
+@anchor{Connecting to GDB}
 @section Connecting to GDB
 @cindex Connecting to GDB
-@anchor{Connecting to GDB}
 Use GDB 6.7 or newer with OpenOCD if you run into trouble. For
 instance GDB 6.3 has a known bug that produces bogus memory access
 errors, which has since been fixed: look up 1836 in
@@ -4555,8 +4586,8 @@
 @chapter FAQ
 @cindex faq
 @enumerate
+@anchor{FAQ RTCK}
 @item @b{RTCK, also known as: Adaptive Clocking - What is it?}
-@anchor{FAQ RTCK}
 @cindex RTCK
 @cindex adaptive clocking
 @*
@@ -4660,7 +4691,7 @@
 
 GDB issues software breakpoints when a normal breakpoint is requested, or to implement
 source-line single-stepping. On ARMv4T systems, like ARM7TDMI, ARM720T or ARM920T,
-software breakpoints consume one of the two available hardware breakpoints.  
+software breakpoints consume one of the two available hardware breakpoints.
 
 @item @b{LPC2000 Flash} When erasing or writing LPC2000 on-chip flash, the operation fails at random.
 
@@ -4811,7 +4842,7 @@
 arm7_9_execute_sys_speed(): timeout waiting for SYSCOMP
 
 TODO.
-							
+
 @end enumerate
 
 @node Tcl Crash Course
@@ -5028,7 +5059,7 @@
        SetResult( interp, "WRONG number of parameters");
        return ERROR;
    @}
-   
+
    // argv[0] = the ascii string just like C
 
    // Execute the start statement.
@@ -5051,7 +5082,7 @@
     SetResult( interp, "" );
     return SUCCESS;
 @}
-@end example        
+@end example
 
 Every other command IF, WHILE, FORMAT, PUTS, EXPR, everything works
 in the same basic way.
@@ -5071,7 +5102,7 @@
 @* SOURCE reads a file and executes as a script.
 @end enumerate
 @subsection format command
-@b{Where:} Generally occurs in numerous places.  
+@b{Where:} Generally occurs in numerous places.
 @* Tcl has no command like @b{printf()}, instead it has @b{format}, which is really more like
 @b{sprintf()}.
 @b{Example}

[Openocd-svn] r1974 - trunk/tcl/target

[<zw...@ma...>]

Author: zwelch
Date: 2009-06-01 05:05:59 +0200 (Mon, 01 Jun 2009)
New Revision: 1974

Modified:
   trunk/tcl/target/omap5912.cfg
Log:
David Brownell <da...@pa...>:

Split out OSK5912 board support from the omap5912 target config, and make
it pass sanity checks on my (Rev C/original) hardware:

 - Fix syntax error ("-irlen" not "irlen")
 - Provide real TAP ids for the ARM926ejs and the C55x dsp
 - Label both CPUs appropriately (DSP, ARM)
 - List both flash chips

The scan chain looks like this (note truncated DSP instruction code):

      TapName            | Enabled |   IdCode      Expected    IrLen IrCap  IrMask Instr
 ---|--------------------|---------|------------|------------|------|------|------|---------
  0 | omap5912.dsp       |    Y    | 0x03df1d81 | 0x03df1d81 | 0x26 | 0x00 | 0x00 | 0xffffffff
  1 | omap5912.arm       |    Y    | 0x0692602f | 0x0692602f | 0x04 | 0x01 | 0x00 | 0x0c
  2 | omap5912.unknown   |    Y    | 0x00000000 | 0x00000000 | 0x08 | 0x00 | 0x00 | 0xff

I still don't know what that third TAP is; maybe an early version of
an ICEpick JTAG router.


Modified: trunk/tcl/target/omap5912.cfg
===================================================================
--- trunk/tcl/target/omap5912.cfg	2009-06-01 03:05:42 UTC (rev 1973)
+++ trunk/tcl/target/omap5912.cfg	2009-06-01 03:05:59 UTC (rev 1974)
@@ -1,5 +1,5 @@
-#TI OMAP5912 dual core processor - http://www.ti.com 
-#on a OMAP5912 OSK board http://www.spectrumdigital.com.
+# TI OMAP5912 dual core processor
+# http://focus.ti.com/docs/prod/folders/print/omap5912.html
 
 if { [info exists CHIPNAME] } {	
    set  _CHIPNAME $CHIPNAME    
@@ -17,22 +17,22 @@
 if { [info exists CPUTAPID ] } {
    set _CPUTAPID $CPUTAPID
 } else {
-  # force an error till we get a good number
-   set _CPUTAPID 0xffffffff
+   # NOTE: validated with XOMAP5912 part
+   set _CPUTAPID 0x0692602f
 }
 
-#use combined on interfaces or targets that can't set TRST/SRST separately
-reset_config trst_and_srst
+# NOTE:  presumes irlen 38 is the C55x DSP, matching BSDL for
+# its standalone siblings (like TMS320VC5502) of the same era
 
 #jtag scan chain
-jtag newtap $_CHIPNAME unknown1 -irlen 38 -ircapture 0x0 -irmask 0x0 
-jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0x0 -expected-id $_CPUTAPID
-jtag newtap $_CHIPNAME unknown2 irlen 8 -ircapture  0x0 -irmask 0x0 
+jtag newtap $_CHIPNAME dsp -irlen 38 -ircapture 0x0 -irmask 0x0 -expected-id 0x03df1d81
+jtag newtap $_CHIPNAME arm -irlen 4 -ircapture 0x1 -irmask 0x0 -expected-id $_CPUTAPID
+jtag newtap $_CHIPNAME unknown -irlen 8 -ircapture  0x0 -irmask 0x0
 
-set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
-target create $_TARGETNAME arm926ejs -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm926ejs
+set _TARGETNAME $_CHIPNAME.arm
+target create $_TARGETNAME arm926ejs -endian $_ENDIAN -chain-position $_TARGETNAME
 
-$_TARGETNAME configure -event reset-init {
+proc omap5912_reset {} {
 	#
 	# halt target
 	#
@@ -50,14 +50,8 @@
 	sleep 500
 	mww 0xfffeb048 0x00005555
 	sleep 500
-	#
-	# detect flash
-	#
-	flash probe 0
 }
 
 # omap5912 lcd frame buffer as working area
-$_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x20000000 -work-area-size 0x3e800 -work-area-backup 0
-
-#flash bank <driver> <base> <size> <chip_width> <bus_width>
-flash bank cfi 0x00000000 0x1000000 2 2 0
+$_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x20000000 \
+	-work-area-size 0x3e800 -work-area-backup 0

[Openocd-svn] r1973 - trunk/src/target

[<zw...@ma...>]

Author: zwelch
Date: 2009-06-01 05:05:42 +0200 (Mon, 01 Jun 2009)
New Revision: 1973

Modified:
   trunk/src/target/cortex_m3.c
   trunk/src/target/target_request.c
Log:
David Brownell <da...@pa...>:

Whitespace fixes.


Modified: trunk/src/target/cortex_m3.c
===================================================================
--- trunk/src/target/cortex_m3.c	2009-06-01 03:05:26 UTC (rev 1972)
+++ trunk/src/target/cortex_m3.c	2009-06-01 03:05:42 UTC (rev 1973)
@@ -64,7 +64,7 @@
 	.arch_state = armv7m_arch_state,
 
 	.target_request_data = cortex_m3_target_request_data,
-	
+
 	.halt = cortex_m3_halt,
 	.resume = cortex_m3_resume,
 	.step = cortex_m3_step,
@@ -72,7 +72,7 @@
 	.assert_reset = cortex_m3_assert_reset,
 	.deassert_reset = cortex_m3_deassert_reset,
 	.soft_reset_halt = cortex_m3_soft_reset_halt,
-	
+
 	.get_gdb_reg_list = armv7m_get_gdb_reg_list,
 
 	.read_memory = cortex_m3_read_memory,
@@ -80,9 +80,9 @@
 	.bulk_write_memory = cortex_m3_bulk_write_memory,
 	.checksum_memory = armv7m_checksum_memory,
 	.blank_check_memory = armv7m_blank_check_memory,
-	
+
 	.run_algorithm = armv7m_run_algorithm,
-	
+
 	.add_breakpoint = cortex_m3_add_breakpoint,
 	.remove_breakpoint = cortex_m3_remove_breakpoint,
 	.add_watchpoint = cortex_m3_add_watchpoint,
@@ -152,12 +152,12 @@
 	armv7m_common_t *armv7m = target->arch_info;
 	cortex_m3_common_t *cortex_m3 = armv7m->arch_info;
 	swjdp_common_t *swjdp = &armv7m->swjdp_info;
-	
+
 	/* mask off status bits */
 	cortex_m3->dcb_dhcsr &= ~((0xFFFF << 16) | mask_off);
 	/* create new register mask */
 	cortex_m3->dcb_dhcsr |= DBGKEY | C_DEBUGEN | mask_on;
-	
+
 	return mem_ap_write_atomic_u32(swjdp, DCB_DHCSR, cortex_m3->dcb_dhcsr);
 }
 
@@ -167,10 +167,10 @@
 	armv7m_common_t *armv7m = target->arch_info;
 	cortex_m3_common_t *cortex_m3 = armv7m->arch_info;
 	swjdp_common_t *swjdp = &armv7m->swjdp_info;
-	
+
 	/* clear step if any */
 	cortex_m3_write_debug_halt_mask(target, C_HALT, C_STEP);
-	
+
 	/* Read Debug Fault Status Register */
 	mem_ap_read_atomic_u32(swjdp, NVIC_DFSR, &cortex_m3->nvic_dfsr);
 	/* Write Debug Fault Status Register to enable processing to resume ?? Try with and without this !! */
@@ -187,20 +187,20 @@
 	cortex_m3_common_t *cortex_m3 = armv7m->arch_info;
 	swjdp_common_t *swjdp = &armv7m->swjdp_info;
 	u32 dhcsr_save;
-	
+
 	/* backup dhcsr reg */
 	dhcsr_save = cortex_m3->dcb_dhcsr;
-	
+
 	/* mask interrupts if not done already */
 	if (!(cortex_m3->dcb_dhcsr & C_MASKINTS))
 		mem_ap_write_atomic_u32(swjdp, DCB_DHCSR, DBGKEY | C_MASKINTS | C_HALT | C_DEBUGEN);
 	mem_ap_write_atomic_u32(swjdp, DCB_DHCSR, DBGKEY | C_MASKINTS | C_STEP | C_DEBUGEN);
 	LOG_DEBUG(" ");
-	
+
 	/* restore dhcsr reg */
-	cortex_m3->dcb_dhcsr = dhcsr_save;	
+	cortex_m3->dcb_dhcsr = dhcsr_save;
 	cortex_m3_clear_halt(target);
-	
+
 	return ERROR_OK;
 }
 
@@ -211,14 +211,14 @@
 	swjdp_common_t *swjdp = &armv7m->swjdp_info;
 	u32 savedram;
 	int retvalue;
-	
+
 	mem_ap_read_u32(swjdp, 0x20000000, &savedram);
 	mem_ap_write_u32(swjdp, 0x20000000, opcode);
 	cortexm3_dap_write_coreregister_u32(swjdp, 0x20000000, 15);
 	cortex_m3_single_step_core(target);
 	armv7m->core_cache->reg_list[15].dirty = armv7m->core_cache->reg_list[15].valid;
 	retvalue = mem_ap_write_atomic_u32(swjdp, 0x20000000, savedram);
-	
+
 	return retvalue;
 }
 
@@ -240,28 +240,28 @@
 {
 	int i;
 	u32 dcb_demcr;
-	
+
 	/* get pointers to arch-specific information */
 	armv7m_common_t *armv7m = target->arch_info;
 	cortex_m3_common_t *cortex_m3 = armv7m->arch_info;
 	swjdp_common_t *swjdp = &armv7m->swjdp_info;
-	cortex_m3_fp_comparator_t *fp_list = cortex_m3->fp_comparator_list; 
+	cortex_m3_fp_comparator_t *fp_list = cortex_m3->fp_comparator_list;
 	cortex_m3_dwt_comparator_t *dwt_list = cortex_m3->dwt_comparator_list;
 
 	mem_ap_read_atomic_u32(swjdp, DCB_DEMCR, &dcb_demcr);
 	LOG_DEBUG("DCB_DEMCR = 0x%8.8x",dcb_demcr);
-	
+
 	/* this regsiter is used for emulated dcc channel */
 	mem_ap_write_u32(swjdp, DCB_DCRDR, 0);
-	
+
 	/* Enable debug requests */
 	mem_ap_read_atomic_u32(swjdp, DCB_DHCSR, &cortex_m3->dcb_dhcsr);
 	if (!(cortex_m3->dcb_dhcsr & C_DEBUGEN))
 		mem_ap_write_u32(swjdp, DCB_DHCSR, DBGKEY | C_DEBUGEN);
-	
+
 	/* clear any interrupt masking */
 	cortex_m3_write_debug_halt_mask(target, 0, C_MASKINTS);
-	
+
 	/* Enable trace and dwt */
 	mem_ap_write_u32(swjdp, DCB_DEMCR, TRCENA | VC_HARDERR | VC_BUSERR);
 	/* Monitor bus faults */
@@ -276,7 +276,7 @@
 	{
 		target_write_u32(target, fp_list[i].fpcr_address, fp_list[i].fpcr_value);
 	}
-	
+
 	/* Restore DWT registers */
 	for (i = 0; i < cortex_m3->dwt_num_comp; i++)
 	{
@@ -285,12 +285,12 @@
 		target_write_u32(target, dwt_list[i].dwt_comparator_address | 0x8, dwt_list[i].function);
 	}
 	swjdp_transaction_endcheck(swjdp);
-	
+
 	armv7m_invalidate_core_regs(target);
-	
+
 	/* make sure we have latest dhcsr flags */
 	mem_ap_read_atomic_u32(swjdp, DCB_DHCSR, &cortex_m3->dcb_dhcsr);
-	
+
 	return ERROR_OK;
 }
 
@@ -302,7 +302,7 @@
 
 	/* THIS IS NOT GOOD, TODO - better logic for detection of debug state reason */
 	/* only check the debug reason if we don't know it already */
-	
+
 	if ((target->debug_reason != DBG_REASON_DBGRQ)
 		&& (target->debug_reason != DBG_REASON_SINGLESTEP))
 	{
@@ -343,11 +343,11 @@
 			break;
 		case 4:	/* Memory Management */
 			mem_ap_read_u32(swjdp, NVIC_CFSR, &except_sr);
-			mem_ap_read_u32(swjdp, NVIC_MMFAR, &except_ar);		
+			mem_ap_read_u32(swjdp, NVIC_MMFAR, &except_ar);
 			break;
 		case 5:	/* Bus Fault */
 			mem_ap_read_u32(swjdp, NVIC_CFSR, &except_sr);
-			mem_ap_read_u32(swjdp, NVIC_BFAR, &except_ar);				
+			mem_ap_read_u32(swjdp, NVIC_BFAR, &except_ar);
 			break;
 		case 6:	/* Usage Fault */
 			mem_ap_read_u32(swjdp, NVIC_CFSR, &except_sr);
@@ -435,15 +435,15 @@
 		armv7m->core_mode = buf_get_u32(armv7m->core_cache->reg_list[ARMV7M_CONTROL].value, 0, 1);
 		armv7m->exception_number = 0;
 	}
-	
+
 	if (armv7m->exception_number)
 	{
 		cortex_m3_examine_exception_reason(target);
 	}
 
-	LOG_DEBUG("entered debug state in core mode: %s at PC 0x%x, target->state: %s", 
+	LOG_DEBUG("entered debug state in core mode: %s at PC 0x%x, target->state: %s",
 		armv7m_mode_strings[armv7m->core_mode],
-		*(u32*)(armv7m->core_cache->reg_list[15].value), 
+		*(u32*)(armv7m->core_cache->reg_list[15].value),
 		Jim_Nvp_value2name_simple( nvp_target_state, target->state )->name);
 
 	if (armv7m->post_debug_entry)
@@ -456,7 +456,7 @@
 {
 	int retval;
 	enum target_state prev_target_state = target->state;
-	
+
 	/* get pointers to arch-specific information */
 	armv7m_common_t *armv7m = target->arch_info;
 	cortex_m3_common_t *cortex_m3 = armv7m->arch_info;
@@ -469,19 +469,19 @@
 		target->state = TARGET_UNKNOWN;
 		return retval;
 	}
-	
+
 	if (cortex_m3->dcb_dhcsr & S_RESET_ST)
 	{
 		/* check if still in reset */
 		mem_ap_read_atomic_u32(swjdp, DCB_DHCSR, &cortex_m3->dcb_dhcsr);
-		
+
 		if (cortex_m3->dcb_dhcsr & S_RESET_ST)
 		{
 			target->state = TARGET_RESET;
 			return ERROR_OK;
 		}
 	}
-	
+
 	if (target->state == TARGET_RESET)
 	{
 		/* Cannot switch context while running so endreset is called with target->state == TARGET_RESET */
@@ -490,7 +490,7 @@
 		target->state = TARGET_RUNNING;
 		prev_target_state = TARGET_RUNNING;
 	}
-	
+
 	if (cortex_m3->dcb_dhcsr & S_HALT)
 	{
 		target->state = TARGET_HALTED;
@@ -499,7 +499,7 @@
 		{
 			if ((retval = cortex_m3_debug_entry(target)) != ERROR_OK)
 				return retval;
-			
+
 			target_call_event_callbacks(target, TARGET_EVENT_HALTED);
 		}
 		if (prev_target_state == TARGET_DEBUG_RUNNING)
@@ -511,7 +511,7 @@
 			target_call_event_callbacks(target, TARGET_EVENT_DEBUG_HALTED);
 		}
 	}
-		
+
 	/*
 	if (cortex_m3->dcb_dhcsr & S_SLEEP)
 		target->state = TARGET_SLEEP;
@@ -522,27 +522,27 @@
 	mem_ap_read_atomic_u32(swjdp, NVIC_DFSR, &cortex_m3->nvic_dfsr);
 	LOG_DEBUG("dcb_dhcsr 0x%x, nvic_dfsr 0x%x, target->state: %s", cortex_m3->dcb_dhcsr, cortex_m3->nvic_dfsr, Jim_Nvp_value2name_simple( nvp_target_state, target->state )->name );
 #endif
-	
+
 	return ERROR_OK;
 }
 
 int cortex_m3_halt(target_t *target)
 {
-	LOG_DEBUG("target->state: %s", 
+	LOG_DEBUG("target->state: %s",
 		Jim_Nvp_value2name_simple(nvp_target_state, target->state )->name);
-	
+
 	if (target->state == TARGET_HALTED)
 	{
 		LOG_DEBUG("target was already halted");
 		return ERROR_OK;
 	}
-	
+
 	if (target->state == TARGET_UNKNOWN)
 	{
 		LOG_WARNING("target was in unknown state when halt was requested");
 	}
-	
-	if (target->state == TARGET_RESET) 
+
+	if (target->state == TARGET_RESET)
 	{
 		if ((jtag_reset_config & RESET_SRST_PULLS_TRST) && jtag_srst)
 		{
@@ -555,8 +555,8 @@
 			 * debug entry was already prepared in cortex_m3_prepare_reset_halt()
 			 */
 			target->debug_reason = DBG_REASON_DBGRQ;
-			
-			return ERROR_OK; 
+
+			return ERROR_OK;
 		}
 	}
 
@@ -564,7 +564,7 @@
 	cortex_m3_write_debug_halt_mask(target, C_HALT, 0);
 
 	target->debug_reason = DBG_REASON_DBGRQ;
-	
+
 	return ERROR_OK;
 }
 
@@ -579,8 +579,8 @@
 
 	/* Enter debug state on reset, cf. end_reset_event() */
 	mem_ap_write_u32(swjdp, DCB_DEMCR, TRCENA | VC_HARDERR | VC_BUSERR | VC_CORERESET);
-	
-	/* Request a reset */ 
+
+	/* Request a reset */
 	mem_ap_write_atomic_u32(swjdp, NVIC_AIRCR, AIRCR_VECTKEY | AIRCR_VECTRESET);
 	target->state = TARGET_RESET;
 
@@ -605,7 +605,7 @@
 		timeout++;
 		alive_sleep(1);
 	}
-		
+
 	return ERROR_OK;
 }
 
@@ -615,49 +615,49 @@
 	armv7m_common_t *armv7m = target->arch_info;
 	breakpoint_t *breakpoint = NULL;
 	u32 resume_pc;
-	
+
 	if (target->state != TARGET_HALTED)
 	{
 		LOG_WARNING("target not halted");
 		return ERROR_TARGET_NOT_HALTED;
 	}
-	
+
 	if (!debug_execution)
 	{
 		target_free_all_working_areas(target);
 		cortex_m3_enable_breakpoints(target);
 		cortex_m3_enable_watchpoints(target);
 	}
-	
+
 	if (debug_execution)
 	{
 		/* Disable interrupts */
 		/* We disable interrupts in the PRIMASK register instead of masking with C_MASKINTS,
-		 * This is probably the same issue as Cortex-M3 Errata	377493: 
+		 * This is probably the same issue as Cortex-M3 Errata	377493:
 		 * C_MASKINTS in parallel with disabled interrupts can cause local faults to not be taken. */
 		buf_set_u32(armv7m->core_cache->reg_list[ARMV7M_PRIMASK].value, 0, 32, 1);
 		armv7m->core_cache->reg_list[ARMV7M_PRIMASK].dirty = 1;
 		armv7m->core_cache->reg_list[ARMV7M_PRIMASK].valid = 1;
 
 		/* Make sure we are in Thumb mode */
-		buf_set_u32(armv7m->core_cache->reg_list[ARMV7M_xPSR].value, 0, 32, 
+		buf_set_u32(armv7m->core_cache->reg_list[ARMV7M_xPSR].value, 0, 32,
 			buf_get_u32(armv7m->core_cache->reg_list[ARMV7M_xPSR].value, 0, 32) | (1<<24));
 		armv7m->core_cache->reg_list[ARMV7M_xPSR].dirty = 1;
 		armv7m->core_cache->reg_list[ARMV7M_xPSR].valid = 1;
 	}
 
 	/* current = 1: continue on current pc, otherwise continue at <address> */
-	if (!current) 
+	if (!current)
 	{
 		buf_set_u32(armv7m->core_cache->reg_list[15].value, 0, 32, address);
 		armv7m->core_cache->reg_list[15].dirty = 1;
 		armv7m->core_cache->reg_list[15].valid = 1;
 	}
-	
+
 	resume_pc = buf_get_u32(armv7m->core_cache->reg_list[15].value, 0, 32);
 
 	armv7m_restore_context(target);
-	
+
 	/* the front-end may request us not to handle breakpoints */
 	if (handle_breakpoints)
 	{
@@ -670,10 +670,10 @@
 			cortex_m3_set_breakpoint(target, breakpoint);
 		}
 	}
-	
+
 	/* Restart core */
 	cortex_m3_write_debug_halt_mask(target, 0, C_HALT);
-	
+
 	target->debug_reason = DBG_REASON_NOTHALTED;
 
 	/* registers are now invalid */
@@ -690,7 +690,7 @@
 		target_call_event_callbacks(target, TARGET_EVENT_DEBUG_RESUMED);
 		LOG_DEBUG("target debug resumed at 0x%x", resume_pc);
 	}
-	
+
 	return ERROR_OK;
 }
 
@@ -712,25 +712,25 @@
 	/* current = 1: continue on current pc, otherwise continue at <address> */
 	if (!current)
 		buf_set_u32(armv7m->core_cache->reg_list[15].value, 0, 32, address);
-	
+
 	/* the front-end may request us not to handle breakpoints */
 	if (handle_breakpoints)
 		if ((breakpoint = breakpoint_find(target, buf_get_u32(armv7m->core_cache->reg_list[15].value, 0, 32))))
 			cortex_m3_unset_breakpoint(target, breakpoint);
-	
+
 	target->debug_reason = DBG_REASON_SINGLESTEP;
-	
+
 	armv7m_restore_context(target);
-	
+
 	target_call_event_callbacks(target, TARGET_EVENT_RESUMED);
-	
+
 	/* set step and clear halt */
 	cortex_m3_write_debug_halt_mask(target, C_STEP, C_HALT);
 	mem_ap_read_atomic_u32(swjdp, DCB_DHCSR, &cortex_m3->dcb_dhcsr);
 
 	/* registers are now invalid */
 	armv7m_invalidate_core_regs(target);
-	
+
 	if (breakpoint)
 		cortex_m3_set_breakpoint(target, breakpoint);
 
@@ -749,23 +749,23 @@
 	cortex_m3_common_t *cortex_m3 = armv7m->arch_info;
 	swjdp_common_t *swjdp = &armv7m->swjdp_info;
 	int assert_srst = 1;
-	
-	LOG_DEBUG("target->state: %s", 
+
+	LOG_DEBUG("target->state: %s",
 		Jim_Nvp_value2name_simple( nvp_target_state, target->state )->name );
-	
+
 	if (!(jtag_reset_config & RESET_HAS_SRST))
 	{
 		LOG_ERROR("Can't assert SRST");
 		return ERROR_FAIL;
 	}
-	
+
 	/* Enable debug requests */
 	mem_ap_read_atomic_u32(swjdp, DCB_DHCSR, &cortex_m3->dcb_dhcsr);
 	if (!(cortex_m3->dcb_dhcsr & C_DEBUGEN))
 		mem_ap_write_u32(swjdp, DCB_DHCSR, DBGKEY | C_DEBUGEN);
-		
+
 	mem_ap_write_u32(swjdp, DCB_DCRDR, 0 );
-	
+
 	if (!target->reset_halt)
 	{
 		/* Set/Clear C_MASKINTS in a separate operation */
@@ -774,11 +774,11 @@
 
 		/* clear any debug flags before resuming */
 		cortex_m3_clear_halt(target);
-		
+
 		/* clear C_HALT in dhcsr reg */
 		cortex_m3_write_debug_halt_mask(target, 0, C_HALT);
-							
-		/* Enter debug state on reset, cf. end_reset_event() */	
+
+		/* Enter debug state on reset, cf. end_reset_event() */
 		mem_ap_write_u32(swjdp, DCB_DEMCR, TRCENA | VC_HARDERR | VC_BUSERR);
 	}
 	else
@@ -786,18 +786,18 @@
 		/* Enter debug state on reset, cf. end_reset_event() */
 		mem_ap_write_atomic_u32(swjdp, DCB_DEMCR, TRCENA | VC_HARDERR | VC_BUSERR | VC_CORERESET);
 	}
-	
+
 	/* following hack is to handle luminary reset
 	 * when srst is asserted the luminary device seesm to also clear the debug registers
 	 * which does not match the armv7 debug TRM */
-		
+
 	if (strcmp(target->variant, "lm3s") == 0)
 	{
 		/* get revision of lm3s target, only early silicon has this issue
 		 * Fury Rev B, DustDevil Rev B, Tempest all ok */
-		
+
 		u32 did0;
-		
+
 		if (target_read_u32(target, 0x400fe000, &did0) == ERROR_OK)
 		{
 			switch ((did0 >> 16) & 0xff)
@@ -806,7 +806,7 @@
 					/* all Sandstorm suffer issue */
 					assert_srst = 0;
 					break;
-				
+
 				case 1:
 				case 3:
 					/* only Fury/DustDevil rev A suffer reset problems */
@@ -816,7 +816,7 @@
 			}
 		}
 	}
-	
+
 	if (assert_srst)
 	{
 		/* default to asserting srst */
@@ -842,10 +842,10 @@
 			mem_ap_read_atomic_u32(swjdp, NVIC_AIRCR, &tmp);
 		}
 	}
-	
+
 	target->state = TARGET_RESET;
 	jtag_add_sleep(50000);
-	
+
 	armv7m_invalidate_core_regs(target);
 
 	if (target->reset_halt)
@@ -854,25 +854,25 @@
 		if ((retval = target_halt(target))!=ERROR_OK)
 			return retval;
 	}
-	
+
 	return ERROR_OK;
 }
 
 int cortex_m3_deassert_reset(target_t *target)
-{		
-	LOG_DEBUG("target->state: %s", 
+{
+	LOG_DEBUG("target->state: %s",
 		Jim_Nvp_value2name_simple(nvp_target_state, target->state )->name);
-	
+
 	/* deassert reset lines */
 	jtag_add_reset(0, 0);
-		
+
 	return ERROR_OK;
 }
 
 void cortex_m3_enable_breakpoints(struct target_s *target)
 {
 	breakpoint_t *breakpoint = target->breakpoints;
-	
+
 	/* set any pending breakpoints */
 	while (breakpoint)
 	{
@@ -887,11 +887,11 @@
 	int retval;
 	int fp_num=0;
 	u32 hilo;
-	
+
 	/* get pointers to arch-specific information */
 	armv7m_common_t *armv7m = target->arch_info;
 	cortex_m3_common_t *cortex_m3 = armv7m->arch_info;
-	
+
 	cortex_m3_fp_comparator_t * comparator_list = cortex_m3->fp_comparator_list;
 
 	if (breakpoint->set)
@@ -899,7 +899,7 @@
 		LOG_WARNING("breakpoint already set");
 		return ERROR_OK;
 	}
-	
+
 	if (cortex_m3->auto_bp_type)
 	{
 		breakpoint->type = (breakpoint->address < 0x20000000) ? BKPT_HARD : BKPT_SOFT;
@@ -958,7 +958,7 @@
 		LOG_WARNING("breakpoint not set");
 		return ERROR_OK;
 	}
-	
+
 	if (breakpoint->type == BKPT_HARD)
 	{
 		int fp_num = breakpoint->set - 1;
@@ -1006,7 +1006,7 @@
 #ifdef ARMV7_GDB_HACKS
 		if (breakpoint->length != 2) {
 			/* XXX Hack: Replace all breakpoints with length != 2 with
-			 * a hardware breakpoint. */ 
+			 * a hardware breakpoint. */
 			breakpoint->type = BKPT_HARD;
 			breakpoint->length = 2;
 		}
@@ -1036,11 +1036,11 @@
 		LOG_INFO("only breakpoints of two bytes length supported");
 		return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
 	}
-	
+
 	if (breakpoint->type == BKPT_HARD)
 		cortex_m3->fp_code_available--;
 	cortex_m3_set_breakpoint(target, breakpoint);
-	
+
 	return ERROR_OK;
 }
 
@@ -1049,13 +1049,13 @@
 	/* get pointers to arch-specific information */
 	armv7m_common_t *armv7m = target->arch_info;
 	cortex_m3_common_t *cortex_m3 = armv7m->arch_info;
-	
+
 	if (target->state != TARGET_HALTED)
 	{
 		LOG_WARNING("target not halted");
 		return ERROR_TARGET_NOT_HALTED;
 	}
-	
+
 	if (cortex_m3->auto_bp_type)
 	{
 		breakpoint->type = (breakpoint->address < 0x20000000) ? BKPT_HARD : BKPT_SOFT;
@@ -1065,10 +1065,10 @@
 	{
 		cortex_m3_unset_breakpoint(target, breakpoint);
 	}
-	
+
 	if (breakpoint->type == BKPT_HARD)
 		cortex_m3->fp_code_available++;
-	
+
 	return ERROR_OK;
 }
 
@@ -1076,7 +1076,7 @@
 {
 	int dwt_num=0;
 	u32 mask, temp;
-	
+
 	/* get pointers to arch-specific information */
 	armv7m_common_t *armv7m = target->arch_info;
 	cortex_m3_common_t *cortex_m3 = armv7m->arch_info;
@@ -1132,7 +1132,7 @@
 	cortex_m3_common_t *cortex_m3 = armv7m->arch_info;
 	cortex_m3_dwt_comparator_t * comparator_list = cortex_m3->dwt_comparator_list;
 	int dwt_num;
-	
+
 	if (!watchpoint->set)
 	{
 		LOG_WARNING("watchpoint not set");
@@ -1160,7 +1160,7 @@
 	/* get pointers to arch-specific information */
 	armv7m_common_t *armv7m = target->arch_info;
 	cortex_m3_common_t *cortex_m3 = armv7m->arch_info;
-	
+
 	if (target->state != TARGET_HALTED)
 	{
 		LOG_WARNING("target not halted");
@@ -1171,14 +1171,14 @@
 	{
 		return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
 	}
-	
+
 	if ((watchpoint->length != 1) && (watchpoint->length != 2) && (watchpoint->length != 4))
 	{
 		return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
 	}
-	
+
 	cortex_m3->dwt_comp_available--;
-		
+
 	return ERROR_OK;
 }
 
@@ -1187,27 +1187,27 @@
 	/* get pointers to arch-specific information */
 	armv7m_common_t *armv7m = target->arch_info;
 	cortex_m3_common_t *cortex_m3 = armv7m->arch_info;
-	
+
 	if (target->state != TARGET_HALTED)
 	{
 		LOG_WARNING("target not halted");
 		return ERROR_TARGET_NOT_HALTED;
 	}
-	
+
 	if (watchpoint->set)
 	{
 		cortex_m3_unset_watchpoint(target, watchpoint);
 	}
-		
+
 	cortex_m3->dwt_comp_available++;
-	
+
 	return ERROR_OK;
 }
 
 void cortex_m3_enable_watchpoints(struct target_s *target)
 {
 	watchpoint_t *watchpoint = target->watchpoints;
-	
+
 	/* set any pending watchpoints */
 	while (watchpoint)
 	{
@@ -1223,12 +1223,12 @@
 	/* get pointers to arch-specific information */
 	armv7m_common_t *armv7m = target->arch_info;
 	swjdp_common_t *swjdp = &armv7m->swjdp_info;
-		
+
 	if ((type == ARMV7M_REGISTER_CORE_GP) && (num <= ARMV7M_PSP))
 	{
 		/* read a normal core register */
 		retval = cortexm3_dap_read_coreregister_u32(swjdp, value, num);
-		
+
 		if (retval != ERROR_OK)
 		{
 			LOG_ERROR("JTAG failure %i",retval);
@@ -1240,33 +1240,33 @@
 	{
 		/* read other registers */
 		cortexm3_dap_read_coreregister_u32(swjdp, value, 20);
-		
+
 		switch (num)
 		{
 			case 19:
 				*value = buf_get_u32((u8*)value, 0, 8);
 				break;
-				
+
 			case 20:
 				*value = buf_get_u32((u8*)value, 8, 8);
 				break;
-				
+
 			case 21:
 				*value = buf_get_u32((u8*)value, 16, 8);
 				break;
-				
+
 			case 22:
 				*value = buf_get_u32((u8*)value, 24, 8);
 				break;
 		}
-		
+
 		LOG_DEBUG("load from special reg %i value 0x%x", num, *value);
 	}
 	else
 	{
 		return ERROR_INVALID_ARGUMENTS;
 	}
-	
+
 	return ERROR_OK;
 }
 
@@ -1274,7 +1274,7 @@
 {
 	int retval;
 	u32 reg;
-	
+
 	/* get pointers to arch-specific information */
 	armv7m_common_t *armv7m = target->arch_info;
 	swjdp_common_t *swjdp = &armv7m->swjdp_info;
@@ -1285,11 +1285,11 @@
 	 * hack to deal with the fact that gdb will sometimes "forge"
 	 * return addresses, and doesn't set the LSB correctly (i.e., when
 	 * printing expressions containing function calls, it sets LR=0.) */
-	
+
 	if (num == 14)
 		value |= 0x01;
 #endif
-	 
+
 	if ((type == ARMV7M_REGISTER_CORE_GP) && (num <= ARMV7M_PSP))
 	{
 		retval = cortexm3_dap_write_coreregister_u32(swjdp, value, num);
@@ -1304,38 +1304,38 @@
 	else if (type == ARMV7M_REGISTER_CORE_SP) /* Special purpose core register */
 	{
 		/* write other registers */
-		
+
 		cortexm3_dap_read_coreregister_u32(swjdp, &reg, 20);
-		
+
 		switch (num)
 		{
 			case 19:
 				buf_set_u32((u8*)&reg, 0, 8, value);
 				break;
-				
+
 			case 20:
 				buf_set_u32((u8*)&reg, 8, 8, value);
 				break;
-				
+
 			case 21:
 				buf_set_u32((u8*)&reg, 16, 8, value);
 				break;
-				
+
 			case 22:
 				buf_set_u32((u8*)&reg, 24, 8, value);
 				break;
 		}
-		
+
 		cortexm3_dap_write_coreregister_u32(swjdp, reg, 20);
-		
+
 		LOG_DEBUG("write special reg %i value 0x%x ", num, value);
 	}
 	else
 	{
 		return ERROR_INVALID_ARGUMENTS;
 	}
-	
-	return ERROR_OK;	
+
+	return ERROR_OK;
 }
 
 int cortex_m3_read_memory(struct target_s *target, u32 address, u32 size, u32 count, u8 *buffer)
@@ -1344,13 +1344,13 @@
 	armv7m_common_t *armv7m = target->arch_info;
 	swjdp_common_t *swjdp = &armv7m->swjdp_info;
 	int retval;
-	
+
 	/* sanitize arguments */
 	if (((size != 4) && (size != 2) && (size != 1)) || (count == 0) || !(buffer))
 		return ERROR_INVALID_ARGUMENTS;
-	
+
 	/* cortex_m3 handles unaligned memory access */
-		
+
 	switch (size)
 	{
 		case 4:
@@ -1366,7 +1366,7 @@
 			LOG_ERROR("BUG: we shouldn't get here");
 			exit(-1);
 	}
-	
+
 	return retval;
 }
 
@@ -1376,11 +1376,11 @@
 	armv7m_common_t *armv7m = target->arch_info;
 	swjdp_common_t *swjdp = &armv7m->swjdp_info;
 	int retval;
-	
+
 	/* sanitize arguments */
 	if (((size != 4) && (size != 2) && (size != 1)) || (count == 0) || !(buffer))
 		return ERROR_INVALID_ARGUMENTS;
-	
+
 	switch (size)
 	{
 		case 4:
@@ -1390,13 +1390,13 @@
 			retval = mem_ap_write_buf_u16(swjdp, buffer, 2 * count, address);
 			break;
 		case 1:
-			retval = mem_ap_write_buf_u8(swjdp, buffer, count, address);	
+			retval = mem_ap_write_buf_u8(swjdp, buffer, count, address);
 			break;
 		default:
 			LOG_ERROR("BUG: we shouldn't get here");
 			exit(-1);
 	}
-	
+
 	return retval;
 }
 
@@ -1421,27 +1421,27 @@
 	int retval;
 	u32 cpuid, fpcr, dwtcr, ictr;
 	int i;
-	
+
 	/* get pointers to arch-specific information */
 	armv7m_common_t *armv7m = target->arch_info;
 	cortex_m3_common_t *cortex_m3 = armv7m->arch_info;
 	swjdp_common_t *swjdp = &armv7m->swjdp_info;
-	
+
 	if ((retval = ahbap_debugport_init(swjdp)) != ERROR_OK)
 		return retval;
-	
+
 	if (!target_was_examined(target))
 	{
 		target_set_examined(target);
-		
+
 		/* Read from Device Identification Registers */
 		if ((retval = target_read_u32(target, CPUID, &cpuid)) != ERROR_OK)
 			return retval;
-		
+
 		if (((cpuid >> 4) & 0xc3f) == 0xc23)
 			LOG_DEBUG("CORTEX-M3 processor detected");
 		LOG_DEBUG("cpuid: 0x%8.8x", cpuid);
-		
+
 		target_read_u32(target, NVIC_ICTR, &ictr);
 		cortex_m3->intlinesnum = (ictr & 0x1F) + 1;
 		cortex_m3->intsetenable = calloc(cortex_m3->intlinesnum, 4);
@@ -1450,7 +1450,7 @@
 			target_read_u32(target, NVIC_ISE0 + 4 * i, cortex_m3->intsetenable + i);
 			LOG_DEBUG("interrupt enable[%i] = 0x%8.8x", i, cortex_m3->intsetenable[i]);
 		}
-		
+
 		/* Setup FPB */
 		target_read_u32(target, FP_CTRL, &fpcr);
 		cortex_m3->auto_bp_type = 1;
@@ -1465,7 +1465,7 @@
 			cortex_m3->fp_comparator_list[i].fpcr_address = FP_COMP0 + 4 * i;
 		}
 		LOG_DEBUG("FPB fpcr 0x%x, numcode %i, numlit %i", fpcr, cortex_m3->fp_num_code, cortex_m3->fp_num_lit);
-			
+
 		/* Setup DWT */
 		target_read_u32(target, DWT_CTRL, &dwtcr);
 		cortex_m3->dwt_num_comp = (dwtcr >> 28) & 0xF;
@@ -1476,26 +1476,26 @@
 			cortex_m3->dwt_comparator_list[i].dwt_comparator_address = DWT_COMP0 + 0x10 * i;
 		}
 	}
-	
+
 	return ERROR_OK;
 }
 
 int cortex_m3_quit(void)
 {
-	
+
 	return ERROR_OK;
 }
 
 int cortex_m3_dcc_read(swjdp_common_t *swjdp, u8 *value, u8 *ctrl)
 {
 	u16 dcrdr;
-	
+
 	mem_ap_read_buf_u16( swjdp, (u8*)&dcrdr, 1, DCB_DCRDR);
 	*ctrl = (u8)dcrdr;
 	*value = (u8)(dcrdr >> 8);
-	
+
 	LOG_DEBUG("data 0x%x ctrl 0x%x", *value, *ctrl);
-	
+
 	/* write ack back to software dcc register
 	 * signify we have read data */
 	if (dcrdr & (1 << 0))
@@ -1503,7 +1503,7 @@
 		dcrdr = 0;
 		mem_ap_write_buf_u16( swjdp, (u8*)&dcrdr, 1, DCB_DCRDR);
 	}
-	
+
 	return ERROR_OK;
 }
 
@@ -1514,13 +1514,13 @@
 	u8 data;
 	u8 ctrl;
 	u32 i;
-	
+
 	for (i = 0; i < (size * 4); i++)
 	{
 		cortex_m3_dcc_read(swjdp, &data, &ctrl);
 		buffer[i] = data;
 	}
-	
+
 	return ERROR_OK;
 }
 
@@ -1531,22 +1531,22 @@
 		return ERROR_OK;
 	armv7m_common_t *armv7m = target->arch_info;
 	swjdp_common_t *swjdp = &armv7m->swjdp_info;
-	
+
 	if (!target->dbg_msg_enabled)
 		return ERROR_OK;
-	
+
 	if (target->state == TARGET_RUNNING)
 	{
 		u8 data;
 		u8 ctrl;
-				
+
 		cortex_m3_dcc_read(swjdp, &data, &ctrl);
-		
+
 		/* check if we have data */
 		if (ctrl & (1 << 0))
 		{
 			u32 request;
-			
+
 			/* we assume target is quick enough */
 			request = data;
 			cortex_m3_dcc_read(swjdp, &data, &ctrl);
@@ -1558,7 +1558,7 @@
 			target_request(target, request);
 		}
 	}
-	
+
 	return ERROR_OK;
 }
 
@@ -1570,14 +1570,14 @@
 	/* prepare JTAG information for the new target */
 	cortex_m3->jtag_info.tap = tap;
 	cortex_m3->jtag_info.scann_size = 4;
-	
+
 	armv7m->swjdp_info.dp_select_value = -1;
 	armv7m->swjdp_info.ap_csw_value = -1;
 	armv7m->swjdp_info.ap_tar_value = -1;
 	armv7m->swjdp_info.jtag_info = &cortex_m3->jtag_info;
 
 	/* initialize arch-specific breakpoint handling */
-	
+
 	cortex_m3->common_magic = CORTEX_M3_COMMON_MAGIC;
 	cortex_m3->arch_info = NULL;
 
@@ -1586,26 +1586,26 @@
 
 	armv7m->pre_debug_entry = NULL;
 	armv7m->post_debug_entry = NULL;
-	
+
 	armv7m->pre_restore_context = NULL;
 	armv7m->post_restore_context = NULL;
-	
-	armv7m_init_arch_info(target, armv7m);	
+
+	armv7m_init_arch_info(target, armv7m);
 	armv7m->arch_info = cortex_m3;
 	armv7m->load_core_reg_u32 = cortex_m3_load_core_reg_u32;
 	armv7m->store_core_reg_u32 = cortex_m3_store_core_reg_u32;
-	
+
 	target_register_timer_callback(cortex_m3_handle_target_request, 1, 1, target);
-	
+
 	return ERROR_OK;
 }
 
 int cortex_m3_target_create(struct target_s *target, Jim_Interp *interp)
 {
 	cortex_m3_common_t *cortex_m3 = calloc(1,sizeof(cortex_m3_common_t));
-	
+
 	cortex_m3_init_arch_info(target, cortex_m3, target->tap);
-	
+
 	return ERROR_OK;
 }
 
@@ -1613,12 +1613,12 @@
 {
 	int retval;
 	command_t *cortex_m3_cmd;
-	
+
 	retval = armv7m_register_commands(cmd_ctx);
-	
-	cortex_m3_cmd = register_command(cmd_ctx, NULL, "cortex_m3", NULL, COMMAND_ANY, "cortex_m3 specific commands");		
+
+	cortex_m3_cmd = register_command(cmd_ctx, NULL, "cortex_m3", NULL, COMMAND_ANY, "cortex_m3 specific commands");
 	register_command(cmd_ctx, cortex_m3_cmd, "maskisr", handle_cortex_m3_mask_interrupts_command, COMMAND_EXEC, "mask cortex_m3 interrupts ['on'|'off']");
-	
+
 	return retval;
 }
 
@@ -1627,13 +1627,13 @@
 	target_t *target = get_current_target(cmd_ctx);
 	armv7m_common_t *armv7m = target->arch_info;
 	cortex_m3_common_t *cortex_m3 = armv7m->arch_info;
-		
+
 	if (target->state != TARGET_HALTED)
 	{
 		command_print(cmd_ctx, "target must be stopped for \"%s\" command", cmd);
 		return ERROR_OK;
 	}
-	
+
 	if (argc > 0)
 	{
 		if (!strcmp(args[0], "on"))
@@ -1649,9 +1649,9 @@
 			command_print(cmd_ctx, "usage: cortex_m3 maskisr ['on'|'off']");
 		}
 	}
-	
+
 	command_print(cmd_ctx, "cortex_m3 interrupt mask %s",
 			(cortex_m3->dcb_dhcsr & C_MASKINTS) ? "on" : "off");
-	
+
 	return ERROR_OK;
 }

Modified: trunk/src/target/target_request.c
===================================================================
--- trunk/src/target/target_request.c	2009-06-01 03:05:26 UTC (rev 1972)
+++ trunk/src/target/target_request.c	2009-06-01 03:05:42 UTC (rev 1973)
@@ -41,25 +41,25 @@
 {
 	char *msg = malloc(CEIL(length + 1, 4) * 4);
 	debug_msg_receiver_t *c = target->dbgmsg;
-	
+
 	target->type->target_request_data(target, CEIL(length, 4), (u8*)msg);
 	msg[length] = 0;
-	
+
 	LOG_DEBUG("%s", msg);
-	
+
 	while (c)
 	{
 		command_print(c->cmd_ctx, "%s", msg);
 		c = c->next;
 	}
-	
+
 	return ERROR_OK;
 }
 
 static int target_charmsg(target_t *target, u8 msg)
 {
 	LOG_USER_N("%c", msg);
-	
+
 	return ERROR_OK;
 }
 
@@ -70,7 +70,7 @@
 	int line_len;
 	debug_msg_receiver_t *c = target->dbgmsg;
 	u32 i;
-	
+
 	LOG_DEBUG("size: %i, length: %i", size, length);
 
 	target->type->target_request_data(target, CEIL(length * size, 4), (u8*)data);
@@ -90,11 +90,11 @@
 				line_len += snprintf(line + line_len, 128 - line_len, "%2.2x ", data[i]);
 				break;
 		}
-		
+
 		if ((i%8 == 7) || (i == length - 1))
 		{
 			LOG_DEBUG("%s", line);
-			
+
 			while (c)
 			{
 				command_print(c->cmd_ctx, "%s", line);
@@ -104,7 +104,7 @@
 			line_len = 0;
 		}
 	}
-	
+
 	free(data);
 
 	return ERROR_OK;
@@ -146,14 +146,14 @@
  			LOG_ERROR("unknown target request: %2.2x", target_req_cmd);
  			break;
 	}
-	
+
 	return ERROR_OK;
 }
 
 static int add_debug_msg_receiver(struct command_context_s *cmd_ctx, target_t *target)
 {
 	debug_msg_receiver_t **p = &target->dbgmsg;
-	
+
 	if (target == NULL)
 		return ERROR_INVALID_ARGUMENTS;
 
@@ -171,10 +171,10 @@
 	(*p) = malloc(sizeof(debug_msg_receiver_t));
 	(*p)->cmd_ctx = cmd_ctx;
 	(*p)->next = NULL;
-	
+
 	/* enable callback */
 	target->dbg_msg_enabled = 1;
-	
+
 	return ERROR_OK;
 }
 
@@ -182,7 +182,7 @@
 {
 	int do_all_targets = 0;
 	debug_msg_receiver_t **p = &target->dbgmsg;
-	
+
 	/* if no target has been specified search all of them */
 	if (target == NULL)
 	{
@@ -193,7 +193,7 @@
 		target = all_targets;
 		do_all_targets = 1;
 	}
-	
+
 	do
 	{
 		while (*p)
@@ -204,10 +204,10 @@
 			}
 			p = &((*p)->next);
 		}
-		
+
 		target = target->next;
 	} while (target && do_all_targets);
-	
+
 	return NULL;
 }
 
@@ -216,14 +216,14 @@
 	debug_msg_receiver_t **p;
 	debug_msg_receiver_t *c;
 	int do_all_targets = 0;
-	
+
 	/* if no target has been specified search all of them */
 	if (target == NULL)
 	{
 		/* if no targets haven been specified */
 		if (all_targets == NULL)
 			return ERROR_OK;
-		
+
 		target = all_targets;
 		do_all_targets = 1;
 	}
@@ -250,10 +250,10 @@
 				p = &(c->next);
 			c = next;
 		}
-	
+
 		target = target->next;
 	} while (target && do_all_targets);
-	
+
 	return ERROR_OK;
 }
 
@@ -262,7 +262,7 @@
 	target_t *target = get_current_target(cmd_ctx);
 
 	int receiving = 0;
-	
+
 	/* see if reciever is already registered */
 	if (find_debug_msg_receiver(cmd_ctx, target) != NULL)
 		receiving = 1;
@@ -293,7 +293,7 @@
 			command_print(cmd_ctx, "usage: target_request debugmsgs ['enable'|'disable'|'charmsg']");
 		}
 	}
-	
+
 	command_print(cmd_ctx, "receiving debug messages from current target %s",
 		      (receiving) ? (charmsg_mode?"charmsg":"enabled") : "disabled" );
 	return ERROR_OK;
@@ -303,7 +303,7 @@
 {
 	target_request_cmd =
 		register_command(cmd_ctx, NULL, "target_request", NULL, COMMAND_ANY, "target_request commands");
-	
+
 	register_command(cmd_ctx, target_request_cmd, "debugmsgs", handle_target_request_debugmsgs_command,
 		COMMAND_EXEC, "enable/disable reception of debug messages from target");
 

[Openocd-svn] r1972 - trunk/src/flash

[<zw...@ma...>]

Author: zwelch
Date: 2009-06-01 05:05:26 +0200 (Mon, 01 Jun 2009)
New Revision: 1972

Modified:
   trunk/src/flash/avrf.c
   trunk/src/flash/lpc288x.c
   trunk/src/flash/ocl.c
   trunk/src/flash/stellaris.c
   trunk/src/flash/stm32x.c
   trunk/src/flash/str9x.c
   trunk/src/flash/str9xpec.c
Log:
David Brownell <da...@pa...>:

Remove broken whitespace ... mostly at end of line, but
also in some cases blocks of inappropriate empty lines.

And spell "comamnd" right. :)


Modified: trunk/src/flash/avrf.c
===================================================================
--- trunk/src/flash/avrf.c	2009-05-31 12:38:28 UTC (rev 1971)
+++ trunk/src/flash/avrf.c	2009-06-01 03:05:26 UTC (rev 1972)
@@ -50,7 +50,7 @@
 #define AVR_JTAG_REG_ProgrammingCommand_Len			15
 #define AVR_JTAG_REG_FlashDataByte_Len				16
 
-avrf_type_t avft_chips_info[] = 
+avrf_type_t avft_chips_info[] =
 {
 //	 name,			chip_id,	flash_page_size,	flash_page_num,	eeprom_page_size,	eeprom_page_num
 	{"atmega128",	0x9702,		256,				512,			8,					512},
@@ -102,7 +102,7 @@
 {
 	avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_AVR_RESET);
 	avr_jtag_senddat(avr->jtag_info.tap, NULL, reset ,AVR_JTAG_REG_Reset_Len);
-	
+
 	return ERROR_OK;
 }
 
@@ -110,17 +110,17 @@
 {
 	avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_IDCODE);
 	avr_jtag_senddat(avr->jtag_info.tap, id, 0, AVR_JTAG_REG_JTAGID_Len);
-	
+
 	return ERROR_OK;
 }
 
 static int avr_jtagprg_enterprogmode(avr_common_t *avr)
 {
 	avr_jtag_reset(avr, 1);
-	
+
 	avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_ENABLE);
 	avr_jtag_senddat(avr->jtag_info.tap, NULL, 0xA370, AVR_JTAG_REG_ProgrammingEnable_Len);
-	
+
 	return ERROR_OK;
 }
 
@@ -134,20 +134,20 @@
 	avr_jtag_senddat(avr->jtag_info.tap, NULL, 0, AVR_JTAG_REG_ProgrammingEnable_Len);
 
 	avr_jtag_reset(avr, 0);
-	
+
 	return ERROR_OK;
 }
 
 static int avr_jtagprg_chiperase(avr_common_t *avr)
 {
 	u32 poll_value;
-	
+
 	avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_COMMANDS);
 	avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x2380, AVR_JTAG_REG_ProgrammingCommand_Len);
 	avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3180, AVR_JTAG_REG_ProgrammingCommand_Len);
 	avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3380, AVR_JTAG_REG_ProgrammingCommand_Len);
 	avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3380, AVR_JTAG_REG_ProgrammingCommand_Len);
-	
+
 	do{
 		poll_value = 0;
 		avr_jtag_senddat(avr->jtag_info.tap, &poll_value, 0x3380, AVR_JTAG_REG_ProgrammingCommand_Len);
@@ -157,25 +157,25 @@
 		}
 		LOG_DEBUG("poll_value = 0x%04X", poll_value);
 	}while(!(poll_value & 0x0200));
-	
+
 	return ERROR_OK;
 }
 
 static int avr_jtagprg_writeflashpage(avr_common_t *avr, u8 *page_buf, u32 buf_size, u32 addr, u32 page_size)
 {
 	u32 i, poll_value;
-	
+
 	avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_COMMANDS);
 	avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x2310, AVR_JTAG_REG_ProgrammingCommand_Len);
-	
+
 	// load addr high byte
 	avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x0700 | ((addr >> 9) & 0xFF), AVR_JTAG_REG_ProgrammingCommand_Len);
-	
+
 	// load addr low byte
 	avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x0300 | ((addr >> 1) & 0xFF), AVR_JTAG_REG_ProgrammingCommand_Len);
-	
+
 	avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_PAGELOAD);
-	
+
 	for (i = 0; i < page_size; i++)
 	{
 		if (i < buf_size)
@@ -187,14 +187,14 @@
 			avr_jtag_senddat(avr->jtag_info.tap, NULL, 0xFF, 8);
 		}
 	}
-	
+
 	avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_COMMANDS);
-	
+
 	avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3700, AVR_JTAG_REG_ProgrammingCommand_Len);
 	avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3500, AVR_JTAG_REG_ProgrammingCommand_Len);
 	avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3700, AVR_JTAG_REG_ProgrammingCommand_Len);
 	avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3700, AVR_JTAG_REG_ProgrammingCommand_Len);
-	
+
 	do{
 		poll_value = 0;
 		avr_jtag_senddat(avr->jtag_info.tap, &poll_value, 0x3700, AVR_JTAG_REG_ProgrammingCommand_Len);
@@ -204,7 +204,7 @@
 		}
 		LOG_DEBUG("poll_value = 0x%04X", poll_value);
 	}while(!(poll_value & 0x0200));
-	
+
 	return ERROR_OK;
 }
 
@@ -212,28 +212,28 @@
 static int avrf_register_commands(struct command_context_s *cmd_ctx)
 {
 	command_t *avr_cmd = register_command(cmd_ctx, NULL, "avr", NULL, COMMAND_ANY, "avr flash specific commands");
-	
+
 	register_command(cmd_ctx, avr_cmd, "mass_erase", avrf_handle_mass_erase_command, COMMAND_EXEC,
 					 "mass erase device");
-	
+
 	return ERROR_OK;
 }
 
 static int avrf_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank)
 {
 	avrf_flash_bank_t *avrf_info;
-	
+
 	if (argc < 6)
 	{
 		LOG_WARNING("incomplete flash_bank avr configuration");
 		return ERROR_FLASH_BANK_INVALID;
 	}
-	
+
 	avrf_info = malloc(sizeof(avrf_flash_bank_t));
 	bank->driver_priv = avrf_info;
-	
+
 	avrf_info->probed = 0;
-	
+
 	return ERROR_OK;
 }
 
@@ -254,28 +254,28 @@
 	target_t *target = bank->target;
 	avr_common_t *avr = target->arch_info;
 	u32 cur_size, cur_buffer_size, page_size;
-	
+
 	if (bank->target->state != TARGET_HALTED)
 	{
 		LOG_ERROR("Target not halted");
 		return ERROR_TARGET_NOT_HALTED;
 	}
-	
+
 	page_size = bank->sectors[0].size;
 	if ((offset % page_size) != 0)
 	{
 		LOG_WARNING("offset 0x%x breaks required %d-byte alignment", offset, page_size);
 		return ERROR_FLASH_DST_BREAKS_ALIGNMENT;
 	}
-	
+
 	LOG_DEBUG("offset is 0x%08X", offset);
 	LOG_DEBUG("count is %d", count);
-	
+
 	if (ERROR_OK != avr_jtagprg_enterprogmode(avr))
 	{
 		return ERROR_FAIL;
 	}
-	
+
 	cur_size = 0;
 	while(count > 0)
 	{
@@ -290,10 +290,10 @@
 		avr_jtagprg_writeflashpage(avr, buffer + cur_size, cur_buffer_size, offset + cur_size, page_size);
 		count -= cur_buffer_size;
 		cur_size += cur_buffer_size;
-		
+
 		keep_alive();
 	}
-	
+
 	return avr_jtagprg_leaveprogmode(avr);
 }
 
@@ -308,7 +308,7 @@
 	avrf_type_t *avr_info = NULL;
 	int i;
 	u32 device_id;
-	
+
 	if (bank->target->state != TARGET_HALTED)
 	{
 		LOG_ERROR("Target not halted");
@@ -316,19 +316,19 @@
 	}
 
 	avrf_info->probed = 0;
-	
+
 	avr_jtag_read_jtagid(avr, &device_id);
 	if (ERROR_OK != mcu_execute_queue())
 	{
 		return ERROR_FAIL;
 	}
-	
+
 	LOG_INFO( "device id = 0x%08x", device_id );
 	if (EXTRACT_MFG(device_id) != 0x1F)
 	{
 		LOG_ERROR("0x%X is invalid Manufacturer for avr, 0x%X is expected", EXTRACT_MFG(device_id), 0x1F);
 	}
-	
+
 	for (i = 0; i < (int)(sizeof(avft_chips_info) / sizeof(avft_chips_info[0])); i++)
 	{
 		if (avft_chips_info[i].chip_id == EXTRACT_PART(device_id))
@@ -338,7 +338,7 @@
 			break;
 		}
 	}
-	
+
 	if (avr_info != NULL)
 	{
 		// chip found
@@ -346,7 +346,7 @@
 		bank->size = (avr_info->flash_page_size * avr_info->flash_page_num);
 		bank->num_sectors = avr_info->flash_page_num;
 		bank->sectors = malloc(sizeof(flash_sector_t) * avr_info->flash_page_num);
-		
+
 		for (i = 0; i < avr_info->flash_page_num; i++)
 		{
 			bank->sectors[i].offset = i * avr_info->flash_page_size;
@@ -354,7 +354,7 @@
 			bank->sectors[i].is_erased = -1;
 			bank->sectors[i].is_protected = 1;
 		}
-		
+
 		avrf_info->probed = 1;
 		return ERROR_OK;
 	}
@@ -362,7 +362,7 @@
 	{
 		// chip not supported
 		LOG_ERROR("0x%X is not support for avr", EXTRACT_PART(device_id));
-		
+
 		avrf_info->probed = 1;
 		return ERROR_FAIL;
 	}
@@ -389,36 +389,36 @@
 	avrf_type_t *avr_info = NULL;
 	int i;
 	u32 device_id;
-	
+
 	if (bank->target->state != TARGET_HALTED)
 	{
 		LOG_ERROR("Target not halted");
 		return ERROR_TARGET_NOT_HALTED;
 	}
-	
+
 	avr_jtag_read_jtagid(avr, &device_id);
 	if (ERROR_OK != mcu_execute_queue())
 	{
 		return ERROR_FAIL;
 	}
-	
+
 	LOG_INFO( "device id = 0x%08x", device_id );
 	if (EXTRACT_MFG(device_id) != 0x1F)
 	{
 		LOG_ERROR("0x%X is invalid Manufacturer for avr, 0x%X is expected", EXTRACT_MFG(device_id), 0x1F);
 	}
-	
+
 	for (i = 0; i < (int)(sizeof(avft_chips_info) / sizeof(avft_chips_info[0])); i++)
 	{
 		if (avft_chips_info[i].chip_id == EXTRACT_PART(device_id))
 		{
 			avr_info = &avft_chips_info[i];
 			LOG_INFO("target device is %s", avr_info->name);
-			
+
 			break;
 		}
 	}
-	
+
 	if (avr_info != NULL)
 	{
 		// chip found
@@ -437,20 +437,20 @@
 {
 	target_t *target = bank->target;
 	avr_common_t *avr = target->arch_info;
-	
+
 	if (target->state != TARGET_HALTED)
 	{
 		LOG_ERROR("Target not halted");
 		return ERROR_TARGET_NOT_HALTED;
 	}
-	
+
 	if ((ERROR_OK != avr_jtagprg_enterprogmode(avr))
 		|| (ERROR_OK != avr_jtagprg_chiperase(avr))
 		|| (ERROR_OK != avr_jtagprg_leaveprogmode(avr)))
 	{
 		return ERROR_FAIL;
 	}
-	
+
 	return ERROR_OK;
 }
 
@@ -458,20 +458,20 @@
 {
 	flash_bank_t *bank;
 	int i;
-	
+
 	if (argc < 1)
 	{
 		command_print(cmd_ctx, "avr mass_erase <bank>");
-		return ERROR_OK;	
+		return ERROR_OK;
 	}
-	
+
 	bank = get_flash_bank_by_num(strtoul(args[0], NULL, 0));
 	if (!bank)
 	{
 		command_print(cmd_ctx, "flash bank '#%s' is out of bounds", args[0]);
 		return ERROR_OK;
 	}
-	
+
 	if (avrf_mass_erase(bank) == ERROR_OK)
 	{
 		/* set all sectors as erased */
@@ -479,14 +479,14 @@
 		{
 			bank->sectors[i].is_erased = 1;
 		}
-		
+
 		command_print(cmd_ctx, "avr mass erase complete");
 	}
 	else
 	{
 		command_print(cmd_ctx, "avr mass erase failed");
 	}
-	
+
 	LOG_DEBUG("%s", __FUNCTION__);
 	return ERROR_OK;
 }

Modified: trunk/src/flash/lpc288x.c
===================================================================
--- trunk/src/flash/lpc288x.c	2009-05-31 12:38:28 UTC (rev 1971)
+++ trunk/src/flash/lpc288x.c	2009-06-01 03:05:26 UTC (rev 1972)
@@ -128,7 +128,7 @@
 		timeout--;
 		target_read_u32(target, F_STAT, &status);
 	}while (((status & FS_DONE) == 0) && timeout);
-	
+
 	if(timeout == 0)
 	{
 		LOG_DEBUG("Timedout!");
@@ -143,31 +143,31 @@
 	lpc288x_flash_bank_t *lpc288x_info = bank->driver_priv;
 	target_t *target = bank->target;
 	u32 cidr;
-	
+
 	int i = 0;
 	u32 offset;
-	
+
 	if (lpc288x_info->cidr == 0x0102100A)
 		return ERROR_OK; /* already probed, multiple probes may cause memory leak, not allowed */
-		
+
 	/* Read and parse chip identification register */
 	target_read_u32(target, DBGU_CIDR, &cidr);
-	
+
 	if (cidr != 0x0102100A)
 	{
 		LOG_WARNING("Cannot identify target as an LPC288X (%08X)",cidr);
 		return ERROR_FLASH_OPERATION_FAILED;
 	}
-	
+
 	lpc288x_info->cidr = cidr;
 	lpc288x_info->sector_size_break = 0x000F0000;
 	lpc288x_info->target_name = "LPC288x";
-	
+
 	/* setup the sector info... */
 	offset = bank->base;
 	bank->num_sectors = 23;
 	bank->sectors = malloc(sizeof(flash_sector_t) * 23);
-	
+
 	for (i = 0; i < 15; i++)
 	{
 		bank->sectors[i].offset = offset;
@@ -184,7 +184,7 @@
 		bank->sectors[i].is_erased = -1;
 		bank->sectors[i].is_protected = 1;
 	}
-	
+
 	return ERROR_OK;
 }
 
@@ -197,20 +197,20 @@
 static int lpc288x_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank)
 {
 	lpc288x_flash_bank_t *lpc288x_info;
-	
+
 	if (argc < 6)
 	{
 		LOG_WARNING("incomplete flash_bank LPC288x configuration");
 		return ERROR_FLASH_BANK_INVALID;
 	}
-	
+
 	lpc288x_info = malloc(sizeof(lpc288x_flash_bank_t));
 	bank->driver_priv = lpc288x_info;
-	
+
 	/* part wasn't probed for info yet */
 	lpc288x_info->cidr = 0;
 	lpc288x_info->cclk = strtoul(args[6], NULL, 0);
-	
+
 	return ERROR_OK;
 }
 
@@ -230,9 +230,9 @@
 
 /* AHB tcyc (in ns) 83 ns
  * LOAD_TIMER_ERASE		FPT_TIME	= ((400,000,000 / AHB tcyc (in ns)) - 2) / 512
- * 									= 9412 (9500) (AN10548 9375)
+ *									= 9412 (9500) (AN10548 9375)
  * LOAD_TIMER_WRITE		FPT_TIME	= ((1,000,000 / AHB tcyc (in ns)) - 2) / 512
- * 									= 23 (75) (AN10548 72 - is this wrong?)
+ *									= 23 (75) (AN10548 72 - is this wrong?)
  * TODO: Sort out timing calcs ;) */
 static void lpc288x_load_timer(int erase, struct target_s *target)
 {
@@ -253,7 +253,7 @@
 	{
 		return ERROR_FLASH_BANK_NOT_PROBED;
 	}
-	
+
 	if (bank->target->state != TARGET_HALTED)
 	{
 		LOG_ERROR("Target not halted");
@@ -270,7 +270,7 @@
 		LOG_INFO("Processor not halted/not probed");
 		return status;
 	}
-	
+
 	return ERROR_OK;
 }
 
@@ -279,33 +279,33 @@
 	u32 status;
 	int sector;
 	target_t *target = bank->target;
-	
+
 	status = lpc288x_system_ready(bank);    /* probed? halted? */
 	if (status != ERROR_OK)
 	{
 		return status;
 	}
-	
+
 	if ((first < 0) || (last < first) || (last >= bank->num_sectors))
 	{
 		LOG_INFO("Bad sector range");
 		return ERROR_FLASH_SECTOR_INVALID;
 	}
-	
+
 	/* Configure the flash controller timing */
 	lpc288x_set_flash_clk(bank);
-	
+
 	for (sector = first; sector <= last; sector++)
 	{
 		if (lpc288x_wait_status_busy(bank, 1000) != ERROR_OK)
 		{
 			return ERROR_FLASH_OPERATION_FAILED;
 		}
-		
+
 		lpc288x_load_timer(LOAD_TIMER_ERASE,target);
-		
+
 		target_write_u32(target, bank->sectors[sector].offset, 0x00);
-		
+
 		target_write_u32(target, F_CTRL, FC_PROG_REQ | FC_PROTECT | FC_CS);
 	}
 	if (lpc288x_wait_status_busy(bank, 1000) != ERROR_OK)
@@ -323,17 +323,17 @@
 	u32 bytes_remaining = count;
 	u32 first_sector, last_sector, sector, page;
 	int i;
-	
+
 	/* probed? halted? */
 	status = lpc288x_system_ready(bank);
 	if (status != ERROR_OK)
 	{
 		return status;
 	}
-	
+
 	/* Initialise search indices */
 	first_sector = last_sector = 0xffffffff;
-	
+
 	/* validate the write range... */
 	for (i = 0; i < bank->num_sectors; i++)
 	{
@@ -356,21 +356,21 @@
 			last_sector = i;
 		}
 	}
-	
+
 	/* Range check... */
 	if (first_sector == 0xffffffff || last_sector == 0xffffffff)
 	{
 		LOG_INFO("Range check failed %x %x", offset, count);
 		return ERROR_FLASH_DST_OUT_OF_BANK;
 	}
-	
+
 	/* Configure the flash controller timing */
 	lpc288x_set_flash_clk(bank);
-	
+
 	/* initialise the offsets */
 	source_offset = 0;
 	dest_offset = 0;
-	
+
 	for (sector = first_sector; sector <= last_sector; sector++)
 	{
 		for (page = 0; page < bank->sectors[sector].size / FLASH_PAGE_SIZE; page++)
@@ -391,16 +391,16 @@
 				count = FLASH_PAGE_SIZE;
 				memcpy(page_buffer, &buffer[source_offset], count);
 			}
-			
+
 			/* Wait for flash to become ready */
 			if (lpc288x_wait_status_busy(bank, 1000) != ERROR_OK)
 			{
 				return ERROR_FLASH_OPERATION_FAILED;
 			}
-			
+
 			/* fill flash data latches with 1's */
 			target_write_u32(target, F_CTRL, FC_CS | FC_SET_DATA | FC_WEN | FC_FUNC);
-			
+
 			target_write_u32(target, F_CTRL, FC_CS | FC_WEN | FC_FUNC);
 			/*would be better to use the clean target_write_buffer() interface but
 			 * it seems not to be a LOT slower....
@@ -421,13 +421,13 @@
 			dest_offset += FLASH_PAGE_SIZE;
 			source_offset += count;
 			bytes_remaining -= count;
-			
+
 			lpc288x_load_timer(LOAD_TIMER_WRITE, target);
-			
+
 			target_write_u32(target, F_CTRL, FC_PROG_REQ | FC_PROTECT | FC_FUNC | FC_CS);
 		}
 	}
-	
+
 	return ERROR_OK;
 }
 
@@ -436,18 +436,18 @@
 	/* we only deal with LPC2888 so flash config is fixed */
 	lpc288x_flash_bank_t *lpc288x_info = bank->driver_priv;
 	int retval;
-	
+
 	if (lpc288x_info->cidr != 0)
 	{
 		return ERROR_OK; /* already probed */
 	}
-	
+
 	if (bank->target->state != TARGET_HALTED)
 	{
 		LOG_ERROR("Target not halted");
 		return ERROR_TARGET_NOT_HALTED;
 	}
-	
+
 	retval = lpc288x_read_part_info(bank);
 	if (retval != ERROR_OK)
 		return retval;
@@ -465,22 +465,22 @@
 	int lockregion, status;
 	u32 value;
 	target_t *target = bank->target;
-	
+
 	/* probed? halted? */
-	status = lpc288x_system_ready(bank);   
+	status = lpc288x_system_ready(bank);
 	if (status != ERROR_OK)
 	{
 		return status;
 	}
-	
+
 	if ((first < 0) || (last < first) || (last >= bank->num_sectors))
 	{
 		return ERROR_FLASH_SECTOR_INVALID;
 	}
-	
+
 	/* Configure the flash controller timing */
-	lpc288x_set_flash_clk(bank);   
-	
+	lpc288x_set_flash_clk(bank);
+
 	for (lockregion = first; lockregion <= last; lockregion++)
 	{
 		if (set)
@@ -496,6 +496,6 @@
 		target_write_u32(target, bank->sectors[lockregion].offset, value);
 		target_write_u32(target, F_CTRL, FC_LOAD_REQ | FC_PROTECT | FC_WEN | FC_FUNC | FC_CS);
 	}
-	
+
 	return ERROR_OK;
 }

Modified: trunk/src/flash/ocl.c
===================================================================
--- trunk/src/flash/ocl.c	2009-05-31 12:38:28 UTC (rev 1971)
+++ trunk/src/flash/ocl.c	2009-06-01 03:05:26 UTC (rev 1972)
@@ -108,13 +108,13 @@
 	/* check preconditions */
 	if (bank->num_sectors == 0)
 		return ERROR_FLASH_BANK_NOT_PROBED;
-		
+
 	if (bank->target->state != TARGET_RUNNING)
 	{
 		LOG_ERROR("target has to be running to communicate with the loader");
 		return ERROR_TARGET_NOT_RUNNING;
 	}
-		
+
 	if ((first == 0) && (last == bank->num_sectors - 1))
 	{
 		dcc_buffer[0] = OCL_ERASE_ALL;
@@ -168,7 +168,7 @@
 	int byteofs;
 	int runlen;
 	u32 chksum;
-	
+
 	int i;
 
 	/* check preconditions */
@@ -227,7 +227,7 @@
 			chksum ^= *(dcc_bufptr++);
 
 		*(dcc_bufptr++) = chksum;
-		
+
 		/* send the data */
 		if ((retval = embeddedice_send(ocl->jtag_info, dcc_buffer, dcc_bufptr-dcc_buffer)) != ERROR_OK)
 		{
@@ -292,7 +292,7 @@
 	/* receive response */
 	if ((retval = embeddedice_receive(ocl->jtag_info, dcc_buffer, 1) != ERROR_OK))
 		return retval;
-		
+
 	if (dcc_buffer[0] != OCL_CMD_DONE)
 	{
 		LOG_ERROR("loader response to OCL_PROBE 0x%08X", dcc_buffer[0]);

Modified: trunk/src/flash/stellaris.c
===================================================================
--- trunk/src/flash/stellaris.c	2009-05-31 12:38:28 UTC (rev 1971)
+++ trunk/src/flash/stellaris.c	2009-06-01 03:05:26 UTC (rev 1972)
@@ -241,30 +241,30 @@
 static int stellaris_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank)
 {
 	stellaris_flash_bank_t *stellaris_info;
-	
+
 	if (argc < 6)
 	{
 		LOG_WARNING("incomplete flash_bank stellaris configuration");
 		return ERROR_FLASH_BANK_INVALID;
 	}
-	
+
 	stellaris_info = calloc(sizeof(stellaris_flash_bank_t), 1);
 	bank->base = 0x0;
 	bank->driver_priv = stellaris_info;
-	
+
 	stellaris_info->target_name = "Unknown target";
-	
+
 	/* part wasn't probed for info yet */
 	stellaris_info->did1 = 0;
-	
-	/* TODO Use an optional main oscillator clock rate in kHz from arg[6] */ 
+
+	/* TODO Use an optional main oscillator clock rate in kHz from arg[6] */
 	return ERROR_OK;
 }
 
 static int stellaris_register_commands(struct command_context_s *cmd_ctx)
 {
 	command_t *stm32x_cmd = register_command(cmd_ctx, NULL, "stellaris", NULL, COMMAND_ANY, "stellaris flash specific commands");
-	
+
 	register_command(cmd_ctx, stm32x_cmd, "mass_erase", stellaris_handle_mass_erase_command, COMMAND_EXEC, "mass erase device");
 	return ERROR_OK;
 }
@@ -273,7 +273,7 @@
 {
 	int printed, device_class;
 	stellaris_flash_bank_t *stellaris_info = bank->driver_priv;
-	
+
 	stellaris_read_part_info(bank);
 
 	if (stellaris_info->did1 == 0)
@@ -283,7 +283,7 @@
 		buf_size -= printed;
 		return ERROR_FLASH_OPERATION_FAILED;
 	}
-	
+
 	if (DID0_VER(stellaris_info->did0) > 0)
 	{
 		device_class = (stellaris_info->did0>>16) & 0xFF;
@@ -291,14 +291,14 @@
 	else
 	{
 		device_class = 0;
-	}	
+	}
 	printed = snprintf(buf, buf_size, "\nLMI Stellaris information: Chip is class %i(%s) %s v%c.%i\n",
 	  device_class, StellarisClassname[device_class], stellaris_info->target_name,
 	  'A' + ((stellaris_info->did0>>8) & 0xFF), (stellaris_info->did0) & 0xFF);
 	buf += printed;
 	buf_size -= printed;
 
-	printed = snprintf(buf, buf_size, "did1: 0x%8.8x, arch: 0x%4.4x, eproc: %s, ramsize:%ik, flashsize: %ik\n", 
+	printed = snprintf(buf, buf_size, "did1: 0x%8.8x, arch: 0x%4.4x, eproc: %s, ramsize:%ik, flashsize: %ik\n",
 	 stellaris_info->did1, stellaris_info->did1, "ARMV7M", (1+((stellaris_info->dc0>>16) & 0xFFFF))/4, (1+(stellaris_info->dc0 & 0xFFFF))*2);
 	buf += printed;
 	buf_size -= printed;
@@ -324,14 +324,14 @@
 {
 	target_t *target = bank->target;
 	u32 fmc;
-	
+
 	target_read_u32(target, FLASH_CONTROL_BASE|FLASH_FMC, &fmc);
-	
+
 	return fmc;
 }
 
 /** Read clock configuration and set stellaris_info->usec_clocks*/
- 
+
 static void stellaris_read_clock_info(flash_bank_t *bank)
 {
 	stellaris_flash_bank_t *stellaris_info = bank->driver_priv;
@@ -344,7 +344,7 @@
 	target_read_u32(target, SCB_BASE|PLLCFG, &pllcfg);
 	LOG_DEBUG("Stellaris PLLCFG %x", pllcfg);
 	stellaris_info->rcc = rcc;
-	
+
 	sysdiv = (rcc>>23) & 0xF;
 	usesysdiv = (rcc>>22) & 0x1;
 	bypass = (rcc>>11) & 0x1;
@@ -370,15 +370,15 @@
 			mainfreq = 0;
 			break;
 	}
-	
+
 	if (!bypass)
 		mainfreq = 200000000; /* PLL out frec */
-		
+
 	if (usesysdiv)
 		stellaris_info->mck_freq = mainfreq/(1+sysdiv);
 	else
 		stellaris_info->mck_freq = mainfreq;
-	
+
 	/* Forget old flash timing */
 	stellaris_set_flash_mode(bank, 0);
 }
@@ -390,7 +390,7 @@
 	target_t *target = bank->target;
 
 	u32 usecrl = (stellaris_info->mck_freq/1000000ul-1);
-	LOG_DEBUG("usecrl = %i",usecrl);	
+	LOG_DEBUG("usecrl = %i",usecrl);
 	target_write_u32(target, SCB_BASE|USECRL, usecrl);
 }
 
@@ -398,33 +398,33 @@
 static u32 stellaris_wait_status_busy(flash_bank_t *bank, u32 waitbits, int timeout)
 {
 	u32 status;
-	
+
 	/* Stellaris waits for cmdbit to clear */
 	while (((status = stellaris_get_flash_status(bank)) & waitbits) && (timeout-- > 0))
 	{
 		LOG_DEBUG("status: 0x%x", status);
 		alive_sleep(1);
 	}
-	
+
 	/* Flash errors are reflected in the FLASH_CRIS register */
 
 	return status;
 }
 
 /* Send one command to the flash controller */
-static int stellaris_flash_command(struct flash_bank_s *bank,u8 cmd,u16 pagen) 
+static int stellaris_flash_command(struct flash_bank_s *bank,u8 cmd,u16 pagen)
 {
 	u32 fmc;
 	target_t *target = bank->target;
 
-	fmc = FMC_WRKEY | cmd; 
+	fmc = FMC_WRKEY | cmd;
 	target_write_u32(target, FLASH_CONTROL_BASE|FLASH_FMC, fmc);
 	LOG_DEBUG("Flash command: 0x%x", fmc);
 
-	if (stellaris_wait_status_busy(bank, cmd, 100)) 
+	if (stellaris_wait_status_busy(bank, cmd, 100))
 	{
 		return ERROR_FLASH_OPERATION_FAILED;
-	}		
+	}
 
 	return ERROR_OK;
 }
@@ -437,7 +437,7 @@
 	target_t *target = bank->target;
 	u32 did0, did1, ver, fam, status;
 	int i;
-	
+
 	/* Read and parse chip identification register */
 	target_read_u32(target, SCB_BASE|DID0, &did0);
 	target_read_u32(target, SCB_BASE|DID1, &did1);
@@ -470,9 +470,9 @@
 		if (StellarisParts[i].partno == ((did1 >> 16) & 0xFF))
 			break;
 	}
-	
+
 	stellaris_info->target_name = StellarisParts[i].partname;
-	
+
 	stellaris_info->did0 = did0;
 	stellaris_info->did1 = did1;
 
@@ -496,9 +496,9 @@
 
 	/* Read main and master clock freqency register */
 	stellaris_read_clock_info(bank);
-	
+
 	status = stellaris_get_flash_status(bank);
-	
+
 	return ERROR_OK;
 }
 
@@ -509,7 +509,7 @@
 static int stellaris_protect_check(struct flash_bank_s *bank)
 {
 	u32 status;
-	
+
 	stellaris_flash_bank_t *stellaris_info = bank->driver_priv;
 
 	if (bank->target->state != TARGET_HALTED)
@@ -528,10 +528,10 @@
 		LOG_WARNING("Cannot identify target as an AT91SAM");
 		return ERROR_FLASH_OPERATION_FAILED;
 	}
-		
+
 	status = stellaris_get_flash_status(bank);
 	stellaris_info->lockbits = status >> 16;
-	
+
 	return ERROR_OK;
 }
 
@@ -541,7 +541,7 @@
 	u32 flash_fmc, flash_cris;
 	stellaris_flash_bank_t *stellaris_info = bank->driver_priv;
 	target_t *target = bank->target;
-	
+
 	if (bank->target->state != TARGET_HALTED)
 	{
 		LOG_ERROR("Target not halted");
@@ -557,26 +557,26 @@
 	{
 		LOG_WARNING("Cannot identify target as Stellaris");
 		return ERROR_FLASH_OPERATION_FAILED;
-	}	
-	
+	}
+
 	if ((first < 0) || (last < first) || (last >= (int)stellaris_info->num_pages))
 	{
 		return ERROR_FLASH_SECTOR_INVALID;
 	}
-	
+
 	if ((first == 0) && (last == ((int)stellaris_info->num_pages-1)))
 	{
 		return stellaris_mass_erase(bank);
 	}
-	
+
 	/* Configure the flash controller timing */
-	stellaris_read_clock_info(bank);	
+	stellaris_read_clock_info(bank);
 	stellaris_set_flash_mode(bank,0);
 
 	/* Clear and disable flash programming interrupts */
 	target_write_u32(target, FLASH_CIM, 0);
 	target_write_u32(target, FLASH_MISC, PMISC|AMISC);
-	
+
 	for (banknr = first; banknr <= last; banknr++)
 	{
 		/* Address is first word in page */
@@ -598,7 +598,7 @@
 			target_write_u32(target, FLASH_CRIS, 0);
 			return ERROR_FLASH_OPERATION_FAILED;
 		}
-		
+
 		bank->sectors[banknr].is_erased = 1;
 	}
 
@@ -609,21 +609,21 @@
 {
 	u32 fmppe, flash_fmc, flash_cris;
 	int lockregion;
-	
+
 	stellaris_flash_bank_t *stellaris_info = bank->driver_priv;
 	target_t *target = bank->target;
-	
+
 	if (bank->target->state != TARGET_HALTED)
 	{
 		LOG_ERROR("Target not halted");
 		return ERROR_TARGET_NOT_HALTED;
 	}
-	
+
 	if ((first < 0) || (last < first) || (last >= stellaris_info->num_lockbits))
 	{
 		return ERROR_FLASH_SECTOR_INVALID;
 	}
-	
+
 	if (stellaris_info->did1 == 0)
 	{
 		stellaris_read_part_info(bank);
@@ -634,7 +634,7 @@
 		LOG_WARNING("Cannot identify target as an Stellaris MCU");
 		return ERROR_FLASH_OPERATION_FAILED;
 	}
-	
+
 	/* Configure the flash controller timing */
 	stellaris_read_clock_info(bank);
 	stellaris_set_flash_mode(bank, 0);
@@ -643,15 +643,15 @@
 	for (lockregion = first; lockregion <= last; lockregion++)
 	{
 		if (set)
-			fmppe &= ~(1<<lockregion); 
+			fmppe &= ~(1<<lockregion);
 		else
-			fmppe |= (1<<lockregion); 
+			fmppe |= (1<<lockregion);
 	}
 
 	/* Clear and disable flash programming interrupts */
 	target_write_u32(target, FLASH_CIM, 0);
 	target_write_u32(target, FLASH_MISC, PMISC|AMISC);
-	
+
 	LOG_DEBUG("fmppe 0x%x",fmppe);
 	target_write_u32(target, SCB_BASE|FMPPE, fmppe);
 	/* Commit FMPPE */
@@ -675,21 +675,21 @@
 		target_write_u32(target, FLASH_CRIS, 0);
 		return ERROR_FLASH_OPERATION_FAILED;
 	}
-	
+
 	target_read_u32(target, SCB_BASE|FMPPE, &stellaris_info->lockbits);
-	
+
 	return ERROR_OK;
 }
 
-static u8 stellaris_write_code[] = 
+static u8 stellaris_write_code[] =
 {
-/* 
-	Call with :	
+/*
+	Call with :
 	r0 = buffer address
 	r1 = destination address
-	r2 = bytecount (in) - endaddr (work) 
-	
-	Used registers:	
+	r2 = bytecount (in) - endaddr (work)
+
+	Used registers:
 	r3 = pFLASH_CTRL_BASE
 	r4 = FLASHWRITECMD
 	r5 = #1
@@ -731,7 +731,7 @@
 	reg_param_t reg_params[3];
 	armv7m_algorithm_t armv7m_info;
 	int retval = ERROR_OK;
-	
+
 	LOG_DEBUG("(bank=%p buffer=%p offset=%08X wcount=%08X)",
 			bank, buffer, offset, wcount);
 
@@ -748,32 +748,32 @@
 	while (target_alloc_working_area(target, buffer_size, &source) != ERROR_OK)
 	{
 		LOG_DEBUG("called target_alloc_working_area(target=%p buffer_size=%08X source=%p)",
-				target, buffer_size, source); 
+				target, buffer_size, source);
 		buffer_size /= 2;
 		if (buffer_size <= 256)
 		{
 			/* if we already allocated the writing code, but failed to get a buffer, free the algorithm */
 			if (write_algorithm)
 				target_free_working_area(target, write_algorithm);
-			
+
 			LOG_WARNING("no large enough working area available, can't do block memory writes");
 			return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
 		}
 	};
-	
+
 	armv7m_info.common_magic = ARMV7M_COMMON_MAGIC;
 	armv7m_info.core_mode = ARMV7M_MODE_ANY;
-	
+
 	init_reg_param(&reg_params[0], "r0", 32, PARAM_OUT);
 	init_reg_param(&reg_params[1], "r1", 32, PARAM_OUT);
 	init_reg_param(&reg_params[2], "r2", 32, PARAM_OUT);
-	
+
 	while (wcount > 0)
 	{
 		u32 thisrun_count = (wcount > (buffer_size / 4)) ? (buffer_size / 4) : wcount;
-		
+
 		target_write_buffer(target, source->address, thisrun_count * 4, buffer);
-		
+
 		buf_set_u32(reg_params[0].value, 0, 32, source->address);
 		buf_set_u32(reg_params[1].value, 0, 32, address);
 		buf_set_u32(reg_params[2].value, 0, 32, 4*thisrun_count);
@@ -785,19 +785,19 @@
 			retval = ERROR_FLASH_OPERATION_FAILED;
 			break;
 		}
-	
+
 		buffer += thisrun_count * 4;
 		address += thisrun_count * 4;
 		wcount -= thisrun_count;
 	}
-	
+
 	target_free_working_area(target, write_algorithm);
 	target_free_working_area(target, source);
-	
+
 	destroy_reg_param(&reg_params[0]);
 	destroy_reg_param(&reg_params[1]);
 	destroy_reg_param(&reg_params[2]);
-	
+
 	return retval;
 }
 
@@ -811,7 +811,7 @@
 	u32 bytes_remaining = (count & 0x00000003);
 	u32 bytes_written = 0;
 	int retval;
-	
+
 	if (bank->target->state != TARGET_HALTED)
 	{
 		LOG_ERROR("Target not halted");
@@ -831,26 +831,26 @@
 		LOG_WARNING("Cannot identify target as a Stellaris processor");
 		return ERROR_FLASH_OPERATION_FAILED;
 	}
-	
+
 	if (offset & 0x3)
 	{
 		LOG_WARNING("offset size must be word aligned");
 		return ERROR_FLASH_DST_BREAKS_ALIGNMENT;
 	}
-	
+
 	if (offset + count > bank->size)
 		return ERROR_FLASH_DST_OUT_OF_BANK;
 
-	/* Configure the flash controller timing */	
-	stellaris_read_clock_info(bank);	
+	/* Configure the flash controller timing */
+	stellaris_read_clock_info(bank);
 	stellaris_set_flash_mode(bank, 0);
-	
+
 	/* Clear and disable flash programming interrupts */
 	target_write_u32(target, FLASH_CIM, 0);
 	target_write_u32(target, FLASH_MISC, PMISC|AMISC);
 
 	/* multiple words to be programmed? */
-	if (words_remaining > 0) 
+	if (words_remaining > 0)
 	{
 		/* try using a block write */
 		if ((retval = stellaris_write_block(bank, buffer, offset, words_remaining)) != ERROR_OK)
@@ -858,14 +858,14 @@
 			if (retval == ERROR_TARGET_RESOURCE_NOT_AVAILABLE)
 			{
 				/* if block write failed (no sufficient working area),
-				 * we use normal (slow) single dword accesses */ 
+				 * we use normal (slow) single dword accesses */
 				LOG_WARNING("couldn't use block writes, falling back to single memory accesses");
 			}
 			else if (retval == ERROR_FLASH_OPERATION_FAILED)
 			{
 				/* if an error occured, we examine the reason, and quit */
 				target_read_u32(target, FLASH_CRIS, &flash_cris);
-				
+
 				LOG_ERROR("flash writing failed with CRIS: 0x%x", flash_cris);
 				return ERROR_FLASH_OPERATION_FAILED;
 			}
@@ -877,12 +877,12 @@
 			words_remaining = 0;
 		}
 	}
-	
+
 	while (words_remaining > 0)
 	{
 		if (!(address & 0xff))
 			LOG_DEBUG("0x%x", address);
-		
+
 		/* Program one word */
 		target_write_u32(target, FLASH_FMA, address);
 		target_write_buffer(target, FLASH_FMD, 4, buffer);
@@ -893,27 +893,27 @@
 		{
 			target_read_u32(target, FLASH_FMC, &flash_fmc);
 		} while (flash_fmc & FMC_WRITE);
-		
+
 		buffer += 4;
 		address += 4;
 		words_remaining--;
 	}
-	
+
 	if (bytes_remaining)
 	{
 		u8 last_word[4] = {0xff, 0xff, 0xff, 0xff};
 		int i = 0;
-				
+
 		while(bytes_remaining > 0)
 		{
-			last_word[i++] = *(buffer + bytes_written); 
+			last_word[i++] = *(buffer + bytes_written);
 			bytes_remaining--;
 			bytes_written++;
 		}
-		
+
 		if (!(address & 0xff))
 			LOG_DEBUG("0x%x", address);
-		
+
 		/* Program one word */
 		target_write_u32(target, FLASH_FMA, address);
 		target_write_buffer(target, FLASH_FMD, 4, last_word);
@@ -925,7 +925,7 @@
 			target_read_u32(target, FLASH_FMC, &flash_fmc);
 		} while (flash_fmc & FMC_WRITE);
 	}
-	
+
 	/* Check access violations */
 	target_read_u32(target, FLASH_CRIS, &flash_cris);
 	if (flash_cris & (AMASK))
@@ -941,7 +941,7 @@
 	/* we can't probe on an stellaris
 	 * if this is an stellaris, it has the configured flash
 	 */
-	
+
 	if (bank->target->state != TARGET_HALTED)
 	{
 		LOG_ERROR("Target not halted");
@@ -965,35 +965,35 @@
 	target_t *target = NULL;
 	stellaris_flash_bank_t *stellaris_info = NULL;
 	u32 flash_fmc;
-	
+
 	stellaris_info = bank->driver_priv;
 	target = bank->target;
-	
+
 	if (target->state != TARGET_HALTED)
 	{
 		LOG_ERROR("Target not halted");
 		return ERROR_TARGET_NOT_HALTED;
 	}
-	
+
 	if (stellaris_info->did1 == 0)
 	{
 		stellaris_read_part_info(bank);
 	}
-	
+
 	if (stellaris_info->did1 == 0)
 	{
 		LOG_WARNING("Cannot identify target as Stellaris");
 		return ERROR_FLASH_OPERATION_FAILED;
 	}
-	
+
 	/* Configure the flash controller timing */
-	stellaris_read_clock_info(bank);	
+	stellaris_read_clock_info(bank);
 	stellaris_set_flash_mode(bank, 0);
 
 	/* Clear and disable flash programming interrupts */
 	target_write_u32(target, FLASH_CIM, 0);
 	target_write_u32(target, FLASH_MISC, PMISC|AMISC);
-	
+
 	target_write_u32(target, FLASH_FMA, 0);
 	target_write_u32(target, FLASH_FMC, FMC_WRKEY | FMC_MERASE);
 	/* Wait until erase complete */
@@ -1002,7 +1002,7 @@
 		target_read_u32(target, FLASH_FMC, &flash_fmc);
 	}
 	while (flash_fmc & FMC_MERASE);
-	
+
 	/* if device has > 128k, then second erase cycle is needed
 	 * this is only valid for older devices, but will not hurt */
 	if (stellaris_info->num_pages * stellaris_info->pagesize > 0x20000)
@@ -1016,7 +1016,7 @@
 		}
 		while (flash_fmc & FMC_MERASE);
 	}
-	
+
 	return ERROR_OK;
 }
 
@@ -1024,20 +1024,20 @@
 {
 	flash_bank_t *bank;
 	int i;
-	
+
 	if (argc < 1)
 	{
 		command_print(cmd_ctx, "stellaris mass_erase <bank>");
-		return ERROR_OK;	
+		return ERROR_OK;
 	}
-	
+
 	bank = get_flash_bank_by_num(strtoul(args[0], NULL, 0));
 	if (!bank)
 	{
 		command_print(cmd_ctx, "flash bank '#%s' is out of bounds", args[0]);
 		return ERROR_OK;
 	}
-	
+
 	if (stellaris_mass_erase(bank) == ERROR_OK)
 	{
 		/* set all sectors as erased */
@@ -1045,13 +1045,13 @@
 		{
 			bank->sectors[i].is_erased = 1;
 		}
-		
+
 		command_print(cmd_ctx, "stellaris mass erase complete");
 	}
 	else
 	{
 		command_print(cmd_ctx, "stellaris mass erase failed");
 	}
-	
+
 	return ERROR_OK;
 }

Modified: trunk/src/flash/stm32x.c
===================================================================
--- trunk/src/flash/stm32x.c	2009-05-31 12:38:28 UTC (rev 1971)
+++ trunk/src/flash/stm32x.c	2009-06-01 03:05:26 UTC (rev 1972)
@@ -65,7 +65,7 @@
 static int stm32x_register_commands(struct command_context_s *cmd_ctx)
 {
 	command_t *stm32x_cmd = register_command(cmd_ctx, NULL, "stm32x", NULL, COMMAND_ANY, "stm32x flash specific commands");
-	
+
 	register_command(cmd_ctx, stm32x_cmd, "lock", stm32x_handle_lock_command, COMMAND_EXEC,
 					 "lock device");
 	register_command(cmd_ctx, stm32x_cmd, "unlock", stm32x_handle_unlock_command, COMMAND_EXEC,
@@ -84,19 +84,19 @@
 static int stm32x_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank)
 {
 	stm32x_flash_bank_t *stm32x_info;
-	
+
 	if (argc < 6)
 	{
 		LOG_WARNING("incomplete flash_bank stm32x configuration");
 		return ERROR_FLASH_BANK_INVALID;
 	}
-	
+
 	stm32x_info = malloc(sizeof(stm32x_flash_bank_t));
 	bank->driver_priv = stm32x_info;
-	
+
 	stm32x_info->write_algorithm = NULL;
 	stm32x_info->probed = 0;
-	
+
 	return ERROR_OK;
 }
 
@@ -104,9 +104,9 @@
 {
 	target_t *target = bank->target;
 	u32 status;
-	
+
 	target_read_u32(target, STM32_FLASH_SR, &status);
-	
+
 	return status;
 }
 
@@ -114,7 +114,7 @@
 {
 	target_t *target = bank->target;
 	u32 status;
-	
+
 	/* wait for busy to clear */
 	while (((status = stm32x_get_flash_status(bank)) & FLASH_BSY) && (timeout-- > 0))
 	{
@@ -124,7 +124,7 @@
 	/* Clear but report errors */
 	if (status & (FLASH_WRPRTERR|FLASH_PGERR))
 	{
-		target_write_u32(target, STM32_FLASH_SR, FLASH_WRPRTERR|FLASH_PGERR);	
+		target_write_u32(target, STM32_FLASH_SR, FLASH_WRPRTERR|FLASH_PGERR);
 	}
 	return status;
 }
@@ -134,26 +134,26 @@
 	u32 optiondata;
 	stm32x_flash_bank_t *stm32x_info = NULL;
 	target_t *target = bank->target;
-	
+
 	stm32x_info = bank->driver_priv;
-	
+
 	/* read current option bytes */
 	target_read_u32(target, STM32_FLASH_OBR, &optiondata);
-	
+
 	stm32x_info->option_bytes.user_options = (u16)0xFFF8|((optiondata >> 2) & 0x07);
 	stm32x_info->option_bytes.RDP = (optiondata & (1 << OPT_READOUT)) ? 0xFFFF : 0x5AA5;
-	
+
 	if (optiondata & (1 << OPT_READOUT))
 		LOG_INFO("Device Security Bit Set");
-	
+
 	/* each bit refers to a 4bank protection */
 	target_read_u32(target, STM32_FLASH_WRPR, &optiondata);
-	
+
 	stm32x_info->option_bytes.protection[0] = (u16)optiondata;
 	stm32x_info->option_bytes.protection[1] = (u16)(optiondata >> 8);
 	stm32x_info->option_bytes.protection[2] = (u16)(optiondata >> 16);
 	stm32x_info->option_bytes.protection[3] = (u16)(optiondata >> 24);
-		
+
 	return ERROR_OK;
 }
 
@@ -162,35 +162,35 @@
 	stm32x_flash_bank_t *stm32x_info = NULL;
 	target_t *target = bank->target;
 	u32 status;
-	
+
 	stm32x_info = bank->driver_priv;
-	
+
 	/* read current options */
 	stm32x_read_options(bank);
-	
+
 	/* unlock flash registers */
 	target_write_u32(target, STM32_FLASH_KEYR, KEY1);
 	target_write_u32(target, STM32_FLASH_KEYR, KEY2);
-	
+
 	/* unlock option flash registers */
 	target_write_u32(target, STM32_FLASH_OPTKEYR, KEY1);
 	target_write_u32(target, STM32_FLASH_OPTKEYR, KEY2);
-	
+
 	/* erase option bytes */
 	target_write_u32(target, STM32_FLASH_CR, FLASH_OPTER|FLASH_OPTWRE);
 	target_write_u32(target, STM32_FLASH_CR, FLASH_OPTER|FLASH_STRT|FLASH_OPTWRE);
-	
+
 	status = stm32x_wait_status_busy(bank, 10);
-	
+
 	if( status & FLASH_WRPRTERR )
 		return ERROR_FLASH_OPERATION_FAILED;
 	if( status & FLASH_PGERR )
 		return ERROR_FLASH_OPERATION_FAILED;
-	
+
 	/* clear readout protection and complementary option bytes
 	 * this will also force a device unlock if set */
 	stm32x_info->option_bytes.RDP = 0x5AA5;
-	
+
 	return ERROR_OK;
 }
 
@@ -199,82 +199,82 @@
 	stm32x_flash_bank_t *stm32x_info = NULL;
 	target_t *target = bank->target;
 	u32 status;
-	
+
 	stm32x_info = bank->driver_priv;
-	
+
 	/* unlock flash registers */
 	target_write_u32(target, STM32_FLASH_KEYR, KEY1);
 	target_write_u32(target, STM32_FLASH_KEYR, KEY2);
-	
+
 	/* unlock option flash registers */
 	target_write_u32(target, STM32_FLASH_OPTKEYR, KEY1);
 	target_write_u32(target, STM32_FLASH_OPTKEYR, KEY2);
-	
+
 	/* program option bytes */
 	target_write_u32(target, STM32_FLASH_CR, FLASH_OPTPG|FLASH_OPTWRE);
-		
+
 	/* write user option byte */
 	target_write_u16(target, STM32_OB_USER, stm32x_info->option_bytes.user_options);
-	
+
 	status = stm32x_wait_status_busy(bank, 10);
-	
+
 	if( status & FLASH_WRPRTERR )
 		return ERROR_FLASH_OPERATION_FAILED;
 	if( status & FLASH_PGERR )
 		return ERROR_FLASH_OPERATION_FAILED;
-	
+
 	/* write protection byte 1 */
 	target_write_u16(target, STM32_OB_WRP0, stm32x_info->option_bytes.protection[0]);
-	
+
 	status = stm32x_wait_status_busy(bank, 10);
-	
+
 	if( status & FLASH_WRPRTERR )
 		return ERROR_FLASH_OPERATION_FAILED;
 	if( status & FLASH_PGERR )
 		return ERROR_FLASH_OPERATION_FAILED;
-	
+
 	/* write protection byte 2 */
 	target_write_u16(target, STM32_OB_WRP1, stm32x_info->option_bytes.protection[1]);
-	
+
 	status = stm32x_wait_status_busy(bank, 10);
-	
+
 	if( status & FLASH_WRPRTERR )
 		return ERROR_FLASH_OPERATION_FAILED;
 	if( status & FLASH_PGERR )
 		return ERROR_FLASH_OPERATION_FAILED;
-	
+
 	/* write protection byte 3 */
 	target_write_u16(target, STM32_OB_WRP2, stm32x_info->option_bytes.protection[2]);
-	
+
 	status = stm32x_wait_status_busy(bank, 10);
-	
+
 	if( status & FLASH_WRPRTERR )
 		return ERROR_FLASH_OPERATION_FAILED;
 	if( status & FLASH_PGERR )
 		return ERROR_FLASH_OPERATION_FAILED;
-	
+
 	/* write protection byte 4 */
 	target_write_u16(target, STM32_OB_WRP3, stm32x_info->option_bytes.protection[3]);
-	
+
 	status = stm32x_wait_status_busy(bank, 10);
-	
+
 	if( status & FLASH_WRPRTERR )
 		return ERROR_FLASH_OPERATION_FAILED;
 	if( status & FLASH_PGERR )
 		return ERROR_FLASH_OPERATION_FAILED;
-	
+
 	/* write readout protection bit */
 	target_write_u16(target, STM32_OB_RDP, stm32x_info->option_bytes.RDP);
-	
+
 	status = stm32x_wait_status_busy(bank, 10);
-	
+
 	if( status & FLASH_WRPRTERR )
 		return ERROR_FLASH_OPERATION_FAILED;
 	if( status & FLASH_PGERR )
 		return ERROR_FLASH_OPERATION_FAILED;
-	
+
 	target_write_u32(target, STM32_FLASH_CR, FLASH_LOCK);
-	
+
 	return ERROR_OK;
 }
 
@@ -282,70 +282,70 @@
 {
 	target_t *target = bank->target;
 	stm32x_flash_bank_t *stm32x_info = bank->driver_priv;
-	
+
 	u32 protection;
 	int i, s;
 	int num_bits;
 	int set;
-	
+
 	if (target->state != TARGET_HALTED)
 	{
 		LOG_ERROR("Target not halted");
 		return ERROR_TARGET_NOT_HALTED;
 	}
-	
-	/* medium density - each bit refers to a 4bank protection 
+
+	/* medium density - each bit refers to a 4bank protection
 	 * high density - each bit refers to a 2bank protection */
 	target_read_u32(target, STM32_FLASH_WRPR, &protection);
-	
+
 	/* medium density - each protection bit is for 4 * 1K pages
 	 * high density - each protection bit is for 2 * 2K pages */
 	num_bits = (bank->num_sectors / stm32x_info->ppage_size);
-	
+
 	if (stm32x_info->ppage_size == 2)
 	{
 		/* high density flash */
-		
+
 		set = 1;
-		
+
 		if (protection & (1 << 31))
 			set = 0;
-		
-		/* bit 31 controls sector 62 - 255 protection */	
+
+		/* bit 31 controls sector 62 - 255 protection */
 		for (s = 62; s < bank->num_sectors; s++)
 		{
 			bank->sectors[s].is_protected = set;
 		}
-		
+
 		if (bank->num_sectors > 61)
 			num_bits = 31;
-		
+
 		for (i = 0; i < num_bits; i++)
 		{
 			set = 1;
-			
+
 			if (protection & (1 << i))
 				set = 0;
-			
+
 			for (s = 0; s < stm32x_info->ppage_size; s++)
 				bank->sectors[(i * stm32x_info->ppage_size) + s].is_protected = set;
 		}
 	}
 	else
-	{		
+	{
 		/* medium density flash */
 		for (i = 0; i < num_bits; i++)
 		{
 			set = 1;
-			
+
 			if( protection & (1 << i))
 				set = 0;
-			
+
 			for (s = 0; s < stm32x_info->ppage_size; s++)
 				bank->sectors[(i * stm32x_info->ppage_size) + s].is_protected = set;
 		}
 	}
-	
+
 	return ERROR_OK;
 }
 
@@ -354,30 +354,30 @@
 	target_t *target = bank->target;
 	int i;
 	u32 status;
-	
+
 	if (bank->target->state != TARGET_HALTED)
 	{
 		LOG_ERROR("Target not halted");
 		return ERROR_TARGET_NOT_HALTED;
 	}
-	
+
 	if ((first == 0) && (last == (bank->num_sectors - 1)))
 	{
 		return stm32x_mass_erase(bank);
 	}
-	
+
 	/* unlock flash registers */
 	target_write_u32(target, STM32_FLASH_KEYR, KEY1);
 	target_write_u32(target, STM32_FLASH_KEYR, KEY2);
-	
+
 	for (i = first; i <= last; i++)
-	{	
+	{
 		target_write_u32(target, STM32_FLASH_CR, FLASH_PER);
 		target_write_u32(target, STM32_FLASH_AR, bank->base + bank->sectors[i].offset);
 		target_write_u32(target, STM32_FLASH_CR, FLASH_PER|FLASH_STRT);
-		
+
 		status = stm32x_wait_status_busy(bank, 10);
-		
+
 		if( status & FLASH_WRPRTERR )
 			return ERROR_FLASH_OPERATION_FAILED;
 		if( status & FLASH_PGERR )
@@ -386,7 +386,7 @@
 	}
 
 	target_write_u32(target, STM32_FLASH_CR, FLASH_LOCK);
-	
+
 	return ERROR_OK;
 }
 
@@ -398,34 +398,34 @@
 	int i, reg, bit;
 	int status;
 	u32 protection;
-	
+
 	stm32x_info = bank->driver_priv;
-	
+
 	if (target->state != TARGET_HALTED)
 	{
 		LOG_ERROR("Target not halted");
 		return ERROR_TARGET_NOT_HALTED;
 	}
-	
+
 	if ((first && (first % stm32x_info->ppage_size)) || ((last + 1) && (last + 1) % stm32x_info->ppage_size))
 	{
 		LOG_WARNING("sector start/end incorrect - stm32 has %dK sector protection", stm32x_info->ppage_size);
 		return ERROR_FLASH_SECTOR_INVALID;
 	}
-	
-	/* medium density - each bit refers to a 4bank protection 
+
+	/* medium density - each bit refers to a 4bank protection
 	 * high density - each bit refers to a 2bank protection */
 	target_read_u32(target, STM32_FLASH_WRPR, &protection);
-	
+
 	prot_reg[0] = (u16)protection;
 	prot_reg[1] = (u16)(protection >> 8);
 	prot_reg[2] = (u16)(protection >> 16);
 	prot_reg[3] = (u16)(protection >> 24);
-	
+
 	if (stm32x_info->ppage_size == 2)
 	{
 		/* high density flash */
-		
+
 		/* bit 7 controls sector 62 - 255 protection */
 		if (last > 61)
 		{
@@ -434,17 +434,17 @@
 			else
 				prot_reg[3] |= (1 << 7);
 		}
-		
+
 		if (first > 61)
 			first = 62;
 		if (last > 61)
 			last = 61;
-		
+
 		for (i = first; i <= last; i++)
 		{
 			reg = (i / stm32x_info->ppage_size) / 8;
 			bit = (i / stm32x_info->ppage_size) - (reg * 8);
-			
+
 			if( set )
 				prot_reg[reg] &= ~(1 << bit);
 			else
@@ -458,22 +458,22 @@
 		{
 			reg = (i / stm32x_info->ppage_size) / 8;
 			bit = (i / stm32x_info->ppage_size) - (reg * 8);
-			
+
 			if( set )
 				prot_reg[reg] &= ~(1 << bit);
 			else
 				prot_reg[reg] |= (1 << bit);
 		}
 	}
-	
+
 	if ((status = stm32x_erase_options(bank)) != ERROR_OK)
 		return status;
-	
+
 	stm32x_info->option_bytes.protection[0] = prot_reg[0];
 	stm32x_info->option_bytes.protection[1] = prot_reg[1];
 	stm32x_info->option_bytes.protection[2] = prot_reg[2];
 	stm32x_info->option_bytes.protection[3] = prot_reg[3];
-	
+
 	return stm32x_write_options(bank);
 }
 
@@ -487,7 +487,7 @@
 	reg_param_t reg_params[4];
 	armv7m_algorithm_t armv7m_info;
 	int retval = ERROR_OK;
-	
+
 	u8 stm32x_flash_write_code[] = {
 									/* write: */
 		0xDF, 0xF8, 0x24, 0x40,		/* ldr	r4, STM32_FLASH_CR */
@@ -509,14 +509,14 @@
 		0x10, 0x20, 0x02, 0x40,		/* STM32_FLASH_CR:	.word 0x40022010 */
 		0x0C, 0x20, 0x02, 0x40		/* STM32_FLASH_SR:	.word 0x4002200C */
 	};
-	
+
 	/* flash write code */
 	if (target_alloc_working_area(target, sizeof(stm32x_flash_write_code), &stm32x_info->write_algorithm) != ERROR_OK)
 	{
 		LOG_WARNING("no working area available, can't do block memory writes");
 		return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
 	};
-	
+
 	if ((retval=target_write_buffer(target, stm32x_info->write_algorithm->address, sizeof(stm32x_flash_write_code), stm32x_flash_write_code))!=ERROR_OK)
 		return retval;
 
@@ -529,31 +529,31 @@
 			/* if we already allocated the writing code, but failed to get a buffer, free the algorithm */
 			if (stm32x_info->write_algorithm)
 				target_free_working_area(target, stm32x_info->write_algorithm);
-			
+
 			LOG_WARNING("no large enough working area available, can't do block memory writes");
 			return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
 		}
 	};
-	
+
 	armv7m_info.common_magic = ARMV7M_COMMON_MAGIC;
 	armv7m_info.core_mode = ARMV7M_MODE_ANY;
-	
+
 	init_reg_param(&reg_params[0], "r0", 32, PARAM_OUT);
 	init_reg_param(&reg_params[1], "r1", 32, PARAM_OUT);
 	init_reg_param(&reg_params[2], "r2", 32, PARAM_OUT);
 	init_reg_param(&reg_params[3], "r3", 32, PARAM_IN);
-	
+
 	while (count > 0)
 	{
 		u32 thisrun_count = (count > (buffer_size / 2)) ? (buffer_size / 2) : count;
-		
+
 		if ((retval = target_write_buffer(target, source->address, thisrun_count * 2, buffer))!=ERROR_OK)
 			break;
-		
+
 		buf_set_u32(reg_params[0].value, 0, 32, source->address);
 		buf_set_u32(reg_params[1].value, 0, 32, address);
 		buf_set_u32(reg_params[2].value, 0, 32, thisrun_count);
-		
+
 		if ((retval = target_run_algorithm(target, 0, NULL, 4, reg_params, stm32x_info->write_algorithm->address, \
 				stm32x_info->write_algorithm->address + (sizeof(stm32x_flash_write_code) - 10), 10000, &armv7m_info)) != ERROR_OK)
 		{
@@ -561,38 +561,38 @@
 			retval = ERROR_FLASH_OPERATION_FAILED;
 			break;
 		}
-		
+
 		if (buf_get_u32(reg_params[3].value, 0, 32) & FLASH_PGERR)
 		{
 			LOG_ERROR("flash memory not erased before writing");
 			/* Clear but report errors */
-			target_write_u32(target, STM32_FLASH_SR, FLASH_PGERR);	
+			target_write_u32(target, STM32_FLASH_SR, FLASH_PGERR);
 			retval = ERROR_FLASH_OPERATION_FAILED;
 			break;
 		}
-		
+
 		if (buf_get_u32(reg_params[3].value, 0, 32) & FLASH_WRPRTERR)
 		{
 			LOG_ERROR("flash memory write protected");
 			/* Clear but report errors */
-			target_write_u32(target, STM32_FLASH_SR, FLASH_WRPRTERR);	
+			target_write_u32(target, STM32_FLASH_SR, FLASH_WRPRTERR);
 			retval = ERROR_FLASH_OPERATION_FAILED;
 			break;
 		}
-		
+
 		buffer += thisrun_count * 2;
 		address += thisrun_count * 2;
 		count -= thisrun_count;
 	}
-	
+
 	target_free_working_area(target, source);
 	target_free_working_area(target, stm32x_info->write_algorithm);
-	
+
 	destroy_reg_param(&reg_params[0]);
 	destroy_reg_param(&reg_params[1]);
 	destroy_reg_param(&reg_params[2]);
 	destroy_reg_param(&reg_params[3]);
-	
+
 	return retval;
 }
 
@@ -605,7 +605,7 @@
 	u32 bytes_written = 0;
 	u8 status;
 	int retval;
-	
+
 	if (bank->target->state != TARGET_HALTED)
 	{
 		LOG_ERROR("Target not halted");
@@ -617,13 +617,13 @@
 		LOG_WARNING("offset 0x%x breaks required 2-byte alignment", offset);
 		return ERROR_FLASH_DST_BREAKS_ALIGNMENT;
 	}
-	
+
 	/* unlock flash registers */
 	target_write_u32(target, STM32_FLASH_KEYR, KEY1);
 	target_write_u32(target, STM32_FLASH_KEYR, KEY2);
-	
+
 	/* multiple half words (2-byte) to be programmed? */
-	if (words_remaining > 0) 
+	if (words_remaining > 0)
 	{
 		/* try using a block write */
 		if ((retval = stm32x_write_block(bank, buffer, offset, words_remaining)) != ERROR_OK)
@@ -631,7 +631,7 @@
 			if (retval == ERROR_TARGET_RESOURCE_NOT_AVAILABLE)
 			{
 				/* if block write failed (no sufficient working area),
-				 * we use normal (slow) single dword accesses */ 
+				 * we use normal (slow) single dword accesses */
 				LOG_WARNING("couldn't use block writes, falling back to single memory accesses");
 			}
 			else if (retval == ERROR_FLASH_OPERATION_FAILED)
@@ -655,9 +655,9 @@
 
 		target_write_u32(target, STM32_FLASH_CR, FLASH_PG);
 		target_write_u16(target, address, value);
-		
+
 		status = stm32x_wait_status_busy(bank, 5);
-		
+
 		if( status & FLASH_WRPRTERR )
 		{
 			LOG_ERROR("flash memory not erased before writing");
@@ -673,7 +673,7 @@
 		words_remaining--;
 		address += 2;
 	}
-	
+
 	if (bytes_remaining)
 	{
 		u16 value = 0xffff;
@@ -681,9 +681,9 @@
 
 		target_write_u32(target, STM32_FLASH_CR, FLASH_PG);
 		target_write_u16(target, address, value);
-		
+
 		status = stm32x_wait_status_busy(bank, 5);
-		
+
 		if( status & FLASH_WRPRTERR )
 		{
 			LOG_ERROR("flash memory not erased before writing");
@@ -695,9 +695,9 @@
 			return ERROR_FLASH_OPERATION_FAILED;
 		}
 	}
-	
+
 	target_write_u32(target, STM32_FLASH_CR, FLASH_LOCK);
-	
+
 	return ERROR_OK;
 }
 
@@ -709,7 +709,7 @@
 	u16 num_pages;
 	u32 device_id;
 	int page_size;
-	
+
 	if (bank->target->state != TARGET_HALTED)
 	{
 		LOG_ERROR("Target not halted");
@@ -717,25 +717,25 @@
 	}
 
 	stm32x_info->probed = 0;
-	
+
 	/* read stm32 device id register */
 	target_read_u32(target, 0xE0042000, &device_id);
 	LOG_INFO( "device id = 0x%08x", device_id );
-	
+
 	/* get flash size from target */
 	if (target_read_u16(target, 0x1FFFF7E0, &num_pages) != ERROR_OK)
 	{
 		/* failed reading flash size, default to max target family */
 		num_pages = 0xffff;
 	}
-	
+
 	if ((device_id & 0x7ff) == 0x410)
 	{
 		/* medium density - we have 1k pages
 		 * 4 pages for a protection area */
 		page_size = 1024;
 		stm32x_info->ppage_size = 4;
-		
+
 		/* check for early silicon */
 		if (num_pages == 0xffff)
 		{
@@ -750,7 +750,7 @@
 		 * 4 pages for a protection area */
 		page_size = 1024;
 		stm32x_info->ppage_size = 4;
-		
+
 		/* check for early silicon */
 		if (num_pages == 0xffff)
 		{
@@ -765,7 +765,7 @@
 		 * 2 pages for a protection area */
 		page_size = 2048;
 		stm32x_info->ppage_size = 2;
-		
+
 		/* check for early silicon */
 		if (num_pages == 0xffff)
 		{
@@ -780,7 +780,7 @@
 		 * 4 pages for a protection area */
 		page_size = 1024;
 		stm32x_info->ppage_size = 4;
-		
+
 		/* check for early silicon */
 		if (num_pages == 0xffff)
 		{
@@ -794,17 +794,17 @@
 		LOG_WARNING( "Cannot identify target as a STM32 family." );
 		return ERROR_FLASH_OPERATION_FAILED;
 	}
-	
+
 	LOG_INFO( "flash size = %dkbytes", num_pages );
-	
+
 	/* calculate numbers of pages */
 	num_pages /= (page_size / 1024);
-	
+
 	bank->base = 0x08000000;
 	bank->size = (num_pages * page_size);
 	bank->num_sectors = num_pages;
 	bank->sectors = malloc(sizeof(flash_sector_t) * num_pages);
-	
+
 	for (i = 0; i < num_pages; i++)
 	{
 		bank->sectors[i].offset = i * page_size;
@@ -812,9 +812,9 @@
 		bank->sectors[i].is_erased = -1;
 		bank->sectors[i].is_protected = 1;
 	}
-	
+
 	stm32x_info->probed = 1;
-	
+
 	return ERROR_OK;
 }
 
@@ -838,34 +838,34 @@
 	target_t *target = bank->target;
 	u32 device_id;
 	int printed;
-	
+
 	/* read stm32 device id register */
 	target_read_u32(target, 0xE0042000, &device_id);
-	
+
 	if ((device_id & 0x7ff) == 0x410)
 	{
 		printed = snprintf(buf, buf_size, "stm32x (Medium Density) - Rev: ");
 		buf += printed;
 		buf_size -= printed;
-		
+
 		switch(device_id >> 16)
 		{
 			case 0x0000:
 				snprintf(buf, buf_size, "A");
 				break;
-			
+
 			case 0x2000:
 				snprintf(buf, buf_size, "B");
 				break;
-			
+
 			case 0x2001:
 				snprintf(buf, buf_size, "Z");
 				break;
-			
+
 			case 0x2003:
 				snprintf(buf, buf_size, "Y");
 				break;
-			
+
 			default:
 				snprintf(buf, buf_size, "unknown");
 				break;
@@ -876,13 +876,13 @@
 		printed = snprintf(buf, buf_size, "stm32x (Low Density) - Rev: ");
 		buf += printed;
 		buf_size -= printed;
-		
+
 		switch(device_id >> 16)
 		{
 			case 0x1000:
 				snprintf(buf, buf_size, "A");
 				break;
-			
+
 			default:
 				snprintf(buf, buf_size, "unknown");
 				break;
@@ -893,17 +893,17 @@
 		printed = snprintf(buf, buf_size, "stm32x (High Density) - Rev: ");
 		buf += printed;
 		buf_size -= printed;
-		
+
 		switch(device_id >> 16)
 		{
 			case 0x1000:
 				snprintf(buf, buf_size, "A");
 				break;
-			
+
 			case 0x1001:
 				snprintf(buf, buf_size, "Z");
 				break;
-			
+
 			default:
 				snprintf(buf, buf_size, "unknown");
 				break;
@@ -914,7 +914,7 @@
 		printed = snprintf(buf, buf_size, "stm32x (Connectivity) - Rev: ");
 		buf += printed;
 		buf_size -= printed;
-		
+
 		switch(device_id >> 16)
 		{
 			case 0x1000:
@@ -931,7 +931,7 @@
 		snprintf(buf, buf_size, "Cannot identify target as a stm32x\n");
 		return ERROR_FLASH_OPERATION_FAILED;
 	}
-	
+
 	return ERROR_OK;
 }
 
@@ -940,47 +940,47 @@
 	flash_bank_t *bank;
 	target_t *target = NULL;
 	stm32x_flash_bank_t *stm32x_info = NULL;
-	
+
 	if (argc < 1)
 	{
 		command_print(cmd_ctx, "stm32x lock <bank>");
-		return ERROR_OK;	
+		return ERROR_OK;
 	}
-	
+
 	bank = get_flash_bank_by_num(strtoul(args[0], NULL, 0));
 	if (!bank)
 	{
 		command_print(cmd_ctx, "flash bank '#%s' is out of bounds", args[0]);
 		return ERROR_OK;
 	}
-	
+
 	stm32x_info = bank->driver_priv;
-	
+
 	target = bank->target;
-	
+
 	if (target->state != TARGET_HALTED)
 	{
 		LOG_ERROR("Target not halted");
 		return ERROR_TARGET_NOT_HALTED;
 	}
-	
+
 	if (stm32x_erase_options(bank) != ERROR_OK)
 	{
 		command_print(cmd_ctx, "stm32x failed to erase options");
 		return ERROR_OK;
 	}
-		
-	/* set readout protection */	
+
+	/* set readout protection */
 	stm32x_info->option_bytes.RDP = 0;
-	
+
 	if (stm32x_write_options(bank) != ERROR_OK)
 	{
 		command_print(cmd_ctx, "stm32x failed to lock device");
 		return ERROR_OK;
 	}
-	
+
 	command_print(cmd_ctx, "stm32x locked");
-	
+
 	return ERROR_OK;
 }
 
@@ -989,44 +989,44 @@
 	flash_bank_t *bank;
 	target_t *target = NULL;
 	stm32x_flash_bank_t *stm32x_info = NULL;
-	
+
 	if (argc < 1)
 	{
 		command_print(cmd_ctx, "stm32x unlock <bank>");
-		return ERROR_OK;	
+		return ERROR_OK;
 	}
-	
+
 	bank = get_flash_bank_by_num(strtoul(args[0], NULL, 0));
 	if (!bank)
 	{
 		command_print(cmd_ctx, "flash bank '#%s' is out of bounds", args[0]);
 		return ERROR_OK;
 	}
-	
+
 	stm32x_info = bank->driver_priv;
-	
+
 	target = bank->target;
-	
+
 	if (target->state != TARGET_HALTED)
 	{
 		LOG_ERROR("Target not halted");
 		return ERROR_TARGET_NOT_HALTED;
 	}
-		
+
 	if (stm32x_erase_options(bank) != ERROR_OK)
 	{
 		command_print(cmd_ctx, "stm32x failed to unlock device");
 		return ERROR_OK;
 	}
-	
+
 	if (stm32x_write_options(bank) != ERROR_OK)
 	{
 		command_print(cmd_ctx, "stm32x failed to lock device");
 		return ERROR_OK;
 	}
-	
+
 	command_print(cmd_ctx, "stm32x unlocked");
-	
+
 	return ERROR_OK;
 }
 
@@ -1036,56 +1036,56 @@
 	u32 optionbyte;
 	target_t *target = NULL;
 	stm32x_flash_bank_t *stm32x_info = NULL;
-	
+
 	if (argc < 1)
 	{
 		command_print(cmd_ctx, "stm32x options_read <bank>");
-		return ERROR_OK;	
+		return ERROR_OK;
 	}
-	
+
 	bank = get_flash_bank_by_num(strtoul(args[0], NULL, 0));
 	if (!bank)
 	{
 		command_print(cmd_ctx, "flash bank '#%s' is out of bounds", args[0]);
 		return ERROR_OK;
 	}
-	
+
 	stm32x_info = bank->driver_priv;
-	
+
 	target = bank->target;
-	
+
 	if (target->state != TARGET_HALTED)
 	{
 		LOG_ERROR("Target not halted");
 		return ERROR_TARGET_NOT_HALTED;
 	}
-	
+
 	target_read_u32(target, STM32_FLASH_OBR, &optionbyte);
 	command_print(cmd_ctx, "Option Byte: 0x%x", optionbyte);
-	
+
 	if (buf_get_u32((u8*)&optionbyte, OPT_ERROR, 1))
 		command_print(cmd_ctx, "Option Byte Complement Error");
-	
+
 	if (buf_get_u32((u8*)&optionbyte, OPT_READOUT, 1))
 		command_print(cmd_ctx, "Readout Protection On");
 	else
 		command_print(cmd_ctx, "Readout Protection Off");
-	
+
 	if (buf_get_u32((u8*)&optionbyte, OPT_RDWDGSW, 1))
 		command_print(cmd_ctx, "Software Watchdog");
 	else
 		command_print(cmd_ctx, "Hardware Watchdog");
-	
+
 	if (buf_get_u32((u8*)&optionbyte, OPT_RDRSTSTOP, 1))
 		command_print(cmd_ctx, "Stop: No reset generated");
 	else
 		command_print(cmd_ctx, "Stop: Reset generated");
-	
+
 	if (buf_get_u32((u8*)&optionbyte, OPT_RDRSTSTDBY, 1))
 		command_print(cmd_ctx, "Standby: No reset generated");
 	else
 		command_print(cmd_ctx, "Standby: Reset generated");
-	
+
 	return ERROR_OK;
 }
 
@@ -1095,30 +1095,30 @@
 	target_t *target = NULL;
 	stm32x_flash_bank_t *stm32x_info = NULL;
 	u16 optionbyte = 0xF8;
-	
+
 	if (argc < 4)
 	{
 		command_print(cmd_ctx, "stm32x options_write <bank> <SWWDG|HWWDG> <RSTSTNDBY|NORSTSTNDBY> <RSTSTOP|NORSTSTOP>");
 		return ERROR_OK;
 	}
-	
+
 	bank = get_flash_bank_by_num(strtoul(args[0], NULL, 0));
 	if (!bank)
 	{
 		command_print(cmd_ctx, "flash bank '#%s' is out of bounds", args[0]);
 		return ERROR_OK;
 	}
-	
+
 	stm32x_info = bank->driver_priv;
-	
+
 	target = bank->target;
-	
+
 	if (target->state != TARGET_HALTED)
 	{
 		LOG_ERROR("Target not halted");
 		return ERROR_TARGET_NOT_HALTED;
 	}
-	
+
 	if (strcmp(args[1], "SWWDG") == 0)
 	{
 		optionbyte |= (1<<0);
@@ -1127,7 +1127,7 @@
 	{
 		optionbyte &= ~(1<<0);
 	}
-	
+
 	if (strcmp(args[2], "NORSTSTNDBY") == 0)
 	{
 		optionbyte |= (1<<1);
@@ -1136,7 +1136,7 @@
 	{
 		optionbyte &= ~(1<<1);
 	}
-	
+
 	if (strcmp(args[3], "NORSTSTOP") == 0)
 	{
 		optionbyte |= (1<<2);
@@ -1145,23 +1145,23 @@
 	{
 		optionbyte &= ~(1<<2);
 	}
-	
+
 	if (stm32x_erase_options(bank) != ERROR_OK)
 	{
 		command_print(cmd_ctx, "stm32x failed to erase options");
 		return ERROR_OK;
 	}
-	
+
 	stm32x_info->option_bytes.user_options = optionbyte;
-	
+
 	if (stm32x_write_options(bank) != ERROR_OK)
 	{
 		command_print(cmd_ctx, "stm32x failed to write options");
 		return ERROR_OK;
 	}
-	
+
 	command_print(cmd_ctx, "stm32x write options complete");
-	
+
 	return ERROR_OK;
 }
 
@@ -1169,37 +1169,37 @@
 {
 	target_t *target = bank->target;
 	u32 status;
-	
+
 	if (target->state != TARGET_HALTED)
 	{
 		LOG_ERROR("Target not halted");
 		return ERROR_TARGET_NOT_HALTED;
 	}
-	
+
 	/* unlock option flash registers */
 	target_write_u32(target, STM32_FLASH_KEYR, KEY1);
 	target_write_u32(target, STM32_FLASH_KEYR, KEY2);
-	
+
 	/* mass erase flash memory */
 	target_write_u32(target, STM32_FLASH_CR, FLASH_MER);
 	target_write_u32(target, STM32_FLASH_CR, FLASH_MER|FLASH_STRT);
-	
+
 	status = stm32x_wait_status_busy(bank, 10);
-	
+
 	target_write_u32(target, STM32_FLASH_CR, FLASH_LOCK);
-	
+
 	if( status & FLASH_WRPRTERR )
 	{
 		LOG_ERROR("stm32x device protected");
 		return ERROR_OK;
 	}
-	
+
 	if( status & FLASH_PGERR )
 	{
 		LOG_ERROR("stm32x device programming failed");
 		return ERROR_OK;
 	}
-	
+
 	return ERROR_OK;
 }
 
@@ -1207,20 +1207,20 @@
 {
 	flash_bank_t *bank;
 	int i;
-	
+
 	if (argc < 1)
 	{
 		command_print(cmd_ctx, "stm32x mass_erase <bank>");
-		return ERROR_OK;	
+		return ERROR_OK;
 	}
-	
+
 	bank = get_flash_bank_by_num(strtoul(args[0], NULL, 0));
 	if (!bank)
 	{
 		command_print(cmd_ctx, "flash bank '#%s' is out of bounds", args[0]);
 		return ERROR_OK;
 	}
-	
+
 	if (stm32x_mass_erase(bank) == ERROR_OK)
 	{
 		/* set all sectors as erased */
@@ -1228,13 +1228,13 @@
 		{
 			bank->sectors[i].is_erased = 1;
 		}
-		
+
 		command_print(cmd_ctx, "stm32x mass erase complete");
 	}
 	else
 	{
 		command_print(cmd_ctx, "stm32x mass erase failed");
 	}
-	
+
 	return ERROR_OK;
 }

Modified: trunk/src/flash/str9x.c
===================================================================
--- trunk/src/flash/str9x.c	2009-05-31 12:38:28 UTC (rev 1971)
+++ trunk/src/flash/str9x.c	2009-06-01 03:05:26 UTC (rev 1972)
@@ -63,26 +63,26 @@
 static int str9x_register_commands(struct command_context_s *cmd_ctx)
 {
 	command_t *str9x_cmd = register_command(cmd_ctx, NULL, "str9x", NULL, COMMAND_ANY, NULL);
-	
+
 	register_command(cmd_ctx, str9x_cmd, "flash_config", str9x_handle_flash_config_command, COMMAND_EXEC,
 					 "configure str9 flash controller");
-					 
+
 	return ERROR_OK;
 }
 
 static int str9x_build_block_list(struct flash_bank_s *bank)
 {
 	str9x_flash_bank_t *str9x_info = bank->driver_priv;
...
 
[truncated message content]

[Openocd-svn] r1971 - trunk/src/target

[<zw...@ma...>]

Author: zwelch
Date: 2009-05-31 14:38:28 +0200 (Sun, 31 May 2009)
New Revision: 1971

Added:
   trunk/src/target/target_type.h
Modified:
   trunk/src/target/Makefile.am
   trunk/src/target/arm11.c
   trunk/src/target/arm720t.c
   trunk/src/target/arm7tdmi.c
   trunk/src/target/arm920t.c
   trunk/src/target/arm926ejs.c
   trunk/src/target/arm966e.c
   trunk/src/target/arm9tdmi.c
   trunk/src/target/avrt.c
   trunk/src/target/cortex_a8.c
   trunk/src/target/cortex_m3.c
   trunk/src/target/feroceon.c
   trunk/src/target/mips_m4k.c
   trunk/src/target/target.c
   trunk/src/target/target.h
   trunk/src/target/target_request.c
   trunk/src/target/xscale.c
Log:
Final step in isolating target_type_s structure:
- Move definition of 'struct target_type_s' into new 'target_type.h' file.
- Forward delclaration remains in target.h, with comment pointing to new file.
- Replaces #define with #include in source files.


Modified: trunk/src/target/Makefile.am
===================================================================
--- trunk/src/target/Makefile.am	2009-05-31 12:10:57 UTC (rev 1970)
+++ trunk/src/target/Makefile.am	2009-05-31 12:38:28 UTC (rev 1971)
@@ -55,6 +55,7 @@
 
 noinst_HEADERS = \
 	target.h \
+	target_type.h \
 	trace.h \
 	register.h \
 	armv4_5.h \

Modified: trunk/src/target/arm11.c
===================================================================
--- trunk/src/target/arm11.c	2009-05-31 12:10:57 UTC (rev 1970)
+++ trunk/src/target/arm11.c	2009-05-31 12:38:28 UTC (rev 1971)
@@ -26,8 +26,8 @@
 #include "config.h"
 #endif
 
-#define DEFINE_TARGET_TYPE_S
 #include "arm11.h"
+#include "target_type.h"
 
 
 #if 0

Modified: trunk/src/target/arm720t.c
===================================================================
--- trunk/src/target/arm720t.c	2009-05-31 12:10:57 UTC (rev 1970)
+++ trunk/src/target/arm720t.c	2009-05-31 12:38:28 UTC (rev 1971)
@@ -21,9 +21,9 @@
 #include "config.h"
 #endif
 
-#define DEFINE_TARGET_TYPE_S
 #include "arm720t.h"
 #include "time_support.h"
+#include "target_type.h"
 
 
 #if 0

Modified: trunk/src/target/arm7tdmi.c
===================================================================
--- trunk/src/target/arm7tdmi.c	2009-05-31 12:10:57 UTC (rev 1970)
+++ trunk/src/target/arm7tdmi.c	2009-05-31 12:38:28 UTC (rev 1971)
@@ -27,8 +27,8 @@
 #include "config.h"
 #endif
 
-#define DEFINE_TARGET_TYPE_S
 #include "arm7tdmi.h"
+#include "target_type.h"
 
 
 #if 0

Modified: trunk/src/target/arm920t.c
===================================================================
--- trunk/src/target/arm920t.c	2009-05-31 12:10:57 UTC (rev 1970)
+++ trunk/src/target/arm920t.c	2009-05-31 12:38:28 UTC (rev 1971)
@@ -21,9 +21,9 @@
 #include "config.h"
 #endif
 
-#define DEFINE_TARGET_TYPE_S
 #include "arm920t.h"
 #include "time_support.h"
+#include "target_type.h"
 
 
 #if 0

Modified: trunk/src/target/arm926ejs.c
===================================================================
--- trunk/src/target/arm926ejs.c	2009-05-31 12:10:57 UTC (rev 1970)
+++ trunk/src/target/arm926ejs.c	2009-05-31 12:38:28 UTC (rev 1971)
@@ -21,9 +21,9 @@
 #include "config.h"
 #endif
 
-#define DEFINE_TARGET_TYPE_S
 #include "arm926ejs.h"
 #include "time_support.h"
+#include "target_type.h"
 
 
 #if 0

Modified: trunk/src/target/arm966e.c
===================================================================
--- trunk/src/target/arm966e.c	2009-05-31 12:10:57 UTC (rev 1970)
+++ trunk/src/target/arm966e.c	2009-05-31 12:38:28 UTC (rev 1971)
@@ -24,8 +24,8 @@
 #include "config.h"
 #endif
 
-#define DEFINE_TARGET_TYPE_S
 #include "arm966e.h"
+#include "target_type.h"
 
 
 #if 0

Modified: trunk/src/target/arm9tdmi.c
===================================================================
--- trunk/src/target/arm9tdmi.c	2009-05-31 12:10:57 UTC (rev 1970)
+++ trunk/src/target/arm9tdmi.c	2009-05-31 12:38:28 UTC (rev 1971)
@@ -27,8 +27,8 @@
 #include "config.h"
 #endif
 
-#define DEFINE_TARGET_TYPE_S
 #include "arm9tdmi.h"
+#include "target_type.h"
 
 
 #if 0

Modified: trunk/src/target/avrt.c
===================================================================
--- trunk/src/target/avrt.c	2009-05-31 12:10:57 UTC (rev 1970)
+++ trunk/src/target/avrt.c	2009-05-31 12:38:28 UTC (rev 1971)
@@ -21,9 +21,9 @@
 #include "config.h"
 #endif
 
-#define DEFINE_TARGET_TYPE_S
 #include "avrt.h"
 #include "target.h"
+#include "target_type.h"
 
 
 #define AVR_JTAG_INS_LEN	4

Modified: trunk/src/target/cortex_a8.c
===================================================================
--- trunk/src/target/cortex_a8.c	2009-05-31 12:10:57 UTC (rev 1970)
+++ trunk/src/target/cortex_a8.c	2009-05-31 12:38:28 UTC (rev 1971)
@@ -33,9 +33,9 @@
 #include "config.h"
 #endif
 
-#define DEFINE_TARGET_TYPE_S
 #include "cortex_a8.h"
 #include "target_request.h"
+#include "target_type.h"
 
 
 /* cli handling */

Modified: trunk/src/target/cortex_m3.c
===================================================================
--- trunk/src/target/cortex_m3.c	2009-05-31 12:10:57 UTC (rev 1970)
+++ trunk/src/target/cortex_m3.c	2009-05-31 12:38:28 UTC (rev 1971)
@@ -31,9 +31,9 @@
 #include "config.h"
 #endif
 
-#define DEFINE_TARGET_TYPE_S
 #include "cortex_m3.h"
 #include "target_request.h"
+#include "target_type.h"
 
 
 /* cli handling */

Modified: trunk/src/target/feroceon.c
===================================================================
--- trunk/src/target/feroceon.c	2009-05-31 12:10:57 UTC (rev 1970)
+++ trunk/src/target/feroceon.c	2009-05-31 12:38:28 UTC (rev 1971)
@@ -49,8 +49,8 @@
 #include "config.h"
 #endif
 
-#define DEFINE_TARGET_TYPE_S
 #include "arm926ejs.h"
+#include "target_type.h"
 
 
 int feroceon_examine(struct target_s *target);

Modified: trunk/src/target/mips_m4k.c
===================================================================
--- trunk/src/target/mips_m4k.c	2009-05-31 12:10:57 UTC (rev 1970)
+++ trunk/src/target/mips_m4k.c	2009-05-31 12:38:28 UTC (rev 1971)
@@ -23,10 +23,10 @@
 #include "config.h"
 #endif
 
-#define DEFINE_TARGET_TYPE_S
 #include "mips32.h"
 #include "mips_m4k.h"
 #include "mips32_dmaacc.h"
+#include "target_type.h"
 
 
 /* cli handling */

Modified: trunk/src/target/target.c
===================================================================
--- trunk/src/target/target.c	2009-05-31 12:10:57 UTC (rev 1970)
+++ trunk/src/target/target.c	2009-05-31 12:38:28 UTC (rev 1971)
@@ -33,9 +33,8 @@
 #include "config.h"
 #endif
 
-#define DEFINE_TARGET_TYPE_S
-
 #include "target.h"
+#include "target_type.h"
 #include "target_request.h"
 #include "time_support.h"
 #include "register.h"

Modified: trunk/src/target/target.h
===================================================================
--- trunk/src/target/target.h	2009-05-31 12:10:57 UTC (rev 1970)
+++ trunk/src/target/target.h	2009-05-31 12:38:28 UTC (rev 1971)
@@ -105,164 +105,8 @@
 	struct working_area_s *next;
 } working_area_t;
 
-#ifdef DEFINE_TARGET_TYPE_S
-struct target_type_s
-{
-	/**
-	 * Name of the target.  Do @b not access this field directly, use
-	 * target_get_name() instead.
-	 */
-	char *name;
-
-	/**
-	 * Indicates whether this target has been examined.
-	 *
-	 * Do @b not access this field directly, use target_was_examined()
-	 * target_set_examined(), and target_reset_examined().
-	 */
-	int examined;
-
-	/* poll current target status */
-	int (*poll)(struct target_s *target);
-	/* Invoked only from target_arch_state().
-	 * Issue USER() w/architecture specific status.  */
-	int (*arch_state)(struct target_s *target);
-
-	/* target request support */
-	int (*target_request_data)(struct target_s *target, u32 size, u8 *buffer);
-
-	/* halt will log a warning, but return ERROR_OK if the target is already halted. */
-	int (*halt)(struct target_s *target);
-	int (*resume)(struct target_s *target, int current, u32 address, int handle_breakpoints, int debug_execution);
-	int (*step)(struct target_s *target, int current, u32 address, int handle_breakpoints);
-
-	/* target reset control. assert reset can be invoked when OpenOCD and
-	 * the target is out of sync.
-	 *
-	 * A typical example is that the target was power cycled while OpenOCD
-	 * thought the target was halted or running.
-	 *
-	 * assert_reset() can therefore make no assumptions whatsoever about the
-	 * state of the target
-	 *
-	 * Before assert_reset() for the target is invoked, a TRST/tms and
-	 * chain validation is executed. TRST should not be asserted
-	 * during target assert unless there is no way around it due to
-	 * the way reset's are configured.
-	 *
-	 */
-	int (*assert_reset)(struct target_s *target);
-	int (*deassert_reset)(struct target_s *target);
-	int (*soft_reset_halt_imp)(struct target_s *target);
-	int (*soft_reset_halt)(struct target_s *target);
-
-	/**
-	 * Target register access for GDB.  Do @b not call this function
-	 * directly, use target_get_gdb_reg_list() instead.
-	 *
-	 * Danger! this function will succeed even if the target is running
-	 * and return a register list with dummy values.
-	 *
-	 * The reason is that GDB connection will fail without a valid register
-	 * list, however it is after GDB is connected that monitor commands can
-	 * be run to properly initialize the target
-	 */
-	int (*get_gdb_reg_list)(struct target_s *target, struct reg_s **reg_list[], int *reg_list_size);
-
-	/* target memory access
-	* size: 1 = byte (8bit), 2 = half-word (16bit), 4 = word (32bit)
-	* count: number of items of <size>
-	*/
-	int (*read_memory_imp)(struct target_s *target, u32 address, u32 size, u32 count, u8 *buffer);
-	/**
-	 * Target memory read callback.  Do @b not call this function
-	 * directly, use target_read_memory() instead.
-	 */
-	int (*read_memory)(struct target_s *target, u32 address, u32 size, u32 count, u8 *buffer);
-	int (*write_memory_imp)(struct target_s *target, u32 address, u32 size, u32 count, u8 *buffer);
-	/**
-	 * Target memory write callback.  Do @b not call this function
-	 * directly, use target_write_memory() instead.
-	 */
-	int (*write_memory)(struct target_s *target, u32 address, u32 size, u32 count, u8 *buffer);
-
-	/**
-	 * Write target memory in multiples of 4 bytes, optimized for
-	 * writing large quantities of data.  Do @b not call this
-	 * function directly, use target_bulk_write_memory() instead.
-	 */
-	int (*bulk_write_memory)(struct target_s *target, u32 address, u32 count, u8 *buffer);
-
-	int (*checksum_memory)(struct target_s *target, u32 address, u32 count, u32* checksum);
-	int (*blank_check_memory)(struct target_s *target, u32 address, u32 count, u32* blank);
-
-	/*
-	 * target break-/watchpoint control
-	 * rw: 0 = write, 1 = read, 2 = access
-	 *
-	 * Target must be halted while this is invoked as this
-	 * will actually set up breakpoints on target.
-	 *
-	 * The breakpoint hardware will be set up upon adding the first breakpoint.
-	 *
-	 * Upon GDB connection all breakpoints/watchpoints are cleared.
-	 */
-	int (*add_breakpoint)(struct target_s *target, breakpoint_t *breakpoint);
-
-	/* remove breakpoint. hw will only be updated if the target is currently halted.
-	 * However, this method can be invoked on unresponsive targets.
-	 */
-	int (*remove_breakpoint)(struct target_s *target, breakpoint_t *breakpoint);
-	int (*add_watchpoint)(struct target_s *target, watchpoint_t *watchpoint);
-	/* remove watchpoint. hw will only be updated if the target is currently halted.
-	 * However, this method can be invoked on unresponsive targets.
-	 */
-	int (*remove_watchpoint)(struct target_s *target, watchpoint_t *watchpoint);
-
-	/* target algorithm support */
-	int (*run_algorithm_imp)(struct target_s *target, int num_mem_params, mem_param_t *mem_params, int num_reg_params, reg_param_t *reg_param, u32 entry_point, u32 exit_point, int timeout_ms, void *arch_info);
-	/**
-	 * Target algorithm support.  Do @b not call this method directly,
-	 * use target_run_algorithm() instead.
-	 */
-	int (*run_algorithm)(struct target_s *target, int num_mem_params, mem_param_t *mem_params, int num_reg_params, reg_param_t *reg_param, u32 entry_point, u32 exit_point, int timeout_ms, void *arch_info);
-
-	int (*register_commands)(struct command_context_s *cmd_ctx);
-
-	/* called when target is created */
-	int (*target_create)( struct target_s *target, Jim_Interp *interp );
-
-	/* called for various config parameters */
-	/* returns JIM_CONTINUE - if option not understood */
-	/* otherwise: JIM_OK, or JIM_ERR, */
-	int (*target_jim_configure)( struct target_s *target, Jim_GetOptInfo *goi );
-
-	/* target commands specifically handled by the target */
-	/* returns JIM_OK, or JIM_ERR, or JIM_CONTINUE - if option not understood */
-	int (*target_jim_commands)( struct target_s *target, Jim_GetOptInfo *goi );
-
-	/* invoked after JTAG chain has been examined & validated. During
-	 * this stage the target is examined and any additional setup is
-	 * performed.
-	 *
-	 * invoked every time after the jtag chain has been validated/examined
-	 */
-	int (*examine)(struct target_s *target);
-	/* Set up structures for target.
-	 *
-	 * It is illegal to talk to the target at this stage as this fn is invoked
-	 * before the JTAG chain has been examined/verified
-	 * */
-	int (*init_target)(struct command_context_s *cmd_ctx, struct target_s *target);
-	int (*quit)(void);
-
-	int (*virt2phys)(struct target_s *target, u32 address, u32 *physical);
-	int (*mmu)(struct target_s *target, int *enabled);
-
-};
-#else
+// target_type.h contains the full definitionof struct target_type_s
 struct target_type_s;
-#endif // DEFINE_TARGET_TYPE_S
 typedef struct target_type_s target_type_t;
 
 /* forward decloration */

Modified: trunk/src/target/target_request.c
===================================================================
--- trunk/src/target/target_request.c	2009-05-31 12:10:57 UTC (rev 1970)
+++ trunk/src/target/target_request.c	2009-05-31 12:38:28 UTC (rev 1971)
@@ -27,8 +27,8 @@
 #include "config.h"
 #endif
 
-#define DEFINE_TARGET_TYPE_S
 #include "target_request.h"
+#include "target_type.h"
 #include "binarybuffer.h"
 #include "trace.h"
 #include "log.h"

Added: trunk/src/target/target_type.h
===================================================================
--- trunk/src/target/target_type.h	2009-05-31 12:10:57 UTC (rev 1970)
+++ trunk/src/target/target_type.h	2009-05-31 12:38:28 UTC (rev 1971)
@@ -0,0 +1,163 @@
+#ifndef TARGET_TYPE_H
+#define TARGET_TYPE_H
+
+#include "types.h"
+
+struct target_s;
+
+struct target_type_s
+{
+	/**
+	 * Name of the target.  Do @b not access this field directly, use
+	 * target_get_name() instead.
+	 */
+	char *name;
+
+	/**
+	 * Indicates whether this target has been examined.
+	 *
+	 * Do @b not access this field directly, use target_was_examined()
+	 * target_set_examined(), and target_reset_examined().
+	 */
+	int examined;
+
+	/* poll current target status */
+	int (*poll)(struct target_s *target);
+	/* Invoked only from target_arch_state().
+	 * Issue USER() w/architecture specific status.  */
+	int (*arch_state)(struct target_s *target);
+
+	/* target request support */
+	int (*target_request_data)(struct target_s *target, u32 size, u8 *buffer);
+
+	/* halt will log a warning, but return ERROR_OK if the target is already halted. */
+	int (*halt)(struct target_s *target);
+	int (*resume)(struct target_s *target, int current, u32 address, int handle_breakpoints, int debug_execution);
+	int (*step)(struct target_s *target, int current, u32 address, int handle_breakpoints);
+
+	/* target reset control. assert reset can be invoked when OpenOCD and
+	 * the target is out of sync.
+	 *
+	 * A typical example is that the target was power cycled while OpenOCD
+	 * thought the target was halted or running.
+	 *
+	 * assert_reset() can therefore make no assumptions whatsoever about the
+	 * state of the target
+	 *
+	 * Before assert_reset() for the target is invoked, a TRST/tms and
+	 * chain validation is executed. TRST should not be asserted
+	 * during target assert unless there is no way around it due to
+	 * the way reset's are configured.
+	 *
+	 */
+	int (*assert_reset)(struct target_s *target);
+	int (*deassert_reset)(struct target_s *target);
+	int (*soft_reset_halt_imp)(struct target_s *target);
+	int (*soft_reset_halt)(struct target_s *target);
+
+	/**
+	 * Target register access for GDB.  Do @b not call this function
+	 * directly, use target_get_gdb_reg_list() instead.
+	 *
+	 * Danger! this function will succeed even if the target is running
+	 * and return a register list with dummy values.
+	 *
+	 * The reason is that GDB connection will fail without a valid register
+	 * list, however it is after GDB is connected that monitor commands can
+	 * be run to properly initialize the target
+	 */
+	int (*get_gdb_reg_list)(struct target_s *target, struct reg_s **reg_list[], int *reg_list_size);
+
+	/* target memory access
+	* size: 1 = byte (8bit), 2 = half-word (16bit), 4 = word (32bit)
+	* count: number of items of <size>
+	*/
+	int (*read_memory_imp)(struct target_s *target, u32 address, u32 size, u32 count, u8 *buffer);
+	/**
+	 * Target memory read callback.  Do @b not call this function
+	 * directly, use target_read_memory() instead.
+	 */
+	int (*read_memory)(struct target_s *target, u32 address, u32 size, u32 count, u8 *buffer);
+	int (*write_memory_imp)(struct target_s *target, u32 address, u32 size, u32 count, u8 *buffer);
+	/**
+	 * Target memory write callback.  Do @b not call this function
+	 * directly, use target_write_memory() instead.
+	 */
+	int (*write_memory)(struct target_s *target, u32 address, u32 size, u32 count, u8 *buffer);
+
+	/**
+	 * Write target memory in multiples of 4 bytes, optimized for
+	 * writing large quantities of data.  Do @b not call this
+	 * function directly, use target_bulk_write_memory() instead.
+	 */
+	int (*bulk_write_memory)(struct target_s *target, u32 address, u32 count, u8 *buffer);
+
+	int (*checksum_memory)(struct target_s *target, u32 address, u32 count, u32* checksum);
+	int (*blank_check_memory)(struct target_s *target, u32 address, u32 count, u32* blank);
+
+	/*
+	 * target break-/watchpoint control
+	 * rw: 0 = write, 1 = read, 2 = access
+	 *
+	 * Target must be halted while this is invoked as this
+	 * will actually set up breakpoints on target.
+	 *
+	 * The breakpoint hardware will be set up upon adding the first breakpoint.
+	 *
+	 * Upon GDB connection all breakpoints/watchpoints are cleared.
+	 */
+	int (*add_breakpoint)(struct target_s *target, breakpoint_t *breakpoint);
+
+	/* remove breakpoint. hw will only be updated if the target is currently halted.
+	 * However, this method can be invoked on unresponsive targets.
+	 */
+	int (*remove_breakpoint)(struct target_s *target, breakpoint_t *breakpoint);
+	int (*add_watchpoint)(struct target_s *target, watchpoint_t *watchpoint);
+	/* remove watchpoint. hw will only be updated if the target is currently halted.
+	 * However, this method can be invoked on unresponsive targets.
+	 */
+	int (*remove_watchpoint)(struct target_s *target, watchpoint_t *watchpoint);
+
+	/* target algorithm support */
+	int (*run_algorithm_imp)(struct target_s *target, int num_mem_params, mem_param_t *mem_params, int num_reg_params, reg_param_t *reg_param, u32 entry_point, u32 exit_point, int timeout_ms, void *arch_info);
+	/**
+	 * Target algorithm support.  Do @b not call this method directly,
+	 * use target_run_algorithm() instead.
+	 */
+	int (*run_algorithm)(struct target_s *target, int num_mem_params, mem_param_t *mem_params, int num_reg_params, reg_param_t *reg_param, u32 entry_point, u32 exit_point, int timeout_ms, void *arch_info);
+
+	int (*register_commands)(struct command_context_s *cmd_ctx);
+
+	/* called when target is created */
+	int (*target_create)( struct target_s *target, Jim_Interp *interp );
+
+	/* called for various config parameters */
+	/* returns JIM_CONTINUE - if option not understood */
+	/* otherwise: JIM_OK, or JIM_ERR, */
+	int (*target_jim_configure)( struct target_s *target, Jim_GetOptInfo *goi );
+
+	/* target commands specifically handled by the target */
+	/* returns JIM_OK, or JIM_ERR, or JIM_CONTINUE - if option not understood */
+	int (*target_jim_commands)( struct target_s *target, Jim_GetOptInfo *goi );
+
+	/* invoked after JTAG chain has been examined & validated. During
+	 * this stage the target is examined and any additional setup is
+	 * performed.
+	 *
+	 * invoked every time after the jtag chain has been validated/examined
+	 */
+	int (*examine)(struct target_s *target);
+	/* Set up structures for target.
+	 *
+	 * It is illegal to talk to the target at this stage as this fn is invoked
+	 * before the JTAG chain has been examined/verified
+	 * */
+	int (*init_target)(struct command_context_s *cmd_ctx, struct target_s *target);
+	int (*quit)(void);
+
+	int (*virt2phys)(struct target_s *target, u32 address, u32 *physical);
+	int (*mmu)(struct target_s *target, int *enabled);
+
+};
+
+#endif // TARGET_TYPE_H


Property changes on: trunk/src/target/target_type.h
___________________________________________________________________
Name: svn:eol-style
   + native

Modified: trunk/src/target/xscale.c
===================================================================
--- trunk/src/target/xscale.c	2009-05-31 12:10:57 UTC (rev 1970)
+++ trunk/src/target/xscale.c	2009-05-31 12:38:28 UTC (rev 1971)
@@ -24,8 +24,8 @@
 #include "config.h"
 #endif
 
-#define DEFINE_TARGET_TYPE_S
 #include "xscale.h"
+#include "target_type.h"
 #include "arm7_9_common.h"
 #include "arm_simulator.h"
 #include "arm_disassembler.h"

[Openocd-svn] r1970 - in trunk/src: flash helper jtag target

[<zw...@ma...>]

Author: zwelch
Date: 2009-05-31 14:10:57 +0200 (Sun, 31 May 2009)
New Revision: 1970

Modified:
   trunk/src/flash/Makefile.am
   trunk/src/helper/Makefile.am
   trunk/src/jtag/Makefile.am
   trunk/src/target/Makefile.am
Log:
Whitespace-only updates to automake input files:
- use continuations to break long lines of variable assignments
- makes these variables more patch-friendly and conform to style guide


Modified: trunk/src/flash/Makefile.am
===================================================================
--- trunk/src/flash/Makefile.am	2009-05-31 11:32:28 UTC (rev 1969)
+++ trunk/src/flash/Makefile.am	2009-05-31 12:10:57 UTC (rev 1970)
@@ -6,14 +6,56 @@
 METASOURCES = AUTO
 noinst_LTLIBRARIES = libflash.la
 libflash_la_SOURCES = \
-	flash.c lpc2000.c cfi.c non_cfi.c at91sam7.c davinci_nand.c \
-	str7x.c str9x.c aduc702x.c nand.c nand_ecc.c nand_ecc_kw.c \
-	lpc3180_nand_controller.c stellaris.c str9xpec.c stm32x.c tms470.c \
-	ecos.c orion_nand.c s3c24xx_nand.c s3c2410_nand.c s3c2412_nand.c \
-	s3c2440_nand.c s3c2443_nand.c lpc288x.c ocl.c mflash.c pic32mx.c avrf.c
+	flash.c \
+	lpc2000.c \
+	cfi.c \
+	non_cfi.c \
+	at91sam7.c \
+	davinci_nand.c \
+	str7x.c \
+	str9x.c \
+	aduc702x.c \
+	nand.c \
+	nand_ecc.c \
+	nand_ecc_kw.c \
+	lpc3180_nand_controller.c \
+	stellaris.c \
+	str9xpec.c \
+	stm32x.c \
+	tms470.c \
+	ecos.c \
+	orion_nand.c \
+	s3c24xx_nand.c \
+	s3c2410_nand.c \
+	s3c2412_nand.c \
+	s3c2440_nand.c \
+	s3c2443_nand.c \
+	lpc288x.c \
+	ocl.c \
+	mflash.c \
+	pic32mx.c \
+	avrf.c
+
 noinst_HEADERS = \
-	flash.h lpc2000.h cfi.h non_cfi.h at91sam7.h str7x.h \
-	str9x.h nand.h lpc3180_nand_controller.h stellaris.h str9xpec.h \
-	stm32x.h tms470.h s3c24xx_nand.h s3c24xx_regs_nand.h lpc288x.h \
-	mflash.h ocl.h pic32mx.h avrf.h
+	flash.h \
+	lpc2000.h \
+	cfi.h \
+	non_cfi.h \
+	at91sam7.h \
+	str7x.h \
+	str9x.h \
+	nand.h \
+	lpc3180_nand_controller.h \
+	stellaris.h \
+	str9xpec.h \
+	stm32x.h \
+	tms470.h \
+	s3c24xx_nand.h \
+	s3c24xx_regs_nand.h \
+	lpc288x.h \
+	mflash.h \
+	ocl.h \
+	pic32mx.h \
+	avrf.h
+
 MAINTAINERCLEANFILES = Makefile.in

Modified: trunk/src/helper/Makefile.am
===================================================================
--- trunk/src/helper/Makefile.am	2009-05-31 11:32:28 UTC (rev 1969)
+++ trunk/src/helper/Makefile.am	2009-05-31 12:10:57 UTC (rev 1970)
@@ -15,9 +15,15 @@
 
 
 libhelper_la_SOURCES = \
-	binarybuffer.c $(CONFIGFILES) configuration.c \
-	log.c command.c time_support.c \
-	replacements.c fileio.c startup_tcl.c
+	binarybuffer.c \
+	$(CONFIGFILES) \
+	configuration.c \
+	log.c \
+	command.c \
+	time_support.c \
+	replacements.c \
+	fileio.c \
+	startup_tcl.c
 
 if IOUTIL
 libhelper_la_SOURCES += ioutil.c
@@ -29,9 +35,20 @@
 libhelper_la_CFLAGS += -Wno-sign-compare
 endif
 
-noinst_HEADERS = binarybuffer.h configuration.h types.h log.h command.h \
-	time_support.h replacements.h fileio.h jim.h jim-eventloop.h \
-	system.h startup.tcl bin2char.c
+noinst_HEADERS = \
+	binarybuffer.h \
+	configuration.h \
+	types.h \
+	log.h \
+	command.h \
+	time_support.h \
+	replacements.h \
+	fileio.h \
+	jim.h \
+	jim-eventloop.h \
+	system.h \
+	startup.tcl \
+	bin2char.c
 
 bin2char$(EXEEXT_FOR_BUILD): bin2char.c
 	${CC_FOR_BUILD} ${CFLAGS_FOR_BUILD} $(srcdir)/bin2char.c -o $@

Modified: trunk/src/jtag/Makefile.am
===================================================================
--- trunk/src/jtag/Makefile.am	2009-05-31 11:32:28 UTC (rev 1969)
+++ trunk/src/jtag/Makefile.am	2009-05-31 12:10:57 UTC (rev 1970)
@@ -110,12 +110,30 @@
 endif
 
 libjtag_la_SOURCES = jtag.c \
-	$(BITBANGFILES) $(PARPORTFILES) $(DUMMYFILES) \
-	$(FT2232FILES) $(AMTJTAGACCELFILES) $(EP93XXFILES) \
-	$(AT91RM9200FILES) $(GW16012FILES) $(BITQFILES) \
-	$(PRESTOFILES) $(USBPROGFILES) $(ECOSBOARDFILES) \
-	$(JLINKFILES) $(RLINKFILES) $(VSLLINKFILES) $(ARMJTAGEWFILES)
+	$(BITBANGFILES) \
+	$(PARPORTFILES) \
+	$(DUMMYFILES) \
+	$(FT2232FILES) \
+	$(AMTJTAGACCELFILES) \
+	$(EP93XXFILES) \
+	$(AT91RM9200FILES) \
+	$(GW16012FILES) \
+	$(BITQFILES) \
+	$(PRESTOFILES) \
+	$(USBPROGFILES) \
+	$(ECOSBOARDFILES) \
+	$(JLINKFILES) \
+	$(RLINKFILES) \
+	$(VSLLINKFILES) \
+	$(ARMJTAGEWFILES)
 
-noinst_HEADERS = bitbang.h jtag.h bitq.h rlink/dtc_cmd.h rlink/ep1_cmd.h rlink/rlink.h rlink/st7.h
+noinst_HEADERS = \
+	bitbang.h \
+	jtag.h \
+	bitq.h \
+	rlink/dtc_cmd.h \
+	rlink/ep1_cmd.h \
+	rlink/rlink.h \
+	rlink/st7.h
 
 MAINTAINERCLEANFILES = Makefile.in

Modified: trunk/src/target/Makefile.am
===================================================================
--- trunk/src/target/Makefile.am	2009-05-31 11:32:28 UTC (rev 1969)
+++ trunk/src/target/Makefile.am	2009-05-31 12:10:57 UTC (rev 1970)
@@ -12,17 +12,87 @@
 
 METASOURCES = AUTO
 noinst_LTLIBRARIES = libtarget.la
-libtarget_la_SOURCES = target.c register.c breakpoints.c \
-	armv4_5.c embeddedice.c etm.c arm7tdmi.c arm9tdmi.c \
-	arm_jtag.c arm7_9_common.c algorithm.c arm920t.c arm720t.c armv4_5_mmu.c armv4_5_cache.c arm_disassembler.c \
-	arm966e.c arm926ejs.c feroceon.c etb.c xscale.c arm_simulator.c image.c armv7m.c cortex_m3.c cortex_a8.c arm_adi_v5.c \
-	etm_dummy.c $(OOCD_TRACE_FILES) target_request.c trace.c arm11.c arm11_dbgtap.c mips32.c mips_m4k.c \
-	mips32_pracc.c mips32_dmaacc.c mips_ejtag.c avrt.c
-noinst_HEADERS = target.h trace.h register.h armv4_5.h embeddedice.h etm.h arm7tdmi.h arm9tdmi.h \
-	arm_jtag.h arm7_9_common.h arm920t.h arm720t.h armv4_5_mmu.h armv4_5_cache.h breakpoints.h algorithm.h \
-	arm_disassembler.h arm966e.h arm926ejs.h etb.h xscale.h arm_simulator.h image.h armv7m.h cortex_m3.h cortex_a8.h arm_adi_v5.h \
-	etm_dummy.h oocd_trace.h target_request.h trace.h arm11.h mips32.h mips_m4k.h mips_ejtag.h mips32_pracc.h mips32_dmaacc.h avrt.h
+libtarget_la_SOURCES = \
+	target.c \
+	register.c \
+	breakpoints.c \
+	armv4_5.c \
+	embeddedice.c \
+	etm.c \
+	arm7tdmi.c \
+	arm9tdmi.c \
+	arm_jtag.c \
+	arm7_9_common.c \
+	algorithm.c \
+	arm920t.c \
+	arm720t.c \
+	armv4_5_mmu.c \
+	armv4_5_cache.c \
+	arm_disassembler.c \
+	arm966e.c \
+	arm926ejs.c \
+	feroceon.c \
+	etb.c \
+	xscale.c \
+	arm_simulator.c \
+	image.c \
+	armv7m.c \
+	cortex_m3.c \
+	cortex_a8.c \
+	arm_adi_v5.c \
+	etm_dummy.c \
+	$(OOCD_TRACE_FILES) \
+	target_request.c \
+	trace.c \
+	arm11.c \
+	arm11_dbgtap.c \
+	mips32.c \
+	mips_m4k.c \
+	mips32_pracc.c \
+	mips32_dmaacc.c \
+	mips_ejtag.c \
+	avrt.c
 
+noinst_HEADERS = \
+	target.h \
+	trace.h \
+	register.h \
+	armv4_5.h \
+	embeddedice.h \
+	etm.h \
+	arm7tdmi.h \
+	arm9tdmi.h \
+	arm_jtag.h \
+	arm7_9_common.h \
+	arm920t.h \
+	arm720t.h \
+	armv4_5_mmu.h \
+	armv4_5_cache.h \
+	breakpoints.h \
+	algorithm.h \
+	arm_disassembler.h \
+	arm966e.h \
+	arm926ejs.h \
+	etb.h \
+	xscale.h \
+	arm_simulator.h \
+	image.h \
+	armv7m.h \
+	cortex_m3.h \
+	cortex_a8.h \
+	arm_adi_v5.h \
+	etm_dummy.h \
+	oocd_trace.h \
+	target_request.h \
+	trace.h \
+	arm11.h \
+	mips32.h \
+	mips_m4k.h \
+	mips_ejtag.h \
+	mips32_pracc.h \
+	mips32_dmaacc.h \
+	avrt.h
+
 nobase_dist_pkglib_DATA =
 nobase_dist_pkglib_DATA += xscale/debug_handler.bin 
 nobase_dist_pkglib_DATA += ecos/at91eb40a.elf

[Openocd-svn] r1969 - trunk/src/target

[<zw...@ma...>]

Author: zwelch
Date: 2009-05-31 13:32:28 +0200 (Sun, 31 May 2009)
New Revision: 1969

Modified:
   trunk/src/target/arm11.c
   trunk/src/target/arm720t.c
   trunk/src/target/arm7tdmi.c
   trunk/src/target/arm920t.c
   trunk/src/target/arm926ejs.c
   trunk/src/target/arm966e.c
   trunk/src/target/arm9tdmi.c
   trunk/src/target/avrt.c
   trunk/src/target/cortex_a8.c
   trunk/src/target/cortex_m3.c
   trunk/src/target/feroceon.c
   trunk/src/target/mips_m4k.c
   trunk/src/target/target.c
   trunk/src/target/target.h
   trunk/src/target/target_request.c
   trunk/src/target/xscale.c
Log:
First step in hiding target_type_s from public interface:
- Add DEFINE_TARGET_TYPE_S symbol in files that need it defined.
- Forward declare 'struct target_type_s' only, unless that symbol is defined.


Modified: trunk/src/target/arm11.c
===================================================================
--- trunk/src/target/arm11.c	2009-05-31 11:32:10 UTC (rev 1968)
+++ trunk/src/target/arm11.c	2009-05-31 11:32:28 UTC (rev 1969)
@@ -26,6 +26,7 @@
 #include "config.h"
 #endif
 
+#define DEFINE_TARGET_TYPE_S
 #include "arm11.h"
 
 

Modified: trunk/src/target/arm720t.c
===================================================================
--- trunk/src/target/arm720t.c	2009-05-31 11:32:10 UTC (rev 1968)
+++ trunk/src/target/arm720t.c	2009-05-31 11:32:28 UTC (rev 1969)
@@ -21,6 +21,7 @@
 #include "config.h"
 #endif
 
+#define DEFINE_TARGET_TYPE_S
 #include "arm720t.h"
 #include "time_support.h"
 

Modified: trunk/src/target/arm7tdmi.c
===================================================================
--- trunk/src/target/arm7tdmi.c	2009-05-31 11:32:10 UTC (rev 1968)
+++ trunk/src/target/arm7tdmi.c	2009-05-31 11:32:28 UTC (rev 1969)
@@ -27,6 +27,7 @@
 #include "config.h"
 #endif
 
+#define DEFINE_TARGET_TYPE_S
 #include "arm7tdmi.h"
 
 

Modified: trunk/src/target/arm920t.c
===================================================================
--- trunk/src/target/arm920t.c	2009-05-31 11:32:10 UTC (rev 1968)
+++ trunk/src/target/arm920t.c	2009-05-31 11:32:28 UTC (rev 1969)
@@ -21,6 +21,7 @@
 #include "config.h"
 #endif
 
+#define DEFINE_TARGET_TYPE_S
 #include "arm920t.h"
 #include "time_support.h"
 

Modified: trunk/src/target/arm926ejs.c
===================================================================
--- trunk/src/target/arm926ejs.c	2009-05-31 11:32:10 UTC (rev 1968)
+++ trunk/src/target/arm926ejs.c	2009-05-31 11:32:28 UTC (rev 1969)
@@ -21,6 +21,7 @@
 #include "config.h"
 #endif
 
+#define DEFINE_TARGET_TYPE_S
 #include "arm926ejs.h"
 #include "time_support.h"
 

Modified: trunk/src/target/arm966e.c
===================================================================
--- trunk/src/target/arm966e.c	2009-05-31 11:32:10 UTC (rev 1968)
+++ trunk/src/target/arm966e.c	2009-05-31 11:32:28 UTC (rev 1969)
@@ -24,6 +24,7 @@
 #include "config.h"
 #endif
 
+#define DEFINE_TARGET_TYPE_S
 #include "arm966e.h"
 
 

Modified: trunk/src/target/arm9tdmi.c
===================================================================
--- trunk/src/target/arm9tdmi.c	2009-05-31 11:32:10 UTC (rev 1968)
+++ trunk/src/target/arm9tdmi.c	2009-05-31 11:32:28 UTC (rev 1969)
@@ -27,6 +27,7 @@
 #include "config.h"
 #endif
 
+#define DEFINE_TARGET_TYPE_S
 #include "arm9tdmi.h"
 
 

Modified: trunk/src/target/avrt.c
===================================================================
--- trunk/src/target/avrt.c	2009-05-31 11:32:10 UTC (rev 1968)
+++ trunk/src/target/avrt.c	2009-05-31 11:32:28 UTC (rev 1969)
@@ -21,6 +21,7 @@
 #include "config.h"
 #endif
 
+#define DEFINE_TARGET_TYPE_S
 #include "avrt.h"
 #include "target.h"
 

Modified: trunk/src/target/cortex_a8.c
===================================================================
--- trunk/src/target/cortex_a8.c	2009-05-31 11:32:10 UTC (rev 1968)
+++ trunk/src/target/cortex_a8.c	2009-05-31 11:32:28 UTC (rev 1969)
@@ -33,6 +33,7 @@
 #include "config.h"
 #endif
 
+#define DEFINE_TARGET_TYPE_S
 #include "cortex_a8.h"
 #include "target_request.h"
 

Modified: trunk/src/target/cortex_m3.c
===================================================================
--- trunk/src/target/cortex_m3.c	2009-05-31 11:32:10 UTC (rev 1968)
+++ trunk/src/target/cortex_m3.c	2009-05-31 11:32:28 UTC (rev 1969)
@@ -31,6 +31,7 @@
 #include "config.h"
 #endif
 
+#define DEFINE_TARGET_TYPE_S
 #include "cortex_m3.h"
 #include "target_request.h"
 

Modified: trunk/src/target/feroceon.c
===================================================================
--- trunk/src/target/feroceon.c	2009-05-31 11:32:10 UTC (rev 1968)
+++ trunk/src/target/feroceon.c	2009-05-31 11:32:28 UTC (rev 1969)
@@ -49,6 +49,7 @@
 #include "config.h"
 #endif
 
+#define DEFINE_TARGET_TYPE_S
 #include "arm926ejs.h"
 
 

Modified: trunk/src/target/mips_m4k.c
===================================================================
--- trunk/src/target/mips_m4k.c	2009-05-31 11:32:10 UTC (rev 1968)
+++ trunk/src/target/mips_m4k.c	2009-05-31 11:32:28 UTC (rev 1969)
@@ -23,6 +23,7 @@
 #include "config.h"
 #endif
 
+#define DEFINE_TARGET_TYPE_S
 #include "mips32.h"
 #include "mips_m4k.h"
 #include "mips32_dmaacc.h"

Modified: trunk/src/target/target.c
===================================================================
--- trunk/src/target/target.c	2009-05-31 11:32:10 UTC (rev 1968)
+++ trunk/src/target/target.c	2009-05-31 11:32:28 UTC (rev 1969)
@@ -33,6 +33,8 @@
 #include "config.h"
 #endif
 
+#define DEFINE_TARGET_TYPE_S
+
 #include "target.h"
 #include "target_request.h"
 #include "time_support.h"

Modified: trunk/src/target/target.h
===================================================================
--- trunk/src/target/target.h	2009-05-31 11:32:10 UTC (rev 1968)
+++ trunk/src/target/target.h	2009-05-31 11:32:28 UTC (rev 1969)
@@ -105,7 +105,8 @@
 	struct working_area_s *next;
 } working_area_t;
 
-typedef struct target_type_s
+#ifdef DEFINE_TARGET_TYPE_S
+struct target_type_s
 {
 	/**
 	 * Name of the target.  Do @b not access this field directly, use
@@ -258,7 +259,11 @@
 	int (*virt2phys)(struct target_s *target, u32 address, u32 *physical);
 	int (*mmu)(struct target_s *target, int *enabled);
 
-} target_type_t;
+};
+#else
+struct target_type_s;
+#endif // DEFINE_TARGET_TYPE_S
+typedef struct target_type_s target_type_t;
 
 /* forward decloration */
 typedef struct target_event_action_s target_event_action_t;

Modified: trunk/src/target/target_request.c
===================================================================
--- trunk/src/target/target_request.c	2009-05-31 11:32:10 UTC (rev 1968)
+++ trunk/src/target/target_request.c	2009-05-31 11:32:28 UTC (rev 1969)
@@ -27,6 +27,7 @@
 #include "config.h"
 #endif
 
+#define DEFINE_TARGET_TYPE_S
 #include "target_request.h"
 #include "binarybuffer.h"
 #include "trace.h"

Modified: trunk/src/target/xscale.c
===================================================================
--- trunk/src/target/xscale.c	2009-05-31 11:32:10 UTC (rev 1968)
+++ trunk/src/target/xscale.c	2009-05-31 11:32:28 UTC (rev 1969)
@@ -24,6 +24,7 @@
 #include "config.h"
 #endif
 
+#define DEFINE_TARGET_TYPE_S
 #include "xscale.h"
 #include "arm7_9_common.h"
 #include "arm_simulator.h"