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|
From: <du...@ma...> - 2009-06-20 01:16:08
|
Author: duane
Date: 2009-06-20 01:15:58 +0200 (Sat, 20 Jun 2009)
New Revision: 2293
Modified:
trunk/src/jtag/arm-jtag-ew.c
trunk/src/jtag/core.c
trunk/src/jtag/ft2232.c
trunk/src/jtag/jlink.c
trunk/src/jtag/presto.c
trunk/src/jtag/tcl.c
Log:
printf() warning fixes due to uint32_t change-over
Modified: trunk/src/jtag/arm-jtag-ew.c
===================================================================
--- trunk/src/jtag/arm-jtag-ew.c 2009-06-19 22:39:35 UTC (rev 2292)
+++ trunk/src/jtag/arm-jtag-ew.c 2009-06-19 23:15:58 UTC (rev 2293)
@@ -472,14 +472,14 @@
if (result == 0)
{
unsigned int u_tg = buf_get_u32(usb_in_buffer, 0, 16);
- LOG_INFO("U_tg = %d mV, U_aux = %d mV, U_tgpwr = %d mV, I_tgpwr = %d mA, D1 = %d, Target power %s %s\n", \
- buf_get_u32(usb_in_buffer + 0, 0, 16), \
- buf_get_u32(usb_in_buffer + 2, 0, 16), \
- buf_get_u32(usb_in_buffer + 4, 0, 16), \
- buf_get_u32(usb_in_buffer + 6, 0, 16), \
- usb_in_buffer[9], \
- usb_in_buffer[11] ? "OVERCURRENT" : "OK", \
- usb_in_buffer[10] ? "enabled" : "disabled");
+ LOG_INFO("U_tg = %d mV, U_aux = %d mV, U_tgpwr = %d mV, I_tgpwr = %d mA, D1 = %d, Target power %s %s\n",
+ (int)(buf_get_u32(usb_in_buffer + 0, 0, 16)),
+ (int)(buf_get_u32(usb_in_buffer + 2, 0, 16)),
+ (int)(buf_get_u32(usb_in_buffer + 4, 0, 16)),
+ (int)(buf_get_u32(usb_in_buffer + 6, 0, 16)),
+ usb_in_buffer[9],
+ usb_in_buffer[11] ? "OVERCURRENT" : "OK",
+ usb_in_buffer[10] ? "enabled" : "disabled");
if (u_tg < 1500)
{
Modified: trunk/src/jtag/core.c
===================================================================
--- trunk/src/jtag/core.c 2009-06-19 22:39:35 UTC (rev 2292)
+++ trunk/src/jtag/core.c 2009-06-19 23:15:58 UTC (rev 2293)
@@ -862,10 +862,13 @@
const char *name, uint32_t idcode)
{
log_printf_lf(level, __FILE__, __LINE__, __FUNCTION__,
- "JTAG tap: %s %16.16s: 0x%08x "
- "(mfg: 0x%3.3x, part: 0x%4.4x, ver: 0x%1.1x)",
- name, msg, idcode,
- EXTRACT_MFG(idcode), EXTRACT_PART(idcode), EXTRACT_VER(idcode) );
+ "JTAG tap: %s %16.16s: 0x%08x "
+ "(mfg: 0x%3.3x, part: 0x%4.4x, ver: 0x%1.1x)",
+ name, msg,
+ (unsigned int)idcode,
+ (unsigned int)EXTRACT_MFG(idcode),
+ (unsigned int)EXTRACT_PART(idcode),
+ (unsigned int)EXTRACT_VER(idcode) );
}
static bool jtag_idcode_is_final(uint32_t idcode)
@@ -889,7 +892,7 @@
if (!triggered && jtag_idcode_is_final(idcode))
continue;
LOG_WARNING("Unexpected idcode after end of chain: %d 0x%08x",
- count, idcode);
+ count, (unsigned int)idcode);
triggered = true;
}
}
@@ -1100,7 +1103,7 @@
LOG_DEBUG("Created Tap: %s @ abs position %d, "
"irlen %d, capture: 0x%x mask: 0x%x", tap->dotted_name,
tap->abs_chain_position, tap->ir_length,
- tap->ir_capture_value, tap->ir_capture_mask);
+ (unsigned int)(tap->ir_capture_value), (unsigned int)(tap->ir_capture_mask));
jtag_tap_add(tap);
}
Modified: trunk/src/jtag/ft2232.c
===================================================================
--- trunk/src/jtag/ft2232.c 2009-06-19 22:39:35 UTC (rev 2292)
+++ trunk/src/jtag/ft2232.c 2009-06-19 23:15:58 UTC (rev 2293)
@@ -411,7 +411,9 @@
if (*bytes_read < size)
{
- LOG_ERROR("couldn't read the requested number of bytes from FT2232 device (%i < %i)", *bytes_read, size);
+ LOG_ERROR("couldn't read the requested number of bytes from FT2232 device (%i < %i)",
+ (unsigned int)(*bytes_read),
+ (unsigned int)size);
return ERROR_JTAG_DEVICE_ERROR;
}
@@ -963,7 +965,8 @@
LOG_ERROR("couldn't write MPSSE commands to FT2232");
exit(-1);
}
- LOG_DEBUG("ft2232_buffer_size: %i, bytes_written: %i", ft2232_buffer_size, bytes_written);
+ LOG_DEBUG("ft2232_buffer_size: %i, bytes_written: %i",
+ ft2232_buffer_size, (int)bytes_written);
ft2232_buffer_size = 0;
/* add command for complete bytes */
@@ -1016,7 +1019,9 @@
LOG_ERROR("couldn't write MPSSE commands to FT2232");
exit(-1);
}
- LOG_DEBUG("ft2232_buffer_size: %i, bytes_written: %i", ft2232_buffer_size, bytes_written);
+ LOG_DEBUG("ft2232_buffer_size: %i, bytes_written: %i",
+ ft2232_buffer_size,
+ (int)bytes_written);
ft2232_buffer_size = 0;
if (type != SCAN_OUT)
@@ -1026,7 +1031,9 @@
LOG_ERROR("couldn't read from FT2232");
exit(-1);
}
- LOG_DEBUG("thisrun_read: %i, bytes_read: %i", thisrun_read, bytes_read);
+ LOG_DEBUG("thisrun_read: %i, bytes_read: %i",
+ thisrun_read,
+ (int)bytes_read);
receive_pointer += bytes_read;
}
}
@@ -1122,7 +1129,9 @@
LOG_ERROR("couldn't write MPSSE commands to FT2232");
exit(-1);
}
- LOG_DEBUG("ft2232_buffer_size: %i, bytes_written: %i", ft2232_buffer_size, bytes_written);
+ LOG_DEBUG("ft2232_buffer_size: %i, bytes_written: %i",
+ ft2232_buffer_size,
+ (int)bytes_written);
ft2232_buffer_size = 0;
if (type != SCAN_OUT)
@@ -1132,7 +1141,9 @@
LOG_ERROR("couldn't read from FT2232");
exit(-1);
}
- LOG_DEBUG("thisrun_read: %i, bytes_read: %i", thisrun_read, bytes_read);
+ LOG_DEBUG("thisrun_read: %i, bytes_read: %i",
+ thisrun_read,
+ (int)bytes_read);
receive_pointer += bytes_read;
}
Modified: trunk/src/jtag/jlink.c
===================================================================
--- trunk/src/jtag/jlink.c 2009-06-19 22:39:35 UTC (rev 2292)
+++ trunk/src/jtag/jlink.c 2009-06-19 23:15:58 UTC (rev 2293)
@@ -589,7 +589,7 @@
}
jlink_caps = buf_get_u32(usb_in_buffer, 0, 32);
- LOG_INFO("JLink caps 0x%x", jlink_caps);
+ LOG_INFO("JLink caps 0x%x", (unsigned)jlink_caps);
if (jlink_caps & (1 << EMU_CAP_GET_HW_VERSION))
{
@@ -608,7 +608,7 @@
if (major_revision >= 5)
jlink_hw_jtag_version = 3;
- LOG_INFO("JLink hw version %i", jlink_hw_version);
+ LOG_INFO("JLink hw version %i", (int)jlink_hw_version);
}
if (jlink_caps & (1 << EMU_CAP_GET_MAX_BLOCK_SIZE))
@@ -624,7 +624,7 @@
}
jlink_max_size = buf_get_u32(usb_in_buffer, 0, 32);
- LOG_INFO("JLink max mem block %i", jlink_max_size);
+ LOG_INFO("JLink max mem block %i", (int)jlink_max_size);
}
return ERROR_OK;
Modified: trunk/src/jtag/presto.c
===================================================================
--- trunk/src/jtag/presto.c 2009-06-19 22:39:35 UTC (rev 2292)
+++ trunk/src/jtag/presto.c 2009-06-19 23:15:58 UTC (rev 2293)
@@ -150,7 +150,8 @@
if (ftbytes != size)
{
- LOG_ERROR("couldn't write the requested number of bytes to PRESTO (%u < %u)", (uint32_t)ftbytes, size);
+ LOG_ERROR("couldn't write the requested number of bytes to PRESTO (%u < %u)",
+ (unsigned)ftbytes, (unsigned)size);
return ERROR_JTAG_DEVICE_ERROR;
}
@@ -192,7 +193,8 @@
if (ftbytes != size)
{
/* this is just a warning, there might have been timeout when detecting PRESTO, which is not fatal */
- LOG_WARNING("couldn't read the requested number of bytes from PRESTO (%u < %u)", (uint32_t)ftbytes, size);
+ LOG_WARNING("couldn't read the requested number of bytes from PRESTO (%u < %u)",
+ (unsigned)ftbytes, (unsigned)size);
return ERROR_JTAG_DEVICE_ERROR;
}
Modified: trunk/src/jtag/tcl.c
===================================================================
--- trunk/src/jtag/tcl.c 2009-06-19 22:39:35 UTC (rev 2292)
+++ trunk/src/jtag/tcl.c 2009-06-19 23:15:58 UTC (rev 2293)
@@ -872,16 +872,16 @@
tap->abs_chain_position,
tap->dotted_name,
tap->enabled ? 'Y' : 'n',
- tap->idcode,
- (tap->expected_ids_cnt > 0 ? tap->expected_ids[0] : 0),
- tap->ir_length,
- expected,
- expected_mask,
- cur_instr);
+ (unsigned int)(tap->idcode),
+ (unsigned int)(tap->expected_ids_cnt > 0 ? tap->expected_ids[0] : 0),
+ (unsigned int)(tap->ir_length),
+ (unsigned int)(expected),
+ (unsigned int)(expected_mask),
+ (unsigned int)(cur_instr));
for (ii = 1; ii < tap->expected_ids_cnt; ii++) {
command_print(cmd_ctx, " | | | | 0x%08x | | | | ",
- tap->expected_ids[ii]);
+ (unsigned int)(tap->expected_ids[ii]));
}
tap = tap->next_tap;
@@ -1503,3 +1503,9 @@
return ERROR_OK;
}
+/*
+ * Local Variables:
+ * c-basic-offset: 4
+ * tab-width: 4
+ * End:
+ */
|
|
From: <zw...@ma...> - 2009-06-20 00:39:56
|
Author: zwelch
Date: 2009-06-20 00:39:35 +0200 (Sat, 20 Jun 2009)
New Revision: 2292
Added:
trunk/src/target/fa526.c
Modified:
trunk/doc/openocd.texi
trunk/src/target/Makefile.am
trunk/src/target/arm920t.c
trunk/src/target/arm920t.h
trunk/src/target/arm9tdmi.h
trunk/src/target/target.c
Log:
Paulius Zaleckas <pau...@gm...>:
This is minimal patch to support FA526 ARMv4 compatible core.
Since it is very similar to ARM920T I tried to reuse as much
code as possible.
CPU and board configs will follow soon.
Modified: trunk/doc/openocd.texi
===================================================================
--- trunk/doc/openocd.texi 2009-06-19 09:09:25 UTC (rev 2291)
+++ trunk/doc/openocd.texi 2009-06-19 22:39:35 UTC (rev 2292)
@@ -2572,6 +2572,7 @@
This is fixed in Fury Rev B, DustDevil Rev B, Tempest; these revisions will
be detected and the normal reset behaviour used.
@end itemize
+@item @code{fa526} -- resembles arm920 (w/o Thumb)
@item @code{feroceon} -- resembles arm926
@item @code{mips_m4k} -- a MIPS core. This supports one variant:
@itemize @minus
Modified: trunk/src/target/Makefile.am
===================================================================
--- trunk/src/target/Makefile.am 2009-06-19 09:09:25 UTC (rev 2291)
+++ trunk/src/target/Makefile.am 2009-06-19 22:39:35 UTC (rev 2292)
@@ -31,6 +31,7 @@
arm_disassembler.c \
arm966e.c \
arm926ejs.c \
+ fa526.c \
feroceon.c \
etb.c \
xscale.c \
Modified: trunk/src/target/arm920t.c
===================================================================
--- trunk/src/target/arm920t.c 2009-06-19 09:09:25 UTC (rev 2291)
+++ trunk/src/target/arm920t.c 2009-06-19 22:39:35 UTC (rev 2292)
@@ -31,8 +31,6 @@
#endif
/* cli handling */
-int arm920t_register_commands(struct command_context_s *cmd_ctx);
-
int arm920t_handle_cp15_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
int arm920t_handle_cp15i_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
int arm920t_handle_virt2phys_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
@@ -47,10 +45,6 @@
int arm920t_target_create(struct target_s *target, Jim_Interp *interp);
int arm920t_init_target(struct command_context_s *cmd_ctx, struct target_s *target);
int arm920t_quit(void);
-int arm920t_arch_state(struct target_s *target);
-int arm920t_read_memory(struct target_s *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer);
-int arm920t_write_memory(struct target_s *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer);
-int arm920t_soft_reset_halt(struct target_s *target);
#define ARM920T_CP15_PHYS_ADDR(x, y, z) ((x << 5) | (y << 1) << (z))
Modified: trunk/src/target/arm920t.h
===================================================================
--- trunk/src/target/arm920t.h 2009-06-19 09:09:25 UTC (rev 2291)
+++ trunk/src/target/arm920t.h 2009-06-19 22:39:35 UTC (rev 2292)
@@ -51,4 +51,15 @@
uint32_t ram2;
} arm920t_tlb_entry_t;
+int arm920t_arch_state(struct target_s *target);
+int arm920t_soft_reset_halt(struct target_s *target);
+int arm920t_read_memory(struct target_s *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer);
+int arm920t_write_memory(struct target_s *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer);
+void arm920t_post_debug_entry(target_t *target);
+void arm920t_pre_restore_context(target_t *target);
+uint32_t arm920t_get_ttb(target_t *target);
+void arm920t_disable_mmu_caches(target_t *target, int mmu, int d_u_cache, int i_cache);
+void arm920t_enable_mmu_caches(target_t *target, int mmu, int d_u_cache, int i_cache);
+int arm920t_register_commands(struct command_context_s *cmd_ctx);
+
#endif /* ARM920T_H */
Modified: trunk/src/target/arm9tdmi.h
===================================================================
--- trunk/src/target/arm9tdmi.h 2009-06-19 09:09:25 UTC (rev 2291)
+++ trunk/src/target/arm9tdmi.h 2009-06-19 22:39:35 UTC (rev 2292)
@@ -63,4 +63,17 @@
extern void arm9tdmi_read_core_regs(target_t *target, uint32_t mask, uint32_t* core_regs[16]);
extern void arm9tdmi_write_core_regs(target_t *target, uint32_t mask, uint32_t core_regs[16]);
+extern int arm9tdmi_examine_debug_reason(target_t *target);
+
+extern void arm9tdmi_load_word_regs(target_t *target, uint32_t mask);
+extern void arm9tdmi_load_hword_reg(target_t *target, int num);
+extern void arm9tdmi_load_byte_reg(target_t *target, int num);
+extern void arm9tdmi_store_word_regs(target_t *target, uint32_t mask);
+extern void arm9tdmi_store_hword_reg(target_t *target, int num);
+extern void arm9tdmi_store_byte_reg(target_t *target, int num);
+
+extern void arm9tdmi_branch_resume(target_t *target);
+extern void arm9tdmi_enable_single_step(target_t *target, uint32_t next_pc);
+extern void arm9tdmi_disable_single_step(target_t *target);
+
#endif /* ARM9TDMI_H */
Added: trunk/src/target/fa526.c
===================================================================
--- trunk/src/target/fa526.c 2009-06-19 09:09:25 UTC (rev 2291)
+++ trunk/src/target/fa526.c 2009-06-19 22:39:35 UTC (rev 2292)
@@ -0,0 +1,430 @@
+/***************************************************************************
+ * Copyright (C) 2009 by Paulius Zaleckas *
+ * pau...@gm... *
+ * *
+ * This program is free software; you can redistribute it and/or modify *
+ * it under the terms of the GNU General Public License as published by *
+ * the Free Software Foundation; either version 2 of the License, or *
+ * (at your option) any later version. *
+ * *
+ * This program is distributed in the hope that it will be useful, *
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of *
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
+ * GNU General Public License for more details. *
+ * *
+ * You should have received a copy of the GNU General Public License *
+ * along with this program; if not, write to the *
+ * Free Software Foundation, Inc., *
+ * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
+ ***************************************************************************/
+
+/*
+ * FA526 is very similar to ARM920T with following differences:
+ *
+ * - execution pipeline is 6 steps
+ * - Unified TLB
+ * - has Branch Target Buffer
+ * - does not support reading of I/D cache contents
+ */
+
+#ifdef HAVE_CONFIG_H
+#include "config.h"
+#endif
+
+#include "arm920t.h"
+#include "target_type.h"
+
+int fa526_target_create(struct target_s *target, Jim_Interp *interp);
+int fa526_init_target(struct command_context_s *cmd_ctx, struct target_s *target);
+int fa526_quit(void);
+
+target_type_t fa526_target =
+{
+ .name = "fa526",
+
+ .poll = arm7_9_poll,
+ .arch_state = arm920t_arch_state,
+
+ .target_request_data = arm7_9_target_request_data,
+
+ .halt = arm7_9_halt,
+ .resume = arm7_9_resume,
+ .step = arm7_9_step,
+
+ .assert_reset = arm7_9_assert_reset,
+ .deassert_reset = arm7_9_deassert_reset,
+ .soft_reset_halt = arm920t_soft_reset_halt,
+
+ .get_gdb_reg_list = armv4_5_get_gdb_reg_list,
+
+ .read_memory = arm920t_read_memory,
+ .write_memory = arm920t_write_memory,
+ .bulk_write_memory = arm7_9_bulk_write_memory,
+ .checksum_memory = arm7_9_checksum_memory,
+ .blank_check_memory = arm7_9_blank_check_memory,
+
+ .run_algorithm = armv4_5_run_algorithm,
+
+ .add_breakpoint = arm7_9_add_breakpoint,
+ .remove_breakpoint = arm7_9_remove_breakpoint,
+ .add_watchpoint = arm7_9_add_watchpoint,
+ .remove_watchpoint = arm7_9_remove_watchpoint,
+
+ .register_commands = arm920t_register_commands,
+ .target_create = fa526_target_create,
+ .init_target = fa526_init_target,
+ .examine = arm9tdmi_examine,
+ .quit = fa526_quit
+};
+
+void fa526_change_to_arm(target_t *target, uint32_t *r0, uint32_t *pc)
+{
+ LOG_ERROR("%s: there is no Thumb state on FA526", __func__);
+}
+
+void fa526_read_core_regs(target_t *target, uint32_t mask, uint32_t* core_regs[16])
+{
+ int i;
+ /* get pointers to arch-specific information */
+ armv4_5_common_t *armv4_5 = target->arch_info;
+ arm7_9_common_t *arm7_9 = armv4_5->arch_info;
+ arm_jtag_t *jtag_info = &arm7_9->jtag_info;
+
+ /* STMIA r0-15, [r0] at debug speed
+ * register values will start to appear on 4th DCLK
+ */
+ arm9tdmi_clock_out(jtag_info, ARMV4_5_STMIA(0, mask & 0xffff, 0, 0), 0, NULL, 0);
+
+ /* fetch NOP, STM in DECODE stage */
+ arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, NULL, 0);
+ /* fetch NOP, STM in SHIFT stage */
+ arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, NULL, 0);
+ /* fetch NOP, STM in EXECUTE stage (1st cycle) */
+ arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, NULL, 0);
+
+ for (i = 0; i <= 15; i++)
+ {
+ if (mask & (1 << i))
+ /* nothing fetched, STM in MEMORY (i'th cycle) */
+ arm9tdmi_clock_data_in(jtag_info, core_regs[i]);
+ }
+}
+
+void fa526_read_core_regs_target_buffer(target_t *target, uint32_t mask, void* buffer, int size)
+{
+ int i;
+ /* get pointers to arch-specific information */
+ armv4_5_common_t *armv4_5 = target->arch_info;
+ arm7_9_common_t *arm7_9 = armv4_5->arch_info;
+ arm_jtag_t *jtag_info = &arm7_9->jtag_info;
+ int be = (target->endianness == TARGET_BIG_ENDIAN) ? 1 : 0;
+ uint32_t *buf_u32 = buffer;
+ uint16_t *buf_u16 = buffer;
+ uint8_t *buf_u8 = buffer;
+
+ /* STMIA r0-15, [r0] at debug speed
+ * register values will start to appear on 4th DCLK
+ */
+ arm9tdmi_clock_out(jtag_info, ARMV4_5_STMIA(0, mask & 0xffff, 0, 0), 0, NULL, 0);
+
+ /* fetch NOP, STM in DECODE stage */
+ arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, NULL, 0);
+ /* fetch NOP, STM in SHIFT stage */
+ arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, NULL, 0);
+ /* fetch NOP, STM in EXECUTE stage (1st cycle) */
+ arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, NULL, 0);
+
+ for (i = 0; i <= 15; i++)
+ {
+ if (mask & (1 << i))
+ /* nothing fetched, STM in MEMORY (i'th cycle) */
+ switch (size)
+ {
+ case 4:
+ arm9tdmi_clock_data_in_endianness(jtag_info, buf_u32++, 4, be);
+ break;
+ case 2:
+ arm9tdmi_clock_data_in_endianness(jtag_info, buf_u16++, 2, be);
+ break;
+ case 1:
+ arm9tdmi_clock_data_in_endianness(jtag_info, buf_u8++, 1, be);
+ break;
+ }
+ }
+}
+
+void fa526_read_xpsr(target_t *target, uint32_t *xpsr, int spsr)
+{
+ /* get pointers to arch-specific information */
+ armv4_5_common_t *armv4_5 = target->arch_info;
+ arm7_9_common_t *arm7_9 = armv4_5->arch_info;
+ arm_jtag_t *jtag_info = &arm7_9->jtag_info;
+
+ /* MRS r0, cpsr */
+ arm9tdmi_clock_out(jtag_info, ARMV4_5_MRS(0, spsr & 1), 0, NULL, 0);
+ arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, NULL, 0);
+ arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, NULL, 0);
+ arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, NULL, 0);
+ arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, NULL, 0);
+ arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, NULL, 0);
+
+ /* STR r0, [r15] */
+ arm9tdmi_clock_out(jtag_info, ARMV4_5_STR(0, 15), 0, NULL, 0);
+ /* fetch NOP, STR in DECODE stage */
+ arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, NULL, 0);
+ /* fetch NOP, STR in SHIFT stage */
+ arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, NULL, 0);
+ /* fetch NOP, STR in EXECUTE stage (1st cycle) */
+ arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, NULL, 0);
+ /* nothing fetched, STR in MEMORY */
+ arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, xpsr, 0);
+}
+
+void fa526_write_xpsr(target_t *target, uint32_t xpsr, int spsr)
+{
+ /* get pointers to arch-specific information */
+ armv4_5_common_t *armv4_5 = target->arch_info;
+ arm7_9_common_t *arm7_9 = armv4_5->arch_info;
+ arm_jtag_t *jtag_info = &arm7_9->jtag_info;
+
+ LOG_DEBUG("xpsr: %8.8x, spsr: %i", xpsr, spsr);
+
+ /* MSR1 fetched */
+ arm9tdmi_clock_out(jtag_info, ARMV4_5_MSR_IM(xpsr & 0xff, 0, 1, spsr), 0, NULL, 0);
+ /* MSR2 fetched, MSR1 in DECODE */
+ arm9tdmi_clock_out(jtag_info, ARMV4_5_MSR_IM((xpsr & 0xff00) >> 8, 0xc, 2, spsr), 0, NULL, 0);
+ /* MSR3 fetched, MSR1 in SHIFT, MSR2 in DECODE */
+ arm9tdmi_clock_out(jtag_info, ARMV4_5_MSR_IM((xpsr & 0xff0000) >> 16, 0x8, 4, spsr), 0, NULL, 0);
+ /* MSR4 fetched, MSR1 in EXECUTE (1), MSR2 in SHIFT, MSR3 in DECODE */
+ arm9tdmi_clock_out(jtag_info, ARMV4_5_MSR_IM((xpsr & 0xff000000) >> 24, 0x4, 8, spsr), 0, NULL, 0);
+ /* nothing fetched, MSR1 in EXECUTE (2) */
+ arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, NULL, 0);
+ /* nothing fetched, MSR1 in EXECUTE (3) */
+ arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, NULL, 0);
+ /* nothing fetched, MSR2 in EXECUTE (1), MSR3 in SHIFT, MSR4 in DECODE */
+ arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, NULL, 0);
+ /* nothing fetched, MSR2 in EXECUTE (2) */
+ arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, NULL, 0);
+ /* nothing fetched, MSR2 in EXECUTE (3) */
+ arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, NULL, 0);
+ /* NOP fetched, MSR3 in EXECUTE (1), MSR4 in SHIFT */
+ arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, NULL, 0);
+ /* nothing fetched, MSR3 in EXECUTE (2) */
+ arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, NULL, 0);
+ /* nothing fetched, MSR3 in EXECUTE (3) */
+ arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, NULL, 0);
+ /* NOP fetched, MSR4 in EXECUTE (1) */
+ /* last MSR writes flags, which takes only one cycle */
+ arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, NULL, 0);
+}
+
+void fa526_write_xpsr_im8(target_t *target, uint8_t xpsr_im, int rot, int spsr)
+{
+ /* get pointers to arch-specific information */
+ armv4_5_common_t *armv4_5 = target->arch_info;
+ arm7_9_common_t *arm7_9 = armv4_5->arch_info;
+ arm_jtag_t *jtag_info = &arm7_9->jtag_info;
+
+ LOG_DEBUG("xpsr_im: %2.2x, rot: %i, spsr: %i", xpsr_im, rot, spsr);
+
+ /* MSR fetched */
+ arm9tdmi_clock_out(jtag_info, ARMV4_5_MSR_IM(xpsr_im, rot, 1, spsr), 0, NULL, 0);
+ /* NOP fetched, MSR in DECODE */
+ arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, NULL, 0);
+ /* NOP fetched, MSR in SHIFT */
+ arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, NULL, 0);
+ /* NOP fetched, MSR in EXECUTE (1) */
+ arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, NULL, 0);
+
+ /* rot == 4 writes flags, which takes only one cycle */
+ if (rot != 4)
+ {
+ /* nothing fetched, MSR in EXECUTE (2) */
+ arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, NULL, 0);
+ /* nothing fetched, MSR in EXECUTE (3) */
+ arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, NULL, 0);
+ }
+}
+
+void fa526_write_core_regs(target_t *target, uint32_t mask, uint32_t core_regs[16])
+{
+ int i;
+ /* get pointers to arch-specific information */
+ armv4_5_common_t *armv4_5 = target->arch_info;
+ arm7_9_common_t *arm7_9 = armv4_5->arch_info;
+ arm_jtag_t *jtag_info = &arm7_9->jtag_info;
+
+ /* LDMIA r0-15, [r0] at debug speed
+ * register values will start to appear on 4th DCLK
+ */
+ arm9tdmi_clock_out(jtag_info, ARMV4_5_LDMIA(0, mask & 0xffff, 0, 0), 0, NULL, 0);
+
+ /* fetch NOP, LDM in DECODE stage */
+ arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, NULL, 0);
+ /* fetch NOP, LDM in SHIFT stage */
+ arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, NULL, 0);
+ /* fetch NOP, LDM in EXECUTE stage (1st cycle) */
+ arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, NULL, 0);
+
+ for (i = 0; i <= 15; i++)
+ {
+ if (mask & (1 << i))
+ /* nothing fetched, LDM still in EXECUTE (1+i cycle) */
+ arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, core_regs[i], NULL, 0);
+ }
+ arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, NULL, 0);
+}
+
+void fa526_write_pc(target_t *target, uint32_t pc)
+{
+ /* get pointers to arch-specific information */
+ armv4_5_common_t *armv4_5 = target->arch_info;
+ arm7_9_common_t *arm7_9 = armv4_5->arch_info;
+ arm_jtag_t *jtag_info = &arm7_9->jtag_info;
+
+ /* LDMIA r0-15, [r0] at debug speed
+ * register values will start to appear on 4th DCLK
+ */
+ arm9tdmi_clock_out(jtag_info, ARMV4_5_LDMIA(0, 0x8000, 0, 0), 0, NULL, 0);
+
+ /* fetch NOP, LDM in DECODE stage */
+ arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, NULL, 0);
+ /* fetch NOP, LDM in SHIFT stage */
+ arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, NULL, 0);
+ /* fetch NOP, LDM in EXECUTE stage (1st cycle) */
+ arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, NULL, 0);
+ /* nothing fetched, LDM in EXECUTE stage (2nd cycle) (output data) */
+ arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, pc, NULL, 0);
+ /* nothing fetched, LDM in EXECUTE stage (3rd cycle) */
+ arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, NULL, 0);
+ /* fetch NOP, LDM in EXECUTE stage (4th cycle) */
+ arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, NULL, 0);
+ /* fetch NOP, LDM in EXECUTE stage (5th cycle) */
+ arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, NULL, 0);
+}
+
+void fa526_branch_resume_thumb(target_t *target)
+{
+ LOG_ERROR("%s: there is no Thumb state on FA526", __func__);
+}
+
+int fa526_init_arch_info_2(target_t *target, arm9tdmi_common_t *arm9tdmi, jtag_tap_t *tap)
+{
+ armv4_5_common_t *armv4_5;
+ arm7_9_common_t *arm7_9;
+
+ arm7_9 = &arm9tdmi->arm7_9_common;
+ armv4_5 = &arm7_9->armv4_5_common;
+
+ /* prepare JTAG information for the new target */
+ arm7_9->jtag_info.tap = tap;
+ arm7_9->jtag_info.scann_size = 5;
+
+ /* register arch-specific functions */
+ arm7_9->examine_debug_reason = arm9tdmi_examine_debug_reason;
+ arm7_9->change_to_arm = fa526_change_to_arm;
+ arm7_9->read_core_regs = fa526_read_core_regs;
+ arm7_9->read_core_regs_target_buffer = fa526_read_core_regs_target_buffer;
+ arm7_9->read_xpsr = fa526_read_xpsr;
+
+ arm7_9->write_xpsr = fa526_write_xpsr;
+ arm7_9->write_xpsr_im8 = fa526_write_xpsr_im8;
+ arm7_9->write_core_regs = fa526_write_core_regs;
+
+ arm7_9->load_word_regs = arm9tdmi_load_word_regs;
+ arm7_9->load_hword_reg = arm9tdmi_load_hword_reg;
+ arm7_9->load_byte_reg = arm9tdmi_load_byte_reg;
+
+ arm7_9->store_word_regs = arm9tdmi_store_word_regs;
+ arm7_9->store_hword_reg = arm9tdmi_store_hword_reg;
+ arm7_9->store_byte_reg = arm9tdmi_store_byte_reg;
+
+ arm7_9->write_pc = fa526_write_pc;
+ arm7_9->branch_resume = arm9tdmi_branch_resume;
+ arm7_9->branch_resume_thumb = fa526_branch_resume_thumb;
+
+ arm7_9->enable_single_step = arm9tdmi_enable_single_step;
+ arm7_9->disable_single_step = arm9tdmi_disable_single_step;
+
+ arm7_9->pre_debug_entry = NULL;
+ arm7_9->post_debug_entry = NULL;
+
+ arm7_9->pre_restore_context = NULL;
+ arm7_9->post_restore_context = NULL;
+
+ /* initialize arch-specific breakpoint handling */
+ arm7_9->arm_bkpt = 0xdeeedeee;
+ arm7_9->thumb_bkpt = 0xdeee;
+
+ arm7_9->dbgreq_adjust_pc = 3;
+ arm7_9->arch_info = arm9tdmi;
+
+ arm9tdmi->common_magic = ARM9TDMI_COMMON_MAGIC;
+ arm9tdmi->arch_info = NULL;
+
+ arm7_9_init_arch_info(target, arm7_9);
+
+ /* override use of DBGRQ, this is safe on ARM9TDMI */
+ arm7_9->use_dbgrq = 1;
+
+ /* all ARM9s have the vector catch register */
+ arm7_9->has_vector_catch = 1;
+
+ return ERROR_OK;
+}
+
+int fa526_init_arch_info(target_t *target, arm920t_common_t *arm920t, jtag_tap_t *tap)
+{
+ arm9tdmi_common_t *arm9tdmi = &arm920t->arm9tdmi_common;
+ arm7_9_common_t *arm7_9 = &arm9tdmi->arm7_9_common;
+
+ /* initialize arm9tdmi specific info (including arm7_9 and armv4_5)
+ */
+ fa526_init_arch_info_2(target, arm9tdmi, tap);
+
+ arm9tdmi->arch_info = arm920t;
+ arm920t->common_magic = ARM920T_COMMON_MAGIC;
+
+ arm7_9->post_debug_entry = arm920t_post_debug_entry;
+ arm7_9->pre_restore_context = arm920t_pre_restore_context;
+
+ arm920t->armv4_5_mmu.armv4_5_cache.ctype = -1;
+ arm920t->armv4_5_mmu.get_ttb = arm920t_get_ttb;
+ arm920t->armv4_5_mmu.read_memory = arm7_9_read_memory;
+ arm920t->armv4_5_mmu.write_memory = arm7_9_write_memory;
+ arm920t->armv4_5_mmu.disable_mmu_caches = arm920t_disable_mmu_caches;
+ arm920t->armv4_5_mmu.enable_mmu_caches = arm920t_enable_mmu_caches;
+ arm920t->armv4_5_mmu.has_tiny_pages = 1;
+ arm920t->armv4_5_mmu.mmu_enabled = 0;
+
+ /* disabling linefills leads to lockups, so keep them enabled for now
+ * this doesn't affect correctness, but might affect timing issues, if
+ * important data is evicted from the cache during the debug session
+ * */
+ arm920t->preserve_cache = 0;
+
+ /* override hw single-step capability from ARM9TDMI */
+ arm7_9->has_single_step = 1;
+
+ return ERROR_OK;
+}
+
+int fa526_target_create(struct target_s *target, Jim_Interp *interp)
+{
+ arm920t_common_t *arm920t = calloc(1,sizeof(arm920t_common_t));
+
+ fa526_init_arch_info(target, arm920t, target->tap);
+
+ return ERROR_OK;
+}
+
+int fa526_init_target(struct command_context_s *cmd_ctx, struct target_s *target)
+{
+ arm9tdmi_init_target(cmd_ctx, target);
+ return ERROR_OK;
+}
+
+int fa526_quit(void)
+{
+ return ERROR_OK;
+}
Property changes on: trunk/src/target/fa526.c
___________________________________________________________________
Name: svn:eol-style
+ native
Modified: trunk/src/target/target.c
===================================================================
--- trunk/src/target/target.c 2009-06-19 09:09:25 UTC (rev 2291)
+++ trunk/src/target/target.c 2009-06-19 22:39:35 UTC (rev 2292)
@@ -82,6 +82,7 @@
extern target_type_t arm920t_target;
extern target_type_t arm966e_target;
extern target_type_t arm926ejs_target;
+extern target_type_t fa526_target;
extern target_type_t feroceon_target;
extern target_type_t xscale_target;
extern target_type_t cortexm3_target;
@@ -98,6 +99,7 @@
&arm720t_target,
&arm966e_target,
&arm926ejs_target,
+ &fa526_target,
&feroceon_target,
&xscale_target,
&cortexm3_target,
|
|
From: oharboe at B. <oh...@ma...> - 2009-06-19 11:09:26
|
Author: oharboe
Date: 2009-06-19 11:09:25 +0200 (Fri, 19 Jun 2009)
New Revision: 2291
Modified:
trunk/src/ecosboard.c
Log:
less warnings
Modified: trunk/src/ecosboard.c
===================================================================
--- trunk/src/ecosboard.c 2009-06-19 08:18:36 UTC (rev 2290)
+++ trunk/src/ecosboard.c 2009-06-19 09:09:25 UTC (rev 2291)
@@ -148,7 +148,6 @@
}
#endif
-extern int eth0_up;
static FILE *log;
static char reboot_stack[2048];
@@ -305,7 +304,7 @@
err = cyg_io_get_config(handle, CYG_IO_GET_CONFIG_FLASH_ERASE, &e, &len);
if (err != ENOERR)
{
- diag_printf("Flash erase error %d offset 0x%p\n", err, e.err_address);
+ diag_printf("Flash erase error %d offset 0x%08x\n", err, e.err_address);
reboot();
}
|
|
From: oharboe at B. <oh...@ma...> - 2009-06-19 10:18:37
|
Author: oharboe
Date: 2009-06-19 10:18:36 +0200 (Fri, 19 Jun 2009)
New Revision: 2290
Modified:
trunk/src/jtag/core.c
trunk/src/jtag/driver.c
trunk/src/jtag/jtag.h
trunk/src/jtag/minidriver.h
trunk/src/pld/virtex2.c
trunk/src/target/arm720t.c
trunk/src/target/arm7tdmi.c
trunk/src/target/arm920t.c
trunk/src/target/arm926ejs.c
trunk/src/target/arm966e.c
trunk/src/target/arm9tdmi.c
trunk/src/target/arm_adi_v5.c
trunk/src/target/arm_jtag.h
trunk/src/target/embeddedice.c
trunk/src/target/etb.c
trunk/src/target/xscale.c
Log:
fix jtag_add_callback() args. The first argument is nothing special, it's just another generic argument.
Modified: trunk/src/jtag/core.c
===================================================================
--- trunk/src/jtag/core.c 2009-06-19 06:05:46 UTC (rev 2289)
+++ trunk/src/jtag/core.c 2009-06-19 08:18:36 UTC (rev 2290)
@@ -353,23 +353,23 @@
jtag_set_error(retval);
}
-void jtag_add_callback(jtag_callback1_t f, uint8_t *in)
+void jtag_add_callback(jtag_callback1_t f, jtag_callback_data_t data0)
{
- interface_jtag_add_callback(f, in);
+ interface_jtag_add_callback(f, data0);
}
-void jtag_add_callback4(jtag_callback_t f, uint8_t *in,
+void jtag_add_callback4(jtag_callback_t f, jtag_callback_data_t data0,
jtag_callback_data_t data1, jtag_callback_data_t data2,
jtag_callback_data_t data3)
{
- interface_jtag_add_callback4(f, in, data1, data2, data3);
+ interface_jtag_add_callback4(f, data0, data1, data2, data3);
}
int jtag_check_value_inner(uint8_t *captured, uint8_t *in_check_value, uint8_t *in_check_mask, int num_bits);
-static int jtag_check_value_mask_callback(uint8_t *in, jtag_callback_data_t data1, jtag_callback_data_t data2, jtag_callback_data_t data3)
+static int jtag_check_value_mask_callback(jtag_callback_data_t data0, jtag_callback_data_t data1, jtag_callback_data_t data2, jtag_callback_data_t data3)
{
- return jtag_check_value_inner(in, (uint8_t *)data1, (uint8_t *)data2, (int)data3);
+ return jtag_check_value_inner((uint8_t *)data0, (uint8_t *)data1, (uint8_t *)data2, (int)data3);
}
static void jtag_add_scan_check(void (*jtag_add_scan)(int in_num_fields, const scan_field_t *in_fields, tap_state_t state),
@@ -393,7 +393,7 @@
if ((in_fields[i].check_value != NULL) && (in_fields[i].in_value != NULL))
{
/* this is synchronous for a minidriver */
- jtag_add_callback4(jtag_check_value_mask_callback, in_fields[i].in_value,
+ jtag_add_callback4(jtag_check_value_mask_callback, (jtag_callback_data_t)in_fields[i].in_value,
(jtag_callback_data_t)in_fields[i].check_value,
(jtag_callback_data_t)in_fields[i].check_mask,
(jtag_callback_data_t)in_fields[i].num_bits);
Modified: trunk/src/jtag/driver.c
===================================================================
--- trunk/src/jtag/driver.c 2009-06-19 06:05:46 UTC (rev 2289)
+++ trunk/src/jtag/driver.c 2009-06-19 08:18:36 UTC (rev 2290)
@@ -40,7 +40,7 @@
struct jtag_callback_entry *next;
jtag_callback_t callback;
- uint8_t *in;
+ jtag_callback_data_t data0;
jtag_callback_data_t data1;
jtag_callback_data_t data2;
jtag_callback_data_t data3;
@@ -465,13 +465,13 @@
}
/* add callback to end of queue */
-void interface_jtag_add_callback4(jtag_callback_t callback, uint8_t *in, jtag_callback_data_t data1, jtag_callback_data_t data2, jtag_callback_data_t data3)
+void interface_jtag_add_callback4(jtag_callback_t callback, jtag_callback_data_t data0, jtag_callback_data_t data1, jtag_callback_data_t data2, jtag_callback_data_t data3)
{
struct jtag_callback_entry *entry=cmd_queue_alloc(sizeof(struct jtag_callback_entry));
entry->next=NULL;
entry->callback=callback;
- entry->in=in;
+ entry->data0=data0;
entry->data1=data1;
entry->data2=data2;
entry->data3=data3;
@@ -495,7 +495,7 @@
struct jtag_callback_entry *entry;
for (entry=jtag_callback_queue_head; entry!=NULL; entry=entry->next)
{
- retval=entry->callback(entry->in, entry->data1, entry->data2, entry->data3);
+ retval=entry->callback(entry->data0, entry->data1, entry->data2, entry->data3);
if (retval!=ERROR_OK)
break;
}
@@ -507,14 +507,14 @@
return retval;
}
-static int jtag_convert_to_callback4(uint8_t *in, jtag_callback_data_t data1, jtag_callback_data_t data2, jtag_callback_data_t data3)
+static int jtag_convert_to_callback4(jtag_callback_data_t data0, jtag_callback_data_t data1, jtag_callback_data_t data2, jtag_callback_data_t data3)
{
- ((jtag_callback1_t)data1)(in);
+ ((jtag_callback1_t)data1)(data0);
return ERROR_OK;
}
-void interface_jtag_add_callback(jtag_callback1_t callback, uint8_t *in)
+void interface_jtag_add_callback(jtag_callback1_t callback, jtag_callback_data_t data0)
{
- jtag_add_callback4(jtag_convert_to_callback4, in, (jtag_callback_data_t)callback, 0, 0);
+ jtag_add_callback4(jtag_convert_to_callback4, data0, (jtag_callback_data_t)callback, 0, 0);
}
Modified: trunk/src/jtag/jtag.h
===================================================================
--- trunk/src/jtag/jtag.h 2009-06-19 06:05:46 UTC (rev 2289)
+++ trunk/src/jtag/jtag.h 2009-06-19 08:18:36 UTC (rev 2290)
@@ -384,6 +384,11 @@
*/
extern void jtag_add_plain_dr_scan(int num_fields, const scan_field_t* fields, tap_state_t endstate);
+/**
+ * Defines the type of data passed to the jtag_callback_t interface.
+ * The underlying type must allow storing an @c int or pointer type.
+ */
+typedef intptr_t jtag_callback_data_t;
/**
* Defines a simple JTAG callback that can allow conversions on data
@@ -393,17 +398,12 @@
* For conversion types or checks that can fail, use the more complete
* variant: jtag_callback_t.
*/
-typedef void (*jtag_callback1_t)(uint8_t *in);
+typedef void (*jtag_callback1_t)(jtag_callback_data_t data0);
/// A simpler version of jtag_add_callback4().
-extern void jtag_add_callback(jtag_callback1_t, uint8_t *in);
+extern void jtag_add_callback(jtag_callback1_t, jtag_callback_data_t data0);
-/**
- * Defines the type of data passed to the jtag_callback_t interface.
- * The underlying type must allow storing an @c int or pointer type.
- */
-typedef intptr_t jtag_callback_data_t;
/**
* Defines the interface of the JTAG callback mechanism.
@@ -414,7 +414,7 @@
* @param data3 An integer big enough to use as an @c int or a pointer.
* @returns an error code
*/
-typedef int (*jtag_callback_t)(uint8_t *in, jtag_callback_data_t data1, jtag_callback_data_t data2, jtag_callback_data_t data3);
+typedef int (*jtag_callback_t)(jtag_callback_data_t data0, jtag_callback_data_t data1, jtag_callback_data_t data2, jtag_callback_data_t data3);
/**
@@ -445,7 +445,7 @@
* @param data3 An integer big enough to use as an @c int or a pointer.
*
*/
-extern void jtag_add_callback4(jtag_callback_t f, uint8_t *in,
+extern void jtag_add_callback4(jtag_callback_t f, jtag_callback_data_t data0,
jtag_callback_data_t data1, jtag_callback_data_t data2,
jtag_callback_data_t data3);
Modified: trunk/src/jtag/minidriver.h
===================================================================
--- trunk/src/jtag/minidriver.h 2009-06-19 06:05:46 UTC (rev 2289)
+++ trunk/src/jtag/minidriver.h 2009-06-19 08:18:36 UTC (rev 2290)
@@ -85,9 +85,9 @@
int num_fields, const int* num_bits, const uint32_t* value,
tap_state_t end_state);
-extern void interface_jtag_add_callback(jtag_callback1_t f, uint8_t *in);
+extern void interface_jtag_add_callback(jtag_callback1_t f, jtag_callback_data_t data0);
-extern void interface_jtag_add_callback4(jtag_callback_t f, uint8_t *in,
+extern void interface_jtag_add_callback4(jtag_callback_t f, jtag_callback_data_t data0,
jtag_callback_data_t data1, jtag_callback_data_t data2,
jtag_callback_data_t data3);
Modified: trunk/src/pld/virtex2.c
===================================================================
--- trunk/src/pld/virtex2.c 2009-06-19 06:05:46 UTC (rev 2289)
+++ trunk/src/pld/virtex2.c 2009-06-19 08:18:36 UTC (rev 2290)
@@ -88,8 +88,9 @@
return ERROR_OK;
}
-static __inline__ void virtexflip32(uint8_t *in)
+static __inline__ void virtexflip32(jtag_callback_data_t arg)
{
+ uint8_t *in=(uint8_t *)arg;
*((uint32_t *)in) = flip_u32(le_to_h_u32(in), 32);
}
@@ -112,7 +113,7 @@
jtag_add_dr_scan(1, &scan_field, jtag_set_end_state(TAP_DRPAUSE));
- jtag_add_callback(virtexflip32, (uint8_t *)words);
+ jtag_add_callback(virtexflip32, (jtag_callback_data_t)words);
words++;;
}
Modified: trunk/src/target/arm720t.c
===================================================================
--- trunk/src/target/arm720t.c 2009-06-19 06:05:46 UTC (rev 2289)
+++ trunk/src/target/arm720t.c 2009-06-19 08:18:36 UTC (rev 2290)
@@ -120,7 +120,7 @@
{
fields[1].in_value = (uint8_t *)in;
jtag_add_dr_scan(2, fields, jtag_get_end_state());
- jtag_add_callback(arm7flip32, (uint8_t *)in);
+ jtag_add_callback(arm7flip32, (jtag_callback_data_t)in);
} else
{
jtag_add_dr_scan(2, fields, jtag_get_end_state());
Modified: trunk/src/target/arm7tdmi.c
===================================================================
--- trunk/src/target/arm7tdmi.c 2009-06-19 06:05:46 UTC (rev 2289)
+++ trunk/src/target/arm7tdmi.c 2009-06-19 08:18:36 UTC (rev 2290)
@@ -189,7 +189,7 @@
jtag_add_dr_scan(2, fields, jtag_get_end_state());
- jtag_add_callback(arm7flip32, (uint8_t *)in);
+ jtag_add_callback(arm7flip32, (jtag_callback_data_t)in);
jtag_add_runtest(0, jtag_get_end_state());
@@ -245,8 +245,9 @@
}
}
-static int arm7endianness(uint8_t *in, jtag_callback_data_t size, jtag_callback_data_t be, jtag_callback_data_t captured)
+static int arm7endianness(jtag_callback_data_t arg, jtag_callback_data_t size, jtag_callback_data_t be, jtag_callback_data_t captured)
{
+ uint8_t *in=(uint8_t *)arg;
arm_endianness((uint8_t *)captured, in, (int)size, (int)be, 1);
return ERROR_OK;
}
@@ -279,7 +280,7 @@
jtag_add_dr_scan(2, fields, jtag_get_end_state());
- jtag_add_callback4(arm7endianness, in, (jtag_callback_data_t)size, (jtag_callback_data_t)be, (jtag_callback_data_t)fields[1].in_value);
+ jtag_add_callback4(arm7endianness, (jtag_callback_data_t)in, (jtag_callback_data_t)size, (jtag_callback_data_t)be, (jtag_callback_data_t)fields[1].in_value);
jtag_add_runtest(0, jtag_get_end_state());
Modified: trunk/src/target/arm920t.c
===================================================================
--- trunk/src/target/arm920t.c 2009-06-19 06:05:46 UTC (rev 2289)
+++ trunk/src/target/arm920t.c 2009-06-19 08:18:36 UTC (rev 2290)
@@ -133,7 +133,7 @@
jtag_add_dr_scan(4, fields, jtag_get_end_state());
- jtag_add_callback(arm_le_to_h_u32, (uint8_t *)value);
+ jtag_add_callback(arm_le_to_h_u32, (jtag_callback_data_t)value);
#ifdef _DEBUG_INSTRUCTION_EXECUTION_
jtag_execute_queue();
Modified: trunk/src/target/arm926ejs.c
===================================================================
--- trunk/src/target/arm926ejs.c 2009-06-19 06:05:46 UTC (rev 2289)
+++ trunk/src/target/arm926ejs.c 2009-06-19 08:18:36 UTC (rev 2290)
@@ -167,7 +167,7 @@
nr_w_buf = 0;
jtag_add_dr_scan(4, fields, jtag_get_end_state());
- jtag_add_callback(arm_le_to_h_u32, (uint8_t *)value);
+ jtag_add_callback(arm_le_to_h_u32, (jtag_callback_data_t)value);
if ((retval = jtag_execute_queue()) != ERROR_OK)
{
Modified: trunk/src/target/arm966e.c
===================================================================
--- trunk/src/target/arm966e.c 2009-06-19 06:05:46 UTC (rev 2289)
+++ trunk/src/target/arm966e.c 2009-06-19 08:18:36 UTC (rev 2290)
@@ -195,7 +195,7 @@
jtag_add_dr_scan(3, fields, jtag_get_end_state());
- jtag_add_callback(arm_le_to_h_u32, (uint8_t *)value);
+ jtag_add_callback(arm_le_to_h_u32, (jtag_callback_data_t)value);
#ifdef _DEBUG_INSTRUCTION_EXECUTION_
Modified: trunk/src/target/arm9tdmi.c
===================================================================
--- trunk/src/target/arm9tdmi.c 2009-06-19 06:05:46 UTC (rev 2289)
+++ trunk/src/target/arm9tdmi.c 2009-06-19 08:18:36 UTC (rev 2290)
@@ -206,7 +206,7 @@
fields[0].in_value=(uint8_t *)in;
jtag_add_dr_scan(3, fields, jtag_get_end_state());
- jtag_add_callback(arm_le_to_h_u32, (uint8_t *)in);
+ jtag_add_callback(arm_le_to_h_u32, (jtag_callback_data_t)in);
}
else
{
@@ -265,7 +265,7 @@
jtag_add_dr_scan(3, fields, jtag_get_end_state());
- jtag_add_callback(arm_le_to_h_u32, (uint8_t *)in);
+ jtag_add_callback(arm_le_to_h_u32, (jtag_callback_data_t)in);
jtag_add_runtest(0, jtag_get_end_state());
@@ -292,8 +292,9 @@
extern void arm_endianness(uint8_t *tmp, void *in, int size, int be, int flip);
-static int arm9endianness(uint8_t *in, jtag_callback_data_t size, jtag_callback_data_t be, jtag_callback_data_t captured)
+static int arm9endianness(jtag_callback_data_t arg, jtag_callback_data_t size, jtag_callback_data_t be, jtag_callback_data_t captured)
{
+ uint8_t *in=(uint8_t *)arg;
arm_endianness((uint8_t *)captured, in, (int)size, (int)be, 0);
return ERROR_OK;
}
@@ -332,7 +333,7 @@
jtag_add_dr_scan(3, fields, jtag_get_end_state());
- jtag_add_callback4(arm9endianness, in, (jtag_callback_data_t)size, (jtag_callback_data_t)be, (jtag_callback_data_t)fields[0].in_value);
+ jtag_add_callback4(arm9endianness, (jtag_callback_data_t)in, (jtag_callback_data_t)size, (jtag_callback_data_t)be, (jtag_callback_data_t)fields[0].in_value);
jtag_add_runtest(0, jtag_get_end_state());
Modified: trunk/src/target/arm_adi_v5.c
===================================================================
--- trunk/src/target/arm_adi_v5.c 2009-06-19 06:05:46 UTC (rev 2289)
+++ trunk/src/target/arm_adi_v5.c 2009-06-19 08:18:36 UTC (rev 2290)
@@ -132,7 +132,7 @@
fields[1].in_value = (uint8_t *)invalue;
jtag_add_dr_scan(2, fields, jtag_get_end_state());
- jtag_add_callback(arm_le_to_h_u32, (uint8_t *)invalue);
+ jtag_add_callback(arm_le_to_h_u32, (jtag_callback_data_t) invalue);
} else
{
Modified: trunk/src/target/arm_jtag.h
===================================================================
--- trunk/src/target/arm_jtag.h 2009-06-19 06:05:46 UTC (rev 2289)
+++ trunk/src/target/arm_jtag.h 2009-06-19 08:18:36 UTC (rev 2290)
@@ -58,14 +58,16 @@
/* use this as a static so we can inline it in -O3 and refer to it via a pointer */
-static __inline__ void arm7flip32(uint8_t *in)
+static __inline__ void arm7flip32(jtag_callback_data_t arg)
{
- *((uint32_t *)in)=flip_u32(le_to_h_u32(in), 32);
+ uint8_t *in=(uint8_t *)arg;
+ *((uint32_t *)in)=flip_u32(le_to_h_u32(in), 32);
}
-static __inline__ void arm_le_to_h_u32(uint8_t *in)
+static __inline__ void arm_le_to_h_u32(jtag_callback_data_t arg)
{
- *((uint32_t *)in)=le_to_h_u32(in);
+ uint8_t *in=(uint8_t *)arg;
+ *((uint32_t *)in)=le_to_h_u32(in);
}
Modified: trunk/src/target/embeddedice.c
===================================================================
--- trunk/src/target/embeddedice.c 2009-06-19 06:05:46 UTC (rev 2289)
+++ trunk/src/target/embeddedice.c 2009-06-19 08:18:36 UTC (rev 2290)
@@ -326,7 +326,7 @@
fields[0].in_value = (uint8_t *)data;
jtag_add_dr_scan(3, fields, jtag_get_end_state());
- jtag_add_callback(arm_le_to_h_u32, (uint8_t *)data);
+ jtag_add_callback(arm_le_to_h_u32, (jtag_callback_data_t)data);
data++;
size--;
Modified: trunk/src/target/etb.c
===================================================================
--- trunk/src/target/etb.c 2009-06-19 06:05:46 UTC (rev 2289)
+++ trunk/src/target/etb.c 2009-06-19 08:18:36 UTC (rev 2290)
@@ -158,8 +158,9 @@
}
-static void etb_getbuf(uint8_t *in)
+static void etb_getbuf(jtag_callback_data_t arg)
{
+ uint8_t *in=(uint8_t *)arg;
*((uint32_t *)in)=buf_get_u32(in, 0, 32);
}
@@ -206,7 +207,7 @@
fields[0].in_value = (uint8_t *)(data+i);
jtag_add_dr_scan(3, fields, jtag_get_end_state());
- jtag_add_callback(etb_getbuf, (uint8_t *)(data+i));
+ jtag_add_callback(etb_getbuf, (jtag_callback_data_t)(data+i));
}
jtag_execute_queue();
Modified: trunk/src/target/xscale.c
===================================================================
--- trunk/src/target/xscale.c 2009-06-19 06:05:46 UTC (rev 2289)
+++ trunk/src/target/xscale.c 2009-06-19 08:18:36 UTC (rev 2290)
@@ -293,8 +293,9 @@
}
-static void xscale_getbuf(uint8_t *in)
+static void xscale_getbuf(jtag_callback_data_t arg)
{
+ uint8_t *in=(uint8_t *)arg;
*((uint32_t *)in)=buf_get_u32(in, 0, 32);
}
@@ -365,7 +366,7 @@
jtag_add_dr_scan_check(3, fields, jtag_set_end_state(TAP_IDLE));
- jtag_add_callback(xscale_getbuf, (uint8_t *)(field1+i));
+ jtag_add_callback(xscale_getbuf, (jtag_callback_data_t)(field1+i));
words_scheduled++;
}
|
|
From: <du...@ma...> - 2009-06-19 08:05:54
|
Author: duane Date: 2009-06-19 08:05:46 +0200 (Fri, 19 Jun 2009) New Revision: 2289 Modified: trunk/README Log: commit test from Duane Modified: trunk/README =================================================================== --- trunk/README 2009-06-18 13:40:38 UTC (rev 2288) +++ trunk/README 2009-06-19 06:05:46 UTC (rev 2289) @@ -1,2 +1,3 @@ openocd.texi is the authoritative source of OpenOCD documentation + |
|
From: oharboe at B. <oh...@ma...> - 2009-06-18 15:40:39
|
Author: oharboe
Date: 2009-06-18 15:40:38 +0200 (Thu, 18 Jun 2009)
New Revision: 2288
Modified:
trunk/src/jtag/zy1000/zy1000.c
Log:
less warnings
Modified: trunk/src/jtag/zy1000/zy1000.c
===================================================================
--- trunk/src/jtag/zy1000/zy1000.c 2009-06-18 13:35:18 UTC (rev 2287)
+++ trunk/src/jtag/zy1000/zy1000.c 2009-06-18 13:40:38 UTC (rev 2288)
@@ -36,8 +36,6 @@
/* low level command set
*/
-int zy1000_read(void);
-static void zy1000_write(int tck, int tms, int tdi);
void zy1000_reset(int trst, int srst);
@@ -126,18 +124,6 @@
.srst_asserted = zy1000_srst_asserted,
};
-static void zy1000_write(int tck, int tms, int tdi)
-{
-
-}
-
-int zy1000_read(void)
-{
- return -1;
-}
-
-extern bool readSRST(void);
-
void zy1000_reset(int trst, int srst)
{
LOG_DEBUG("zy1000 trst=%d, srst=%d", trst, srst);
@@ -426,7 +412,7 @@
extern int jtag_check_value(uint8_t *captured, void *priv);
-static __inline void scanFields(int num_fields, scan_field_t *fields, tap_state_t shiftState, tap_state_t end_state)
+static __inline void scanFields(int num_fields, const scan_field_t *fields, tap_state_t shiftState, tap_state_t end_state)
{
int i;
int j;
@@ -436,8 +422,6 @@
{
cyg_uint32 value;
- static uint8_t *in_buff=NULL; /* pointer to buffer for scanned data */
- static int in_buff_size=0;
uint8_t *inBuffer=NULL;
|
|
From: oharboe at B. <oh...@ma...> - 2009-06-18 15:35:20
|
Author: oharboe
Date: 2009-06-18 15:35:18 +0200 (Thu, 18 Jun 2009)
New Revision: 2287
Modified:
trunk/src/ecosboard.c
Log:
less warnings
Modified: trunk/src/ecosboard.c
===================================================================
--- trunk/src/ecosboard.c 2009-06-18 10:42:40 UTC (rev 2286)
+++ trunk/src/ecosboard.c 2009-06-18 13:35:18 UTC (rev 2287)
@@ -296,18 +296,16 @@
}
cyg_io_flash_getconfig_erase_t e;
- void *err_addr;
len = sizeof(e);
e.offset = 0;
e.len = ds.dev_size;
- e.err_address = &err_addr;
diag_printf("Formatting 0x%08x bytes\n", (int)ds.dev_size);
err = cyg_io_get_config(handle, CYG_IO_GET_CONFIG_FLASH_ERASE, &e, &len);
if (err != ENOERR)
{
- diag_printf("Flash erase error %d offset 0x%p\n", err, err_addr);
+ diag_printf("Flash erase error %d offset 0x%p\n", err, e.err_address);
reboot();
}
@@ -633,9 +631,9 @@
#ifdef CYGPKG_PROFILE_GPROF
start_profile();
#endif
- int actual = 0;
- int actual2 = 0;
- int pos, pos2;
+ size_t actual = 0;
+ size_t actual2 = 0;
+ size_t pos, pos2;
pos = 0;
pos2 = 0;
cur = 0;
@@ -668,9 +666,11 @@
if (actual2 <= 0)
{
memset(backwardBuffer, 's', sizeof(backwardBuffer));
- actual2 = read(serHandle, backwardBuffer,
+ int t;
+ t = read(serHandle, backwardBuffer,
sizeof(backwardBuffer));
- if (actual2 < 0)
+ actual2 = t;
+ if (t < 0)
{
if (errno != EAGAIN)
{
@@ -681,8 +681,8 @@
pos2 = 0;
}
- int x = actual2;
- int y = 0;
+ size_t x = actual2;
+ size_t y = 0;
if (actual2 > 0)
{
int written = write(session, backwardBuffer + pos2, actual2);
|
|
From: <zw...@ma...> - 2009-06-18 12:42:49
|
Author: zwelch Date: 2009-06-18 12:42:40 +0200 (Thu, 18 Jun 2009) New Revision: 2286 Modified: trunk/src/helper/types.h Log: Oyvind Harboe <oyv...@zy...>: Ecos uses sys/types.h not stdint.h. Modified: trunk/src/helper/types.h =================================================================== --- trunk/src/helper/types.h 2009-06-18 10:40:33 UTC (rev 2285) +++ trunk/src/helper/types.h 2009-06-18 10:42:40 UTC (rev 2286) @@ -26,7 +26,9 @@ #ifdef HAVE_SYS_TYPES_H #include <sys/types.h> #endif +#ifdef HAVE_STDINT_H #include <stdint.h> +#endif typedef struct jtag_tap_s jtag_tap_t; |
|
From: <zw...@ma...> - 2009-06-18 12:40:38
|
Author: zwelch
Date: 2009-06-18 12:40:33 +0200 (Thu, 18 Jun 2009)
New Revision: 2285
Modified:
trunk/src/target/trace.c
Log:
Cast 64-bit trace hit_counter to long long; fixes format warning.
What is the correct way to handle this?
Modified: trunk/src/target/trace.c
===================================================================
--- trunk/src/target/trace.c 2009-06-18 07:11:55 UTC (rev 2284)
+++ trunk/src/target/trace.c 2009-06-18 10:40:33 UTC (rev 2285)
@@ -60,7 +60,7 @@
{
command_print(cmd_ctx, "trace point 0x%8.8x (%lld times hit)",
trace->trace_points[i].address,
- trace->trace_points[i].hit_counter);
+ (long long)trace->trace_points[i].hit_counter);
}
return ERROR_OK;
|
|
From: <zw...@ma...> - 2009-06-18 09:11:59
|
Author: zwelch Date: 2009-06-18 09:11:55 +0200 (Thu, 18 Jun 2009) New Revision: 2284 Modified: trunk/doc/manual/style.txt Log: Update Style Guide documentation to explain basic type rules. Modified: trunk/doc/manual/style.txt =================================================================== --- trunk/doc/manual/style.txt 2009-06-18 07:11:48 UTC (rev 2283) +++ trunk/doc/manual/style.txt 2009-06-18 07:11:55 UTC (rev 2284) @@ -80,6 +80,13 @@ - variables declarations may be mixed with code - new block scopes for selection and iteration statements +@section styletypes Type Guidelines +- use native types (@c int or @c unsigned) if the type is not important + - if size matters, use the types from \<stdint.h\> or \<inttypes.h\>: + - @c int8_t, @c int16_t, @c int32_t, or @c int64_t: signed types of specified size + - @c uint8_t, @c uint16_t, @c uint32_t, or @c uint64_t: unsigned types of specified size + - do @b NOT redefine @c uN types from "types.h" + @section stylefunc Functions - static inline functions should be prefered over macros: |
|
From: <zw...@ma...> - 2009-06-18 09:11:52
|
Author: zwelch Date: 2009-06-18 09:11:48 +0200 (Thu, 18 Jun 2009) New Revision: 2283 Modified: trunk/src/helper/types.h Log: Remove redundant typedefs in types.h; include stdint.h unconditionally. Modified: trunk/src/helper/types.h =================================================================== --- trunk/src/helper/types.h 2009-06-18 07:11:40 UTC (rev 2282) +++ trunk/src/helper/types.h 2009-06-18 07:11:48 UTC (rev 2283) @@ -26,26 +26,8 @@ #ifdef HAVE_SYS_TYPES_H #include <sys/types.h> #endif -#ifdef HAVE_STDINT_H #include <stdint.h> -#endif -#ifndef uint8_t -typedef unsigned char uint8_t; -#endif - -#ifndef uint16_t -typedef unsigned short uint16_t; -#endif - -#ifndef uint32_t -typedef unsigned int uint32_t; -#endif - -#ifndef uint64_t -typedef unsigned long long uint64_t; -#endif - typedef struct jtag_tap_s jtag_tap_t; #ifdef HAVE_STDBOOL_H |
|
From: <zw...@ma...> - 2009-06-18 09:11:45
|
Author: zwelch
Date: 2009-06-18 09:11:40 +0200 (Thu, 18 Jun 2009)
New Revision: 2282
Modified:
trunk/src/helper/types.h
trunk/src/target/trace.h
Log:
Transform 'u64' to 'uint64_t'
- Replace '\([^_]\)u64' with '\1uint64_t'.
Modified: trunk/src/helper/types.h
===================================================================
--- trunk/src/helper/types.h 2009-06-18 07:11:11 UTC (rev 2281)
+++ trunk/src/helper/types.h 2009-06-18 07:11:40 UTC (rev 2282)
@@ -42,8 +42,8 @@
typedef unsigned int uint32_t;
#endif
-#ifndef u64
-typedef unsigned long long u64;
+#ifndef uint64_t
+typedef unsigned long long uint64_t;
#endif
typedef struct jtag_tap_s jtag_tap_t;
Modified: trunk/src/target/trace.h
===================================================================
--- trunk/src/target/trace.h 2009-06-18 07:11:11 UTC (rev 2281)
+++ trunk/src/target/trace.h 2009-06-18 07:11:40 UTC (rev 2282)
@@ -28,7 +28,7 @@
typedef struct trace_point_s
{
uint32_t address;
- u64 hit_counter;
+ uint64_t hit_counter;
} trace_point_t;
typedef struct trace_s
|
|
From: <zw...@ma...> - 2009-06-18 09:11:37
|
Author: zwelch
Date: 2009-06-18 09:11:11 +0200 (Thu, 18 Jun 2009)
New Revision: 2281
Modified:
trunk/src/helper/binarybuffer.c
trunk/src/helper/binarybuffer.h
trunk/src/helper/fileio.c
trunk/src/helper/fileio.h
trunk/src/helper/types.h
trunk/src/jtag/at91rm9200.c
trunk/src/jtag/commands.h
trunk/src/jtag/core.c
trunk/src/jtag/driver.c
trunk/src/jtag/dummy.c
trunk/src/jtag/ep93xx.c
trunk/src/jtag/ft2232.c
trunk/src/jtag/jlink.c
trunk/src/jtag/jtag.h
trunk/src/jtag/minidriver.h
trunk/src/jtag/minidummy/jtag_minidriver.h
trunk/src/jtag/minidummy/minidummy.c
trunk/src/jtag/presto.c
trunk/src/jtag/rlink/rlink.c
trunk/src/jtag/tcl.c
trunk/src/jtag/zy1000/jtag_minidriver.h
trunk/src/jtag/zy1000/zy1000.c
trunk/src/pld/virtex2.c
trunk/src/pld/xilinx_bit.c
trunk/src/pld/xilinx_bit.h
trunk/src/server/gdb_server.c
trunk/src/svf/svf.c
trunk/src/xsvf/xsvf.c
Log:
Finish transforming 'u32' to 'uint32_t'.
- Replace '\([^_]\)u32' with '\1uint32_t'.
- Replace '^u32' with 'uint32_t'.
Modified: trunk/src/helper/binarybuffer.c
===================================================================
--- trunk/src/helper/binarybuffer.c 2009-06-18 07:10:25 UTC (rev 2280)
+++ trunk/src/helper/binarybuffer.c 2009-06-18 07:11:11 UTC (rev 2281)
@@ -156,9 +156,9 @@
return dst;
}
-u32 flip_u32(u32 value, unsigned int num)
+uint32_t flip_u32(uint32_t value, unsigned int num)
{
- u32 c;
+ uint32_t c;
c = (bit_reverse_table256[value & 0xff] << 24) |
(bit_reverse_table256[(value >> 8) & 0xff] << 16) |
@@ -173,7 +173,7 @@
int ceil_f_to_u32(float x)
{
- u32 y;
+ uint32_t y;
if (x < 0) /* return zero for negative numbers */
return 0;
@@ -193,7 +193,7 @@
char *str;
int str_len;
int b256_len = CEIL(buf_len, 8);
- u32 tmp;
+ uint32_t tmp;
int j; /* base-256 digits */
int i; /* output digits (radix) */
@@ -224,7 +224,7 @@
for (j = str_len; j > 0; j--)
{
- tmp += (u32)str[j-1] * 256;
+ tmp += (uint32_t)str[j-1] * 256;
str[j-1] = (uint8_t)(tmp % radix);
tmp /= radix;
}
@@ -239,7 +239,7 @@
int str_to_buf(const char *str, int str_len, uint8_t *buf, int buf_len, int radix)
{
char *charbuf;
- u32 tmp;
+ uint32_t tmp;
float factor;
uint8_t *b256_buf;
int b256_len;
@@ -298,12 +298,12 @@
tmp = (tmp - 'A' + 10);
else continue; /* skip characters other than [0-9,a-f,A-F] */
- if (tmp >= (u32)radix)
+ if (tmp >= (uint32_t)radix)
continue; /* skip digits invalid for the current radix */
for (j = 0; j < b256_len; j++)
{
- tmp += (u32)b256_buf[j] * radix;
+ tmp += (uint32_t)b256_buf[j] * radix;
b256_buf[j] = (uint8_t)(tmp & 0xFF);
tmp >>= 8;
}
@@ -330,7 +330,7 @@
int buf_to_u32_handler(uint8_t *in_buf, void *priv, struct scan_field_s *field)
{
- u32 *dest = priv;
+ uint32_t *dest = priv;
*dest = buf_get_u32(in_buf, 0, 32);
Modified: trunk/src/helper/binarybuffer.h
===================================================================
--- trunk/src/helper/binarybuffer.h 2009-06-18 07:10:25 UTC (rev 2280)
+++ trunk/src/helper/binarybuffer.h 2009-06-18 07:11:11 UTC (rev 2281)
@@ -30,7 +30,7 @@
*/
/* inlining this will help show what fn that is taking time during profiling. */
-static inline void buf_set_u32(uint8_t* buffer, unsigned int first, unsigned int num, u32 value)
+static inline void buf_set_u32(uint8_t* buffer, unsigned int first, unsigned int num, uint32_t value)
{
if ((num==32)&&(first==0))
{
@@ -51,14 +51,14 @@
}
}
}
-static inline u32 buf_get_u32(const uint8_t* buffer, unsigned int first, unsigned int num)
+static inline uint32_t buf_get_u32(const uint8_t* buffer, unsigned int first, unsigned int num)
{
if ((num==32)&&(first==0))
{
- return (((u32)buffer[3])<<24)|(((u32)buffer[2])<<16)|(((u32)buffer[1])<<8)|(((u32)buffer[0])<<0);
+ return (((uint32_t)buffer[3])<<24)|(((uint32_t)buffer[2])<<16)|(((uint32_t)buffer[1])<<8)|(((uint32_t)buffer[0])<<0);
} else
{
- u32 result = 0;
+ uint32_t result = 0;
unsigned int i;
for (i=first; i<first+num; i++)
@@ -71,7 +71,7 @@
}
}
-extern u32 flip_u32(u32 value, unsigned int num);
+extern uint32_t flip_u32(uint32_t value, unsigned int num);
extern int buf_cmp(const uint8_t *buf1, const uint8_t *buf2, int size);
extern int buf_cmp_mask(const uint8_t *buf1, const uint8_t *buf2, const uint8_t *mask, int size);
@@ -88,8 +88,8 @@
#define CEIL(m, n) ((m + n - 1) / n)
-/* read a u32 from a buffer in target memory endianness */
-static inline u32 fast_target_buffer_get_u32(const uint8_t *buffer, int little)
+/* read a uint32_t from a buffer in target memory endianness */
+static inline uint32_t fast_target_buffer_get_u32(const uint8_t *buffer, int little)
{
if (little)
return le_to_h_u32(buffer);
Modified: trunk/src/helper/fileio.c
===================================================================
--- trunk/src/helper/fileio.c 2009-06-18 07:10:25 UTC (rev 2280)
+++ trunk/src/helper/fileio.c 2009-06-18 07:11:11 UTC (rev 2281)
@@ -143,7 +143,7 @@
return retval;
}
-int fileio_seek(fileio_t *fileio, u32 position)
+int fileio_seek(fileio_t *fileio, uint32_t position)
{
int retval;
if ((retval = fseek(fileio->file, position, SEEK_SET)) != 0)
@@ -155,22 +155,22 @@
return ERROR_OK;
}
-static inline int fileio_local_read(fileio_t *fileio, u32 size, uint8_t *buffer, u32 *size_read)
+static inline int fileio_local_read(fileio_t *fileio, uint32_t size, uint8_t *buffer, uint32_t *size_read)
{
*size_read = fread(buffer, 1, size, fileio->file);
return ERROR_OK;
}
-int fileio_read(fileio_t *fileio, u32 size, uint8_t *buffer, u32 *size_read)
+int fileio_read(fileio_t *fileio, uint32_t size, uint8_t *buffer, uint32_t *size_read)
{
return fileio_local_read(fileio, size, buffer, size_read);
}
-int fileio_read_u32(fileio_t *fileio, u32 *data)
+int fileio_read_u32(fileio_t *fileio, uint32_t *data)
{
uint8_t buf[4];
- u32 size_read;
+ uint32_t size_read;
int retval;
if ((retval = fileio_local_read(fileio, 4, buf, &size_read)) != ERROR_OK)
@@ -180,7 +180,7 @@
return ERROR_OK;
}
-static inline int fileio_local_fgets(fileio_t *fileio, u32 size, char *buffer)
+static inline int fileio_local_fgets(fileio_t *fileio, uint32_t size, char *buffer)
{
if( fgets(buffer, size, fileio->file) == NULL)
return ERROR_FILEIO_OPERATION_FAILED;
@@ -188,19 +188,19 @@
return ERROR_OK;
}
-int fileio_fgets(fileio_t *fileio, u32 size, char *buffer)
+int fileio_fgets(fileio_t *fileio, uint32_t size, char *buffer)
{
return fileio_local_fgets(fileio, size, buffer);
}
-static inline int fileio_local_write(fileio_t *fileio, u32 size, const uint8_t *buffer, u32 *size_written)
+static inline int fileio_local_write(fileio_t *fileio, uint32_t size, const uint8_t *buffer, uint32_t *size_written)
{
*size_written = fwrite(buffer, 1, size, fileio->file);
return ERROR_OK;
}
-int fileio_write(fileio_t *fileio, u32 size, const uint8_t *buffer, u32 *size_written)
+int fileio_write(fileio_t *fileio, uint32_t size, const uint8_t *buffer, uint32_t *size_written)
{
int retval;
@@ -212,10 +212,10 @@
return retval;;
}
-int fileio_write_u32(fileio_t *fileio, u32 data)
+int fileio_write_u32(fileio_t *fileio, uint32_t data)
{
uint8_t buf[4];
- u32 size_written;
+ uint32_t size_written;
int retval;
h_u32_to_be(buf, data);
Modified: trunk/src/helper/fileio.h
===================================================================
--- trunk/src/helper/fileio.h 2009-06-18 07:10:25 UTC (rev 2280)
+++ trunk/src/helper/fileio.h 2009-06-18 07:11:11 UTC (rev 2281)
@@ -54,14 +54,14 @@
FILE *file;
} fileio_t;
-extern int fileio_write(fileio_t *fileio, u32 size, const uint8_t *buffer, u32 *size_written);
-extern int fileio_read(fileio_t *fileio, u32 size, uint8_t *buffer, u32 *size_read);
-extern int fileio_fgets(fileio_t *fileio, u32 size, char *buffer);
-extern int fileio_seek(fileio_t *fileio, u32 position);
+extern int fileio_write(fileio_t *fileio, uint32_t size, const uint8_t *buffer, uint32_t *size_written);
+extern int fileio_read(fileio_t *fileio, uint32_t size, uint8_t *buffer, uint32_t *size_read);
+extern int fileio_fgets(fileio_t *fileio, uint32_t size, char *buffer);
+extern int fileio_seek(fileio_t *fileio, uint32_t position);
extern int fileio_close(fileio_t *fileio);
extern int fileio_open(fileio_t *fileio, const char *url, enum fileio_access access, enum fileio_type type);
-extern int fileio_read_u32(fileio_t *fileio, u32 *data);
-extern int fileio_write_u32(fileio_t *fileio, u32 data);
+extern int fileio_read_u32(fileio_t *fileio, uint32_t *data);
+extern int fileio_write_u32(fileio_t *fileio, uint32_t data);
#define ERROR_FILEIO_LOCATION_UNKNOWN (-1200)
#define ERROR_FILEIO_NOT_FOUND (-1201)
Modified: trunk/src/helper/types.h
===================================================================
--- trunk/src/helper/types.h 2009-06-18 07:10:25 UTC (rev 2280)
+++ trunk/src/helper/types.h 2009-06-18 07:11:11 UTC (rev 2281)
@@ -38,8 +38,8 @@
typedef unsigned short uint16_t;
#endif
-#ifndef u32
-typedef unsigned int u32;
+#ifndef uint32_t
+typedef unsigned int uint32_t;
#endif
#ifndef u64
@@ -88,9 +88,9 @@
*/
-static inline u32 le_to_h_u32(const uint8_t* buf)
+static inline uint32_t le_to_h_u32(const uint8_t* buf)
{
- return (u32)(buf[0] | buf[1] << 8 | buf[2] << 16 | buf[3] << 24);
+ return (uint32_t)(buf[0] | buf[1] << 8 | buf[2] << 16 | buf[3] << 24);
}
static inline uint16_t le_to_h_u16(const uint8_t* buf)
@@ -98,9 +98,9 @@
return (uint16_t)(buf[0] | buf[1] << 8);
}
-static inline u32 be_to_h_u32(const uint8_t* buf)
+static inline uint32_t be_to_h_u32(const uint8_t* buf)
{
- return (u32)(buf[3] | buf[2] << 8 | buf[1] << 16 | buf[0] << 24);
+ return (uint32_t)(buf[3] | buf[2] << 8 | buf[1] << 16 | buf[0] << 24);
}
static inline uint16_t be_to_h_u16(const uint8_t* buf)
Modified: trunk/src/jtag/at91rm9200.c
===================================================================
--- trunk/src/jtag/at91rm9200.c 2009-06-18 07:10:25 UTC (rev 2280)
+++ trunk/src/jtag/at91rm9200.c 2009-06-18 07:11:11 UTC (rev 2281)
@@ -82,17 +82,17 @@
{
char* name;
int TDO_PIO; /* PIO holding TDO */
- u32 TDO_MASK; /* TDO bitmask */
+ uint32_t TDO_MASK; /* TDO bitmask */
int TRST_PIO; /* PIO holding TRST */
- u32 TRST_MASK; /* TRST bitmask */
+ uint32_t TRST_MASK; /* TRST bitmask */
int TMS_PIO; /* PIO holding TMS */
- u32 TMS_MASK; /* TMS bitmask */
+ uint32_t TMS_MASK; /* TMS bitmask */
int TCK_PIO; /* PIO holding TCK */
- u32 TCK_MASK; /* TCK bitmask */
+ uint32_t TCK_MASK; /* TCK bitmask */
int TDI_PIO; /* PIO holding TDI */
- u32 TDI_MASK; /* TDI bitmask */
+ uint32_t TDI_MASK; /* TDI bitmask */
int SRST_PIO; /* PIO holding SRST */
- u32 SRST_MASK; /* SRST bitmask */
+ uint32_t SRST_MASK; /* SRST bitmask */
};
static struct device_t devices[] =
@@ -109,7 +109,7 @@
static struct device_t* device;
static int dev_mem_fd;
static void *sys_controller;
-static u32* pio_base;
+static uint32_t* pio_base;
/* low level command set
*/
@@ -250,7 +250,7 @@
close(dev_mem_fd);
return ERROR_JTAG_INIT_FAILED;
}
- pio_base = (u32*)sys_controller + 0x100;
+ pio_base = (uint32_t*)sys_controller + 0x100;
/*
* Configure TDO as an input, and TDI, TCK, TMS, TRST, SRST
Modified: trunk/src/jtag/commands.h
===================================================================
--- trunk/src/jtag/commands.h 2009-06-18 07:10:25 UTC (rev 2280)
+++ trunk/src/jtag/commands.h 2009-06-18 07:11:11 UTC (rev 2281)
@@ -105,7 +105,7 @@
typedef struct sleep_command_s
{
/// number of microseconds to sleep
- u32 us;
+ uint32_t us;
} sleep_command_t;
/**
Modified: trunk/src/jtag/core.c
===================================================================
--- trunk/src/jtag/core.c 2009-06-18 07:10:25 UTC (rev 2280)
+++ trunk/src/jtag/core.c 2009-06-18 07:11:11 UTC (rev 2281)
@@ -442,7 +442,7 @@
}
void jtag_add_dr_out(jtag_tap_t* tap,
- int num_fields, const int* num_bits, const u32* value,
+ int num_fields, const int* num_bits, const uint32_t* value,
tap_state_t end_state)
{
assert(end_state != TAP_INVALID);
@@ -686,7 +686,7 @@
return cmd_queue_end_state;
}
-void jtag_add_sleep(u32 us)
+void jtag_add_sleep(uint32_t us)
{
/// @todo Here, keep_alive() appears to be a layering violation!!!
keep_alive();
@@ -807,7 +807,7 @@
return ERROR_OK;
}
-void jtag_sleep(u32 us)
+void jtag_sleep(uint32_t us)
{
alive_sleep(us/1000);
}
@@ -859,7 +859,7 @@
}
static void jtag_examine_chain_display(enum log_levels level, const char *msg,
- const char *name, u32 idcode)
+ const char *name, uint32_t idcode)
{
log_printf_lf(level, __FILE__, __LINE__, __FUNCTION__,
"JTAG tap: %s %16.16s: 0x%08x "
@@ -868,7 +868,7 @@
EXTRACT_MFG(idcode), EXTRACT_PART(idcode), EXTRACT_VER(idcode) );
}
-static bool jtag_idcode_is_final(u32 idcode)
+static bool jtag_idcode_is_final(uint32_t idcode)
{
return idcode == 0x000000FF || idcode == 0xFFFFFFFF;
}
@@ -884,7 +884,7 @@
bool triggered = false;
for ( ; count < max - 31; count += 32)
{
- u32 idcode = buf_get_u32(idcodes, count, 32);
+ uint32_t idcode = buf_get_u32(idcodes, count, 32);
// do not trigger the warning if the data looks good
if (!triggered && jtag_idcode_is_final(idcode))
continue;
@@ -955,7 +955,7 @@
for (unsigned bit_count = 0; bit_count < (JTAG_MAX_CHAIN_SIZE * 32) - 31;)
{
- u32 idcode = buf_get_u32(idcode_buffer, bit_count, 32);
+ uint32_t idcode = buf_get_u32(idcode_buffer, bit_count, 32);
if ((idcode & 1) == 0)
{
/* LSB must not be 0, this indicates a device in bypass */
Modified: trunk/src/jtag/driver.c
===================================================================
--- trunk/src/jtag/driver.c 2009-06-18 07:10:25 UTC (rev 2280)
+++ trunk/src/jtag/driver.c 2009-06-18 07:11:11 UTC (rev 2281)
@@ -264,7 +264,7 @@
void interface_jtag_add_dr_out(jtag_tap_t *target_tap,
int in_num_fields,
const int *num_bits,
- const u32 *value,
+ const uint32_t *value,
tap_state_t end_state)
{
/* count devices in bypass */
@@ -449,7 +449,7 @@
return ERROR_OK;
}
-int interface_jtag_add_sleep(u32 us)
+int interface_jtag_add_sleep(uint32_t us)
{
/* allocate memory for a new list member */
jtag_command_t * cmd = cmd_queue_alloc(sizeof(jtag_command_t));
Modified: trunk/src/jtag/dummy.c
===================================================================
--- trunk/src/jtag/dummy.c 2009-06-18 07:10:25 UTC (rev 2280)
+++ trunk/src/jtag/dummy.c 2009-06-18 07:11:11 UTC (rev 2281)
@@ -32,7 +32,7 @@
static int clock_count; /* count clocks in any stable state, only stable states */
-static u32 dummy_data;
+static uint32_t dummy_data;
static int dummy_speed(int speed);
Modified: trunk/src/jtag/ep93xx.c
===================================================================
--- trunk/src/jtag/ep93xx.c 2009-06-18 07:10:25 UTC (rev 2280)
+++ trunk/src/jtag/ep93xx.c 2009-06-18 07:11:11 UTC (rev 2281)
@@ -131,7 +131,7 @@
static int set_gonk_mode(void)
{
void *syscon;
- u32 devicecfg;
+ uint32_t devicecfg;
syscon = mmap(NULL, 4096, PROT_READ | PROT_WRITE,
MAP_SHARED, dev_mem_fd, 0x80930000);
Modified: trunk/src/jtag/ft2232.c
===================================================================
--- trunk/src/jtag/ft2232.c 2009-06-18 07:10:25 UTC (rev 2280)
+++ trunk/src/jtag/ft2232.c 2009-06-18 07:11:11 UTC (rev 2281)
@@ -338,7 +338,7 @@
.quit = ft2232_quit,
};
-static int ft2232_write(uint8_t* buf, int size, u32* bytes_written)
+static int ft2232_write(uint8_t* buf, int size, uint32_t* bytes_written)
{
#if BUILD_FT2232_FTD2XX == 1
FT_STATUS status;
@@ -371,7 +371,7 @@
}
-static int ft2232_read(uint8_t* buf, u32 size, u32* bytes_read)
+static int ft2232_read(uint8_t* buf, uint32_t size, uint32_t* bytes_read)
{
#if BUILD_FT2232_FTD2XX == 1
DWORD dw_bytes_read;
@@ -441,7 +441,7 @@
uint8_t buf = use_adaptive_clocking ? 0x96 : 0x97;
LOG_DEBUG("%2.2x", buf);
- u32 bytes_written;
+ uint32_t bytes_written;
int retval = ft2232_write(&buf, 1, &bytes_written);
if (ERROR_OK != retval || bytes_written != 1)
{
@@ -463,7 +463,7 @@
{
uint8_t buf[3];
int retval;
- u32 bytes_written;
+ uint32_t bytes_written;
ft2232_adaptive_clocking(speed);
@@ -621,8 +621,8 @@
int scan_size;
enum scan_type type;
int retval;
- u32 bytes_written=0;
- u32 bytes_read=0;
+ uint32_t bytes_written=0;
+ uint32_t bytes_read=0;
#ifdef _DEBUG_USB_IO_
struct timeval start, inter, inter2, end;
@@ -942,8 +942,8 @@
int last_bit;
uint8_t* receive_buffer = malloc(CEIL(scan_size, 8));
uint8_t* receive_pointer = receive_buffer;
- u32 bytes_written;
- u32 bytes_read;
+ uint32_t bytes_written;
+ uint32_t bytes_read;
int retval;
int thisrun_read = 0;
@@ -1860,7 +1860,7 @@
if (status == FT_OK)
{
char** desc_array = malloc(sizeof(char*) * (num_devices + 1));
- u32 i;
+ uint32_t i;
for (i = 0; i < num_devices; i++)
desc_array[i] = malloc(64);
@@ -2034,7 +2034,7 @@
{
uint8_t buf[1];
int retval;
- u32 bytes_written;
+ uint32_t bytes_written;
const ft2232_layout_t* cur_layout = ft2232_layouts;
int i;
@@ -2124,7 +2124,7 @@
static int usbjtag_init(void)
{
uint8_t buf[3];
- u32 bytes_written;
+ uint32_t bytes_written;
low_output = 0x08;
low_direction = 0x0b;
@@ -2200,7 +2200,7 @@
static int axm0432_jtag_init(void)
{
uint8_t buf[3];
- u32 bytes_written;
+ uint32_t bytes_written;
low_output = 0x08;
low_direction = 0x2b;
@@ -2271,7 +2271,7 @@
static int jtagkey_init(void)
{
uint8_t buf[3];
- u32 bytes_written;
+ uint32_t bytes_written;
low_output = 0x08;
low_direction = 0x1b;
@@ -2354,7 +2354,7 @@
static int olimex_jtag_init(void)
{
uint8_t buf[3];
- u32 bytes_written;
+ uint32_t bytes_written;
low_output = 0x08;
low_direction = 0x1b;
@@ -2422,7 +2422,7 @@
static int flyswatter_init(void)
{
uint8_t buf[3];
- u32 bytes_written;
+ uint32_t bytes_written;
low_output = 0x18;
low_direction = 0xfb;
@@ -2469,7 +2469,7 @@
static int turtle_init(void)
{
uint8_t buf[3];
- u32 bytes_written;
+ uint32_t bytes_written;
low_output = 0x08;
low_direction = 0x5b;
@@ -2510,7 +2510,7 @@
static int comstick_init(void)
{
uint8_t buf[3];
- u32 bytes_written;
+ uint32_t bytes_written;
low_output = 0x08;
low_direction = 0x0b;
@@ -2554,7 +2554,7 @@
static int stm32stick_init(void)
{
uint8_t buf[3];
- u32 bytes_written;
+ uint32_t bytes_written;
low_output = 0x88;
low_direction = 0x8b;
@@ -2598,7 +2598,7 @@
static int sheevaplug_init(void)
{
uint8_t buf[3];
- u32 bytes_written;
+ uint32_t bytes_written;
low_output = 0x08;
low_direction = 0x1b;
@@ -2649,7 +2649,7 @@
static int cortino_jtag_init(void)
{
uint8_t buf[3];
- u32 bytes_written;
+ uint32_t bytes_written;
low_output = 0x08;
low_direction = 0x1b;
@@ -2950,7 +2950,7 @@
*/
static int icebear_jtag_init(void) {
uint8_t buf[3];
- u32 bytes_written;
+ uint32_t bytes_written;
low_direction = 0x0b; /* output: TCK TDI TMS; input: TDO */
low_output = 0x08; /* high: TMS; low: TCK TDI */
Modified: trunk/src/jtag/jlink.c
===================================================================
--- trunk/src/jtag/jlink.c 2009-06-18 07:10:25 UTC (rev 2280)
+++ trunk/src/jtag/jlink.c 2009-06-18 07:11:11 UTC (rev 2281)
@@ -549,7 +549,7 @@
{
int result;
int len;
- u32 jlink_caps, jlink_max_size;
+ uint32_t jlink_caps, jlink_max_size;
/* query hardware version */
jlink_simple_command(EMU_CMD_VERSION);
@@ -603,8 +603,8 @@
return ERROR_JTAG_DEVICE_ERROR;
}
- u32 jlink_hw_version = buf_get_u32(usb_in_buffer, 0, 32);
- u32 major_revision = (jlink_hw_version / 10000) % 100;
+ uint32_t jlink_hw_version = buf_get_u32(usb_in_buffer, 0, 32);
+ uint32_t major_revision = (jlink_hw_version / 10000) % 100;
if (major_revision >= 5)
jlink_hw_jtag_version = 3;
@@ -711,7 +711,7 @@
if (index >= JLINK_TAP_BUFFER_SIZE)
{
LOG_ERROR("jlink_tap_append_step: overflow");
- *(u32 *)0xFFFFFFFF = 0;
+ *(uint32_t *)0xFFFFFFFF = 0;
exit(-1);
}
Modified: trunk/src/jtag/jtag.h
===================================================================
--- trunk/src/jtag/jtag.h 2009-06-18 07:10:25 UTC (rev 2280)
+++ trunk/src/jtag/jtag.h 2009-06-18 07:11:11 UTC (rev 2281)
@@ -156,15 +156,15 @@
/// Is this TAP currently enabled?
bool enabled;
int ir_length; /**< size of instruction register */
- u32 ir_capture_value;
+ uint32_t ir_capture_value;
uint8_t* expected; /**< Capture-IR expected value */
- u32 ir_capture_mask;
+ uint32_t ir_capture_mask;
uint8_t* expected_mask; /**< Capture-IR expected mask */
- u32 idcode;
+ uint32_t idcode;
/**< device identification code */
/// Array of expected identification codes */
- u32* expected_ids;
+ uint32_t* expected_ids;
/// Number of expected identification codes
uint8_t expected_ids_cnt;
@@ -593,7 +593,7 @@
*
**/
extern tap_state_t jtag_get_end_state(void);
-extern void jtag_add_sleep(u32 us);
+extern void jtag_add_sleep(uint32_t us);
/**
@@ -648,7 +648,7 @@
*/
extern void jtag_check_value_mask(scan_field_t *field, uint8_t *value, uint8_t *mask);
-extern void jtag_sleep(u32 us);
+extern void jtag_sleep(uint32_t us);
/*
* The JTAG subsystem defines a number of error codes,
@@ -691,7 +691,7 @@
* clocking data back in. Patches gladly accepted!
*/
extern void jtag_add_dr_out(jtag_tap_t* tap,
- int num_fields, const int* num_bits, const u32* value,
+ int num_fields, const int* num_bits, const uint32_t* value,
tap_state_t end_state);
Modified: trunk/src/jtag/minidriver.h
===================================================================
--- trunk/src/jtag/minidriver.h 2009-06-18 07:10:25 UTC (rev 2280)
+++ trunk/src/jtag/minidriver.h 2009-06-18 07:11:11 UTC (rev 2281)
@@ -82,7 +82,7 @@
}
extern void interface_jtag_add_dr_out(jtag_tap_t* tap,
- int num_fields, const int* num_bits, const u32* value,
+ int num_fields, const int* num_bits, const uint32_t* value,
tap_state_t end_state);
extern void interface_jtag_add_callback(jtag_callback1_t f, uint8_t *in);
@@ -121,7 +121,7 @@
*/
extern int interface_jtag_add_reset(int trst, int srst);
extern int interface_jtag_set_end_state(tap_state_t endstate);
-extern int interface_jtag_add_sleep(u32 us);
+extern int interface_jtag_add_sleep(uint32_t us);
extern int interface_jtag_add_clocks(int num_cycles);
extern int interface_jtag_execute_queue(void);
Modified: trunk/src/jtag/minidummy/jtag_minidriver.h
===================================================================
--- trunk/src/jtag/minidummy/jtag_minidriver.h 2009-06-18 07:10:25 UTC (rev 2280)
+++ trunk/src/jtag/minidummy/jtag_minidriver.h 2009-06-18 07:11:11 UTC (rev 2281)
@@ -23,7 +23,7 @@
static __inline__ void interface_jtag_add_dr_out_core(jtag_tap_t *target_tap,
int num_fields,
const int *num_bits,
- const u32 *value,
+ const uint32_t *value,
enum tap_state end_state)
{
/* synchronously do the operation here */
@@ -32,7 +32,7 @@
static __inline__ void interface_jtag_add_dr_out(jtag_tap_t *target_tap,
int num_fields,
const int *num_bits,
- const u32 *value,
+ const uint32_t *value,
enum tap_state end_state)
{
/* synchronously do the operation here */
Modified: trunk/src/jtag/minidummy/minidummy.c
===================================================================
--- trunk/src/jtag/minidummy/minidummy.c 2009-06-18 07:10:25 UTC (rev 2280)
+++ trunk/src/jtag/minidummy/minidummy.c 2009-06-18 07:11:11 UTC (rev 2281)
@@ -132,7 +132,7 @@
return ERROR_OK;
}
-int interface_jtag_add_sleep(u32 us)
+int interface_jtag_add_sleep(uint32_t us)
{
jtag_sleep(us);
return ERROR_OK;
Modified: trunk/src/jtag/presto.c
===================================================================
--- trunk/src/jtag/presto.c 2009-06-18 07:10:25 UTC (rev 2280)
+++ trunk/src/jtag/presto.c 2009-06-18 07:11:11 UTC (rev 2281)
@@ -128,7 +128,7 @@
0x80, 0xA0, 0xA8, 0xB0, 0xC0, 0xE0
};
-static int presto_write(uint8_t *buf, u32 size)
+static int presto_write(uint8_t *buf, uint32_t size)
{
#if BUILD_PRESTO_FTD2XX == 1
DWORD ftbytes;
@@ -139,7 +139,7 @@
}
#elif BUILD_PRESTO_LIBFTDI == 1
- u32 ftbytes;
+ uint32_t ftbytes;
if ((presto->retval = ftdi_write_data(&presto->ftdic, buf, size)) < 0)
{
LOG_ERROR("ftdi_write_data: %s", ftdi_get_error_string(&presto->ftdic));
@@ -150,14 +150,14 @@
if (ftbytes != size)
{
- LOG_ERROR("couldn't write the requested number of bytes to PRESTO (%u < %u)", (u32)ftbytes, size);
+ LOG_ERROR("couldn't write the requested number of bytes to PRESTO (%u < %u)", (uint32_t)ftbytes, size);
return ERROR_JTAG_DEVICE_ERROR;
}
return ERROR_OK;
}
-static int presto_read(uint8_t* buf, u32 size)
+static int presto_read(uint8_t* buf, uint32_t size)
{
#if BUILD_PRESTO_FTD2XX == 1
DWORD ftbytes;
@@ -168,7 +168,7 @@
}
#elif BUILD_PRESTO_LIBFTDI == 1
- u32 ftbytes = 0;
+ uint32_t ftbytes = 0;
struct timeval timeout, now;
gettimeofday(&timeout, NULL);
@@ -192,7 +192,7 @@
if (ftbytes != size)
{
/* this is just a warning, there might have been timeout when detecting PRESTO, which is not fatal */
- LOG_WARNING("couldn't read the requested number of bytes from PRESTO (%u < %u)", (u32)ftbytes, size);
+ LOG_WARNING("couldn't read the requested number of bytes from PRESTO (%u < %u)", (uint32_t)ftbytes, size);
return ERROR_JTAG_DEVICE_ERROR;
}
@@ -202,7 +202,7 @@
#if BUILD_PRESTO_FTD2XX == 1
static int presto_open_ftd2xx(char *req_serial)
{
- u32 i;
+ uint32_t i;
DWORD numdevs;
DWORD vidpid;
char devname[FT_DEVICE_NAME_LEN];
Modified: trunk/src/jtag/rlink/rlink.c
===================================================================
--- trunk/src/jtag/rlink/rlink.c 2009-06-18 07:10:25 UTC (rev 2280)
+++ trunk/src/jtag/rlink/rlink.c 2009-06-18 07:11:11 UTC (rev 2281)
@@ -600,8 +600,8 @@
struct {
dtc_reply_queue_entry_t *rq_head;
dtc_reply_queue_entry_t *rq_tail;
- u32 cmd_index;
- u32 reply_index;
+ uint32_t cmd_index;
+ uint32_t reply_index;
uint8_t cmd_buffer[USB_EP2BANK_SIZE];
} dtc_queue;
@@ -612,8 +612,8 @@
static
struct {
- u32 length;
- u32 buffer;
+ uint32_t length;
+ uint32_t buffer;
} tap_state_queue;
Modified: trunk/src/jtag/tcl.c
===================================================================
--- trunk/src/jtag/tcl.c 2009-06-18 07:10:25 UTC (rev 2280)
+++ trunk/src/jtag/tcl.c 2009-06-18 07:11:11 UTC (rev 2281)
@@ -383,7 +383,7 @@
break;
case NTAP_OPT_EXPECTED_ID:
{
- u32 *new_expected_ids;
+ uint32_t *new_expected_ids;
e = Jim_GetOpt_Wide( goi, &w );
if( e != JIM_OK) {
@@ -391,13 +391,13 @@
return e;
}
- new_expected_ids = malloc(sizeof(u32) * (pTap->expected_ids_cnt + 1));
+ new_expected_ids = malloc(sizeof(uint32_t) * (pTap->expected_ids_cnt + 1));
if (new_expected_ids == NULL) {
Jim_SetResult_sprintf( goi->interp, "no memory");
return JIM_ERR;
}
- memcpy(new_expected_ids, pTap->expected_ids, sizeof(u32) * pTap->expected_ids_cnt);
+ memcpy(new_expected_ids, pTap->expected_ids, sizeof(uint32_t) * pTap->expected_ids_cnt);
new_expected_ids[pTap->expected_ids_cnt] = w;
@@ -862,7 +862,7 @@
command_print(cmd_ctx, "---|--------------------|---------|------------|------------|------|------|------|---------");
while( tap ){
- u32 expected, expected_mask, cur_instr, ii;
+ uint32_t expected, expected_mask, cur_instr, ii;
expected = buf_get_u32(tap->expected, 0, tap->ir_length);
expected_mask = buf_get_u32(tap->expected_mask, 0, tap->ir_length);
cur_instr = buf_get_u32(tap->cur_instr, 0, tap->ir_length);
@@ -1218,7 +1218,7 @@
fields[i].num_bits = field_size;
fields[i].out_value = malloc(CEIL(field_size, 8));
- u32 value;
+ uint32_t value;
retval = parse_u32(args[i * 2 + 1], &value);
if (ERROR_OK != retval)
goto error_return;
Modified: trunk/src/jtag/zy1000/jtag_minidriver.h
===================================================================
--- trunk/src/jtag/zy1000/jtag_minidriver.h 2009-06-18 07:10:25 UTC (rev 2280)
+++ trunk/src/jtag/zy1000/jtag_minidriver.h 2009-06-18 07:11:11 UTC (rev 2281)
@@ -151,7 +151,7 @@
static __inline__ void interface_jtag_add_dr_out_core(jtag_tap_t *target_tap,
int num_fields,
const int *num_bits,
- const u32 *value,
+ const uint32_t *value,
enum tap_state end_state)
{
enum tap_state pause_state = TAP_DRSHIFT;
@@ -183,7 +183,7 @@
static __inline__ void interface_jtag_add_dr_out(jtag_tap_t *target_tap,
int num_fields,
const int *num_bits,
- const u32 *value,
+ const uint32_t *value,
enum tap_state end_state)
{
Modified: trunk/src/jtag/zy1000/zy1000.c
===================================================================
--- trunk/src/jtag/zy1000/zy1000.c 2009-06-18 07:10:25 UTC (rev 2280)
+++ trunk/src/jtag/zy1000/zy1000.c 2009-06-18 07:11:11 UTC (rev 2281)
@@ -477,7 +477,7 @@
}
}
/* mask away unused bits for easier debugging */
- value&=~(((u32)0xffffffff)<<k);
+ value&=~(((uint32_t)0xffffffff)<<k);
shiftValueInner(shiftState, pause_state, k, value);
@@ -695,7 +695,7 @@
return zy1000_jtag_add_clocks(num_cycles, cmd_queue_cur_state, cmd_queue_cur_state);
}
-int interface_jtag_add_sleep(u32 us)
+int interface_jtag_add_sleep(uint32_t us)
{
jtag_sleep(us);
return ERROR_OK;
Modified: trunk/src/pld/virtex2.c
===================================================================
--- trunk/src/pld/virtex2.c 2009-06-18 07:10:25 UTC (rev 2280)
+++ trunk/src/pld/virtex2.c 2009-06-18 07:11:11 UTC (rev 2281)
@@ -38,7 +38,7 @@
.load = virtex2_load,
};
-static int virtex2_set_instr(jtag_tap_t *tap, u32 new_instr)
+static int virtex2_set_instr(jtag_tap_t *tap, uint32_t new_instr)
{
if (tap == NULL)
return ERROR_FAIL;
@@ -62,7 +62,7 @@
}
static int virtex2_send_32(struct pld_device_s *pld_device,
- int num_words, u32 *words)
+ int num_words, uint32_t *words)
{
virtex2_pld_device_t *virtex2_info = pld_device->driver_priv;
scan_field_t scan_field;
@@ -90,11 +90,11 @@
static __inline__ void virtexflip32(uint8_t *in)
{
- *((u32 *)in) = flip_u32(le_to_h_u32(in), 32);
+ *((uint32_t *)in) = flip_u32(le_to_h_u32(in), 32);
}
static int virtex2_receive_32(struct pld_device_s *pld_device,
- int num_words, u32 *words)
+ int num_words, uint32_t *words)
{
virtex2_pld_device_t *virtex2_info = pld_device->driver_priv;
scan_field_t scan_field;
@@ -120,9 +120,9 @@
return ERROR_OK;
}
-static int virtex2_read_stat(struct pld_device_s *pld_device, u32 *status)
+static int virtex2_read_stat(struct pld_device_s *pld_device, uint32_t *status)
{
- u32 data[5];
+ uint32_t data[5];
jtag_add_tlr();
@@ -193,7 +193,7 @@
{
pld_device_t *device;
virtex2_pld_device_t *virtex2_info;
- u32 status;
+ uint32_t status;
if (argc < 1)
{
Modified: trunk/src/pld/xilinx_bit.c
===================================================================
--- trunk/src/pld/xilinx_bit.c 2009-06-18 07:10:25 UTC (rev 2280)
+++ trunk/src/pld/xilinx_bit.c 2009-06-18 07:11:11 UTC (rev 2281)
@@ -29,7 +29,7 @@
static int read_section(FILE *input_file, int length_size, char section,
- u32 *buffer_length, uint8_t **buffer)
+ uint32_t *buffer_length, uint8_t **buffer)
{
uint8_t length_buffer[4];
int length;
Modified: trunk/src/pld/xilinx_bit.h
===================================================================
--- trunk/src/pld/xilinx_bit.h 2009-06-18 07:10:25 UTC (rev 2280)
+++ trunk/src/pld/xilinx_bit.h 2009-06-18 07:11:11 UTC (rev 2281)
@@ -29,7 +29,7 @@
uint8_t *part_name;
uint8_t *date;
uint8_t *time;
- u32 length;
+ uint32_t length;
uint8_t *data;
} xilinx_bit_file_t;
Modified: trunk/src/server/gdb_server.c
===================================================================
--- trunk/src/server/gdb_server.c 2009-06-18 07:10:25 UTC (rev 2280)
+++ trunk/src/server/gdb_server.c 2009-06-18 07:11:11 UTC (rev 2281)
@@ -1163,8 +1163,8 @@
int gdb_read_memory_packet(connection_t *connection, target_t *target, char *packet, int packet_size)
{
char *separator;
- u32 addr = 0;
- u32 len = 0;
+ uint32_t addr = 0;
+ uint32_t len = 0;
uint8_t *buffer;
char *hex_buffer;
@@ -1212,7 +1212,7 @@
{
hex_buffer = malloc(len * 2 + 1);
- u32 i;
+ uint32_t i;
for (i = 0; i < len; i++)
{
uint8_t t = buffer[i];
@@ -1237,12 +1237,12 @@
int gdb_write_memory_packet(connection_t *connection, target_t *target, char *packet, int packet_size)
{
char *separator;
- u32 addr = 0;
- u32 len = 0;
+ uint32_t addr = 0;
+ uint32_t len = 0;
uint8_t *buffer;
- u32 i;
+ uint32_t i;
int retval;
/* skip command character */
@@ -1270,7 +1270,7 @@
for (i=0; i<len; i++)
{
- u32 tmp;
+ uint32_t tmp;
sscanf(separator + 2*i, "%2x", &tmp);
buffer[i] = tmp;
}
@@ -1294,8 +1294,8 @@
int gdb_write_memory_binary_packet(connection_t *connection, target_t *target, char *packet, int packet_size)
{
char *separator;
- u32 addr = 0;
- u32 len = 0;
+ uint32_t addr = 0;
+ uint32_t len = 0;
int retval;
@@ -1342,7 +1342,7 @@
int gdb_step_continue_packet(connection_t *connection, target_t *target, char *packet, int packet_size)
{
int current = 0;
- u32 address = 0x0;
+ uint32_t address = 0x0;
int retval=ERROR_OK;
LOG_DEBUG("-");
@@ -1377,8 +1377,8 @@
int type;
enum breakpoint_type bp_type = BKPT_SOFT /* dummy init to avoid warning */;
enum watchpoint_rw wp_type;
- u32 address;
- u32 size;
+ uint32_t address;
+ uint32_t size;
char *separator;
int retval;
@@ -1540,12 +1540,12 @@
int gdb_calc_blocksize(flash_bank_t *bank)
{
- u32 i;
- u32 block_size = 0xffffffff;
+ uint32_t i;
+ uint32_t block_size = 0xffffffff;
/* loop through all sectors and return smallest sector size */
- for (i = 0; i < (u32)bank->num_sectors; i++)
+ for (i = 0; i < (uint32_t)bank->num_sectors; i++)
{
if (bank->sectors[i].size < block_size)
block_size = bank->sectors[i].size;
@@ -1586,7 +1586,7 @@
cmd = malloc((packet_size - 6)/2 + 1);
for (i=0; i < (packet_size - 6)/2; i++)
{
- u32 tmp;
+ uint32_t tmp;
sscanf(packet + 6 + 2*i, "%2x", &tmp);
cmd[i] = tmp;
}
@@ -1610,9 +1610,9 @@
int retval;
char gdb_reply[10];
char *separator;
- u32 checksum;
- u32 addr = 0;
- u32 len = 0;
+ uint32_t checksum;
+ uint32_t addr = 0;
+ uint32_t len = 0;
/* skip command character */
packet += 5;
@@ -1717,7 +1717,7 @@
qsort(banks, flash_get_bank_count(), sizeof(flash_bank_t *), compare_bank);
- u32 ram_start=0;
+ uint32_t ram_start=0;
for (i=0; i<flash_get_bank_count(); i++)
{
p = banks[i];
@@ -1930,7 +1930,7 @@
if (!strcmp(packet, "vFlashDone"))
{
- u32 written;
+ uint32_t written;
/* process the flashing buffer. No need to erase as GDB
* always issues a vFlashErase first. */
Modified: trunk/src/svf/svf.c
===================================================================
--- trunk/src/svf/svf.c 2009-06-18 07:10:25 UTC (rev 2280)
+++ trunk/src/svf/svf.c 2009-06-18 07:11:11 UTC (rev 2281)
@@ -94,7 +94,7 @@
{
tap_state_t from;
tap_state_t to;
- u32 num_of_moves;
+ uint32_t num_of_moves;
tap_state_t paths[8];
}svf_statemove_t;
@@ -251,7 +251,7 @@
unsigned svf_get_mask_u32(int bitlen)
{
- u32 bitmask;
+ uint32_t bitmask;
if (bitlen < 0)
{
Modified: trunk/src/xsvf/xsvf.c
===================================================================
--- trunk/src/xsvf/xsvf.c 2009-06-18 07:10:25 UTC (rev 2280)
+++ trunk/src/xsvf/xsvf.c 2009-06-18 07:11:11 UTC (rev 2281)
@@ -678,7 +678,7 @@
case XWAIT:
{
/* expected in stream:
- XWAIT <uint8_t wait_state> <uint8_t end_state> <u32 usecs>
+ XWAIT <uint8_t wait_state> <uint8_t end_state> <uint32_t usecs>
*/
uint8_t wait;
@@ -719,7 +719,7 @@
case XWAITSTATE:
{
/* expected in stream:
- XWAITSTATE <uint8_t wait_state> <uint8_t end_state> <u32 clock_count> <u32 usecs>
+ XWAITSTATE <uint8_t wait_state> <uint8_t end_state> <uint32_t clock_count> <uint32_t usecs>
*/
uint8_t clock_buf[4];
@@ -775,7 +775,7 @@
case LCOUNT:
{
/* expected in stream:
- LCOUNT <u32 loop_count>
+ LCOUNT <uint32_t loop_count>
*/
uint8_t count_buf[4];
@@ -793,7 +793,7 @@
case LDELAY:
{
/* expected in stream:
- LDELAY <uint8_t wait_state> <u32 clock_count> <u32 usecs_to_sleep>
+ LDELAY <uint8_t wait_state> <uint32_t clock_count> <uint32_t usecs_to_sleep>
*/
uint8_t state;
uint8_t clock_buf[4];
|
|
From: <zw...@ma...> - 2009-06-18 09:11:08
|
Author: zwelch
Date: 2009-06-18 09:10:25 +0200 (Thu, 18 Jun 2009)
New Revision: 2280
Modified:
trunk/src/flash/aduc702x.c
trunk/src/flash/at91sam7.c
trunk/src/flash/at91sam7.h
trunk/src/flash/avrf.c
trunk/src/flash/cfi.c
trunk/src/flash/cfi.h
trunk/src/flash/davinci_nand.c
trunk/src/flash/ecos.c
trunk/src/flash/flash.c
trunk/src/flash/flash.h
trunk/src/flash/lpc2000.c
trunk/src/flash/lpc2000.h
trunk/src/flash/lpc288x.c
trunk/src/flash/lpc288x.h
trunk/src/flash/lpc3180_nand_controller.c
trunk/src/flash/lpc3180_nand_controller.h
trunk/src/flash/mflash.c
trunk/src/flash/mflash.h
trunk/src/flash/nand.c
trunk/src/flash/nand.h
trunk/src/flash/non_cfi.h
trunk/src/flash/ocl.c
trunk/src/flash/orion_nand.c
trunk/src/flash/pic32mx.c
trunk/src/flash/pic32mx.h
trunk/src/flash/s3c2440_nand.c
trunk/src/flash/s3c24xx_nand.h
trunk/src/flash/stellaris.c
trunk/src/flash/stellaris.h
trunk/src/flash/stm32x.c
trunk/src/flash/stm32x.h
trunk/src/flash/str7x.c
trunk/src/flash/str7x.h
trunk/src/flash/str9x.c
trunk/src/flash/str9x.h
trunk/src/flash/str9xpec.c
trunk/src/flash/str9xpec.h
trunk/src/flash/tms470.c
trunk/src/flash/tms470.h
Log:
Transform 'u32' to 'uint32_t' in src/flash.
- Replace '\([^_]\)u32' with '\1uint32_t'.
Modified: trunk/src/flash/aduc702x.c
===================================================================
--- trunk/src/flash/aduc702x.c 2009-06-18 07:09:35 UTC (rev 2279)
+++ trunk/src/flash/aduc702x.c 2009-06-18 07:10:25 UTC (rev 2280)
@@ -33,9 +33,9 @@
static int aduc702x_register_commands(struct command_context_s *cmd_ctx);
static int aduc702x_erase(struct flash_bank_s *bank, int first, int last);
static int aduc702x_protect(struct flash_bank_s *bank, int set, int first, int last);
-static int aduc702x_write(struct flash_bank_s *bank, uint8_t *buffer, u32 offset, u32 count);
-static int aduc702x_write_single(struct flash_bank_s *bank, uint8_t *buffer, u32 offset, u32 count);
-static int aduc702x_write_block(struct flash_bank_s *bank, uint8_t *buffer, u32 offset, u32 count);
+static int aduc702x_write(struct flash_bank_s *bank, uint8_t *buffer, uint32_t offset, uint32_t count);
+static int aduc702x_write_single(struct flash_bank_s *bank, uint8_t *buffer, uint32_t offset, uint32_t count);
+static int aduc702x_write_block(struct flash_bank_s *bank, uint8_t *buffer, uint32_t offset, uint32_t count);
static int aduc702x_probe(struct flash_bank_s *bank);
static int aduc702x_info(struct flash_bank_s *bank, char *buf, int buf_size);
static int aduc702x_protect_check(struct flash_bank_s *bank);
@@ -54,14 +54,14 @@
#define ADUC702x_FLASH_FEEHIDE (7*4)
typedef struct {
- u32 feesta;
- u32 feemod;
- u32 feecon;
- u32 feedat;
- u32 feeadr;
- u32 feesign;
- u32 feepro;
- u32 feehide;
+ uint32_t feesta;
+ uint32_t feemod;
+ uint32_t feecon;
+ uint32_t feedat;
+ uint32_t feeadr;
+ uint32_t feesign;
+ uint32_t feepro;
+ uint32_t feehide;
} ADUC702x_FLASH_MMIO;
typedef struct
@@ -111,7 +111,7 @@
//aduc7026_flash_bank_t *aduc7026_info = bank->driver_priv;
int i = 0;
- u32 offset = 0;
+ uint32_t offset = 0;
// sector size is 512
bank->num_sectors = bank->size / 512;
@@ -139,7 +139,7 @@
//int res;
int x;
int count;
- //u32 v;
+ //uint32_t v;
target_t *target = bank->target;
aduc702x_set_write_enable(target, 1);
@@ -193,13 +193,13 @@
return ERROR_FLASH_OPERATION_FAILED;
}
-static int aduc702x_write_block(struct flash_bank_s *bank, uint8_t *buffer, u32 offset, u32 count)
+static int aduc702x_write_block(struct flash_bank_s *bank, uint8_t *buffer, uint32_t offset, uint32_t count)
{
aduc702x_flash_bank_t *aduc702x_info = bank->driver_priv;
target_t *target = bank->target;
- u32 buffer_size = 7000;
+ uint32_t buffer_size = 7000;
working_area_t *source;
- u32 address = bank->base + offset;
+ uint32_t address = bank->base + offset;
reg_param_t reg_params[6];
armv4_5_algorithm_t armv4_5_info;
int retval = ERROR_OK;
@@ -218,7 +218,7 @@
r6 - set to 2, used to write flash command
*/
- u32 aduc702x_flash_write_code[] = {
+ uint32_t aduc702x_flash_write_code[] = {
//<_start>:
0xe3a05008, // mov r5, #8 ; 0x8
0xe5845004, // str r5, [r4, #4]
@@ -279,7 +279,7 @@
while (count > 0)
{
- u32 thisrun_count = (count > (buffer_size / 2)) ? (buffer_size / 2) : count;
+ uint32_t thisrun_count = (count > (buffer_size / 2)) ? (buffer_size / 2) : count;
target_write_buffer(target, source->address, thisrun_count * 2, buffer);
@@ -322,9 +322,9 @@
/* All-JTAG, single-access method. Very slow. Used only if there is no
* working area available. */
-static int aduc702x_write_single(struct flash_bank_s *bank, uint8_t *buffer, u32 offset, u32 count)
+static int aduc702x_write_single(struct flash_bank_s *bank, uint8_t *buffer, uint32_t offset, uint32_t count)
{
- u32 x;
+ uint32_t x;
uint8_t b;
target_t *target = bank->target;
@@ -363,7 +363,7 @@
return ERROR_OK;
}
-int aduc702x_write(struct flash_bank_s *bank, uint8_t *buffer, u32 offset, u32 count)
+int aduc702x_write(struct flash_bank_s *bank, uint8_t *buffer, uint32_t offset, uint32_t count)
{
int retval;
Modified: trunk/src/flash/at91sam7.c
===================================================================
--- trunk/src/flash/at91sam7.c 2009-06-18 07:09:35 UTC (rev 2279)
+++ trunk/src/flash/at91sam7.c 2009-06-18 07:10:25 UTC (rev 2280)
@@ -47,16 +47,16 @@
static int at91sam7_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank);
static int at91sam7_erase(struct flash_bank_s *bank, int first, int last);
static int at91sam7_protect(struct flash_bank_s *bank, int set, int first, int last);
-static int at91sam7_write(struct flash_bank_s *bank, uint8_t *buffer, u32 offset, u32 count);
+static int at91sam7_write(struct flash_bank_s *bank, uint8_t *buffer, uint32_t offset, uint32_t count);
static int at91sam7_probe(struct flash_bank_s *bank);
//static int at91sam7_auto_probe(struct flash_bank_s *bank);
static int at91sam7_erase_check(struct flash_bank_s *bank);
static int at91sam7_protect_check(struct flash_bank_s *bank);
static int at91sam7_info(struct flash_bank_s *bank, char *buf, int buf_size);
-static u32 at91sam7_get_flash_status(target_t *target, int bank_number);
+static uint32_t at91sam7_get_flash_status(target_t *target, int bank_number);
static void at91sam7_set_flash_mode(flash_bank_t *bank, int mode);
-static u32 at91sam7_wait_status_busy(flash_bank_t *bank, u32 waitbits, int timeout);
+static uint32_t at91sam7_wait_status_busy(flash_bank_t *bank, uint32_t waitbits, int timeout);
static int at91sam7_flash_command(struct flash_bank_s *bank, uint8_t cmd, uint16_t pagen);
static int at91sam7_handle_gpnvm_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
@@ -75,9 +75,9 @@
.info = at91sam7_info
};
-static u32 MC_FMR[4] = { 0xFFFFFF60, 0xFFFFFF70, 0xFFFFFF80, 0xFFFFFF90 };
-static u32 MC_FCR[4] = { 0xFFFFFF64, 0xFFFFFF74, 0xFFFFFF84, 0xFFFFFF94 };
-static u32 MC_FSR[4] = { 0xFFFFFF68, 0xFFFFFF78, 0xFFFFFF88, 0xFFFFFF98 };
+static uint32_t MC_FMR[4] = { 0xFFFFFF60, 0xFFFFFF70, 0xFFFFFF80, 0xFFFFFF90 };
+static uint32_t MC_FCR[4] = { 0xFFFFFF64, 0xFFFFFF74, 0xFFFFFF84, 0xFFFFFF94 };
+static uint32_t MC_FSR[4] = { 0xFFFFFF68, 0xFFFFFF78, 0xFFFFFF88, 0xFFFFFF98 };
static char * EPROC[8]= {"Unknown","ARM946-E","ARM7TDMI","Unknown","ARM920T","ARM926EJ-S","Unknown","Unknown"};
@@ -111,9 +111,9 @@
return ERROR_OK;
}
-static u32 at91sam7_get_flash_status(target_t *target, int bank_number)
+static uint32_t at91sam7_get_flash_status(target_t *target, int bank_number)
{
- u32 fsr;
+ uint32_t fsr;
target_read_u32(target, MC_FSR[bank_number], &fsr);
return fsr;
@@ -124,7 +124,7 @@
{
at91sam7_flash_bank_t *at91sam7_info = bank->driver_priv;
target_t *target = bank->target;
- u32 mckr, mcfr, pllr, mor;
+ uint32_t mckr, mcfr, pllr, mor;
unsigned long tmp = 0, mainfreq;
/* Read Clock Generator Main Oscillator Register */
@@ -201,7 +201,7 @@
/* Setup the timimg registers for nvbits or normal flash */
static void at91sam7_set_flash_mode(flash_bank_t *bank, int mode)
{
- u32 fmr, fmcn = 0, fws = 0;
+ uint32_t fmr, fmcn = 0, fws = 0;
at91sam7_flash_bank_t *at91sam7_info = bank->driver_priv;
target_t *target = bank->target;
@@ -247,9 +247,9 @@
at91sam7_info->flashmode = mode;
}
-static u32 at91sam7_wait_status_busy(flash_bank_t *bank, u32 waitbits, int timeout)
+static uint32_t at91sam7_wait_status_busy(flash_bank_t *bank, uint32_t waitbits, int timeout)
{
- u32 status;
+ uint32_t status;
while ((!((status = at91sam7_get_flash_status(bank->target, bank->bank_number)) & waitbits)) && (timeout-- > 0))
{
@@ -276,7 +276,7 @@
/* Send one command to the AT91SAM flash controller */
static int at91sam7_flash_command(struct flash_bank_s *bank, uint8_t cmd, uint16_t pagen)
{
- u32 fcr;
+ uint32_t fcr;
at91sam7_flash_bank_t *at91sam7_info = bank->driver_priv;
target_t *target = bank->target;
@@ -311,15 +311,15 @@
uint16_t bnk, sec;
uint16_t arch;
- u32 cidr;
+ uint32_t cidr;
uint8_t banks_num = 0;
uint16_t num_nvmbits = 0;
uint16_t sectors_num = 0;
uint16_t pages_per_sector = 0;
uint16_t page_size = 0;
- u32 ext_freq;
- u32 bank_size;
- u32 base_address = 0;
+ uint32_t ext_freq;
+ uint32_t bank_size;
+ uint32_t base_address = 0;
char *target_name = "Unknown";
at91sam7_info = t_bank->driver_priv;
@@ -622,7 +622,7 @@
{
target_t *target = bank->target;
uint16_t retval;
- u32 blank;
+ uint32_t blank;
uint16_t fast_check;
uint8_t *buffer;
uint16_t nSector;
@@ -687,7 +687,7 @@
static int at91sam7_protect_check(struct flash_bank_s *bank)
{
uint8_t lock_pos, gpnvm_pos;
- u32 status;
+ uint32_t status;
at91sam7_flash_bank_t *at91sam7_info = bank->driver_priv;
@@ -750,9 +750,9 @@
at91sam7_flash_bank_t *at91sam7_info;
target_t *target = t_bank->target;
- u32 base_address;
- u32 bank_size;
- u32 ext_freq;
+ uint32_t base_address;
+ uint32_t bank_size;
+ uint32_t ext_freq;
int chip_width;
int bus_width;
@@ -860,7 +860,7 @@
{
at91sam7_flash_bank_t *at91sam7_info = bank->driver_priv;
int sec;
- u32 nbytes, pos;
+ uint32_t nbytes, pos;
uint8_t *buffer;
uint8_t erase_all;
@@ -926,9 +926,9 @@
static int at91sam7_protect(struct flash_bank_s *bank, int set, int first, int last)
{
- u32 cmd;
+ uint32_t cmd;
int sector;
- u32 pagen;
+ uint32_t pagen;
at91sam7_flash_bank_t *at91sam7_info = bank->driver_priv;
@@ -974,13 +974,13 @@
return ERROR_OK;
}
-static int at91sam7_write(struct flash_bank_s *bank, uint8_t *buffer, u32 offset, u32 count)
+static int at91sam7_write(struct flash_bank_s *bank, uint8_t *buffer, uint32_t offset, uint32_t count)
{
int retval;
at91sam7_flash_bank_t *at91sam7_info = bank->driver_priv;
target_t *target = bank->target;
- u32 dst_min_alignment, wcount, bytes_remaining = count;
- u32 first_page, last_page, pagen, buffer_pos;
+ uint32_t dst_min_alignment, wcount, bytes_remaining = count;
+ uint32_t first_page, last_page, pagen, buffer_pos;
if (at91sam7_info->cidr == 0)
{
@@ -1128,7 +1128,7 @@
flash_bank_t *bank;
int bit;
uint8_t flashcmd;
- u32 status;
+ uint32_t status;
at91sam7_flash_bank_t *at91sam7_info;
int retval;
Modified: trunk/src/flash/at91sam7.h
===================================================================
--- trunk/src/flash/at91sam7.h 2009-06-18 07:09:35 UTC (rev 2279)
+++ trunk/src/flash/at91sam7.h 2009-06-18 07:10:25 UTC (rev 2280)
@@ -28,7 +28,7 @@
typedef struct at91sam7_flash_bank_s
{
/* chip id register */
- u32 cidr;
+ uint32_t cidr;
uint16_t cidr_ext;
uint16_t cidr_nvptyp;
uint16_t cidr_arch;
@@ -62,10 +62,10 @@
/* main clock status */
uint8_t mck_valid;
- u32 mck_freq;
+ uint32_t mck_freq;
/* external clock frequency */
- u32 ext_freq;
+ uint32_t ext_freq;
} at91sam7_flash_bank_t;
Modified: trunk/src/flash/avrf.c
===================================================================
--- trunk/src/flash/avrf.c 2009-06-18 07:09:35 UTC (rev 2279)
+++ trunk/src/flash/avrf.c 2009-06-18 07:10:25 UTC (rev 2280)
@@ -60,7 +60,7 @@
static int avrf_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank);
static int avrf_erase(struct flash_bank_s *bank, int first, int last);
static int avrf_protect(struct flash_bank_s *bank, int set, int first, int last);
-static int avrf_write(struct flash_bank_s *bank, uint8_t *buffer, u32 offset, u32 count);
+static int avrf_write(struct flash_bank_s *bank, uint8_t *buffer, uint32_t offset, uint32_t count);
static int avrf_probe(struct flash_bank_s *bank);
static int avrf_auto_probe(struct flash_bank_s *bank);
//static int avrf_handle_part_id_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
@@ -70,7 +70,7 @@
static int avrf_handle_mass_erase_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
extern int avr_jtag_sendinstr(jtag_tap_t *tap, uint8_t *ir_in, uint8_t ir_out);
-extern int avr_jtag_senddat(jtag_tap_t *tap, u32 *dr_in, u32 dr_out, int len);
+extern int avr_jtag_senddat(jtag_tap_t *tap, uint32_t *dr_in, uint32_t dr_out, int len);
extern int mcu_write_ir(jtag_tap_t *tap, uint8_t *ir_in, uint8_t *ir_out, int ir_len, int rti);
extern int mcu_write_dr(jtag_tap_t *tap, uint8_t *ir_in, uint8_t *ir_out, int dr_len, int rti);
@@ -78,8 +78,8 @@
extern int mcu_write_dr_u8(jtag_tap_t *tap, uint8_t *ir_in, uint8_t ir_out, int dr_len, int rti);
extern int mcu_write_ir_u16(jtag_tap_t *tap, uint16_t *ir_in, uint16_t ir_out, int ir_len, int rti);
extern int mcu_write_dr_u16(jtag_tap_t *tap, uint16_t *ir_in, uint16_t ir_out, int dr_len, int rti);
-extern int mcu_write_ir_u32(jtag_tap_t *tap, u32 *ir_in, u32 ir_out, int ir_len, int rti);
-extern int mcu_write_dr_u32(jtag_tap_t *tap, u32 *ir_in, u32 ir_out, int dr_len, int rti);
+extern int mcu_write_ir_u32(jtag_tap_t *tap, uint32_t *ir_in, uint32_t ir_out, int ir_len, int rti);
+extern int mcu_write_dr_u32(jtag_tap_t *tap, uint32_t *ir_in, uint32_t ir_out, int dr_len, int rti);
extern int mcu_execute_queue(void);
flash_driver_t avr_flash =
@@ -98,7 +98,7 @@
};
/* avr program functions */
-static int avr_jtag_reset(avr_common_t *avr, u32 reset)
+static int avr_jtag_reset(avr_common_t *avr, uint32_t reset)
{
avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_AVR_RESET);
avr_jtag_senddat(avr->jtag_info.tap, NULL, reset ,AVR_JTAG_REG_Reset_Len);
@@ -106,7 +106,7 @@
return ERROR_OK;
}
-static int avr_jtag_read_jtagid(avr_common_t *avr, u32 *id)
+static int avr_jtag_read_jtagid(avr_common_t *avr, uint32_t *id)
{
avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_IDCODE);
avr_jtag_senddat(avr->jtag_info.tap, id, 0, AVR_JTAG_REG_JTAGID_Len);
@@ -140,7 +140,7 @@
static int avr_jtagprg_chiperase(avr_common_t *avr)
{
- u32 poll_value;
+ uint32_t poll_value;
avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_COMMANDS);
avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x2380, AVR_JTAG_REG_ProgrammingCommand_Len);
@@ -161,9 +161,9 @@
return ERROR_OK;
}
-static int avr_jtagprg_writeflashpage(avr_common_t *avr, uint8_t *page_buf, u32 buf_size, u32 addr, u32 page_size)
+static int avr_jtagprg_writeflashpage(avr_common_t *avr, uint8_t *page_buf, uint32_t buf_size, uint32_t addr, uint32_t page_size)
{
- u32 i, poll_value;
+ uint32_t i, poll_value;
avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_COMMANDS);
avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x2310, AVR_JTAG_REG_ProgrammingCommand_Len);
@@ -249,11 +249,11 @@
return ERROR_OK;
}
-static int avrf_write(struct flash_bank_s *bank, uint8_t *buffer, u32 offset, u32 count)
+static int avrf_write(struct flash_bank_s *bank, uint8_t *buffer, uint32_t offset, uint32_t count)
{
target_t *target = bank->target;
avr_common_t *avr = target->arch_info;
- u32 cur_size, cur_buffer_size, page_size;
+ uint32_t cur_size, cur_buffer_size, page_size;
if (bank->target->state != TARGET_HALTED)
{
@@ -307,7 +307,7 @@
avr_common_t *avr = target->arch_info;
avrf_type_t *avr_info = NULL;
int i;
- u32 device_id;
+ uint32_t device_id;
if (bank->target->state != TARGET_HALTED)
{
@@ -388,7 +388,7 @@
avr_common_t *avr = target->arch_info;
avrf_type_t *avr_info = NULL;
int i;
- u32 device_id;
+ uint32_t device_id;
if (bank->target->state != TARGET_HALTED)
{
Modified: trunk/src/flash/cfi.c
===================================================================
--- trunk/src/flash/cfi.c 2009-06-18 07:09:35 UTC (rev 2279)
+++ trunk/src/flash/cfi.c 2009-06-18 07:10:25 UTC (rev 2280)
@@ -33,7 +33,7 @@
static int cfi_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank);
static int cfi_erase(struct flash_bank_s *bank, int first, int last);
static int cfi_protect(struct flash_bank_s *bank, int set, int first, int last);
-static int cfi_write(struct flash_bank_s *bank, uint8_t *buffer, u32 offset, u32 count);
+static int cfi_write(struct flash_bank_s *bank, uint8_t *buffer, uint32_t offset, uint32_t count);
static int cfi_probe(struct flash_bank_s *bank);
static int cfi_auto_probe(struct flash_bank_s *bank);
static int cfi_protect_check(struct flash_bank_s *bank);
@@ -109,8 +109,8 @@
}
}
-/* inline u32 flash_address(flash_bank_t *bank, int sector, u32 offset) */
-static __inline__ u32 flash_address(flash_bank_t *bank, int sector, u32 offset)
+/* inline uint32_t flash_address(flash_bank_t *bank, int sector, uint32_t offset) */
+static __inline__ uint32_t flash_address(flash_bank_t *bank, int sector, uint32_t offset)
{
cfi_flash_bank_t *cfi_info = bank->driver_priv;
@@ -161,7 +161,7 @@
* flash banks are expected to be made of similar chips
* the query result should be the same for all
*/
-static uint8_t cfi_query_u8(flash_bank_t *bank, int sector, u32 offset)
+static uint8_t cfi_query_u8(flash_bank_t *bank, int sector, uint32_t offset)
{
target_t *target = bank->target;
uint8_t data[CFI_MAX_BUS_WIDTH];
@@ -178,7 +178,7 @@
* in case of a bank made of multiple chips,
* the individual values are ORed
*/
-static uint8_t cfi_get_u8(flash_bank_t *bank, int sector, u32 offset)
+static uint8_t cfi_get_u8(flash_bank_t *bank, int sector, uint32_t offset)
{
target_t *target = bank->target;
uint8_t data[CFI_MAX_BUS_WIDTH];
@@ -203,7 +203,7 @@
}
}
-static uint16_t cfi_query_u16(flash_bank_t *bank, int sector, u32 offset)
+static uint16_t cfi_query_u16(flash_bank_t *bank, int sector, uint32_t offset)
{
target_t *target = bank->target;
cfi_flash_bank_t *cfi_info = bank->driver_priv;
@@ -225,7 +225,7 @@
return data[bank->bus_width - 1] | data[(2 * bank->bus_width) - 1] << 8;
}
-static u32 cfi_query_u32(flash_bank_t *bank, int sector, u32 offset)
+static uint32_t cfi_query_u32(flash_bank_t *bank, int sector, uint32_t offset)
{
target_t *target = bank->target;
cfi_flash_bank_t *cfi_info = bank->driver_priv;
@@ -979,7 +979,7 @@
/* NOTE:
* The data to flash must not be changed in endian! We write a bytestrem in
* target byte order already. Only the control and status byte lane of the flash
- * WSM is interpreted by the CPU in different ways, when read a uint16_t or u32
+ * WSM is interpreted by the CPU in different ways, when read a uint16_t or uint32_t
* word (data seems to be in the upper or lower byte lane for uint16_t accesses).
*/
@@ -1005,9 +1005,9 @@
/* Convert code image to target endian */
/* FIXME create general block conversion fcts in target.c?) */
-static void cfi_fix_code_endian(target_t *target, uint8_t *dest, const u32 *src, u32 count)
+static void cfi_fix_code_endian(target_t *target, uint8_t *dest, const uint32_t *src, uint32_t count)
{
- u32 i;
+ uint32_t i;
for (i=0; i< count; i++)
{
target_buffer_set_u32(target, dest, *src);
@@ -1016,7 +1016,7 @@
}
}
-static u32 cfi_command_val(flash_bank_t *bank, uint8_t cmd)
+static uint32_t cfi_command_val(flash_bank_t *bank, uint8_t cmd)
{
target_t *target = bank->target;
@@ -1039,15 +1039,15 @@
}
}
-static int cfi_intel_write_block(struct flash_bank_s *bank, uint8_t *buffer, u32 address, u32 count)
+static int cfi_intel_write_block(struct flash_bank_s *bank, uint8_t *buffer, uint32_t address, uint32_t count)
{
cfi_flash_bank_t *cfi_info = bank->driver_priv;
target_t *target = bank->target;
reg_param_t reg_params[7];
armv4_5_algorithm_t armv4_5_info;
working_area_t *source;
- u32 buffer_size = 32768;
- u32 write_command_val, busy_pattern_val, error_pattern_val;
+ uint32_t buffer_size = 32768;
+ uint32_t write_command_val, busy_pattern_val, error_pattern_val;
/* algorithm register usage:
* r0: source address (in RAM)
@@ -1059,7 +1059,7 @@
* r6: error test pattern
*/
- static const u32 word_32_code[] = {
+ static const uint32_t word_32_code[] = {
0xe4904004, /* loop: ldr r4, [r0], #4 */
0xe5813000, /* str r3, [r1] */
0xe5814000, /* str r4, [r1] */
@@ -1076,7 +1076,7 @@
0xeafffffe /* done: b -2 */
};
- static const u32 word_16_code[] = {
+ static const uint32_t word_16_code[] = {
0xe0d040b2, /* loop: ldrh r4, [r0], #2 */
0xe1c130b0, /* strh r3, [r1] */
0xe1c140b0, /* strh r4, [r1] */
@@ -1093,7 +1093,7 @@
0xeafffffe /* done: b -2 */
};
- static const u32 word_8_code[] = {
+ static const uint32_t word_8_code[] = {
0xe4d04001, /* loop: ldrb r4, [r0], #1 */
0xe5c13000, /* strb r3, [r1] */
0xe5c14000, /* strb r4, [r1] */
@@ -1110,8 +1110,8 @@
0xeafffffe /* done: b -2 */
};
uint8_t target_code[4*CFI_MAX_INTEL_CODESIZE];
- const u32 *target_code_src;
- u32 target_code_size;
+ const uint32_t *target_code_src;
+ uint32_t target_code_size;
int retval = ERROR_OK;
@@ -1208,8 +1208,8 @@
/* Programming main loop */
while (count > 0)
{
- u32 thisrun_count = (count > buffer_size) ? buffer_size : count;
- u32 wsm_error;
+ uint32_t thisrun_count = (count > buffer_size) ? buffer_size : count;
+ uint32_t wsm_error;
if((retval = target_write_buffer(target, source->address, thisrun_count, buffer)) != ERROR_OK)
{
@@ -1229,7 +1229,7 @@
/* Execute algorithm, assume breakpoint for last instruction */
retval = target_run_algorithm(target, 0, NULL, 7, reg_params,
cfi_info->write_algorithm->address,
- cfi_info->write_algorithm->address + target_code_size - sizeof(u32),
+ cfi_info->write_algorithm->address + target_code_size - sizeof(uint32_t),
10000, /* 10s should be enough for max. 32k of data */
&armv4_5_info);
@@ -1283,7 +1283,7 @@
return retval;
}
-static int cfi_spansion_write_block(struct flash_bank_s *bank, uint8_t *buffer, u32 address, u32 count)
+static int cfi_spansion_write_block(struct flash_bank_s *bank, uint8_t *buffer, uint32_t address, uint32_t count)
{
cfi_flash_bank_t *cfi_info = bank->driver_priv;
cfi_spansion_pri_ext_t *pri_ext = cfi_info->pri_ext;
@@ -1291,8 +1291,8 @@
reg_param_t reg_params[10];
armv4_5_algorithm_t armv4_5_info;
working_area_t *source;
- u32 buffer_size = 32768;
- u32 status;
+ uint32_t buffer_size = 32768;
+ uint32_t status;
int retval, retvaltemp;
int exit_code = ERROR_OK;
@@ -1313,7 +1313,7 @@
/* R10 = unlock2_addr */
/* R11 = unlock2_cmd */
- static const u32 word_32_code[] = {
+ static const uint32_t word_32_code[] = {
/* 00008100 <sp_32_code>: */
0xe4905004, /* ldr r5, [r0], #4 */
0xe5889000, /* str r9, [r8] */
@@ -1347,7 +1347,7 @@
0xeafffffe /* b 8154 <sp_32_done> */
};
- static const u32 word_16_code[] = {
+ static const uint32_t word_16_code[] = {
/* 00008158 <sp_16_code>: */
0xe0d050b2, /* ldrh r5, [r0], #2 */
0xe1c890b0, /* strh r9, [r8] */
@@ -1381,7 +1381,7 @@
0xeafffffe /* b 81ac <sp_16_done> */
};
- static const u32 word_8_code[] = {
+ static const uint32_t word_8_code[] = {
/* 000081b0 <sp_16_code_end>: */
0xe4d05001, /* ldrb r5, [r0], #1 */
0xe5c89000, /* strb r9, [r8] */
@@ -1424,7 +1424,7 @@
{
uint8_t *target_code;
int target_code_size;
- const u32 *src;
+ const uint32_t *src;
/* convert bus-width dependent algorithm code to correct endiannes */
switch (bank->bus_width)
@@ -1496,7 +1496,7 @@
while (count > 0)
{
- u32 thisrun_count = (count > buffer_size) ? buffer_size : count;
+ uint32_t thisrun_count = (count > buffer_size) ? buffer_size : count;
retvaltemp = target_write_buffer(target, source->address, thisrun_count, buffer);
@@ -1545,7 +1545,7 @@
return exit_code;
}
-static int cfi_intel_write_word(struct flash_bank_s *bank, uint8_t *word, u32 address)
+static int cfi_intel_write_word(struct flash_bank_s *bank, uint8_t *word, uint32_t address)
{
int retval;
cfi_flash_bank_t *cfi_info = bank->driver_priv;
@@ -1579,7 +1579,7 @@
return ERROR_OK;
}
-static int cfi_intel_write_words(struct flash_bank_s *bank, uint8_t *word, u32 wordcount, u32 address)
+static int cfi_intel_write_words(struct flash_bank_s *bank, uint8_t *word, uint32_t wordcount, uint32_t address)
{
int retval;
cfi_flash_bank_t *cfi_info = bank->driver_priv;
@@ -1587,9 +1587,9 @@
uint8_t command[8];
/* Calculate buffer size and boundary mask */
- u32 buffersize = (1UL << cfi_info->max_buf_write_size) * (bank->bus_width / bank->chip_width);
- u32 buffermask = buffersize-1;
- u32 bufferwsize;
+ uint32_t buffersize = (1UL << cfi_info->max_buf_write_size) * (bank->bus_width / bank->chip_width);
+ uint32_t buffermask = buffersize-1;
+ uint32_t bufferwsize;
/* Check for valid range */
if (address & buffermask)
@@ -1671,7 +1671,7 @@
return ERROR_OK;
}
-static int cfi_spansion_write_word(struct flash_bank_s *bank, uint8_t *word, u32 address)
+static int cfi_spansion_write_word(struct flash_bank_s *bank, uint8_t *word, uint32_t address)
{
int retval;
cfi_flash_bank_t *cfi_info = bank->driver_priv;
@@ -1717,7 +1717,7 @@
return ERROR_OK;
}
-static int cfi_spansion_write_words(struct flash_bank_s *bank, uint8_t *word, u32 wordcount, u32 address)
+static int cfi_spansion_write_words(struct flash_bank_s *bank, uint8_t *word, uint32_t wordcount, uint32_t address)
{
int retval;
cfi_flash_bank_t *cfi_info = bank->driver_priv;
@@ -1726,9 +1726,9 @@
cfi_spansion_pri_ext_t *pri_ext = cfi_info->pri_ext;
/* Calculate buffer size and boundary mask */
- u32 buffersize = (1UL << cfi_info->max_buf_write_size) * (bank->bus_width / bank->chip_width);
- u32 buffermask = buffersize-1;
- u32 bufferwsize;
+ uint32_t buffersize = (1UL << cfi_info->max_buf_write_size) * (bank->bus_width / bank->chip_width);
+ uint32_t buffermask = buffersize-1;
+ uint32_t bufferwsize;
/* Check for valid range */
if (address & buffermask)
@@ -1809,7 +1809,7 @@
return ERROR_OK;
}
-static int cfi_write_word(struct flash_bank_s *bank, uint8_t *word, u32 address)
+static int cfi_write_word(struct flash_bank_s *bank, uint8_t *word, uint32_t address)
{
cfi_flash_bank_t *cfi_info = bank->driver_priv;
@@ -1830,7 +1830,7 @@
return ERROR_FLASH_OPERATION_FAILED;
}
-static int cfi_write_words(struct flash_bank_s *bank, uint8_t *word, u32 wordcount, u32 address)
+static int cfi_write_words(struct flash_bank_s *bank, uint8_t *word, uint32_t wordcount, uint32_t address)
{
cfi_flash_bank_t *cfi_info = bank->driver_priv;
@@ -1851,12 +1851,12 @@
return ERROR_FLASH_OPERATION_FAILED;
}
-int cfi_write(struct flash_bank_s *bank, uint8_t *buffer, u32 offset, u32 count)
+int cfi_write(struct flash_bank_s *bank, uint8_t *buffer, uint32_t offset, uint32_t count)
{
cfi_flash_bank_t *cfi_info = bank->driver_priv;
target_t *target = bank->target;
- u32 address = bank->base + offset; /* address of first byte to be programmed */
- u32 write_p, copy_p;
+ uint32_t address = bank->base + offset; /* address of first byte to be programmed */
+ uint32_t write_p, copy_p;
int align; /* number of unaligned bytes */
int blk_count; /* number of bus_width bytes for block copy */
uint8_t current_word[CFI_MAX_BUS_WIDTH * 4]; /* word (bus_width size) currently being programmed */
@@ -1950,9 +1950,9 @@
if (retval == ERROR_TARGET_RESOURCE_NOT_AVAILABLE)
{
//adjust buffersize for chip width
- u32 buffersize = (1UL << cfi_info->max_buf_write_size) * (bank->bus_width / bank->chip_width);
- u32 buffermask = buffersize-1;
- u32 bufferwsize;
+ uint32_t buffersize = (1UL << cfi_info->max_buf_write_size) * (bank->bus_width / bank->chip_width);
+ uint32_t buffermask = buffersize-1;
+ uint32_t bufferwsize;
switch(bank->chip_width)
{
@@ -1967,7 +1967,7 @@
bufferwsize/=(bank->bus_width / bank->chip_width);
/* fall back to memory writes */
- while (count >= (u32)bank->bus_width)
+ while (count >= (uint32_t)bank->bus_width)
{
int fallback;
if ((write_p & 0xff) == 0)
@@ -2083,7 +2083,7 @@
for (i = 0; i < cfi_info->num_erase_regions / 2; i++)
{
int j = (cfi_info->num_erase_regions - 1) - i;
- u32 swap;
+ uint32_t swap;
swap = cfi_info->erase_region_info[i];
cfi_info->erase_region_info[i] = cfi_info->erase_region_info[j];
@@ -2110,8 +2110,8 @@
int num_sectors = 0;
int i;
int sector = 0;
- u32 unlock1 = 0x555;
- u32 unlock2 = 0x2aa;
+ uint32_t unlock1 = 0x555;
+ uint32_t unlock2 = 0x2aa;
int retval;
if (bank->target->state != TARGET_HALTED)
@@ -2353,7 +2353,7 @@
}
else
{
- u32 offset = 0;
+ uint32_t offset = 0;
for (i = 0; i < cfi_info->num_erase_regions; i++)
{
@@ -2365,7 +2365,7 @@
for (i = 0; i < cfi_info->num_erase_regions; i++)
{
- u32 j;
+ uint32_t j;
for (j = 0; j < (cfi_info->erase_region_info[i] & 0xffff) + 1; j++)
{
bank->sectors[sector].offset = offset;
Modified: trunk/src/flash/cfi.h
===================================================================
--- trunk/src/flash/cfi.h 2009-06-18 07:09:35 UTC (rev 2279)
+++ trunk/src/flash/cfi.h 2009-06-18 07:10:25 UTC (rev 2280)
@@ -62,11 +62,11 @@
uint8_t status_poll_mask;
/* flash geometry */
- u32 dev_size;
+ uint32_t dev_size;
uint16_t interface_desc;
uint16_t max_buf_write_size;
uint8_t num_erase_regions;
- u32 *erase_region_info;
+ uint32_t *erase_region_info;
void *pri_ext;
void *alt_ext;
@@ -81,7 +81,7 @@
char pri[3];
uint8_t major_version;
uint8_t minor_version;
- u32 feature_support;
+ uint32_t feature_support;
uint8_t suspend_cmd_support;
uint16_t blk_status_reg_mask;
uint8_t vcc_optimal;
@@ -113,8 +113,8 @@
uint8_t VppMax;
uint8_t TopBottom;
int _reversed_geometry;
- u32 _unlock1;
- u32 _unlock2;
+ uint32_t _unlock1;
+ uint32_t _unlock2;
} cfi_spansion_pri_ext_t;
/* Atmel primary extended query table as defined for and used by
@@ -138,8 +138,8 @@
typedef struct cfi_unlock_addresses_s
{
- u32 unlock1;
- u32 unlock2;
+ uint32_t unlock1;
+ uint32_t unlock2;
} cfi_unlock_addresses_t;
typedef struct cfi_fixup_s
Modified: trunk/src/flash/davinci_nand.c
===================================================================
--- trunk/src/flash/davinci_nand.c 2009-06-18 07:09:35 UTC (rev 2279)
+++ trunk/src/flash/davinci_nand.c 2009-06-18 07:10:25 UTC (rev 2280)
@@ -44,18 +44,18 @@
uint8_t eccmode;
/* Async EMIF controller base */
- u32 aemif;
+ uint32_t aemif;
/* NAND chip addresses */
- u32 data; /* without CLE or ALE */
- u32 cmd; /* with CLE */
- u32 addr; /* with ALE */
+ uint32_t data; /* without CLE or ALE */
+ uint32_t cmd; /* with CLE */
+ uint32_t addr; /* with ALE */
/* page i/o for the relevant flavor of hardware ECC */
- int (*read_page)(struct nand_device_s *nand, u32 page,
- uint8_t *data, u32 data_size, uint8_t *oob, u32 oob_size);
- int (*write_page)(struct nand_device_s *nand, u32 page,
- uint8_t *data, u32 data_size, uint8_t *oob, u32 oob_size);
+ int (*read_page)(struct nand_device_s *nand, uint32_t page,
+ uint8_t *data, uint32_t data_size, uint8_t *oob, uint32_t oob_size);
+ int (*write_page)(struct nand_device_s *nand, uint32_t page,
+ uint8_t *data, uint32_t data_size, uint8_t *oob, uint32_t oob_size);
};
#define NANDFCR 0x60 /* flash control register */
@@ -84,7 +84,7 @@
{
struct davinci_nand *info = nand->controller_priv;
target_t *target = info->target;
- u32 nandfcr;
+ uint32_t nandfcr;
if (!halted(target, "init"))
return ERROR_NAND_OPERATION_FAILED;
@@ -114,7 +114,7 @@
{
struct davinci_nand *info = nand->controller_priv;
target_t *target = info->target;
- u32 nandfsr;
+ uint32_t nandfsr;
/* NOTE: return code is zero/error, else success; not ERROR_* */
@@ -188,8 +188,8 @@
{
struct davinci_nand *info = nand->controller_priv;
target_t *target = info->target;
- u32 nfdata = info->data;
- u32 tmp;
+ uint32_t nfdata = info->data;
+ uint32_t tmp;
if (!halted(target, "read_block"))
return ERROR_NAND_OPERATION_FAILED;
@@ -221,8 +221,8 @@
{
struct davinci_nand *info = nand->controller_priv;
target_t *target = info->target;
- u32 nfdata = info->data;
- u32 tmp;
+ uint32_t nfdata = info->data;
+ uint32_t tmp;
if (!halted(target, "write_block"))
return ERROR_NAND_OPERATION_FAILED;
@@ -245,8 +245,8 @@
return ERROR_OK;
}
-static int davinci_write_page(struct nand_device_s *nand, u32 page,
- uint8_t *data, u32 data_size, uint8_t *oob, u32 oob_size)
+static int davinci_write_page(struct nand_device_s *nand, uint32_t page,
+ uint8_t *data, uint32_t data_size, uint8_t *oob, uint32_t oob_size)
{
struct davinci_nand *info = nand->controller_priv;
uint8_t *ooballoc = NULL;
@@ -290,8 +290,8 @@
return status;
}
-static int davinci_read_page(struct nand_device_s *nand, u32 page,
- uint8_t *data, u32 data_size, uint8_t *oob, u32 oob_size)
+static int davinci_read_page(struct nand_device_s *nand, uint32_t page,
+ uint8_t *data, uint32_t data_size, uint8_t *oob, uint32_t oob_size)
{
struct davinci_nand *info = nand->controller_priv;
@@ -303,7 +303,7 @@
return info->read_page(nand, page, data, data_size, oob, oob_size);
}
-static void davinci_write_pagecmd(struct nand_device_s *nand, uint8_t cmd, u32 page)
+static void davinci_write_pagecmd(struct nand_device_s *nand, uint8_t cmd, uint32_t page)
{
struct davinci_nand *info = nand->controller_priv;
target_t *target = info->target;
@@ -327,7 +327,7 @@
}
static int davinci_writepage_tail(struct nand_device_s *nand,
- uint8_t *oob, u32 oob_size)
+ uint8_t *oob, uint32_t oob_size)
{
struct davinci_nand *info = nand->controller_priv;
target_t *target = info->target;
@@ -358,15 +358,15 @@
/*
* All DaVinci family chips support 1-bit ECC on a per-chipselect basis.
*/
-static int davinci_write_page_ecc1(struct nand_device_s *nand, u32 page,
- uint8_t *data, u32 data_size, uint8_t *oob, u32 oob_size)
+static int davinci_write_page_ecc1(struct nand_device_s *nand, uint32_t page,
+ uint8_t *data, uint32_t data_size, uint8_t *oob, uint32_t oob_size)
{
unsigned oob_offset;
struct davinci_nand *info = nand->controller_priv;
target_t *target = info->target;
- const u32 fcr_addr = info->aemif + NANDFCR;
- const u32 ecc1_addr = info->aemif + NANDFECC + info->chipsel;
- u32 fcr, ecc1;
+ const uint32_t fcr_addr = info->aemif + NANDFCR;
+ const uint32_t ecc1_addr = info->aemif + NANDFECC + info->chipsel;
+ uint32_t fcr, ecc1;
/* Write contiguous ECC bytes starting at specified offset.
* NOTE: Linux reserves twice as many bytes as we need; and
@@ -425,8 +425,8 @@
* is read first, so its ECC data can be used incrementally), but the
* manufacturer bad block markers are safe. Contrast: old "infix" style.
*/
-static int davinci_write_page_ecc4(struct nand_device_s *nand, u32 page,
- uint8_t *data, u32 data_size, uint8_t *oob, u32 oob_size)
+static int davinci_write_page_ecc4(struct nand_device_s *nand, uint32_t page,
+ uint8_t *data, uint32_t data_size, uint8_t *oob, uint32_t oob_size)
{
static const uint8_t ecc512[] = {
0, 1, 2, 3, 4, /* 5== mfr badblock */
@@ -452,9 +452,9 @@
struct davinci_nand *info = nand->controller_priv;
const uint8_t *l;
target_t *target = info->target;
- const u32 fcr_addr = info->aemif + NANDFCR;
- const u32 ecc4_addr = info->aemif + NAND4BITECC;
- u32 fcr, ecc4;
+ const uint32_t fcr_addr = info->aemif + NANDFCR;
+ const uint32_t ecc4_addr = info->aemif + NAND4BITECC;
+ uint32_t fcr, ecc4;
/* Use the same ECC layout Linux uses. For small page chips
* it's a bit cramped.
@@ -485,7 +485,7 @@
fcr |= (1 << 12) | (info->chipsel << 4);
do {
- u32 raw_ecc[4], *p;
+ uint32_t raw_ecc[4], *p;
int i;
/* start 4bit ecc on csX */
@@ -527,14 +527,14 @@
* older second stage loaders (ABL/U-Boot, etc) or other system software
* (MVL 4.x/5.x kernels, filesystems, etc) may need it more generally.
*/
-static int davinci_write_page_ecc4infix(struct nand_device_s *nand, u32 page,
- uint8_t *data, u32 data_size, uint8_t *oob, u32 oob_size)
+static int davinci_write_page_ecc4infix(struct nand_device_s *nand, uint32_t page,
+ uint8_t *data, uint32_t data_size, uint8_t *oob, uint32_t oob_size)
{
struct davinci_nand *info = nand->controller_priv;
target_t *target = info->target;
- const u32 fcr_addr = info->aemif + NANDFCR;
- const u32 ecc4_addr = info->aemif + NAND4BITECC;
- u32 fcr, ecc4;
+ const uint32_t fcr_addr = info->aemif + NANDFCR;
+ const uint32_t ecc4_addr = info->aemif + NAND4BITECC;
+ uint32_t fcr, ecc4;
davinci_write_pagecmd(nand, NAND_CMD_SEQIN, page);
@@ -546,7 +546,7 @@
fcr |= (1 << 12) | (info->chipsel << 4);
do {
- u32 raw_ecc[4], *p;
+ uint32_t raw_ecc[4], *p;
uint8_t *l;
int i;
@@ -584,8 +584,8 @@
return davinci_writepage_tail(nand, NULL, 0);
}
-static int davinci_read_page_ecc4infix(struct nand_device_s *nand, u32 page,
- uint8_t *data, u32 data_size, uint8_t *oob, u32 oob_size)
+static int davinci_read_page_ecc4infix(struct nand_device_s *nand, uint32_t page,
+ uint8_t *data, uint32_t data_size, uint8_t *oob, uint32_t oob_size)
{
davinci_write_pagecmd(nand, NAND_CMD_READ0, page);
Modified: trunk/src/flash/ecos.c
===================================================================
--- trunk/src/flash/ecos.c 2009-06-18 07:09:35 UTC (rev 2279)
+++ trunk/src/flash/ecos.c 2009-06-18 07:10:25 UTC (rev 2280)
@@ -30,15 +30,15 @@
static int ecosflash_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank);
static int ecosflash_erase(struct flash_bank_s *bank, int first, int last);
static int ecosflash_protect(struct flash_bank_s *bank, int set, int first, int last);
-static int ecosflash_write(struct flash_bank_s *bank, uint8_t *buffer, u32 offset, u32 count);
+static int ecosflash_write(struct flash_bank_s *bank, uint8_t *buffer, uint32_t offset, uint32_t count);
static int ecosflash_probe(struct flash_bank_s *bank);
static int ecosflash_protect_check(struct flash_bank_s *bank);
static int ecosflash_info(struct flash_bank_s *bank, char *buf, int buf_size);
#if 0
-static u32 ecosflash_get_flash_status(flash_bank_t *bank);
+static uint32_t ecosflash_get_flash_status(flash_bank_t *bank);
static void ecosflash_set_flash_mode(flash_bank_t *bank,int mode);
-static u32 ecosflash_wait_status_busy(flash_bank_t *bank, u32 waitbits, int timeout);
+static uint32_t ecosflash_wait_status_busy(flash_bank_t *bank, uint32_t waitbits, int timeout);
static int ecosflash_handle_gpnvm_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
#endif
@@ -63,7 +63,7 @@
working_area_t *write_algorithm;
working_area_t *erase_check_algorithm;
char *driverPath;
- u32 start_address;
+ uint32_t start_address;
} ecosflash_flash_bank_t;
static const int sectorSize=0x10000;
@@ -152,7 +152,7 @@
* driver.
*/
int i = 0;
- u32 offset = 0;
+ uint32_t offset = 0;
bank->num_sectors=bank->size/sectorSize;
bank->sectors = malloc(sizeof(flash_sector_t) * bank->num_sectors);
for (i = 0; i < bank->num_sectors; i++)
@@ -175,8 +175,8 @@
static int loadDriver(ecosflash_flash_bank_t *info)
{
- u32 buf_cnt;
- u32 image_size;
+ uint32_t buf_cnt;
+ uint32_t image_size;
image_t image;
image.base_address_set = 0;
@@ -223,8 +223,8 @@
static int const OFFSET_GET_WORKAREA_SIZE=0x4;
static int runCode(ecosflash_flash_bank_t *info,
- u32 codeStart, u32 codeStop, u32 r0, u32 r1, u32 r2,
- u32 *result,
+ uint32_t codeStart, uint32_t codeStop, uint32_t r0, uint32_t r1, uint32_t r2,
+ uint32_t *result,
/* timeout in ms */
int timeout)
{
@@ -263,7 +263,7 @@
return ERROR_OK;
}
-static int eCosBoard_erase(ecosflash_flash_bank_t *info, u32 address, u32 len)
+static int eCosBoard_erase(ecosflash_flash_bank_t *info, uint32_t address, uint32_t len)
{
int retval;
int timeout = (len / 20480 + 1) * 1000; /*asume 20 KB/s*/
@@ -272,7 +272,7 @@
if (retval!=ERROR_OK)
return retval;
- u32 flashErr;
+ uint32_t flashErr;
retval=runCode(info,
info->start_address+OFFSET_ERASE,
info->start_address+OFFSET_ERASE+OFFSET_ERASE_SIZE,
@@ -294,7 +294,7 @@
return ERROR_OK;
}
-static int eCosBoard_flash(ecosflash_flash_bank_t *info, void *data, u32 address, u32 len)
+static int eCosBoard_flash(ecosflash_flash_bank_t *info, void *data, uint32_t address, uint32_t len)
{
target_t *target=info->target;
const int chunk=8192;
@@ -305,7 +305,7 @@
if (retval!=ERROR_OK)
return retval;
- u32 buffer;
+ uint32_t buffer;
retval=runCode(info,
info->start_address+OFFSET_GET_WORKAREA,
info->start_address+OFFSET_GET_WORKAREA+OFFSET_GET_WORKAREA_SIZE,
@@ -318,7 +318,7 @@
return retval;
- u32 i;
+ uint32_t i;
for (i=0; i<len; i+=chunk)
{
int t=len-i;
@@ -332,7 +332,7 @@
if (retval != ERROR_OK)
return retval;
- u32 flashErr;
+ uint32_t flashErr;
retval=runCode(info,
info->start_address+OFFSET_FLASH,
info->start_address+OFFSET_FLASH+OFFSET_FLASH_SIZE,
@@ -389,9 +389,9 @@
#endif
#if 0
-static u32 ecosflash_address(struct flash_bank_s *bank, u32 address)
+static uint32_t ecosflash_address(struct flash_bank_s *bank, uint32_t address)
{
- u32 retval = 0;
+ uint32_t retval = 0;
switch(bank->bus_width)
{
case 4:
@@ -418,7 +418,7 @@
return ERROR_OK;
}
-static int ecosflash_write(struct flash_bank_s *bank, uint8_t *buffer, u32 offset, u32 count)
+static int ecosflash_write(struct flash_bank_s *bank, uint8_t *buffer, uint32_t offset, uint32_t count)
{
ecosflash_flash_bank_t *info = bank->driver_priv;
struct flash_bank_s *c=bank;
@@ -438,7 +438,7 @@
}
#if 0
-static u32 ecosflash_get_flash_status(flash_bank_t *bank)
+static uint32_t ecosflash_get_flash_status(flash_bank_t *bank)
{
return ERROR_OK;
}
@@ -448,7 +448,7 @@
}
-static u32 ecosflash_wait_status_busy(flash_bank_t *bank, u32 waitbits, int timeout)
+static uint32_t ecosflash_wait_status_busy(flash_bank_t *bank, uint32_t waitbits, int timeout)
{
return ERROR_OK;
}
Modified: trunk/src/flash/flash.c
===================================================================
--- trunk/src/flash/flash.c 2009-06-18 07:09:35 UTC (rev 2279)
+++ trunk/src/flash/flash.c 2009-06-18 07:10:25 UTC (rev 2280)
@@ -85,7 +85,7 @@
static command_t *flash_cmd;
/* wafer thin wrapper for invoking the flash driver */
-static int flash_driver_write(struct flash_bank_s *bank, uint8_t *buffer, u32 offset, u32 count)
+static int flash_driver_write(struct flash_bank_s *bank, uint8_t *buffer, uint32_t offset, uint32_t count)
{
int retval;
@@ -330,7 +330,7 @@
static int handle_flash_info_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
{
flash_bank_t *p;
- u32 i = 0;
+ uint32_t i = 0;
int j = 0;
int retval;
@@ -624,7 +624,7 @@
target_t *target = get_current_target(cmd_ctx);
image_t image;
- u32 written;
+ uint32_t written;
duration_t duration;
char *duration_text;
@@ -707,19 +707,19 @@
static int handle_flash_fill_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
{
int err = ERROR_OK, retval;
- u32 address;
- u32 pattern;
- u32 count;
+ uint32_t address;
+ uint32_t pattern;
+ uint32_t count;
uint8_t chunk[1024];
uint8_t readback[1024];
- u32 wrote = 0;
- u32 cur_size = 0;
- u32 chunk_count;
+ uint32_t wrote = 0;
+ uint32_t cur_size = 0;
+ uint32_t chunk_count;
char *duration_text;
duration_t duration;
target_t *target = get_current_target(cmd_ctx);
- u32 i;
- u32 wordsize;
+ uint32_t i;
+ uint32_t wordsize;
if (argc != 3)
{
@@ -822,9 +822,9 @@
static int handle_flash_write_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
{
- u32 offset;
+ uint32_t offset;
uint8_t *buffer;
- u32 buf_cnt;
+ uint32_t buf_cnt;
fileio_t fileio;
@@ -901,7 +901,7 @@
}
/* lookup flash bank by address */
-flash_bank_t *get_flash_bank_by_addr(target_t *target, u32 addr)
+flash_bank_t *get_flash_bank_by_addr(target_t *target, uint32_t addr)
{
flash_bank_t *c;
@@ -925,7 +925,7 @@
}
/* erase given flash region, selects proper bank according to target and address */
-int flash_erase_address_range(target_t *target, u32 addr, u32 length)
+int flash_erase_address_range(target_t *target, uint32_t addr, uint32_t length)
{
flash_bank_t *c;
int first = -1;
@@ -974,12 +974,12 @@
}
/* write (optional verify) an image to flash memory of the given target */
-int flash_write(target_t *target, image_t *image, u32 *written, int erase)
+int flash_write(target_t *target, image_t *image, uint32_t *written, int erase)
{
int retval=ERROR_OK;
int section;
- u32 section_offset;
+ uint32_t section_offset;
flash_bank_t *c;
int *padding;
@@ -1003,12 +1003,12 @@
/* loop until we reach end of the image */
while (section < image->num_sections)
{
- u32 buffer_size;
+ uint32_t buffer_size;
uint8_t *buffer;
int section_first;
int section_last;
- u32 run_address = image->sections[section].base_address + section_offset;
- u32 run_size = image->sections[section].size - section_offset;
+ uint32_t run_address = image->sections[section].base_address + section_offset;
+ uint32_t run_size = image->sections[section].size - section_offset;
int pad_bytes = 0;
if (image->sections[section].size == 0)
@@ -1067,7 +1067,7 @@
/* read sections to the buffer */
while (buffer_size < run_size)
{
- u32 size_read;
+ uint32_t size_read;
size_read = run_size - buffer_size;
if (size_read > image->sections[section].size - section_offset)
@@ -1132,7 +1132,7 @@
uint8_t buffer[1024];
int buffer_size = sizeof(buffer);
int i;
- u32 nBytes;
+ uint32_t nBytes;
if (bank->target->state != TARGET_HALTED)
{
@@ -1142,12 +1142,12 @@
for (i = 0; i < bank->num_sectors; i++)
{
- u32 j;
+ uint32_t j;
bank->sectors[i].is_erased = 1;
for (j = 0; j < bank->sectors[i].size; j += buffer_size)
{
- u32 chunk;
+ uint32_t chunk;
int retval;
chunk = buffer_size;
if (chunk > (j - bank->sectors[i].size))
@@ -1179,7 +1179,7 @@
int i;
int retval;
int fast_check = 0;
- u32 blank;
+ uint32_t blank;
if (bank->target->state != TARGET_HALTED)
{
@@ -1189,8 +1189,8 @@
for (i = 0; i < bank->num_sectors; i++)
{
- u32 address = bank->base + bank->sectors[i].offset;
- u32 size = bank->sectors[i].size;
+ uint32_t address = bank->base + bank->sectors[i].offset;
+ uint32_t size = bank->sectors[i].size;
if ((retval = target_blank_check_memory(target, address, size, &blank)) != ERROR_OK)
{
Modified: trunk/src/flash/flash.h
===================================================================
--- trunk/src/flash/flash.h 2009-06-18 07:09:35 UTC (rev 2279)
+++ trunk/src/flash/flash.h 2009-06-18 07:10:25 UTC (rev 2280)
@@ -41,9 +41,9 @@
typedef struct flash_sector_s
{
/// Bus offset from start of the flash chip (in bytes).
- u32 offset;
+ uint32_t offset;
/// Number of bytes in this flash sector.
- u32 size;
+ uint32_t size;
/**
* Indication of erasure status: 0=not erased, 1=erased,
* other=unknown. Set by @c flash_driver_s::erase_check.
@@ -166,7 +166,7 @@
* @param count The number of bytes to write.
* @returns ERROR_OK if successful; otherwise, an error code.
*/
- int (*write)(struct flash_bank_s *bank, uint8_t *buffer, u32 offset, u32 count);
+ int (*write)(struct flash_bank_s *bank, uint8_t *buffer, uint32_t offset, uint32_t count);
/**
* Probe to determine what kind of flash is present.
@@ -246,8 +246,8 @@
void *driver_priv; /**< Private driver storage pointer */
int bank_number; /**< The 'bank' (or chip number) of this instance. */
- u32 base; /**< The base address of this bank */
- u32 size; /**< The size of this chip bank, in bytes */
+ uint32_t base; /**< The base address of this bank */
+ uint32_t size; /**< The size of this chip bank, in bytes */
int chip_width; /**< Width of the chip in bytes (1,2,4 bytes) */
int bus_width; /**< Maximum bus width, in bytes (1,2,4 bytes) */
@@ -273,7 +273,7 @@
* Erases @a length bytes in the @a target flash, starting at @a addr.
* @returns ERROR_OK if successful; otherwise, an error code.
*/
-extern int flash_erase_address_range(struct target_s *target, u32 addr, u32 length);
+extern int flash_erase_address_range(struct target_s *target, uint32_t addr, uint32_t length);
/**
* Writes @a image into the @a target flash. The @a written parameter
* will contain the
@@ -284,7 +284,7 @@
* erase the corresponding banks or sectors before programming.
* @returns ERROR_OK if successful; otherwise, an error code.
*/
-extern int flash_write(struct target_s *target, struct image_s *image, u32 *written, int erase);
+extern int flash_write(struct target_s *target, struct image_s *image, uint32_t *written, int erase);
/**
* Forces targets to re-examine their erase/protection state.
* This routine must be called when the system may modify the status.
@@ -325,7 +325,7 @@
* @param addr An address that is within the range of the bank.
* @returns The flash_bank_t located at @a addr, or NULL.
*/
-extern flash_bank_t *get_flash_bank_by_addr(struct target_s *target, u32 addr);
+extern flash_bank_t *get_flash_bank_by_addr(struct target_s *target, uint32_t addr);
#define ERROR_FLASH_BANK_INVALID (-900)
#define ERROR_FLASH_SECTOR_INVALID (-901)
Modified: trunk/src/flash/lpc2000.c
===================================================================
--- trunk/src/flash/lpc2000.c 2009-06-18 07:09:35 UTC (rev 2279)
+++ trunk/src/flash/lpc2000.c 2009-06-18 07:10:25 UTC (rev 2280)
@@ -49,7 +49,7 @@
static int lpc2000_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank);
static int lpc2000_erase(struct flash_bank_s *bank, int first, int last);
static int lpc2000_protect(struct flash_bank_s *bank, int set, int first, int last);
-static int lpc2000_write(struct flash_bank_s *bank, uint8_t *buffer, u32 offset, u32 count);
+static int lpc2000_write(struct flash_bank_s *bank, uint8_t *buffer, uint32_t offset, uint32_t count);
static int lpc2000_probe(struct flash_bank_s *bank);
static int lpc2000_erase_check(struct flash_bank_s *bank);
static int lpc2000_protect_check(struct flash_bank_s *bank);
@@ -92,7 +92,7 @@
if (lpc2000_info->variant == 1)
{
int i = 0;
- u32 offset = 0;
+ uint32_t offset = 0;
/* variant 1 has different layout for 128kb and 256kb flashes */
if (bank->size == 128 * 1024)
@@ -148,7 +148,7 @@
{
int num_sectors;
int i;
- u32 offset = 0;
+ uint32_t offset = 0;
/* variant 2 has a uniform layout, only number of sectors differs */
switch (bank->size)
@@ -233,7 +233,7 @@
* 0x20 to 0x2b: command result table
* 0x2c to 0xac: stack (only 128b needed)
*/
-static int lpc2000_iap_call(flash_bank_t *bank, int code, u32 param_table[5], u32 result_table[2])
+static int lpc2000_iap_call(flash_bank_t *bank, int code, uint32_t param_table[5], uint32_t result_table[2])
{
int retval;
lpc2000_flash_bank_t *lpc2000_info = bank->driver_priv;
@@ -241,7 +241,7 @@
mem_param_t mem_params[2];
reg_param_t reg_params[5];
armv4_5_algorithm_t armv4_5_info;
- u32 status_code;
+ uint32_t status_code;
/* regrab previously allocated working_area, or allocate a new one */
if (!lpc2000_info->iap_working_area)
@@ -318,8 +318,8 @@
static int lpc2000_iap_blank_check(struct flash_bank_s *bank, int first, int last)
{
- u32 param_table[5];
- u32 result_table[2];
+ uint32_t param_table[5];
+ uint32_t result_table[2];
int status_code;
int i;
@@ -410,8 +410,8 @@
static int lpc2000_erase(struct flash_bank_s *bank, int first, int last)
{
lpc2000_flash_bank_t *lpc2000_info = bank->driver_priv;
- u32 param_table[5];
- u32 result_table[2];
+ uint32_t param_table[5];
+ uint32_t result_table[2];
int status_code;
if (bank->target->state != TARGET_HALTED)
@@ -465,17 +465,17 @@
return ERROR_OK;
}
-static int lpc2000_write(struct flash_bank_s *bank, uint8_t *buffer, u32 offset, u32 count)
+static int lpc2000_write(struct flash_bank_s *bank, uint8_t *buffer, uint32_t offset, uint32_t count)
{
lpc2000_flash_bank_t *lpc2000_info = bank->driver_priv;
target_t *target = bank->target;
- u32 dst_min_alignment;
- u32 bytes_remaining = count;
- u32 bytes_written = 0;
+ uint32_t dst_min_alignment;
+ uint32_t bytes_remaining = count;
+ uint32_t bytes_written = 0;
int first_sector = 0;
int last_sector = 0;
- u32 param_table[5];
- u32 result_table[2];
+ uint32_t param_table[5];
+ uint32_t result_table[2];
int status_code;
int i;
working_area_t *download_area;
@@ -514,7 +514,7 @@
/* check if exception vectors should be flashed */
if ((offset == 0) && (count >= 0x20) && lpc2000_info->calc_checksum)
{
- u32 checksum = 0;
+ uint32_t checksum = 0;
int i = 0;
for (i = 0; i < 8; i++)
{
@@ -525,7 +525,7 @@
checksum = 0 - checksum;
LOG_DEBUG("checksum: 0x%8.8x", checksum);
- u32 original_value=buf_get_u32(buffer + (5 * 4), 0, 32);
+ uint32_t original_value=buf_get_u32(buffer + (5 * 4), 0, 32);
if (original_value!=checksum)
{
LOG_WARNING("Verification will fail since checksum in image(0x%8.8x) written to flash was different from calculated vector checksum(0x%8.8x).",
@@ -545,7 +545,7 @@
while (bytes_remaining > 0)
{
- u32 thisrun_bytes;
+ uint32_t thisrun_bytes;
if (bytes_remaining >= lpc2000_info->cmd51_max_buffer)
thisrun_bytes = lpc2000_info->cmd51_max_buffer;
else if (bytes_remaining >= 1024)
@@ -590,7 +590,7 @@
else
{
uint8_t *last_buffer = malloc(thisrun_bytes);
- u32 i;
+ uint32_t i;
memcpy(last_buffer, buffer + bytes_written, bytes_remaining);
for (i = bytes_remaining; i < thisrun_bytes; i++)
last_buffer[i] = 0xff;
@@ -675,8 +675,8 @@
static int lpc2000_handle_part_id_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
{
flash_bank_t *bank;
- u32 param_table[5];
- u32 result_table[2];
+ uint32_t param_table[5];
+ uint32_t result_table[2];
int status_code;
if (argc < 1)
Modified: trunk/src/flash/lpc2000.h
===================================================================
--- trunk/src/flash/lpc2000.h 2009-06-18 07:09:35 UTC (rev 2279)
+++ trunk/src/flash/lpc2000.h 2009-06-18 07:10:25 UTC (rev 2280)
@@ -26,12 +26,12 @@
{
int variant;
struct working_area_s *iap_working_area;
- u32 cclk;
+ uint32_t cclk;
int cmd51_dst_boundary;
int cmd51_can_256b;
int cmd51_can_8192b;
int calc_checksum;
- u32 cmd51_max_buffer;
+ uint32_t cmd51_max_buffer;
} lpc2000_flash_bank_t;
enum lpc2000_status_codes
Modified: trunk/src/flash/lpc288x.c
===================================================================
--- trunk/src/flash/lpc288x.c 2009-06-18 07:09:35 UTC (rev 2279)
+++ trunk/src/flash/lpc288x.c 2009-06-18 07:10:25 UTC (rev 2280)
@@ -88,15 +88,15 @@
static int lpc288x_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank);
static int lpc288x_erase(struct flash_bank_s *bank, int first, int last);
static int lpc288x_protect(struct flash_bank_s *bank, int set, int first, int last);
-static int lpc288x_write(struct flash_bank_s *bank, uint8_t *buffer, u32 offset, u32 count);
+static int lpc288x_write(struct flash_bank_s *bank, uint8_t *buffer, uint32_t offset, uint32_t count);
static int lpc288x_probe(struct flash_bank_s *bank);
static int lpc288x_erase_check(struct flash_bank_s *bank);
static int lpc288x_protect_check(struct flash_bank_s *bank);
static int lpc288x_info(struct flash_bank_s *bank, char *buf, int buf_size);
-static u32 lpc288x_wait_status_busy(flash_bank_t *bank, int timeout);
+static uint32_t lpc288x_wait_status_busy(flash_bank_t *bank, int timeout);
static void lpc288x_load_timer(int erase, struct target_s *target);
static void lpc288x_set_flash_clk(struct flash_bank_s *bank);
-static u32 lpc288x_system_ready(struct flash_bank_s *bank);
+static uint32_t lpc288x_system_ready(struct flash_bank_s *bank);
flash_driver_t lpc288x_flash =
{
@@ -118,9 +118,9 @@
return ERROR_OK;
}
-static u32 lpc288x_wait_status_busy(flash_bank_t *bank, int timeout)
+static uint32_t lpc288x_wait_status_busy(flash_bank_t *bank, int timeout)
{
- u32 status;
+ uint32_t status;
target_t *target = bank->target;
do
{
@@ -142,10 +142,10 @@
{
lpc288x_flash_bank_t *lpc288x_info = bank->driver_priv;
target_t *target = bank->target;
- u32 cidr;
+ uint32_t cidr;
int i = 0;
- u32 offset;
+ uint32_t offset;
if (lpc288x_info->cidr == 0x0102100A)
return ERROR_OK; /* already probed, multiple probes may cause memory leak, not allowed */
@@ -221,7 +221,7 @@
* CLK_DIV = 60 ? */
static void lpc288x_set_flash_clk(struct flash_bank_s *bank)
{
- u32 clk_time;
+ uint32_t clk_time;
lpc288x_flash_bank_t *lpc288x_info = bank->driver_priv;
clk_time = (lpc288x_info->cclk / 66000) / 3;
target_write_u32(bank->target, F_CTRL, FC_CS | FC_WEN);
@@ -246,7 +246,7 @@
}
}
-static u32 lpc288x_system_ready(struct flash_bank_s *bank)
+static uint32_t lpc288x_system_ready(struct flash_bank_s *bank)
{
lpc288x_flash_bank_t *lpc288x_info = bank->driver_priv;
if (lpc288x_info->cidr == 0)
@@ -264,7 +264,7 @@
static int lpc288x_erase_check(struct flash_bank_s *bank)
{
- u32 status = lpc288x_system_ready(bank); /* probed? halted? */
+ uint32_t status = lpc288x_system_ready(bank); /* probed? halted? */
if (status != ERROR_OK)
{
LOG_INFO("Processor not halted/not probed");
@@ -276,7 +276,7 @@
static int lpc288x_erase(struct flash_bank_s *bank, int first, int last)
{
- u32 status;
+ uint32_t status;
int sector;
target_t *target = bank->target;
@@ -315,13 +315,13 @@
return ERROR_OK;
}
-static int lpc288x_write(struct flash_bank_s *bank, uint8_t *buffer, u32 offset, u32 count)
+static int lpc288x_write(struct flash_bank_s *bank, uint8_t *buffer, uint32_t offset, uint32_t count)
{
uint8_t page_buffer[FLASH_PAGE_SIZE];
- u32 status, source_offset,dest_offset;
+ uint32_t status, source_offset,dest_offset;
target_t *target = bank->target;
- u32 bytes_remaining = count;
- u32 first_sector, last_sector, sector, page;
+ uint32_t bytes_remaining = count;
+ uint32_t first_sector, last_sector, sector, page;
int i;
/* probed? halted? */
@@ -463,7 +463,7 @@
static int lpc288x_protect(struct flash_bank_s *bank, int set, int first, int last)
{
int lockregion, status;
- u32 value;
+ uint32_t value;
target_t *target = bank->target;
/* probed? halted? */
Modified: trunk/src/flash/lpc288x.h
===================================================================
--- trunk/src/flash/lpc288x.h 2009-06-18 07:09:35 UTC (rev 2279)
+++ trunk/src/flash/lpc288x.h 2009-06-18 07:10:25 UTC (rev 2280)
@@ -25,15 +25,15 @@
typedef struct lpc288x_flash_bank_s
{
- u32 working_area;
- u32 working_area_size;
+ uint32_t working_area;
+ uint32_t working_area_size;
/* chip id register */
- u32 cidr;
+ uint32_t cidr;
char * target_name;
- u32 cclk;
+ uint32_t cclk;
- u32 sector_size_break;
+ uint32_t sector_size_break;
} lpc288x_flash_bank_t;
#endif /* lpc288x_H */
Modified: trunk/src/flash/lpc3180_nand_controller.c
===================================================================
--- trunk/src/flash/lpc3180_nand_controller.c 2009-06-18 07:09:35 UTC (rev 2279)
+++ trunk/src/flash/lpc3180_nand_controller.c 2009-06-18 07:10:25 UTC (rev 228...
[truncated message content] |
|
From: <zw...@ma...> - 2009-06-18 09:10:22
|
Author: zwelch
Date: 2009-06-18 09:09:35 +0200 (Thu, 18 Jun 2009)
New Revision: 2279
Modified:
trunk/src/target/algorithm.c
trunk/src/target/algorithm.h
trunk/src/target/avrt.c
trunk/src/target/breakpoints.c
trunk/src/target/breakpoints.h
trunk/src/target/cortex_a8.c
trunk/src/target/cortex_a8.h
trunk/src/target/cortex_m3.c
trunk/src/target/cortex_m3.h
trunk/src/target/embeddedice.c
trunk/src/target/embeddedice.h
trunk/src/target/etb.c
trunk/src/target/etb.h
trunk/src/target/etm.c
trunk/src/target/etm.h
trunk/src/target/feroceon.c
trunk/src/target/image.c
trunk/src/target/image.h
trunk/src/target/mips32.c
trunk/src/target/mips32.h
trunk/src/target/mips32_dmaacc.c
trunk/src/target/mips32_dmaacc.h
trunk/src/target/mips32_pracc.c
trunk/src/target/mips32_pracc.h
trunk/src/target/mips_ejtag.c
trunk/src/target/mips_ejtag.h
trunk/src/target/mips_m4k.c
trunk/src/target/mips_m4k.h
trunk/src/target/oocd_trace.c
trunk/src/target/register.h
trunk/src/target/target.c
trunk/src/target/target.h
trunk/src/target/target_request.c
trunk/src/target/target_request.h
trunk/src/target/target_type.h
trunk/src/target/trace.c
trunk/src/target/trace.h
trunk/src/target/xscale.c
trunk/src/target/xscale.h
Log:
Transform 'u32' to 'uint32_t' in src/target
- Replace '\([^_]\)u32' with '\1uint32_t'.
- Replace '^u32' with 'uint32_t'.
Modified: trunk/src/target/algorithm.c
===================================================================
--- trunk/src/target/algorithm.c 2009-06-18 07:08:52 UTC (rev 2278)
+++ trunk/src/target/algorithm.c 2009-06-18 07:09:35 UTC (rev 2279)
@@ -25,7 +25,7 @@
#include "binarybuffer.h"
-void init_mem_param(mem_param_t *param, u32 address, u32 size, enum param_direction direction)
+void init_mem_param(mem_param_t *param, uint32_t address, uint32_t size, enum param_direction direction)
{
param->address = address;
param->size = size;
@@ -39,7 +39,7 @@
param->value = NULL;
}
-void init_reg_param(reg_param_t *param, char *reg_name, u32 size, enum param_direction direction)
+void init_reg_param(reg_param_t *param, char *reg_name, uint32_t size, enum param_direction direction)
{
param->reg_name = reg_name;
param->size = size;
Modified: trunk/src/target/algorithm.h
===================================================================
--- trunk/src/target/algorithm.h 2009-06-18 07:08:52 UTC (rev 2278)
+++ trunk/src/target/algorithm.h 2009-06-18 07:09:35 UTC (rev 2279)
@@ -31,8 +31,8 @@
typedef struct mem_param_s
{
- u32 address;
- u32 size;
+ uint32_t address;
+ uint32_t size;
uint8_t *value;
enum param_direction direction;
} mem_param_t;
@@ -40,14 +40,14 @@
typedef struct reg_param_s
{
char *reg_name;
- u32 size;
+ uint32_t size;
uint8_t *value;
enum param_direction direction;
} reg_param_t;
-extern void init_mem_param(mem_param_t *param, u32 address, u32 size, enum param_direction direction);
+extern void init_mem_param(mem_param_t *param, uint32_t address, uint32_t size, enum param_direction direction);
extern void destroy_mem_param(mem_param_t *param);
-extern void init_reg_param(reg_param_t *param, char *reg_name, u32 size, enum param_direction direction);
+extern void init_reg_param(reg_param_t *param, char *reg_name, uint32_t size, enum param_direction direction);
extern void destroy_reg_param(reg_param_t *param);
#endif /* ALGORITHM_H */
Modified: trunk/src/target/avrt.c
===================================================================
--- trunk/src/target/avrt.c 2009-06-18 07:08:52 UTC (rev 2278)
+++ trunk/src/target/avrt.c 2009-06-18 07:09:35 UTC (rev 2279)
@@ -39,8 +39,8 @@
int avr_arch_state(struct target_s *target);
int avr_poll(target_t *target);
int avr_halt(target_t *target);
-int avr_resume(struct target_s *target, int current, u32 address, int handle_breakpoints, int debug_execution);
-int avr_step(struct target_s *target, int current, u32 address, int handle_breakpoints);
+int avr_resume(struct target_s *target, int current, uint32_t address, int handle_breakpoints, int debug_execution);
+int avr_step(struct target_s *target, int current, uint32_t address, int handle_breakpoints);
int avr_assert_reset(target_t *target);
int avr_deassert_reset(target_t *target);
@@ -48,7 +48,7 @@
/* IR and DR functions */
int avr_jtag_sendinstr(jtag_tap_t *tap, uint8_t *ir_in, uint8_t ir_out);
-int avr_jtag_senddat(jtag_tap_t *tap, u32 *dr_in, u32 dr_out, int len);
+int avr_jtag_senddat(jtag_tap_t *tap, uint32_t *dr_in, uint32_t dr_out, int len);
int mcu_write_ir(jtag_tap_t *tap, uint8_t *ir_in, uint8_t *ir_out, int ir_len, int rti);
int mcu_write_dr(jtag_tap_t *tap, uint8_t *dr_in, uint8_t *dr_out, int dr_len, int rti);
@@ -56,8 +56,8 @@
int mcu_write_dr_u8(jtag_tap_t *tap, uint8_t *ir_in, uint8_t ir_out, int dr_len, int rti);
int mcu_write_ir_u16(jtag_tap_t *tap, uint16_t *ir_in, uint16_t ir_out, int ir_len, int rti);
int mcu_write_dr_u16(jtag_tap_t *tap, uint16_t *ir_in, uint16_t ir_out, int dr_len, int rti);
-int mcu_write_ir_u32(jtag_tap_t *tap, u32 *ir_in, u32 ir_out, int ir_len, int rti);
-int mcu_write_dr_u32(jtag_tap_t *tap, u32 *ir_in, u32 ir_out, int dr_len, int rti);
+int mcu_write_ir_u32(jtag_tap_t *tap, uint32_t *ir_in, uint32_t ir_out, int ir_len, int rti);
+int mcu_write_dr_u32(jtag_tap_t *tap, uint32_t *ir_in, uint32_t ir_out, int dr_len, int rti);
int mcu_execute_queue(void);
target_type_t avr_target =
@@ -153,13 +153,13 @@
return ERROR_OK;
}
-int avr_resume(struct target_s *target, int current, u32 address, int handle_breakpoints, int debug_execution)
+int avr_resume(struct target_s *target, int current, uint32_t address, int handle_breakpoints, int debug_execution)
{
LOG_DEBUG("%s", __FUNCTION__);
return ERROR_OK;
}
-int avr_step(struct target_s *target, int current, u32 address, int handle_breakpoints)
+int avr_step(struct target_s *target, int current, uint32_t address, int handle_breakpoints)
{
LOG_DEBUG("%s", __FUNCTION__);
return ERROR_OK;
@@ -187,7 +187,7 @@
return ERROR_OK;
}
-int avr_jtag_senddat(jtag_tap_t *tap, u32* dr_in, u32 dr_out, int len)
+int avr_jtag_senddat(jtag_tap_t *tap, uint32_t* dr_in, uint32_t dr_out, int len)
{
return mcu_write_dr_u32(tap, dr_in, dr_out, len, 1);
}
@@ -297,7 +297,7 @@
return ERROR_OK;
}
-int mcu_write_ir_u32(jtag_tap_t *tap, u32 *ir_in, u32 ir_out, int ir_len, int rti)
+int mcu_write_ir_u32(jtag_tap_t *tap, uint32_t *ir_in, uint32_t ir_out, int ir_len, int rti)
{
if (ir_len > 32)
{
@@ -310,7 +310,7 @@
return ERROR_OK;
}
-int mcu_write_dr_u32(jtag_tap_t *tap, u32 *dr_in, u32 dr_out, int dr_len, int rti)
+int mcu_write_dr_u32(jtag_tap_t *tap, uint32_t *dr_in, uint32_t dr_out, int dr_len, int rti)
{
if (dr_len > 32)
{
Modified: trunk/src/target/breakpoints.c
===================================================================
--- trunk/src/target/breakpoints.c 2009-06-18 07:08:52 UTC (rev 2278)
+++ trunk/src/target/breakpoints.c 2009-06-18 07:09:35 UTC (rev 2279)
@@ -39,7 +39,7 @@
"access"
};
-int breakpoint_add(target_t *target, u32 address, u32 length, enum breakpoint_type type)
+int breakpoint_add(target_t *target, uint32_t address, uint32_t length, enum breakpoint_type type)
{
breakpoint_t *breakpoint = target->breakpoints;
breakpoint_t **breakpoint_p = &target->breakpoints;
@@ -115,7 +115,7 @@
free(breakpoint);
}
-void breakpoint_remove(target_t *target, u32 address)
+void breakpoint_remove(target_t *target, uint32_t address)
{
breakpoint_t *breakpoint = target->breakpoints;
breakpoint_t **breakpoint_p = &target->breakpoints;
@@ -147,7 +147,7 @@
}
}
-breakpoint_t* breakpoint_find(target_t *target, u32 address)
+breakpoint_t* breakpoint_find(target_t *target, uint32_t address)
{
breakpoint_t *breakpoint = target->breakpoints;
@@ -161,7 +161,7 @@
return NULL;
}
-int watchpoint_add(target_t *target, u32 address, u32 length, enum watchpoint_rw rw, u32 value, u32 mask)
+int watchpoint_add(target_t *target, uint32_t address, uint32_t length, enum watchpoint_rw rw, uint32_t value, uint32_t mask)
{
watchpoint_t *watchpoint = target->watchpoints;
watchpoint_t **watchpoint_p = &target->watchpoints;
@@ -234,7 +234,7 @@
free(watchpoint);
}
-void watchpoint_remove(target_t *target, u32 address)
+void watchpoint_remove(target_t *target, uint32_t address)
{
watchpoint_t *watchpoint = target->watchpoints;
watchpoint_t **watchpoint_p = &target->watchpoints;
Modified: trunk/src/target/breakpoints.h
===================================================================
--- trunk/src/target/breakpoints.h 2009-06-18 07:08:52 UTC (rev 2278)
+++ trunk/src/target/breakpoints.h 2009-06-18 07:09:35 UTC (rev 2279)
@@ -37,7 +37,7 @@
typedef struct breakpoint_s
{
- u32 address;
+ uint32_t address;
int length;
enum breakpoint_type type;
int set;
@@ -47,21 +47,21 @@
typedef struct watchpoint_s
{
- u32 address;
+ uint32_t address;
int length;
- u32 mask;
- u32 value;
+ uint32_t mask;
+ uint32_t value;
enum watchpoint_rw rw;
int set;
struct watchpoint_s *next;
} watchpoint_t;
extern void breakpoint_clear_target(struct target_s *target);
-extern int breakpoint_add(struct target_s *target, u32 address, u32 length, enum breakpoint_type type);
-extern void breakpoint_remove(struct target_s *target, u32 address);
-extern breakpoint_t* breakpoint_find(struct target_s *target, u32 address);
-extern int watchpoint_add(struct target_s *target, u32 address, u32 length, enum watchpoint_rw rw, u32 value, u32 mask);
-extern void watchpoint_remove(struct target_s *target, u32 address);
+extern int breakpoint_add(struct target_s *target, uint32_t address, uint32_t length, enum breakpoint_type type);
+extern void breakpoint_remove(struct target_s *target, uint32_t address);
+extern breakpoint_t* breakpoint_find(struct target_s *target, uint32_t address);
+extern int watchpoint_add(struct target_s *target, uint32_t address, uint32_t length, enum watchpoint_rw rw, uint32_t value, uint32_t mask);
+extern void watchpoint_remove(struct target_s *target, uint32_t address);
extern void watchpoint_clear_target(struct target_s *target);
#endif /* BREAKPOINTS_H */
Modified: trunk/src/target/cortex_a8.c
===================================================================
--- trunk/src/target/cortex_a8.c 2009-06-18 07:08:52 UTC (rev 2278)
+++ trunk/src/target/cortex_a8.c 2009-06-18 07:09:35 UTC (rev 2279)
@@ -104,7 +104,7 @@
return ERROR_OK;
}
-int cortex_a8_read_memory(struct target_s *target, u32 address, u32 size, u32 count, uint8_t *buffer)
+int cortex_a8_read_memory(struct target_s *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer)
{
/* get pointers to arch-specific information */
armv7m_common_t *armv7m = target->arch_info;
@@ -136,7 +136,7 @@
return retval;
}
-int cortex_a8_write_memory(struct target_s *target, u32 address, u32 size, u32 count, uint8_t *buffer)
+int cortex_a8_write_memory(struct target_s *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer)
{
/* get pointers to arch-specific information */
armv7m_common_t *armv7m = target->arch_info;
@@ -187,7 +187,7 @@
/* check if we have data */
if (ctrl & (1 << 0))
{
- u32 request;
+ uint32_t request;
/* we assume target is quick enough */
request = data;
Modified: trunk/src/target/cortex_a8.h
===================================================================
--- trunk/src/target/cortex_a8.h 2009-06-18 07:08:52 UTC (rev 2278)
+++ trunk/src/target/cortex_a8.h 2009-06-18 07:09:35 UTC (rev 2279)
@@ -48,17 +48,17 @@
{
int used;
int type;
- u32 fpcr_value;
- u32 fpcr_address;
+ uint32_t fpcr_value;
+ uint32_t fpcr_address;
} cortex_a8_fp_comparator_t;
typedef struct cortex_a8_dwt_comparator_s
{
int used;
- u32 comp;
- u32 mask;
- u32 function;
- u32 dwt_comparator_address;
+ uint32_t comp;
+ uint32_t mask;
+ uint32_t function;
+ uint32_t dwt_comparator_address;
} cortex_a8_dwt_comparator_t;
typedef struct cortex_a8_common_s
@@ -67,9 +67,9 @@
arm_jtag_t jtag_info;
/* Context information */
- u32 dcb_dhcsr;
- u32 nvic_dfsr; /* Debug Fault Status Register - shows reason for debug halt */
- u32 nvic_icsr; /* Interrupt Control State Register - shows active and pending IRQ */
+ uint32_t dcb_dhcsr;
+ uint32_t nvic_dfsr; /* Debug Fault Status Register - shows reason for debug halt */
+ uint32_t nvic_icsr; /* Interrupt Control State Register - shows active and pending IRQ */
/* Flash Patch and Breakpoint (FPB) */
int fp_num_lit;
@@ -86,14 +86,14 @@
/* Interrupts */
int intlinesnum;
- u32 *intsetenable;
+ uint32_t *intsetenable;
armv7m_common_t armv7m;
void *arch_info;
} cortex_a8_common_t;
extern int cortex_a8_init_arch_info(target_t *target, cortex_a8_common_t *cortex_a8, jtag_tap_t *tap);
-int cortex_a8_read_memory(struct target_s *target, u32 address, u32 size, u32 count, uint8_t *buffer);
-int cortex_a8_write_memory(struct target_s *target, u32 address, u32 size, u32 count, uint8_t *buffer);
+int cortex_a8_read_memory(struct target_s *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer);
+int cortex_a8_write_memory(struct target_s *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer);
#endif /* CORTEX_A8_H */
Modified: trunk/src/target/cortex_m3.c
===================================================================
--- trunk/src/target/cortex_m3.c 2009-06-18 07:08:52 UTC (rev 2278)
+++ trunk/src/target/cortex_m3.c 2009-06-18 07:09:35 UTC (rev 2279)
@@ -46,9 +46,9 @@
int cortex_m3_target_create(struct target_s *target, Jim_Interp *interp);
int cortex_m3_init_target(struct command_context_s *cmd_ctx, struct target_s *target);
int cortex_m3_quit(void);
-int cortex_m3_load_core_reg_u32(target_t *target, enum armv7m_regtype type, u32 num, u32 *value);
-int cortex_m3_store_core_reg_u32(target_t *target, enum armv7m_regtype type, u32 num, u32 value);
-int cortex_m3_target_request_data(target_t *target, u32 size, uint8_t *buffer);
+int cortex_m3_load_core_reg_u32(target_t *target, enum armv7m_regtype type, uint32_t num, uint32_t *value);
+int cortex_m3_store_core_reg_u32(target_t *target, enum armv7m_regtype type, uint32_t num, uint32_t value);
+int cortex_m3_target_request_data(target_t *target, uint32_t size, uint8_t *buffer);
int cortex_m3_examine(struct target_s *target);
#ifdef ARMV7_GDB_HACKS
@@ -95,10 +95,10 @@
.quit = cortex_m3_quit
};
-int cortexm3_dap_read_coreregister_u32(swjdp_common_t *swjdp, u32 *value, int regnum)
+int cortexm3_dap_read_coreregister_u32(swjdp_common_t *swjdp, uint32_t *value, int regnum)
{
int retval;
- u32 dcrdr;
+ uint32_t dcrdr;
/* because the DCB_DCRDR is used for the emulated dcc channel
* we gave to save/restore the DCB_DCRDR when used */
@@ -120,10 +120,10 @@
return retval;
}
-int cortexm3_dap_write_coreregister_u32(swjdp_common_t *swjdp, u32 value, int regnum)
+int cortexm3_dap_write_coreregister_u32(swjdp_common_t *swjdp, uint32_t value, int regnum)
{
int retval;
- u32 dcrdr;
+ uint32_t dcrdr;
/* because the DCB_DCRDR is used for the emulated dcc channel
* we gave to save/restore the DCB_DCRDR when used */
@@ -146,7 +146,7 @@
}
-int cortex_m3_write_debug_halt_mask(target_t *target, u32 mask_on, u32 mask_off)
+int cortex_m3_write_debug_halt_mask(target_t *target, uint32_t mask_on, uint32_t mask_off)
{
/* get pointers to arch-specific information */
armv7m_common_t *armv7m = target->arch_info;
@@ -186,7 +186,7 @@
armv7m_common_t *armv7m = target->arch_info;
cortex_m3_common_t *cortex_m3 = armv7m->arch_info;
swjdp_common_t *swjdp = &armv7m->swjdp_info;
- u32 dhcsr_save;
+ uint32_t dhcsr_save;
/* backup dhcsr reg */
dhcsr_save = cortex_m3->dcb_dhcsr;
@@ -204,12 +204,12 @@
return ERROR_OK;
}
-int cortex_m3_exec_opcode(target_t *target,u32 opcode, int len /* MODE, r0_invalue, &r0_outvalue */ )
+int cortex_m3_exec_opcode(target_t *target,uint32_t opcode, int len /* MODE, r0_invalue, &r0_outvalue */ )
{
/* get pointers to arch-specific information */
armv7m_common_t *armv7m = target->arch_info;
swjdp_common_t *swjdp = &armv7m->swjdp_info;
- u32 savedram;
+ uint32_t savedram;
int retvalue;
mem_ap_read_u32(swjdp, 0x20000000, &savedram);
@@ -224,13 +224,13 @@
#if 0
/* Enable interrupts */
-int cortex_m3_cpsie(target_t *target, u32 IF)
+int cortex_m3_cpsie(target_t *target, uint32_t IF)
{
return cortex_m3_exec_opcode(target, ARMV7M_T_CPSIE(IF), 2);
}
/* Disable interrupts */
-int cortex_m3_cpsid(target_t *target, u32 IF)
+int cortex_m3_cpsid(target_t *target, uint32_t IF)
{
return cortex_m3_exec_opcode(target, ARMV7M_T_CPSID(IF), 2);
}
@@ -239,7 +239,7 @@
int cortex_m3_endreset_event(target_t *target)
{
int i;
- u32 dcb_demcr;
+ uint32_t dcb_demcr;
/* get pointers to arch-specific information */
armv7m_common_t *armv7m = target->arch_info;
@@ -323,7 +323,7 @@
int cortex_m3_examine_exception_reason(target_t *target)
{
- u32 shcsr, except_sr, cfsr = -1, except_ar = -1;
+ uint32_t shcsr, except_sr, cfsr = -1, except_ar = -1;
/* get pointers to arch-specific information */
armv7m_common_t *armv7m = target->arch_info;
@@ -374,7 +374,7 @@
int cortex_m3_debug_entry(target_t *target)
{
int i;
- u32 xPSR;
+ uint32_t xPSR;
int retval;
/* get pointers to arch-specific information */
@@ -443,7 +443,7 @@
LOG_DEBUG("entered debug state in core mode: %s at PC 0x%x, target->state: %s",
armv7m_mode_strings[armv7m->core_mode],
- *(u32*)(armv7m->core_cache->reg_list[15].value),
+ *(uint32_t*)(armv7m->core_cache->reg_list[15].value),
Jim_Nvp_value2name_simple( nvp_target_state, target->state )->name);
if (armv7m->post_debug_entry)
@@ -574,7 +574,7 @@
armv7m_common_t *armv7m = target->arch_info;
cortex_m3_common_t *cortex_m3 = armv7m->arch_info;
swjdp_common_t *swjdp = &armv7m->swjdp_info;
- u32 dcb_dhcsr = 0;
+ uint32_t dcb_dhcsr = 0;
int retval, timeout = 0;
/* Enter debug state on reset, cf. end_reset_event() */
@@ -609,12 +609,12 @@
return ERROR_OK;
}
-int cortex_m3_resume(struct target_s *target, int current, u32 address, int handle_breakpoints, int debug_execution)
+int cortex_m3_resume(struct target_s *target, int current, uint32_t address, int handle_breakpoints, int debug_execution)
{
/* get pointers to arch-specific information */
armv7m_common_t *armv7m = target->arch_info;
breakpoint_t *breakpoint = NULL;
- u32 resume_pc;
+ uint32_t resume_pc;
if (target->state != TARGET_HALTED)
{
@@ -695,7 +695,7 @@
}
/* int irqstepcount=0; */
-int cortex_m3_step(struct target_s *target, int current, u32 address, int handle_breakpoints)
+int cortex_m3_step(struct target_s *target, int current, uint32_t address, int handle_breakpoints)
{
/* get pointers to arch-specific information */
armv7m_common_t *armv7m = target->arch_info;
@@ -797,7 +797,7 @@
/* get revision of lm3s target, only early silicon has this issue
* Fury Rev B, DustDevil Rev B, Tempest all ok */
- u32 did0;
+ uint32_t did0;
if (target_read_u32(target, 0x400fe000, &did0) == ERROR_OK)
{
@@ -839,7 +839,7 @@
{
/* I do not know why this is necessary, but it fixes strange effects
* (step/resume cause a NMI after reset) on LM3S6918 -- Michael Schwingen */
- u32 tmp;
+ uint32_t tmp;
mem_ap_read_atomic_u32(swjdp, NVIC_AIRCR, &tmp);
}
}
@@ -887,7 +887,7 @@
{
int retval;
int fp_num=0;
- u32 hilo;
+ uint32_t hilo;
/* get pointers to arch-specific information */
armv7m_common_t *armv7m = target->arch_info;
@@ -1076,7 +1076,7 @@
int cortex_m3_set_watchpoint(struct target_s *target, watchpoint_t *watchpoint)
{
int dwt_num=0;
- u32 mask, temp;
+ uint32_t mask, temp;
/* get pointers to arch-specific information */
armv7m_common_t *armv7m = target->arch_info;
@@ -1218,7 +1218,7 @@
}
}
-int cortex_m3_load_core_reg_u32(struct target_s *target, enum armv7m_regtype type, u32 num, u32 * value)
+int cortex_m3_load_core_reg_u32(struct target_s *target, enum armv7m_regtype type, uint32_t num, uint32_t * value)
{
int retval;
/* get pointers to arch-specific information */
@@ -1271,10 +1271,10 @@
return ERROR_OK;
}
-int cortex_m3_store_core_reg_u32(struct target_s *target, enum armv7m_regtype type, u32 num, u32 value)
+int cortex_m3_store_core_reg_u32(struct target_s *target, enum armv7m_regtype type, uint32_t num, uint32_t value)
{
int retval;
- u32 reg;
+ uint32_t reg;
/* get pointers to arch-specific information */
armv7m_common_t *armv7m = target->arch_info;
@@ -1339,7 +1339,7 @@
return ERROR_OK;
}
-int cortex_m3_read_memory(struct target_s *target, u32 address, u32 size, u32 count, uint8_t *buffer)
+int cortex_m3_read_memory(struct target_s *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer)
{
/* get pointers to arch-specific information */
armv7m_common_t *armv7m = target->arch_info;
@@ -1371,7 +1371,7 @@
return retval;
}
-int cortex_m3_write_memory(struct target_s *target, u32 address, u32 size, u32 count, uint8_t *buffer)
+int cortex_m3_write_memory(struct target_s *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer)
{
/* get pointers to arch-specific information */
armv7m_common_t *armv7m = target->arch_info;
@@ -1401,7 +1401,7 @@
return retval;
}
-int cortex_m3_bulk_write_memory(target_t *target, u32 address, u32 count, uint8_t *buffer)
+int cortex_m3_bulk_write_memory(target_t *target, uint32_t address, uint32_t count, uint8_t *buffer)
{
return cortex_m3_write_memory(target, address, 4, count, buffer);
}
@@ -1420,7 +1420,7 @@
int cortex_m3_examine(struct target_s *target)
{
int retval;
- u32 cpuid, fpcr, dwtcr, ictr;
+ uint32_t cpuid, fpcr, dwtcr, ictr;
int i;
/* get pointers to arch-specific information */
@@ -1508,13 +1508,13 @@
return ERROR_OK;
}
-int cortex_m3_target_request_data(target_t *target, u32 size, uint8_t *buffer)
+int cortex_m3_target_request_data(target_t *target, uint32_t size, uint8_t *buffer)
{
armv7m_common_t *armv7m = target->arch_info;
swjdp_common_t *swjdp = &armv7m->swjdp_info;
uint8_t data;
uint8_t ctrl;
- u32 i;
+ uint32_t i;
for (i = 0; i < (size * 4); i++)
{
@@ -1546,7 +1546,7 @@
/* check if we have data */
if (ctrl & (1 << 0))
{
- u32 request;
+ uint32_t request;
/* we assume target is quick enough */
request = data;
Modified: trunk/src/target/cortex_m3.h
===================================================================
--- trunk/src/target/cortex_m3.h 2009-06-18 07:08:52 UTC (rev 2278)
+++ trunk/src/target/cortex_m3.h 2009-06-18 07:09:35 UTC (rev 2279)
@@ -121,17 +121,17 @@
{
int used;
int type;
- u32 fpcr_value;
- u32 fpcr_address;
+ uint32_t fpcr_value;
+ uint32_t fpcr_address;
} cortex_m3_fp_comparator_t;
typedef struct cortex_m3_dwt_comparator_s
{
int used;
- u32 comp;
- u32 mask;
- u32 function;
- u32 dwt_comparator_address;
+ uint32_t comp;
+ uint32_t mask;
+ uint32_t function;
+ uint32_t dwt_comparator_address;
} cortex_m3_dwt_comparator_t;
typedef struct cortex_m3_common_s
@@ -140,9 +140,9 @@
arm_jtag_t jtag_info;
/* Context information */
- u32 dcb_dhcsr;
- u32 nvic_dfsr; /* Debug Fault Status Register - shows reason for debug halt */
- u32 nvic_icsr; /* Interrupt Control State Register - shows active and pending IRQ */
+ uint32_t dcb_dhcsr;
+ uint32_t nvic_dfsr; /* Debug Fault Status Register - shows reason for debug halt */
+ uint32_t nvic_icsr; /* Interrupt Control State Register - shows active and pending IRQ */
/* Flash Patch and Breakpoint (FPB) */
int fp_num_lit;
@@ -159,7 +159,7 @@
/* Interrupts */
int intlinesnum;
- u32 *intsetenable;
+ uint32_t *intsetenable;
armv7m_common_t armv7m;
// swjdp_common_t swjdp_info;
@@ -170,16 +170,16 @@
int cortex_m3_poll(target_t *target);
int cortex_m3_halt(target_t *target);
-int cortex_m3_resume(struct target_s *target, int current, u32 address, int handle_breakpoints, int debug_execution);
-int cortex_m3_step(struct target_s *target, int current, u32 address, int handle_breakpoints);
+int cortex_m3_resume(struct target_s *target, int current, uint32_t address, int handle_breakpoints, int debug_execution);
+int cortex_m3_step(struct target_s *target, int current, uint32_t address, int handle_breakpoints);
int cortex_m3_assert_reset(target_t *target);
int cortex_m3_deassert_reset(target_t *target);
int cortex_m3_soft_reset_halt(struct target_s *target);
-int cortex_m3_read_memory(struct target_s *target, u32 address, u32 size, u32 count, uint8_t *buffer);
-int cortex_m3_write_memory(struct target_s *target, u32 address, u32 size, u32 count, uint8_t *buffer);
-int cortex_m3_bulk_write_memory(target_t *target, u32 address, u32 count, uint8_t *buffer);
+int cortex_m3_read_memory(struct target_s *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer);
+int cortex_m3_write_memory(struct target_s *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer);
+int cortex_m3_bulk_write_memory(target_t *target, uint32_t address, uint32_t count, uint8_t *buffer);
int cortex_m3_set_breakpoint(struct target_s *target, breakpoint_t *breakpoint);
int cortex_m3_unset_breakpoint(struct target_s *target, breakpoint_t *breakpoint);
Modified: trunk/src/target/embeddedice.c
===================================================================
--- trunk/src/target/embeddedice.c 2009-06-18 07:08:52 UTC (rev 2278)
+++ trunk/src/target/embeddedice.c 2009-06-18 07:09:35 UTC (rev 2279)
@@ -287,7 +287,7 @@
* we pretend the target is always going to be fast enough
* (relative to the JTAG clock), so we don't need to handshake
*/
-int embeddedice_receive(arm_jtag_t *jtag_info, u32 *data, u32 size)
+int embeddedice_receive(arm_jtag_t *jtag_info, uint32_t *data, uint32_t size)
{
scan_field_t fields[3];
uint8_t field1_out[1];
@@ -340,7 +340,7 @@
return embeddedice_read_reg_w_check(reg, NULL, NULL);
}
-void embeddedice_set_reg(reg_t *reg, u32 value)
+void embeddedice_set_reg(reg_t *reg, uint32_t value)
{
embeddedice_write_reg(reg, value);
@@ -363,7 +363,7 @@
return ERROR_OK;
}
-void embeddedice_write_reg(reg_t *reg, u32 value)
+void embeddedice_write_reg(reg_t *reg, uint32_t value)
{
embeddedice_reg_t *ice_reg = reg->arch_info;
@@ -388,7 +388,7 @@
* we pretend the target is always going to be fast enough
* (relative to the JTAG clock), so we don't need to handshake
*/
-int embeddedice_send(arm_jtag_t *jtag_info, u32 *data, u32 size)
+int embeddedice_send(arm_jtag_t *jtag_info, uint32_t *data, uint32_t size)
{
scan_field_t fields[3];
uint8_t field0_out[4];
@@ -432,14 +432,14 @@
/* wait for DCC control register R/W handshake bit to become active
*/
-int embeddedice_handshake(arm_jtag_t *jtag_info, int hsbit, u32 timeout)
+int embeddedice_handshake(arm_jtag_t *jtag_info, int hsbit, uint32_t timeout)
{
scan_field_t fields[3];
uint8_t field0_in[4];
uint8_t field1_out[1];
uint8_t field2_out[1];
int retval;
- u32 hsact;
+ uint32_t hsact;
struct timeval lap;
struct timeval now;
@@ -484,7 +484,7 @@
gettimeofday(&now, NULL);
}
- while ((u32)((now.tv_sec-lap.tv_sec)*1000 + (now.tv_usec-lap.tv_usec)/1000) <= timeout);
+ while ((uint32_t)((now.tv_sec-lap.tv_sec)*1000 + (now.tv_usec-lap.tv_usec)/1000) <= timeout);
return ERROR_TARGET_TIMEOUT;
}
Modified: trunk/src/target/embeddedice.h
===================================================================
--- trunk/src/target/embeddedice.h 2009-06-18 07:08:52 UTC (rev 2278)
+++ trunk/src/target/embeddedice.h 2009-06-18 07:09:35 UTC (rev 2279)
@@ -96,22 +96,22 @@
extern reg_cache_t* embeddedice_build_reg_cache(target_t *target, arm7_9_common_t *arm7_9);
extern int embeddedice_setup(target_t *target);
extern int embeddedice_read_reg(reg_t *reg);
-extern void embeddedice_write_reg(reg_t *reg, u32 value);
+extern void embeddedice_write_reg(reg_t *reg, uint32_t value);
extern int embeddedice_read_reg_w_check(reg_t *reg, uint8_t* check_value, uint8_t* check_mask);
extern void embeddedice_store_reg(reg_t *reg);
-extern void embeddedice_set_reg(reg_t *reg, u32 value);
+extern void embeddedice_set_reg(reg_t *reg, uint32_t value);
extern int embeddedice_set_reg_w_exec(reg_t *reg, uint8_t *buf);
-extern int embeddedice_receive(arm_jtag_t *jtag_info, u32 *data, u32 size);
-extern int embeddedice_send(arm_jtag_t *jtag_info, u32 *data, u32 size);
-extern int embeddedice_handshake(arm_jtag_t *jtag_info, int hsbit, u32 timeout);
+extern int embeddedice_receive(arm_jtag_t *jtag_info, uint32_t *data, uint32_t size);
+extern int embeddedice_send(arm_jtag_t *jtag_info, uint32_t *data, uint32_t size);
+extern int embeddedice_handshake(arm_jtag_t *jtag_info, int hsbit, uint32_t timeout);
/* If many embeddedice_write_reg() follow eachother, then the >1 invocations can be this faster version of
* embeddedice_write_reg
*/
-static __inline__ void embeddedice_write_reg_inner( jtag_tap_t *tap, int reg_addr, u32 value)
+static __inline__ void embeddedice_write_reg_inner( jtag_tap_t *tap, int reg_addr, uint32_t value)
{
static const int embeddedice_num_bits[]={32,5,1};
- u32 values[3];
+ uint32_t values[3];
values[0]=value;
values[1]=reg_addr;
Modified: trunk/src/target/etb.c
===================================================================
--- trunk/src/target/etb.c 2009-06-18 07:08:52 UTC (rev 2278)
+++ trunk/src/target/etb.c 2009-06-18 07:09:35 UTC (rev 2279)
@@ -44,7 +44,7 @@
static int handle_etb_config_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
-static int etb_set_instr(etb_t *etb, u32 new_instr)
+static int etb_set_instr(etb_t *etb, uint32_t new_instr)
{
jtag_tap_t *tap;
@@ -71,7 +71,7 @@
return ERROR_OK;
}
-static int etb_scann(etb_t *etb, u32 new_scan_chain)
+static int etb_scann(etb_t *etb, uint32_t new_scan_chain)
{
if (etb->cur_scan_chain != new_scan_chain)
{
@@ -160,11 +160,11 @@
static void etb_getbuf(uint8_t *in)
{
- *((u32 *)in)=buf_get_u32(in, 0, 32);
+ *((uint32_t *)in)=buf_get_u32(in, 0, 32);
}
-static int etb_read_ram(etb_t *etb, u32 *data, int num_frames)
+static int etb_read_ram(etb_t *etb, uint32_t *data, int num_frames)
{
scan_field_t fields[3];
int i;
@@ -275,7 +275,7 @@
return etb_read_reg_w_check(reg, NULL, NULL);
}
-int etb_set_reg(reg_t *reg, u32 value)
+int etb_set_reg(reg_t *reg, uint32_t value)
{
int retval;
@@ -306,7 +306,7 @@
return ERROR_OK;
}
-int etb_write_reg(reg_t *reg, u32 value)
+int etb_write_reg(reg_t *reg, uint32_t value)
{
etb_reg_t *etb_reg = reg->arch_info;
uint8_t reg_addr = etb_reg->addr & 0x7f;
@@ -491,7 +491,7 @@
etb_t *etb = etm_ctx->capture_driver_priv;
int first_frame = 0;
int num_frames = etb->ram_depth;
- u32 *trace_data = NULL;
+ uint32_t *trace_data = NULL;
int i, j;
etb_read_reg(&etb->reg_cache->reg_list[ETB_STATUS]);
@@ -514,7 +514,7 @@
etb_write_reg(&etb->reg_cache->reg_list[ETB_RAM_READ_POINTER], first_frame);
/* read data into temporary array for unpacking */
- trace_data = malloc(sizeof(u32) * num_frames);
+ trace_data = malloc(sizeof(uint32_t) * num_frames);
etb_read_ram(etb, trace_data, num_frames);
if (etm_ctx->trace_depth > 0)
@@ -639,8 +639,8 @@
static int etb_start_capture(etm_context_t *etm_ctx)
{
etb_t *etb = etm_ctx->capture_driver_priv;
- u32 etb_ctrl_value = 0x1;
- u32 trigger_count;
+ uint32_t etb_ctrl_value = 0x1;
+ uint32_t trigger_count;
if ((etm_ctx->portmode & ETM_PORT_MODE_MASK) == ETM_PORT_DEMUXED)
{
Modified: trunk/src/target/etb.h
===================================================================
--- trunk/src/target/etb.h 2009-06-18 07:08:52 UTC (rev 2278)
+++ trunk/src/target/etb.h 2009-06-18 07:09:35 UTC (rev 2279)
@@ -40,17 +40,17 @@
{
etm_context_t *etm_ctx;
jtag_tap_t *tap;
- u32 cur_scan_chain;
+ uint32_t cur_scan_chain;
reg_cache_t *reg_cache;
/* ETB parameters */
- u32 ram_depth;
- u32 ram_width;
+ uint32_t ram_depth;
+ uint32_t ram_width;
} etb_t;
typedef struct etb_reg_s
{
- u32 addr;
+ uint32_t addr;
etb_t *etb;
} etb_reg_t;
@@ -58,10 +58,10 @@
extern reg_cache_t* etb_build_reg_cache(etb_t *etb);
extern int etb_read_reg(reg_t *reg);
-extern int etb_write_reg(reg_t *reg, u32 value);
+extern int etb_write_reg(reg_t *reg, uint32_t value);
extern int etb_read_reg_w_check(reg_t *reg, uint8_t* check_value, uint8_t* check_mask);
extern int etb_store_reg(reg_t *reg);
-extern int etb_set_reg(reg_t *reg, u32 value);
+extern int etb_set_reg(reg_t *reg, uint32_t value);
extern int etb_set_reg_w_exec(reg_t *reg, uint8_t *buf);
#endif /* ETB_H */
Modified: trunk/src/target/etm.c
===================================================================
--- trunk/src/target/etm.c 2009-06-18 07:08:52 UTC (rev 2278)
+++ trunk/src/target/etm.c 2009-06-18 07:09:35 UTC (rev 2279)
@@ -261,7 +261,7 @@
int etm_setup(target_t *target)
{
int retval;
- u32 etm_ctrl_value;
+ uint32_t etm_ctrl_value;
armv4_5_common_t *armv4_5 = target->arch_info;
arm7_9_common_t *arm7_9 = armv4_5->arch_info;
etm_context_t *etm_ctx = arm7_9->etm_ctx;
@@ -366,7 +366,7 @@
return etm_read_reg_w_check(reg, NULL, NULL);
}
-int etm_set_reg(reg_t *reg, u32 value)
+int etm_set_reg(reg_t *reg, uint32_t value)
{
int retval;
@@ -397,7 +397,7 @@
return ERROR_OK;
}
-int etm_write_reg(reg_t *reg, u32 value)
+int etm_write_reg(reg_t *reg, uint32_t value)
{
etm_reg_t *etm_reg = reg->arch_info;
uint8_t reg_addr = etm_reg->addr & 0x7f;
@@ -474,8 +474,8 @@
{
int i;
int section = -1;
- u32 size_read;
- u32 opcode;
+ uint32_t size_read;
+ uint32_t opcode;
int retval;
if (!ctx->image)
@@ -609,7 +609,7 @@
uint8_t packet;
int shift = 0;
int apo;
- u32 i;
+ uint32_t i;
/* quit analysis if less than two cycles are left in the trace
* because we can't extract the APO */
@@ -689,7 +689,7 @@
return 0;
}
-static int etmv1_data(etm_context_t *ctx, int size, u32 *data)
+static int etmv1_data(etm_context_t *ctx, int size, uint32_t *data)
{
int j;
uint8_t buf[4];
@@ -739,12 +739,12 @@
while (ctx->pipe_index < ctx->trace_depth)
{
uint8_t pipestat = ctx->trace_data[ctx->pipe_index].pipestat;
- u32 next_pc = ctx->current_pc;
- u32 old_data_index = ctx->data_index;
- u32 old_data_half = ctx->data_half;
- u32 old_index = ctx->pipe_index;
- u32 last_instruction = ctx->last_instruction;
- u32 cycles = 0;
+ uint32_t next_pc = ctx->current_pc;
+ uint32_t old_data_index = ctx->data_index;
+ uint32_t old_data_half = ctx->data_half;
+ uint32_t old_index = ctx->pipe_index;
+ uint32_t last_instruction = ctx->last_instruction;
+ uint32_t cycles = 0;
int current_pc_ok = ctx->pc_ok;
if (ctx->trace_data[ctx->pipe_index].flags & ETMV1_TRIGGER_CYCLE)
@@ -888,8 +888,8 @@
if ((pipestat == STAT_ID) || (pipestat == STAT_BD))
{
- u32 new_data_index = ctx->data_index;
- u32 new_data_half = ctx->data_half;
+ uint32_t new_data_index = ctx->data_index;
+ uint32_t new_data_half = ctx->data_half;
/* in case of a branch with data, the branch target address was consumed before
* we temporarily go back to the saved data index */
@@ -930,7 +930,7 @@
{
if (instruction.info.load_store_multiple.register_list & (1 << i))
{
- u32 data;
+ uint32_t data;
if (etmv1_data(ctx, 4, &data) != 0)
return ERROR_ETM_ANALYSIS_FAILED;
command_print(cmd_ctx, "data: 0x%8.8x", data);
@@ -939,7 +939,7 @@
}
else if ((instruction.type >= ARM_LDR) && (instruction.type <= ARM_STRH))
{
- u32 data;
+ uint32_t data;
if (etmv1_data(ctx, arm_access_size(&instruction), &data) != 0)
return ERROR_ETM_ANALYSIS_FAILED;
command_print(cmd_ctx, "data: 0x%8.8x", data);
@@ -1504,7 +1504,7 @@
armv4_5_common_t *armv4_5;
arm7_9_common_t *arm7_9;
etm_context_t *etm_ctx;
- u32 i;
+ uint32_t i;
if (argc != 1)
{
@@ -1572,7 +1572,7 @@
armv4_5_common_t *armv4_5;
arm7_9_common_t *arm7_9;
etm_context_t *etm_ctx;
- u32 i;
+ uint32_t i;
if (argc != 1)
{
@@ -1633,7 +1633,7 @@
for (i = 0; i < etm_ctx->trace_depth; i++)
{
- u32 pipestat, packet, flags;
+ uint32_t pipestat, packet, flags;
fileio_read_u32(&file, &pipestat);
fileio_read_u32(&file, &packet);
fileio_read_u32(&file, &flags);
@@ -1670,7 +1670,7 @@
if (argc > 0)
{
- u32 new_value = strtoul(args[0], NULL, 0);
+ uint32_t new_value = strtoul(args[0], NULL, 0);
if ((new_value < 2) || (new_value > 100))
{
Modified: trunk/src/target/etm.h
===================================================================
--- trunk/src/target/etm.h 2009-06-18 07:08:52 UTC (rev 2278)
+++ trunk/src/target/etm.h 2009-06-18 07:09:35 UTC (rev 2279)
@@ -143,25 +143,25 @@
reg_cache_t *reg_cache; /* ETM register cache */
etm_capture_driver_t *capture_driver; /* driver used to access ETM data */
void *capture_driver_priv; /* capture driver private data */
- u32 trigger_percent; /* percent of trace buffer to be filled after the trigger */
+ uint32_t trigger_percent; /* percent of trace buffer to be filled after the trigger */
trace_status_t capture_status; /* current state of capture run */
etmv1_trace_data_t *trace_data; /* trace data */
- u32 trace_depth; /* number of trace cycles to be analyzed, 0 if no trace data available */
+ uint32_t trace_depth; /* number of trace cycles to be analyzed, 0 if no trace data available */
etm_portmode_t portmode; /* normal, multiplexed or demultiplexed */
etmv1_tracemode_t tracemode; /* type of information the trace contains (data, addres, contextID, ...) */
armv4_5_state_t core_state; /* current core state (ARM, Thumb, Jazelle) */
struct image_s *image; /* source for target opcodes */
- u32 pipe_index; /* current trace cycle */
- u32 data_index; /* cycle holding next data packet */
+ uint32_t pipe_index; /* current trace cycle */
+ uint32_t data_index; /* cycle holding next data packet */
int data_half; /* port half on a 16 bit port */
- u32 current_pc; /* current program counter */
- u32 pc_ok; /* full PC has been acquired */
- u32 last_branch; /* last branch address output */
- u32 last_branch_reason; /* branch reason code for the last branch encountered */
- u32 last_ptr; /* address of the last data access */
- u32 ptr_ok; /* whether last_ptr is valid */
- u32 context_id; /* context ID of the code being traced */
- u32 last_instruction; /* index of last instruction executed (to calculate cycle timings) */
+ uint32_t current_pc; /* current program counter */
+ uint32_t pc_ok; /* full PC has been acquired */
+ uint32_t last_branch; /* last branch address output */
+ uint32_t last_branch_reason; /* branch reason code for the last branch encountered */
+ uint32_t last_ptr; /* address of the last data access */
+ uint32_t ptr_ok; /* whether last_ptr is valid */
+ uint32_t context_id; /* context ID of the code being traced */
+ uint32_t last_instruction; /* index of last instruction executed (to calculate cycle timings) */
} etm_context_t;
/* PIPESTAT values */
@@ -194,10 +194,10 @@
extern reg_cache_t* etm_build_reg_cache(target_t *target, arm_jtag_t *jtag_info, etm_context_t *etm_ctx);
extern int etm_read_reg(reg_t *reg);
-extern int etm_write_reg(reg_t *reg, u32 value);
+extern int etm_write_reg(reg_t *reg, uint32_t value);
extern int etm_read_reg_w_check(reg_t *reg, uint8_t* check_value, uint8_t* check_mask);
extern int etm_store_reg(reg_t *reg);
-extern int etm_set_reg(reg_t *reg, u32 value);
+extern int etm_set_reg(reg_t *reg, uint32_t value);
extern int etm_set_reg_w_exec(reg_t *reg, uint8_t *buf);
extern int etm_setup(target_t *target);
Modified: trunk/src/target/feroceon.c
===================================================================
--- trunk/src/target/feroceon.c 2009-06-18 07:08:52 UTC (rev 2278)
+++ trunk/src/target/feroceon.c 2009-06-18 07:09:35 UTC (rev 2279)
@@ -55,7 +55,7 @@
int feroceon_examine(struct target_s *target);
int feroceon_target_create(struct target_s *target, Jim_Interp *interp);
-int feroceon_bulk_write_memory(target_t *target, u32 address, u32 count, uint8_t *buffer);
+int feroceon_bulk_write_memory(target_t *target, uint32_t address, uint32_t count, uint8_t *buffer);
int feroceon_init_target(struct command_context_s *cmd_ctx, struct target_s *target);
int feroceon_quit(void);
@@ -112,7 +112,7 @@
};
-int feroceon_dummy_clock_out(arm_jtag_t *jtag_info, u32 instr)
+int feroceon_dummy_clock_out(arm_jtag_t *jtag_info, uint32_t instr)
{
scan_field_t fields[3];
uint8_t out_buf[4];
@@ -166,7 +166,7 @@
return ERROR_OK;
}
-void feroceon_change_to_arm(target_t *target, u32 *r0, u32 *pc)
+void feroceon_change_to_arm(target_t *target, uint32_t *r0, uint32_t *pc)
{
armv4_5_common_t *armv4_5 = target->arch_info;
arm7_9_common_t *arm7_9 = armv4_5->arch_info;
@@ -212,7 +212,7 @@
*pc -= (12 + 4);
}
-void feroceon_read_core_regs(target_t *target, u32 mask, u32* core_regs[16])
+void feroceon_read_core_regs(target_t *target, uint32_t mask, uint32_t* core_regs[16])
{
int i;
armv4_5_common_t *armv4_5 = target->arch_info;
@@ -231,14 +231,14 @@
arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, NULL, 0);
}
-void feroceon_read_core_regs_target_buffer(target_t *target, u32 mask, void* buffer, int size)
+void feroceon_read_core_regs_target_buffer(target_t *target, uint32_t mask, void* buffer, int size)
{
int i;
armv4_5_common_t *armv4_5 = target->arch_info;
arm7_9_common_t *arm7_9 = armv4_5->arch_info;
arm_jtag_t *jtag_info = &arm7_9->jtag_info;
int be = (target->endianness == TARGET_BIG_ENDIAN) ? 1 : 0;
- u32 *buf_u32 = buffer;
+ uint32_t *buf_u32 = buffer;
uint16_t *buf_u16 = buffer;
uint8_t *buf_u8 = buffer;
@@ -268,7 +268,7 @@
arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, NULL, 0);
}
-void feroceon_read_xpsr(target_t *target, u32 *xpsr, int spsr)
+void feroceon_read_xpsr(target_t *target, uint32_t *xpsr, int spsr)
{
armv4_5_common_t *armv4_5 = target->arch_info;
arm7_9_common_t *arm7_9 = armv4_5->arch_info;
@@ -291,7 +291,7 @@
arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, NULL, 0);
}
-void feroceon_write_xpsr(target_t *target, u32 xpsr, int spsr)
+void feroceon_write_xpsr(target_t *target, uint32_t xpsr, int spsr)
{
armv4_5_common_t *armv4_5 = target->arch_info;
arm7_9_common_t *arm7_9 = armv4_5->arch_info;
@@ -349,7 +349,7 @@
arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, NULL, 0);
}
-void feroceon_write_core_regs(target_t *target, u32 mask, u32 core_regs[16])
+void feroceon_write_core_regs(target_t *target, uint32_t mask, uint32_t core_regs[16])
{
int i;
armv4_5_common_t *armv4_5 = target->arch_info;
@@ -391,8 +391,8 @@
armv4_5_common_t *armv4_5 = target->arch_info;
arm7_9_common_t *arm7_9 = armv4_5->arch_info;
arm_jtag_t *jtag_info = &arm7_9->jtag_info;
- u32 r0 = buf_get_u32(armv4_5->core_cache->reg_list[0].value, 0, 32);
- u32 pc = buf_get_u32(armv4_5->core_cache->reg_list[15].value, 0, 32);
+ uint32_t r0 = buf_get_u32(armv4_5->core_cache->reg_list[0].value, 0, 32);
+ uint32_t pc = buf_get_u32(armv4_5->core_cache->reg_list[15].value, 0, 32);
(void)(r0); // use R0...
arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, NULL, 0);
@@ -420,7 +420,7 @@
arm7_9->need_bypass_before_restart = 1;
}
-int feroceon_read_cp15(target_t *target, u32 op1, u32 op2, u32 CRn, u32 CRm, u32 *value)
+int feroceon_read_cp15(target_t *target, uint32_t op1, uint32_t op2, uint32_t CRn, uint32_t CRm, uint32_t *value)
{
armv4_5_common_t *armv4_5 = target->arch_info;
arm7_9_common_t *arm7_9 = armv4_5->arch_info;
@@ -442,7 +442,7 @@
return jtag_execute_queue();
}
-int feroceon_write_cp15(target_t *target, u32 op1, u32 op2, u32 CRn, u32 CRm, u32 value)
+int feroceon_write_cp15(target_t *target, uint32_t op1, uint32_t op2, uint32_t CRn, uint32_t CRm, uint32_t value)
{
armv4_5_common_t *armv4_5 = target->arch_info;
arm7_9_common_t *arm7_9 = armv4_5->arch_info;
@@ -471,7 +471,7 @@
embeddedice_store_reg(dbg_ctrl);
}
-void feroceon_enable_single_step(target_t *target, u32 next_pc)
+void feroceon_enable_single_step(target_t *target, uint32_t next_pc)
{
armv4_5_common_t *armv4_5 = target->arch_info;
arm7_9_common_t *arm7_9 = armv4_5->arch_info;
@@ -507,20 +507,20 @@
return ERROR_OK;
}
-int feroceon_bulk_write_memory(target_t *target, u32 address, u32 count, uint8_t *buffer)
+int feroceon_bulk_write_memory(target_t *target, uint32_t address, uint32_t count, uint8_t *buffer)
{
int retval;
armv4_5_common_t *armv4_5 = target->arch_info;
arm7_9_common_t *arm7_9 = armv4_5->arch_info;
enum armv4_5_state core_state = armv4_5->core_state;
- u32 x, flip, shift, save[7];
- u32 i;
+ uint32_t x, flip, shift, save[7];
+ uint32_t i;
/*
* We can't use the dcc flow control bits, so let's transfer data
* with 31 bits and flip the MSB each time a new data word is sent.
*/
- static u32 dcc_code[] =
+ static uint32_t dcc_code[] =
{
0xee115e10, /* 3: mrc p14, 0, r5, c1, c0, 0 */
0xe3a0301e, /* 1: mov r3, #30 */
@@ -544,7 +544,7 @@
0xeafffff3, /* b 3b */
};
- u32 dcc_size = sizeof(dcc_code);
+ uint32_t dcc_size = sizeof(dcc_code);
if (!arm7_9->dcc_downloads)
return target_write_memory(target, address, 4, count, buffer);
@@ -592,8 +592,8 @@
shift = 1;
for (i = 0; i < count; i++)
{
- u32 y = target_buffer_get_u32(target, buffer);
- u32 z = (x >> 1) | (y >> shift) | (flip ^= 0x80000000);
+ uint32_t y = target_buffer_get_u32(target, buffer);
+ uint32_t z = (x >> 1) | (y >> shift) | (flip ^= 0x80000000);
embeddedice_write_reg(&arm7_9->eice_cache->reg_list[EICE_COMMS_DATA], z);
x = y << (32 - shift);
if (++shift >= 32 || i + 1 >= count)
Modified: trunk/src/target/image.c
===================================================================
--- trunk/src/target/image.c 2009-06-18 07:08:52 UTC (rev 2278)
+++ trunk/src/target/image.c 2009-06-18 07:09:35 UTC (rev 2279)
@@ -45,7 +45,7 @@
{
int retval;
fileio_t fileio;
- u32 read_bytes;
+ uint32_t read_bytes;
uint8_t buffer[9];
/* read the first 4 bytes of image */
@@ -148,8 +148,8 @@
{
image_ihex_t *ihex = image->type_private;
fileio_t *fileio = &ihex->fileio;
- u32 full_address = 0x0;
- u32 cooked_bytes;
+ uint32_t full_address = 0x0;
+ uint32_t cooked_bytes;
int i;
char lpszLine[1023];
@@ -167,12 +167,12 @@
while (fileio_fgets(fileio, 1023, lpszLine) == ERROR_OK)
{
- u32 count;
- u32 address;
- u32 record_type;
- u32 checksum;
+ uint32_t count;
+ uint32_t address;
+ uint32_t record_type;
+ uint32_t checksum;
uint8_t cal_checksum = 0;
- u32 bytes_read = 0;
+ uint32_t bytes_read = 0;
if (sscanf(&lpszLine[bytes_read], ":%2x%4x%2x", &count, &address, &record_type) != 3)
{
@@ -263,7 +263,7 @@
}
else if (record_type == 3) /* Start Segment Address Record */
{
- u32 dummy;
+ uint32_t dummy;
/* "Start Segment Address Record" will not be supported */
/* but we must consume it, and do not create an error. */
@@ -303,7 +303,7 @@
}
else if (record_type == 5) /* Start Linear Address Record */
{
- u32 start_address;
+ uint32_t start_address;
sscanf(&lpszLine[bytes_read], "%8x", &start_address);
cal_checksum += (uint8_t)(start_address >> 24);
@@ -339,8 +339,8 @@
static int image_elf_read_headers(image_t *image)
{
image_elf_t *elf = image->type_private;
- u32 read_bytes;
- u32 i,j;
+ uint32_t read_bytes;
+ uint32_t i,j;
int retval;
elf->header = malloc(sizeof(Elf32_Ehdr));
@@ -437,11 +437,11 @@
return ERROR_OK;
}
-static int image_elf_read_section(image_t *image, int section, u32 offset, u32 size, uint8_t *buffer, u32 *size_read)
+static int image_elf_read_section(image_t *image, int section, uint32_t offset, uint32_t size, uint8_t *buffer, uint32_t *size_read)
{
image_elf_t *elf = image->type_private;
Elf32_Phdr *segment = (Elf32_Phdr *)image->sections[section].private;
- u32 read_size,really_read;
+ uint32_t read_size,really_read;
int retval;
*size_read = 0;
@@ -482,8 +482,8 @@
{
image_mot_t *mot = image->type_private;
fileio_t *fileio = &mot->fileio;
- u32 full_address = 0x0;
- u32 cooked_bytes;
+ uint32_t full_address = 0x0;
+ uint32_t cooked_bytes;
int i;
char lpszLine[1023];
@@ -501,12 +501,12 @@
while (fileio_fgets(fileio, 1023, lpszLine) == ERROR_OK)
{
- u32 count;
- u32 address;
- u32 record_type;
- u32 checksum;
+ uint32_t count;
+ uint32_t address;
+ uint32_t record_type;
+ uint32_t checksum;
uint8_t cal_checksum = 0;
- u32 bytes_read = 0;
+ uint32_t bytes_read = 0;
/* get record type and record length */
if (sscanf(&lpszLine[bytes_read], "S%1x%2x", &record_type, &count) != 2)
@@ -599,7 +599,7 @@
else if (record_type == 5)
{
/* S5 is the data count record, we ignore it */
- u32 dummy;
+ uint32_t dummy;
while (count-- > 0)
{
@@ -776,7 +776,7 @@
return retval;
};
-int image_read_section(image_t *image, int section, u32 offset, u32 size, uint8_t *buffer, u32 *size_read)
+int image_read_section(image_t *image, int section, uint32_t offset, uint32_t size, uint8_t *buffer, uint32_t *size_read)
{
int retval;
@@ -822,13 +822,13 @@
else if (image->type == IMAGE_MEMORY)
{
image_memory_t *image_memory = image->type_private;
- u32 address = image->sections[section].base_address + offset;
+ uint32_t address = image->sections[section].base_address + offset;
*size_read = 0;
while ((size - *size_read) > 0)
{
- u32 size_in_cache;
+ uint32_t size_in_cache;
if (!image_memory->cache
|| (address < image_memory->cache_address)
@@ -876,7 +876,7 @@
return ERROR_OK;
}
-int image_add_section(image_t *image, u32 base, u32 size, int flags, uint8_t *data)
+int image_add_section(image_t *image, uint32_t base, uint32_t size, int flags, uint8_t *data)
{
image_section_t *section;
@@ -997,12 +997,12 @@
}
}
-int image_calculate_checksum(uint8_t* buffer, u32 nbytes, u32* checksum)
+int image_calculate_checksum(uint8_t* buffer, uint32_t nbytes, uint32_t* checksum)
{
- u32 crc = 0xffffffff;
+ uint32_t crc = 0xffffffff;
LOG_DEBUG("Calculating checksum");
- u32 crc32_table[256];
+ uint32_t crc32_table[256];
/* Initialize the CRC table and the decoding table. */
int i, j;
Modified: trunk/src/target/image.h
===================================================================
--- trunk/src/target/image.h 2009-06-18 07:08:52 UTC (rev 2278)
+++ trunk/src/target/image.h 2009-06-18 07:09:35 UTC (rev 2279)
@@ -49,8 +49,8 @@
typedef struct image_section_s
{
- u32 base_address;
- u32 size;
+ uint32_t base_address;
+ uint32_t size;
int flags;
void *private; /* private data */
} image_section_t;
@@ -64,7 +64,7 @@
int base_address_set; /* whether the image has a base address set (for relocation purposes) */
int base_address; /* base address, if one is set */
int start_address_set; /* whether the image has a start address (entry point) associated */
- u32 start_address; /* start address, if one is set */
+ uint32_t start_address; /* start address, if one is set */
} image_t;
typedef struct image_binary_s
@@ -82,7 +82,7 @@
{
struct target_s *target;
uint8_t *cache;
- u32 cache_address;
+ uint32_t cache_address;
} image_memory_t;
typedef struct fileio_elf_s
@@ -90,7 +90,7 @@
fileio_t fileio;
Elf32_Ehdr *header;
Elf32_Phdr *segments;
- u32 segment_count;
+ uint32_t segment_count;
uint8_t endianness;
} image_elf_t;
@@ -101,11 +101,11 @@
} image_mot_t;
extern int image_open(image_t *image, char *url, char *type_string);
-extern int image_read_section(image_t *image, int section, u32 offset, u32 size, uint8_t *buffer, u32 *size_read);
+extern int image_read_section(image_t *image, int section, uint32_t offset, uint32_t size, uint8_t *buffer, uint32_t *size_read);
extern void image_close(image_t *image);
-extern int image_add_section(image_t *image, u32 base, u32 size, int flags, uint8_t *data);
+extern int image_add_section(image_t *image, uint32_t base, uint32_t size, int flags, uint8_t *data);
-extern int image_calculate_checksum(uint8_t* buffer, u32 nbytes, u32* checksum);
+extern int image_calculate_checksum(uint8_t* buffer, uint32_t nbytes, uint32_t* checksum);
#define ERROR_IMAGE_FORMAT_ERROR (-1400)
#define ERROR_IMAGE_TYPE_UNKNOWN (-1401)
Modified: trunk/src/target/mips32.c
===================================================================
--- trunk/src/target/mips32.c 2009-06-18 07:08:52 UTC (rev 2278)
+++ trunk/src/target/mips32.c 2009-06-18 07:09:35 UTC (rev 2279)
@@ -116,7 +116,7 @@
{
mips32_core_reg_t *mips32_reg = reg->arch_info;
target_t *target = mips32_reg->target;
- u32 value = buf_get_u32(buf, 0, 32);
+ uint32_t value = buf_get_u32(buf, 0, 32);
if (target->state != TARGET_HALTED)
{
@@ -132,7 +132,7 @@
int mips32_read_core_reg(struct target_s *target, int num)
{
- u32 reg_value;
+ uint32_t reg_value;
mips32_core_reg_t *mips_core_reg;
/* get pointers to arch-specific information */
@@ -152,7 +152,7 @@
int mips32_write_core_reg(struct target_s *target, int num)
{
- u32 reg_value;
+ uint32_t reg_value;
mips32_core_reg_t *mips_core_reg;
/* get pointers to arch-specific information */
@@ -336,7 +336,7 @@
return ERROR_OK;
}
-int mips32_run_algorithm(struct target_s *target, int num_mem_params, mem_param_t *mem_params, int num_reg_params, reg_param_t *reg_params, u32 entry_point, u32 exit_point, int timeout_ms, void *arch_info)
+int mips32_run_algorithm(struct target_s *target, int num_mem_params, mem_param_t *mem_params, int num_reg_params, reg_param_t *reg_params, uint32_t entry_point, uint32_t exit_point, int timeout_ms, void *arch_info)
{
/*TODO*/
return ERROR_OK;
@@ -366,7 +366,7 @@
/* get pointers to arch-specific information */
mips32_common_t *mips32 = target->arch_info;
int retval;
- u32 dcr, bpinfo;
+ uint32_t dcr, bpinfo;
int i;
if (mips32->bp_scanned)
@@ -425,7 +425,7 @@
{
int retval;
int update = 0;
- u32 dcr;
+ uint32_t dcr;
/* read debug control register */
if ((retval = target_read_u32(target, EJTAG_DCR, &dcr)) != ERROR_OK)
Modified: trunk/src/target/mips32.h
===================================================================
--- trunk/src/target/mips32.h 2009-06-18 07:08:52 UTC (rev 2278)
+++ trunk/src/target/mips32.h 2009-06-18 07:09:35 UTC (rev 2279)
@@ -41,17 +41,17 @@
{
int used;
//int type;
- u32 bp_value;
- u32 reg_address;
+ uint32_t bp_value;
+ uint32_t reg_address;
} mips32_comparator_t;
typedef struct mips32_common_s
{
- u32 common_magic;
+ uint32_t common_magic;
void *arch_info;
reg_cache_t *core_cache;
mips_ejtag_t ejtag_info;
- u32 core_regs[MIPS32NUMCOREREGS];
+ uint32_t core_regs[MIPS32NUMCOREREGS];
int bp_scanned;
int num_inst_bpoints;
@@ -68,7 +68,7 @@
typedef struct mips32_core_reg_s
{
- u32 num;
+ uint32_t num;
struct target_s *target;
mips32_common_t *mips32_common;
} mips32_core_reg_t;
@@ -129,7 +129,7 @@
extern int mips32_restore_context(target_t *target);
extern int mips32_save_context(target_t *target);
extern reg_cache_t *mips32_build_reg_cache(target_t *target);
-extern int mips32_run_algorithm(struct target_s *target, int num_mem_params, mem_param_t *mem_params, int num_reg_params, reg_param_t *reg_params, u32 entry_point, u32 exit_point, int timeout_ms, void *arch_info);
+extern int mips32_run_algorithm(struct target_s *target, int num_mem_params, mem_param_t *mem_params, int num_reg_params, reg_param_t *reg_params, uint32_t entry_point, uint32_t exit_point, int timeout_ms, void *arch_info);
extern int mips32_configure_break_unit(struct target_s *target);
extern int mips32_enable_interrupts(struct target_s *target, int enable);
extern int mips32_examine(struct target_s *target);
Modified: trunk/src/target/mips32_dmaacc.c
===================================================================
--- trunk/src/target/mips32_dmaacc.c 2009-06-18 07:08:52 UTC (rev 2278)
+++ trunk/src/target/mips32_dmaacc.c 2009-06-18 07:09:35 UTC (rev 2279)
@@ -39,10 +39,10 @@
* displaying/modifying memory and memory mapped registers.
*/
-static int ejtag_dma_read(mips_ejtag_t *ejtag_info, u32 addr, u32 *data)
+static int ejtag_dma_read(mips_ejtag_t *ejtag_info, uint32_t addr, uint32_t *data)
{
- u32 v;
- u32 ejtag_ctrl;
+ uint32_t v;
+ uint32_t ejtag_ctrl;
int retries = RETRY_ATTEMPTS;
begin_ejtag_dma_read:
@@ -85,10 +85,10 @@
return ERROR_OK;
}
-static int ejtag_dma_read_h(mips_ejtag_t *ejtag_info, u32 addr, uint16_t *data)
+static int ejtag_dma_read_h(mips_ejtag_t *ejtag_info, uint32_t addr, uint16_t *data)
{
- u32 v;
- u32 ejtag_ctrl;
+ uint32_t v;
+ uint32_t ejtag_ctrl;
int retries = RETRY_ATTEMPTS;
begin_ejtag_dma_read_h:
@@ -137,10 +137,10 @@
return ERROR_OK;
}
-static int ejtag_dma_read_b(mips_ejtag_t *ejtag_info, u32 addr, uint8_t *data)
+static int ejtag_dma_read_b(mips_ejtag_t *ejtag_info, uint32_t addr, uint8_t *data)
{
- u32 v;
- u32 ejtag_ctrl;
+ uint32_t v;
+ uint32_t ejtag_ctrl;
int retries = RETRY_ATTEMPTS;
begin_ejtag_dma_read_b:
@@ -199,10 +199,10 @@
return ERROR_OK;
}
-static int ejtag_dma_write(mips_ejtag_t *ejtag_info, u32 addr, u32 data)
+static int ejtag_dma_write(mips_ejtag_t *ejtag_info, uint32_t addr, uint32_t data)
{
- u32 v;
- u32 ejtag_ctrl;
+ uint32_t v;
+ uint32_t ejtag_ctrl;
int retries = RETRY_ATTEMPTS;
begin_ejtag_dma_write:
@@ -246,10 +246,10 @@
return ERROR_OK;
}
-static int ejtag_dma_write_h(mips_ejtag_t *ejtag_info, u32 addr, u32 data)
+static int ejtag_dma_write_h(mips_ejtag_t *ejtag_info, uint32_t addr, uint32_t data)
{
- u32 v;
- u32 ejtag_ctrl;
+ uint32_t v;
+ uint32_t ejtag_ctrl;
int retries = RETRY_ATTEMPTS;
/* Handle the bigendian/littleendian */
@@ -297,10 +297,10 @@
return ERROR_OK;
}
-static int ejtag_dma_write_b(mips_ejtag_t *ejtag_info, u32 addr, u32 data)
+static int ejtag_dma_write_b(mips_ejtag_t *ejtag_info, uint32_t addr, uint32_t data)
{
- u32 v;
- u32 ejtag_ctrl;
+ uint32_t v;
+ uint32_t ejtag_ctrl;
int retries = RETRY_ATTEMPTS;
/* Handle the bigendian/littleendian */
@@ -349,7 +349,7 @@
return ERROR_OK;
}
-int mips32_dmaacc_read_mem(mips_ejtag_t *ejtag_info, u32 addr, int size, int count, void *buf)
+int mips32_dmaacc_read_mem(mips_ejtag_t *ejtag_info, uint32_t addr, int size, int count, void *buf)
{
switch (size)
{
@@ -358,13 +358,13 @@
case 2:
return mips32_dmaacc_read_mem16(ejtag_info, addr, count, (uint16_t*)buf);
case 4:
- return mips32_dmaacc_read_mem32(ejtag_info, addr, count, (u32*)buf);
+ return mips32_dmaacc_read_mem32(ejtag_info, addr, count, (uint32_t*)buf);
}
return ERROR_OK;
}
-int mips32_dmaacc_read_mem32(mips_ejtag_t *ejtag_info, u32 addr, int count, u32 *buf)
+int mips32_dmaacc_read_mem32(mips_ejtag_t *ejtag_info, uint32_t addr, int count, uint32_t *buf)
{
int i;
int retval;
@@ -377,7 +377,7 @@
return ERROR_OK;
}
-int mips32_dmaacc_read_mem16(mips_ejtag_t *ejtag_info, u32 addr, int count, uint16_t *buf)
+int mips32_dmaacc_read_mem16(mips_ejtag_t *ejtag_info, uint32_t addr, int count, uint16_t *buf)
{
int i;
int retval;
@@ -390,7 +390,7 @@
return ERROR_OK;
}
-int mips32_dmaacc_read_mem8(mips_ejtag_t *ejtag_info, u32 addr, int count, uint8_t *buf)
+int mips32_dmaacc_read_mem8(mips_ejtag_t *ejtag_info, uint32_t addr, int count, uint8_t *buf)
{
int i;
int retval;
@@ -403,7 +403,7 @@
return ERROR_OK;
}
-int mips32_dmaacc_write_mem(mips_ejtag_t *ejtag_info, u32 addr, int size, int count, void *buf)
+int mips32_dmaacc_write_mem(mips_ejtag_t *ejtag_info, uint32_t addr, int size, int count, void *buf)
{
switch (size)
{
@@ -412,13 +412,13 @@
case 2:
return mips32_dmaacc_write_mem16(ejtag_info, addr, count,(uint16_t*)buf);
case 4:
- return mips32_dmaacc_write_mem32(ejtag_info, addr, count, (u32*)buf);
+ return mips32_dmaacc_write_mem32(ejtag_info, addr, count, (uint32_t*)buf);
}
return ERROR_OK;
}
-int mips32_dmaacc_write_mem32(mips_ejtag_t *ejtag_info, u32 addr, int count, u32 *buf)
+int mips32_dmaacc_write_mem32(mips_ejtag_t *ejtag_info, uint32_t addr, int count, uint32_t *buf)
{
int i;
int retval;
@@ -431,7 +431,7 @@
return ERROR_OK;
}
-int mips32_dmaacc_write_mem16(mips_ejtag_t *ejtag_info, u32 addr, int count, uint16_t *buf)
+int mips32_dmaacc_write_mem16(mips_ejtag_t *ejtag_info, uint32_t addr, i...
[truncated message content] |
|
From: <zw...@ma...> - 2009-06-18 09:09:30
|
Author: zwelch
Date: 2009-06-18 09:08:52 +0200 (Thu, 18 Jun 2009)
New Revision: 2278
Modified:
trunk/src/target/arm11.c
trunk/src/target/arm11.h
trunk/src/target/arm11_dbgtap.c
trunk/src/target/arm720t.c
trunk/src/target/arm720t.h
trunk/src/target/arm7_9_common.c
trunk/src/target/arm7_9_common.h
trunk/src/target/arm7tdmi.c
trunk/src/target/arm920t.c
trunk/src/target/arm920t.h
trunk/src/target/arm926ejs.c
trunk/src/target/arm926ejs.h
trunk/src/target/arm966e.c
trunk/src/target/arm966e.h
trunk/src/target/arm9tdmi.c
trunk/src/target/arm9tdmi.h
trunk/src/target/arm_adi_v5.c
trunk/src/target/arm_adi_v5.h
trunk/src/target/arm_disassembler.c
trunk/src/target/arm_disassembler.h
trunk/src/target/arm_jtag.c
trunk/src/target/arm_jtag.h
trunk/src/target/arm_simulator.c
trunk/src/target/arm_simulator.h
trunk/src/target/armv4_5.c
trunk/src/target/armv4_5.h
trunk/src/target/armv4_5_cache.c
trunk/src/target/armv4_5_cache.h
trunk/src/target/armv4_5_mmu.c
trunk/src/target/armv4_5_mmu.h
trunk/src/target/armv7m.c
trunk/src/target/armv7m.h
Log:
Transform 'u32' to 'uint32_t' in src/target/arm*
- Replace '\([^_]\)u32' with '\1uint32_t'.
- Replace '^u32' with 'uint32_t'.
Modified: trunk/src/target/arm11.c
===================================================================
--- trunk/src/target/arm11.c 2009-06-18 07:07:59 UTC (rev 2277)
+++ trunk/src/target/arm11.c 2009-06-18 07:08:52 UTC (rev 2278)
@@ -50,7 +50,7 @@
bool arm11_config_memwrite_burst = true;
bool arm11_config_memwrite_error_fatal = true;
-u32 arm11_vcr = 0;
+uint32_t arm11_vcr = 0;
bool arm11_config_memrw_no_increment = false;
bool arm11_config_step_irq_enable = false;
@@ -132,7 +132,7 @@
typedef struct arm11_reg_defs_s
{
char * name;
- u32 num;
+ uint32_t num;
int gdb_num;
enum arm11_regtype type;
} arm11_reg_defs_t;
@@ -311,11 +311,11 @@
* available a pointer to a word holding the
* DSCR can be passed. Otherwise use NULL.
*/
-int arm11_check_init(arm11_common_t * arm11, u32 * dscr)
+int arm11_check_init(arm11_common_t * arm11, uint32_t * dscr)
{
FNC_INFO;
- u32 dscr_local_tmp_copy;
+ uint32_t dscr_local_tmp_copy;
if (!dscr)
{
@@ -408,7 +408,7 @@
/* ARM1176 spec says this is needed only for wDTR/rDTR's "ITR mode", but not to issue ITRs
ARM1136 seems to require this to issue ITR's as well */
- u32 new_dscr = R(DSCR) | ARM11_DSCR_EXECUTE_ARM_INSTRUCTION_ENABLE;
+ uint32_t new_dscr = R(DSCR) | ARM11_DSCR_EXECUTE_ARM_INSTRUCTION_ENABLE;
/* this executes JTAG queue: */
@@ -430,7 +430,7 @@
/* mcr 15, 0, r0, cr7, cr10, {4} */
arm11_run_instr_no_data1(arm11, 0xee070f9a);
- u32 dscr = arm11_read_DSCR(arm11);
+ uint32_t dscr = arm11_read_DSCR(arm11);
LOG_DEBUG("DRAIN, DSCR %08x", dscr);
@@ -579,7 +579,7 @@
/* spec says clear wDTR and rDTR; we assume they are clear as
otherwise our programming would be sloppy */
{
- u32 DSCR;
+ uint32_t DSCR;
CHECK_RETVAL(arm11_read_DSCR(arm11, &DSCR));
@@ -668,7 +668,7 @@
if (arm11->trst_active)
return ERROR_OK;
- u32 dscr;
+ uint32_t dscr;
CHECK_RETVAL(arm11_read_DSCR(arm11, &dscr));
@@ -717,7 +717,7 @@
}
/* target request support */
-int arm11_target_request_data(struct target_s *target, u32 size, uint8_t *buffer)
+int arm11_target_request_data(struct target_s *target, uint32_t size, uint8_t *buffer)
{
FNC_INFO_NOTIMPLEMENTED;
@@ -755,7 +755,7 @@
CHECK_RETVAL(jtag_execute_queue());
- u32 dscr;
+ uint32_t dscr;
while (1)
{
@@ -779,7 +779,7 @@
return ERROR_OK;
}
-int arm11_resume(struct target_s *target, int current, u32 address, int handle_breakpoints, int debug_execution)
+int arm11_resume(struct target_s *target, int current, uint32_t address, int handle_breakpoints, int debug_execution)
{
FNC_INFO;
@@ -856,7 +856,7 @@
while (1)
{
- u32 dscr;
+ uint32_t dscr;
CHECK_RETVAL(arm11_read_DSCR(arm11, &dscr));
@@ -884,7 +884,7 @@
return ERROR_OK;
}
-int arm11_step(struct target_s *target, int current, u32 address, int handle_breakpoints)
+int arm11_step(struct target_s *target, int current, uint32_t address, int handle_breakpoints)
{
FNC_INFO;
@@ -906,7 +906,7 @@
/** \todo TODO: Thumb not supported here */
- u32 next_instruction;
+ uint32_t next_instruction;
CHECK_RETVAL(arm11_read_memory_word(arm11, R(PC), &next_instruction));
@@ -975,7 +975,7 @@
while (1)
{
- u32 dscr;
+ uint32_t dscr;
CHECK_RETVAL(arm11_read_DSCR(arm11, &dscr));
@@ -1090,9 +1090,9 @@
* size: 1 = byte (8bit), 2 = half-word (16bit), 4 = word (32bit)
* count: number of items of <size>
*/
-int arm11_read_memory(struct target_s *target, u32 address, u32 size, u32 count, uint8_t *buffer)
+int arm11_read_memory(struct target_s *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer)
{
- /** \todo TODO: check if buffer cast to u32* and uint16_t* might cause alignment problems */
+ /** \todo TODO: check if buffer cast to uint32_t* and uint16_t* might cause alignment problems */
FNC_INFO;
@@ -1124,7 +1124,7 @@
arm11_run_instr_no_data1(arm11,
!arm11_config_memrw_no_increment ? 0xe4d01001 : 0xe5d01000);
- u32 res;
+ uint32_t res;
/* MCR p14,0,R1,c0,c5,0 */
arm11_run_instr_data_from_core(arm11, 0xEE001E15, &res, 1);
@@ -1143,7 +1143,7 @@
arm11_run_instr_no_data1(arm11,
!arm11_config_memrw_no_increment ? 0xe0d010b2 : 0xe1d010b0);
- u32 res;
+ uint32_t res;
/* MCR p14,0,R1,c0,c5,0 */
arm11_run_instr_data_from_core(arm11, 0xEE001E15, &res, 1);
@@ -1157,9 +1157,9 @@
case 4:
{
- u32 instr = !arm11_config_memrw_no_increment ? 0xecb05e01 : 0xed905e00;
- /** \todo TODO: buffer cast to u32* causes alignment warnings */
- u32 *words = (u32 *)buffer;
+ uint32_t instr = !arm11_config_memrw_no_increment ? 0xecb05e01 : 0xed905e00;
+ /** \todo TODO: buffer cast to uint32_t* causes alignment warnings */
+ uint32_t *words = (uint32_t *)buffer;
/* LDC p14,c5,[R0],#4 */
/* LDC p14,c5,[R0] */
@@ -1173,7 +1173,7 @@
return ERROR_OK;
}
-int arm11_write_memory(struct target_s *target, u32 address, u32 size, u32 count, uint8_t *buffer)
+int arm11_write_memory(struct target_s *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer)
{
FNC_INFO;
@@ -1234,10 +1234,10 @@
}
case 4: {
- u32 instr = !arm11_config_memrw_no_increment ? 0xeca05e01 : 0xed805e00;
+ uint32_t instr = !arm11_config_memrw_no_increment ? 0xeca05e01 : 0xed805e00;
- /** \todo TODO: buffer cast to u32* causes alignment warnings */
- u32 *words = (u32*)buffer;
+ /** \todo TODO: buffer cast to uint32_t* causes alignment warnings */
+ uint32_t *words = (uint32_t*)buffer;
if (!arm11_config_memwrite_burst)
{
@@ -1260,7 +1260,7 @@
/* r0 verification */
if (!arm11_config_memrw_no_increment)
{
- u32 r0;
+ uint32_t r0;
/* MCR p14,0,R0,c0,c5,0 */
arm11_run_instr_data_from_core(arm11, 0xEE000E15, &r0, 1);
@@ -1285,7 +1285,7 @@
/* write target memory in multiples of 4 byte, optimized for writing large quantities of data */
-int arm11_bulk_write_memory(struct target_s *target, u32 address, u32 count, uint8_t *buffer)
+int arm11_bulk_write_memory(struct target_s *target, uint32_t address, uint32_t count, uint8_t *buffer)
{
FNC_INFO;
@@ -1302,7 +1302,7 @@
* fallback code will read data from the target and calculate the CRC on the
* host.
*/
-int arm11_checksum_memory(struct target_s *target, u32 address, u32 count, u32* checksum)
+int arm11_checksum_memory(struct target_s *target, uint32_t address, uint32_t count, uint32_t* checksum)
{
return ERROR_FAIL;
}
@@ -1369,14 +1369,14 @@
// HACKHACKHACK - FIXME mode/state
/* target algorithm support */
int arm11_run_algorithm(struct target_s *target, int num_mem_params, mem_param_t *mem_params,
- int num_reg_params, reg_param_t *reg_params, u32 entry_point, u32 exit_point,
+ int num_reg_params, reg_param_t *reg_params, uint32_t entry_point, uint32_t exit_point,
int timeout_ms, void *arch_info)
{
arm11_common_t *arm11 = target->arch_info;
// enum armv4_5_state core_state = arm11->core_state;
// enum armv4_5_mode core_mode = arm11->core_mode;
- u32 context[16];
- u32 cpsr;
+ uint32_t context[16];
+ uint32_t cpsr;
int exit_breakpoint_size = 0;
int retval = ERROR_OK;
LOG_DEBUG("Running algorithm");
@@ -1819,7 +1819,7 @@
return ERROR_OK;
}
-const u32 arm11_coproc_instruction_limits[] =
+const uint32_t arm11_coproc_instruction_limits[] =
{
15, /* coprocessor */
7, /* opcode 1 */
@@ -1879,7 +1879,7 @@
return ERROR_TARGET_NOT_HALTED;
}
- u32 values[6];
+ uint32_t values[6];
for (size_t i = 0; i < (read ? 5 : 6); i++)
{
@@ -1894,7 +1894,7 @@
}
}
- u32 instr = 0xEE000010 |
+ uint32_t instr = 0xEE000010 |
(values[0] << 8) |
(values[1] << 21) |
(values[2] << 16) |
@@ -1908,7 +1908,7 @@
if (read)
{
- u32 result;
+ uint32_t result;
arm11_run_instr_data_from_core_via_r0(arm11, instr, &result);
LOG_INFO("MRC p%d, %d, R0, c%d, c%d, %d = 0x%08x (%d)",
Modified: trunk/src/target/arm11.h
===================================================================
--- trunk/src/target/arm11.h 2009-06-18 07:07:59 UTC (rev 2277)
+++ trunk/src/target/arm11.h 2009-06-18 07:08:52 UTC (rev 2278)
@@ -65,7 +65,7 @@
typedef struct arm11_register_history_s
{
- u32 value;
+ uint32_t value;
uint8_t valid;
}arm11_register_history_t;
@@ -84,8 +84,8 @@
/** \name Processor type detection */
/*@{*/
- u32 device_id; /**< IDCODE readout */
- u32 didr; /**< DIDR readout (debug capabilities) */
+ uint32_t device_id; /**< IDCODE readout */
+ uint32_t didr; /**< DIDR readout (debug capabilities) */
uint8_t implementor; /**< DIDR Implementor readout */
size_t brp; /**< Number of Breakpoint Register Pairs from DIDR */
@@ -95,7 +95,7 @@
debug_version; /**< ARM debug architecture from DIDR */
/*@}*/
- u32 last_dscr; /**< Last retrieved DSCR value;
+ uint32_t last_dscr; /**< Last retrieved DSCR value;
Use only for debug message generation */
bool trst_active;
@@ -108,7 +108,7 @@
/*@{*/
reg_t * reg_list; /**< target register list */
- u32 reg_values[ARM11_REGCACHE_COUNT]; /**< data for registers */
+ uint32_t reg_values[ARM11_REGCACHE_COUNT]; /**< data for registers */
/*@}*/
@@ -181,7 +181,7 @@
typedef struct arm11_reg_state_s
{
- u32 def_index;
+ uint32_t def_index;
target_t * target;
} arm11_reg_state_t;
@@ -191,12 +191,12 @@
int arm11_arch_state(struct target_s *target);
/* target request support */
-int arm11_target_request_data(struct target_s *target, u32 size, uint8_t *buffer);
+int arm11_target_request_data(struct target_s *target, uint32_t size, uint8_t *buffer);
/* target execution control */
int arm11_halt(struct target_s *target);
-int arm11_resume(struct target_s *target, int current, u32 address, int handle_breakpoints, int debug_execution);
-int arm11_step(struct target_s *target, int current, u32 address, int handle_breakpoints);
+int arm11_resume(struct target_s *target, int current, uint32_t address, int handle_breakpoints, int debug_execution);
+int arm11_step(struct target_s *target, int current, uint32_t address, int handle_breakpoints);
int arm11_examine(struct target_s *target);
/* target reset control */
@@ -211,13 +211,13 @@
* size: 1 = byte (8bit), 2 = half-word (16bit), 4 = word (32bit)
* count: number of items of <size>
*/
-int arm11_read_memory(struct target_s *target, u32 address, u32 size, u32 count, uint8_t *buffer);
-int arm11_write_memory(struct target_s *target, u32 address, u32 size, u32 count, uint8_t *buffer);
+int arm11_read_memory(struct target_s *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer);
+int arm11_write_memory(struct target_s *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer);
/* write target memory in multiples of 4 byte, optimized for writing large quantities of data */
-int arm11_bulk_write_memory(struct target_s *target, u32 address, u32 count, uint8_t *buffer);
+int arm11_bulk_write_memory(struct target_s *target, uint32_t address, uint32_t count, uint8_t *buffer);
-int arm11_checksum_memory(struct target_s *target, u32 address, u32 count, u32* checksum);
+int arm11_checksum_memory(struct target_s *target, uint32_t address, uint32_t count, uint32_t* checksum);
/* target break-/watchpoint control
* rw: 0 = write, 1 = read, 2 = access
@@ -228,7 +228,7 @@
int arm11_remove_watchpoint(struct target_s *target, watchpoint_t *watchpoint);
/* target algorithm support */
-int arm11_run_algorithm(struct target_s *target, int num_mem_params, mem_param_t *mem_params, int num_reg_params, reg_param_t *reg_param, u32 entry_point, u32 exit_point, int timeout_ms, void *arch_info);
+int arm11_run_algorithm(struct target_s *target, int num_mem_params, mem_param_t *mem_params, int num_reg_params, reg_param_t *reg_param, uint32_t entry_point, uint32_t exit_point, int timeout_ms, void *arch_info);
int arm11_register_commands(struct command_context_s *cmd_ctx);
int arm11_target_create(struct target_s *target, Jim_Interp *interp);
@@ -248,22 +248,22 @@
void arm11_setup_field (arm11_common_t * arm11, int num_bits, void * in_data, void * out_data, scan_field_t * field);
void arm11_add_IR (arm11_common_t * arm11, uint8_t instr, tap_state_t state);
void arm11_add_debug_SCAN_N (arm11_common_t * arm11, uint8_t chain, tap_state_t state);
-void arm11_add_debug_INST (arm11_common_t * arm11, u32 inst, uint8_t * flag, tap_state_t state);
-int arm11_read_DSCR (arm11_common_t * arm11, u32 *dscr);
-int arm11_write_DSCR (arm11_common_t * arm11, u32 dscr);
+void arm11_add_debug_INST (arm11_common_t * arm11, uint32_t inst, uint8_t * flag, tap_state_t state);
+int arm11_read_DSCR (arm11_common_t * arm11, uint32_t *dscr);
+int arm11_write_DSCR (arm11_common_t * arm11, uint32_t dscr);
-enum target_debug_reason arm11_get_DSCR_debug_reason(u32 dscr);
+enum target_debug_reason arm11_get_DSCR_debug_reason(uint32_t dscr);
void arm11_run_instr_data_prepare (arm11_common_t * arm11);
void arm11_run_instr_data_finish (arm11_common_t * arm11);
-int arm11_run_instr_no_data (arm11_common_t * arm11, u32 * opcode, size_t count);
-void arm11_run_instr_no_data1 (arm11_common_t * arm11, u32 opcode);
-int arm11_run_instr_data_to_core (arm11_common_t * arm11, u32 opcode, u32 * data, size_t count);
-int arm11_run_instr_data_to_core_noack (arm11_common_t * arm11, u32 opcode, u32 * data, size_t count);
-int arm11_run_instr_data_to_core1 (arm11_common_t * arm11, u32 opcode, u32 data);
-int arm11_run_instr_data_from_core (arm11_common_t * arm11, u32 opcode, u32 * data, size_t count);
-void arm11_run_instr_data_from_core_via_r0 (arm11_common_t * arm11, u32 opcode, u32 * data);
-void arm11_run_instr_data_to_core_via_r0 (arm11_common_t * arm11, u32 opcode, u32 data);
+int arm11_run_instr_no_data (arm11_common_t * arm11, uint32_t * opcode, size_t count);
+void arm11_run_instr_no_data1 (arm11_common_t * arm11, uint32_t opcode);
+int arm11_run_instr_data_to_core (arm11_common_t * arm11, uint32_t opcode, uint32_t * data, size_t count);
+int arm11_run_instr_data_to_core_noack (arm11_common_t * arm11, uint32_t opcode, uint32_t * data, size_t count);
+int arm11_run_instr_data_to_core1 (arm11_common_t * arm11, uint32_t opcode, uint32_t data);
+int arm11_run_instr_data_from_core (arm11_common_t * arm11, uint32_t opcode, uint32_t * data, size_t count);
+void arm11_run_instr_data_from_core_via_r0 (arm11_common_t * arm11, uint32_t opcode, uint32_t * data);
+void arm11_run_instr_data_to_core_via_r0 (arm11_common_t * arm11, uint32_t opcode, uint32_t data);
int arm11_add_dr_scan_vc(int num_fields, scan_field_t *fields, tap_state_t state);
int arm11_add_ir_scan_vc(int num_fields, scan_field_t *fields, tap_state_t state);
@@ -276,7 +276,7 @@
{
bool write; /**< Access mode: true for write, false for read. */
uint8_t address; /**< Register address mode. Use enum #arm11_sc7 */
- u32 value; /**< If write then set this to value to be written.
+ uint32_t value; /**< If write then set this to value to be written.
In read mode this receives the read value when the
function returns. */
} arm11_sc7_action_t;
@@ -285,8 +285,8 @@
/* Mid-level helper functions */
void arm11_sc7_clear_vbw(arm11_common_t * arm11);
-void arm11_sc7_set_vcr(arm11_common_t * arm11, u32 value);
+void arm11_sc7_set_vcr(arm11_common_t * arm11, uint32_t value);
-int arm11_read_memory_word(arm11_common_t * arm11, u32 address, u32 * result);
+int arm11_read_memory_word(arm11_common_t * arm11, uint32_t address, uint32_t * result);
#endif /* ARM11_H */
Modified: trunk/src/target/arm11_dbgtap.c
===================================================================
--- trunk/src/target/arm11_dbgtap.c 2009-06-18 07:07:59 UTC (rev 2277)
+++ trunk/src/target/arm11_dbgtap.c 2009-06-18 07:08:52 UTC (rev 2278)
@@ -195,7 +195,7 @@
*
* \remarks This adds to the JTAG command queue but does \em not execute it.
*/
-void arm11_add_debug_INST(arm11_common_t * arm11, u32 inst, uint8_t * flag, tap_state_t state)
+void arm11_add_debug_INST(arm11_common_t * arm11, uint32_t inst, uint8_t * flag, tap_state_t state)
{
JTAG_DEBUG("INST <= 0x%08x", inst);
@@ -217,13 +217,13 @@
*
* \remarks This is a stand-alone function that executes the JTAG command queue.
*/
-int arm11_read_DSCR(arm11_common_t * arm11, u32 *value)
+int arm11_read_DSCR(arm11_common_t * arm11, uint32_t *value)
{
arm11_add_debug_SCAN_N(arm11, 0x01, ARM11_TAP_DEFAULT);
arm11_add_IR(arm11, ARM11_INTEST, ARM11_TAP_DEFAULT);
- u32 dscr;
+ uint32_t dscr;
scan_field_t chain1_field;
arm11_setup_field(arm11, 32, NULL, &dscr, &chain1_field);
@@ -251,7 +251,7 @@
*
* \remarks This is a stand-alone function that executes the JTAG command queue.
*/
-int arm11_write_DSCR(arm11_common_t * arm11, u32 dscr)
+int arm11_write_DSCR(arm11_common_t * arm11, uint32_t dscr)
{
arm11_add_debug_SCAN_N(arm11, 0x01, ARM11_TAP_DEFAULT);
@@ -280,7 +280,7 @@
* \return Debug reason
*
*/
-enum target_debug_reason arm11_get_DSCR_debug_reason(u32 dscr)
+enum target_debug_reason arm11_get_DSCR_debug_reason(uint32_t dscr)
{
switch (dscr & ARM11_DSCR_METHOD_OF_DEBUG_ENTRY_MASK)
{
@@ -364,7 +364,7 @@
* \param count Number of opcodes to execute
*
*/
-int arm11_run_instr_no_data(arm11_common_t * arm11, u32 * opcode, size_t count)
+int arm11_run_instr_no_data(arm11_common_t * arm11, uint32_t * opcode, size_t count)
{
arm11_add_IR(arm11, ARM11_ITRSEL, ARM11_TAP_DEFAULT);
@@ -396,7 +396,7 @@
* \param opcode ARM opcode
*
*/
-void arm11_run_instr_no_data1(arm11_common_t * arm11, u32 opcode)
+void arm11_run_instr_no_data1(arm11_common_t * arm11, uint32_t opcode)
{
arm11_run_instr_no_data(arm11, &opcode, 1);
}
@@ -415,7 +415,7 @@
* \param count Number of data words and instruction repetitions
*
*/
-int arm11_run_instr_data_to_core(arm11_common_t * arm11, u32 opcode, u32 * data, size_t count)
+int arm11_run_instr_data_to_core(arm11_common_t * arm11, uint32_t opcode, uint32_t * data, size_t count)
{
arm11_add_IR(arm11, ARM11_ITRSEL, ARM11_TAP_DEFAULT);
@@ -425,7 +425,7 @@
scan_field_t chain5_fields[3];
- u32 Data;
+ uint32_t Data;
uint8_t Ready;
uint8_t nRetry;
@@ -502,7 +502,7 @@
* \param count Number of data words and instruction repetitions
*
*/
-int arm11_run_instr_data_to_core_noack(arm11_common_t * arm11, u32 opcode, u32 * data, size_t count)
+int arm11_run_instr_data_to_core_noack(arm11_common_t * arm11, uint32_t opcode, uint32_t * data, size_t count)
{
arm11_add_IR(arm11, ARM11_ITRSEL, ARM11_TAP_DEFAULT);
@@ -573,7 +573,7 @@
* \param data Data word to be passed to the core via DTR
*
*/
-int arm11_run_instr_data_to_core1(arm11_common_t * arm11, u32 opcode, u32 data)
+int arm11_run_instr_data_to_core1(arm11_common_t * arm11, uint32_t opcode, uint32_t data)
{
return arm11_run_instr_data_to_core(arm11, opcode, &data, 1);
}
@@ -592,7 +592,7 @@
* \param count Number of data words and instruction repetitions
*
*/
-int arm11_run_instr_data_from_core(arm11_common_t * arm11, u32 opcode, u32 * data, size_t count)
+int arm11_run_instr_data_from_core(arm11_common_t * arm11, uint32_t opcode, uint32_t * data, size_t count)
{
arm11_add_IR(arm11, ARM11_ITRSEL, ARM11_TAP_DEFAULT);
@@ -602,7 +602,7 @@
scan_field_t chain5_fields[3];
- u32 Data;
+ uint32_t Data;
uint8_t Ready;
uint8_t nRetry;
@@ -640,7 +640,7 @@
* \param data Pointer to a data word that receives the value from r0 after \p opcode was executed.
*
*/
-void arm11_run_instr_data_from_core_via_r0(arm11_common_t * arm11, u32 opcode, u32 * data)
+void arm11_run_instr_data_from_core_via_r0(arm11_common_t * arm11, uint32_t opcode, uint32_t * data)
{
arm11_run_instr_no_data1(arm11, opcode);
@@ -660,7 +660,7 @@
* \param data Data word that will be written to r0 before \p opcode is executed
*
*/
-void arm11_run_instr_data_to_core_via_r0(arm11_common_t * arm11, u32 opcode, u32 data)
+void arm11_run_instr_data_to_core_via_r0(arm11_common_t * arm11, uint32_t opcode, uint32_t data)
{
/* MRC p14,0,r0,c0,c5,0 */
arm11_run_instr_data_to_core1(arm11, 0xEE100E15, data);
@@ -686,10 +686,10 @@
scan_field_t chain7_fields[3];
uint8_t nRW;
- u32 DataOut;
+ uint32_t DataOut;
uint8_t AddressOut;
uint8_t Ready;
- u32 DataIn;
+ uint32_t DataIn;
uint8_t AddressIn;
arm11_setup_field(arm11, 1, &nRW, &Ready, chain7_fields + 0);
@@ -786,7 +786,7 @@
* \param arm11 Target state variable.
* \param value Value to be written
*/
-void arm11_sc7_set_vcr(arm11_common_t * arm11, u32 value)
+void arm11_sc7_set_vcr(arm11_common_t * arm11, uint32_t value)
{
arm11_sc7_action_t set_vcr;
@@ -807,7 +807,7 @@
* \param result Pointer where to store result
*
*/
-int arm11_read_memory_word(arm11_common_t * arm11, u32 address, u32 * result)
+int arm11_read_memory_word(arm11_common_t * arm11, uint32_t address, uint32_t * result)
{
arm11_run_instr_data_prepare(arm11);
Modified: trunk/src/target/arm720t.c
===================================================================
--- trunk/src/target/arm720t.c 2009-06-18 07:07:59 UTC (rev 2277)
+++ trunk/src/target/arm720t.c 2009-06-18 07:08:52 UTC (rev 2278)
@@ -43,8 +43,8 @@
int arm720t_init_target(struct command_context_s *cmd_ctx, struct target_s *target);
int arm720t_quit(void);
int arm720t_arch_state(struct target_s *target);
-int arm720t_read_memory(struct target_s *target, u32 address, u32 size, u32 count, uint8_t *buffer);
-int arm720t_write_memory(struct target_s *target, u32 address, u32 size, u32 count, uint8_t *buffer);
+int arm720t_read_memory(struct target_s *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer);
+int arm720t_write_memory(struct target_s *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer);
int arm720t_soft_reset_halt(struct target_s *target);
target_type_t arm720t_target =
@@ -84,7 +84,7 @@
.quit = arm720t_quit
};
-int arm720t_scan_cp15(target_t *target, u32 out, u32 *in, int instruction, int clock)
+int arm720t_scan_cp15(target_t *target, uint32_t out, uint32_t *in, int instruction, int clock)
{
int retval = ERROR_OK;
armv4_5_common_t *armv4_5 = target->arch_info;
@@ -146,7 +146,7 @@
return ERROR_OK;
}
-int arm720t_read_cp15(target_t *target, u32 opcode, u32 *value)
+int arm720t_read_cp15(target_t *target, uint32_t opcode, uint32_t *value)
{
/* fetch CP15 opcode */
arm720t_scan_cp15(target, opcode, NULL, 1, 1);
@@ -163,7 +163,7 @@
return ERROR_OK;
}
-int arm720t_write_cp15(target_t *target, u32 opcode, u32 value)
+int arm720t_write_cp15(target_t *target, uint32_t opcode, uint32_t value)
{
/* fetch CP15 opcode */
arm720t_scan_cp15(target, opcode, NULL, 1, 1);
@@ -179,9 +179,9 @@
return ERROR_OK;
}
-u32 arm720t_get_ttb(target_t *target)
+uint32_t arm720t_get_ttb(target_t *target)
{
- u32 ttb = 0x0;
+ uint32_t ttb = 0x0;
arm720t_read_cp15(target, 0xee120f10, &ttb);
jtag_execute_queue();
@@ -193,7 +193,7 @@
void arm720t_disable_mmu_caches(target_t *target, int mmu, int d_u_cache, int i_cache)
{
- u32 cp15_control;
+ uint32_t cp15_control;
/* read cp15 control register */
arm720t_read_cp15(target, 0xee110f10, &cp15_control);
@@ -210,7 +210,7 @@
void arm720t_enable_mmu_caches(target_t *target, int mmu, int d_u_cache, int i_cache)
{
- u32 cp15_control;
+ uint32_t cp15_control;
/* read cp15 control register */
arm720t_read_cp15(target, 0xee110f10, &cp15_control);
@@ -329,7 +329,7 @@
return ERROR_OK;
}
-int arm720t_read_memory(struct target_s *target, u32 address, u32 size, u32 count, uint8_t *buffer)
+int arm720t_read_memory(struct target_s *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer)
{
int retval;
armv4_5_common_t *armv4_5 = target->arch_info;
@@ -349,7 +349,7 @@
return retval;
}
-int arm720t_write_memory(struct target_s *target, u32 address, u32 size, u32 count, uint8_t *buffer)
+int arm720t_write_memory(struct target_s *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer)
{
int retval;
@@ -527,11 +527,11 @@
/* one or more argument, access a single register (write if second argument is given */
if (argc >= 1)
{
- u32 opcode = strtoul(args[0], NULL, 0);
+ uint32_t opcode = strtoul(args[0], NULL, 0);
if (argc == 1)
{
- u32 value;
+ uint32_t value;
if ((retval = arm720t_read_cp15(target, opcode, &value)) != ERROR_OK)
{
command_print(cmd_ctx, "couldn't access cp15 with opcode 0x%8.8x", opcode);
@@ -547,7 +547,7 @@
}
else if (argc == 2)
{
- u32 value = strtoul(args[1], NULL, 0);
+ uint32_t value = strtoul(args[1], NULL, 0);
if ((retval = arm720t_write_cp15(target, opcode, value)) != ERROR_OK)
{
command_print(cmd_ctx, "couldn't access cp15 with opcode 0x%8.8x", opcode);
Modified: trunk/src/target/arm720t.h
===================================================================
--- trunk/src/target/arm720t.h 2009-06-18 07:07:59 UTC (rev 2277)
+++ trunk/src/target/arm720t.h 2009-06-18 07:08:52 UTC (rev 2278)
@@ -27,12 +27,12 @@
typedef struct arm720t_common_s
{
- u32 common_magic;
+ uint32_t common_magic;
armv4_5_mmu_common_t armv4_5_mmu;
arm7tdmi_common_t arm7tdmi_common;
- u32 cp15_control_reg;
- u32 fsr_reg;
- u32 far_reg;
+ uint32_t cp15_control_reg;
+ uint32_t fsr_reg;
+ uint32_t far_reg;
} arm720t_common_t;
#endif /* ARM720T_H */
Modified: trunk/src/target/arm7_9_common.c
===================================================================
--- trunk/src/target/arm7_9_common.c 2009-06-18 07:07:59 UTC (rev 2277)
+++ trunk/src/target/arm7_9_common.c 2009-06-18 07:08:52 UTC (rev 2278)
@@ -229,7 +229,7 @@
if (breakpoint->type == BKPT_HARD)
{
/* either an ARM (4 byte) or Thumb (2 byte) breakpoint */
- u32 mask = (breakpoint->length == 4) ? 0x3u : 0x1u;
+ uint32_t mask = (breakpoint->length == 4) ? 0x3u : 0x1u;
/* reassign a hw breakpoint */
if (breakpoint->set==0)
@@ -272,7 +272,7 @@
if (breakpoint->length == 4)
{
- u32 verify = 0xffffffff;
+ uint32_t verify = 0xffffffff;
/* keep the original instruction in target endianness */
if ((retval = target_read_memory(target, breakpoint->address, 4, 1, breakpoint->orig_instr)) != ERROR_OK)
{
@@ -371,7 +371,7 @@
/* restore original instruction (kept in target endianness) */
if (breakpoint->length == 4)
{
- u32 current_instr;
+ uint32_t current_instr;
/* check that user program as not modified breakpoint instruction */
if ((retval = target_read_memory(target, breakpoint->address, 4, 1, (uint8_t*)¤t_instr)) != ERROR_OK)
{
@@ -506,7 +506,7 @@
armv4_5_common_t *armv4_5 = target->arch_info;
arm7_9_common_t *arm7_9 = armv4_5->arch_info;
int rw_mask = 1;
- u32 mask;
+ uint32_t mask;
mask = watchpoint->length - 1;
@@ -781,16 +781,16 @@
* @param buffer Pointer to the buffer that will hold the data
* @return The result of receiving data from the Embedded ICE unit
*/
-int arm7_9_target_request_data(target_t *target, u32 size, uint8_t *buffer)
+int arm7_9_target_request_data(target_t *target, uint32_t size, uint8_t *buffer)
{
armv4_5_common_t *armv4_5 = target->arch_info;
arm7_9_common_t *arm7_9 = armv4_5->arch_info;
arm_jtag_t *jtag_info = &arm7_9->jtag_info;
- u32 *data;
+ uint32_t *data;
int retval = ERROR_OK;
- u32 i;
+ uint32_t i;
- data = malloc(size * (sizeof(u32)));
+ data = malloc(size * (sizeof(uint32_t)));
retval = embeddedice_receive(jtag_info, data, size);
@@ -840,7 +840,7 @@
/* check W bit */
if (buf_get_u32(dcc_control->value, 1, 1) == 1)
{
- u32 request;
+ uint32_t request;
if ((retval = embeddedice_receive(jtag_info, &request, 1)) != ERROR_OK)
{
@@ -921,7 +921,7 @@
if (check_pc)
{
reg_t *reg = register_get_by_name(target->reg_cache, "pc", 1);
- u32 t=*((u32 *)reg->value);
+ uint32_t t=*((uint32_t *)reg->value);
if (t!=0)
{
LOG_ERROR("PC was not 0. Does this target need srst_pulls_trst?");
@@ -1190,7 +1190,7 @@
/* if the target is in Thumb state, change to ARM state */
if (buf_get_u32(dbg_stat->value, EICE_DBG_STATUS_ITBIT, 1))
{
- u32 r0_thumb, pc_thumb;
+ uint32_t r0_thumb, pc_thumb;
LOG_DEBUG("target entered debug from Thumb state, changing to ARM");
/* Entered debug from Thumb mode */
armv4_5->core_state = ARMV4_5_STATE_THUMB;
@@ -1310,10 +1310,10 @@
int arm7_9_debug_entry(target_t *target)
{
int i;
- u32 context[16];
- u32* context_p[16];
- u32 r0_thumb, pc_thumb;
- u32 cpsr;
+ uint32_t context[16];
+ uint32_t* context_p[16];
+ uint32_t r0_thumb, pc_thumb;
+ uint32_t cpsr;
int retval;
/* get pointers to arch-specific information */
armv4_5_common_t *armv4_5 = target->arch_info;
@@ -1444,7 +1444,7 @@
/* exceptions other than USR & SYS have a saved program status register */
if ((armv4_5->core_mode != ARMV4_5_MODE_USR) && (armv4_5->core_mode != ARMV4_5_MODE_SYS))
{
- u32 spsr;
+ uint32_t spsr;
arm7_9->read_xpsr(target, &spsr, 1);
if ((retval = jtag_execute_queue()) != ERROR_OK)
{
@@ -1500,8 +1500,8 @@
*/
for (i = 0; i < 6; i++)
{
- u32 mask = 0;
- u32* reg_p[16];
+ uint32_t mask = 0;
+ uint32_t* reg_p[16];
int j;
int valid = 1;
@@ -1515,7 +1515,7 @@
if (!valid)
{
- u32 tmp_cpsr;
+ uint32_t tmp_cpsr;
/* change processor mode (and mask T bit) */
tmp_cpsr = buf_get_u32(armv4_5->core_cache->reg_list[ARMV4_5_CPSR].value, 0, 8) & 0xE0;
@@ -1527,7 +1527,7 @@
{
if (ARMV4_5_CORE_REG_MODE(armv4_5->core_cache, armv4_5_number_to_mode(i), j).valid == 0)
{
- reg_p[j] = (u32*)ARMV4_5_CORE_REG_MODE(armv4_5->core_cache, armv4_5_number_to_mode(i), j).value;
+ reg_p[j] = (uint32_t*)ARMV4_5_CORE_REG_MODE(armv4_5->core_cache, armv4_5_number_to_mode(i), j).value;
mask |= 1 << j;
ARMV4_5_CORE_REG_MODE(armv4_5->core_cache, armv4_5_number_to_mode(i), j).valid = 1;
ARMV4_5_CORE_REG_MODE(armv4_5->core_cache, armv4_5_number_to_mode(i), j).dirty = 0;
@@ -1541,7 +1541,7 @@
/* check if the PSR has to be read */
if (ARMV4_5_CORE_REG_MODE(armv4_5->core_cache, armv4_5_number_to_mode(i), 16).valid == 0)
{
- arm7_9->read_xpsr(target, (u32*)ARMV4_5_CORE_REG_MODE(armv4_5->core_cache, armv4_5_number_to_mode(i), 16).value, 1);
+ arm7_9->read_xpsr(target, (uint32_t*)ARMV4_5_CORE_REG_MODE(armv4_5->core_cache, armv4_5_number_to_mode(i), 16).value, 1);
ARMV4_5_CORE_REG_MODE(armv4_5->core_cache, armv4_5_number_to_mode(i), 16).valid = 1;
ARMV4_5_CORE_REG_MODE(armv4_5->core_cache, armv4_5_number_to_mode(i), 16).dirty = 0;
}
@@ -1633,13 +1633,13 @@
if (dirty)
{
- u32 mask = 0x0;
+ uint32_t mask = 0x0;
int num_regs = 0;
- u32 regs[16];
+ uint32_t regs[16];
if (mode_change)
{
- u32 tmp_cpsr;
+ uint32_t tmp_cpsr;
/* change processor mode (mask T bit) */
tmp_cpsr = buf_get_u32(armv4_5->core_cache->reg_list[ARMV4_5_CPSR].value, 0, 8) & 0xE0;
@@ -1684,7 +1684,7 @@
if ((armv4_5->core_cache->reg_list[ARMV4_5_CPSR].dirty == 0) && (armv4_5->core_mode != current_mode))
{
/* restore processor mode (mask T bit) */
- u32 tmp_cpsr;
+ uint32_t tmp_cpsr;
tmp_cpsr = buf_get_u32(armv4_5->core_cache->reg_list[ARMV4_5_CPSR].value, 0, 8) & 0xE0;
tmp_cpsr |= armv4_5_number_to_mode(i);
@@ -1774,7 +1774,7 @@
}
}
-int arm7_9_resume(struct target_s *target, int current, u32 address, int handle_breakpoints, int debug_execution)
+int arm7_9_resume(struct target_s *target, int current, uint32_t address, int handle_breakpoints, int debug_execution)
{
armv4_5_common_t *armv4_5 = target->arch_info;
arm7_9_common_t *arm7_9 = armv4_5->arch_info;
@@ -1799,7 +1799,7 @@
if (!current)
buf_set_u32(armv4_5->core_cache->reg_list[15].value, 0, 32, address);
- u32 current_pc;
+ uint32_t current_pc;
current_pc = buf_get_u32(armv4_5->core_cache->reg_list[15].value, 0, 32);
/* the front-end may request us not to handle breakpoints */
@@ -1814,10 +1814,10 @@
}
/* calculate PC of next instruction */
- u32 next_pc;
+ uint32_t next_pc;
if ((retval = arm_simulate_step(target, &next_pc)) != ERROR_OK)
{
- u32 current_opcode;
+ uint32_t current_opcode;
target_read_u32(target, current_pc, ¤t_opcode);
LOG_ERROR("BUG: couldn't calculate PC of next instruction, current opcode was 0x%8.8x", current_opcode);
return retval;
@@ -1934,12 +1934,12 @@
return ERROR_OK;
}
-void arm7_9_enable_eice_step(target_t *target, u32 next_pc)
+void arm7_9_enable_eice_step(target_t *target, uint32_t next_pc)
{
armv4_5_common_t *armv4_5 = target->arch_info;
arm7_9_common_t *arm7_9 = armv4_5->arch_info;
- u32 current_pc;
+ uint32_t current_pc;
current_pc = buf_get_u32(armv4_5->core_cache->reg_list[15].value, 0, 32);
if(next_pc != current_pc)
@@ -1988,7 +1988,7 @@
embeddedice_store_reg(&arm7_9->eice_cache->reg_list[EICE_W1_CONTROL_VALUE]);
}
-int arm7_9_step(struct target_s *target, int current, u32 address, int handle_breakpoints)
+int arm7_9_step(struct target_s *target, int current, uint32_t address, int handle_breakpoints)
{
armv4_5_common_t *armv4_5 = target->arch_info;
arm7_9_common_t *arm7_9 = armv4_5->arch_info;
@@ -2005,7 +2005,7 @@
if (!current)
buf_set_u32(armv4_5->core_cache->reg_list[15].value, 0, 32, address);
- u32 current_pc;
+ uint32_t current_pc;
current_pc = buf_get_u32(armv4_5->core_cache->reg_list[15].value, 0, 32);
/* the front-end may request us not to handle breakpoints */
@@ -2019,10 +2019,10 @@
target->debug_reason = DBG_REASON_SINGLESTEP;
/* calculate PC of next instruction */
- u32 next_pc;
+ uint32_t next_pc;
if ((retval = arm_simulate_step(target, &next_pc)) != ERROR_OK)
{
- u32 current_opcode;
+ uint32_t current_opcode;
target_read_u32(target, current_pc, ¤t_opcode);
LOG_ERROR("BUG: couldn't calculate PC of next instruction, current opcode was 0x%8.8x", current_opcode);
return retval;
@@ -2083,8 +2083,8 @@
int arm7_9_read_core_reg(struct target_s *target, int num, enum armv4_5_mode mode)
{
- u32* reg_p[16];
- u32 value;
+ uint32_t* reg_p[16];
+ uint32_t value;
int retval;
armv4_5_common_t *armv4_5 = target->arch_info;
arm7_9_common_t *arm7_9 = armv4_5->arch_info;
@@ -2101,7 +2101,7 @@
&& (mode != armv4_5->core_mode)
&& (reg_mode != ARMV4_5_MODE_ANY))
{
- u32 tmp_cpsr;
+ uint32_t tmp_cpsr;
/* change processor mode (mask T bit) */
tmp_cpsr = buf_get_u32(armv4_5->core_cache->reg_list[ARMV4_5_CPSR].value, 0, 8) & 0xE0;
@@ -2147,9 +2147,9 @@
return ERROR_OK;
}
-int arm7_9_write_core_reg(struct target_s *target, int num, enum armv4_5_mode mode, u32 value)
+int arm7_9_write_core_reg(struct target_s *target, int num, enum armv4_5_mode mode, uint32_t value)
{
- u32 reg[16];
+ uint32_t reg[16];
armv4_5_common_t *armv4_5 = target->arch_info;
arm7_9_common_t *arm7_9 = armv4_5->arch_info;
@@ -2164,7 +2164,7 @@
if ((mode != ARMV4_5_MODE_ANY)
&& (mode != armv4_5->core_mode)
&& (reg_mode != ARMV4_5_MODE_ANY)) {
- u32 tmp_cpsr;
+ uint32_t tmp_cpsr;
/* change processor mode (mask T bit) */
tmp_cpsr = buf_get_u32(armv4_5->core_cache->reg_list[ARMV4_5_CPSR].value, 0, 8) & 0xE0;
@@ -2208,16 +2208,16 @@
return jtag_execute_queue();
}
-int arm7_9_read_memory(struct target_s *target, u32 address, u32 size, u32 count, uint8_t *buffer)
+int arm7_9_read_memory(struct target_s *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer)
{
armv4_5_common_t *armv4_5 = target->arch_info;
arm7_9_common_t *arm7_9 = armv4_5->arch_info;
- u32 reg[16];
- u32 num_accesses = 0;
+ uint32_t reg[16];
+ uint32_t num_accesses = 0;
int thisrun_accesses;
int i;
- u32 cpsr;
+ uint32_t cpsr;
int retval;
int last_reg = 0;
@@ -2247,7 +2247,7 @@
case 4:
while (num_accesses < count)
{
- u32 reg_list;
+ uint32_t reg_list;
thisrun_accesses = ((count - num_accesses) >= 14) ? 14 : (count - num_accesses);
reg_list = (0xffff >> (15 - thisrun_accesses)) & 0xfffe;
@@ -2281,7 +2281,7 @@
case 2:
while (num_accesses < count)
{
- u32 reg_list;
+ uint32_t reg_list;
thisrun_accesses = ((count - num_accesses) >= 14) ? 14 : (count - num_accesses);
reg_list = (0xffff >> (15 - thisrun_accesses)) & 0xfffe;
@@ -2319,7 +2319,7 @@
case 1:
while (num_accesses < count)
{
- u32 reg_list;
+ uint32_t reg_list;
thisrun_accesses = ((count - num_accesses) >= 14) ? 14 : (count - num_accesses);
reg_list = (0xffff >> (15 - thisrun_accesses)) & 0xfffe;
@@ -2384,17 +2384,17 @@
return ERROR_OK;
}
-int arm7_9_write_memory(struct target_s *target, u32 address, u32 size, u32 count, uint8_t *buffer)
+int arm7_9_write_memory(struct target_s *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer)
{
armv4_5_common_t *armv4_5 = target->arch_info;
arm7_9_common_t *arm7_9 = armv4_5->arch_info;
reg_t *dbg_ctrl = &arm7_9->eice_cache->reg_list[EICE_DBG_CTRL];
- u32 reg[16];
- u32 num_accesses = 0;
+ uint32_t reg[16];
+ uint32_t num_accesses = 0;
int thisrun_accesses;
int i;
- u32 cpsr;
+ uint32_t cpsr;
int retval;
int last_reg = 0;
@@ -2428,7 +2428,7 @@
case 4:
while (num_accesses < count)
{
- u32 reg_list;
+ uint32_t reg_list;
thisrun_accesses = ((count - num_accesses) >= 14) ? 14 : (count - num_accesses);
reg_list = (0xffff >> (15 - thisrun_accesses)) & 0xfffe;
@@ -2462,7 +2462,7 @@
case 2:
while (num_accesses < count)
{
- u32 reg_list;
+ uint32_t reg_list;
thisrun_accesses = ((count - num_accesses) >= 14) ? 14 : (count - num_accesses);
reg_list = (0xffff >> (15 - thisrun_accesses)) & 0xfffe;
@@ -2499,7 +2499,7 @@
case 1:
while (num_accesses < count)
{
- u32 reg_list;
+ uint32_t reg_list;
thisrun_accesses = ((count - num_accesses) >= 14) ? 14 : (count - num_accesses);
reg_list = (0xffff >> (15 - thisrun_accesses)) & 0xfffe;
@@ -2570,7 +2570,7 @@
static int dcc_count;
static uint8_t *dcc_buffer;
-static int arm7_9_dcc_completion(struct target_s *target, u32 exit_point, int timeout_ms, void *arch_info)
+static int arm7_9_dcc_completion(struct target_s *target, uint32_t exit_point, int timeout_ms, void *arch_info)
{
int retval = ERROR_OK;
armv4_5_common_t *armv4_5 = target->arch_info;
@@ -2615,15 +2615,15 @@
return target_wait_state(target, TARGET_HALTED, 500);
}
-static const u32 dcc_code[] =
+static const uint32_t dcc_code[] =
{
/* MRC TST BNE MRC STR B */
0xee101e10, 0xe3110001, 0x0afffffc, 0xee111e10, 0xe4801004, 0xeafffff9
};
-int armv4_5_run_algorithm_inner(struct target_s *target, int num_mem_params, mem_param_t *mem_params, int num_reg_params, reg_param_t *reg_params, u32 entry_point, u32 exit_point, int timeout_ms, void *arch_info, int (*run_it)(struct target_s *target, u32 exit_point, int timeout_ms, void *arch_info));
+int armv4_5_run_algorithm_inner(struct target_s *target, int num_mem_params, mem_param_t *mem_params, int num_reg_params, reg_param_t *reg_params, uint32_t entry_point, uint32_t exit_point, int timeout_ms, void *arch_info, int (*run_it)(struct target_s *target, uint32_t exit_point, int timeout_ms, void *arch_info));
-int arm7_9_bulk_write_memory(target_t *target, u32 address, u32 count, uint8_t *buffer)
+int arm7_9_bulk_write_memory(target_t *target, uint32_t address, uint32_t count, uint8_t *buffer)
{
int retval;
armv4_5_common_t *armv4_5 = target->arch_info;
@@ -2676,7 +2676,7 @@
if (retval==ERROR_OK)
{
- u32 endaddress=buf_get_u32(reg_params[0].value, 0, 32);
+ uint32_t endaddress=buf_get_u32(reg_params[0].value, 0, 32);
if (endaddress!=(address+count*4))
{
LOG_ERROR("DCC write failed, expected end address 0x%08x got 0x%0x", (address+count*4), endaddress);
@@ -2689,14 +2689,14 @@
return retval;
}
-int arm7_9_checksum_memory(struct target_s *target, u32 address, u32 count, u32* checksum)
+int arm7_9_checksum_memory(struct target_s *target, uint32_t address, uint32_t count, uint32_t* checksum)
{
working_area_t *crc_algorithm;
armv4_5_algorithm_t armv4_5_info;
reg_param_t reg_params[2];
int retval;
- u32 arm7_9_crc_code[] = {
+ uint32_t arm7_9_crc_code[] = {
0xE1A02000, /* mov r2, r0 */
0xE3E00000, /* mov r0, #0xffffffff */
0xE1A03001, /* mov r3, r1 */
@@ -2724,7 +2724,7 @@
0x04C11DB7 /* CRC32XOR: .word 0x04C11DB7 */
};
- u32 i;
+ uint32_t i;
if (target_alloc_working_area(target, sizeof(arm7_9_crc_code), &crc_algorithm) != ERROR_OK)
{
@@ -2732,9 +2732,9 @@
}
/* convert flash writing code into a buffer in target endianness */
- for (i = 0; i < (sizeof(arm7_9_crc_code)/sizeof(u32)); i++)
+ for (i = 0; i < (sizeof(arm7_9_crc_code)/sizeof(uint32_t)); i++)
{
- if ((retval=target_write_u32(target, crc_algorithm->address + i*sizeof(u32), arm7_9_crc_code[i]))!=ERROR_OK)
+ if ((retval=target_write_u32(target, crc_algorithm->address + i*sizeof(uint32_t), arm7_9_crc_code[i]))!=ERROR_OK)
{
return retval;
}
@@ -2770,15 +2770,15 @@
return ERROR_OK;
}
-int arm7_9_blank_check_memory(struct target_s *target, u32 address, u32 count, u32* blank)
+int arm7_9_blank_check_memory(struct target_s *target, uint32_t address, uint32_t count, uint32_t* blank)
{
working_area_t *erase_check_algorithm;
reg_param_t reg_params[3];
armv4_5_algorithm_t armv4_5_info;
int retval;
- u32 i;
+ uint32_t i;
- u32 erase_check_code[] =
+ uint32_t erase_check_code[] =
{
/* loop: */
0xe4d03001, /* ldrb r3, [r0], #1 */
@@ -2796,8 +2796,8 @@
}
/* convert flash writing code into a buffer in target endianness */
- for (i = 0; i < (sizeof(erase_check_code)/sizeof(u32)); i++)
- if ((retval = target_write_u32(target, erase_check_algorithm->address + i*sizeof(u32), erase_check_code[i])) != ERROR_OK)
+ for (i = 0; i < (sizeof(erase_check_code)/sizeof(uint32_t)); i++)
+ if ((retval = target_write_u32(target, erase_check_algorithm->address + i*sizeof(uint32_t), erase_check_code[i])) != ERROR_OK)
{
return retval;
}
@@ -2863,7 +2863,7 @@
int handle_arm7_9_write_xpsr_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
{
- u32 value;
+ uint32_t value;
int spsr;
int retval;
target_t *target = get_current_target(cmd_ctx);
@@ -2907,7 +2907,7 @@
int handle_arm7_9_write_xpsr_im8_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
{
- u32 value;
+ uint32_t value;
int rotate;
int spsr;
int retval;
@@ -2949,8 +2949,8 @@
int handle_arm7_9_write_core_reg_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
{
- u32 value;
- u32 mode;
+ uint32_t value;
+ uint32_t mode;
int num;
target_t *target = get_current_target(cmd_ctx);
armv4_5_common_t *armv4_5;
Modified: trunk/src/target/arm7_9_common.h
===================================================================
--- trunk/src/target/arm7_9_common.h 2009-06-18 07:07:59 UTC (rev 2277)
+++ trunk/src/target/arm7_9_common.h 2009-06-18 07:08:52 UTC (rev 2278)
@@ -39,12 +39,12 @@
*/
typedef struct arm7_9_common_s
{
- u32 common_magic;
+ uint32_t common_magic;
arm_jtag_t jtag_info; /**< JTAG information for target */
reg_cache_t *eice_cache; /**< Embedded ICE register cache */
- u32 arm_bkpt; /**< ARM breakpoint instruction */
+ uint32_t arm_bkpt; /**< ARM breakpoint instruction */
uint16_t thumb_bkpt; /**< Thumb breakpoint instruction */
int sw_breakpoints_added; /**< Specifies which watchpoint software breakpoints are setup on */
int breakpoint_count; /**< Current number of set breakpoints */
@@ -73,29 +73,29 @@
int (*examine_debug_reason)(target_t *target); /**< Function for determining why debug state was entered */
- void (*change_to_arm)(target_t *target, u32 *r0, u32 *pc); /**< Function for changing from Thumb to ARM mode */
+ void (*change_to_arm)(target_t *target, uint32_t *r0, uint32_t *pc); /**< Function for changing from Thumb to ARM mode */
- void (*read_core_regs)(target_t *target, u32 mask, u32 *core_regs[16]); /**< Function for reading the core registers */
- void (*read_core_regs_target_buffer)(target_t *target, u32 mask, void *buffer, int size);
- void (*read_xpsr)(target_t *target, u32 *xpsr, int spsr); /**< Function for reading CPSR or SPSR */
+ void (*read_core_regs)(target_t *target, uint32_t mask, uint32_t *core_regs[16]); /**< Function for reading the core registers */
+ void (*read_core_regs_target_buffer)(target_t *target, uint32_t mask, void *buffer, int size);
+ void (*read_xpsr)(target_t *target, uint32_t *xpsr, int spsr); /**< Function for reading CPSR or SPSR */
- void (*write_xpsr)(target_t *target, u32 xpsr, int spsr); /**< Function for writing to CPSR or SPSR */
+ void (*write_xpsr)(target_t *target, uint32_t xpsr, int spsr); /**< Function for writing to CPSR or SPSR */
void (*write_xpsr_im8)(target_t *target, uint8_t xpsr_im, int rot, int spsr); /**< Function for writing an immediate value to CPSR or SPSR */
- void (*write_core_regs)(target_t *target, u32 mask, u32 core_regs[16]);
+ void (*write_core_regs)(target_t *target, uint32_t mask, uint32_t core_regs[16]);
- void (*load_word_regs)(target_t *target, u32 mask);
+ void (*load_word_regs)(target_t *target, uint32_t mask);
void (*load_hword_reg)(target_t *target, int num);
void (*load_byte_reg)(target_t *target, int num);
- void (*store_word_regs)(target_t *target, u32 mask);
+ void (*store_word_regs)(target_t *target, uint32_t mask);
void (*store_hword_reg)(target_t *target, int num);
void (*store_byte_reg)(target_t *target, int num);
- void (*write_pc)(target_t *target, u32 pc); /**< Function for writing to the program counter */
+ void (*write_pc)(target_t *target, uint32_t pc); /**< Function for writing to the program counter */
void (*branch_resume)(target_t *target);
void (*branch_resume_thumb)(target_t *target);
- void (*enable_single_step)(target_t *target, u32 next_pc);
+ void (*enable_single_step)(target_t *target, uint32_t next_pc);
void (*disable_single_step)(target_t *target);
void (*set_special_dbgrq)(target_t *target); /**< Function for setting DBGRQ if the normal way won't work */
@@ -115,7 +115,7 @@
int arm7_9_poll(target_t *target);
-int arm7_9_target_request_data(target_t *target, u32 size, uint8_t *buffer);
+int arm7_9_target_request_data(target_t *target, uint32_t size, uint8_t *buffer);
int arm7_9_setup(target_t *target);
int arm7_9_assert_reset(target_t *target);
@@ -128,23 +128,23 @@
int arm7_9_halt(target_t *target);
int arm7_9_full_context(target_t *target);
int arm7_9_restore_context(target_t *target);
-int arm7_9_resume(struct target_s *target, int current, u32 address, int handle_breakpoints, int debug_execution);
-int arm7_9_step(struct target_s *target, int current, u32 address, int handle_breakpoints);
+int arm7_9_resume(struct target_s *target, int current, uint32_t address, int handle_breakpoints, int debug_execution);
+int arm7_9_step(struct target_s *target, int current, uint32_t address, int handle_breakpoints);
int arm7_9_read_core_reg(struct target_s *target, int num, enum armv4_5_mode mode);
-int arm7_9_read_memory(struct target_s *target, u32 address, u32 size, u32 count, uint8_t *buffer);
-int arm7_9_write_memory(struct target_s *target, u32 address, u32 size, u32 count, uint8_t *buffer);
-int arm7_9_bulk_write_memory(target_t *target, u32 address, u32 count, uint8_t *buffer);
-int arm7_9_checksum_memory(struct target_s *target, u32 address, u32 count, u32* checksum);
-int arm7_9_blank_check_memory(struct target_s *target, u32 address, u32 count, u32* blank);
+int arm7_9_read_memory(struct target_s *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer);
+int arm7_9_write_memory(struct target_s *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer);
+int arm7_9_bulk_write_memory(target_t *target, uint32_t address, uint32_t count, uint8_t *buffer);
+int arm7_9_checksum_memory(struct target_s *target, uint32_t address, uint32_t count, uint32_t* checksum);
+int arm7_9_blank_check_memory(struct target_s *target, uint32_t address, uint32_t count, uint32_t* blank);
-int arm7_9_run_algorithm(struct target_s *target, int num_mem_params, mem_param_t *mem_params, int num_reg_prams, reg_param_t *reg_param, u32 entry_point, void *arch_info);
+int arm7_9_run_algorithm(struct target_s *target, int num_mem_params, mem_param_t *mem_params, int num_reg_prams, reg_param_t *reg_param, uint32_t entry_point, void *arch_info);
int arm7_9_add_breakpoint(struct target_s *target, breakpoint_t *breakpoint);
int arm7_9_remove_breakpoint(struct target_s *target, breakpoint_t *breakpoint);
int arm7_9_add_watchpoint(struct target_s *target, watchpoint_t *watchpoint);
int arm7_9_remove_watchpoint(struct target_s *target, watchpoint_t *watchpoint);
-void arm7_9_enable_eice_step(target_t *target, u32 next_pc);
+void arm7_9_enable_eice_step(target_t *target, uint32_t next_pc);
void arm7_9_disable_eice_step(target_t *target);
int arm7_9_execute_sys_speed(struct target_s *target);
Modified: trunk/src/target/arm7tdmi.c
===================================================================
--- trunk/src/target/arm7tdmi.c 2009-06-18 07:07:59 UTC (rev 2277)
+++ trunk/src/target/arm7tdmi.c 2009-06-18 07:08:52 UTC (rev 2278)
@@ -139,9 +139,9 @@
}
static int arm7tdmi_num_bits[]={1, 32};
-static __inline int arm7tdmi_clock_out_inner(arm_jtag_t *jtag_info, u32 out, int breakpoint)
+static __inline int arm7tdmi_clock_out_inner(arm_jtag_t *jtag_info, uint32_t out, int breakpoint)
{
- u32 values[2]={breakpoint, flip_u32(out, 32)};
+ uint32_t values[2]={breakpoint, flip_u32(out, 32)};
jtag_add_dr_out(jtag_info->tap,
2,
@@ -155,7 +155,7 @@
}
/* put an instruction in the ARM7TDMI pipeline or write the data bus, and optionally read data */
-static __inline int arm7tdmi_clock_out(arm_jtag_t *jtag_info, u32 out, u32 *deprecated, int breakpoint)
+static __inline int arm7tdmi_clock_out(arm_jtag_t *jtag_info, uint32_t out, uint32_t *deprecated, int breakpoint)
{
jtag_set_end_state(TAP_DRPAUSE);
arm_jtag_scann(jtag_info, 0x1);
@@ -165,7 +165,7 @@
}
/* clock the target, reading the databus */
-int arm7tdmi_clock_data_in(arm_jtag_t *jtag_info, u32 *in)
+int arm7tdmi_clock_data_in(arm_jtag_t *jtag_info, uint32_t *in)
{
int retval = ERROR_OK;
scan_field_t fields[2];
@@ -216,7 +216,7 @@
void arm_endianness(uint8_t *tmp, void *in, int size, int be, int flip)
{
- u32 readback=le_to_h_u32(tmp);
+ uint32_t readback=le_to_h_u32(tmp);
if (flip)
readback=flip_u32(readback, 32);
switch (size)
@@ -292,7 +292,7 @@
if (in)
{
- LOG_DEBUG("in: 0x%8.8x", *(u32*)in);
+ LOG_DEBUG("in: 0x%8.8x", *(uint32_t*)in);
}
else
{
@@ -304,7 +304,7 @@
return ERROR_OK;
}
-void arm7tdmi_change_to_arm(target_t *target, u32 *r0, u32 *pc)
+void arm7tdmi_change_to_arm(target_t *target, uint32_t *r0, uint32_t *pc)
{
/* get pointers to arch-specific information */
armv4_5_common_t *armv4_5 = target->arch_info;
@@ -361,7 +361,7 @@
* The solution is to arrange for a large out/in scan in this loop and
* and convert data afterwards.
*/
-void arm7tdmi_read_core_regs(target_t *target, u32 mask, u32* core_regs[16])
+void arm7tdmi_read_core_regs(target_t *target, uint32_t mask, uint32_t* core_regs[16])
{
int i;
/* get pointers to arch-specific information */
@@ -387,7 +387,7 @@
}
}
-void arm7tdmi_read_core_regs_target_buffer(target_t *target, u32 mask, void* buffer, int size)
+void arm7tdmi_read_core_regs_target_buffer(target_t *target, uint32_t mask, void* buffer, int size)
{
int i;
/* get pointers to arch-specific information */
@@ -395,7 +395,7 @@
arm7_9_common_t *arm7_9 = armv4_5->arch_info;
arm_jtag_t *jtag_info = &arm7_9->jtag_info;
int be = (target->endianness == TARGET_BIG_ENDIAN) ? 1 : 0;
- u32 *buf_u32 = buffer;
+ uint32_t *buf_u32 = buffer;
uint16_t *buf_u16 = buffer;
uint8_t *buf_u8 = buffer;
@@ -430,7 +430,7 @@
}
}
-void arm7tdmi_read_xpsr(target_t *target, u32 *xpsr, int spsr)
+void arm7tdmi_read_xpsr(target_t *target, uint32_t *xpsr, int spsr)
{
/* get pointers to arch-specific information */
armv4_5_common_t *armv4_5 = target->arch_info;
@@ -450,7 +450,7 @@
arm7tdmi_clock_data_in(jtag_info, xpsr);
}
-void arm7tdmi_write_xpsr(target_t *target, u32 xpsr, int spsr)
+void arm7tdmi_write_xpsr(target_t *target, uint32_t xpsr, int spsr)
{
/* get pointers to arch-specific information */
armv4_5_common_t *armv4_5 = target->arch_info;
@@ -500,7 +500,7 @@
arm7tdmi_clock_out(jtag_info, ARMV4_5_NOP, NULL, 0);
}
-void arm7tdmi_write_core_regs(target_t *target, u32 mask, u32 core_regs[16])
+void arm7tdmi_write_core_regs(target_t *target, uint32_t mask, uint32_t core_regs[16])
{
int i;
/* get pointers to arch-specific information */
@@ -527,7 +527,7 @@
arm7tdmi_clock_out_inner(jtag_info, ARMV4_5_NOP, 0);
}
-void arm7tdmi_load_word_regs(target_t *target, u32 mask)
+void arm7tdmi_load_word_regs(target_t *target, uint32_t mask)
{
/* get pointers to arch-specific information */
armv4_5_common_t *armv4_5 = target->arch_info;
@@ -566,7 +566,7 @@
arm7tdmi_clock_out(jtag_info, ARMV4_5_LDRB_IP(num, 0), NULL, 0);
}
-void arm7tdmi_store_word_regs(target_t *target, u32 mask)
+void arm7tdmi_store_word_regs(target_t *target, uint32_t mask)
{
/* get pointers to arch-specific information */
armv4_5_common_t *armv4_5 = target->arch_info;
@@ -605,7 +605,7 @@
arm7tdmi_clock_out(jtag_info, ARMV4_5_STRB_IP(num, 0), NULL, 0);
}
-void arm7tdmi_write_pc(target_t *target, u32 pc)
+void arm7tdmi_write_pc(target_t *target, uint32_t pc)
{
/* get pointers to arch-specific information */
armv4_5_common_t *armv4_5 = target->arch_info;
Modified: trunk/src/target/arm920t.c
===================================================================
--- trunk/src/target/arm920t.c 2009-06-18 07:07:59 UTC (rev 2277)
+++ trunk/src/target/arm920t.c 2009-06-18 07:08:52 UTC (rev 2278)
@@ -48,8 +48,8 @@
int arm920t_init_target(struct command_context_s *cmd_ctx, struct target_s *target);
int arm920t_quit(void);
int arm920t_arch_state(struct target_s *target);
-int arm920t_read_memory(struct target_s *target, u32 address, u32 size, u32 count, uint8_t *buffer);
-int arm920t_write_memory(struct target_s *target, u32 address, u32 size, u32 count, uint8_t *buffer);
+int arm920t_read_memory(struct target_s *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer);
+int arm920t_write_memory(struct target_s *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer);
int arm920t_soft_reset_halt(struct target_s *target);
#define ARM920T_CP15_PHYS_ADDR(x, y, z) ((x << 5) | (y << 1) << (z))
@@ -93,7 +93,7 @@
.quit = arm920t_quit
};
-int arm920t_read_cp15_physical(target_t *target, int reg_addr, u32 *value)
+int arm920t_read_cp15_physical(target_t *target, int reg_addr, uint32_t *value)
{
armv4_5_common_t *armv4_5 = target->arch_info;
arm7_9_common_t *arm7_9 = armv4_5->arch_info;
@@ -143,7 +143,7 @@
return ERROR_OK;
}
-int arm920t_write_cp15_physical(target_t *target, int reg_addr, u32 value)
+int arm920t_write_cp15_physical(target_t *target, int reg_addr, uint32_t value)
{
armv4_5_common_t *armv4_5 = target->arch_info;
arm7_9_common_t *arm7_9 = armv4_5->arch_info;
@@ -189,7 +189,7 @@
return ERROR_OK;
}
-int arm920t_execute_cp15(target_t *target, u32 cp15_opcode, u32 arm_opcode)
+int arm920t_execute_cp15(target_t *target, uint32_t cp15_opcode, uint32_t arm_opcode)
{
int retval;
armv4_5_common_t *armv4_5 = target->arch_info;
@@ -244,12 +244,12 @@
return ERROR_OK;
}
-int arm920t_read_cp15_interpreted(target_t *target, u32 cp15_opcode, u32 address, u32 *value)
+int arm920t_read_cp15_interpreted(target_t *target, uint32_t cp15_opcode, uint32_t address, uint32_t *value)
{
armv4_5_common_t *armv4_5 = target->arch_info;
- u32* regs_p[1];
- u32 regs[2];
- u32 cp15c15 = 0x0;
+ uint32_t* regs_p[1];
+ uint32_t regs[2];
+ uint32_t cp15c15 = 0x0;
/* load address into R1 */
regs[1] = address;
@@ -287,11 +287,11 @@
return ERROR_OK;
}
-int arm920t_write_cp15_interpreted(target_t *target, u32 cp15_opcode, u32 value, u32 address)
+int arm920t_write_cp15_interpreted(target_t *target, uint32_t cp15_opcode, uint32_t value, uint32_t address)
{
- u32 cp15c15 = 0x0;
+ uint32_t cp15c15 = 0x0;
armv4_5_common_t *armv4_5 = target->arch_info;
- u32 regs[2];
+ uint32_t regs[2];
/* load value, address into R0, R1 */
regs[0] = value;
@@ -325,10 +325,10 @@
return ERROR_OK;
}
-u32 arm920t_get_ttb(target_t *target)
+uint32_t arm920t_get_ttb(target_t *target)
{
int retval;
- u32 ttb = 0x0;
+ uint32_t ttb = 0x0;
if ((retval = arm920t_read_cp15_interpreted(target, 0xeebf0f51, 0x0, &ttb)) != ERROR_OK)
return retval;
@@ -338,7 +338,7 @@
void arm920t_disable_mmu_caches(target_t *target, int mmu, int d_u_cache, int i_cache)
{
- u32 cp15_control;
+ uint32_t cp15_control;
/* read cp15 control register */
arm920t_read_cp15_physical(target, 0x2, &cp15_control);
@@ -358,7 +358,7 @@
void arm920t_enable_mmu_caches(target_t *target, int mmu, int d_u_cache, int i_cache)
{
- u32 cp15_control;
+ uint32_t cp15_control;
/* read cp15 control register */
arm920t_read_cp15_physical(target, 0x2, &cp15_control);
@@ -378,7 +378,7 @@
void arm920t_post_debug_entry(target_t *target)
{
- u32 cp15c15;
+ uint32_t cp15c15;
armv4_5_common_t *armv4_5 = target->arch_info;
arm7_9_common_t *arm7_9 = armv4_5->arch_info;
arm9tdmi_common_t *arm9tdmi = arm7_9->arch_info;
@@ -391,7 +391,7 @@
if (arm920t->armv4_5_mmu.armv4_5_cache.ctype == -1)
{
- u32 cache_type_reg;
+ uint32_t cache_type_reg;
/* identify caches */
arm920t_read_cp15_physical(target, 0x1, &cache_type_reg);
jtag_execute_queue();
@@ -424,7 +424,7 @@
void arm920t_pre_restore_context(target_t *target)
{
- u32 cp15c15;
+ uint32_t cp15c15;
armv4_5_common_t *armv4_5 = target->arch_info;
arm7_9_common_t *arm7_9 = armv4_5->arch_info;
arm9tdmi_common_t *arm9tdmi = arm7_9->arch_info;
@@ -518,7 +518,7 @@
return ERROR_OK;
}
-int arm920t_read_memory(struct target_s *target, u32 address, u32 size, u32 count, uint8_t *buffer)
+int arm920t_read_memory(struct target_s *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer)
{
int retval;
@@ -527,7 +527,7 @@
return retval;
}
-int arm920t_write_memory(struct target_s *target, u32 address, u32 size, u32 count, uint8_t *buffer)
+int arm920t_write_memory(struct target_s *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer)
{
int retval;
armv4_5_common_t *armv4_5 = target->arch_info;
@@ -543,7 +543,7 @@
if (arm920t->armv4_5_mmu.armv4_5_cache.d_u_cache_enabled)
{
LOG_DEBUG("D-Cache enabled, writing through to main memory");
- u32 pa, cb, ap;
+ uint32_t pa, cb, ap;
int type, domain;
pa = armv4_5_mmu_translate_va(target, &arm920t->armv4_5_mmu, address, &type, &cb, &domain, &ap);
@@ -731,11 +731,11 @@
arm9tdmi_common_t *arm9tdmi;...
[truncated message content] |
|
From: <zw...@ma...> - 2009-06-18 09:08:48
|
Author: zwelch
Date: 2009-06-18 09:07:59 +0200 (Thu, 18 Jun 2009)
New Revision: 2277
Modified:
trunk/src/flash/at91sam7.c
trunk/src/flash/at91sam7.h
trunk/src/flash/avrf.c
trunk/src/flash/avrf.h
trunk/src/flash/cfi.c
trunk/src/flash/cfi.h
trunk/src/flash/davinci_nand.c
trunk/src/flash/lpc3180_nand_controller.c
trunk/src/flash/mflash.c
trunk/src/flash/nand.c
trunk/src/flash/nand.h
trunk/src/flash/nand_ecc_kw.c
trunk/src/flash/non_cfi.h
trunk/src/flash/orion_nand.c
trunk/src/flash/pic32mx.c
trunk/src/flash/s3c2410_nand.c
trunk/src/flash/s3c24xx_nand.c
trunk/src/flash/s3c24xx_nand.h
trunk/src/flash/stellaris.c
trunk/src/flash/stellaris.h
trunk/src/flash/stm32x.c
trunk/src/flash/stm32x.h
trunk/src/flash/str7x.c
trunk/src/flash/str9x.c
trunk/src/flash/tms470.c
trunk/src/helper/types.h
trunk/src/jtag/amt_jtagaccel.c
trunk/src/jtag/ft2232.c
trunk/src/jtag/gw16012.c
trunk/src/jtag/parport.c
trunk/src/jtag/rlink/rlink.h
trunk/src/jtag/vsllink.c
trunk/src/target/arm11.c
trunk/src/target/arm7_9_common.c
trunk/src/target/arm7_9_common.h
trunk/src/target/arm7tdmi.c
trunk/src/target/arm9tdmi.c
trunk/src/target/arm_adi_v5.c
trunk/src/target/arm_disassembler.c
trunk/src/target/arm_disassembler.h
trunk/src/target/arm_jtag.c
trunk/src/target/arm_simulator.c
trunk/src/target/armv4_5.c
trunk/src/target/armv7m.c
trunk/src/target/avrt.c
trunk/src/target/cortex_a8.c
trunk/src/target/cortex_m3.c
trunk/src/target/etm.h
trunk/src/target/feroceon.c
trunk/src/target/image.c
trunk/src/target/mips32_dmaacc.c
trunk/src/target/mips32_dmaacc.h
trunk/src/target/mips32_pracc.c
trunk/src/target/mips32_pracc.h
trunk/src/target/mips_m4k.c
trunk/src/target/target.c
trunk/src/target/target.h
trunk/src/target/xscale.h
Log:
Transform 'u16' to 'uint16_t'
- Replace '\([^_]\)u16' with '\1uint16_t'.
- Replace '^u16' with 'uint16_t'.
Modified: trunk/src/flash/at91sam7.c
===================================================================
--- trunk/src/flash/at91sam7.c 2009-06-18 07:07:12 UTC (rev 2276)
+++ trunk/src/flash/at91sam7.c 2009-06-18 07:07:59 UTC (rev 2277)
@@ -57,7 +57,7 @@
static u32 at91sam7_get_flash_status(target_t *target, int bank_number);
static void at91sam7_set_flash_mode(flash_bank_t *bank, int mode);
static u32 at91sam7_wait_status_busy(flash_bank_t *bank, u32 waitbits, int timeout);
-static int at91sam7_flash_command(struct flash_bank_s *bank, uint8_t cmd, u16 pagen);
+static int at91sam7_flash_command(struct flash_bank_s *bank, uint8_t cmd, uint16_t pagen);
static int at91sam7_handle_gpnvm_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
flash_driver_t at91sam7_flash =
@@ -274,7 +274,7 @@
}
/* Send one command to the AT91SAM flash controller */
-static int at91sam7_flash_command(struct flash_bank_s *bank, uint8_t cmd, u16 pagen)
+static int at91sam7_flash_command(struct flash_bank_s *bank, uint8_t cmd, uint16_t pagen)
{
u32 fcr;
at91sam7_flash_bank_t *at91sam7_info = bank->driver_priv;
@@ -309,14 +309,14 @@
at91sam7_flash_bank_t *at91sam7_info;
target_t *target = t_bank->target;
- u16 bnk, sec;
- u16 arch;
+ uint16_t bnk, sec;
+ uint16_t arch;
u32 cidr;
uint8_t banks_num = 0;
- u16 num_nvmbits = 0;
- u16 sectors_num = 0;
- u16 pages_per_sector = 0;
- u16 page_size = 0;
+ uint16_t num_nvmbits = 0;
+ uint16_t sectors_num = 0;
+ uint16_t pages_per_sector = 0;
+ uint16_t page_size = 0;
u32 ext_freq;
u32 bank_size;
u32 base_address = 0;
@@ -621,12 +621,12 @@
static int at91sam7_erase_check(struct flash_bank_s *bank)
{
target_t *target = bank->target;
- u16 retval;
+ uint16_t retval;
u32 blank;
- u16 fast_check;
+ uint16_t fast_check;
uint8_t *buffer;
- u16 nSector;
- u16 nByte;
+ uint16_t nSector;
+ uint16_t nByte;
if (bank->target->state != TARGET_HALTED)
{
@@ -759,9 +759,9 @@
int banks_num;
int num_sectors;
- u16 pages_per_sector;
- u16 page_size;
- u16 num_nvmbits;
+ uint16_t pages_per_sector;
+ uint16_t page_size;
+ uint16_t num_nvmbits;
char *target_name;
Modified: trunk/src/flash/at91sam7.h
===================================================================
--- trunk/src/flash/at91sam7.h 2009-06-18 07:07:12 UTC (rev 2276)
+++ trunk/src/flash/at91sam7.h 2009-06-18 07:07:59 UTC (rev 2277)
@@ -29,30 +29,30 @@
{
/* chip id register */
u32 cidr;
- u16 cidr_ext;
- u16 cidr_nvptyp;
- u16 cidr_arch;
- u16 cidr_sramsiz;
- u16 cidr_nvpsiz;
- u16 cidr_nvpsiz2;
- u16 cidr_eproc;
- u16 cidr_version;
+ uint16_t cidr_ext;
+ uint16_t cidr_nvptyp;
+ uint16_t cidr_arch;
+ uint16_t cidr_sramsiz;
+ uint16_t cidr_nvpsiz;
+ uint16_t cidr_nvpsiz2;
+ uint16_t cidr_eproc;
+ uint16_t cidr_version;
char *target_name;
/* flash auto-detection */
uint8_t flash_autodetection;
/* flash geometry */
- u16 pages_per_sector;
- u16 pagesize;
- u16 pages_in_lockregion;
+ uint16_t pages_per_sector;
+ uint16_t pagesize;
+ uint16_t pages_in_lockregion;
/* nv memory bits */
- u16 num_lockbits_on;
- u16 lockbits;
- u16 num_nvmbits;
- u16 num_nvmbits_on;
- u16 nvmbits;
+ uint16_t num_lockbits_on;
+ uint16_t lockbits;
+ uint16_t num_nvmbits;
+ uint16_t num_nvmbits_on;
+ uint16_t nvmbits;
uint8_t securitybit;
/* 0: not init
Modified: trunk/src/flash/avrf.c
===================================================================
--- trunk/src/flash/avrf.c 2009-06-18 07:07:12 UTC (rev 2276)
+++ trunk/src/flash/avrf.c 2009-06-18 07:07:59 UTC (rev 2277)
@@ -76,8 +76,8 @@
extern int mcu_write_dr(jtag_tap_t *tap, uint8_t *ir_in, uint8_t *ir_out, int dr_len, int rti);
extern int mcu_write_ir_u8(jtag_tap_t *tap, uint8_t *ir_in, uint8_t ir_out, int ir_len, int rti);
extern int mcu_write_dr_u8(jtag_tap_t *tap, uint8_t *ir_in, uint8_t ir_out, int dr_len, int rti);
-extern int mcu_write_ir_u16(jtag_tap_t *tap, u16 *ir_in, u16 ir_out, int ir_len, int rti);
-extern int mcu_write_dr_u16(jtag_tap_t *tap, u16 *ir_in, u16 ir_out, int dr_len, int rti);
+extern int mcu_write_ir_u16(jtag_tap_t *tap, uint16_t *ir_in, uint16_t ir_out, int ir_len, int rti);
+extern int mcu_write_dr_u16(jtag_tap_t *tap, uint16_t *ir_in, uint16_t ir_out, int dr_len, int rti);
extern int mcu_write_ir_u32(jtag_tap_t *tap, u32 *ir_in, u32 ir_out, int ir_len, int rti);
extern int mcu_write_dr_u32(jtag_tap_t *tap, u32 *ir_in, u32 ir_out, int dr_len, int rti);
extern int mcu_execute_queue(void);
Modified: trunk/src/flash/avrf.h
===================================================================
--- trunk/src/flash/avrf.h 2009-06-18 07:07:12 UTC (rev 2276)
+++ trunk/src/flash/avrf.h 2009-06-18 07:07:59 UTC (rev 2277)
@@ -25,7 +25,7 @@
typedef struct avrf_type_s
{
char name[15];
- u16 chip_id;
+ uint16_t chip_id;
int flash_page_size;
int flash_page_num;
int eeprom_page_size;
Modified: trunk/src/flash/cfi.c
===================================================================
--- trunk/src/flash/cfi.c 2009-06-18 07:07:12 UTC (rev 2276)
+++ trunk/src/flash/cfi.c 2009-06-18 07:07:59 UTC (rev 2277)
@@ -203,7 +203,7 @@
}
}
-static u16 cfi_query_u16(flash_bank_t *bank, int sector, u32 offset)
+static uint16_t cfi_query_u16(flash_bank_t *bank, int sector, u32 offset)
{
target_t *target = bank->target;
cfi_flash_bank_t *cfi_info = bank->driver_priv;
@@ -979,8 +979,8 @@
/* NOTE:
* The data to flash must not be changed in endian! We write a bytestrem in
* target byte order already. Only the control and status byte lane of the flash
- * WSM is interpreted by the CPU in different ways, when read a u16 or u32
- * word (data seems to be in the upper or lower byte lane for u16 accesses).
+ * WSM is interpreted by the CPU in different ways, when read a uint16_t or u32
+ * word (data seems to be in the upper or lower byte lane for uint16_t accesses).
*/
#if 0
Modified: trunk/src/flash/cfi.h
===================================================================
--- trunk/src/flash/cfi.h 2009-06-18 07:07:12 UTC (rev 2276)
+++ trunk/src/flash/cfi.h 2009-06-18 07:07:59 UTC (rev 2277)
@@ -34,16 +34,16 @@
int not_cfi;
int probed;
- u16 manufacturer;
- u16 device_id;
+ uint16_t manufacturer;
+ uint16_t device_id;
char qry[3];
/* identification string */
- u16 pri_id;
- u16 pri_addr;
- u16 alt_id;
- u16 alt_addr;
+ uint16_t pri_id;
+ uint16_t pri_addr;
+ uint16_t alt_id;
+ uint16_t alt_addr;
/* device-system interface */
uint8_t vcc_min;
@@ -63,8 +63,8 @@
/* flash geometry */
u32 dev_size;
- u16 interface_desc;
- u16 max_buf_write_size;
+ uint16_t interface_desc;
+ uint16_t max_buf_write_size;
uint8_t num_erase_regions;
u32 *erase_region_info;
@@ -83,11 +83,11 @@
uint8_t minor_version;
u32 feature_support;
uint8_t suspend_cmd_support;
- u16 blk_status_reg_mask;
+ uint16_t blk_status_reg_mask;
uint8_t vcc_optimal;
uint8_t vpp_optimal;
uint8_t num_protection_fields;
- u16 prot_reg_addr;
+ uint16_t prot_reg_addr;
uint8_t fact_prot_reg_size;
uint8_t user_prot_reg_size;
uint8_t extra[0];
@@ -144,8 +144,8 @@
typedef struct cfi_fixup_s
{
- u16 mfr;
- u16 id;
+ uint16_t mfr;
+ uint16_t id;
void (*fixup)(flash_bank_t *flash, void *param);
void *param;
} cfi_fixup_t;
Modified: trunk/src/flash/davinci_nand.c
===================================================================
--- trunk/src/flash/davinci_nand.c 2009-06-18 07:07:12 UTC (rev 2276)
+++ trunk/src/flash/davinci_nand.c 2009-06-18 07:07:59 UTC (rev 2277)
@@ -157,7 +157,7 @@
return ERROR_OK;
}
-static int davinci_write_data(struct nand_device_s *nand, u16 data)
+static int davinci_write_data(struct nand_device_s *nand, uint16_t data)
{
struct davinci_nand *info = nand->controller_priv;
target_t *target = info->target;
Modified: trunk/src/flash/lpc3180_nand_controller.c
===================================================================
--- trunk/src/flash/lpc3180_nand_controller.c 2009-06-18 07:07:12 UTC (rev 2276)
+++ trunk/src/flash/lpc3180_nand_controller.c 2009-06-18 07:07:59 UTC (rev 2277)
@@ -30,7 +30,7 @@
static int lpc3180_reset(struct nand_device_s *device);
static int lpc3180_command(struct nand_device_s *device, uint8_t command);
static int lpc3180_address(struct nand_device_s *device, uint8_t address);
-static int lpc3180_write_data(struct nand_device_s *device, u16 data);
+static int lpc3180_write_data(struct nand_device_s *device, uint16_t data);
static int lpc3180_read_data(struct nand_device_s *device, void *data);
static int lpc3180_write_page(struct nand_device_s *device, u32 page, uint8_t *data, u32 data_size, uint8_t *oob, u32 oob_size);
static int lpc3180_read_page(struct nand_device_s *device, u32 page, uint8_t *data, u32 data_size, uint8_t *oob, u32 oob_size);
@@ -410,7 +410,7 @@
return ERROR_OK;
}
-static int lpc3180_write_data(struct nand_device_s *device, u16 data)
+static int lpc3180_write_data(struct nand_device_s *device, uint16_t data)
{
lpc3180_nand_controller_t *lpc3180_info = device->controller_priv;
target_t *target = lpc3180_info->target;
@@ -466,7 +466,7 @@
}
else if (device->bus_width == 16)
{
- u16 *data16 = data;
+ uint16_t *data16 = data;
target_read_u16(target, 0x200b0000, data16);
}
else
@@ -489,7 +489,7 @@
}
else if (device->bus_width == 16)
{
- u16 *data16 = data;
+ uint16_t *data16 = data;
*data16 = data32 & 0xffff;
}
else
Modified: trunk/src/flash/mflash.c
===================================================================
--- trunk/src/flash/mflash.c 2009-06-18 07:07:12 UTC (rev 2276)
+++ trunk/src/flash/mflash.c 2009-06-18 07:07:59 UTC (rev 2277)
@@ -956,8 +956,8 @@
static int mg_verify_interface(void)
{
- u16 buff[MG_MFLASH_SECTOR_SIZE >> 1];
- u16 i, j;
+ uint16_t buff[MG_MFLASH_SECTOR_SIZE >> 1];
+ uint16_t i, j;
u32 address = mflash_bank->base + MG_BUFFER_OFFSET;
target_t *target = mflash_bank->target;
int ret;
@@ -1174,7 +1174,7 @@
memset(buff, 0xff, 512);
/* PLL Lock cycle and Feedback 9bit Divider */
memcpy(buff, &pll->lock_cyc, sizeof(u32));
- memcpy(buff + 4, &pll->feedback_div, sizeof(u16));
+ memcpy(buff + 4, &pll->feedback_div, sizeof(uint16_t));
buff[6] = pll->input_div; /* PLL Input 5bit Divider */
buff[7] = pll->output_div; /* PLL Output Divider */
@@ -1306,7 +1306,7 @@
mflash_bank->base = strtoul(args[1], NULL, 0);
mflash_bank->rst_pin.num = strtoul(args[2], &str, 0);
if (*str)
- mflash_bank->rst_pin.port[0] = (u16)tolower(str[0]);
+ mflash_bank->rst_pin.port[0] = (uint16_t)tolower(str[0]);
mflash_bank->target = target;
Modified: trunk/src/flash/nand.c
===================================================================
--- trunk/src/flash/nand.c 2009-06-18 07:07:12 UTC (rev 2276)
+++ trunk/src/flash/nand.c 2009-06-18 07:07:59 UTC (rev 2277)
@@ -384,7 +384,7 @@
/* read status */
if (device->device->options & NAND_BUSWIDTH_16)
{
- u16 data;
+ uint16_t data;
device->controller->read_data(device, &data);
*status = data & 0xff;
}
@@ -403,7 +403,7 @@
device->controller->command(device, NAND_CMD_STATUS);
do {
if (device->device->options & NAND_BUSWIDTH_16) {
- u16 data;
+ uint16_t data;
device->controller->read_data(device, &data);
status = data & 0xff;
} else {
@@ -464,7 +464,7 @@
}
else
{
- u16 data_buf;
+ uint16_t data_buf;
device->controller->read_data(device, &data_buf);
manufacturer_id = data_buf & 0xff;
device->controller->read_data(device, &data_buf);
@@ -524,7 +524,7 @@
}
else
{
- u16 data_buf;
+ uint16_t data_buf;
device->controller->read_data(device, &data_buf);
id_buff[3] = data_buf;
@@ -996,7 +996,7 @@
{
if (device->device->options & NAND_BUSWIDTH_16)
{
- u16 data_buf = le_to_h_u16(data);
+ uint16_t data_buf = le_to_h_u16(data);
device->controller->write_data(device, data_buf);
data += 2;
i += 2;
@@ -1021,7 +1021,7 @@
{
if (device->device->options & NAND_BUSWIDTH_16)
{
- u16 oob_buf = le_to_h_u16(data);
+ uint16_t oob_buf = le_to_h_u16(data);
device->controller->write_data(device, oob_buf);
oob += 2;
i += 2;
Modified: trunk/src/flash/nand.h
===================================================================
--- trunk/src/flash/nand.h 2009-06-18 07:07:12 UTC (rev 2276)
+++ trunk/src/flash/nand.h 2009-06-18 07:07:59 UTC (rev 2277)
@@ -38,7 +38,7 @@
int (*reset)(struct nand_device_s *device);
int (*command)(struct nand_device_s *device, uint8_t command);
int (*address)(struct nand_device_s *device, uint8_t address);
- int (*write_data)(struct nand_device_s *device, u16 data);
+ int (*write_data)(struct nand_device_s *device, uint16_t data);
int (*read_data)(struct nand_device_s *device, void *data);
int (*write_block_data)(struct nand_device_s *device, uint8_t *data, int size);
int (*read_block_data)(struct nand_device_s *device, uint8_t *data, int size);
Modified: trunk/src/flash/nand_ecc_kw.c
===================================================================
--- trunk/src/flash/nand_ecc_kw.c 2009-06-18 07:07:12 UTC (rev 2276)
+++ trunk/src/flash/nand_ecc_kw.c 2009-06-18 07:07:59 UTC (rev 2277)
@@ -137,7 +137,7 @@
d = data[i];
if (r7) {
- u16 *t = gf_exp + gf_log[r7];
+ uint16_t *t = gf_exp + gf_log[r7];
r7 = r6 ^ t[0x21c];
r6 = r5 ^ t[0x181];
Modified: trunk/src/flash/non_cfi.h
===================================================================
--- trunk/src/flash/non_cfi.h 2009-06-18 07:07:12 UTC (rev 2276)
+++ trunk/src/flash/non_cfi.h 2009-06-18 07:07:59 UTC (rev 2277)
@@ -24,12 +24,12 @@
typedef struct non_cfi_s
{
- u16 mfr;
- u16 id;
- u16 pri_id;
+ uint16_t mfr;
+ uint16_t id;
+ uint16_t pri_id;
u32 dev_size;
- u16 interface_desc;
- u16 max_buf_write_size;
+ uint16_t interface_desc;
+ uint16_t max_buf_write_size;
uint8_t num_erase_regions;
u32 erase_region_info[6];
uint8_t status_poll_mask;
Modified: trunk/src/flash/orion_nand.c
===================================================================
--- trunk/src/flash/orion_nand.c 2009-06-18 07:07:12 UTC (rev 2276)
+++ trunk/src/flash/orion_nand.c 2009-06-18 07:07:59 UTC (rev 2277)
@@ -79,7 +79,7 @@
return ERROR_OK;
}
-static int orion_nand_write(struct nand_device_s *device, u16 data)
+static int orion_nand_write(struct nand_device_s *device, uint16_t data)
{
orion_nand_controller_t *hw = device->controller_priv;
target_t *target = hw->target;
Modified: trunk/src/flash/pic32mx.c
===================================================================
--- trunk/src/flash/pic32mx.c 2009-06-18 07:07:12 UTC (rev 2276)
+++ trunk/src/flash/pic32mx.c 2009-06-18 07:07:59 UTC (rev 2277)
@@ -260,7 +260,7 @@
pic32mx_flash_bank_t *pic32mx_info = NULL;
target_t *target = bank->target;
#if 0
- u16 prot_reg[4] = {0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF};
+ uint16_t prot_reg[4] = {0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF};
int i, reg, bit;
int status;
u32 protection;
@@ -285,10 +285,10 @@
* high density - each bit refers to a 2bank protection */
target_read_u32(target, PIC32MX_FLASH_WRPR, &protection);
- prot_reg[0] = (u16)protection;
- prot_reg[1] = (u16)(protection >> 8);
- prot_reg[2] = (u16)(protection >> 16);
- prot_reg[3] = (u16)(protection >> 24);
+ prot_reg[0] = (uint16_t)protection;
+ prot_reg[1] = (uint16_t)(protection >> 8);
+ prot_reg[2] = (uint16_t)(protection >> 16);
+ prot_reg[3] = (uint16_t)(protection >> 24);
if (pic32mx_info->ppage_size == 2)
{
@@ -596,7 +596,7 @@
mips32_common_t *mips32 = target->arch_info;
mips_ejtag_t *ejtag_info = &mips32->ejtag_info;
int i;
- u16 num_pages = 0;
+ uint16_t num_pages = 0;
u32 device_id;
int page_size;
Modified: trunk/src/flash/s3c2410_nand.c
===================================================================
--- trunk/src/flash/s3c2410_nand.c 2009-06-18 07:07:12 UTC (rev 2276)
+++ trunk/src/flash/s3c2410_nand.c 2009-06-18 07:07:59 UTC (rev 2277)
@@ -34,7 +34,7 @@
static int s3c2410_nand_device_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct nand_device_s *device);
static int s3c2410_init(struct nand_device_s *device);
static int s3c2410_read_data(struct nand_device_s *device, void *data);
-static int s3c2410_write_data(struct nand_device_s *device, u16 data);
+static int s3c2410_write_data(struct nand_device_s *device, uint16_t data);
static int s3c2410_nand_ready(struct nand_device_s *device, int timeout);
nand_flash_controller_t s3c2410_nand_controller =
@@ -86,7 +86,7 @@
return ERROR_OK;
}
-static int s3c2410_write_data(struct nand_device_s *device, u16 data)
+static int s3c2410_write_data(struct nand_device_s *device, uint16_t data)
{
s3c24xx_nand_controller_t *s3c24xx_info = device->controller_priv;
target_t *target = s3c24xx_info->target;
Modified: trunk/src/flash/s3c24xx_nand.c
===================================================================
--- trunk/src/flash/s3c24xx_nand.c 2009-06-18 07:07:12 UTC (rev 2276)
+++ trunk/src/flash/s3c24xx_nand.c 2009-06-18 07:07:59 UTC (rev 2277)
@@ -104,7 +104,7 @@
return ERROR_OK;
}
-int s3c24xx_write_data(struct nand_device_s *device, u16 data)
+int s3c24xx_write_data(struct nand_device_s *device, uint16_t data)
{
s3c24xx_nand_controller_t *s3c24xx_info = device->controller_priv;
target_t *target = s3c24xx_info->target;
Modified: trunk/src/flash/s3c24xx_nand.h
===================================================================
--- trunk/src/flash/s3c24xx_nand.h 2009-06-18 07:07:12 UTC (rev 2276)
+++ trunk/src/flash/s3c24xx_nand.h 2009-06-18 07:07:59 UTC (rev 2277)
@@ -48,7 +48,7 @@
extern int s3c24xx_reset(struct nand_device_s *device);
extern int s3c24xx_command(struct nand_device_s *device, uint8_t command);
extern int s3c24xx_address(struct nand_device_s *device, uint8_t address);
-extern int s3c24xx_write_data(struct nand_device_s *device, u16 data);
+extern int s3c24xx_write_data(struct nand_device_s *device, uint16_t data);
extern int s3c24xx_read_data(struct nand_device_s *device, void *data);
extern int s3c24xx_controller_ready(struct nand_device_s *device, int tout);
Modified: trunk/src/flash/stellaris.c
===================================================================
--- trunk/src/flash/stellaris.c 2009-06-18 07:07:12 UTC (rev 2276)
+++ trunk/src/flash/stellaris.c 2009-06-18 07:07:59 UTC (rev 2277)
@@ -412,7 +412,7 @@
}
/* Send one command to the flash controller */
-static int stellaris_flash_command(struct flash_bank_s *bank,uint8_t cmd,u16 pagen)
+static int stellaris_flash_command(struct flash_bank_s *bank,uint8_t cmd,uint16_t pagen)
{
u32 fmc;
target_t *target = bank->target;
Modified: trunk/src/flash/stellaris.h
===================================================================
--- trunk/src/flash/stellaris.h 2009-06-18 07:07:12 UTC (rev 2276)
+++ trunk/src/flash/stellaris.h 2009-06-18 07:07:59 UTC (rev 2277)
@@ -40,7 +40,7 @@
u32 pages_in_lockregion;
/* nv memory bits */
- u16 num_lockbits;
+ uint16_t num_lockbits;
u32 lockbits;
/* main clock status */
Modified: trunk/src/flash/stm32x.c
===================================================================
--- trunk/src/flash/stm32x.c 2009-06-18 07:07:12 UTC (rev 2276)
+++ trunk/src/flash/stm32x.c 2009-06-18 07:07:59 UTC (rev 2277)
@@ -140,7 +140,7 @@
/* read current option bytes */
target_read_u32(target, STM32_FLASH_OBR, &optiondata);
- stm32x_info->option_bytes.user_options = (u16)0xFFF8|((optiondata >> 2) & 0x07);
+ stm32x_info->option_bytes.user_options = (uint16_t)0xFFF8|((optiondata >> 2) & 0x07);
stm32x_info->option_bytes.RDP = (optiondata & (1 << OPT_READOUT)) ? 0xFFFF : 0x5AA5;
if (optiondata & (1 << OPT_READOUT))
@@ -149,10 +149,10 @@
/* each bit refers to a 4bank protection */
target_read_u32(target, STM32_FLASH_WRPR, &optiondata);
- stm32x_info->option_bytes.protection[0] = (u16)optiondata;
- stm32x_info->option_bytes.protection[1] = (u16)(optiondata >> 8);
- stm32x_info->option_bytes.protection[2] = (u16)(optiondata >> 16);
- stm32x_info->option_bytes.protection[3] = (u16)(optiondata >> 24);
+ stm32x_info->option_bytes.protection[0] = (uint16_t)optiondata;
+ stm32x_info->option_bytes.protection[1] = (uint16_t)(optiondata >> 8);
+ stm32x_info->option_bytes.protection[2] = (uint16_t)(optiondata >> 16);
+ stm32x_info->option_bytes.protection[3] = (uint16_t)(optiondata >> 24);
return ERROR_OK;
}
@@ -394,7 +394,7 @@
{
stm32x_flash_bank_t *stm32x_info = NULL;
target_t *target = bank->target;
- u16 prot_reg[4] = {0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF};
+ uint16_t prot_reg[4] = {0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF};
int i, reg, bit;
int status;
u32 protection;
@@ -417,10 +417,10 @@
* high density - each bit refers to a 2bank protection */
target_read_u32(target, STM32_FLASH_WRPR, &protection);
- prot_reg[0] = (u16)protection;
- prot_reg[1] = (u16)(protection >> 8);
- prot_reg[2] = (u16)(protection >> 16);
- prot_reg[3] = (u16)(protection >> 24);
+ prot_reg[0] = (uint16_t)protection;
+ prot_reg[1] = (uint16_t)(protection >> 8);
+ prot_reg[2] = (uint16_t)(protection >> 16);
+ prot_reg[3] = (uint16_t)(protection >> 24);
if (stm32x_info->ppage_size == 2)
{
@@ -650,8 +650,8 @@
while (words_remaining > 0)
{
- u16 value;
- memcpy(&value, buffer + bytes_written, sizeof(u16));
+ uint16_t value;
+ memcpy(&value, buffer + bytes_written, sizeof(uint16_t));
target_write_u32(target, STM32_FLASH_CR, FLASH_PG);
target_write_u16(target, address, value);
@@ -676,7 +676,7 @@
if (bytes_remaining)
{
- u16 value = 0xffff;
+ uint16_t value = 0xffff;
memcpy(&value, buffer + bytes_written, bytes_remaining);
target_write_u32(target, STM32_FLASH_CR, FLASH_PG);
@@ -706,7 +706,7 @@
target_t *target = bank->target;
stm32x_flash_bank_t *stm32x_info = bank->driver_priv;
int i;
- u16 num_pages;
+ uint16_t num_pages;
u32 device_id;
int page_size;
@@ -1094,7 +1094,7 @@
flash_bank_t *bank;
target_t *target = NULL;
stm32x_flash_bank_t *stm32x_info = NULL;
- u16 optionbyte = 0xF8;
+ uint16_t optionbyte = 0xF8;
if (argc < 4)
{
Modified: trunk/src/flash/stm32x.h
===================================================================
--- trunk/src/flash/stm32x.h 2009-06-18 07:07:12 UTC (rev 2276)
+++ trunk/src/flash/stm32x.h 2009-06-18 07:07:59 UTC (rev 2277)
@@ -27,9 +27,9 @@
typedef struct stm32x_options_s
{
- u16 RDP;
- u16 user_options;
- u16 protection[4];
+ uint16_t RDP;
+ uint16_t user_options;
+ uint16_t protection[4];
} stm32x_options_t;
typedef struct stm32x_flash_bank_s
Modified: trunk/src/flash/str7x.c
===================================================================
--- trunk/src/flash/str7x.c 2009-06-18 07:07:12 UTC (rev 2276)
+++ trunk/src/flash/str7x.c 2009-06-18 07:07:59 UTC (rev 2277)
@@ -646,8 +646,8 @@
u32 flash_cmd;
u32 retval;
- u16 ProtectionLevel = 0;
- u16 ProtectionRegs;
+ uint16_t ProtectionLevel = 0;
+ uint16_t ProtectionRegs;
if (argc < 1)
{
Modified: trunk/src/flash/str9x.c
===================================================================
--- trunk/src/flash/str9x.c 2009-06-18 07:07:12 UTC (rev 2276)
+++ trunk/src/flash/str9x.c 2009-06-18 07:07:59 UTC (rev 2277)
@@ -183,7 +183,7 @@
int i;
u32 adr;
u32 status = 0;
- u16 hstatus = 0;
+ uint16_t hstatus = 0;
if (bank->target->state != TARGET_HALTED)
{
Modified: trunk/src/flash/tms470.c
===================================================================
--- trunk/src/flash/tms470.c 2009-06-18 07:07:12 UTC (rev 2276)
+++ trunk/src/flash/tms470.c 2009-06-18 07:07:59 UTC (rev 2277)
@@ -786,11 +786,11 @@
* clear status regiser, sent erase command, kickoff erase
*/
target_write_u16(target, flashAddr, 0x0040);
- LOG_DEBUG("write *(u16 *)0x%08x=0x0040", flashAddr);
+ LOG_DEBUG("write *(uint16_t *)0x%08x=0x0040", flashAddr);
target_write_u16(target, flashAddr, 0x0020);
- LOG_DEBUG("write *(u16 *)0x%08x=0x0020", flashAddr);
+ LOG_DEBUG("write *(uint16_t *)0x%08x=0x0020", flashAddr);
target_write_u16(target, flashAddr, 0xffff);
- LOG_DEBUG("write *(u16 *)0x%08x=0xffff", flashAddr);
+ LOG_DEBUG("write *(uint16_t *)0x%08x=0xffff", flashAddr);
/*
* Monitor FMMSTAT, busy until clear, then check and other flags for
@@ -994,7 +994,7 @@
for (i = 0; i < count; i += 2)
{
u32 addr = bank->base + offset + i;
- u16 word = (((u16) buffer[i]) << 8) | (u16) buffer[i + 1];
+ uint16_t word = (((uint16_t) buffer[i]) << 8) | (uint16_t) buffer[i + 1];
if (word != 0xffff)
{
Modified: trunk/src/helper/types.h
===================================================================
--- trunk/src/helper/types.h 2009-06-18 07:07:12 UTC (rev 2276)
+++ trunk/src/helper/types.h 2009-06-18 07:07:59 UTC (rev 2277)
@@ -34,8 +34,8 @@
typedef unsigned char uint8_t;
#endif
-#ifndef u16
-typedef unsigned short u16;
+#ifndef uint16_t
+typedef unsigned short uint16_t;
#endif
#ifndef u32
@@ -93,9 +93,9 @@
return (u32)(buf[0] | buf[1] << 8 | buf[2] << 16 | buf[3] << 24);
}
-static inline u16 le_to_h_u16(const uint8_t* buf)
+static inline uint16_t le_to_h_u16(const uint8_t* buf)
{
- return (u16)(buf[0] | buf[1] << 8);
+ return (uint16_t)(buf[0] | buf[1] << 8);
}
static inline u32 be_to_h_u32(const uint8_t* buf)
@@ -103,9 +103,9 @@
return (u32)(buf[3] | buf[2] << 8 | buf[1] << 16 | buf[0] << 24);
}
-static inline u16 be_to_h_u16(const uint8_t* buf)
+static inline uint16_t be_to_h_u16(const uint8_t* buf)
{
- return (u16)(buf[1] | buf[0] << 8);
+ return (uint16_t)(buf[1] | buf[0] << 8);
}
static inline void h_u32_to_le(uint8_t* buf, int val)
Modified: trunk/src/jtag/amt_jtagaccel.c
===================================================================
--- trunk/src/jtag/amt_jtagaccel.c 2009-06-18 07:07:12 UTC (rev 2276)
+++ trunk/src/jtag/amt_jtagaccel.c 2009-06-18 07:07:59 UTC (rev 2277)
@@ -42,7 +42,7 @@
#endif
/* configuration */
-static u16 amt_jtagaccel_port;
+static uint16_t amt_jtagaccel_port;
/* interface variables
*/
Modified: trunk/src/jtag/ft2232.c
===================================================================
--- trunk/src/jtag/ft2232.c 2009-06-18 07:07:12 UTC (rev 2276)
+++ trunk/src/jtag/ft2232.c 2009-06-18 07:07:59 UTC (rev 2277)
@@ -107,8 +107,8 @@
#define MAX_USB_IDS 8
/* vid = pid = 0 marks the end of the list */
-static u16 ft2232_vid[MAX_USB_IDS + 1] = { 0x0403, 0 };
-static u16 ft2232_pid[MAX_USB_IDS + 1] = { 0x6010, 0 };
+static uint16_t ft2232_vid[MAX_USB_IDS + 1] = { 0x0403, 0 };
+static uint16_t ft2232_pid[MAX_USB_IDS + 1] = { 0x6010, 0 };
typedef struct ft2232_layout_s
{
@@ -1780,7 +1780,7 @@
#if BUILD_FT2232_FTD2XX == 1
-static int ft2232_init_ftd2xx(u16 vid, u16 pid, int more, int* try_more)
+static int ft2232_init_ftd2xx(uint16_t vid, uint16_t pid, int more, int* try_more)
{
FT_STATUS status;
DWORD deviceID;
@@ -1958,7 +1958,7 @@
#endif /* BUILD_FT2232_FTD2XX == 1 */
#if BUILD_FT2232_LIBFTDI == 1
-static int ft2232_init_libftdi(u16 vid, u16 pid, int more, int* try_more)
+static int ft2232_init_libftdi(uint16_t vid, uint16_t pid, int more, int* try_more)
{
uint8_t latency_timer;
Modified: trunk/src/jtag/gw16012.c
===================================================================
--- trunk/src/jtag/gw16012.c 2009-06-18 07:07:12 UTC (rev 2276)
+++ trunk/src/jtag/gw16012.c 2009-06-18 07:07:59 UTC (rev 2277)
@@ -67,7 +67,7 @@
/* configuration */
-u16 gw16012_port;
+uint16_t gw16012_port;
/* interface variables
*/
Modified: trunk/src/jtag/parport.c
===================================================================
--- trunk/src/jtag/parport.c 2009-06-18 07:07:12 UTC (rev 2276)
+++ trunk/src/jtag/parport.c 2009-06-18 07:07:59 UTC (rev 2277)
@@ -103,7 +103,7 @@
/* configuration */
static char* parport_cable = NULL;
-static u16 parport_port;
+static uint16_t parport_port;
static int parport_exit = 0;
/* interface variables
Modified: trunk/src/jtag/rlink/rlink.h
===================================================================
--- trunk/src/jtag/rlink/rlink.h 2009-06-18 07:07:12 UTC (rev 2276)
+++ trunk/src/jtag/rlink/rlink.h 2009-06-18 07:07:59 UTC (rev 2277)
@@ -23,8 +23,8 @@
typedef
struct rlink_speed_table_s {
uint8_t const *dtc;
- u16 dtc_size;
- u16 khz;
+ uint16_t dtc_size;
+ uint16_t khz;
uint8_t prescaler;
} rlink_speed_table_t;
Modified: trunk/src/jtag/vsllink.c
===================================================================
--- trunk/src/jtag/vsllink.c 2009-06-18 07:07:12 UTC (rev 2276)
+++ trunk/src/jtag/vsllink.c 2009-06-18 07:07:59 UTC (rev 2277)
@@ -37,8 +37,8 @@
#define VSLLINK_MODE_NORMAL 0
#define VSLLINK_MODE_DMA 1
-static u16 vsllink_usb_vid;
-static u16 vsllink_usb_pid;
+static uint16_t vsllink_usb_vid;
+static uint16_t vsllink_usb_pid;
static uint8_t vsllink_usb_bulkout;
static uint8_t vsllink_usb_bulkin;
static uint8_t vsllink_usb_interface;
@@ -627,7 +627,7 @@
static void vsllink_append_tms(void)
{
uint8_t tms_scan = VSLLINK_TAP_MOVE(tap_get_state(), tap_get_end_state());
- u16 tms2;
+ uint16_t tms2;
insert_insignificant_operation_t *insert = \
&VSLLINK_TAP_MOVE_INSERT_INSIGNIFICANT[tap_move_ndx(tap_get_state())][tap_move_ndx(tap_get_end_state())];
@@ -955,7 +955,7 @@
static void vsllink_stableclocks_normal(int num_cycles, int tms)
{
int tms_len;
- u16 tms_append_byte;
+ uint16_t tms_append_byte;
if (vsllink_tms_data_len > 0)
{
@@ -965,7 +965,7 @@
if (tms > 0)
{
// append '1' for tms
- tms_append_byte = (u16)((((1 << num_cycles) - 1) << vsllink_tms_data_len) & 0xFFFF);
+ tms_append_byte = (uint16_t)((((1 << num_cycles) - 1) << vsllink_tms_data_len) & 0xFFFF);
}
else
{
Modified: trunk/src/target/arm11.c
===================================================================
--- trunk/src/target/arm11.c 2009-06-18 07:07:12 UTC (rev 2276)
+++ trunk/src/target/arm11.c 2009-06-18 07:07:59 UTC (rev 2277)
@@ -1092,7 +1092,7 @@
*/
int arm11_read_memory(struct target_s *target, u32 address, u32 size, u32 count, uint8_t *buffer)
{
- /** \todo TODO: check if buffer cast to u32* and u16* might cause alignment problems */
+ /** \todo TODO: check if buffer cast to u32* and uint16_t* might cause alignment problems */
FNC_INFO;
@@ -1148,8 +1148,8 @@
/* MCR p14,0,R1,c0,c5,0 */
arm11_run_instr_data_from_core(arm11, 0xEE001E15, &res, 1);
- u16 svalue = res;
- memcpy(buffer + count * sizeof(u16), &svalue, sizeof(u16));
+ uint16_t svalue = res;
+ memcpy(buffer + count * sizeof(uint16_t), &svalue, sizeof(uint16_t));
}
break;
@@ -1218,8 +1218,8 @@
for (size_t i = 0; i < count; i++)
{
- u16 value;
- memcpy(&value, buffer + count * sizeof(u16), sizeof(u16));
+ uint16_t value;
+ memcpy(&value, buffer + count * sizeof(uint16_t), sizeof(uint16_t));
/* MRC p14,0,r1,c0,c5,0 */
arm11_run_instr_data_to_core1(arm11, 0xee101e15, value);
Modified: trunk/src/target/arm7_9_common.c
===================================================================
--- trunk/src/target/arm7_9_common.c 2009-06-18 07:07:12 UTC (rev 2276)
+++ trunk/src/target/arm7_9_common.c 2009-06-18 07:07:59 UTC (rev 2277)
@@ -296,7 +296,7 @@
}
else
{
- u16 verify = 0xffff;
+ uint16_t verify = 0xffff;
/* keep the original instruction in target endianness */
if ((retval = target_read_memory(target, breakpoint->address, 2, 1, breakpoint->orig_instr)) != ERROR_OK)
{
@@ -385,7 +385,7 @@
}
else
{
- u16 current_instr;
+ uint16_t current_instr;
/* check that user program as not modified breakpoint instruction */
if ((retval = target_read_memory(target, breakpoint->address, 2, 1, (uint8_t*)¤t_instr)) != ERROR_OK)
{
Modified: trunk/src/target/arm7_9_common.h
===================================================================
--- trunk/src/target/arm7_9_common.h 2009-06-18 07:07:12 UTC (rev 2276)
+++ trunk/src/target/arm7_9_common.h 2009-06-18 07:07:59 UTC (rev 2277)
@@ -45,7 +45,7 @@
reg_cache_t *eice_cache; /**< Embedded ICE register cache */
u32 arm_bkpt; /**< ARM breakpoint instruction */
- u16 thumb_bkpt; /**< Thumb breakpoint instruction */
+ uint16_t thumb_bkpt; /**< Thumb breakpoint instruction */
int sw_breakpoints_added; /**< Specifies which watchpoint software breakpoints are setup on */
int breakpoint_count; /**< Current number of set breakpoints */
int wp_available; /**< Current number of available watchpoint units */
Modified: trunk/src/target/arm7tdmi.c
===================================================================
--- trunk/src/target/arm7tdmi.c 2009-06-18 07:07:12 UTC (rev 2276)
+++ trunk/src/target/arm7tdmi.c 2009-06-18 07:07:59 UTC (rev 2277)
@@ -396,7 +396,7 @@
arm_jtag_t *jtag_info = &arm7_9->jtag_info;
int be = (target->endianness == TARGET_BIG_ENDIAN) ? 1 : 0;
u32 *buf_u32 = buffer;
- u16 *buf_u16 = buffer;
+ uint16_t *buf_u16 = buffer;
uint8_t *buf_u8 = buffer;
/* STMIA r0-15, [r0] at debug speed
Modified: trunk/src/target/arm9tdmi.c
===================================================================
--- trunk/src/target/arm9tdmi.c 2009-06-18 07:07:12 UTC (rev 2276)
+++ trunk/src/target/arm9tdmi.c 2009-06-18 07:07:59 UTC (rev 2277)
@@ -447,7 +447,7 @@
arm_jtag_t *jtag_info = &arm7_9->jtag_info;
int be = (target->endianness == TARGET_BIG_ENDIAN) ? 1 : 0;
u32 *buf_u32 = buffer;
- u16 *buf_u16 = buffer;
+ uint16_t *buf_u16 = buffer;
uint8_t *buf_u8 = buffer;
/* STMIA r0-15, [r0] at debug speed
Modified: trunk/src/target/arm_adi_v5.c
===================================================================
--- trunk/src/target/arm_adi_v5.c 2009-06-18 07:07:12 UTC (rev 2276)
+++ trunk/src/target/arm_adi_v5.c 2009-06-18 07:07:59 UTC (rev 2277)
@@ -599,8 +599,8 @@
while (count > 0)
{
dap_setup_accessport(swjdp, CSW_16BIT | CSW_ADDRINC_SINGLE, address);
- u16 svalue;
- memcpy(&svalue, buffer, sizeof(u16));
+ uint16_t svalue;
+ memcpy(&svalue, buffer, sizeof(uint16_t));
u32 outvalue = (u32)svalue << 8 * (address & 0x3);
dap_ap_write_reg_u32(swjdp, AP_REG_DRW, outvalue );
retval = swjdp_transaction_endcheck(swjdp);
@@ -860,8 +860,8 @@
}
else
{
- u16 svalue = (invalue >> 8 * (address & 0x3));
- memcpy(buffer, &svalue, sizeof(u16));
+ uint16_t svalue = (invalue >> 8 * (address & 0x3));
+ memcpy(buffer, &svalue, sizeof(uint16_t));
address += 2;
buffer += 2;
}
@@ -1057,7 +1057,7 @@
if (romtable_present)
{
u32 cid0,cid1,cid2,cid3,memtype,romentry;
- u16 entry_offset;
+ uint16_t entry_offset;
/* bit 16 of apid indicates a memory access port */
if (dbgbase&0x02)
{
Modified: trunk/src/target/arm_disassembler.c
===================================================================
--- trunk/src/target/arm_disassembler.c 2009-06-18 07:07:12 UTC (rev 2276)
+++ trunk/src/target/arm_disassembler.c 2009-06-18 07:07:59 UTC (rev 2277)
@@ -1319,7 +1319,7 @@
return -1;
}
-int evaluate_b_bl_blx_thumb(u16 opcode, u32 address, arm_instruction_t *instruction)
+int evaluate_b_bl_blx_thumb(uint16_t opcode, u32 address, arm_instruction_t *instruction)
{
u32 offset = opcode & 0x7ff;
u32 opc = (opcode >> 11) & 0x3;
@@ -1366,7 +1366,7 @@
return ERROR_OK;
}
-int evaluate_add_sub_thumb(u16 opcode, u32 address, arm_instruction_t *instruction)
+int evaluate_add_sub_thumb(uint16_t opcode, u32 address, arm_instruction_t *instruction)
{
uint8_t Rd = (opcode >> 0) & 0x7;
uint8_t Rn = (opcode >> 3) & 0x7;
@@ -1408,7 +1408,7 @@
return ERROR_OK;
}
-int evaluate_shift_imm_thumb(u16 opcode, u32 address, arm_instruction_t *instruction)
+int evaluate_shift_imm_thumb(uint16_t opcode, u32 address, arm_instruction_t *instruction)
{
uint8_t Rd = (opcode >> 0) & 0x7;
uint8_t Rm = (opcode >> 3) & 0x7;
@@ -1452,7 +1452,7 @@
return ERROR_OK;
}
-int evaluate_data_proc_imm_thumb(u16 opcode, u32 address, arm_instruction_t *instruction)
+int evaluate_data_proc_imm_thumb(uint16_t opcode, u32 address, arm_instruction_t *instruction)
{
uint8_t imm = opcode & 0xff;
uint8_t Rd = (opcode >> 8) & 0x7;
@@ -1493,7 +1493,7 @@
return ERROR_OK;
}
-int evaluate_data_proc_thumb(u16 opcode, u32 address, arm_instruction_t *instruction)
+int evaluate_data_proc_thumb(uint16_t opcode, u32 address, arm_instruction_t *instruction)
{
uint8_t high_reg, op, Rm, Rd,H1,H2;
char *mnemonic = NULL;
@@ -1652,7 +1652,7 @@
return ERROR_OK;
}
-int evaluate_load_literal_thumb(u16 opcode, u32 address, arm_instruction_t *instruction)
+int evaluate_load_literal_thumb(uint16_t opcode, u32 address, arm_instruction_t *instruction)
{
u32 immediate;
uint8_t Rd = (opcode >> 8) & 0x7;
@@ -1671,7 +1671,7 @@
return ERROR_OK;
}
-int evaluate_load_store_reg_thumb(u16 opcode, u32 address, arm_instruction_t *instruction)
+int evaluate_load_store_reg_thumb(uint16_t opcode, u32 address, arm_instruction_t *instruction)
{
uint8_t Rd = (opcode >> 0) & 0x7;
uint8_t Rn = (opcode >> 3) & 0x7;
@@ -1726,7 +1726,7 @@
return ERROR_OK;
}
-int evaluate_load_store_imm_thumb(u16 opcode, u32 address, arm_instruction_t *instruction)
+int evaluate_load_store_imm_thumb(uint16_t opcode, u32 address, arm_instruction_t *instruction)
{
u32 offset = (opcode >> 6) & 0x1f;
uint8_t Rd = (opcode >> 0) & 0x7;
@@ -1770,7 +1770,7 @@
return ERROR_OK;
}
-int evaluate_load_store_stack_thumb(u16 opcode, u32 address, arm_instruction_t *instruction)
+int evaluate_load_store_stack_thumb(uint16_t opcode, u32 address, arm_instruction_t *instruction)
{
u32 offset = opcode & 0xff;
uint8_t Rd = (opcode >> 8) & 0x7;
@@ -1799,7 +1799,7 @@
return ERROR_OK;
}
-int evaluate_add_sp_pc_thumb(u16 opcode, u32 address, arm_instruction_t *instruction)
+int evaluate_add_sp_pc_thumb(uint16_t opcode, u32 address, arm_instruction_t *instruction)
{
u32 imm = opcode & 0xff;
uint8_t Rd = (opcode >> 8) & 0x7;
@@ -1830,7 +1830,7 @@
return ERROR_OK;
}
-int evaluate_adjust_stack_thumb(u16 opcode, u32 address, arm_instruction_t *instruction)
+int evaluate_adjust_stack_thumb(uint16_t opcode, u32 address, arm_instruction_t *instruction)
{
u32 imm = opcode & 0x7f;
uint8_t opc = opcode & (1<<7);
@@ -1858,7 +1858,7 @@
return ERROR_OK;
}
-int evaluate_breakpoint_thumb(u16 opcode, u32 address, arm_instruction_t *instruction)
+int evaluate_breakpoint_thumb(uint16_t opcode, u32 address, arm_instruction_t *instruction)
{
u32 imm = opcode & 0xff;
@@ -1869,7 +1869,7 @@
return ERROR_OK;
}
-int evaluate_load_store_multiple_thumb(u16 opcode, u32 address, arm_instruction_t *instruction)
+int evaluate_load_store_multiple_thumb(uint16_t opcode, u32 address, arm_instruction_t *instruction)
{
u32 reg_list = opcode & 0xff;
u32 L = opcode & (1<<11);
@@ -1936,7 +1936,7 @@
return ERROR_OK;
}
-int evaluate_cond_branch_thumb(u16 opcode, u32 address, arm_instruction_t *instruction)
+int evaluate_cond_branch_thumb(uint16_t opcode, u32 address, arm_instruction_t *instruction)
{
u32 offset = opcode & 0xff;
uint8_t cond = (opcode >> 8) & 0xf;
@@ -1971,7 +1971,7 @@
return ERROR_OK;
}
-int thumb_evaluate_opcode(u16 opcode, u32 address, arm_instruction_t *instruction)
+int thumb_evaluate_opcode(uint16_t opcode, u32 address, arm_instruction_t *instruction)
{
/* clear fields, to avoid confusion */
memset(instruction, 0, sizeof(arm_instruction_t));
Modified: trunk/src/target/arm_disassembler.h
===================================================================
--- trunk/src/target/arm_disassembler.h 2009-06-18 07:07:12 UTC (rev 2276)
+++ trunk/src/target/arm_disassembler.h 2009-06-18 07:07:59 UTC (rev 2277)
@@ -195,7 +195,7 @@
} arm_instruction_t;
extern int arm_evaluate_opcode(u32 opcode, u32 address, arm_instruction_t *instruction);
-extern int thumb_evaluate_opcode(u16 opcode, u32 address, arm_instruction_t *instruction);
+extern int thumb_evaluate_opcode(uint16_t opcode, u32 address, arm_instruction_t *instruction);
extern int arm_access_size(arm_instruction_t *instruction);
#define COND(opcode) (arm_condition_strings[(opcode & 0xf0000000)>>28])
Modified: trunk/src/target/arm_jtag.c
===================================================================
--- trunk/src/target/arm_jtag.c 2009-06-18 07:07:12 UTC (rev 2276)
+++ trunk/src/target/arm_jtag.c 2009-06-18 07:07:59 UTC (rev 2277)
@@ -130,7 +130,7 @@
return ERROR_OK;
}
-/* read JTAG buffer into little-endian u16, flipping bit-order */
+/* read JTAG buffer into little-endian uint16_t, flipping bit-order */
int arm_jtag_buf_to_le16_flip(uint8_t *in_buf, void *priv, struct scan_field_s *field)
{
h_u16_to_le(((uint8_t*)priv), flip_u32(le_to_h_u32(in_buf), 32) & 0xffff);
@@ -144,7 +144,7 @@
return ERROR_OK;
}
-/* read JTAG buffer into big-endian u16, flipping bit-order */
+/* read JTAG buffer into big-endian uint16_t, flipping bit-order */
int arm_jtag_buf_to_be16_flip(uint8_t *in_buf, void *priv, struct scan_field_s *field)
{
h_u16_to_be(((uint8_t*)priv), flip_u32(le_to_h_u32(in_buf), 32) & 0xffff);
@@ -175,7 +175,7 @@
return ERROR_OK;
}
-/* read JTAG buffer into little-endian u16 */
+/* read JTAG buffer into little-endian uint16_t */
int arm_jtag_buf_to_le16(uint8_t *in_buf, void *priv, struct scan_field_s *field)
{
h_u16_to_le(((uint8_t*)priv), le_to_h_u32(in_buf) & 0xffff);
@@ -189,7 +189,7 @@
return ERROR_OK;
}
-/* read JTAG buffer into big-endian u16 */
+/* read JTAG buffer into big-endian uint16_t */
int arm_jtag_buf_to_be16(uint8_t *in_buf, void *priv, struct scan_field_s *field)
{
h_u16_to_be(((uint8_t*)priv), le_to_h_u32(in_buf) & 0xffff);
Modified: trunk/src/target/arm_simulator.c
===================================================================
--- trunk/src/target/arm_simulator.c 2009-06-18 07:07:12 UTC (rev 2276)
+++ trunk/src/target/arm_simulator.c 2009-06-18 07:07:59 UTC (rev 2277)
@@ -258,7 +258,7 @@
return 0;
}
-int thumb_pass_branch_condition(u32 cpsr, u16 opcode)
+int thumb_pass_branch_condition(u32 cpsr, uint16_t opcode)
{
return pass_condition(cpsr, (opcode & 0x0f00) << 20);
}
@@ -307,7 +307,7 @@
}
else
{
- u16 opcode;
+ uint16_t opcode;
if((retval = target_read_u16(target, current_pc, &opcode)) != ERROR_OK)
{
Modified: trunk/src/target/armv4_5.c
===================================================================
--- trunk/src/target/armv4_5.c 2009-06-18 07:07:12 UTC (rev 2276)
+++ trunk/src/target/armv4_5.c 2009-06-18 07:07:59 UTC (rev 2277)
@@ -393,7 +393,7 @@
int i;
arm_instruction_t cur_instruction;
u32 opcode;
- u16 thumb_opcode;
+ uint16_t thumb_opcode;
int thumb = 0;
if (armv4_5->common_magic != ARMV4_5_COMMON_MAGIC)
Modified: trunk/src/target/armv7m.c
===================================================================
--- trunk/src/target/armv7m.c 2009-06-18 07:07:12 UTC (rev 2276)
+++ trunk/src/target/armv7m.c 2009-06-18 07:07:59 UTC (rev 2277)
@@ -560,7 +560,7 @@
reg_param_t reg_params[2];
int retval;
- u16 cortex_m3_crc_code[] = {
+ uint16_t cortex_m3_crc_code[] = {
0x4602, /* mov r2, r0 */
0xF04F, 0x30FF, /* mov r0, #0xffffffff */
0x460B, /* mov r3, r1 */
@@ -599,8 +599,8 @@
}
/* convert flash writing code into a buffer in target endianness */
- for (i = 0; i < (sizeof(cortex_m3_crc_code)/sizeof(u16)); i++)
- if((retval = target_write_u16(target, crc_algorithm->address + i*sizeof(u16), cortex_m3_crc_code[i])) != ERROR_OK)
+ for (i = 0; i < (sizeof(cortex_m3_crc_code)/sizeof(uint16_t)); i++)
+ if((retval = target_write_u16(target, crc_algorithm->address + i*sizeof(uint16_t), cortex_m3_crc_code[i])) != ERROR_OK)
{
return retval;
}
@@ -642,7 +642,7 @@
int retval;
u32 i;
- u16 erase_check_code[] =
+ uint16_t erase_check_code[] =
{
/* loop: */
0xF810, 0x3B01, /* ldrb r3, [r0], #1 */
@@ -660,8 +660,8 @@
}
/* convert flash writing code into a buffer in target endianness */
- for (i = 0; i < (sizeof(erase_check_code)/sizeof(u16)); i++)
- target_write_u16(target, erase_check_algorithm->address + i*sizeof(u16), erase_check_code[i]);
+ for (i = 0; i < (sizeof(erase_check_code)/sizeof(uint16_t)); i++)
+ target_write_u16(target, erase_check_algorithm->address + i*sizeof(uint16_t), erase_check_code[i]);
armv7m_info.common_magic = ARMV7M_COMMON_MAGIC;
armv7m_info.core_mode = ARMV7M_MODE_ANY;
Modified: trunk/src/target/avrt.c
===================================================================
--- trunk/src/target/avrt.c 2009-06-18 07:07:12 UTC (rev 2276)
+++ trunk/src/target/avrt.c 2009-06-18 07:07:59 UTC (rev 2277)
@@ -54,8 +54,8 @@
int mcu_write_dr(jtag_tap_t *tap, uint8_t *dr_in, uint8_t *dr_out, int dr_len, int rti);
int mcu_write_ir_u8(jtag_tap_t *tap, uint8_t *ir_in, uint8_t ir_out, int ir_len, int rti);
int mcu_write_dr_u8(jtag_tap_t *tap, uint8_t *ir_in, uint8_t ir_out, int dr_len, int rti);
-int mcu_write_ir_u16(jtag_tap_t *tap, u16 *ir_in, u16 ir_out, int ir_len, int rti);
-int mcu_write_dr_u16(jtag_tap_t *tap, u16 *ir_in, u16 ir_out, int dr_len, int rti);
+int mcu_write_ir_u16(jtag_tap_t *tap, uint16_t *ir_in, uint16_t ir_out, int ir_len, int rti);
+int mcu_write_dr_u16(jtag_tap_t *tap, uint16_t *ir_in, uint16_t ir_out, int dr_len, int rti);
int mcu_write_ir_u32(jtag_tap_t *tap, u32 *ir_in, u32 ir_out, int ir_len, int rti);
int mcu_write_dr_u32(jtag_tap_t *tap, u32 *ir_in, u32 ir_out, int dr_len, int rti);
int mcu_execute_queue(void);
@@ -271,7 +271,7 @@
return ERROR_OK;
}
-int mcu_write_ir_u16(jtag_tap_t *tap, u16 *ir_in, u16 ir_out, int ir_len, int rti)
+int mcu_write_ir_u16(jtag_tap_t *tap, uint16_t *ir_in, uint16_t ir_out, int ir_len, int rti)
{
if (ir_len > 16)
{
@@ -284,7 +284,7 @@
return ERROR_OK;
}
-int mcu_write_dr_u16(jtag_tap_t *tap, u16 *dr_in, u16 dr_out, int dr_len, int rti)
+int mcu_write_dr_u16(jtag_tap_t *tap, uint16_t *dr_in, uint16_t dr_out, int dr_len, int rti)
{
if (dr_len > 16)
{
Modified: trunk/src/target/cortex_a8.c
===================================================================
--- trunk/src/target/cortex_a8.c 2009-06-18 07:07:12 UTC (rev 2276)
+++ trunk/src/target/cortex_a8.c 2009-06-18 07:07:59 UTC (rev 2277)
@@ -85,7 +85,7 @@
int cortex_a8_dcc_read(swjdp_common_t *swjdp, uint8_t *value, uint8_t *ctrl)
{
- u16 dcrdr;
+ uint16_t dcrdr;
mem_ap_read_buf_u16( swjdp, (uint8_t*)&dcrdr, 1, DCB_DCRDR);
*ctrl = (uint8_t)dcrdr;
Modified: trunk/src/target/cortex_m3.c
===================================================================
--- trunk/src/target/cortex_m3.c 2009-06-18 07:07:12 UTC (rev 2276)
+++ trunk/src/target/cortex_m3.c 2009-06-18 07:07:59 UTC (rev 2277)
@@ -1489,7 +1489,7 @@
int cortex_m3_dcc_read(swjdp_common_t *swjdp, uint8_t *value, uint8_t *ctrl)
{
- u16 dcrdr;
+ uint16_t dcrdr;
mem_ap_read_buf_u16( swjdp, (uint8_t*)&dcrdr, 1, DCB_DCRDR);
*ctrl = (uint8_t)dcrdr;
Modified: trunk/src/target/etm.h
===================================================================
--- trunk/src/target/etm.h 2009-06-18 07:07:12 UTC (rev 2276)
+++ trunk/src/target/etm.h 2009-06-18 07:07:59 UTC (rev 2277)
@@ -128,7 +128,7 @@
typedef struct etmv1_trace_data_s
{
uint8_t pipestat; /* bits 0-2 pipeline status */
- u16 packet; /* packet data (4, 8 or 16 bit) */
+ uint16_t packet; /* packet data (4, 8 or 16 bit) */
int flags; /* ETMV1_TRACESYNC_CYCLE, ETMV1_TRIGGER_CYCLE */
} etmv1_trace_data_t;
Modified: trunk/src/target/feroceon.c
===================================================================
--- trunk/src/target/feroceon.c 2009-06-18 07:07:12 UTC (rev 2276)
+++ trunk/src/target/feroceon.c 2009-06-18 07:07:59 UTC (rev 2277)
@@ -239,7 +239,7 @@
arm_jtag_t *jtag_info = &arm7_9->jtag_info;
int be = (target->endianness == TARGET_BIG_ENDIAN) ? 1 : 0;
u32 *buf_u32 = buffer;
- u16 *buf_u16 = buffer;
+ uint16_t *buf_u16 = buffer;
uint8_t *buf_u8 = buffer;
arm9tdmi_clock_out(jtag_info, ARMV4_5_STMIA(0, mask & 0xffff, 0, 0), 0, NULL, 0);
Modified: trunk/src/target/image.c
===================================================================
--- trunk/src/target/image.c 2009-06-18 07:07:12 UTC (rev 2276)
+++ trunk/src/target/image.c 2009-06-18 07:07:59 UTC (rev 2277)
@@ -236,7 +236,7 @@
}
else if (record_type == 2) /* Linear Address Record */
{
- u16 upper_address;
+ uint16_t upper_address;
sscanf(&lpszLine[bytes_read], "%4hx", &upper_address);
cal_checksum += (uint8_t)(upper_address >> 8);
@@ -276,7 +276,7 @@
}
else if (record_type == 4) /* Extended Linear Address Record */
{
- u16 upper_address;
+ uint16_t upper_address;
sscanf(&lpszLine[bytes_read], "%4hx", &upper_address);
cal_checksum += (uint8_t)(upper_address >> 8);
Modified: trunk/src/target/mips32_dmaacc.c
===================================================================
--- trunk/src/target/mips32_dmaacc.c 2009-06-18 07:07:12 UTC (rev 2276)
+++ trunk/src/target/mips32_dmaacc.c 2009-06-18 07:07:59 UTC (rev 2277)
@@ -85,7 +85,7 @@
return ERROR_OK;
}
-static int ejtag_dma_read_h(mips_ejtag_t *ejtag_info, u32 addr, u16 *data)
+static int ejtag_dma_read_h(mips_ejtag_t *ejtag_info, u32 addr, uint16_t *data)
{
u32 v;
u32 ejtag_ctrl;
@@ -356,7 +356,7 @@
case 1:
return mips32_dmaacc_read_mem8(ejtag_info, addr, count, (uint8_t*)buf);
case 2:
- return mips32_dmaacc_read_mem16(ejtag_info, addr, count, (u16*)buf);
+ return mips32_dmaacc_read_mem16(ejtag_info, addr, count, (uint16_t*)buf);
case 4:
return mips32_dmaacc_read_mem32(ejtag_info, addr, count, (u32*)buf);
}
@@ -377,7 +377,7 @@
return ERROR_OK;
}
-int mips32_dmaacc_read_mem16(mips_ejtag_t *ejtag_info, u32 addr, int count, u16 *buf)
+int mips32_dmaacc_read_mem16(mips_ejtag_t *ejtag_info, u32 addr, int count, uint16_t *buf)
{
int i;
int retval;
@@ -410,7 +410,7 @@
case 1:
return mips32_dmaacc_write_mem8(ejtag_info, addr, count, (uint8_t*)buf);
case 2:
- return mips32_dmaacc_write_mem16(ejtag_info, addr, count,(u16*)buf);
+ return mips32_dmaacc_write_mem16(ejtag_info, addr, count,(uint16_t*)buf);
case 4:
return mips32_dmaacc_write_mem32(ejtag_info, addr, count, (u32*)buf);
}
@@ -431,7 +431,7 @@
return ERROR_OK;
}
-int mips32_dmaacc_write_mem16(mips_ejtag_t *ejtag_info, u32 addr, int count, u16 *buf)
+int mips32_dmaacc_write_mem16(mips_ejtag_t *ejtag_info, u32 addr, int count, uint16_t *buf)
{
int i;
int retval;
Modified: trunk/src/target/mips32_dmaacc.h
===================================================================
--- trunk/src/target/mips32_dmaacc.h 2009-06-18 07:07:12 UTC (rev 2276)
+++ trunk/src/target/mips32_dmaacc.h 2009-06-18 07:07:59 UTC (rev 2277)
@@ -38,11 +38,11 @@
extern int mips32_dmaacc_write_mem(mips_ejtag_t *ejtag_info, u32 addr, int size, int count, void *buf);
extern int mips32_dmaacc_read_mem8(mips_ejtag_t *ejtag_info, u32 addr, int count, uint8_t *buf);
-extern int mips32_dmaacc_read_mem16(mips_ejtag_t *ejtag_info, u32 addr, int count, u16 *buf);
+extern int mips32_dmaacc_read_mem16(mips_ejtag_t *ejtag_info, u32 addr, int count, uint16_t *buf);
extern int mips32_dmaacc_read_mem32(mips_ejtag_t *ejtag_info, u32 addr, int count, u32 *buf);
extern int mips32_dmaacc_write_mem8(mips_ejtag_t *ejtag_info, u32 addr, int count, uint8_t *buf);
-extern int mips32_dmaacc_write_mem16(mips_ejtag_t *ejtag_info, u32 addr, int count, u16 *buf);
+extern int mips32_dmaacc_write_mem16(mips_ejtag_t *ejtag_info, u32 addr, int count, uint16_t *buf);
extern int mips32_dmaacc_write_mem32(mips_ejtag_t *ejtag_info, u32 addr, int count, u32 *buf);
#endif
Modified: trunk/src/target/mips32_pracc.c
===================================================================
--- trunk/src/target/mips32_pracc.c 2009-06-18 07:07:12 UTC (rev 2276)
+++ trunk/src/target/mips32_pracc.c 2009-06-18 07:07:59 UTC (rev 2277)
@@ -276,7 +276,7 @@
case 1:
return mips32_pracc_read_mem8(ejtag_info, addr, count, (uint8_t*)buf);
case 2:
- return mips32_pracc_read_mem16(ejtag_info, addr, count, (u16*)buf);
+ return mips32_pracc_read_mem16(ejtag_info, addr, count, (uint16_t*)buf);
case 4:
if(count==1)
return mips32_pracc_read_u32(ejtag_info, addr, (u32*)buf);
@@ -395,7 +395,7 @@
return retval;
}
-int mips32_pracc_read_mem16(mips_ejtag_t *ejtag_info, u32 addr, int count, u16 *buf)
+int mips32_pracc_read_mem16(mips_ejtag_t *ejtag_info, u32 addr, int count, uint16_t *buf)
{
u32 code[] = {
/* start: */
@@ -560,7 +560,7 @@
case 1:
return mips32_pracc_write_mem8(ejtag_info, addr, count, (uint8_t*)buf);
case 2:
- return mips32_pracc_write_mem16(ejtag_info, addr, count,(u16*)buf);
+ return mips32_pracc_write_mem16(ejtag_info, addr, count,(uint16_t*)buf);
case 4:
if(count==1)
return mips32_pracc_write_u32(ejtag_info, addr, (u32*)buf);
@@ -653,7 +653,7 @@
return ERROR_OK;
}
-int mips32_pracc_write_mem16(mips_ejtag_t *ejtag_info, u32 addr, int count, u16 *buf)
+int mips32_pracc_write_mem16(mips_ejtag_t *ejtag_info, u32 addr, int count, uint16_t *buf)
{
u32 code[] = {
/* start: */
Modified: trunk/src/target/mips32_pracc.h
===================================================================
--- trunk/src/target/mips32_pracc.h 2009-06-18 07:07:12 UTC (rev 2276)
+++ trunk/src/target/mips32_pracc.h 2009-06-18 07:07:59 UTC (rev 2277)
@@ -41,12 +41,12 @@
extern int mips32_pracc_write_mem(mips_ejtag_t *ejtag_info, u32 addr, int size, int count, void *buf);
extern int mips32_pracc_read_mem8(mips_ejtag_t *ejtag_info, u32 addr, int count, uint8_t *buf);
-extern int mips32_pracc_read_mem16(mips_ejtag_t *ejtag_info, u32 addr, int count, u16 *buf);
+extern int mips32_pracc_read_mem16(mips_ejtag_t *ejtag_info, u32 addr, int count, uint16_t *buf);
extern int mips32_pracc_read_mem32(mips_ejtag_t *ejtag_info, u32 addr, int count, u32 *buf);
extern int mips32_pracc_read_u32(mips_ejtag_t *ejtag_info, u32 addr, u32 *buf);
extern int mips32_pracc_write_mem8(mips_ejtag_t *ejtag_info, u32 addr, int count, uint8_t *buf);
-extern int mips32_pracc_write_mem16(mips_ejtag_t *ejtag_info, u32 addr, int count, u16 *buf);
+extern int mips32_pracc_write_mem16(mips_ejtag_t *ejtag_info, u32 addr, int count, uint16_t *buf);
extern int mips32_pracc_write_mem32(mips_ejtag_t *ejtag_info, u32 addr, int count, u32 *buf);
extern int mips32_pracc_write_u32(mips_ejtag_t *ejtag_info, u32 addr, u32 *buf);
Modified: trunk/src/target/mips_m4k.c
===================================================================
--- trunk/src/target/mips_m4k.c 2009-06-18 07:07:12 UTC (rev 2276)
+++ trunk/src/target/mips_m4k.c 2009-06-18 07:07:59 UTC (rev 2277)
@@ -552,7 +552,7 @@
}
else
{
- u16 verify = 0xffff;
+ uint16_t verify = 0xffff;
if((retval = target_read_memory(target, breakpoint->address, breakpoint->length, 1, breakpoint->orig_instr)) != ERROR_OK)
{
@@ -627,7 +627,7 @@
}
else
{
- u16 current_instr;
+ uint16_t current_instr;
/* check that user program has not modified breakpoint instruction */
if ((retval = target_read_memory(target, breakpoint->address, 2, 1, (uint8_t*)¤t_instr)) != ERROR_OK)
@@ -761,7 +761,7 @@
if (target->endianness == TARGET_BIG_ENDIAN)
{
u32 i, t32;
- u16 t16;
+ uint16_t t16;
for(i = 0; i < (count*size); i += size)
{
@@ -806,7 +806,7 @@
if (target->endianness == TARGET_BIG_ENDIAN)
{
u32 i, t32;
- u16 t16;
+ uint16_t t16;
for(i = 0; i < (count*size); i += size)
{
Modified: trunk/src/target/target.c
===================================================================
--- trunk/src/target/target.c 2009-06-18 07:07:12 UTC (rev 2276)
+++ trunk/src/target/target.c 2009-06-18 07:07:59 UTC (rev 2277)
@@ -280,8 +280,8 @@
return be_to_h_u32(buffer);
}
-/* read a u16 from a buffer in target memory endianness */
-u16 target_buffer_get_u16(target_t *target, const uint8_t *buffer)
+/* read a uint16_t from a buffer in target memory endianness */
+uint16_t target_buffer_get_u16(target_t *target, const uint8_t *buffer)
{
if (target->endianness == TARGET_LITTLE_ENDIAN)
return le_to_h_u16(buffer);
@@ -304,8 +304,8 @@
h_u32_to_be(buffer, value);
}
-/* write a u16 to a buffer in target memory endianness */
-void target_buffer_set_u16(target_t *target, uint8_t *buffer, u16 value)
+/* write a uint16_t to a buffer in target memory endianness */
+void target_buffer_set_u16(target_t *target, uint8_t *buffer, uint16_t value)
{
if (target->endianness == TARGET_LITTLE_ENDIAN)
h_u16_to_le(buffer, value);
@@ -1328,7 +1328,7 @@
return retval;
}
-int target_read_u16(struct target_s *target, u32 address, u16 *value)
+int target_read_u16(struct target_s *target, u32 address, uint16_t *value)
{
uint8_t value_buf[2];
if (!target_was_examined(target))
@@ -1396,7 +1396,7 @@
return retval;
}
-int target_write_u16(struct target_s *target, u32 address, u16 value)
+int target_write_u16(struct target_s *target, u32 address, uint16_t value)
{
int retval;
uint8_t value_buf[2];
Modified: trunk/src/target/target.h
===================================================================
--- trunk/src/target/target.h 2009-06-18 07:07:12 UTC (rev 2276)
+++ trunk/src/target/target.h 2009-06-18 07:07:59 UTC (rev 2277)
@@ -380,17 +380,17 @@
extern target_timer_callback_t *target_timer_callbacks;
extern u32 target_buffer_get_u32(target_t *target, const uint8_t *buffer);
-extern u16 target_buffer_get_u16(target_t *target, const uint8_t *buffer);
+extern uint16_t target_buffer_get_u16(target_t *target, const uint8_t *buffer);
extern uint8_t target_buffer_get_u8 (target_t *target, const uint8_t *buffer);
extern void target_buffer_set_u32(target_t *target, uint8_t *buffer, u32 value);
-extern void target_buffer_set_u16(target_t *target, uint8_t *buffer, u16 value);
+extern void target_buffer_set_u16(target_t *target, uint8_t *buffer, uint16_t value);
extern void target_buffer_set_u8 (target_t *target, uint8_t *buffer, uint8_t value);
int target_read_u32(struct target_s *target, u32 address, u32 *value);
-int target_read_u16(struct target_s *target, u32 address, u16 *value);
+int target_read_u16(struct target_s *target, u32 address, uint16_t *value);
int target_read_u8(struct target_s *target, u32 address, uint8_t *value);
int target_write_u32(struct target_s *target, u32 address, u32 value);
-int target_write_u16(struct target_s *target, u32 address, u16 value);
+int target_write_u16(struct target_s *target, u32 address, uint16_t value);
int target_write_u8(struct target_s *target, u32 address, uint8_t value);
/* Issues USER() statements with target state information */
Modi...
[truncated message content] |
|
From: <zw...@ma...> - 2009-06-18 09:07:56
|
Author: zwelch
Date: 2009-06-18 09:07:12 +0200 (Thu, 18 Jun 2009)
New Revision: 2276
Modified:
trunk/src/helper/binarybuffer.c
trunk/src/helper/binarybuffer.h
trunk/src/helper/fileio.c
trunk/src/helper/fileio.h
trunk/src/helper/types.h
trunk/src/jtag/amt_jtagaccel.c
trunk/src/jtag/arm-jtag-ew.c
trunk/src/jtag/bitbang.c
trunk/src/jtag/bitq.c
trunk/src/jtag/commands.c
trunk/src/jtag/commands.h
trunk/src/jtag/core.c
trunk/src/jtag/driver.c
trunk/src/jtag/ep93xx.c
trunk/src/jtag/ft2232.c
trunk/src/jtag/gw16012.c
trunk/src/jtag/interface.c
trunk/src/jtag/jlink.c
trunk/src/jtag/jtag.h
trunk/src/jtag/minidriver.h
trunk/src/jtag/minidummy/minidummy.c
trunk/src/jtag/parport.c
trunk/src/jtag/presto.c
trunk/src/jtag/rlink/rlink.c
trunk/src/jtag/rlink/rlink.h
trunk/src/jtag/rlink/rlink_speed_table.c
trunk/src/jtag/usbprog.c
trunk/src/jtag/vsllink.c
trunk/src/jtag/zy1000/zy1000.c
trunk/src/pld/virtex2.c
trunk/src/pld/xilinx_bit.c
trunk/src/pld/xilinx_bit.h
trunk/src/server/gdb_server.c
trunk/src/svf/svf.c
trunk/src/xsvf/xsvf.c
Log:
Transform 'u8' to 'uint8_t'
- Replace '\([^_]\)u8' with '\1uint8_t'.
- Replace '^u8' with 'uint8_t'.
Modified: trunk/src/helper/binarybuffer.c
===================================================================
--- trunk/src/helper/binarybuffer.c 2009-06-18 07:06:25 UTC (rev 2275)
+++ trunk/src/helper/binarybuffer.c 2009-06-18 07:07:12 UTC (rev 2276)
@@ -48,7 +48,7 @@
};
-u8* buf_cpy(const u8 *from, u8 *to, int size)
+uint8_t* buf_cpy(const uint8_t *from, uint8_t *to, int size)
{
unsigned int num_bytes = CEIL(size, 8);
unsigned int i;
@@ -68,7 +68,7 @@
return to;
}
-int buf_cmp(const u8 *buf1, const u8 *buf2, int size)
+int buf_cmp(const uint8_t *buf1, const uint8_t *buf2, int size)
{
int num_bytes = CEIL(size, 8);
int i;
@@ -95,7 +95,7 @@
return 0;
}
-int buf_cmp_mask(const u8 *buf1, const u8 *buf2, const u8 *mask, int size)
+int buf_cmp_mask(const uint8_t *buf1, const uint8_t *buf2, const uint8_t *mask, int size)
{
int num_bytes = CEIL(size, 8);
int i;
@@ -120,7 +120,7 @@
return 0;
}
-u8* buf_set_ones(u8 *buf, int count)
+uint8_t* buf_set_ones(uint8_t *buf, int count)
{
int num_bytes = CEIL(count, 8);
int i;
@@ -138,7 +138,7 @@
return buf;
}
-u8* buf_set_buf(const u8 *src, int src_start, u8 *dst, int dst_start, int len)
+uint8_t* buf_set_buf(const uint8_t *src, int src_start, uint8_t *dst, int dst_start, int len)
{
int src_idx = src_start, dst_idx = dst_start;
int i;
@@ -186,7 +186,7 @@
return y;
}
-char* buf_to_str(const u8 *buf, int buf_len, int radix)
+char* buf_to_str(const uint8_t *buf, int buf_len, int radix)
{
const char *DIGITS = "0123456789ABCDEF";
float factor;
@@ -225,7 +225,7 @@
for (j = str_len; j > 0; j--)
{
tmp += (u32)str[j-1] * 256;
- str[j-1] = (u8)(tmp % radix);
+ str[j-1] = (uint8_t)(tmp % radix);
tmp /= radix;
}
}
@@ -236,12 +236,12 @@
return str;
}
-int str_to_buf(const char *str, int str_len, u8 *buf, int buf_len, int radix)
+int str_to_buf(const char *str, int str_len, uint8_t *buf, int buf_len, int radix)
{
char *charbuf;
u32 tmp;
float factor;
- u8 *b256_buf;
+ uint8_t *b256_buf;
int b256_len;
int j; /* base-256 digits */
@@ -304,7 +304,7 @@
for (j = 0; j < b256_len; j++)
{
tmp += (u32)b256_buf[j] * radix;
- b256_buf[j] = (u8)(tmp & 0xFF);
+ b256_buf[j] = (uint8_t)(tmp & 0xFF);
tmp >>= 8;
}
@@ -328,7 +328,7 @@
return i;
}
-int buf_to_u32_handler(u8 *in_buf, void *priv, struct scan_field_s *field)
+int buf_to_u32_handler(uint8_t *in_buf, void *priv, struct scan_field_s *field)
{
u32 *dest = priv;
Modified: trunk/src/helper/binarybuffer.h
===================================================================
--- trunk/src/helper/binarybuffer.h 2009-06-18 07:06:25 UTC (rev 2275)
+++ trunk/src/helper/binarybuffer.h 2009-06-18 07:07:12 UTC (rev 2276)
@@ -30,7 +30,7 @@
*/
/* inlining this will help show what fn that is taking time during profiling. */
-static inline void buf_set_u32(u8* buffer, unsigned int first, unsigned int num, u32 value)
+static inline void buf_set_u32(uint8_t* buffer, unsigned int first, unsigned int num, u32 value)
{
if ((num==32)&&(first==0))
{
@@ -51,7 +51,7 @@
}
}
}
-static inline u32 buf_get_u32(const u8* buffer, unsigned int first, unsigned int num)
+static inline u32 buf_get_u32(const uint8_t* buffer, unsigned int first, unsigned int num)
{
if ((num==32)&&(first==0))
{
@@ -73,23 +73,23 @@
extern u32 flip_u32(u32 value, unsigned int num);
-extern int buf_cmp(const u8 *buf1, const u8 *buf2, int size);
-extern int buf_cmp_mask(const u8 *buf1, const u8 *buf2, const u8 *mask, int size);
-extern u8* buf_cpy(const u8 *from, u8 *to, int size);
+extern int buf_cmp(const uint8_t *buf1, const uint8_t *buf2, int size);
+extern int buf_cmp_mask(const uint8_t *buf1, const uint8_t *buf2, const uint8_t *mask, int size);
+extern uint8_t* buf_cpy(const uint8_t *from, uint8_t *to, int size);
-extern u8* buf_set_ones(u8 *buf, int count);
-extern u8* buf_set_buf(const u8 *src, int src_start, u8 *dst, int dst_start, int len);
+extern uint8_t* buf_set_ones(uint8_t *buf, int count);
+extern uint8_t* buf_set_buf(const uint8_t *src, int src_start, uint8_t *dst, int dst_start, int len);
-extern int str_to_buf(const char *str, int len, u8 *bin_buf, int buf_size, int radix);
-extern char* buf_to_str(const u8 *buf, int size, int radix);
+extern int str_to_buf(const char *str, int len, uint8_t *bin_buf, int buf_size, int radix);
+extern char* buf_to_str(const uint8_t *buf, int size, int radix);
struct scan_field_s;
-extern int buf_to_u32_handler(u8 *in_buf, void *priv, struct scan_field_s *field);
+extern int buf_to_u32_handler(uint8_t *in_buf, void *priv, struct scan_field_s *field);
#define CEIL(m, n) ((m + n - 1) / n)
/* read a u32 from a buffer in target memory endianness */
-static inline u32 fast_target_buffer_get_u32(const u8 *buffer, int little)
+static inline u32 fast_target_buffer_get_u32(const uint8_t *buffer, int little)
{
if (little)
return le_to_h_u32(buffer);
Modified: trunk/src/helper/fileio.c
===================================================================
--- trunk/src/helper/fileio.c 2009-06-18 07:06:25 UTC (rev 2275)
+++ trunk/src/helper/fileio.c 2009-06-18 07:07:12 UTC (rev 2276)
@@ -155,21 +155,21 @@
return ERROR_OK;
}
-static inline int fileio_local_read(fileio_t *fileio, u32 size, u8 *buffer, u32 *size_read)
+static inline int fileio_local_read(fileio_t *fileio, u32 size, uint8_t *buffer, u32 *size_read)
{
*size_read = fread(buffer, 1, size, fileio->file);
return ERROR_OK;
}
-int fileio_read(fileio_t *fileio, u32 size, u8 *buffer, u32 *size_read)
+int fileio_read(fileio_t *fileio, u32 size, uint8_t *buffer, u32 *size_read)
{
return fileio_local_read(fileio, size, buffer, size_read);
}
int fileio_read_u32(fileio_t *fileio, u32 *data)
{
- u8 buf[4];
+ uint8_t buf[4];
u32 size_read;
int retval;
@@ -193,14 +193,14 @@
return fileio_local_fgets(fileio, size, buffer);
}
-static inline int fileio_local_write(fileio_t *fileio, u32 size, const u8 *buffer, u32 *size_written)
+static inline int fileio_local_write(fileio_t *fileio, u32 size, const uint8_t *buffer, u32 *size_written)
{
*size_written = fwrite(buffer, 1, size, fileio->file);
return ERROR_OK;
}
-int fileio_write(fileio_t *fileio, u32 size, const u8 *buffer, u32 *size_written)
+int fileio_write(fileio_t *fileio, u32 size, const uint8_t *buffer, u32 *size_written)
{
int retval;
@@ -214,7 +214,7 @@
int fileio_write_u32(fileio_t *fileio, u32 data)
{
- u8 buf[4];
+ uint8_t buf[4];
u32 size_written;
int retval;
Modified: trunk/src/helper/fileio.h
===================================================================
--- trunk/src/helper/fileio.h 2009-06-18 07:06:25 UTC (rev 2275)
+++ trunk/src/helper/fileio.h 2009-06-18 07:07:12 UTC (rev 2276)
@@ -54,8 +54,8 @@
FILE *file;
} fileio_t;
-extern int fileio_write(fileio_t *fileio, u32 size, const u8 *buffer, u32 *size_written);
-extern int fileio_read(fileio_t *fileio, u32 size, u8 *buffer, u32 *size_read);
+extern int fileio_write(fileio_t *fileio, u32 size, const uint8_t *buffer, u32 *size_written);
+extern int fileio_read(fileio_t *fileio, u32 size, uint8_t *buffer, u32 *size_read);
extern int fileio_fgets(fileio_t *fileio, u32 size, char *buffer);
extern int fileio_seek(fileio_t *fileio, u32 position);
extern int fileio_close(fileio_t *fileio);
Modified: trunk/src/helper/types.h
===================================================================
--- trunk/src/helper/types.h 2009-06-18 07:06:25 UTC (rev 2275)
+++ trunk/src/helper/types.h 2009-06-18 07:07:12 UTC (rev 2276)
@@ -30,8 +30,8 @@
#include <stdint.h>
#endif
-#ifndef u8
-typedef unsigned char u8;
+#ifndef uint8_t
+typedef unsigned char uint8_t;
#endif
#ifndef u16
@@ -88,52 +88,52 @@
*/
-static inline u32 le_to_h_u32(const u8* buf)
+static inline u32 le_to_h_u32(const uint8_t* buf)
{
return (u32)(buf[0] | buf[1] << 8 | buf[2] << 16 | buf[3] << 24);
}
-static inline u16 le_to_h_u16(const u8* buf)
+static inline u16 le_to_h_u16(const uint8_t* buf)
{
return (u16)(buf[0] | buf[1] << 8);
}
-static inline u32 be_to_h_u32(const u8* buf)
+static inline u32 be_to_h_u32(const uint8_t* buf)
{
return (u32)(buf[3] | buf[2] << 8 | buf[1] << 16 | buf[0] << 24);
}
-static inline u16 be_to_h_u16(const u8* buf)
+static inline u16 be_to_h_u16(const uint8_t* buf)
{
return (u16)(buf[1] | buf[0] << 8);
}
-static inline void h_u32_to_le(u8* buf, int val)
+static inline void h_u32_to_le(uint8_t* buf, int val)
{
- buf[3] = (u8) (val >> 24);
- buf[2] = (u8) (val >> 16);
- buf[1] = (u8) (val >> 8);
- buf[0] = (u8) (val >> 0);
+ buf[3] = (uint8_t) (val >> 24);
+ buf[2] = (uint8_t) (val >> 16);
+ buf[1] = (uint8_t) (val >> 8);
+ buf[0] = (uint8_t) (val >> 0);
}
-static inline void h_u32_to_be(u8* buf, int val)
+static inline void h_u32_to_be(uint8_t* buf, int val)
{
- buf[0] = (u8) (val >> 24);
- buf[1] = (u8) (val >> 16);
- buf[2] = (u8) (val >> 8);
- buf[3] = (u8) (val >> 0);
+ buf[0] = (uint8_t) (val >> 24);
+ buf[1] = (uint8_t) (val >> 16);
+ buf[2] = (uint8_t) (val >> 8);
+ buf[3] = (uint8_t) (val >> 0);
}
-static inline void h_u16_to_le(u8* buf, int val)
+static inline void h_u16_to_le(uint8_t* buf, int val)
{
- buf[1] = (u8) (val >> 8);
- buf[0] = (u8) (val >> 0);
+ buf[1] = (uint8_t) (val >> 8);
+ buf[0] = (uint8_t) (val >> 0);
}
-static inline void h_u16_to_be(u8* buf, int val)
+static inline void h_u16_to_be(uint8_t* buf, int val)
{
- buf[0] = (u8) (val >> 8);
- buf[1] = (u8) (val >> 0);
+ buf[0] = (uint8_t) (val >> 8);
+ buf[1] = (uint8_t) (val >> 0);
}
#ifdef __ECOS
Modified: trunk/src/jtag/amt_jtagaccel.c
===================================================================
--- trunk/src/jtag/amt_jtagaccel.c 2009-06-18 07:06:25 UTC (rev 2275)
+++ trunk/src/jtag/amt_jtagaccel.c 2009-06-18 07:07:12 UTC (rev 2276)
@@ -46,9 +46,9 @@
/* interface variables
*/
-static u8 aw_control_rst = 0x00;
-static u8 aw_control_fsm = 0x10;
-static u8 aw_control_baudrate = 0x20;
+static uint8_t aw_control_rst = 0x00;
+static uint8_t aw_control_fsm = 0x10;
+static uint8_t aw_control_baudrate = 0x20;
static int rtck_enabled = 0;
@@ -89,7 +89,7 @@
* 4: Shift-IR
* 5: Pause-IR
*/
-static u8 amt_jtagaccel_tap_move[6][6][2] =
+static uint8_t amt_jtagaccel_tap_move[6][6][2] =
{
/* RESET IDLE DRSHIFT DRPAUSE IRSHIFT IRPAUSE */
{{0x1f, 0x00}, {0x0f, 0x00}, {0x8a, 0x04}, {0x0a, 0x00}, {0x06, 0x00}, {0x96, 0x00}}, /* RESET */
@@ -161,7 +161,7 @@
static void amt_wait_scan_busy(void)
{
int timeout = 4096;
- u8 ar_status;
+ uint8_t ar_status;
AMT_AR(ar_status);
while (((ar_status) & 0x80) && (timeout-- > 0))
@@ -176,8 +176,8 @@
static void amt_jtagaccel_state_move(void)
{
- u8 aw_scan_tms_5;
- u8 tms_scan[2];
+ uint8_t aw_scan_tms_5;
+ uint8_t tms_scan[2];
tap_state_t cur_state = tap_get_state();
tap_state_t end_state = tap_get_end_state();
@@ -205,8 +205,8 @@
static void amt_jtagaccel_runtest(int num_cycles)
{
int i = 0;
- u8 aw_scan_tms_5;
- u8 aw_scan_tms_1to4;
+ uint8_t aw_scan_tms_5;
+ uint8_t aw_scan_tms_1to4;
tap_state_t saved_end_state = tap_get_end_state();
@@ -235,16 +235,16 @@
amt_jtagaccel_state_move();
}
-static void amt_jtagaccel_scan(bool ir_scan, enum scan_type type, u8 *buffer, int scan_size)
+static void amt_jtagaccel_scan(bool ir_scan, enum scan_type type, uint8_t *buffer, int scan_size)
{
int bits_left = scan_size;
int bit_count = 0;
tap_state_t saved_end_state = tap_get_end_state();
- u8 aw_tdi_option;
- u8 dw_tdi_scan;
- u8 dr_tdo;
- u8 aw_tms_scan;
- u8 tms_scan[2];
+ uint8_t aw_tdi_option;
+ uint8_t dw_tdi_scan;
+ uint8_t dr_tdo;
+ uint8_t aw_tms_scan;
+ uint8_t tms_scan[2];
int jtag_speed = jtag_get_speed();
if (ir_scan)
@@ -323,7 +323,7 @@
jtag_command_t *cmd = jtag_command_queue; /* currently processed command */
int scan_size;
enum scan_type type;
- u8 *buffer;
+ uint8_t *buffer;
int retval;
/* return ERROR_OK, unless a jtag_read_buffer returns a failed check
@@ -419,11 +419,11 @@
#if PARPORT_USE_PPDEV == 1
char buffer[256];
int i = 0;
- u8 control_port;
+ uint8_t control_port;
#else
- u8 status_port;
+ uint8_t status_port;
#endif
- u8 ar_status;
+ uint8_t ar_status;
#if PARPORT_USE_PPDEV == 1
if (device_handle > 0)
Modified: trunk/src/jtag/arm-jtag-ew.c
===================================================================
--- trunk/src/jtag/arm-jtag-ew.c 2009-06-18 07:06:25 UTC (rev 2275)
+++ trunk/src/jtag/arm-jtag-ew.c 2009-06-18 07:07:12 UTC (rev 2276)
@@ -54,8 +54,8 @@
#define CMD_TGPWR_SETUP 0x22
/* Global USB buffers */
-static u8 usb_in_buffer[ARMJTAGEW_IN_BUFFER_SIZE];
-static u8 usb_out_buffer[ARMJTAGEW_OUT_BUFFER_SIZE];
+static uint8_t usb_in_buffer[ARMJTAGEW_IN_BUFFER_SIZE];
+static uint8_t usb_out_buffer[ARMJTAGEW_OUT_BUFFER_SIZE];
/* External interface functions */
static int armjtagew_execute_queue(void);
@@ -73,9 +73,9 @@
static void armjtagew_state_move(void);
static void armjtagew_path_move(int num_states, tap_state_t *path);
static void armjtagew_runtest(int num_cycles);
-static void armjtagew_scan(bool ir_scan, enum scan_type type, u8 *buffer, int scan_size, scan_command_t *command);
+static void armjtagew_scan(bool ir_scan, enum scan_type type, uint8_t *buffer, int scan_size, scan_command_t *command);
static void armjtagew_reset(int trst, int srst);
-//static void armjtagew_simple_command(u8 command);
+//static void armjtagew_simple_command(uint8_t command);
static int armjtagew_get_status(void);
/* tap buffer functions */
@@ -83,7 +83,7 @@
static int armjtagew_tap_execute(void);
static void armjtagew_tap_ensure_space(int scans, int bits);
static void armjtagew_tap_append_step(int tms, int tdi);
-static void armjtagew_tap_append_scan(int length, u8 *buffer, scan_command_t *command);
+static void armjtagew_tap_append_scan(int length, uint8_t *buffer, scan_command_t *command);
/* ARM-JTAG-EW lowlevel functions */
typedef struct armjtagew_jtag
@@ -101,7 +101,7 @@
static int armjtagew_get_version_info(void);
#ifdef _DEBUG_USB_COMMS_
-static void armjtagew_debug_buffer(u8 *buffer, int length);
+static void armjtagew_debug_buffer(uint8_t *buffer, int length);
#endif
static armjtagew_jtag_t* armjtagew_jtag_handle;
@@ -128,7 +128,7 @@
jtag_command_t *cmd = jtag_command_queue;
int scan_size;
enum scan_type type;
- u8 *buffer;
+ uint8_t *buffer;
while (cmd != NULL)
{
@@ -315,7 +315,7 @@
{
int i;
int tms = 0;
- u8 tms_scan = tap_get_tms_path(tap_get_state(), tap_get_end_state());
+ uint8_t tms_scan = tap_get_tms_path(tap_get_state(), tap_get_end_state());
int tms_count = tap_get_tms_path_len(tap_get_state(), tap_get_end_state());
for (i = 0; i < tms_count; i++)
@@ -385,7 +385,7 @@
}
}
-static void armjtagew_scan(bool ir_scan, enum scan_type type, u8 *buffer, int scan_size, scan_command_t *command)
+static void armjtagew_scan(bool ir_scan, enum scan_type type, uint8_t *buffer, int scan_size, scan_command_t *command)
{
tap_state_t saved_end_state;
@@ -415,11 +415,11 @@
static void armjtagew_reset(int trst, int srst)
{
- const u8 trst_mask = (1u<<5);
- const u8 srst_mask = (1u<<6);
- u8 val = 0;
- u8 outp_en = 0;
- u8 change_mask = 0;
+ const uint8_t trst_mask = (1u<<5);
+ const uint8_t srst_mask = (1u<<6);
+ uint8_t val = 0;
+ uint8_t outp_en = 0;
+ uint8_t change_mask = 0;
int result;
LOG_DEBUG("trst: %i, srst: %i", trst, srst);
@@ -541,16 +541,16 @@
#define ARMJTAGEW_TAP_BUFFER_SIZE 2048
static int tap_length;
-static u8 tms_buffer[ARMJTAGEW_TAP_BUFFER_SIZE];
-static u8 tdi_buffer[ARMJTAGEW_TAP_BUFFER_SIZE];
-static u8 tdo_buffer[ARMJTAGEW_TAP_BUFFER_SIZE];
+static uint8_t tms_buffer[ARMJTAGEW_TAP_BUFFER_SIZE];
+static uint8_t tdi_buffer[ARMJTAGEW_TAP_BUFFER_SIZE];
+static uint8_t tdo_buffer[ARMJTAGEW_TAP_BUFFER_SIZE];
typedef struct
{
int first; /* First bit position in tdo_buffer to read */
int length; /* Number of bits to read */
scan_command_t *command; /* Corresponding scan command */
- u8 *buffer;
+ uint8_t *buffer;
} pending_scan_result_t;
#define MAX_PENDING_SCAN_RESULTS 256
@@ -585,7 +585,7 @@
if (index < ARMJTAGEW_TAP_BUFFER_SIZE)
{
int bit_index = tap_length % 8;
- u8 bit = 1 << bit_index;
+ uint8_t bit = 1 << bit_index;
if (tms)
{
@@ -613,7 +613,7 @@
}
}
-void armjtagew_tap_append_scan(int length, u8 *buffer, scan_command_t *command)
+void armjtagew_tap_append_scan(int length, uint8_t *buffer, scan_command_t *command)
{
pending_scan_result_t *pending_scan_result = &pending_scan_results_buffer[pending_scan_results_length];
int i;
@@ -687,7 +687,7 @@
for (i = 0; i < pending_scan_results_length; i++)
{
pending_scan_result_t *pending_scan_result = &pending_scan_results_buffer[i];
- u8 *buffer = pending_scan_result->buffer;
+ uint8_t *buffer = pending_scan_result->buffer;
int length = pending_scan_result->length;
int first = pending_scan_result->first;
scan_command_t *command = pending_scan_result->command;
@@ -845,7 +845,7 @@
#ifdef _DEBUG_USB_COMMS_
#define BYTES_PER_LINE 16
-static void armjtagew_debug_buffer(u8 *buffer, int length)
+static void armjtagew_debug_buffer(uint8_t *buffer, int length)
{
char line[81];
char s[4];
Modified: trunk/src/jtag/bitbang.c
===================================================================
--- trunk/src/jtag/bitbang.c 2009-06-18 07:06:25 UTC (rev 2275)
+++ trunk/src/jtag/bitbang.c 2009-06-18 07:07:12 UTC (rev 2276)
@@ -77,7 +77,7 @@
static void bitbang_state_move(int skip)
{
int i=0, tms=0;
- u8 tms_scan = tap_get_tms_path(tap_get_state(), tap_get_end_state());
+ uint8_t tms_scan = tap_get_tms_path(tap_get_state(), tap_get_end_state());
int tms_count = tap_get_tms_path_len(tap_get_state(), tap_get_end_state());
for (i = skip; i < tms_count; i++)
@@ -170,7 +170,7 @@
-static void bitbang_scan(bool ir_scan, enum scan_type type, u8 *buffer, int scan_size)
+static void bitbang_scan(bool ir_scan, enum scan_type type, uint8_t *buffer, int scan_size)
{
tap_state_t saved_end_state = tap_get_end_state();
int bit_cnt;
@@ -233,7 +233,7 @@
jtag_command_t *cmd = jtag_command_queue; /* currently processed command */
int scan_size;
enum scan_type type;
- u8 *buffer;
+ uint8_t *buffer;
int retval;
if (!bitbang_interface)
Modified: trunk/src/jtag/bitq.c
===================================================================
--- trunk/src/jtag/bitq.c 2009-06-18 07:06:25 UTC (rev 2275)
+++ trunk/src/jtag/bitq.c 2009-06-18 07:07:12 UTC (rev 2276)
@@ -29,7 +29,7 @@
static bitq_state_t bitq_in_state; /* state of input queue */
-static u8* bitq_in_buffer; /* buffer dynamically reallocated as needed */
+static uint8_t* bitq_in_buffer; /* buffer dynamically reallocated as needed */
static int bitq_in_bufsize = 32; /* min. buffer size */
/*
@@ -40,9 +40,9 @@
void bitq_in_proc(void)
{
/* static information preserved between calls to increase performance */
- static u8* in_buff; /* pointer to buffer for scanned data */
+ static uint8_t* in_buff; /* pointer to buffer for scanned data */
static int in_idx; /* index of byte being scanned */
- static u8 in_mask; /* mask of next bit to be scanned */
+ static uint8_t in_mask; /* mask of next bit to be scanned */
scan_field_t* field;
int tdo;
@@ -150,7 +150,7 @@
void bitq_state_move(tap_state_t new_state)
{
int i = 0;
- u8 tms_scan;
+ uint8_t tms_scan;
if (!tap_is_state_stable(tap_get_state()) || !tap_is_state_stable(new_state))
{
@@ -218,8 +218,8 @@
int bit_cnt;
int tdo_req;
- u8* out_ptr;
- u8 out_mask;
+ uint8_t* out_ptr;
+ uint8_t out_mask;
if (field->in_value)
tdo_req = 1;
Modified: trunk/src/jtag/commands.c
===================================================================
--- trunk/src/jtag/commands.c 2009-06-18 07:06:25 UTC (rev 2275)
+++ trunk/src/jtag/commands.c 2009-06-18 07:07:12 UTC (rev 2276)
@@ -64,7 +64,7 @@
{
cmd_queue_page_t **p_page = &cmd_queue_pages;
int offset;
- u8 *t;
+ uint8_t *t;
/*
* WARNING:
@@ -117,7 +117,7 @@
offset = (*p_page)->used;
(*p_page)->used += size;
- t=(u8 *)((*p_page)->address);
+ t=(uint8_t *)((*p_page)->address);
return t + offset;
}
@@ -174,7 +174,7 @@
return bit_count;
}
-int jtag_build_buffer(const scan_command_t *cmd, u8 **buffer)
+int jtag_build_buffer(const scan_command_t *cmd, uint8_t **buffer)
{
int bit_count = 0;
int i;
@@ -218,7 +218,7 @@
return bit_count;
}
-int jtag_read_buffer(u8 *buffer, const scan_command_t *cmd)
+int jtag_read_buffer(uint8_t *buffer, const scan_command_t *cmd)
{
int i;
int bit_count = 0;
@@ -235,7 +235,7 @@
if (cmd->fields[i].in_value)
{
int num_bits = cmd->fields[i].num_bits;
- u8 *captured = buf_set_buf(buffer, bit_count, malloc(CEIL(num_bits, 8)), 0, num_bits);
+ uint8_t *captured = buf_set_buf(buffer, bit_count, malloc(CEIL(num_bits, 8)), 0, num_bits);
#ifdef _DEBUG_JTAG_IO_
char *char_buf = buf_to_str(captured, (num_bits > DEBUG_JTAG_IOZ) ? DEBUG_JTAG_IOZ : num_bits, 16);
Modified: trunk/src/jtag/commands.h
===================================================================
--- trunk/src/jtag/commands.h 2009-06-18 07:06:25 UTC (rev 2275)
+++ trunk/src/jtag/commands.h 2009-06-18 07:07:12 UTC (rev 2276)
@@ -156,7 +156,7 @@
enum scan_type jtag_scan_type(const scan_command_t* cmd);
int jtag_scan_size(const scan_command_t* cmd);
-int jtag_read_buffer(u8* buffer, const scan_command_t* cmd);
-int jtag_build_buffer(const scan_command_t* cmd, u8** buffer);
+int jtag_read_buffer(uint8_t* buffer, const scan_command_t* cmd);
+int jtag_build_buffer(const scan_command_t* cmd, uint8_t** buffer);
#endif // JTAG_COMMANDS_H
Modified: trunk/src/jtag/core.c
===================================================================
--- trunk/src/jtag/core.c 2009-06-18 07:06:25 UTC (rev 2275)
+++ trunk/src/jtag/core.c 2009-06-18 07:07:12 UTC (rev 2276)
@@ -353,23 +353,23 @@
jtag_set_error(retval);
}
-void jtag_add_callback(jtag_callback1_t f, u8 *in)
+void jtag_add_callback(jtag_callback1_t f, uint8_t *in)
{
interface_jtag_add_callback(f, in);
}
-void jtag_add_callback4(jtag_callback_t f, u8 *in,
+void jtag_add_callback4(jtag_callback_t f, uint8_t *in,
jtag_callback_data_t data1, jtag_callback_data_t data2,
jtag_callback_data_t data3)
{
interface_jtag_add_callback4(f, in, data1, data2, data3);
}
-int jtag_check_value_inner(u8 *captured, u8 *in_check_value, u8 *in_check_mask, int num_bits);
+int jtag_check_value_inner(uint8_t *captured, uint8_t *in_check_value, uint8_t *in_check_mask, int num_bits);
-static int jtag_check_value_mask_callback(u8 *in, jtag_callback_data_t data1, jtag_callback_data_t data2, jtag_callback_data_t data3)
+static int jtag_check_value_mask_callback(uint8_t *in, jtag_callback_data_t data1, jtag_callback_data_t data2, jtag_callback_data_t data3)
{
- return jtag_check_value_inner(in, (u8 *)data1, (u8 *)data2, (int)data3);
+ return jtag_check_value_inner(in, (uint8_t *)data1, (uint8_t *)data2, (int)data3);
}
static void jtag_add_scan_check(void (*jtag_add_scan)(int in_num_fields, const scan_field_t *in_fields, tap_state_t state),
@@ -693,7 +693,7 @@
jtag_set_error(interface_jtag_add_sleep(us));
}
-int jtag_check_value_inner(u8 *captured, u8 *in_check_value, u8 *in_check_mask, int num_bits)
+int jtag_check_value_inner(uint8_t *captured, uint8_t *in_check_value, uint8_t *in_check_mask, int num_bits)
{
int retval = ERROR_OK;
@@ -742,7 +742,7 @@
return retval;
}
-void jtag_check_value_mask(scan_field_t *field, u8 *value, u8 *mask)
+void jtag_check_value_mask(scan_field_t *field, uint8_t *value, uint8_t *mask)
{
assert(field->in_value != NULL);
@@ -819,7 +819,7 @@
#define EXTRACT_PART(X) (((X) & 0xffff000) >> 12)
#define EXTRACT_VER(X) (((X) & 0xf0000000) >> 28)
-static int jtag_examine_chain_execute(u8 *idcode_buffer, unsigned num_idcode)
+static int jtag_examine_chain_execute(uint8_t *idcode_buffer, unsigned num_idcode)
{
scan_field_t field = {
.tap = NULL,
@@ -836,10 +836,10 @@
return jtag_execute_queue();
}
-static bool jtag_examine_chain_check(u8 *idcodes, unsigned count)
+static bool jtag_examine_chain_check(uint8_t *idcodes, unsigned count)
{
- u8 zero_check = 0x0;
- u8 one_check = 0xff;
+ uint8_t zero_check = 0x0;
+ uint8_t one_check = 0xff;
for (unsigned i = 0; i < count * 4; i++)
{
@@ -879,7 +879,7 @@
* read back correctly. This can help identify and diagnose problems
* with the JTAG chain earlier, gives more helpful/explicit error messages.
*/
-static void jtag_examine_chain_end(u8 *idcodes, unsigned count, unsigned max)
+static void jtag_examine_chain_end(uint8_t *idcodes, unsigned count, unsigned max)
{
bool triggered = false;
for ( ; count < max - 31; count += 32)
@@ -907,7 +907,7 @@
}
/* Loop over the expected identification codes and test for a match */
- u8 ii;
+ uint8_t ii;
for (ii = 0; ii < tap->expected_ids_cnt; ii++)
{
if (tap->idcode == tap->expected_ids[ii])
@@ -937,7 +937,7 @@
*/
int jtag_examine_chain(void)
{
- u8 idcode_buffer[JTAG_MAX_CHAIN_SIZE * 4];
+ uint8_t idcode_buffer[JTAG_MAX_CHAIN_SIZE * 4];
unsigned device_count = 0;
jtag_examine_chain_execute(idcode_buffer, JTAG_MAX_CHAIN_SIZE);
@@ -1015,7 +1015,7 @@
{
jtag_tap_t *tap;
int total_ir_length = 0;
- u8 *ir_test = NULL;
+ uint8_t *ir_test = NULL;
scan_field_t field;
int chain_pos = 0;
Modified: trunk/src/jtag/driver.c
===================================================================
--- trunk/src/jtag/driver.c 2009-06-18 07:06:25 UTC (rev 2275)
+++ trunk/src/jtag/driver.c 2009-06-18 07:07:12 UTC (rev 2276)
@@ -40,7 +40,7 @@
struct jtag_callback_entry *next;
jtag_callback_t callback;
- u8 *in;
+ uint8_t *in;
jtag_callback_data_t data1;
jtag_callback_data_t data2;
jtag_callback_data_t data3;
@@ -311,7 +311,7 @@
for (int j = 0; j < in_num_fields; j++)
{
- u8 out_value[4];
+ uint8_t out_value[4];
size_t scan_size = num_bits[j];
buf_set_u32(out_value, 0, scan_size, value[j]);
@@ -465,7 +465,7 @@
}
/* add callback to end of queue */
-void interface_jtag_add_callback4(jtag_callback_t callback, u8 *in, jtag_callback_data_t data1, jtag_callback_data_t data2, jtag_callback_data_t data3)
+void interface_jtag_add_callback4(jtag_callback_t callback, uint8_t *in, jtag_callback_data_t data1, jtag_callback_data_t data2, jtag_callback_data_t data3)
{
struct jtag_callback_entry *entry=cmd_queue_alloc(sizeof(struct jtag_callback_entry));
@@ -507,13 +507,13 @@
return retval;
}
-static int jtag_convert_to_callback4(u8 *in, jtag_callback_data_t data1, jtag_callback_data_t data2, jtag_callback_data_t data3)
+static int jtag_convert_to_callback4(uint8_t *in, jtag_callback_data_t data1, jtag_callback_data_t data2, jtag_callback_data_t data3)
{
((jtag_callback1_t)data1)(in);
return ERROR_OK;
}
-void interface_jtag_add_callback(jtag_callback1_t callback, u8 *in)
+void interface_jtag_add_callback(jtag_callback1_t callback, uint8_t *in)
{
jtag_add_callback4(jtag_convert_to_callback4, in, (jtag_callback_data_t)callback, 0, 0);
}
Modified: trunk/src/jtag/ep93xx.c
===================================================================
--- trunk/src/jtag/ep93xx.c 2009-06-18 07:06:25 UTC (rev 2275)
+++ trunk/src/jtag/ep93xx.c 2009-06-18 07:07:12 UTC (rev 2276)
@@ -34,11 +34,11 @@
#include <sys/mman.h>
-static u8 output_value = 0x0;
+static uint8_t output_value = 0x0;
static int dev_mem_fd;
static void *gpio_controller;
-static volatile u8 *gpio_data_register;
-static volatile u8 *gpio_data_direction_register;
+static volatile uint8_t *gpio_data_register;
+static volatile uint8_t *gpio_data_direction_register;
/* low level command set
*/
Modified: trunk/src/jtag/ft2232.c
===================================================================
--- trunk/src/jtag/ft2232.c 2009-06-18 07:06:25 UTC (rev 2275)
+++ trunk/src/jtag/ft2232.c 2009-06-18 07:07:12 UTC (rev 2276)
@@ -101,7 +101,7 @@
static char* ft2232_device_desc = NULL;
static char* ft2232_serial = NULL;
static char* ft2232_layout = NULL;
-static u8 ft2232_latency = 2;
+static uint8_t ft2232_latency = 2;
static unsigned ft2232_max_tck = 6000;
@@ -168,13 +168,13 @@
{ NULL, NULL, NULL, NULL },
};
-static u8 nTRST, nTRSTnOE, nSRST, nSRSTnOE;
+static uint8_t nTRST, nTRSTnOE, nSRST, nSRSTnOE;
static const ft2232_layout_t *layout;
-static u8 low_output = 0x0;
-static u8 low_direction = 0x0;
-static u8 high_output = 0x0;
-static u8 high_direction = 0x0;
+static uint8_t low_output = 0x0;
+static uint8_t low_direction = 0x0;
+static uint8_t high_output = 0x0;
+static uint8_t high_direction = 0x0;
#if BUILD_FT2232_FTD2XX == 1
static FT_HANDLE ftdih = NULL;
@@ -203,7 +203,7 @@
#define FT2232_BUFFER_SIZE 131072
-static u8* ft2232_buffer = NULL;
+static uint8_t* ft2232_buffer = NULL;
static int ft2232_buffer_size = 0;
static int ft2232_read_pointer = 0;
static int ft2232_expect_read = 0;
@@ -213,7 +213,7 @@
* writes a byte into the byte buffer, "ft2232_buffer", which must be sent later.
* @param val is the byte to send.
*/
-static inline void buffer_write(u8 val)
+static inline void buffer_write(uint8_t val)
{
assert(ft2232_buffer);
assert((unsigned) ft2232_buffer_size < (unsigned) FT2232_BUFFER_SIZE);
@@ -224,7 +224,7 @@
* Function buffer_read
* returns a byte from the byte buffer.
*/
-static inline u8 buffer_read(void)
+static inline uint8_t buffer_read(void)
{
assert(ft2232_buffer);
assert(ft2232_read_pointer < ft2232_buffer_size);
@@ -249,9 +249,9 @@
*
* See the MPSSE spec referenced above.
*/
-static void clock_tms(u8 mpsse_cmd, int tms_bits, int tms_count, bool tdi_bit)
+static void clock_tms(uint8_t mpsse_cmd, int tms_bits, int tms_count, bool tdi_bit)
{
- u8 tms_byte;
+ uint8_t tms_byte;
int i;
int tms_ndx; /* bit index into tms_byte */
@@ -338,7 +338,7 @@
.quit = ft2232_quit,
};
-static int ft2232_write(u8* buf, int size, u32* bytes_written)
+static int ft2232_write(uint8_t* buf, int size, u32* bytes_written)
{
#if BUILD_FT2232_FTD2XX == 1
FT_STATUS status;
@@ -371,7 +371,7 @@
}
-static int ft2232_read(u8* buf, u32 size, u32* bytes_read)
+static int ft2232_read(uint8_t* buf, u32 size, u32* bytes_read)
{
#if BUILD_FT2232_FTD2XX == 1
DWORD dw_bytes_read;
@@ -438,7 +438,7 @@
}
}
- u8 buf = use_adaptive_clocking ? 0x96 : 0x97;
+ uint8_t buf = use_adaptive_clocking ? 0x96 : 0x97;
LOG_DEBUG("%2.2x", buf);
u32 bytes_written;
@@ -461,7 +461,7 @@
static int ft2232_speed(int speed)
{
- u8 buf[3];
+ uint8_t buf[3];
int retval;
u32 bytes_written;
@@ -569,7 +569,7 @@
}
}
-static void ft2232_read_scan(enum scan_type type, u8* buffer, int scan_size)
+static void ft2232_read_scan(enum scan_type type, uint8_t* buffer, int scan_size)
{
int num_bytes = (scan_size + 7) / 8;
int bits_left = scan_size;
@@ -617,7 +617,7 @@
static int ft2232_send_and_recv(jtag_command_t* first, jtag_command_t* last)
{
jtag_command_t* cmd;
- u8* buffer;
+ uint8_t* buffer;
int scan_size;
enum scan_type type;
int retval;
@@ -775,7 +775,7 @@
}
-static void ft2232_add_scan(bool ir_scan, enum scan_type type, u8* buffer, int scan_size)
+static void ft2232_add_scan(bool ir_scan, enum scan_type type, uint8_t* buffer, int scan_size)
{
int num_bytes = (scan_size + 7) / 8;
int bits_left = scan_size;
@@ -823,8 +823,8 @@
thisrun_bytes = (num_bytes > 65537) ? 65536 : (num_bytes - 1);
num_bytes -= thisrun_bytes;
- buffer_write((u8) (thisrun_bytes - 1));
- buffer_write((u8) ((thisrun_bytes - 1) >> 8));
+ buffer_write((uint8_t) (thisrun_bytes - 1));
+ buffer_write((uint8_t) ((thisrun_bytes - 1) >> 8));
if (type != SCAN_IN)
{
@@ -902,7 +902,7 @@
{
int tms_bits;
int tms_count;
- u8 mpsse_cmd;
+ uint8_t mpsse_cmd;
/* move from Shift-IR/DR to end state */
if (type != SCAN_OUT)
@@ -934,14 +934,14 @@
}
-static int ft2232_large_scan(scan_command_t* cmd, enum scan_type type, u8* buffer, int scan_size)
+static int ft2232_large_scan(scan_command_t* cmd, enum scan_type type, uint8_t* buffer, int scan_size)
{
int num_bytes = (scan_size + 7) / 8;
int bits_left = scan_size;
int cur_byte = 0;
int last_bit;
- u8* receive_buffer = malloc(CEIL(scan_size, 8));
- u8* receive_pointer = receive_buffer;
+ uint8_t* receive_buffer = malloc(CEIL(scan_size, 8));
+ uint8_t* receive_pointer = receive_buffer;
u32 bytes_written;
u32 bytes_read;
int retval;
@@ -993,8 +993,8 @@
thisrun_bytes = (num_bytes > 65537) ? 65536 : (num_bytes - 1);
thisrun_read = thisrun_bytes;
num_bytes -= thisrun_bytes;
- buffer_write((u8) (thisrun_bytes - 1));
- buffer_write((u8) ((thisrun_bytes - 1) >> 8));
+ buffer_write((uint8_t) (thisrun_bytes - 1));
+ buffer_write((uint8_t) ((thisrun_bytes - 1) >> 8));
if (type != SCAN_IN)
{
@@ -1095,7 +1095,7 @@
{
int tms_bits = tap_get_tms_path(tap_get_state(), tap_get_end_state());
int tms_count = tap_get_tms_path_len(tap_get_state(), tap_get_end_state());
- u8 mpsse_cmd;
+ uint8_t mpsse_cmd;
/* move from Shift-IR/DR to end state */
if (type != SCAN_OUT)
@@ -1599,7 +1599,7 @@
static int ft2232_execute_scan(jtag_command_t *cmd)
{
- u8* buffer;
+ uint8_t* buffer;
int scan_size; /* size of IR or DR scan */
int predicted_size = 0;
int retval = ERROR_OK;
@@ -1788,7 +1788,7 @@
char Description[64];
DWORD openex_flags = 0;
char* openex_string = NULL;
- u8 latency_timer;
+ uint8_t latency_timer;
LOG_DEBUG("'ft2232' interface using FTD2XX with '%s' layout (%4.4x:%4.4x)", ft2232_layout, vid, pid);
@@ -1960,7 +1960,7 @@
#if BUILD_FT2232_LIBFTDI == 1
static int ft2232_init_libftdi(u16 vid, u16 pid, int more, int* try_more)
{
- u8 latency_timer;
+ uint8_t latency_timer;
LOG_DEBUG("'ft2232' interface using libftdi with '%s' layout (%4.4x:%4.4x)",
ft2232_layout, vid, pid);
@@ -2032,7 +2032,7 @@
static int ft2232_init(void)
{
- u8 buf[1];
+ uint8_t buf[1];
int retval;
u32 bytes_written;
const ft2232_layout_t* cur_layout = ft2232_layouts;
@@ -2123,7 +2123,7 @@
static int usbjtag_init(void)
{
- u8 buf[3];
+ uint8_t buf[3];
u32 bytes_written;
low_output = 0x08;
@@ -2199,7 +2199,7 @@
static int axm0432_jtag_init(void)
{
- u8 buf[3];
+ uint8_t buf[3];
u32 bytes_written;
low_output = 0x08;
@@ -2270,7 +2270,7 @@
static int jtagkey_init(void)
{
- u8 buf[3];
+ uint8_t buf[3];
u32 bytes_written;
low_output = 0x08;
@@ -2353,7 +2353,7 @@
static int olimex_jtag_init(void)
{
- u8 buf[3];
+ uint8_t buf[3];
u32 bytes_written;
low_output = 0x08;
@@ -2421,7 +2421,7 @@
static int flyswatter_init(void)
{
- u8 buf[3];
+ uint8_t buf[3];
u32 bytes_written;
low_output = 0x18;
@@ -2468,7 +2468,7 @@
static int turtle_init(void)
{
- u8 buf[3];
+ uint8_t buf[3];
u32 bytes_written;
low_output = 0x08;
@@ -2509,7 +2509,7 @@
static int comstick_init(void)
{
- u8 buf[3];
+ uint8_t buf[3];
u32 bytes_written;
low_output = 0x08;
@@ -2553,7 +2553,7 @@
static int stm32stick_init(void)
{
- u8 buf[3];
+ uint8_t buf[3];
u32 bytes_written;
low_output = 0x88;
@@ -2597,7 +2597,7 @@
static int sheevaplug_init(void)
{
- u8 buf[3];
+ uint8_t buf[3];
u32 bytes_written;
low_output = 0x08;
@@ -2648,7 +2648,7 @@
static int cortino_jtag_init(void)
{
- u8 buf[3];
+ uint8_t buf[3];
u32 bytes_written;
low_output = 0x08;
@@ -2884,7 +2884,7 @@
int retval = 0;
/* 7 bits of either ones or zeros. */
- u8 tms = (tap_get_state() == TAP_RESET ? 0x7F : 0x00);
+ uint8_t tms = (tap_get_state() == TAP_RESET ? 0x7F : 0x00);
while (num_cycles > 0)
{
@@ -2949,7 +2949,7 @@
* ADBUS7 - GND
*/
static int icebear_jtag_init(void) {
- u8 buf[3];
+ uint8_t buf[3];
u32 bytes_written;
low_direction = 0x0b; /* output: TCK TDI TMS; input: TDO */
Modified: trunk/src/jtag/gw16012.c
===================================================================
--- trunk/src/jtag/gw16012.c 2009-06-18 07:06:25 UTC (rev 2275)
+++ trunk/src/jtag/gw16012.c 2009-06-18 07:07:12 UTC (rev 2276)
@@ -71,8 +71,8 @@
/* interface variables
*/
-static u8 gw16012_msb = 0x0;
-static u8 gw16012_control_value = 0x0;
+static uint8_t gw16012_msb = 0x0;
+static uint8_t gw16012_control_value = 0x0;
#if PARPORT_USE_PPDEV == 1
static int device_handle;
@@ -106,7 +106,7 @@
return ERROR_OK;
}
-static void gw16012_data(u8 value)
+static void gw16012_data(uint8_t value)
{
value = (value & 0x7f) | gw16012_msb;
gw16012_msb ^= 0x80; /* toggle MSB */
@@ -126,7 +126,7 @@
#endif
}
-static void gw16012_control(u8 value)
+static void gw16012_control(uint8_t value)
{
if (value != gw16012_control_value)
{
@@ -148,7 +148,7 @@
}
}
-static void gw16012_input(u8 *value)
+static void gw16012_input(uint8_t *value)
{
#if PARPORT_USE_PPDEV == 1
ioctl(device_handle, PPRSTATUS, value);
@@ -197,7 +197,7 @@
static void gw16012_state_move(void)
{
int i=0, tms=0;
- u8 tms_scan = tap_get_tms_path(tap_get_state(), tap_get_end_state());
+ uint8_t tms_scan = tap_get_tms_path(tap_get_state(), tap_get_end_state());
int tms_count = tap_get_tms_path_len(tap_get_state(), tap_get_end_state());
gw16012_control(0x0); /* single-bit mode */
@@ -265,12 +265,12 @@
gw16012_state_move();
}
-static void gw16012_scan(bool ir_scan, enum scan_type type, u8 *buffer, int scan_size)
+static void gw16012_scan(bool ir_scan, enum scan_type type, uint8_t *buffer, int scan_size)
{
int bits_left = scan_size;
int bit_count = 0;
tap_state_t saved_end_state = tap_get_end_state();
- u8 scan_out, scan_in;
+ uint8_t scan_out, scan_in;
/* only if we're not already in the correct Shift state */
if (!((!ir_scan && (tap_get_state() == TAP_DRSHIFT)) || (ir_scan && (tap_get_state() == TAP_IRSHIFT))))
@@ -296,7 +296,7 @@
gw16012_control(0x0); /* single-bit mode */
while (bits_left-- > 0)
{
- u8 tms = 0;
+ uint8_t tms = 0;
scan_out = buf_get_u32(buffer, bit_count, 1);
@@ -343,7 +343,7 @@
jtag_command_t *cmd = jtag_command_queue; /* currently processed command */
int scan_size;
enum scan_type type;
- u8 *buffer;
+ uint8_t *buffer;
int retval;
/* return ERROR_OK, unless a jtag_read_buffer returns a failed check
@@ -549,7 +549,7 @@
static int gw16012_init(void)
{
- u8 status_port;
+ uint8_t status_port;
if (gw16012_init_device() != ERROR_OK)
return ERROR_JTAG_INIT_FAILED;
Modified: trunk/src/jtag/interface.c
===================================================================
--- trunk/src/jtag/interface.c 2009-06-18 07:06:25 UTC (rev 2275)
+++ trunk/src/jtag/interface.c 2009-06-18 07:07:12 UTC (rev 2276)
@@ -106,8 +106,8 @@
*/
struct tms_sequences
{
- u8 bits;
- u8 bit_count;
+ uint8_t bits;
+ uint8_t bit_count;
};
@@ -127,7 +127,7 @@
+(((x) & 0x0F000000LU)?(1<<6):0) \
+(((x) & 0xF0000000LU)?(1<<7):0)
-#define B8(bits,count) { ((u8)B8__(HEX__(bits))), (count) }
+#define B8(bits,count) { ((uint8_t)B8__(HEX__(bits))), (count) }
static const struct tms_sequences old_tms_seqs[6][6] = /* [from_state_ndx][to_state_ndx] */
{
@@ -380,8 +380,8 @@
tap_state_t jtag_debug_state_machine(const void *tms_buf, const void *tdi_buf,
unsigned tap_bits, tap_state_t next_state)
{
- const u8 *tms_buffer;
- const u8 *tdi_buffer;
+ const uint8_t *tms_buffer;
+ const uint8_t *tdi_buffer;
unsigned tap_bytes;
unsigned cur_byte;
unsigned cur_bit;
@@ -396,8 +396,8 @@
last_state = next_state;
DEBUG_JTAG_IO("TAP/SM: START state: %s", tap_state_name(next_state));
- tms_buffer = (const u8 *)tms_buf;
- tdi_buffer = (const u8 *)tdi_buf;
+ tms_buffer = (const uint8_t *)tms_buf;
+ tdi_buffer = (const uint8_t *)tdi_buf;
tap_bytes = TAP_SCAN_BYTES(tap_bits);
DEBUG_JTAG_IO("TAP/SM: TMS bits: %u (bytes: %u)", tap_bits, tap_bytes);
Modified: trunk/src/jtag/jlink.c
===================================================================
--- trunk/src/jtag/jlink.c 2009-06-18 07:06:25 UTC (rev 2275)
+++ trunk/src/jtag/jlink.c 2009-06-18 07:07:12 UTC (rev 2276)
@@ -54,9 +54,9 @@
#define JLINK_EMU_RESULT_BUFFER_SIZE 64
/* Global USB buffers */
-static u8 usb_in_buffer[JLINK_IN_BUFFER_SIZE];
-static u8 usb_out_buffer[JLINK_OUT_BUFFER_SIZE];
-static u8 usb_emu_result_buffer[JLINK_EMU_RESULT_BUFFER_SIZE];
+static uint8_t usb_in_buffer[JLINK_IN_BUFFER_SIZE];
+static uint8_t usb_out_buffer[JLINK_OUT_BUFFER_SIZE];
+static uint8_t usb_emu_result_buffer[JLINK_EMU_RESULT_BUFFER_SIZE];
/* Constants for JLink command */
#define EMU_CMD_VERSION 0x01
@@ -100,9 +100,9 @@
static void jlink_state_move(void);
static void jlink_path_move(int num_states, tap_state_t *path);
static void jlink_runtest(int num_cycles);
-static void jlink_scan(bool ir_scan, enum scan_type type, u8 *buffer, int scan_size, scan_command_t *command);
+static void jlink_scan(bool ir_scan, enum scan_type type, uint8_t *buffer, int scan_size, scan_command_t *command);
static void jlink_reset(int trst, int srst);
-static void jlink_simple_command(u8 command);
+static void jlink_simple_command(uint8_t command);
static int jlink_get_status(void);
/* J-Link tap buffer functions */
@@ -110,7 +110,7 @@
static int jlink_tap_execute(void);
static void jlink_tap_ensure_space(int scans, int bits);
static void jlink_tap_append_step(int tms, int tdi);
-static void jlink_tap_append_scan(int length, u8 *buffer, scan_command_t *command);
+static void jlink_tap_append_scan(int length, uint8_t *buffer, scan_command_t *command);
/* Jlink lowlevel functions */
typedef struct jlink_jtag
@@ -129,7 +129,7 @@
static int jlink_get_version_info(void);
#ifdef _DEBUG_USB_COMMS_
-static void jlink_debug_buffer(u8 *buffer, int length);
+static void jlink_debug_buffer(uint8_t *buffer, int length);
#endif
static enum tap_state jlink_last_state = TAP_RESET;
@@ -184,7 +184,7 @@
{
int scan_size;
enum scan_type type;
- u8 *buffer;
+ uint8_t *buffer;
DEBUG_JTAG_IO("scan end in %s", tap_state_name(cmd->cmd.scan->end_state));
@@ -379,8 +379,8 @@
{
int i;
int tms = 0;
- u8 tms_scan = tap_get_tms_path(tap_get_state(), tap_get_end_state());
- u8 tms_scan_bits = tap_get_tms_path_len(tap_get_state(), tap_get_end_state());
+ uint8_t tms_scan = tap_get_tms_path(tap_get_state(), tap_get_end_state());
+ uint8_t tms_scan_bits = tap_get_tms_path_len(tap_get_state(), tap_get_end_state());
for (i = 0; i < tms_scan_bits; i++)
{
@@ -447,7 +447,7 @@
}
}
-static void jlink_scan(bool ir_scan, enum scan_type type, u8 *buffer, int scan_size, scan_command_t *command)
+static void jlink_scan(bool ir_scan, enum scan_type type, uint8_t *buffer, int scan_size, scan_command_t *command)
{
tap_state_t saved_end_state;
@@ -505,7 +505,7 @@
}
}
-static void jlink_simple_command(u8 command)
+static void jlink_simple_command(uint8_t command)
{
int result;
@@ -670,16 +670,16 @@
static unsigned tap_length=0;
-static u8 tms_buffer[JLINK_TAP_BUFFER_SIZE];
-static u8 tdi_buffer[JLINK_TAP_BUFFER_SIZE];
-static u8 tdo_buffer[JLINK_TAP_BUFFER_SIZE];
+static uint8_t tms_buffer[JLINK_TAP_BUFFER_SIZE];
+static uint8_t tdi_buffer[JLINK_TAP_BUFFER_SIZE];
+static uint8_t tdo_buffer[JLINK_TAP_BUFFER_SIZE];
typedef struct
{
int first; /* First bit position in tdo_buffer to read */
int length; /* Number of bits to read */
scan_command_t *command; /* Corresponding scan command */
- u8 *buffer;
+ uint8_t *buffer;
} pending_scan_result_t;
#define MAX_PENDING_SCAN_RESULTS 256
@@ -716,7 +716,7 @@
}
int bit_index = tap_length % 8;
- u8 bit = 1 << bit_index;
+ uint8_t bit = 1 << bit_index;
// we do not pad TMS, so be sure to initialize all bits
if (0 == bit_index)
@@ -737,7 +737,7 @@
tap_length++;
}
-static void jlink_tap_append_scan(int length, u8 *buffer, scan_command_t *command)
+static void jlink_tap_append_scan(int length, uint8_t *buffer, scan_command_t *command)
{
pending_scan_result_t *pending_scan_result =
&pending_scan_results_buffer[pending_scan_results_length];
@@ -802,7 +802,7 @@
for (i = 0; i < pending_scan_results_length; i++)
{
pending_scan_result_t *pending_scan_result = &pending_scan_results_buffer[i];
- u8 *buffer = pending_scan_result->buffer;
+ uint8_t *buffer = pending_scan_result->buffer;
int length = pending_scan_result->length;
int first = pending_scan_result->first;
scan_command_t *command = pending_scan_result->command;
@@ -876,7 +876,7 @@
struct usb_interface_descriptor *desc = iface->altsetting;
for (int i = 0; i < desc->bNumEndpoints; i++)
{
- u8 epnum = desc->endpoint[i].bEndpointAddress;
+ uint8_t epnum = desc->endpoint[i].bEndpointAddress;
bool is_input = epnum & 0x80;
LOG_DEBUG("usb ep %s %02x", is_input ? "in" : "out", epnum);
if (is_input)
@@ -1054,7 +1054,7 @@
#ifdef _DEBUG_USB_COMMS_
#define BYTES_PER_LINE 16
-static void jlink_debug_buffer(u8 *buffer, int length)
+static void jlink_debug_buffer(uint8_t *buffer, int length)
{
char line[81];
char s[4];
Modified: trunk/src/jtag/jtag.h
===================================================================
--- trunk/src/jtag/jtag.h 2009-06-18 07:06:25 UTC (rev 2275)
+++ trunk/src/jtag/jtag.h 2009-06-18 07:07:12 UTC (rev 2276)
@@ -123,21 +123,21 @@
/// The number of bits this field specifies (up to 32)
int num_bits;
/// A pointer to value to be scanned into the device
- u8* out_value;
+ uint8_t* out_value;
/// A pointer to a 32-bit memory location for data scanned out
- u8* in_value;
+ uint8_t* in_value;
/// The value used to check the data scanned out.
- u8* check_value;
+ uint8_t* check_value;
/// The mask to go with check_value
- u8* check_mask;
+ uint8_t* check_mask;
/// in_value has been allocated for the queue
int allocated;
/// Indicates we modified the in_value.
int modified;
/// temporary storage for performing value checks synchronously
- u8 intmp[4];
+ uint8_t intmp[4];
} scan_field_t;
typedef struct jtag_tap_event_action_s jtag_tap_event_action_t;
@@ -157,19 +157,19 @@
bool enabled;
int ir_length; /**< size of instruction register */
u32 ir_capture_value;
- u8* expected; /**< Capture-IR expected value */
+ uint8_t* expected; /**< Capture-IR expected value */
u32 ir_capture_mask;
- u8* expected_mask; /**< Capture-IR expected mask */
+ uint8_t* expected_mask; /**< Capture-IR expected mask */
u32 idcode;
/**< device identification code */
/// Array of expected identification codes */
u32* expected_ids;
/// Number of expected identification codes
- u8 expected_ids_cnt;
+ uint8_t expected_ids_cnt;
/// current instruction
- u8* cur_instr;
+ uint8_t* cur_instr;
/// Bypass register selected
int bypass;
@@ -393,10 +393,10 @@
* For conversion types or checks that can fail, use the more complete
* variant: jtag_callback_t.
*/
-typedef void (*jtag_callback1_t)(u8 *in);
+typedef void (*jtag_callback1_t)(uint8_t *in);
/// A simpler version of jtag_add_callback4().
-extern void jtag_add_callback(jtag_callback1_t, u8 *in);
+extern void jtag_add_callback(jtag_callback1_t, uint8_t *in);
/**
@@ -414,7 +414,7 @@
* @param data3 An integer big enough to use as an @c int or a pointer.
* @returns an error code
*/
-typedef int (*jtag_callback_t)(u8 *in, jtag_callback_data_t data1, jtag_callback_data_t data2, jtag_callback_data_t data3);
+typedef int (*jtag_callback_t)(uint8_t *in, jtag_callback_data_t data1, jtag_callback_data_t data2, jtag_callback_data_t data3);
/**
@@ -445,7 +445,7 @@
* @param data3 An integer big enough to use as an @c int or a pointer.
*
*/
-extern void jtag_add_callback4(jtag_callback_t f, u8 *in,
+extern void jtag_add_callback4(jtag_callback_t f, uint8_t *in,
jtag_callback_data_t data1, jtag_callback_data_t data2,
jtag_callback_data_t data3);
@@ -646,7 +646,7 @@
* @param mask Pointer to scan mask; may be NULL.
* @returns Nothing, but calls jtag_set_error() on any error.
*/
-extern void jtag_check_value_mask(scan_field_t *field, u8 *value, u8 *mask);
+extern void jtag_check_value_mask(scan_field_t *field, uint8_t *value, uint8_t *mask);
extern void jtag_sleep(u32 us);
Modified: trunk/src/jtag/minidriver.h
===================================================================
--- trunk/src/jtag/minidriver.h 2009-06-18 07:06:25 UTC (rev 2275)
+++ trunk/src/jtag/minidriver.h 2009-06-18 07:07:12 UTC (rev 2276)
@@ -59,7 +59,7 @@
if (field->num_bits > 32)
{
unsigned num_bytes = TAP_SCAN_BYTES(field->num_bits);
- field->in_value = (u8 *)malloc(num_bytes);
+ field->in_value = (uint8_t *)malloc(num_bytes);
field->allocated = 1;
}
else
@@ -72,22 +72,22 @@
static inline void interface_jtag_alloc_in_value32(scan_field_t *field)
{
- field->in_value = (u8 *)cmd_queue_alloc(4);
+ field->in_value = (uint8_t *)cmd_queue_alloc(4);
}
static inline void interface_jtag_add_scan_check_alloc(scan_field_t *field)
{
unsigned num_bytes = TAP_SCAN_BYTES(field->num_bits);
- field->in_value = (u8 *)cmd_queue_alloc(num_bytes);
+ field->in_value = (uint8_t *)cmd_queue_alloc(num_bytes);
}
extern void interface_jtag_add_dr_out(jtag_tap_t* tap,
int num_fields, const int* num_bits, const u32* value,
tap_state_t end_state);
-extern void interface_jtag_add_callback(jtag_callback1_t f, u8 *in);
+extern void interface_jtag_add_callback(jtag_callback1_t f, uint8_t *in);
-extern void interface_jtag_add_callback4(jtag_callback_t f, u8 *in,
+extern void interface_jtag_add_callback4(jtag_callback_t f, uint8_t *in,
jtag_callback_data_t data1, jtag_callback_data_t data2,
jtag_callback_data_t data3);
Modified: trunk/src/jtag/minidummy/minidummy.c
===================================================================
--- trunk/src/jtag/minidummy/minidummy.c 2009-06-18 07:06:25 UTC (rev 2275)
+++ trunk/src/jtag/minidummy/minidummy.c 2009-06-18 07:07:12 UTC (rev 2276)
@@ -57,7 +57,7 @@
-extern int jtag_check_value(u8 *captured, void *priv);
+extern int jtag_check_value(uint8_t *captured, void *priv);
int interface_jtag_set_end_state(tap_state_t state)
{
@@ -178,7 +178,7 @@
-void embeddedice_write_dcc(jtag_tap_t *tap, int reg_addr, u8 *buffer, int little, int count)
+void embeddedice_write_dcc(jtag_tap_t *tap, int reg_addr, uint8_t *buffer, int little, int count)
{
int i;
for (i = 0; i < count; i++)
Modified: trunk/src/jtag/parport.c
===================================================================
--- trunk/src/jtag/parport.c 2009-06-18 07:06:25 UTC (rev 2275)
+++ trunk/src/jtag/parport.c 2009-06-18 07:07:12 UTC (rev 2276)
@@ -62,17 +62,17 @@
typedef struct cable_s
{
char* name;
- u8 TDO_MASK; /* status port bit containing current TDO value */
- u8 TRST_MASK; /* data port bit for TRST */
- u8 TMS_MASK; /* data port bit for TMS */
- u8 TCK_MASK; /* data port bit for TCK */
- u8 TDI_MASK; /* data port bit for TDI */
- u8 SRST_MASK; /* data port bit for SRST */
- u8 OUTPUT_INVERT; /* data port bits that should be inverted */
- u8 INPUT_INVERT; /* status port that should be inverted */
- u8 PORT_INIT; /* initialize data port with this value */
- u8 PORT_EXIT; /* de-initialize data port with this value */
- u8 LED_MASK; /* data port bit for LED */
+ uint8_t TDO_MASK; /* status port bit containing current TDO value */
+ uint8_t TRST_MASK; /* data port bit for TRST */
+ uint8_t TMS_MASK; /* data port bit for TMS */
+ uint8_t TCK_MASK; /* data port bit for TCK */
+ uint8_t TDI_MASK; /* data port bit for TDI */
+ uint8_t SRST_MASK; /* data port bit for SRST */
+ uint8_t OUTPUT_INVERT; /* data port bits that should be inverted */
+ uint8_t INPUT_INVERT; /* status port that should be inverted */
+ uint8_t PORT_INIT; /* initialize data port with this value */
+ uint8_t PORT_EXIT; /* de-initialize data port with this value */
+ uint8_t LED_MASK; /* data port bit for LED */
} cable_t;
static cable_t cables[] =
@@ -109,7 +109,7 @@
/* interface variables
*/
static cable_t* cable;
-static u8 dataport_value = 0x0;
+static uint8_t dataport_value = 0x0;
#if PARPORT_USE_PPDEV == 1
static int device_handle;
@@ -173,7 +173,7 @@
static __inline__ void parport_write_data(void)
{
- u8 output;
+ uint8_t output;
output = dataport_value ^ cable->OUTPUT_INVERT;
#if PARPORT_USE_PPDEV == 1
Modified: trunk/src/jtag/presto.c
===================================================================
--- trunk/src/jtag/presto.c 2009-06-18 07:06:25 UTC (rev 2275)
+++ trunk/src/jtag/presto.c 2009-06-18 07:07:12 UTC (rev 2276)
@@ -98,10 +98,10 @@
char serial[FT_DEVICE_SERNUM_LEN];
- u8 buff_out[BUFFER_SIZE];
+ uint8_t buff_out[BUFFER_SIZE];
int buff_out_pos;
- u8 buff_in[BUFFER_SIZE];
+ uint8_t buff_in[BUFFER_SIZE];
int buff_in_exp; /* expected in buffer length */
int buff_in_len; /* length of data received */
int buff_in_pos;
@@ -123,12 +123,12 @@
static presto_t presto_state;
static presto_t *presto = &presto_state;
-static u8 presto_init_seq[] =
+static uint8_t presto_init_seq[] =
{
0x80, 0xA0, 0xA8, 0xB0, 0xC0, 0xE0
};
-static int presto_write(u8 *buf, u32 size)
+static int presto_write(uint8_t *buf, u32 size)
{
#if BUILD_PRESTO_FTD2XX == 1
DWORD ftbytes;
@@ -157,7 +157,7 @@
return ERROR_OK;
}
-static int presto_read(u8* buf, u32 size)
+static int presto_read(uint8_t* buf, u32 size)
{
#if BUILD_PRESTO_FTD2XX == 1
DWORD ftbytes;
@@ -332,7 +332,7 @@
#elif BUILD_PRESTO_LIBFTDI == 1
static int presto_open_libftdi(char *req_serial)
{
- u8 presto_data;
+ uint8_t presto_data;
LOG_DEBUG("searching for PRESTO using libftdi");
@@ -521,7 +521,7 @@
if (presto->buff_out_pos < BUFFER_SIZE)
{
- presto->buff_out[presto->buff_out_pos++] = (u8)data;
+ presto->buff_out[presto->buff_out_pos++] = (uint8_t)data;
if (((data & 0xC0) == 0x40) || ((data & 0xD0)== 0xD0))
presto->buff_in_exp++;
}
Modified: trunk/src/jtag/rlink/rlink.c
===================================================================
--- trunk/src/jtag/rlink/rlink.c 2009-06-18 07:06:25 UTC (rev 2275)
+++ trunk/src/jtag/rlink/rlink.c 2009-06-18 07:07:12 UTC (rev 2276)
@@ -327,17 +327,17 @@
int
dtc_load_from_buffer(
usb_dev_handle *pHDev,
- const u8 *buffer,
+ const uint8_t *buffer,
size_t length
) {
struct header_s {
- u8 type;
- u8 length;
+ uint8_t type;
+ uint8_t length;
};
int usb_err;
struct header_s *header;
- u8 lut_start = 0xc0;
+ uint8_t lut_start = 0xc0;
dtc_entry_download = 0;
@@ -439,7 +439,7 @@
int
dtc_start_download(void) {
int usb_err;
- u8 ep2txr;
+ uint8_t ep2txr;
/* set up for download mode and make sure EP2 is set up to transmit */
usb_err = ep1_generic_commandl(
@@ -497,12 +497,12 @@
int
dtc_run_download(
usb_dev_handle *pHDev,
- u8 *command_buffer,
+ uint8_t *command_buffer,
int command_buffer_size,
- u8 *reply_buffer,
+ uint8_t *reply_buffer,
int reply_buffer_size
) {
- u8 ep2_buffer[USB_EP2IN_SIZE];
+ uint8_t ep2_buffer[USB_EP2IN_SIZE];
int usb_err;
int i;
@@ -582,7 +582,7 @@
jtag_command_t *cmd; /* the command that resulted in this entry */
struct {
- u8 *buffer; /* the scan buffer */
+ uint8_t *buffer; /* the scan buffer */
int size; /* size of the scan buffer in bits */
int offset; /* how many bits were already done before this? */
int length; /* how many bits are processed in this operation? */
@@ -602,7 +602,7 @@
dtc_reply_queue_entry_t *rq_tail;
u32 cmd_index;
u32 reply_index;
- u8 cmd_buffer[USB_EP2BANK_SIZE];
+ uint8_t cmd_buffer[USB_EP2BANK_SIZE];
} dtc_queue;
@@ -634,7 +634,7 @@
dtc_reply_queue_entry_t *
dtc_queue_enqueue_reply(
enum scan_type type,
- u8 *buffer,
+ uint8_t *buffer,
int size,
int offset,
int length,
@@ -677,9 +677,9 @@
int usb_err;
int bit_cnt;
int x;
- u8 *dtc_p, *tdo_p;
- u8 dtc_mask, tdo_mask;
- u8 reply_buffer[USB_EP2IN_SIZE];
+ uint8_t *dtc_p, *tdo_p;
+ uint8_t dtc_mask, tdo_mask;
+ uint8_t reply_buffer[USB_EP2IN_SIZE];
retval = ERROR_OK;
@@ -827,7 +827,7 @@
tap_state_queue_run(void) {
int i;
int bits;
- u8 byte;
+ uint8_t byte;
int retval;
retval = 0;
@@ -881,7 +881,7 @@
static
int
tap_state_queue_append(
- u8 tms
+ uint8_t tms
) {
int retval;
@@ -916,7 +916,7 @@
void rlink_state_move(void) {
int i=0, tms=0;
- u8 tms_scan = tap_get_tms_path(tap_get_state(), tap_get_end_state());
+ uint8_t tms_scan = tap_get_tms_path(tap_get_state(), tap_get_end_state());
int tms_count = tap_get_tms_path_len(tap_get_state(), tap_get_end_state());
for (i = 0; i < tms_count; i++)
@@ -994,7 +994,7 @@
static
void rlink_reset(int trst, int srst)
{
- u8 bitmap;
+ uint8_t bitmap;
int usb_err;
/* Read port A for bit op */
@@ -1093,7 +1093,7 @@
rlink_scan(
jtag_command_t *cmd,
enum scan_type type,
- u8 *buffer,
+ uint8_t *buffer,
int scan_size
) {
bool ir_scan;
@@ -1105,8 +1105,8 @@
int x;
int tdi_bit_offset;
- u8 tdi_mask, *tdi_p;
- u8 dtc_mask;
+ uint8_t tdi_mask, *tdi_p;
+ uint8_t dtc_mask;
if(scan_size < 1) {
LOG_ERROR("scan_size cannot be less than 1 bit\n");
@@ -1382,7 +1382,7 @@
jtag_command_t *cmd = jtag_command_queue; /* currently processed command */
int scan_size;
enum scan_type type;
- u8 *buffer;
+ uint8_t *buffer;
int retval, tmp_retval;
/* return ERROR_OK, unless something goes wrong */
@@ -1622,7 +1622,7 @@
int i, j, retries;
int found=0;
int success=0;
- u8 reply_buffer[USB_EP1IN_SIZE];
+ uint8_t reply_buffer[USB_EP1IN_SIZE];
usb_init();
usb_find_busses();
Modified: trunk/src/jtag/rlink/rlink.h
===================================================================
--- trunk/src/jtag/rlink/rlink.h 2009-06-18 07:06:25 UTC (rev 2275)
+++ trunk/src/jtag/rlink/rlink.h 2009-06-18 07:07:12 UTC (rev 2276)
@@ -22,10 +22,10 @@
typedef
struct rlink_speed_table_s {
- u8 const *dtc;
+ uint8_t const *dtc;
u16 dtc_size;
u16 khz;
- u8 prescaler;
+ uint8_t prescaler;
} rlink_speed_table_t;
extern const rlink_speed_table_t rlink_speed_table[];
Modified: trunk/src/jtag/rlink/rlink_speed_table.c
===================================================================
--- trunk/src/jtag/rlink/rlink_speed_table.c 2009-06-18 07:06:25 UTC (rev 2275)
+++ trunk/src/jtag/rlink/rlink_speed_table.c 2009-06-18 07:07:12 UTC (rev 2276)
@@ -6,7 +6,7 @@
#include "rlink.h"
#include "st7.h"
-static const u8 dtc_64[] = {
+static const uint8_t dtc_64[] = {
0, 2, 68, 84, 67, 2, 13, 160, 176, 151, 147, 182, 141, 152, 177, 129, 148,
191, 143, 142, 5, 3, 0, 0, 0, 2, 68, 84, 67, 4, 0, 192, 5, 15, 0, 42, 42,
42, 73, 0, 88, 0, 160, 189, 0, 0, 0, 0, 106, 9, 1, 8, 22, 100, 111, 119,
@@ -27,7 +27,...
[truncated message content] |
|
From: <zw...@ma...> - 2009-06-18 09:07:09
|
Author: zwelch
Date: 2009-06-18 09:06:25 +0200 (Thu, 18 Jun 2009)
New Revision: 2275
Modified:
trunk/src/flash/aduc702x.c
trunk/src/flash/at91sam7.c
trunk/src/flash/at91sam7.h
trunk/src/flash/avrf.c
trunk/src/flash/cfi.c
trunk/src/flash/cfi.h
trunk/src/flash/davinci_nand.c
trunk/src/flash/ecos.c
trunk/src/flash/flash.c
trunk/src/flash/flash.h
trunk/src/flash/lpc2000.c
trunk/src/flash/lpc288x.c
trunk/src/flash/lpc3180_nand_controller.c
trunk/src/flash/mflash.c
trunk/src/flash/mflash.h
trunk/src/flash/nand.c
trunk/src/flash/nand.h
trunk/src/flash/nand_ecc.c
trunk/src/flash/nand_ecc_kw.c
trunk/src/flash/non_cfi.h
trunk/src/flash/ocl.c
trunk/src/flash/orion_nand.c
trunk/src/flash/pic32mx.c
trunk/src/flash/s3c2410_nand.c
trunk/src/flash/s3c2440_nand.c
trunk/src/flash/s3c24xx_nand.c
trunk/src/flash/s3c24xx_nand.h
trunk/src/flash/stellaris.c
trunk/src/flash/stellaris.h
trunk/src/flash/stm32x.c
trunk/src/flash/str7x.c
trunk/src/flash/str9x.c
trunk/src/flash/str9xpec.c
trunk/src/flash/str9xpec.h
trunk/src/flash/tms470.c
Log:
Transform 'u8' to 'uint8_t' in src/flash
- Replace '\([^_]\)u8' with '\1uint8_t'.
- Replace '^u8' with 'uint8_t'.
Modified: trunk/src/flash/aduc702x.c
===================================================================
--- trunk/src/flash/aduc702x.c 2009-06-18 07:04:08 UTC (rev 2274)
+++ trunk/src/flash/aduc702x.c 2009-06-18 07:06:25 UTC (rev 2275)
@@ -33,9 +33,9 @@
static int aduc702x_register_commands(struct command_context_s *cmd_ctx);
static int aduc702x_erase(struct flash_bank_s *bank, int first, int last);
static int aduc702x_protect(struct flash_bank_s *bank, int set, int first, int last);
-static int aduc702x_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count);
-static int aduc702x_write_single(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count);
-static int aduc702x_write_block(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count);
+static int aduc702x_write(struct flash_bank_s *bank, uint8_t *buffer, u32 offset, u32 count);
+static int aduc702x_write_single(struct flash_bank_s *bank, uint8_t *buffer, u32 offset, u32 count);
+static int aduc702x_write_block(struct flash_bank_s *bank, uint8_t *buffer, u32 offset, u32 count);
static int aduc702x_probe(struct flash_bank_s *bank);
static int aduc702x_info(struct flash_bank_s *bank, char *buf, int buf_size);
static int aduc702x_protect_check(struct flash_bank_s *bank);
@@ -193,7 +193,7 @@
return ERROR_FLASH_OPERATION_FAILED;
}
-static int aduc702x_write_block(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count)
+static int aduc702x_write_block(struct flash_bank_s *bank, uint8_t *buffer, u32 offset, u32 count)
{
aduc702x_flash_bank_t *aduc702x_info = bank->driver_priv;
target_t *target = bank->target;
@@ -250,7 +250,7 @@
};
target_write_buffer(target, aduc702x_info->write_algorithm->address,
- sizeof(aduc702x_flash_write_code), (u8*)aduc702x_flash_write_code);
+ sizeof(aduc702x_flash_write_code), (uint8_t*)aduc702x_flash_write_code);
/* memory buffer */
while (target_alloc_working_area(target, buffer_size, &source) != ERROR_OK)
@@ -322,10 +322,10 @@
/* All-JTAG, single-access method. Very slow. Used only if there is no
* working area available. */
-static int aduc702x_write_single(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count)
+static int aduc702x_write_single(struct flash_bank_s *bank, uint8_t *buffer, u32 offset, u32 count)
{
u32 x;
- u8 b;
+ uint8_t b;
target_t *target = bank->target;
aduc702x_set_write_enable(target, 1);
@@ -363,7 +363,7 @@
return ERROR_OK;
}
-int aduc702x_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count)
+int aduc702x_write(struct flash_bank_s *bank, uint8_t *buffer, u32 offset, u32 count)
{
int retval;
@@ -420,7 +420,7 @@
* so in some cases may slow things down without a usleep after the first read */
static int aduc702x_check_flash_completion(target_t* target, unsigned int timeout_ms)
{
- u8 v = 4;
+ uint8_t v = 4;
long long endtime = timeval_ms() + timeout_ms;
while (1) {
Modified: trunk/src/flash/at91sam7.c
===================================================================
--- trunk/src/flash/at91sam7.c 2009-06-18 07:04:08 UTC (rev 2274)
+++ trunk/src/flash/at91sam7.c 2009-06-18 07:06:25 UTC (rev 2275)
@@ -47,7 +47,7 @@
static int at91sam7_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank);
static int at91sam7_erase(struct flash_bank_s *bank, int first, int last);
static int at91sam7_protect(struct flash_bank_s *bank, int set, int first, int last);
-static int at91sam7_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count);
+static int at91sam7_write(struct flash_bank_s *bank, uint8_t *buffer, u32 offset, u32 count);
static int at91sam7_probe(struct flash_bank_s *bank);
//static int at91sam7_auto_probe(struct flash_bank_s *bank);
static int at91sam7_erase_check(struct flash_bank_s *bank);
@@ -57,7 +57,7 @@
static u32 at91sam7_get_flash_status(target_t *target, int bank_number);
static void at91sam7_set_flash_mode(flash_bank_t *bank, int mode);
static u32 at91sam7_wait_status_busy(flash_bank_t *bank, u32 waitbits, int timeout);
-static int at91sam7_flash_command(struct flash_bank_s *bank, u8 cmd, u16 pagen);
+static int at91sam7_flash_command(struct flash_bank_s *bank, uint8_t cmd, u16 pagen);
static int at91sam7_handle_gpnvm_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
flash_driver_t at91sam7_flash =
@@ -274,7 +274,7 @@
}
/* Send one command to the AT91SAM flash controller */
-static int at91sam7_flash_command(struct flash_bank_s *bank, u8 cmd, u16 pagen)
+static int at91sam7_flash_command(struct flash_bank_s *bank, uint8_t cmd, u16 pagen)
{
u32 fcr;
at91sam7_flash_bank_t *at91sam7_info = bank->driver_priv;
@@ -312,7 +312,7 @@
u16 bnk, sec;
u16 arch;
u32 cidr;
- u8 banks_num = 0;
+ uint8_t banks_num = 0;
u16 num_nvmbits = 0;
u16 sectors_num = 0;
u16 pages_per_sector = 0;
@@ -624,7 +624,7 @@
u16 retval;
u32 blank;
u16 fast_check;
- u8 *buffer;
+ uint8_t *buffer;
u16 nSector;
u16 nByte;
@@ -686,7 +686,7 @@
static int at91sam7_protect_check(struct flash_bank_s *bank)
{
- u8 lock_pos, gpnvm_pos;
+ uint8_t lock_pos, gpnvm_pos;
u32 status;
at91sam7_flash_bank_t *at91sam7_info = bank->driver_priv;
@@ -861,8 +861,8 @@
at91sam7_flash_bank_t *at91sam7_info = bank->driver_priv;
int sec;
u32 nbytes, pos;
- u8 *buffer;
- u8 erase_all;
+ uint8_t *buffer;
+ uint8_t erase_all;
if (at91sam7_info->cidr == 0)
{
@@ -901,7 +901,7 @@
{
/* allocate and clean buffer */
nbytes = (last - first + 1) * bank->sectors[first].size;
- buffer = malloc(nbytes * sizeof(u8));
+ buffer = malloc(nbytes * sizeof(uint8_t));
for (pos=0; pos<nbytes; pos++)
{
buffer[pos] = 0xFF;
@@ -974,7 +974,7 @@
return ERROR_OK;
}
-static int at91sam7_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count)
+static int at91sam7_write(struct flash_bank_s *bank, uint8_t *buffer, u32 offset, u32 count)
{
int retval;
at91sam7_flash_bank_t *at91sam7_info = bank->driver_priv;
@@ -1127,7 +1127,7 @@
{
flash_bank_t *bank;
int bit;
- u8 flashcmd;
+ uint8_t flashcmd;
u32 status;
at91sam7_flash_bank_t *at91sam7_info;
int retval;
Modified: trunk/src/flash/at91sam7.h
===================================================================
--- trunk/src/flash/at91sam7.h 2009-06-18 07:04:08 UTC (rev 2274)
+++ trunk/src/flash/at91sam7.h 2009-06-18 07:06:25 UTC (rev 2275)
@@ -40,7 +40,7 @@
char *target_name;
/* flash auto-detection */
- u8 flash_autodetection;
+ uint8_t flash_autodetection;
/* flash geometry */
u16 pages_per_sector;
@@ -53,15 +53,15 @@
u16 num_nvmbits;
u16 num_nvmbits_on;
u16 nvmbits;
- u8 securitybit;
+ uint8_t securitybit;
/* 0: not init
* 1: fmcn for nvbits (1uS)
* 2: fmcn for flash (1.5uS) */
- u8 flashmode;
+ uint8_t flashmode;
/* main clock status */
- u8 mck_valid;
+ uint8_t mck_valid;
u32 mck_freq;
/* external clock frequency */
Modified: trunk/src/flash/avrf.c
===================================================================
--- trunk/src/flash/avrf.c 2009-06-18 07:04:08 UTC (rev 2274)
+++ trunk/src/flash/avrf.c 2009-06-18 07:06:25 UTC (rev 2275)
@@ -60,7 +60,7 @@
static int avrf_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank);
static int avrf_erase(struct flash_bank_s *bank, int first, int last);
static int avrf_protect(struct flash_bank_s *bank, int set, int first, int last);
-static int avrf_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count);
+static int avrf_write(struct flash_bank_s *bank, uint8_t *buffer, u32 offset, u32 count);
static int avrf_probe(struct flash_bank_s *bank);
static int avrf_auto_probe(struct flash_bank_s *bank);
//static int avrf_handle_part_id_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
@@ -69,13 +69,13 @@
static int avrf_handle_mass_erase_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
-extern int avr_jtag_sendinstr(jtag_tap_t *tap, u8 *ir_in, u8 ir_out);
+extern int avr_jtag_sendinstr(jtag_tap_t *tap, uint8_t *ir_in, uint8_t ir_out);
extern int avr_jtag_senddat(jtag_tap_t *tap, u32 *dr_in, u32 dr_out, int len);
-extern int mcu_write_ir(jtag_tap_t *tap, u8 *ir_in, u8 *ir_out, int ir_len, int rti);
-extern int mcu_write_dr(jtag_tap_t *tap, u8 *ir_in, u8 *ir_out, int dr_len, int rti);
-extern int mcu_write_ir_u8(jtag_tap_t *tap, u8 *ir_in, u8 ir_out, int ir_len, int rti);
-extern int mcu_write_dr_u8(jtag_tap_t *tap, u8 *ir_in, u8 ir_out, int dr_len, int rti);
+extern int mcu_write_ir(jtag_tap_t *tap, uint8_t *ir_in, uint8_t *ir_out, int ir_len, int rti);
+extern int mcu_write_dr(jtag_tap_t *tap, uint8_t *ir_in, uint8_t *ir_out, int dr_len, int rti);
+extern int mcu_write_ir_u8(jtag_tap_t *tap, uint8_t *ir_in, uint8_t ir_out, int ir_len, int rti);
+extern int mcu_write_dr_u8(jtag_tap_t *tap, uint8_t *ir_in, uint8_t ir_out, int dr_len, int rti);
extern int mcu_write_ir_u16(jtag_tap_t *tap, u16 *ir_in, u16 ir_out, int ir_len, int rti);
extern int mcu_write_dr_u16(jtag_tap_t *tap, u16 *ir_in, u16 ir_out, int dr_len, int rti);
extern int mcu_write_ir_u32(jtag_tap_t *tap, u32 *ir_in, u32 ir_out, int ir_len, int rti);
@@ -161,7 +161,7 @@
return ERROR_OK;
}
-static int avr_jtagprg_writeflashpage(avr_common_t *avr, u8 *page_buf, u32 buf_size, u32 addr, u32 page_size)
+static int avr_jtagprg_writeflashpage(avr_common_t *avr, uint8_t *page_buf, u32 buf_size, u32 addr, u32 page_size)
{
u32 i, poll_value;
@@ -249,7 +249,7 @@
return ERROR_OK;
}
-static int avrf_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count)
+static int avrf_write(struct flash_bank_s *bank, uint8_t *buffer, u32 offset, u32 count)
{
target_t *target = bank->target;
avr_common_t *avr = target->arch_info;
Modified: trunk/src/flash/cfi.c
===================================================================
--- trunk/src/flash/cfi.c 2009-06-18 07:04:08 UTC (rev 2274)
+++ trunk/src/flash/cfi.c 2009-06-18 07:06:25 UTC (rev 2275)
@@ -33,7 +33,7 @@
static int cfi_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank);
static int cfi_erase(struct flash_bank_s *bank, int first, int last);
static int cfi_protect(struct flash_bank_s *bank, int set, int first, int last);
-static int cfi_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count);
+static int cfi_write(struct flash_bank_s *bank, uint8_t *buffer, u32 offset, u32 count);
static int cfi_probe(struct flash_bank_s *bank);
static int cfi_auto_probe(struct flash_bank_s *bank);
static int cfi_protect_check(struct flash_bank_s *bank);
@@ -131,7 +131,7 @@
}
-static void cfi_command(flash_bank_t *bank, u8 cmd, u8 *cmd_buf)
+static void cfi_command(flash_bank_t *bank, uint8_t cmd, uint8_t *cmd_buf)
{
int i;
@@ -161,10 +161,10 @@
* flash banks are expected to be made of similar chips
* the query result should be the same for all
*/
-static u8 cfi_query_u8(flash_bank_t *bank, int sector, u32 offset)
+static uint8_t cfi_query_u8(flash_bank_t *bank, int sector, u32 offset)
{
target_t *target = bank->target;
- u8 data[CFI_MAX_BUS_WIDTH];
+ uint8_t data[CFI_MAX_BUS_WIDTH];
target_read_memory(target, flash_address(bank, sector, offset), bank->bus_width, 1, data);
@@ -178,10 +178,10 @@
* in case of a bank made of multiple chips,
* the individual values are ORed
*/
-static u8 cfi_get_u8(flash_bank_t *bank, int sector, u32 offset)
+static uint8_t cfi_get_u8(flash_bank_t *bank, int sector, u32 offset)
{
target_t *target = bank->target;
- u8 data[CFI_MAX_BUS_WIDTH];
+ uint8_t data[CFI_MAX_BUS_WIDTH];
int i;
target_read_memory(target, flash_address(bank, sector, offset), bank->bus_width, 1, data);
@@ -195,7 +195,7 @@
}
else
{
- u8 value = 0;
+ uint8_t value = 0;
for (i = 0; i < bank->bus_width / bank->chip_width; i++)
value |= data[bank->bus_width - 1 - i];
@@ -207,11 +207,11 @@
{
target_t *target = bank->target;
cfi_flash_bank_t *cfi_info = bank->driver_priv;
- u8 data[CFI_MAX_BUS_WIDTH * 2];
+ uint8_t data[CFI_MAX_BUS_WIDTH * 2];
if(cfi_info->x16_as_x8)
{
- u8 i;
+ uint8_t i;
for(i=0;i<2;i++)
target_read_memory(target, flash_address(bank, sector, offset+i), bank->bus_width, 1,
&data[i*bank->bus_width] );
@@ -229,11 +229,11 @@
{
target_t *target = bank->target;
cfi_flash_bank_t *cfi_info = bank->driver_priv;
- u8 data[CFI_MAX_BUS_WIDTH * 4];
+ uint8_t data[CFI_MAX_BUS_WIDTH * 4];
if(cfi_info->x16_as_x8)
{
- u8 i;
+ uint8_t i;
for(i=0;i<4;i++)
target_read_memory(target, flash_address(bank, sector, offset+i), bank->bus_width, 1,
&data[i*bank->bus_width] );
@@ -251,7 +251,7 @@
static void cfi_intel_clear_status_register(flash_bank_t *bank)
{
target_t *target = bank->target;
- u8 command[8];
+ uint8_t command[8];
if (target->state != TARGET_HALTED)
{
@@ -263,9 +263,9 @@
target_write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command);
}
-u8 cfi_intel_wait_status_busy(flash_bank_t *bank, int timeout)
+uint8_t cfi_intel_wait_status_busy(flash_bank_t *bank, int timeout)
{
- u8 status;
+ uint8_t status;
while ((!((status = cfi_get_u8(bank, 0, 0x0)) & 0x80)) && (timeout-- > 0))
{
@@ -306,7 +306,7 @@
int cfi_spansion_wait_status_busy(flash_bank_t *bank, int timeout)
{
- u8 status, oldstatus;
+ uint8_t status, oldstatus;
cfi_flash_bank_t *cfi_info = bank->driver_priv;
oldstatus = cfi_get_u8(bank, 0, 0x0);
@@ -345,7 +345,7 @@
cfi_flash_bank_t *cfi_info = bank->driver_priv;
cfi_intel_pri_ext_t *pri_ext = malloc(sizeof(cfi_intel_pri_ext_t));
target_t *target = bank->target;
- u8 command[8];
+ uint8_t command[8];
cfi_info->pri_ext = pri_ext;
@@ -408,7 +408,7 @@
cfi_flash_bank_t *cfi_info = bank->driver_priv;
cfi_spansion_pri_ext_t *pri_ext = malloc(sizeof(cfi_spansion_pri_ext_t));
target_t *target = bank->target;
- u8 command[8];
+ uint8_t command[8];
cfi_info->pri_ext = pri_ext;
@@ -474,7 +474,7 @@
cfi_flash_bank_t *cfi_info = bank->driver_priv;
cfi_spansion_pri_ext_t *pri_ext = malloc(sizeof(cfi_spansion_pri_ext_t));
target_t *target = bank->target;
- u8 command[8];
+ uint8_t command[8];
/* ATMEL devices use the same CFI primary command set (0x2) as AMD/Spansion,
* but a different primary extended query table.
@@ -680,7 +680,7 @@
int retval;
cfi_flash_bank_t *cfi_info = bank->driver_priv;
target_t *target = bank->target;
- u8 command[8];
+ uint8_t command[8];
int i;
cfi_intel_clear_status_register(bank);
@@ -725,7 +725,7 @@
cfi_flash_bank_t *cfi_info = bank->driver_priv;
cfi_spansion_pri_ext_t *pri_ext = cfi_info->pri_ext;
target_t *target = bank->target;
- u8 command[8];
+ uint8_t command[8];
int i;
for (i = first; i <= last; i++)
@@ -826,7 +826,7 @@
cfi_flash_bank_t *cfi_info = bank->driver_priv;
cfi_intel_pri_ext_t *pri_ext = cfi_info->pri_ext;
target_t *target = bank->target;
- u8 command[8];
+ uint8_t command[8];
int retry = 0;
int i;
@@ -875,7 +875,7 @@
}
else
{
- u8 block_status;
+ uint8_t block_status;
/* read block lock bit, to verify status */
cfi_command(bank, 0x90, command);
if((retval = target_write_memory(target, flash_address(bank, 0, 0x55), bank->bus_width, 1, command)) != ERROR_OK)
@@ -970,7 +970,7 @@
}
/* FIXME Replace this by a simple memcpy() - still unsure about sideeffects */
-static void cfi_add_byte(struct flash_bank_s *bank, u8 *word, u8 byte)
+static void cfi_add_byte(struct flash_bank_s *bank, uint8_t *word, uint8_t byte)
{
/* target_t *target = bank->target; */
@@ -1005,7 +1005,7 @@
/* Convert code image to target endian */
/* FIXME create general block conversion fcts in target.c?) */
-static void cfi_fix_code_endian(target_t *target, u8 *dest, const u32 *src, u32 count)
+static void cfi_fix_code_endian(target_t *target, uint8_t *dest, const u32 *src, u32 count)
{
u32 i;
for (i=0; i< count; i++)
@@ -1016,11 +1016,11 @@
}
}
-static u32 cfi_command_val(flash_bank_t *bank, u8 cmd)
+static u32 cfi_command_val(flash_bank_t *bank, uint8_t cmd)
{
target_t *target = bank->target;
- u8 buf[CFI_MAX_BUS_WIDTH];
+ uint8_t buf[CFI_MAX_BUS_WIDTH];
cfi_command(bank, cmd, buf);
switch (bank->bus_width)
{
@@ -1039,7 +1039,7 @@
}
}
-static int cfi_intel_write_block(struct flash_bank_s *bank, u8 *buffer, u32 address, u32 count)
+static int cfi_intel_write_block(struct flash_bank_s *bank, uint8_t *buffer, u32 address, u32 count)
{
cfi_flash_bank_t *cfi_info = bank->driver_priv;
target_t *target = bank->target;
@@ -1109,7 +1109,7 @@
0xeafffff2, /* b loop */
0xeafffffe /* done: b -2 */
};
- u8 target_code[4*CFI_MAX_INTEL_CODESIZE];
+ uint8_t target_code[4*CFI_MAX_INTEL_CODESIZE];
const u32 *target_code_src;
u32 target_code_size;
int retval = ERROR_OK;
@@ -1283,7 +1283,7 @@
return retval;
}
-static int cfi_spansion_write_block(struct flash_bank_s *bank, u8 *buffer, u32 address, u32 count)
+static int cfi_spansion_write_block(struct flash_bank_s *bank, uint8_t *buffer, u32 address, u32 count)
{
cfi_flash_bank_t *cfi_info = bank->driver_priv;
cfi_spansion_pri_ext_t *pri_ext = cfi_info->pri_ext;
@@ -1422,7 +1422,7 @@
/* flash write code */
if (!cfi_info->write_algorithm)
{
- u8 *target_code;
+ uint8_t *target_code;
int target_code_size;
const u32 *src;
@@ -1545,12 +1545,12 @@
return exit_code;
}
-static int cfi_intel_write_word(struct flash_bank_s *bank, u8 *word, u32 address)
+static int cfi_intel_write_word(struct flash_bank_s *bank, uint8_t *word, u32 address)
{
int retval;
cfi_flash_bank_t *cfi_info = bank->driver_priv;
target_t *target = bank->target;
- u8 command[8];
+ uint8_t command[8];
cfi_intel_clear_status_register(bank);
cfi_command(bank, 0x40, command);
@@ -1579,12 +1579,12 @@
return ERROR_OK;
}
-static int cfi_intel_write_words(struct flash_bank_s *bank, u8 *word, u32 wordcount, u32 address)
+static int cfi_intel_write_words(struct flash_bank_s *bank, uint8_t *word, u32 wordcount, u32 address)
{
int retval;
cfi_flash_bank_t *cfi_info = bank->driver_priv;
target_t *target = bank->target;
- u8 command[8];
+ uint8_t command[8];
/* Calculate buffer size and boundary mask */
u32 buffersize = (1UL << cfi_info->max_buf_write_size) * (bank->bus_width / bank->chip_width);
@@ -1671,13 +1671,13 @@
return ERROR_OK;
}
-static int cfi_spansion_write_word(struct flash_bank_s *bank, u8 *word, u32 address)
+static int cfi_spansion_write_word(struct flash_bank_s *bank, uint8_t *word, u32 address)
{
int retval;
cfi_flash_bank_t *cfi_info = bank->driver_priv;
cfi_spansion_pri_ext_t *pri_ext = cfi_info->pri_ext;
target_t *target = bank->target;
- u8 command[8];
+ uint8_t command[8];
cfi_command(bank, 0xaa, command);
if((retval = target_write_memory(target, flash_address(bank, 0, pri_ext->_unlock1), bank->bus_width, 1, command)) != ERROR_OK)
@@ -1717,12 +1717,12 @@
return ERROR_OK;
}
-static int cfi_spansion_write_words(struct flash_bank_s *bank, u8 *word, u32 wordcount, u32 address)
+static int cfi_spansion_write_words(struct flash_bank_s *bank, uint8_t *word, u32 wordcount, u32 address)
{
int retval;
cfi_flash_bank_t *cfi_info = bank->driver_priv;
target_t *target = bank->target;
- u8 command[8];
+ uint8_t command[8];
cfi_spansion_pri_ext_t *pri_ext = cfi_info->pri_ext;
/* Calculate buffer size and boundary mask */
@@ -1809,7 +1809,7 @@
return ERROR_OK;
}
-static int cfi_write_word(struct flash_bank_s *bank, u8 *word, u32 address)
+static int cfi_write_word(struct flash_bank_s *bank, uint8_t *word, u32 address)
{
cfi_flash_bank_t *cfi_info = bank->driver_priv;
@@ -1830,7 +1830,7 @@
return ERROR_FLASH_OPERATION_FAILED;
}
-static int cfi_write_words(struct flash_bank_s *bank, u8 *word, u32 wordcount, u32 address)
+static int cfi_write_words(struct flash_bank_s *bank, uint8_t *word, u32 wordcount, u32 address)
{
cfi_flash_bank_t *cfi_info = bank->driver_priv;
@@ -1851,7 +1851,7 @@
return ERROR_FLASH_OPERATION_FAILED;
}
-int cfi_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count)
+int cfi_write(struct flash_bank_s *bank, uint8_t *buffer, u32 offset, u32 count)
{
cfi_flash_bank_t *cfi_info = bank->driver_priv;
target_t *target = bank->target;
@@ -1859,7 +1859,7 @@
u32 write_p, copy_p;
int align; /* number of unaligned bytes */
int blk_count; /* number of bus_width bytes for block copy */
- u8 current_word[CFI_MAX_BUS_WIDTH * 4]; /* word (bus_width size) currently being programmed */
+ uint8_t current_word[CFI_MAX_BUS_WIDTH * 4]; /* word (bus_width size) currently being programmed */
int i;
int retval;
@@ -1888,7 +1888,7 @@
/* copy bytes before the first write address */
for (i = 0; i < align; ++i, ++copy_p)
{
- u8 byte;
+ uint8_t byte;
if((retval = target_read_memory(target, copy_p, 1, 1, &byte)) != ERROR_OK)
{
return retval;
@@ -1907,7 +1907,7 @@
/* if the buffer is already finished, copy bytes after the last write address */
for (; (count == 0) && (i < bank->bus_width); ++i, ++copy_p)
{
- u8 byte;
+ uint8_t byte;
if((retval = target_read_memory(target, copy_p, 1, 1, &byte)) != ERROR_OK)
{
return retval;
@@ -2038,7 +2038,7 @@
}
for (; i < bank->bus_width; ++i, ++copy_p)
{
- u8 byte;
+ uint8_t byte;
if((retval = target_read_memory(target, copy_p, 1, 1, &byte)) != ERROR_OK)
{
return retval;
@@ -2106,7 +2106,7 @@
{
cfi_flash_bank_t *cfi_info = bank->driver_priv;
target_t *target = bank->target;
- u8 command[8];
+ uint8_t command[8];
int num_sectors = 0;
int i;
int sector = 0;
@@ -2150,7 +2150,7 @@
if (bank->chip_width == 1)
{
- u8 manufacturer, device_id;
+ uint8_t manufacturer, device_id;
if((retval = target_read_u8(target, flash_address(bank, 0, 0x00), &manufacturer)) != ERROR_OK)
{
return retval;
@@ -2402,7 +2402,7 @@
cfi_flash_bank_t *cfi_info = bank->driver_priv;
cfi_intel_pri_ext_t *pri_ext = cfi_info->pri_ext;
target_t *target = bank->target;
- u8 command[CFI_MAX_BUS_WIDTH];
+ uint8_t command[CFI_MAX_BUS_WIDTH];
int i;
/* check if block lock bits are supported on this device */
@@ -2417,7 +2417,7 @@
for (i = 0; i < bank->num_sectors; i++)
{
- u8 block_status = cfi_get_u8(bank, i, 0x2);
+ uint8_t block_status = cfi_get_u8(bank, i, 0x2);
if (block_status & 1)
bank->sectors[i].is_protected = 1;
@@ -2435,7 +2435,7 @@
cfi_flash_bank_t *cfi_info = bank->driver_priv;
cfi_spansion_pri_ext_t *pri_ext = cfi_info->pri_ext;
target_t *target = bank->target;
- u8 command[8];
+ uint8_t command[8];
int i;
cfi_command(bank, 0xaa, command);
@@ -2458,7 +2458,7 @@
for (i = 0; i < bank->num_sectors; i++)
{
- u8 block_status = cfi_get_u8(bank, i, 0x2);
+ uint8_t block_status = cfi_get_u8(bank, i, 0x2);
if (block_status & 1)
bank->sectors[i].is_protected = 1;
Modified: trunk/src/flash/cfi.h
===================================================================
--- trunk/src/flash/cfi.h 2009-06-18 07:04:08 UTC (rev 2274)
+++ trunk/src/flash/cfi.h 2009-06-18 07:06:25 UTC (rev 2275)
@@ -46,26 +46,26 @@
u16 alt_addr;
/* device-system interface */
- u8 vcc_min;
- u8 vcc_max;
- u8 vpp_min;
- u8 vpp_max;
- u8 word_write_timeout_typ;
- u8 buf_write_timeout_typ;
- u8 block_erase_timeout_typ;
- u8 chip_erase_timeout_typ;
- u8 word_write_timeout_max;
- u8 buf_write_timeout_max;
- u8 block_erase_timeout_max;
- u8 chip_erase_timeout_max;
+ uint8_t vcc_min;
+ uint8_t vcc_max;
+ uint8_t vpp_min;
+ uint8_t vpp_max;
+ uint8_t word_write_timeout_typ;
+ uint8_t buf_write_timeout_typ;
+ uint8_t block_erase_timeout_typ;
+ uint8_t chip_erase_timeout_typ;
+ uint8_t word_write_timeout_max;
+ uint8_t buf_write_timeout_max;
+ uint8_t block_erase_timeout_max;
+ uint8_t chip_erase_timeout_max;
- u8 status_poll_mask;
+ uint8_t status_poll_mask;
/* flash geometry */
u32 dev_size;
u16 interface_desc;
u16 max_buf_write_size;
- u8 num_erase_regions;
+ uint8_t num_erase_regions;
u32 *erase_region_info;
void *pri_ext;
@@ -79,18 +79,18 @@
typedef struct cfi_intel_pri_ext_s
{
char pri[3];
- u8 major_version;
- u8 minor_version;
+ uint8_t major_version;
+ uint8_t minor_version;
u32 feature_support;
- u8 suspend_cmd_support;
+ uint8_t suspend_cmd_support;
u16 blk_status_reg_mask;
- u8 vcc_optimal;
- u8 vpp_optimal;
- u8 num_protection_fields;
+ uint8_t vcc_optimal;
+ uint8_t vpp_optimal;
+ uint8_t num_protection_fields;
u16 prot_reg_addr;
- u8 fact_prot_reg_size;
- u8 user_prot_reg_size;
- u8 extra[0];
+ uint8_t fact_prot_reg_size;
+ uint8_t user_prot_reg_size;
+ uint8_t extra[0];
} cfi_intel_pri_ext_t;
/* Spansion primary extended query table as defined for and used by
@@ -98,20 +98,20 @@
*/
typedef struct cfi_spansion_pri_ext_s
{
- u8 pri[3];
- u8 major_version;
- u8 minor_version;
- u8 SiliconRevision; /* bits 1-0: Address Sensitive Unlock */
- u8 EraseSuspend;
- u8 BlkProt;
- u8 TmpBlkUnprotect;
- u8 BlkProtUnprot;
- u8 SimultaneousOps;
- u8 BurstMode;
- u8 PageMode;
- u8 VppMin;
- u8 VppMax;
- u8 TopBottom;
+ uint8_t pri[3];
+ uint8_t major_version;
+ uint8_t minor_version;
+ uint8_t SiliconRevision; /* bits 1-0: Address Sensitive Unlock */
+ uint8_t EraseSuspend;
+ uint8_t BlkProt;
+ uint8_t TmpBlkUnprotect;
+ uint8_t BlkProtUnprot;
+ uint8_t SimultaneousOps;
+ uint8_t BurstMode;
+ uint8_t PageMode;
+ uint8_t VppMin;
+ uint8_t VppMax;
+ uint8_t TopBottom;
int _reversed_geometry;
u32 _unlock1;
u32 _unlock2;
@@ -122,13 +122,13 @@
*/
typedef struct cfi_atmel_pri_ext_s
{
- u8 pri[3];
- u8 major_version;
- u8 minor_version;
- u8 features;
- u8 bottom_boot;
- u8 burst_mode;
- u8 page_mode;
+ uint8_t pri[3];
+ uint8_t major_version;
+ uint8_t minor_version;
+ uint8_t features;
+ uint8_t bottom_boot;
+ uint8_t burst_mode;
+ uint8_t page_mode;
} cfi_atmel_pri_ext_t;
enum {
Modified: trunk/src/flash/davinci_nand.c
===================================================================
--- trunk/src/flash/davinci_nand.c 2009-06-18 07:04:08 UTC (rev 2274)
+++ trunk/src/flash/davinci_nand.c 2009-06-18 07:06:25 UTC (rev 2275)
@@ -40,8 +40,8 @@
struct davinci_nand {
target_t *target;
- u8 chipsel; /* chipselect 0..3 == CS2..CS5 */
- u8 eccmode;
+ uint8_t chipsel; /* chipselect 0..3 == CS2..CS5 */
+ uint8_t eccmode;
/* Async EMIF controller base */
u32 aemif;
@@ -53,9 +53,9 @@
/* page i/o for the relevant flavor of hardware ECC */
int (*read_page)(struct nand_device_s *nand, u32 page,
- u8 *data, u32 data_size, u8 *oob, u32 oob_size);
+ uint8_t *data, u32 data_size, uint8_t *oob, u32 oob_size);
int (*write_page)(struct nand_device_s *nand, u32 page,
- u8 *data, u32 data_size, u8 *oob, u32 oob_size);
+ uint8_t *data, u32 data_size, uint8_t *oob, u32 oob_size);
};
#define NANDFCR 0x60 /* flash control register */
@@ -133,7 +133,7 @@
return 0;
}
-static int davinci_command(struct nand_device_s *nand, u8 command)
+static int davinci_command(struct nand_device_s *nand, uint8_t command)
{
struct davinci_nand *info = nand->controller_priv;
target_t *target = info->target;
@@ -145,7 +145,7 @@
return ERROR_OK;
}
-static int davinci_address(struct nand_device_s *nand, u8 address)
+static int davinci_address(struct nand_device_s *nand, uint8_t address)
{
struct davinci_nand *info = nand->controller_priv;
target_t *target = info->target;
@@ -184,7 +184,7 @@
/* REVISIT a bit of native code should let block I/O be MUCH faster */
static int davinci_read_block_data(struct nand_device_s *nand,
- u8 *data, int data_size)
+ uint8_t *data, int data_size)
{
struct davinci_nand *info = nand->controller_priv;
target_t *target = info->target;
@@ -217,7 +217,7 @@
}
static int davinci_write_block_data(struct nand_device_s *nand,
- u8 *data, int data_size)
+ uint8_t *data, int data_size)
{
struct davinci_nand *info = nand->controller_priv;
target_t *target = info->target;
@@ -246,10 +246,10 @@
}
static int davinci_write_page(struct nand_device_s *nand, u32 page,
- u8 *data, u32 data_size, u8 *oob, u32 oob_size)
+ uint8_t *data, u32 data_size, uint8_t *oob, u32 oob_size)
{
struct davinci_nand *info = nand->controller_priv;
- u8 *ooballoc = NULL;
+ uint8_t *ooballoc = NULL;
int status;
if (!nand->device)
@@ -291,7 +291,7 @@
}
static int davinci_read_page(struct nand_device_s *nand, u32 page,
- u8 *data, u32 data_size, u8 *oob, u32 oob_size)
+ uint8_t *data, u32 data_size, uint8_t *oob, u32 oob_size)
{
struct davinci_nand *info = nand->controller_priv;
@@ -303,7 +303,7 @@
return info->read_page(nand, page, data, data_size, oob, oob_size);
}
-static void davinci_write_pagecmd(struct nand_device_s *nand, u8 cmd, u32 page)
+static void davinci_write_pagecmd(struct nand_device_s *nand, uint8_t cmd, u32 page)
{
struct davinci_nand *info = nand->controller_priv;
target_t *target = info->target;
@@ -327,11 +327,11 @@
}
static int davinci_writepage_tail(struct nand_device_s *nand,
- u8 *oob, u32 oob_size)
+ uint8_t *oob, u32 oob_size)
{
struct davinci_nand *info = nand->controller_priv;
target_t *target = info->target;
- u8 status;
+ uint8_t status;
if (oob_size)
davinci_write_block_data(nand, oob, oob_size);
@@ -359,7 +359,7 @@
* All DaVinci family chips support 1-bit ECC on a per-chipselect basis.
*/
static int davinci_write_page_ecc1(struct nand_device_s *nand, u32 page,
- u8 *data, u32 data_size, u8 *oob, u32 oob_size)
+ uint8_t *data, u32 data_size, uint8_t *oob, u32 oob_size)
{
unsigned oob_offset;
struct davinci_nand *info = nand->controller_priv;
@@ -409,9 +409,9 @@
ecc1 = ~ecc1;
/* save correct ECC code into oob data */
- oob[oob_offset++] = (u8)(ecc1);
- oob[oob_offset++] = (u8)(ecc1 >> 8);
- oob[oob_offset++] = (u8)(ecc1 >> 16);
+ oob[oob_offset++] = (uint8_t)(ecc1);
+ oob[oob_offset++] = (uint8_t)(ecc1 >> 8);
+ oob[oob_offset++] = (uint8_t)(ecc1 >> 16);
} while (data_size);
@@ -426,19 +426,19 @@
* manufacturer bad block markers are safe. Contrast: old "infix" style.
*/
static int davinci_write_page_ecc4(struct nand_device_s *nand, u32 page,
- u8 *data, u32 data_size, u8 *oob, u32 oob_size)
+ uint8_t *data, u32 data_size, uint8_t *oob, u32 oob_size)
{
- static const u8 ecc512[] = {
+ static const uint8_t ecc512[] = {
0, 1, 2, 3, 4, /* 5== mfr badblock */
6, 7, /* 8..12 for BBT or JFFS2 */ 13, 14, 15,
};
- static const u8 ecc2048[] = {
+ static const uint8_t ecc2048[] = {
24, 25, 26, 27, 28, 29, 30, 31, 32, 33,
34, 35, 36, 37, 38, 39, 40, 41, 42, 43,
44, 45, 46, 47, 48, 49, 50, 51, 52, 53,
54, 55, 56, 57, 58, 59, 60, 61, 62, 63,
};
- static const u8 ecc4096[] = {
+ static const uint8_t ecc4096[] = {
48, 49, 50, 51, 52, 53, 54, 55, 56, 57,
58, 59, 60, 61, 62, 63, 64, 65, 66, 67,
68, 69, 70, 71, 72, 73, 74, 75, 76, 77,
@@ -450,7 +450,7 @@
};
struct davinci_nand *info = nand->controller_priv;
- const u8 *l;
+ const uint8_t *l;
target_t *target = info->target;
const u32 fcr_addr = info->aemif + NANDFCR;
const u32 ecc4_addr = info->aemif + NAND4BITECC;
@@ -528,7 +528,7 @@
* (MVL 4.x/5.x kernels, filesystems, etc) may need it more generally.
*/
static int davinci_write_page_ecc4infix(struct nand_device_s *nand, u32 page,
- u8 *data, u32 data_size, u8 *oob, u32 oob_size)
+ uint8_t *data, u32 data_size, uint8_t *oob, u32 oob_size)
{
struct davinci_nand *info = nand->controller_priv;
target_t *target = info->target;
@@ -547,7 +547,7 @@
do {
u32 raw_ecc[4], *p;
- u8 *l;
+ uint8_t *l;
int i;
/* start 4bit ecc on csX */
@@ -585,7 +585,7 @@
}
static int davinci_read_page_ecc4infix(struct nand_device_s *nand, u32 page,
- u8 *data, u32 data_size, u8 *oob, u32 oob_size)
+ uint8_t *data, u32 data_size, uint8_t *oob, u32 oob_size)
{
davinci_write_pagecmd(nand, NAND_CMD_READ0, page);
Modified: trunk/src/flash/ecos.c
===================================================================
--- trunk/src/flash/ecos.c 2009-06-18 07:04:08 UTC (rev 2274)
+++ trunk/src/flash/ecos.c 2009-06-18 07:06:25 UTC (rev 2275)
@@ -30,7 +30,7 @@
static int ecosflash_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank);
static int ecosflash_erase(struct flash_bank_s *bank, int first, int last);
static int ecosflash_protect(struct flash_bank_s *bank, int set, int first, int last);
-static int ecosflash_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count);
+static int ecosflash_write(struct flash_bank_s *bank, uint8_t *buffer, u32 offset, u32 count);
static int ecosflash_probe(struct flash_bank_s *bank);
static int ecosflash_protect_check(struct flash_bank_s *bank);
static int ecosflash_info(struct flash_bank_s *bank, char *buf, int buf_size);
@@ -328,7 +328,7 @@
}
int retval;
- retval=target_write_buffer(target, buffer, t, ((u8 *)data)+i);
+ retval=target_write_buffer(target, buffer, t, ((uint8_t *)data)+i);
if (retval != ERROR_OK)
return retval;
@@ -366,7 +366,7 @@
}
#if 0
-static void command(flash_bank_t *bank, u8 cmd, u8 *cmd_buf)
+static void command(flash_bank_t *bank, uint8_t cmd, uint8_t *cmd_buf)
{
ecosflash_flash_bank_t *info = bank->driver_priv;
int i;
@@ -418,7 +418,7 @@
return ERROR_OK;
}
-static int ecosflash_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count)
+static int ecosflash_write(struct flash_bank_s *bank, uint8_t *buffer, u32 offset, u32 count)
{
ecosflash_flash_bank_t *info = bank->driver_priv;
struct flash_bank_s *c=bank;
Modified: trunk/src/flash/flash.c
===================================================================
--- trunk/src/flash/flash.c 2009-06-18 07:04:08 UTC (rev 2274)
+++ trunk/src/flash/flash.c 2009-06-18 07:06:25 UTC (rev 2275)
@@ -85,7 +85,7 @@
static command_t *flash_cmd;
/* wafer thin wrapper for invoking the flash driver */
-static int flash_driver_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count)
+static int flash_driver_write(struct flash_bank_s *bank, uint8_t *buffer, u32 offset, u32 count)
{
int retval;
@@ -710,8 +710,8 @@
u32 address;
u32 pattern;
u32 count;
- u8 chunk[1024];
- u8 readback[1024];
+ uint8_t chunk[1024];
+ uint8_t readback[1024];
u32 wrote = 0;
u32 cur_size = 0;
u32 chunk_count;
@@ -823,7 +823,7 @@
static int handle_flash_write_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
{
u32 offset;
- u8 *buffer;
+ uint8_t *buffer;
u32 buf_cnt;
fileio_t fileio;
@@ -1004,7 +1004,7 @@
while (section < image->num_sections)
{
u32 buffer_size;
- u8 *buffer;
+ uint8_t *buffer;
int section_first;
int section_last;
u32 run_address = image->sections[section].base_address + section_offset;
@@ -1129,7 +1129,7 @@
int default_flash_mem_blank_check(struct flash_bank_s *bank)
{
target_t *target = bank->target;
- u8 buffer[1024];
+ uint8_t buffer[1024];
int buffer_size = sizeof(buffer);
int i;
u32 nBytes;
Modified: trunk/src/flash/flash.h
===================================================================
--- trunk/src/flash/flash.h 2009-06-18 07:04:08 UTC (rev 2274)
+++ trunk/src/flash/flash.h 2009-06-18 07:06:25 UTC (rev 2275)
@@ -166,7 +166,7 @@
* @param count The number of bytes to write.
* @returns ERROR_OK if successful; otherwise, an error code.
*/
- int (*write)(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count);
+ int (*write)(struct flash_bank_s *bank, uint8_t *buffer, u32 offset, u32 count);
/**
* Probe to determine what kind of flash is present.
Modified: trunk/src/flash/lpc2000.c
===================================================================
--- trunk/src/flash/lpc2000.c 2009-06-18 07:04:08 UTC (rev 2274)
+++ trunk/src/flash/lpc2000.c 2009-06-18 07:06:25 UTC (rev 2275)
@@ -49,7 +49,7 @@
static int lpc2000_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank);
static int lpc2000_erase(struct flash_bank_s *bank, int first, int last);
static int lpc2000_protect(struct flash_bank_s *bank, int set, int first, int last);
-static int lpc2000_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count);
+static int lpc2000_write(struct flash_bank_s *bank, uint8_t *buffer, u32 offset, u32 count);
static int lpc2000_probe(struct flash_bank_s *bank);
static int lpc2000_erase_check(struct flash_bank_s *bank);
static int lpc2000_protect_check(struct flash_bank_s *bank);
@@ -246,7 +246,7 @@
/* regrab previously allocated working_area, or allocate a new one */
if (!lpc2000_info->iap_working_area)
{
- u8 jump_gate[8];
+ uint8_t jump_gate[8];
/* make sure we have a working area */
if (target_alloc_working_area(target, 172, &lpc2000_info->iap_working_area) != ERROR_OK)
@@ -465,7 +465,7 @@
return ERROR_OK;
}
-static int lpc2000_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count)
+static int lpc2000_write(struct flash_bank_s *bank, uint8_t *buffer, u32 offset, u32 count)
{
lpc2000_flash_bank_t *lpc2000_info = bank->driver_priv;
target_t *target = bank->target;
@@ -589,7 +589,7 @@
}
else
{
- u8 *last_buffer = malloc(thisrun_bytes);
+ uint8_t *last_buffer = malloc(thisrun_bytes);
u32 i;
memcpy(last_buffer, buffer + bytes_written, bytes_remaining);
for (i = bytes_remaining; i < thisrun_bytes; i++)
Modified: trunk/src/flash/lpc288x.c
===================================================================
--- trunk/src/flash/lpc288x.c 2009-06-18 07:04:08 UTC (rev 2274)
+++ trunk/src/flash/lpc288x.c 2009-06-18 07:06:25 UTC (rev 2275)
@@ -88,7 +88,7 @@
static int lpc288x_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank);
static int lpc288x_erase(struct flash_bank_s *bank, int first, int last);
static int lpc288x_protect(struct flash_bank_s *bank, int set, int first, int last);
-static int lpc288x_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count);
+static int lpc288x_write(struct flash_bank_s *bank, uint8_t *buffer, u32 offset, u32 count);
static int lpc288x_probe(struct flash_bank_s *bank);
static int lpc288x_erase_check(struct flash_bank_s *bank);
static int lpc288x_protect_check(struct flash_bank_s *bank);
@@ -315,9 +315,9 @@
return ERROR_OK;
}
-static int lpc288x_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count)
+static int lpc288x_write(struct flash_bank_s *bank, uint8_t *buffer, u32 offset, u32 count)
{
- u8 page_buffer[FLASH_PAGE_SIZE];
+ uint8_t page_buffer[FLASH_PAGE_SIZE];
u32 status, source_offset,dest_offset;
target_t *target = bank->target;
u32 bytes_remaining = count;
Modified: trunk/src/flash/lpc3180_nand_controller.c
===================================================================
--- trunk/src/flash/lpc3180_nand_controller.c 2009-06-18 07:04:08 UTC (rev 2274)
+++ trunk/src/flash/lpc3180_nand_controller.c 2009-06-18 07:06:25 UTC (rev 2275)
@@ -28,12 +28,12 @@
static int lpc3180_register_commands(struct command_context_s *cmd_ctx);
static int lpc3180_init(struct nand_device_s *device);
static int lpc3180_reset(struct nand_device_s *device);
-static int lpc3180_command(struct nand_device_s *device, u8 command);
-static int lpc3180_address(struct nand_device_s *device, u8 address);
+static int lpc3180_command(struct nand_device_s *device, uint8_t command);
+static int lpc3180_address(struct nand_device_s *device, uint8_t address);
static int lpc3180_write_data(struct nand_device_s *device, u16 data);
static int lpc3180_read_data(struct nand_device_s *device, void *data);
-static int lpc3180_write_page(struct nand_device_s *device, u32 page, u8 *data, u32 data_size, u8 *oob, u32 oob_size);
-static int lpc3180_read_page(struct nand_device_s *device, u32 page, u8 *data, u32 data_size, u8 *oob, u32 oob_size);
+static int lpc3180_write_page(struct nand_device_s *device, u32 page, uint8_t *data, u32 data_size, uint8_t *oob, u32 oob_size);
+static int lpc3180_read_page(struct nand_device_s *device, u32 page, uint8_t *data, u32 data_size, uint8_t *oob, u32 oob_size);
static int lpc3180_controller_ready(struct nand_device_s *device, int timeout);
static int lpc3180_nand_ready(struct nand_device_s *device, int timeout);
@@ -350,7 +350,7 @@
return ERROR_OK;
}
-static int lpc3180_command(struct nand_device_s *device, u8 command)
+static int lpc3180_command(struct nand_device_s *device, uint8_t command)
{
lpc3180_nand_controller_t *lpc3180_info = device->controller_priv;
target_t *target = lpc3180_info->target;
@@ -380,7 +380,7 @@
return ERROR_OK;
}
-static int lpc3180_address(struct nand_device_s *device, u8 address)
+static int lpc3180_address(struct nand_device_s *device, uint8_t address)
{
lpc3180_nand_controller_t *lpc3180_info = device->controller_priv;
target_t *target = lpc3180_info->target;
@@ -461,7 +461,7 @@
/* data = MLC_DATA, use sized access */
if (device->bus_width == 8)
{
- u8 *data8 = data;
+ uint8_t *data8 = data;
target_read_u8(target, 0x200b0000, data8);
}
else if (device->bus_width == 16)
@@ -484,7 +484,7 @@
if (device->bus_width == 8)
{
- u8 *data8 = data;
+ uint8_t *data8 = data;
*data8 = data32 & 0xff;
}
else if (device->bus_width == 16)
@@ -502,12 +502,12 @@
return ERROR_OK;
}
-static int lpc3180_write_page(struct nand_device_s *device, u32 page, u8 *data, u32 data_size, u8 *oob, u32 oob_size)
+static int lpc3180_write_page(struct nand_device_s *device, u32 page, uint8_t *data, u32 data_size, uint8_t *oob, u32 oob_size)
{
lpc3180_nand_controller_t *lpc3180_info = device->controller_priv;
target_t *target = lpc3180_info->target;
int retval;
- u8 status;
+ uint8_t status;
if (target->state != TARGET_HALTED)
{
@@ -522,8 +522,8 @@
}
else if (lpc3180_info->selected_controller == LPC3180_MLC_CONTROLLER)
{
- u8 *page_buffer;
- u8 *oob_buffer;
+ uint8_t *page_buffer;
+ uint8_t *oob_buffer;
int quarter, num_quarters;
if (!data && oob)
@@ -641,7 +641,7 @@
return ERROR_OK;
}
-static int lpc3180_read_page(struct nand_device_s *device, u32 page, u8 *data, u32 data_size, u8 *oob, u32 oob_size)
+static int lpc3180_read_page(struct nand_device_s *device, u32 page, uint8_t *data, u32 data_size, uint8_t *oob, u32 oob_size)
{
lpc3180_nand_controller_t *lpc3180_info = device->controller_priv;
target_t *target = lpc3180_info->target;
@@ -659,8 +659,8 @@
}
else if (lpc3180_info->selected_controller == LPC3180_MLC_CONTROLLER)
{
- u8 *page_buffer;
- u8 *oob_buffer;
+ uint8_t *page_buffer;
+ uint8_t *oob_buffer;
u32 page_bytes_done = 0;
u32 oob_bytes_done = 0;
u32 mlc_isr;
@@ -792,7 +792,7 @@
{
lpc3180_nand_controller_t *lpc3180_info = device->controller_priv;
target_t *target = lpc3180_info->target;
- u8 status = 0x0;
+ uint8_t status = 0x0;
if (target->state != TARGET_HALTED)
{
@@ -837,7 +837,7 @@
{
if (lpc3180_info->selected_controller == LPC3180_MLC_CONTROLLER)
{
- u8 status = 0x0;
+ uint8_t status = 0x0;
/* Read MLC_ISR, wait for NAND flash device to become ready */
target_read_u8(target, 0x200b8048, &status);
Modified: trunk/src/flash/mflash.c
===================================================================
--- trunk/src/flash/mflash.c 2009-06-18 07:04:08 UTC (rev 2274)
+++ trunk/src/flash/mflash.c 2009-06-18 07:06:25 UTC (rev 2275)
@@ -28,9 +28,9 @@
static int s3c2440_set_gpio_to_output (mflash_gpio_num_t gpio);
-static int s3c2440_set_gpio_output_val (mflash_gpio_num_t gpio, u8 val);
+static int s3c2440_set_gpio_output_val (mflash_gpio_num_t gpio, uint8_t val);
static int pxa270_set_gpio_to_output (mflash_gpio_num_t gpio);
-static int pxa270_set_gpio_output_val (mflash_gpio_num_t gpio, u8 val);
+static int pxa270_set_gpio_output_val (mflash_gpio_num_t gpio, uint8_t val);
static command_t *mflash_cmd;
@@ -101,7 +101,7 @@
return ret;
}
-static int pxa270_set_gpio_output_val (mflash_gpio_num_t gpio, u8 val)
+static int pxa270_set_gpio_output_val (mflash_gpio_num_t gpio, uint8_t val)
{
u32 addr, value, mask;
target_t *target = mflash_bank->target;
@@ -162,7 +162,7 @@
return ret;
}
-static int s3c2440_set_gpio_output_val (mflash_gpio_num_t gpio, u8 val)
+static int s3c2440_set_gpio_output_val (mflash_gpio_num_t gpio, uint8_t val)
{
u32 data, mask, gpio_dat;
target_t *target = mflash_bank->target;
@@ -191,7 +191,7 @@
return ret;
}
-static int mg_hdrst(u8 level)
+static int mg_hdrst(uint8_t level)
{
return mflash_bank->gpio_drv->set_gpio_output_val(mflash_bank->rst_pin, level);
}
@@ -212,7 +212,7 @@
static int mg_dsk_wait(mg_io_type_wait wait, u32 time)
{
- u8 status, error;
+ uint8_t status, error;
target_t *target = mflash_bank->target;
u32 mg_task_reg = mflash_bank->base + MG_REG_OFFSET;
duration_t duration;
@@ -288,11 +288,11 @@
return ERROR_MG_TIMEOUT;
}
-static int mg_dsk_srst(u8 on)
+static int mg_dsk_srst(uint8_t on)
{
target_t *target = mflash_bank->target;
u32 mg_task_reg = mflash_bank->base + MG_REG_OFFSET;
- u8 value;
+ uint8_t value;
int ret;
if ((ret = target_read_u8(target, mg_task_reg + MG_REG_DRV_CTRL, &value)) != ERROR_OK)
@@ -308,11 +308,11 @@
return ret;
}
-static int mg_dsk_io_cmd(u32 sect_num, u32 cnt, u8 cmd)
+static int mg_dsk_io_cmd(u32 sect_num, u32 cnt, uint8_t cmd)
{
target_t *target = mflash_bank->target;
u32 mg_task_reg = mflash_bank->base + MG_REG_OFFSET;
- u8 value;
+ uint8_t value;
int ret;
ret = mg_dsk_wait(mg_io_wait_rdy_noerr, MG_OEM_DISK_WAIT_TIME_NORMAL);
@@ -322,10 +322,10 @@
value = mg_io_rval_dev_drv_master | mg_io_rval_dev_lba_mode |((sect_num >> 24) & 0xf);
ret = target_write_u8(target, mg_task_reg + MG_REG_DRV_HEAD, value);
- ret |= target_write_u8(target, mg_task_reg + MG_REG_SECT_CNT, (u8)cnt);
- ret |= target_write_u8(target, mg_task_reg + MG_REG_SECT_NUM, (u8)sect_num);
- ret |= target_write_u8(target, mg_task_reg + MG_REG_CYL_LOW, (u8)(sect_num >> 8));
- ret |= target_write_u8(target, mg_task_reg + MG_REG_CYL_HIGH, (u8)(sect_num >> 16));
+ ret |= target_write_u8(target, mg_task_reg + MG_REG_SECT_CNT, (uint8_t)cnt);
+ ret |= target_write_u8(target, mg_task_reg + MG_REG_SECT_NUM, (uint8_t)sect_num);
+ ret |= target_write_u8(target, mg_task_reg + MG_REG_CYL_LOW, (uint8_t)(sect_num >> 8));
+ ret |= target_write_u8(target, mg_task_reg + MG_REG_CYL_HIGH, (uint8_t)(sect_num >> 16));
if (ret != ERROR_OK)
return ret;
@@ -351,7 +351,7 @@
mflash_bank->drv_info = malloc(sizeof(mg_drv_info_t));
target_read_memory(target, mg_buff, 2, sizeof(mg_io_type_drv_info) >> 1,
- (u8 *)&mflash_bank->drv_info->drv_id);
+ (uint8_t *)&mflash_bank->drv_info->drv_id);
if (ret != ERROR_OK)
return ret;
@@ -426,7 +426,7 @@
u32 i, address;
int ret;
target_t *target = mflash_bank->target;
- u8 *buff_ptr = buff;
+ uint8_t *buff_ptr = buff;
duration_t duration;
if ((ret = mg_dsk_io_cmd(sect_num, sect_cnt, mg_io_cmd_read)) != ERROR_OK )
@@ -467,7 +467,7 @@
static int mg_mflash_read_sects(void *buff, u32 sect_num, u32 sect_cnt)
{
u32 quotient, residue, i;
- u8 *buff_ptr = buff;
+ uint8_t *buff_ptr = buff;
int ret = ERROR_OK;
quotient = sect_cnt >> 8;
@@ -499,7 +499,7 @@
u32 i, address;
int ret;
target_t *target = mflash_bank->target;
- u8 *buff_ptr = buff;
+ uint8_t *buff_ptr = buff;
duration_t duration;
if ((ret = mg_dsk_io_cmd(sect_num, sect_cnt, cmd)) != ERROR_OK )
@@ -545,7 +545,7 @@
static int mg_mflash_write_sects(void *buff, u32 sect_num, u32 sect_cnt)
{
u32 quotient, residue, i;
- u8 *buff_ptr = buff;
+ uint8_t *buff_ptr = buff;
int ret = ERROR_OK;
quotient = sect_cnt >> 8;
@@ -571,10 +571,10 @@
return ret;
}
-static int mg_mflash_read (u32 addr, u8 *buff, u32 len)
+static int mg_mflash_read (u32 addr, uint8_t *buff, u32 len)
{
- u8 *buff_ptr = buff;
- u8 sect_buff[MG_MFLASH_SECTOR_SIZE];
+ uint8_t *buff_ptr = buff;
+ uint8_t sect_buff[MG_MFLASH_SECTOR_SIZE];
u32 cur_addr, next_sec_addr, end_addr, cnt, sect_num;
int ret = ERROR_OK;
@@ -635,10 +635,10 @@
return ret;
}
-static int mg_mflash_write(u32 addr, u8 *buff, u32 len)
+static int mg_mflash_write(u32 addr, uint8_t *buff, u32 len)
{
- u8 *buff_ptr = buff;
- u8 sect_buff[MG_MFLASH_SECTOR_SIZE];
+ uint8_t *buff_ptr = buff;
+ uint8_t sect_buff[MG_MFLASH_SECTOR_SIZE];
u32 cur_addr, next_sec_addr, end_addr, cnt, sect_num;
int ret = ERROR_OK;
@@ -706,7 +706,7 @@
static int mg_write_cmd(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
{
u32 address, buf_cnt, cnt, res, i;
- u8 *buffer;
+ uint8_t *buffer;
fileio_t fileio;
duration_t duration;
char *duration_text;
@@ -773,7 +773,7 @@
static int mg_dump_cmd(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
{
u32 address, size_written, size, cnt, res, i;
- u8 *buffer;
+ uint8_t *buffer;
fileio_t fileio;
duration_t duration;
char *duration_text;
@@ -967,14 +967,14 @@
buff[i] = i;
ret = target_write_memory(target, address, 2,
- MG_MFLASH_SECTOR_SIZE / 2, (u8 *)buff);
+ MG_MFLASH_SECTOR_SIZE / 2, (uint8_t *)buff);
if (ret != ERROR_OK)
return ret;
memset(buff, 0xff, MG_MFLASH_SECTOR_SIZE);
ret = target_read_memory(target, address, 2,
- MG_MFLASH_SECTOR_SIZE / 2, (u8 *)buff);
+ MG_MFLASH_SECTOR_SIZE / 2, (uint8_t *)buff);
if (ret != ERROR_OK)
return ret;
@@ -1117,7 +1117,7 @@
static int mg_storage_config(void)
{
- u8 buff[512];
+ uint8_t buff[512];
int ret;
if ((ret = mg_set_feature(mg_feature_id_transmode, mg_feature_val_trans_vcmd))
@@ -1140,7 +1140,7 @@
static int mg_boot_config(void)
{
- u8 buff[512];
+ uint8_t buff[512];
int ret;
if ((ret = mg_set_feature(mg_feature_id_transmode, mg_feature_val_trans_vcmd))
@@ -1168,7 +1168,7 @@
static int mg_set_pll(mg_pll_t *pll)
{
- u8 buff[512];
+ uint8_t buff[512];
int ret;
memset(buff, 0xff, 512);
Modified: trunk/src/flash/mflash.h
===================================================================
--- trunk/src/flash/mflash.h 2009-06-18 07:04:08 UTC (rev 2274)
+++ trunk/src/flash/mflash.h 2009-06-18 07:06:25 UTC (rev 2275)
@@ -36,7 +36,7 @@
{
char *name;
int (*set_gpio_to_output) (mflash_gpio_num_t gpio);
- int (*set_gpio_output_val) (mflash_gpio_num_t gpio, u8 val);
+ int (*set_gpio_output_val) (mflash_gpio_num_t gpio, uint8_t val);
} mflash_gpio_drv_t;
typedef struct _mg_io_type_drv_info {
Modified: trunk/src/flash/nand.c
===================================================================
--- trunk/src/flash/nand.c 2009-06-18 07:04:08 UTC (rev 2274)
+++ trunk/src/flash/nand.c 2009-06-18 07:06:25 UTC (rev 2275)
@@ -38,10 +38,10 @@
static int handle_nand_raw_access_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
-static int nand_read_page(struct nand_device_s *device, u32 page, u8 *data, u32 data_size, u8 *oob, u32 oob_size);
-//static int nand_read_plain(struct nand_device_s *device, u32 address, u8 *data, u32 data_size);
+static int nand_read_page(struct nand_device_s *device, u32 page, uint8_t *data, u32 data_size, uint8_t *oob, u32 oob_size);
+//static int nand_read_plain(struct nand_device_s *device, u32 address, uint8_t *data, u32 data_size);
-static int nand_write_page(struct nand_device_s *device, u32 page, u8 *data, u32 data_size, u8 *oob, u32 oob_size);
+static int nand_write_page(struct nand_device_s *device, u32 page, uint8_t *data, u32 data_size, uint8_t *oob, u32 oob_size);
/* NAND flash controller
*/
@@ -341,7 +341,7 @@
{
u32 page = 0x0;
int i;
- u8 oob[6];
+ uint8_t oob[6];
if ((first < 0) || (first >= device->num_blocks))
first = 0;
@@ -371,7 +371,7 @@
return ERROR_OK;
}
-int nand_read_status(struct nand_device_s *device, u8 *status)
+int nand_read_status(struct nand_device_s *device, uint8_t *status)
{
if (!device->device)
return ERROR_NAND_DEVICE_NOT_PROBED;
@@ -398,7 +398,7 @@
static int nand_poll_ready(struct nand_device_s *device, int timeout)
{
- u8 status;
+ uint8_t status;
device->controller->command(device, NAND_CMD_STATUS);
do {
@@ -419,8 +419,8 @@
int nand_probe(struct nand_device_s *device)
{
- u8 manufacturer_id, device_id;
- u8 id_buff[6];
+ uint8_t manufacturer_id, device_id;
+ uint8_t id_buff[6];
int retval;
int i;
@@ -639,7 +639,7 @@
{
int i;
u32 page;
- u8 status;
+ uint8_t status;
int retval;
if (!device->device)
@@ -721,9 +721,9 @@
}
#if 0
-static int nand_read_plain(struct nand_device_s *device, u32 address, u8 *data, u32 data_size)
+static int nand_read_plain(struct nand_device_s *device, u32 address, uint8_t *data, u32 data_size)
{
- u8 *page;
+ uint8_t *page;
if (!device->device)
return ERROR_NAND_DEVICE_NOT_PROBED;
@@ -758,9 +758,9 @@
return ERROR_OK;
}
-static int nand_write_plain(struct nand_device_s *device, u32 address, u8 *data, u32 data_size)
+static int nand_write_plain(struct nand_device_s *device, u32 address, uint8_t *data, u32 data_size)
{
- u8 *page;
+ uint8_t *page;
if (!device->device)
return ERROR_NAND_DEVICE_NOT_PROBED;
@@ -796,7 +796,7 @@
}
#endif
-int nand_write_page(struct nand_device_s *device, u32 page, u8 *data, u32 data_size, u8 *oob, u32 oob_size)
+int nand_write_page(struct nand_device_s *device, u32 page, uint8_t *data, u32 data_size, uint8_t *oob, u32 oob_size)
{
u32 block;
@@ -813,7 +813,7 @@
return device->controller->write_page(device, page, data, data_size, oob, oob_size);
}
-static int nand_read_page(struct nand_device_s *device, u32 page, u8 *data, u32 data_size, u8 *oob, u32 oob_size)
+static int nand_read_page(struct nand_device_s *device, u32 page, uint8_t *data, u32 data_size, uint8_t *oob, u32 oob_size)
{
if (!device->device)
return ERROR_NAND_DEVICE_NOT_PROBED;
@@ -824,7 +824,7 @@
return device->controller->read_page(device, page, data, data_size, oob, oob_size);
}
-int nand_read_page_raw(struct nand_device_s *device, u32 page, u8 *data, u32 data_size, u8 *oob, u32 oob_size)
+int nand_read_page_raw(struct nand_device_s *device, u32 page, uint8_t *data, u32 data_size, uint8_t *oob, u32 oob_size)
{
u32 i;
@@ -938,11 +938,11 @@
return ERROR_OK;
}
-int nand_write_page_raw(struct nand_device_s *device, u32 page, u8 *data, u32 data_size, u8 *oob, u32 oob_size)
+int nand_write_page_raw(struct nand_device_s *device, u32 page, uint8_t *data, u32 data_size, uint8_t *oob, u32 oob_size)
{
u32 i;
int retval;
- u8 status;
+ uint8_t status;
if (!device->device)
return ERROR_NAND_DEVICE_NOT_PROBED;
@@ -1331,9 +1331,9 @@
p = get_nand_device_by_num(strtoul(args[0], NULL, 0));
if (p)
{
- u8 *page = NULL;
+ uint8_t *page = NULL;
u32 page_size = 0;
- u8 *oob = NULL;
+ uint8_t *oob = NULL;
u32 oob_size = 0;
const int *eccpos = NULL;
@@ -1413,7 +1413,7 @@
if (oob_format & NAND_OOB_SW_ECC)
{
u32 i, j;
- u8 ecc[3];
+ uint8_t ecc[3];
memset(oob, 0xff, oob_size);
for (i = 0, j = 0; i < page_size; i += 256) {
nand_calculate_ecc(p, page+i, ecc);
@@ -1430,7 +1430,7 @@
* of 10 bytes per 512-byte data block.
*/
u32 i;
- u8 *ecc = oob + oob_size - page_size/512 * 10;
+ uint8_t *ecc = oob + oob_size - page_size/512 * 10;
memset(oob, 0xff, oob_size);
for (i = 0; i < page_size; i += 512) {
nand_calculate_ecc_kw(p, page+i, ecc);
@@ -1499,9 +1499,9 @@
char *duration_text;
int retval;
- u8 *page = NULL;
+ uint8_t *page = NULL;
u32 page_size = 0;
- u8 *oob = NULL;
+ uint8_t *oob = NULL;
u32 oob_size = 0;
u32 address = strtoul(args[2], NULL, 0);
u32 size = strtoul(args[3], NULL, 0);
Modified: trunk/src/flash/nand.h
===================================================================
--- trunk/src/flash/nand.h 2009-06-18 07:04:08 UTC (rev 2274)
+++ trunk/src/flash/nand.h 2009-06-18 07:06:25 UTC (rev 2275)
@@ -36,14 +36,14 @@
int (*register_commands)(struct command_context_s *cmd_ctx);
int (*init)(struct nand_device_s *device);
int (*reset)(struct nand_device_s *device);
- int (*command)(struct nand_device_s *device, u8 command);
- int (*address)(struct nand_device_s *device, u8 address);
+ int (*command)(struct nand_device_s *device, uint8_t command);
+ int (*address)(struct nand_device_s *device, uint8_t address);
int (*write_data)(struct nand_device_s *device, u16 data);
int (*read_data)(struct nand_device_s *device, void *data);
- int (*write_block_data)(struct nand_device_s *device, u8 *data, int size);
- int (*read_block_data)(struct nand_device_s *device, u8 *data, int size);
- int (*write_page)(struct nand_device_s *device, u32 page, u8 *data, u32 data_size, u8 *oob, u32 oob_size);
- int (*read_page)(struct nand_device_s *device, u32 page, u8 *data, u32 data_size, u8 *oob, u32 oob_size);
+ int (*write_block_data)(struct nand_device_s *device, uint8_t *data, int size);
+ int (*read_block_data)(struct nand_device_s *device, uint8_t *data, int size);
+ int (*write_page)(struct nand_device_s *device, u32 page, uint8_t *data, u32 data_size, uint8_t *oob, u32 oob_size);
+ int (*read_page)(struct nand_device_s *device, u32 page, uint8_t *data, u32 data_size, uint8_t *oob, u32 oob_size);
int (*controller_ready)(struct nand_device_s *device, int timeout);
int (*nand_ready)(struct nand_device_s *device, int timeout);
} nand_flash_controller_t;
@@ -208,11 +208,11 @@
/* Function prototypes */
extern nand_device_t *get_nand_device_by_num(int num);
-extern int nand_read_page_raw(struct nand_device_s *device, u32 page, u8 *data, u32 data_size, u8 *oob, u32 oob_size);
-extern int nand_write_page_raw(struct nand_device_s *device, u32 page, u8 *data, u32 data_size, u8 *oob, u32 oob_size);
-extern int nand_read_status(struct nand_device_s *device, u8 *status);
-extern int nand_calculate_ecc(struct nand_device_s *device, const u8 *dat, u8 *ecc_code);
-extern int nand_calculate_ecc_kw(struct nand_device_s *device, const u8 *dat, u8 *ecc_code);
+extern int nand_read_page_raw(struct nand_device_s *device, u32 page, uint8_t *data, u32 data_size, uint8_t *oob, u32 oob_size);
+extern int nand_write_page_raw(struct nand_device_s *device, u32 page, uint8_t *data, u32 data_size, uint8_t *oob, u32 oob_size);
+extern int nand_read_status(struct nand_device_s *device, uint8_t *status);
+extern int nand_calculate_ecc(struct nand_device_s *device, const uint8_t *dat, uint8_t *ecc_code);
+extern int nand_calculate_ecc_kw(struct nand_device_s *device, const uint8_t *dat, uint8_t *ecc_code);
extern int nand_register_commands(struct command_context_s *cmd_ctx);
extern int nand_init(struct command_context_s *cmd_ctx);
Modified: trunk/src/flash/nand_ecc.c
===================================================================
--- trunk/src/flash/nand_ecc.c 2009-06-18 07:04:08 UTC (rev 2274)
+++ trunk/src/flash/nand_ecc.c 2009-06-18 07:06:25 UTC (rev 2275)
@@ -46,7 +46,7 @@
/*
* Pre-calculated 256-way 1 byte column parity
*/
-static const u8 nand_e...
[truncated message content] |
|
From: <zw...@ma...> - 2009-06-18 09:06:21
|
Author: zwelch
Date: 2009-06-18 09:04:08 +0200 (Thu, 18 Jun 2009)
New Revision: 2274
Modified:
trunk/src/target/algorithm.h
trunk/src/target/arm11.c
trunk/src/target/arm11.h
trunk/src/target/arm11_dbgtap.c
trunk/src/target/arm720t.c
trunk/src/target/arm7_9_common.c
trunk/src/target/arm7_9_common.h
trunk/src/target/arm7tdmi.c
trunk/src/target/arm920t.c
trunk/src/target/arm926ejs.c
trunk/src/target/arm926ejs.h
trunk/src/target/arm966e.c
trunk/src/target/arm9tdmi.c
trunk/src/target/arm_adi_v5.c
trunk/src/target/arm_adi_v5.h
trunk/src/target/arm_disassembler.c
trunk/src/target/arm_disassembler.h
trunk/src/target/arm_jtag.c
trunk/src/target/arm_jtag.h
trunk/src/target/arm_simulator.c
trunk/src/target/armv4_5.c
trunk/src/target/armv4_5_mmu.c
trunk/src/target/armv4_5_mmu.h
trunk/src/target/armv7m.c
trunk/src/target/avrt.c
trunk/src/target/breakpoints.h
trunk/src/target/cortex_a8.c
trunk/src/target/cortex_a8.h
trunk/src/target/cortex_m3.c
trunk/src/target/cortex_m3.h
trunk/src/target/embeddedice.c
trunk/src/target/embeddedice.h
trunk/src/target/etb.c
trunk/src/target/etb.h
trunk/src/target/etm.c
trunk/src/target/etm.h
trunk/src/target/feroceon.c
trunk/src/target/image.c
trunk/src/target/image.h
trunk/src/target/mips32.c
trunk/src/target/mips32_dmaacc.c
trunk/src/target/mips32_dmaacc.h
trunk/src/target/mips32_pracc.c
trunk/src/target/mips32_pracc.h
trunk/src/target/mips_ejtag.c
trunk/src/target/mips_m4k.c
trunk/src/target/mips_m4k.h
trunk/src/target/oocd_trace.c
trunk/src/target/register.c
trunk/src/target/register.h
trunk/src/target/target.c
trunk/src/target/target.h
trunk/src/target/target_request.c
trunk/src/target/target_type.h
trunk/src/target/xscale.c
trunk/src/target/xscale.h
Log:
Transform 'u8' to 'uint8_t' in src/target
- Replace '\([^_]\)u8' with '\1uint8_t'.
- Replace '^u8' with 'uint8_t'.
Modified: trunk/src/target/algorithm.h
===================================================================
--- trunk/src/target/algorithm.h 2009-06-18 04:08:51 UTC (rev 2273)
+++ trunk/src/target/algorithm.h 2009-06-18 07:04:08 UTC (rev 2274)
@@ -33,7 +33,7 @@
{
u32 address;
u32 size;
- u8 *value;
+ uint8_t *value;
enum param_direction direction;
} mem_param_t;
@@ -41,7 +41,7 @@
{
char *reg_name;
u32 size;
- u8 *value;
+ uint8_t *value;
enum param_direction direction;
} reg_param_t;
Modified: trunk/src/target/arm11.c
===================================================================
--- trunk/src/target/arm11.c 2009-06-18 04:08:51 UTC (rev 2273)
+++ trunk/src/target/arm11.c 2009-06-18 07:04:08 UTC (rev 2274)
@@ -288,14 +288,14 @@
#define ARM11_GDB_REGISTER_COUNT 26
-u8 arm11_gdb_dummy_fp_value[] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0};
+uint8_t arm11_gdb_dummy_fp_value[] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0};
reg_t arm11_gdb_dummy_fp_reg =
{
"GDB dummy floating-point register", arm11_gdb_dummy_fp_value, 0, 1, 96, NULL, 0, NULL, 0
};
-u8 arm11_gdb_dummy_fps_value[] = {0, 0, 0, 0};
+uint8_t arm11_gdb_dummy_fps_value[] = {0, 0, 0, 0};
reg_t arm11_gdb_dummy_fps_reg =
{
@@ -630,8 +630,8 @@
scan_field_t chain5_fields[3];
- u8 Ready = 0; /* ignored */
- u8 Valid = 0; /* ignored */
+ uint8_t Ready = 0; /* ignored */
+ uint8_t Valid = 0; /* ignored */
arm11_setup_field(arm11, 32, &R(RDTR), NULL, chain5_fields + 0);
arm11_setup_field(arm11, 1, &Ready, NULL, chain5_fields + 1);
@@ -717,7 +717,7 @@
}
/* target request support */
-int arm11_target_request_data(struct target_s *target, u32 size, u8 *buffer)
+int arm11_target_request_data(struct target_s *target, u32 size, uint8_t *buffer)
{
FNC_INFO_NOTIMPLEMENTED;
@@ -1090,7 +1090,7 @@
* size: 1 = byte (8bit), 2 = half-word (16bit), 4 = word (32bit)
* count: number of items of <size>
*/
-int arm11_read_memory(struct target_s *target, u32 address, u32 size, u32 count, u8 *buffer)
+int arm11_read_memory(struct target_s *target, u32 address, u32 size, u32 count, uint8_t *buffer)
{
/** \todo TODO: check if buffer cast to u32* and u16* might cause alignment problems */
@@ -1173,7 +1173,7 @@
return ERROR_OK;
}
-int arm11_write_memory(struct target_s *target, u32 address, u32 size, u32 count, u8 *buffer)
+int arm11_write_memory(struct target_s *target, u32 address, u32 size, u32 count, uint8_t *buffer)
{
FNC_INFO;
@@ -1285,7 +1285,7 @@
/* write target memory in multiples of 4 byte, optimized for writing large quantities of data */
-int arm11_bulk_write_memory(struct target_s *target, u32 address, u32 count, u8 *buffer)
+int arm11_bulk_write_memory(struct target_s *target, u32 address, u32 count, uint8_t *buffer)
{
FNC_INFO;
@@ -1395,11 +1395,11 @@
// Save regs
for (size_t i = 0; i < 16; i++)
{
- context[i] = buf_get_u32((u8*)(&arm11->reg_values[i]),0,32);
+ context[i] = buf_get_u32((uint8_t*)(&arm11->reg_values[i]),0,32);
LOG_DEBUG("Save %zi: 0x%x",i,context[i]);
}
- cpsr = buf_get_u32((u8*)(arm11->reg_values+ARM11_RC_CPSR),0,32);
+ cpsr = buf_get_u32((uint8_t*)(arm11->reg_values+ARM11_RC_CPSR),0,32);
LOG_DEBUG("Save CPSR: 0x%x", cpsr);
for (int i = 0; i < num_mem_params; i++)
@@ -1521,10 +1521,10 @@
{
LOG_DEBUG("restoring register %s with value 0x%8.8x",
arm11->reg_list[i].name, context[i]);
- arm11_set_reg(&arm11->reg_list[i], (u8*)&context[i]);
+ arm11_set_reg(&arm11->reg_list[i], (uint8_t*)&context[i]);
}
LOG_DEBUG("restoring CPSR with value 0x%8.8x", cpsr);
- arm11_set_reg(&arm11->reg_list[ARM11_RC_CPSR], (u8*)&cpsr);
+ arm11_set_reg(&arm11->reg_list[ARM11_RC_CPSR], (uint8_t*)&cpsr);
// arm11->core_state = core_state;
// arm11->core_mode = core_mode;
@@ -1668,7 +1668,7 @@
}
/** Change a value in the register cache */
-int arm11_set_reg(reg_t *reg, u8 *buf)
+int arm11_set_reg(reg_t *reg, uint8_t *buf)
{
FNC_INFO;
@@ -1730,7 +1730,7 @@
r->name = rd->name;
r->size = 32;
- r->value = (u8 *)(arm11->reg_values + i);
+ r->value = (uint8_t *)(arm11->reg_values + i);
r->dirty = 0;
r->valid = 0;
r->bitfield_desc = NULL;
Modified: trunk/src/target/arm11.h
===================================================================
--- trunk/src/target/arm11.h 2009-06-18 04:08:51 UTC (rev 2273)
+++ trunk/src/target/arm11.h 2009-06-18 07:04:08 UTC (rev 2274)
@@ -66,7 +66,7 @@
typedef struct arm11_register_history_s
{
u32 value;
- u8 valid;
+ uint8_t valid;
}arm11_register_history_t;
enum arm11_debug_version
@@ -86,7 +86,7 @@
u32 device_id; /**< IDCODE readout */
u32 didr; /**< DIDR readout (debug capabilities) */
- u8 implementor; /**< DIDR Implementor readout */
+ uint8_t implementor; /**< DIDR Implementor readout */
size_t brp; /**< Number of Breakpoint Register Pairs from DIDR */
size_t wrp; /**< Number of Watchpoint Register Pairs from DIDR */
@@ -191,7 +191,7 @@
int arm11_arch_state(struct target_s *target);
/* target request support */
-int arm11_target_request_data(struct target_s *target, u32 size, u8 *buffer);
+int arm11_target_request_data(struct target_s *target, u32 size, uint8_t *buffer);
/* target execution control */
int arm11_halt(struct target_s *target);
@@ -211,11 +211,11 @@
* size: 1 = byte (8bit), 2 = half-word (16bit), 4 = word (32bit)
* count: number of items of <size>
*/
-int arm11_read_memory(struct target_s *target, u32 address, u32 size, u32 count, u8 *buffer);
-int arm11_write_memory(struct target_s *target, u32 address, u32 size, u32 count, u8 *buffer);
+int arm11_read_memory(struct target_s *target, u32 address, u32 size, u32 count, uint8_t *buffer);
+int arm11_write_memory(struct target_s *target, u32 address, u32 size, u32 count, uint8_t *buffer);
/* write target memory in multiples of 4 byte, optimized for writing large quantities of data */
-int arm11_bulk_write_memory(struct target_s *target, u32 address, u32 count, u8 *buffer);
+int arm11_bulk_write_memory(struct target_s *target, u32 address, u32 count, uint8_t *buffer);
int arm11_checksum_memory(struct target_s *target, u32 address, u32 count, u32* checksum);
@@ -237,7 +237,7 @@
/* helpers */
int arm11_build_reg_cache(target_t *target);
-int arm11_set_reg(reg_t *reg, u8 *buf);
+int arm11_set_reg(reg_t *reg, uint8_t *buf);
int arm11_get_reg(reg_t *reg);
void arm11_record_register_history(arm11_common_t * arm11);
@@ -246,9 +246,9 @@
/* internals */
void arm11_setup_field (arm11_common_t * arm11, int num_bits, void * in_data, void * out_data, scan_field_t * field);
-void arm11_add_IR (arm11_common_t * arm11, u8 instr, tap_state_t state);
-void arm11_add_debug_SCAN_N (arm11_common_t * arm11, u8 chain, tap_state_t state);
-void arm11_add_debug_INST (arm11_common_t * arm11, u32 inst, u8 * flag, tap_state_t state);
+void arm11_add_IR (arm11_common_t * arm11, uint8_t instr, tap_state_t state);
+void arm11_add_debug_SCAN_N (arm11_common_t * arm11, uint8_t chain, tap_state_t state);
+void arm11_add_debug_INST (arm11_common_t * arm11, u32 inst, uint8_t * flag, tap_state_t state);
int arm11_read_DSCR (arm11_common_t * arm11, u32 *dscr);
int arm11_write_DSCR (arm11_common_t * arm11, u32 dscr);
@@ -275,7 +275,7 @@
typedef struct arm11_sc7_action_s
{
bool write; /**< Access mode: true for write, false for read. */
- u8 address; /**< Register address mode. Use enum #arm11_sc7 */
+ uint8_t address; /**< Register address mode. Use enum #arm11_sc7 */
u32 value; /**< If write then set this to value to be written.
In read mode this receives the read value when the
function returns. */
Modified: trunk/src/target/arm11_dbgtap.c
===================================================================
--- trunk/src/target/arm11_dbgtap.c 2009-06-18 04:08:51 UTC (rev 2273)
+++ trunk/src/target/arm11_dbgtap.c 2009-06-18 07:04:08 UTC (rev 2274)
@@ -97,7 +97,7 @@
*
* \remarks This adds to the JTAG command queue but does \em not execute it.
*/
-void arm11_add_IR(arm11_common_t * arm11, u8 instr, tap_state_t state)
+void arm11_add_IR(arm11_common_t * arm11, uint8_t instr, tap_state_t state)
{
jtag_tap_t *tap;
tap = arm11->target->tap;
@@ -122,10 +122,10 @@
* arm11_add_debug_SCAN_N().
*
*/
-static void arm11_in_handler_SCAN_N(u8 *in_value)
+static void arm11_in_handler_SCAN_N(uint8_t *in_value)
{
/** \todo TODO: clarify why this isnt properly masked in core.c jtag_read_buffer() */
- u8 v = *in_value & 0x1F;
+ uint8_t v = *in_value & 0x1F;
if (v != 0x10)
{
@@ -160,7 +160,7 @@
* \remarks This adds to the JTAG command queue but does \em not execute it.
*/
-void arm11_add_debug_SCAN_N(arm11_common_t * arm11, u8 chain, tap_state_t state)
+void arm11_add_debug_SCAN_N(arm11_common_t * arm11, uint8_t chain, tap_state_t state)
{
JTAG_DEBUG("SCREG <= 0x%02x", chain);
@@ -168,7 +168,7 @@
scan_field_t field;
- u8 tmp[1];
+ uint8_t tmp[1];
arm11_setup_field(arm11, 5, &chain, &tmp, &field);
arm11_add_dr_scan_vc(1, &field, state == ARM11_TAP_DEFAULT ? TAP_DRPAUSE : state);
@@ -195,7 +195,7 @@
*
* \remarks This adds to the JTAG command queue but does \em not execute it.
*/
-void arm11_add_debug_INST(arm11_common_t * arm11, u32 inst, u8 * flag, tap_state_t state)
+void arm11_add_debug_INST(arm11_common_t * arm11, u32 inst, uint8_t * flag, tap_state_t state)
{
JTAG_DEBUG("INST <= 0x%08x", inst);
@@ -374,7 +374,7 @@
while (1)
{
- u8 flag;
+ uint8_t flag;
arm11_add_debug_INST(arm11, 0, &flag, count ? TAP_IDLE : TAP_DRPAUSE);
@@ -426,8 +426,8 @@
scan_field_t chain5_fields[3];
u32 Data;
- u8 Ready;
- u8 nRetry;
+ uint8_t Ready;
+ uint8_t nRetry;
arm11_setup_field(arm11, 32, &Data, NULL, chain5_fields + 0);
arm11_setup_field(arm11, 1, NULL, &Ready, chain5_fields + 1);
@@ -516,8 +516,8 @@
arm11_setup_field(arm11, 1, NULL, NULL /*&Ready*/, chain5_fields + 1);
arm11_setup_field(arm11, 1, NULL, NULL, chain5_fields + 2);
- u8 Readies[count + 1];
- u8 * ReadyPos = Readies;
+ uint8_t Readies[count + 1];
+ uint8_t * ReadyPos = Readies;
while (count--)
{
@@ -603,8 +603,8 @@
scan_field_t chain5_fields[3];
u32 Data;
- u8 Ready;
- u8 nRetry;
+ uint8_t Ready;
+ uint8_t nRetry;
arm11_setup_field(arm11, 32, NULL, &Data, chain5_fields + 0);
arm11_setup_field(arm11, 1, NULL, &Ready, chain5_fields + 1);
@@ -685,12 +685,12 @@
scan_field_t chain7_fields[3];
- u8 nRW;
+ uint8_t nRW;
u32 DataOut;
- u8 AddressOut;
- u8 Ready;
+ uint8_t AddressOut;
+ uint8_t Ready;
u32 DataIn;
- u8 AddressIn;
+ uint8_t AddressIn;
arm11_setup_field(arm11, 1, &nRW, &Ready, chain7_fields + 0);
arm11_setup_field(arm11, 32, &DataOut, &DataIn, chain7_fields + 1);
Modified: trunk/src/target/arm720t.c
===================================================================
--- trunk/src/target/arm720t.c 2009-06-18 04:08:51 UTC (rev 2273)
+++ trunk/src/target/arm720t.c 2009-06-18 07:04:08 UTC (rev 2274)
@@ -43,8 +43,8 @@
int arm720t_init_target(struct command_context_s *cmd_ctx, struct target_s *target);
int arm720t_quit(void);
int arm720t_arch_state(struct target_s *target);
-int arm720t_read_memory(struct target_s *target, u32 address, u32 size, u32 count, u8 *buffer);
-int arm720t_write_memory(struct target_s *target, u32 address, u32 size, u32 count, u8 *buffer);
+int arm720t_read_memory(struct target_s *target, u32 address, u32 size, u32 count, uint8_t *buffer);
+int arm720t_write_memory(struct target_s *target, u32 address, u32 size, u32 count, uint8_t *buffer);
int arm720t_soft_reset_halt(struct target_s *target);
target_type_t arm720t_target =
@@ -91,8 +91,8 @@
arm7_9_common_t *arm7_9 = armv4_5->arch_info;
arm_jtag_t *jtag_info = &arm7_9->jtag_info;
scan_field_t fields[2];
- u8 out_buf[4];
- u8 instruction_buf = instruction;
+ uint8_t out_buf[4];
+ uint8_t instruction_buf = instruction;
buf_set_u32(out_buf, 0, 32, flip_u32(out, 32));
@@ -118,9 +118,9 @@
if (in)
{
- fields[1].in_value = (u8 *)in;
+ fields[1].in_value = (uint8_t *)in;
jtag_add_dr_scan(2, fields, jtag_get_end_state());
- jtag_add_callback(arm7flip32, (u8 *)in);
+ jtag_add_callback(arm7flip32, (uint8_t *)in);
} else
{
jtag_add_dr_scan(2, fields, jtag_get_end_state());
@@ -329,7 +329,7 @@
return ERROR_OK;
}
-int arm720t_read_memory(struct target_s *target, u32 address, u32 size, u32 count, u8 *buffer)
+int arm720t_read_memory(struct target_s *target, u32 address, u32 size, u32 count, uint8_t *buffer)
{
int retval;
armv4_5_common_t *armv4_5 = target->arch_info;
@@ -349,7 +349,7 @@
return retval;
}
-int arm720t_write_memory(struct target_s *target, u32 address, u32 size, u32 count, u8 *buffer)
+int arm720t_write_memory(struct target_s *target, u32 address, u32 size, u32 count, uint8_t *buffer)
{
int retval;
Modified: trunk/src/target/arm7_9_common.c
===================================================================
--- trunk/src/target/arm7_9_common.c 2009-06-18 04:08:51 UTC (rev 2273)
+++ trunk/src/target/arm7_9_common.c 2009-06-18 07:04:08 UTC (rev 2274)
@@ -373,7 +373,7 @@
{
u32 current_instr;
/* check that user program as not modified breakpoint instruction */
- if ((retval = target_read_memory(target, breakpoint->address, 4, 1, (u8*)¤t_instr)) != ERROR_OK)
+ if ((retval = target_read_memory(target, breakpoint->address, 4, 1, (uint8_t*)¤t_instr)) != ERROR_OK)
{
return retval;
}
@@ -387,7 +387,7 @@
{
u16 current_instr;
/* check that user program as not modified breakpoint instruction */
- if ((retval = target_read_memory(target, breakpoint->address, 2, 1, (u8*)¤t_instr)) != ERROR_OK)
+ if ((retval = target_read_memory(target, breakpoint->address, 2, 1, (uint8_t*)¤t_instr)) != ERROR_OK)
{
return retval;
}
@@ -739,7 +739,7 @@
int arm7_9_execute_fast_sys_speed(struct target_s *target)
{
static int set=0;
- static u8 check_value[4], check_mask[4];
+ static uint8_t check_value[4], check_mask[4];
armv4_5_common_t *armv4_5 = target->arch_info;
arm7_9_common_t *arm7_9 = armv4_5->arch_info;
@@ -781,7 +781,7 @@
* @param buffer Pointer to the buffer that will hold the data
* @return The result of receiving data from the Embedded ICE unit
*/
-int arm7_9_target_request_data(target_t *target, u32 size, u8 *buffer)
+int arm7_9_target_request_data(target_t *target, u32 size, uint8_t *buffer)
{
armv4_5_common_t *armv4_5 = target->arch_info;
arm7_9_common_t *arm7_9 = armv4_5->arch_info;
@@ -2208,7 +2208,7 @@
return jtag_execute_queue();
}
-int arm7_9_read_memory(struct target_s *target, u32 address, u32 size, u32 count, u8 *buffer)
+int arm7_9_read_memory(struct target_s *target, u32 address, u32 size, u32 count, uint8_t *buffer)
{
armv4_5_common_t *armv4_5 = target->arch_info;
arm7_9_common_t *arm7_9 = armv4_5->arch_info;
@@ -2384,7 +2384,7 @@
return ERROR_OK;
}
-int arm7_9_write_memory(struct target_s *target, u32 address, u32 size, u32 count, u8 *buffer)
+int arm7_9_write_memory(struct target_s *target, u32 address, u32 size, u32 count, uint8_t *buffer)
{
armv4_5_common_t *armv4_5 = target->arch_info;
arm7_9_common_t *arm7_9 = armv4_5->arch_info;
@@ -2568,7 +2568,7 @@
}
static int dcc_count;
-static u8 *dcc_buffer;
+static uint8_t *dcc_buffer;
static int arm7_9_dcc_completion(struct target_s *target, u32 exit_point, int timeout_ms, void *arch_info)
{
@@ -2581,7 +2581,7 @@
int little=target->endianness==TARGET_LITTLE_ENDIAN;
int count=dcc_count;
- u8 *buffer=dcc_buffer;
+ uint8_t *buffer=dcc_buffer;
if (count>2)
{
/* Handle first & last using standard embeddedice_write_reg and the middle ones w/the
@@ -2590,7 +2590,7 @@
buffer+=4;
embeddedice_reg_t *ice_reg = arm7_9->eice_cache->reg_list[EICE_COMMS_DATA].arch_info;
- u8 reg_addr = ice_reg->addr & 0x1f;
+ uint8_t reg_addr = ice_reg->addr & 0x1f;
jtag_tap_t *tap;
tap = ice_reg->jtag_info->tap;
@@ -2623,7 +2623,7 @@
int armv4_5_run_algorithm_inner(struct target_s *target, int num_mem_params, mem_param_t *mem_params, int num_reg_params, reg_param_t *reg_params, u32 entry_point, u32 exit_point, int timeout_ms, void *arch_info, int (*run_it)(struct target_s *target, u32 exit_point, int timeout_ms, void *arch_info));
-int arm7_9_bulk_write_memory(target_t *target, u32 address, u32 count, u8 *buffer)
+int arm7_9_bulk_write_memory(target_t *target, u32 address, u32 count, uint8_t *buffer)
{
int retval;
armv4_5_common_t *armv4_5 = target->arch_info;
@@ -2636,7 +2636,7 @@
/* regrab previously allocated working_area, or allocate a new one */
if (!arm7_9->dcc_working_area)
{
- u8 dcc_code_buf[6 * 4];
+ uint8_t dcc_code_buf[6 * 4];
/* make sure we have a working area */
if (target_alloc_working_area(target, 24, &arm7_9->dcc_working_area) != ERROR_OK)
Modified: trunk/src/target/arm7_9_common.h
===================================================================
--- trunk/src/target/arm7_9_common.h 2009-06-18 04:08:51 UTC (rev 2273)
+++ trunk/src/target/arm7_9_common.h 2009-06-18 07:04:08 UTC (rev 2274)
@@ -80,7 +80,7 @@
void (*read_xpsr)(target_t *target, u32 *xpsr, int spsr); /**< Function for reading CPSR or SPSR */
void (*write_xpsr)(target_t *target, u32 xpsr, int spsr); /**< Function for writing to CPSR or SPSR */
- void (*write_xpsr_im8)(target_t *target, u8 xpsr_im, int rot, int spsr); /**< Function for writing an immediate value to CPSR or SPSR */
+ void (*write_xpsr_im8)(target_t *target, uint8_t xpsr_im, int rot, int spsr); /**< Function for writing an immediate value to CPSR or SPSR */
void (*write_core_regs)(target_t *target, u32 mask, u32 core_regs[16]);
void (*load_word_regs)(target_t *target, u32 mask);
@@ -115,7 +115,7 @@
int arm7_9_poll(target_t *target);
-int arm7_9_target_request_data(target_t *target, u32 size, u8 *buffer);
+int arm7_9_target_request_data(target_t *target, u32 size, uint8_t *buffer);
int arm7_9_setup(target_t *target);
int arm7_9_assert_reset(target_t *target);
@@ -131,9 +131,9 @@
int arm7_9_resume(struct target_s *target, int current, u32 address, int handle_breakpoints, int debug_execution);
int arm7_9_step(struct target_s *target, int current, u32 address, int handle_breakpoints);
int arm7_9_read_core_reg(struct target_s *target, int num, enum armv4_5_mode mode);
-int arm7_9_read_memory(struct target_s *target, u32 address, u32 size, u32 count, u8 *buffer);
-int arm7_9_write_memory(struct target_s *target, u32 address, u32 size, u32 count, u8 *buffer);
-int arm7_9_bulk_write_memory(target_t *target, u32 address, u32 count, u8 *buffer);
+int arm7_9_read_memory(struct target_s *target, u32 address, u32 size, u32 count, uint8_t *buffer);
+int arm7_9_write_memory(struct target_s *target, u32 address, u32 size, u32 count, uint8_t *buffer);
+int arm7_9_bulk_write_memory(target_t *target, u32 address, u32 count, uint8_t *buffer);
int arm7_9_checksum_memory(struct target_s *target, u32 address, u32 count, u32* checksum);
int arm7_9_blank_check_memory(struct target_s *target, u32 address, u32 count, u32* blank);
Modified: trunk/src/target/arm7tdmi.c
===================================================================
--- trunk/src/target/arm7tdmi.c 2009-06-18 04:08:51 UTC (rev 2273)
+++ trunk/src/target/arm7tdmi.c 2009-06-18 07:04:08 UTC (rev 2274)
@@ -95,8 +95,8 @@
&& (target->debug_reason != DBG_REASON_SINGLESTEP))
{
scan_field_t fields[2];
- u8 databus[4];
- u8 breakpoint;
+ uint8_t databus[4];
+ uint8_t breakpoint;
jtag_set_end_state(TAP_DRPAUSE);
@@ -185,11 +185,11 @@
fields[1].tap = jtag_info->tap;
fields[1].num_bits = 32;
fields[1].out_value = NULL;
- fields[1].in_value = (u8 *)in;
+ fields[1].in_value = (uint8_t *)in;
jtag_add_dr_scan(2, fields, jtag_get_end_state());
- jtag_add_callback(arm7flip32, (u8 *)in);
+ jtag_add_callback(arm7flip32, (uint8_t *)in);
jtag_add_runtest(0, jtag_get_end_state());
@@ -214,7 +214,7 @@
return ERROR_OK;
}
-void arm_endianness(u8 *tmp, void *in, int size, int be, int flip)
+void arm_endianness(uint8_t *tmp, void *in, int size, int be, int flip)
{
u32 readback=le_to_h_u32(tmp);
if (flip)
@@ -224,30 +224,30 @@
case 4:
if (be)
{
- h_u32_to_be(((u8*)in), readback);
+ h_u32_to_be(((uint8_t*)in), readback);
} else
{
- h_u32_to_le(((u8*)in), readback);
+ h_u32_to_le(((uint8_t*)in), readback);
}
break;
case 2:
if (be)
{
- h_u16_to_be(((u8*)in), readback & 0xffff);
+ h_u16_to_be(((uint8_t*)in), readback & 0xffff);
} else
{
- h_u16_to_le(((u8*)in), readback & 0xffff);
+ h_u16_to_le(((uint8_t*)in), readback & 0xffff);
}
break;
case 1:
- *((u8 *)in)= readback & 0xff;
+ *((uint8_t *)in)= readback & 0xff;
break;
}
}
-static int arm7endianness(u8 *in, jtag_callback_data_t size, jtag_callback_data_t be, jtag_callback_data_t captured)
+static int arm7endianness(uint8_t *in, jtag_callback_data_t size, jtag_callback_data_t be, jtag_callback_data_t captured)
{
- arm_endianness((u8 *)captured, in, (int)size, (int)be, 1);
+ arm_endianness((uint8_t *)captured, in, (int)size, (int)be, 1);
return ERROR_OK;
}
@@ -397,7 +397,7 @@
int be = (target->endianness == TARGET_BIG_ENDIAN) ? 1 : 0;
u32 *buf_u32 = buffer;
u16 *buf_u16 = buffer;
- u8 *buf_u8 = buffer;
+ uint8_t *buf_u8 = buffer;
/* STMIA r0-15, [r0] at debug speed
* register values will start to appear on 4th DCLK
@@ -481,7 +481,7 @@
arm7tdmi_clock_out(jtag_info, ARMV4_5_NOP, NULL, 0);
}
-void arm7tdmi_write_xpsr_im8(target_t *target, u8 xpsr_im, int rot, int spsr)
+void arm7tdmi_write_xpsr_im8(target_t *target, uint8_t xpsr_im, int rot, int spsr)
{
/* get pointers to arch-specific information */
armv4_5_common_t *armv4_5 = target->arch_info;
Modified: trunk/src/target/arm920t.c
===================================================================
--- trunk/src/target/arm920t.c 2009-06-18 04:08:51 UTC (rev 2273)
+++ trunk/src/target/arm920t.c 2009-06-18 07:04:08 UTC (rev 2274)
@@ -48,8 +48,8 @@
int arm920t_init_target(struct command_context_s *cmd_ctx, struct target_s *target);
int arm920t_quit(void);
int arm920t_arch_state(struct target_s *target);
-int arm920t_read_memory(struct target_s *target, u32 address, u32 size, u32 count, u8 *buffer);
-int arm920t_write_memory(struct target_s *target, u32 address, u32 size, u32 count, u8 *buffer);
+int arm920t_read_memory(struct target_s *target, u32 address, u32 size, u32 count, uint8_t *buffer);
+int arm920t_write_memory(struct target_s *target, u32 address, u32 size, u32 count, uint8_t *buffer);
int arm920t_soft_reset_halt(struct target_s *target);
#define ARM920T_CP15_PHYS_ADDR(x, y, z) ((x << 5) | (y << 1) << (z))
@@ -99,9 +99,9 @@
arm7_9_common_t *arm7_9 = armv4_5->arch_info;
arm_jtag_t *jtag_info = &arm7_9->jtag_info;
scan_field_t fields[4];
- u8 access_type_buf = 1;
- u8 reg_addr_buf = reg_addr & 0x3f;
- u8 nr_w_buf = 0;
+ uint8_t access_type_buf = 1;
+ uint8_t reg_addr_buf = reg_addr & 0x3f;
+ uint8_t nr_w_buf = 0;
jtag_set_end_state(TAP_IDLE);
arm_jtag_scann(jtag_info, 0xf);
@@ -129,11 +129,11 @@
jtag_add_dr_scan(4, fields, jtag_get_end_state());
- fields[1].in_value = (u8 *)value;
+ fields[1].in_value = (uint8_t *)value;
jtag_add_dr_scan(4, fields, jtag_get_end_state());
- jtag_add_callback(arm_le_to_h_u32, (u8 *)value);
+ jtag_add_callback(arm_le_to_h_u32, (uint8_t *)value);
#ifdef _DEBUG_INSTRUCTION_EXECUTION_
jtag_execute_queue();
@@ -149,10 +149,10 @@
arm7_9_common_t *arm7_9 = armv4_5->arch_info;
arm_jtag_t *jtag_info = &arm7_9->jtag_info;
scan_field_t fields[4];
- u8 access_type_buf = 1;
- u8 reg_addr_buf = reg_addr & 0x3f;
- u8 nr_w_buf = 1;
- u8 value_buf[4];
+ uint8_t access_type_buf = 1;
+ uint8_t reg_addr_buf = reg_addr & 0x3f;
+ uint8_t nr_w_buf = 1;
+ uint8_t value_buf[4];
buf_set_u32(value_buf, 0, 32, value);
@@ -196,10 +196,10 @@
arm7_9_common_t *arm7_9 = armv4_5->arch_info;
arm_jtag_t *jtag_info = &arm7_9->jtag_info;
scan_field_t fields[4];
- u8 access_type_buf = 0; /* interpreted access */
- u8 reg_addr_buf = 0x0;
- u8 nr_w_buf = 0;
- u8 cp15_opcode_buf[4];
+ uint8_t access_type_buf = 0; /* interpreted access */
+ uint8_t reg_addr_buf = 0x0;
+ uint8_t nr_w_buf = 0;
+ uint8_t cp15_opcode_buf[4];
jtag_set_end_state(TAP_IDLE);
arm_jtag_scann(jtag_info, 0xf);
@@ -518,7 +518,7 @@
return ERROR_OK;
}
-int arm920t_read_memory(struct target_s *target, u32 address, u32 size, u32 count, u8 *buffer)
+int arm920t_read_memory(struct target_s *target, u32 address, u32 size, u32 count, uint8_t *buffer)
{
int retval;
@@ -527,7 +527,7 @@
return retval;
}
-int arm920t_write_memory(struct target_s *target, u32 address, u32 size, u32 count, u8 *buffer)
+int arm920t_write_memory(struct target_s *target, u32 address, u32 size, u32 count, uint8_t *buffer)
{
int retval;
armv4_5_common_t *armv4_5 = target->arch_info;
Modified: trunk/src/target/arm926ejs.c
===================================================================
--- trunk/src/target/arm926ejs.c 2009-06-18 04:08:51 UTC (rev 2273)
+++ trunk/src/target/arm926ejs.c 2009-06-18 07:04:08 UTC (rev 2274)
@@ -45,7 +45,7 @@
int arm926ejs_target_create(struct target_s *target, Jim_Interp *interp);
int arm926ejs_init_target(struct command_context_s *cmd_ctx, struct target_s *target);
int arm926ejs_quit(void);
-int arm926ejs_read_memory(struct target_s *target, u32 address, u32 size, u32 count, u8 *buffer);
+int arm926ejs_read_memory(struct target_s *target, u32 address, u32 size, u32 count, uint8_t *buffer);
static int arm926ejs_virt2phys(struct target_s *target, u32 virtual, u32 *physical);
static int arm926ejs_mmu(struct target_s *target, int *enabled);
@@ -91,15 +91,15 @@
.mmu = arm926ejs_mmu
};
-int arm926ejs_catch_broken_irscan(u8 *captured, void *priv, scan_field_t *field)
+int arm926ejs_catch_broken_irscan(uint8_t *captured, void *priv, scan_field_t *field)
{
/* FIX!!!! this code should be reenabled. For now it does not check
* the queue...*/
return 0;
#if 0
/* The ARM926EJ-S' instruction register is 4 bits wide */
- u8 t = *captured & 0xf;
- u8 t2 = *field->in_check_value & 0xf;
+ uint8_t t = *captured & 0xf;
+ uint8_t t2 = *field->in_check_value & 0xf;
if (t == t2)
{
return ERROR_OK;
@@ -123,9 +123,9 @@
arm_jtag_t *jtag_info = &arm7_9->jtag_info;
u32 address = ARM926EJS_CP15_ADDR(op1, op2, CRn, CRm);
scan_field_t fields[4];
- u8 address_buf[2];
- u8 nr_w_buf = 0;
- u8 access = 1;
+ uint8_t address_buf[2];
+ uint8_t nr_w_buf = 0;
+ uint8_t access = 1;
buf_set_u32(address_buf, 0, 14, address);
@@ -139,7 +139,7 @@
fields[0].tap = jtag_info->tap;
fields[0].num_bits = 32;
fields[0].out_value = NULL;
- fields[0].in_value = (u8 *)value;
+ fields[0].in_value = (uint8_t *)value;
fields[1].tap = jtag_info->tap;
@@ -167,7 +167,7 @@
nr_w_buf = 0;
jtag_add_dr_scan(4, fields, jtag_get_end_state());
- jtag_add_callback(arm_le_to_h_u32, (u8 *)value);
+ jtag_add_callback(arm_le_to_h_u32, (uint8_t *)value);
if ((retval = jtag_execute_queue()) != ERROR_OK)
{
@@ -192,10 +192,10 @@
arm_jtag_t *jtag_info = &arm7_9->jtag_info;
u32 address = ARM926EJS_CP15_ADDR(op1, op2, CRn, CRm);
scan_field_t fields[4];
- u8 value_buf[4];
- u8 address_buf[2];
- u8 nr_w_buf = 1;
- u8 access = 1;
+ uint8_t value_buf[4];
+ uint8_t address_buf[2];
+ uint8_t nr_w_buf = 1;
+ uint8_t access = 1;
buf_set_u32(address_buf, 0, 14, address);
buf_set_u32(value_buf, 0, 32, value);
@@ -625,7 +625,7 @@
return target_call_event_callbacks(target, TARGET_EVENT_HALTED);
}
-int arm926ejs_write_memory(struct target_s *target, u32 address, u32 size, u32 count, u8 *buffer)
+int arm926ejs_write_memory(struct target_s *target, u32 address, u32 size, u32 count, uint8_t *buffer)
{
int retval;
armv4_5_common_t *armv4_5 = target->arch_info;
Modified: trunk/src/target/arm926ejs.h
===================================================================
--- trunk/src/target/arm926ejs.h 2009-06-18 04:08:51 UTC (rev 2273)
+++ trunk/src/target/arm926ejs.h 2009-06-18 07:04:08 UTC (rev 2274)
@@ -41,7 +41,7 @@
extern int arm926ejs_init_arch_info(target_t *target, arm926ejs_common_t *arm926ejs, jtag_tap_t *tap);
extern int arm926ejs_register_commands(struct command_context_s *cmd_ctx);
extern int arm926ejs_arch_state(struct target_s *target);
-extern int arm926ejs_write_memory(struct target_s *target, u32 address, u32 size, u32 count, u8 *buffer);
+extern int arm926ejs_write_memory(struct target_s *target, u32 address, u32 size, u32 count, uint8_t *buffer);
extern int arm926ejs_soft_reset_halt(struct target_s *target);
#endif /* ARM926EJS_H */
Modified: trunk/src/target/arm966e.c
===================================================================
--- trunk/src/target/arm966e.c 2009-06-18 04:08:51 UTC (rev 2273)
+++ trunk/src/target/arm966e.c 2009-06-18 07:04:08 UTC (rev 2274)
@@ -164,8 +164,8 @@
arm7_9_common_t *arm7_9 = armv4_5->arch_info;
arm_jtag_t *jtag_info = &arm7_9->jtag_info;
scan_field_t fields[3];
- u8 reg_addr_buf = reg_addr & 0x3f;
- u8 nr_w_buf = 0;
+ uint8_t reg_addr_buf = reg_addr & 0x3f;
+ uint8_t nr_w_buf = 0;
jtag_set_end_state(TAP_IDLE);
if ((retval = arm_jtag_scann(jtag_info, 0xf)) != ERROR_OK)
@@ -191,11 +191,11 @@
jtag_add_dr_scan(3, fields, jtag_get_end_state());
- fields[1].in_value = (u8 *)value;
+ fields[1].in_value = (uint8_t *)value;
jtag_add_dr_scan(3, fields, jtag_get_end_state());
- jtag_add_callback(arm_le_to_h_u32, (u8 *)value);
+ jtag_add_callback(arm_le_to_h_u32, (uint8_t *)value);
#ifdef _DEBUG_INSTRUCTION_EXECUTION_
@@ -216,9 +216,9 @@
arm7_9_common_t *arm7_9 = armv4_5->arch_info;
arm_jtag_t *jtag_info = &arm7_9->jtag_info;
scan_field_t fields[3];
- u8 reg_addr_buf = reg_addr & 0x3f;
- u8 nr_w_buf = 1;
- u8 value_buf[4];
+ uint8_t reg_addr_buf = reg_addr & 0x3f;
+ uint8_t nr_w_buf = 1;
+ uint8_t value_buf[4];
buf_set_u32(value_buf, 0, 32, value);
Modified: trunk/src/target/arm9tdmi.c
===================================================================
--- trunk/src/target/arm9tdmi.c 2009-06-18 04:08:51 UTC (rev 2273)
+++ trunk/src/target/arm9tdmi.c 2009-06-18 07:04:08 UTC (rev 2274)
@@ -107,9 +107,9 @@
&& (target->debug_reason != DBG_REASON_SINGLESTEP))
{
scan_field_t fields[3];
- u8 databus[4];
- u8 instructionbus[4];
- u8 debug_reason;
+ uint8_t databus[4];
+ uint8_t instructionbus[4];
+ uint8_t debug_reason;
jtag_set_end_state(TAP_DRPAUSE);
@@ -166,9 +166,9 @@
{
int retval = ERROR_OK;
scan_field_t fields[3];
- u8 out_buf[4];
- u8 instr_buf[4];
- u8 sysspeed_buf = 0x0;
+ uint8_t out_buf[4];
+ uint8_t instr_buf[4];
+ uint8_t sysspeed_buf = 0x0;
/* prepare buffer */
buf_set_u32(out_buf, 0, 32, out);
@@ -203,10 +203,10 @@
if (in)
{
- fields[0].in_value=(u8 *)in;
+ fields[0].in_value=(uint8_t *)in;
jtag_add_dr_scan(3, fields, jtag_get_end_state());
- jtag_add_callback(arm_le_to_h_u32, (u8 *)in);
+ jtag_add_callback(arm_le_to_h_u32, (uint8_t *)in);
}
else
{
@@ -251,7 +251,7 @@
fields[0].tap = jtag_info->tap;
fields[0].num_bits = 32;
fields[0].out_value = NULL;
- fields[0].in_value = (u8 *)in;
+ fields[0].in_value = (uint8_t *)in;
fields[1].tap = jtag_info->tap;
fields[1].num_bits = 3;
@@ -265,7 +265,7 @@
jtag_add_dr_scan(3, fields, jtag_get_end_state());
- jtag_add_callback(arm_le_to_h_u32, (u8 *)in);
+ jtag_add_callback(arm_le_to_h_u32, (uint8_t *)in);
jtag_add_runtest(0, jtag_get_end_state());
@@ -290,11 +290,11 @@
return ERROR_OK;
}
-extern void arm_endianness(u8 *tmp, void *in, int size, int be, int flip);
+extern void arm_endianness(uint8_t *tmp, void *in, int size, int be, int flip);
-static int arm9endianness(u8 *in, jtag_callback_data_t size, jtag_callback_data_t be, jtag_callback_data_t captured)
+static int arm9endianness(uint8_t *in, jtag_callback_data_t size, jtag_callback_data_t be, jtag_callback_data_t captured)
{
- arm_endianness((u8 *)captured, in, (int)size, (int)be, 0);
+ arm_endianness((uint8_t *)captured, in, (int)size, (int)be, 0);
return ERROR_OK;
}
@@ -448,7 +448,7 @@
int be = (target->endianness == TARGET_BIG_ENDIAN) ? 1 : 0;
u32 *buf_u32 = buffer;
u16 *buf_u16 = buffer;
- u8 *buf_u8 = buffer;
+ uint8_t *buf_u8 = buffer;
/* STMIA r0-15, [r0] at debug speed
* register values will start to appear on 4th DCLK
@@ -539,7 +539,7 @@
arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, NULL, 0);
}
-void arm9tdmi_write_xpsr_im8(target_t *target, u8 xpsr_im, int rot, int spsr)
+void arm9tdmi_write_xpsr_im8(target_t *target, uint8_t xpsr_im, int rot, int spsr)
{
/* get pointers to arch-specific information */
armv4_5_common_t *armv4_5 = target->arch_info;
Modified: trunk/src/target/arm_adi_v5.c
===================================================================
--- trunk/src/target/arm_adi_v5.c 2009-06-18 04:08:51 UTC (rev 2273)
+++ trunk/src/target/arm_adi_v5.c 2009-06-18 07:04:08 UTC (rev 2274)
@@ -70,12 +70,12 @@
* *
***************************************************************************/
-/* Scan out and in from target ordered u8 buffers */
-int adi_jtag_dp_scan(swjdp_common_t *swjdp, u8 instr, u8 reg_addr, u8 RnW, u8 *outvalue, u8 *invalue, u8 *ack)
+/* Scan out and in from target ordered uint8_t buffers */
+int adi_jtag_dp_scan(swjdp_common_t *swjdp, uint8_t instr, uint8_t reg_addr, uint8_t RnW, uint8_t *outvalue, uint8_t *invalue, uint8_t *ack)
{
arm_jtag_t *jtag_info = swjdp->jtag_info;
scan_field_t fields[2];
- u8 out_addr_buf;
+ uint8_t out_addr_buf;
jtag_set_end_state(TAP_IDLE);
arm_jtag_set_instr(jtag_info, instr, NULL);
@@ -101,12 +101,12 @@
}
/* Scan out and in from host ordered u32 variables */
-int adi_jtag_dp_scan_u32(swjdp_common_t *swjdp, u8 instr, u8 reg_addr, u8 RnW, u32 outvalue, u32 *invalue, u8 *ack)
+int adi_jtag_dp_scan_u32(swjdp_common_t *swjdp, uint8_t instr, uint8_t reg_addr, uint8_t RnW, u32 outvalue, u32 *invalue, uint8_t *ack)
{
arm_jtag_t *jtag_info = swjdp->jtag_info;
scan_field_t fields[2];
- u8 out_value_buf[4];
- u8 out_addr_buf;
+ uint8_t out_value_buf[4];
+ uint8_t out_addr_buf;
jtag_set_end_state(TAP_IDLE);
arm_jtag_set_instr(jtag_info, instr, NULL);
@@ -129,10 +129,10 @@
if (invalue)
{
- fields[1].in_value = (u8 *)invalue;
+ fields[1].in_value = (uint8_t *)invalue;
jtag_add_dr_scan(2, fields, jtag_get_end_state());
- jtag_add_callback(arm_le_to_h_u32, (u8 *)invalue);
+ jtag_add_callback(arm_le_to_h_u32, (uint8_t *)invalue);
} else
{
@@ -143,7 +143,7 @@
}
/* scan_inout_check adds one extra inscan for DPAP_READ commands to read variables */
-int scan_inout_check(swjdp_common_t *swjdp, u8 instr, u8 reg_addr, u8 RnW, u8 *outvalue, u8 *invalue)
+int scan_inout_check(swjdp_common_t *swjdp, uint8_t instr, uint8_t reg_addr, uint8_t RnW, uint8_t *outvalue, uint8_t *invalue)
{
adi_jtag_dp_scan(swjdp, instr, reg_addr, RnW, outvalue, NULL, NULL);
@@ -161,7 +161,7 @@
return ERROR_OK;
}
-int scan_inout_check_u32(swjdp_common_t *swjdp, u8 instr, u8 reg_addr, u8 RnW, u32 outvalue, u32 *invalue)
+int scan_inout_check_u32(swjdp_common_t *swjdp, uint8_t instr, uint8_t reg_addr, uint8_t RnW, u32 outvalue, u32 *invalue)
{
adi_jtag_dp_scan_u32(swjdp, instr, reg_addr, RnW, outvalue, NULL, NULL);
@@ -287,17 +287,17 @@
* *
***************************************************************************/
-int dap_dp_write_reg(swjdp_common_t *swjdp, u32 value, u8 reg_addr)
+int dap_dp_write_reg(swjdp_common_t *swjdp, u32 value, uint8_t reg_addr)
{
return scan_inout_check_u32(swjdp, DAP_IR_DPACC, reg_addr, DPAP_WRITE, value, NULL);
}
-int dap_dp_read_reg(swjdp_common_t *swjdp, u32 *value, u8 reg_addr)
+int dap_dp_read_reg(swjdp_common_t *swjdp, u32 *value, uint8_t reg_addr)
{
return scan_inout_check_u32(swjdp, DAP_IR_DPACC, reg_addr, DPAP_READ, 0, value);
}
-int dap_ap_select(swjdp_common_t *swjdp,u8 apsel)
+int dap_ap_select(swjdp_common_t *swjdp,uint8_t apsel)
{
u32 select;
select = (apsel<<24) & 0xFF000000;
@@ -328,7 +328,7 @@
return ERROR_OK;
}
-int dap_ap_write_reg(swjdp_common_t *swjdp, u32 reg_addr, u8* out_value_buf)
+int dap_ap_write_reg(swjdp_common_t *swjdp, u32 reg_addr, uint8_t* out_value_buf)
{
dap_dp_bankselect(swjdp, reg_addr);
scan_inout_check(swjdp, DAP_IR_APACC, reg_addr, DPAP_WRITE, out_value_buf, NULL);
@@ -336,7 +336,7 @@
return ERROR_OK;
}
-int dap_ap_read_reg(swjdp_common_t *swjdp, u32 reg_addr, u8 *in_value_buf)
+int dap_ap_read_reg(swjdp_common_t *swjdp, u32 reg_addr, uint8_t *in_value_buf)
{
dap_dp_bankselect(swjdp, reg_addr);
scan_inout_check(swjdp, DAP_IR_APACC, reg_addr, DPAP_READ, 0, in_value_buf);
@@ -345,7 +345,7 @@
}
int dap_ap_write_reg_u32(swjdp_common_t *swjdp, u32 reg_addr, u32 value)
{
- u8 out_value_buf[4];
+ uint8_t out_value_buf[4];
buf_set_u32(out_value_buf, 0, 32, value);
dap_dp_bankselect(swjdp, reg_addr);
@@ -442,16 +442,16 @@
/*****************************************************************************
* *
-* mem_ap_write_buf(swjdp_common_t *swjdp, u8 *buffer, int count, u32 address) *
+* mem_ap_write_buf(swjdp_common_t *swjdp, uint8_t *buffer, int count, u32 address) *
* *
* Write a buffer in target order (little endian) *
* *
*****************************************************************************/
-int mem_ap_write_buf_u32(swjdp_common_t *swjdp, u8 *buffer, int count, u32 address)
+int mem_ap_write_buf_u32(swjdp_common_t *swjdp, uint8_t *buffer, int count, u32 address)
{
int wcount, blocksize, writecount, errorcount = 0, retval = ERROR_OK;
u32 adr = address;
- u8* pBuffer = buffer;
+ uint8_t* pBuffer = buffer;
swjdp->trans_mode = TRANS_MODE_COMPOSITE;
@@ -469,7 +469,7 @@
for (i = 0; i < 4; i++ )
{
- *((u8*)pBuffer + (adr & 0x3)) = outvalue;
+ *((uint8_t*)pBuffer + (adr & 0x3)) = outvalue;
outvalue >>= 8;
adr++;
}
@@ -516,7 +516,7 @@
return retval;
}
-int mem_ap_write_buf_packed_u16(swjdp_common_t *swjdp, u8 *buffer, int count, u32 address)
+int mem_ap_write_buf_packed_u16(swjdp_common_t *swjdp, uint8_t *buffer, int count, u32 address)
{
int retval = ERROR_OK;
int wcount, blocksize, writecount, i;
@@ -563,7 +563,7 @@
for (i = 0; i < nbytes; i++ )
{
- *((u8*)buffer + (address & 0x3)) = outvalue;
+ *((uint8_t*)buffer + (address & 0x3)) = outvalue;
outvalue >>= 8;
address++;
}
@@ -587,7 +587,7 @@
return retval;
}
-int mem_ap_write_buf_u16(swjdp_common_t *swjdp, u8 *buffer, int count, u32 address)
+int mem_ap_write_buf_u16(swjdp_common_t *swjdp, uint8_t *buffer, int count, u32 address)
{
int retval = ERROR_OK;
@@ -612,7 +612,7 @@
return retval;
}
-int mem_ap_write_buf_packed_u8(swjdp_common_t *swjdp, u8 *buffer, int count, u32 address)
+int mem_ap_write_buf_packed_u8(swjdp_common_t *swjdp, uint8_t *buffer, int count, u32 address)
{
int retval = ERROR_OK;
int wcount, blocksize, writecount, i;
@@ -655,7 +655,7 @@
for (i = 0; i < nbytes; i++ )
{
- *((u8*)buffer + (address & 0x3)) = outvalue;
+ *((uint8_t*)buffer + (address & 0x3)) = outvalue;
outvalue >>= 8;
address++;
}
@@ -679,7 +679,7 @@
return retval;
}
-int mem_ap_write_buf_u8(swjdp_common_t *swjdp, u8 *buffer, int count, u32 address)
+int mem_ap_write_buf_u8(swjdp_common_t *swjdp, uint8_t *buffer, int count, u32 address)
{
int retval = ERROR_OK;
@@ -704,16 +704,16 @@
/*********************************************************************************
* *
-* mem_ap_read_buf_u32(swjdp_common_t *swjdp, u8 *buffer, int count, u32 address) *
+* mem_ap_read_buf_u32(swjdp_common_t *swjdp, uint8_t *buffer, int count, u32 address) *
* *
* Read block fast in target order (little endian) into a buffer *
* *
**********************************************************************************/
-int mem_ap_read_buf_u32(swjdp_common_t *swjdp, u8 *buffer, int count, u32 address)
+int mem_ap_read_buf_u32(swjdp_common_t *swjdp, uint8_t *buffer, int count, u32 address)
{
int wcount, blocksize, readcount, errorcount = 0, retval = ERROR_OK;
u32 adr = address;
- u8* pBuffer = buffer;
+ uint8_t* pBuffer = buffer;
swjdp->trans_mode = TRANS_MODE_COMPOSITE;
@@ -772,7 +772,7 @@
for (i = 0; i < 4; i++ )
{
- *((u8*)pBuffer) = (data >> 8 * (adr & 0x3));
+ *((uint8_t*)pBuffer) = (data >> 8 * (adr & 0x3));
pBuffer++;
adr++;
}
@@ -782,7 +782,7 @@
return retval;
}
-int mem_ap_read_buf_packed_u16(swjdp_common_t *swjdp, u8 *buffer, int count, u32 address)
+int mem_ap_read_buf_packed_u16(swjdp_common_t *swjdp, uint8_t *buffer, int count, u32 address)
{
u32 invalue;
int retval = ERROR_OK;
@@ -821,7 +821,7 @@
for (i = 0; i < nbytes; i++ )
{
- *((u8*)buffer) = (invalue >> 8 * (address & 0x3));
+ *((uint8_t*)buffer) = (invalue >> 8 * (address & 0x3));
buffer++;
address++;
}
@@ -834,7 +834,7 @@
return retval;
}
-int mem_ap_read_buf_u16(swjdp_common_t *swjdp, u8 *buffer, int count, u32 address)
+int mem_ap_read_buf_u16(swjdp_common_t *swjdp, uint8_t *buffer, int count, u32 address)
{
u32 invalue, i;
int retval = ERROR_OK;
@@ -853,7 +853,7 @@
{
for (i = 0; i < 2; i++ )
{
- *((u8*)buffer) = (invalue >> 8 * (address & 0x3));
+ *((uint8_t*)buffer) = (invalue >> 8 * (address & 0x3));
buffer++;
address++;
}
@@ -877,7 +877,7 @@
* The solution is to arrange for a large out/in scan in this loop and
* and convert data afterwards.
*/
-int mem_ap_read_buf_packed_u8(swjdp_common_t *swjdp, u8 *buffer, int count, u32 address)
+int mem_ap_read_buf_packed_u8(swjdp_common_t *swjdp, uint8_t *buffer, int count, u32 address)
{
u32 invalue;
int retval = ERROR_OK;
@@ -913,7 +913,7 @@
for (i = 0; i < nbytes; i++ )
{
- *((u8*)buffer) = (invalue >> 8 * (address & 0x3));
+ *((uint8_t*)buffer) = (invalue >> 8 * (address & 0x3));
buffer++;
address++;
}
@@ -926,7 +926,7 @@
return retval;
}
-int mem_ap_read_buf_u8(swjdp_common_t *swjdp, u8 *buffer, int count, u32 address)
+int mem_ap_read_buf_u8(swjdp_common_t *swjdp, uint8_t *buffer, int count, u32 address)
{
u32 invalue;
int retval = ERROR_OK;
@@ -941,7 +941,7 @@
dap_setup_accessport(swjdp, CSW_8BIT | CSW_ADDRINC_SINGLE, address);
dap_ap_read_reg_u32(swjdp, AP_REG_DRW, &invalue );
retval = swjdp_transaction_endcheck(swjdp);
- *((u8*)buffer) = (invalue >> 8 * (address & 0x3));
+ *((uint8_t*)buffer) = (invalue >> 8 * (address & 0x3));
count--;
address++;
buffer++;
@@ -1018,7 +1018,7 @@
u32 dbgbase,apid;
int romtable_present = 0;
- u8 mem_ap;
+ uint8_t mem_ap;
u32 apselold;
apselold = swjdp->apsel;
Modified: trunk/src/target/arm_adi_v5.h
===================================================================
--- trunk/src/target/arm_adi_v5.h 2009-06-18 04:08:51 UTC (rev 2273)
+++ trunk/src/target/arm_adi_v5.h 2009-06-18 07:04:08 UTC (rev 2274)
@@ -94,9 +94,9 @@
u32 ap_csw_value;
u32 ap_tar_value;
/* information about current pending SWjDP-AHBAP transaction */
- u8 trans_mode;
- u8 trans_rw;
- u8 ack;
+ uint8_t trans_mode;
+ uint8_t trans_rw;
+ uint8_t ack;
/* extra tck clocks for memory bus access */
u32 memaccess_tck;
/* Size of TAR autoincrement block, ARM ADI Specification requires at least 10 bits */
@@ -105,22 +105,22 @@
} swjdp_common_t;
/* Accessor function for currently selected DAP-AP number */
-static inline u8 dap_ap_get_select(swjdp_common_t *swjdp)
+static inline uint8_t dap_ap_get_select(swjdp_common_t *swjdp)
{
- return (u8)( swjdp ->apsel >> 24);
+ return (uint8_t)( swjdp ->apsel >> 24);
}
/* Internal functions used in the module, partial transactions, use with caution */
-extern int dap_dp_write_reg(swjdp_common_t *swjdp, u32 value, u8 reg_addr);
-/* extern int swjdp_write_apacc(swjdp_common_t *swjdp, u32 value, u8 reg_addr); */
-extern int dap_dp_read_reg(swjdp_common_t *swjdp, u32 *value, u8 reg_addr);
-/* extern int swjdp_read_apacc(swjdp_common_t *swjdp, u32 *value, u8 reg_addr); */
+extern int dap_dp_write_reg(swjdp_common_t *swjdp, u32 value, uint8_t reg_addr);
+/* extern int swjdp_write_apacc(swjdp_common_t *swjdp, u32 value, uint8_t reg_addr); */
+extern int dap_dp_read_reg(swjdp_common_t *swjdp, u32 *value, uint8_t reg_addr);
+/* extern int swjdp_read_apacc(swjdp_common_t *swjdp, u32 *value, uint8_t reg_addr); */
extern int dap_setup_accessport(swjdp_common_t *swjdp, u32 csw, u32 tar);
-extern int dap_ap_select(swjdp_common_t *swjdp,u8 apsel);
+extern int dap_ap_select(swjdp_common_t *swjdp,uint8_t apsel);
-extern int dap_ap_write_reg(swjdp_common_t *swjdp, u32 reg_addr, u8* out_value_buf);
+extern int dap_ap_write_reg(swjdp_common_t *swjdp, u32 reg_addr, uint8_t* out_value_buf);
extern int dap_ap_write_reg_u32(swjdp_common_t *swjdp, u32 reg_addr, u32 value);
-extern int dap_ap_read_reg(swjdp_common_t *swjdp, u32 reg_addr, u8 *in_value_buf);
+extern int dap_ap_read_reg(swjdp_common_t *swjdp, u32 reg_addr, uint8_t *in_value_buf);
extern int dap_ap_read_reg_u32(swjdp_common_t *swjdp, u32 reg_addr, u32 *value);
/* External interface, partial operations must be completed with swjdp_transaction_endcheck() */
@@ -135,12 +135,12 @@
extern int mem_ap_write_atomic_u32(swjdp_common_t *swjdp, u32 address, u32 value);
/* MEM-AP memory mapped bus block transfers */
-extern int mem_ap_read_buf_u8(swjdp_common_t *swjdp, u8 *buffer, int count, u32 address);
-extern int mem_ap_read_buf_u16(swjdp_common_t *swjdp, u8 *buffer, int count, u32 address);
-extern int mem_ap_read_buf_u32(swjdp_common_t *swjdp, u8 *buffer, int count, u32 address);
-extern int mem_ap_write_buf_u8(swjdp_common_t *swjdp, u8 *buffer, int count, u32 address);
-extern int mem_ap_write_buf_u16(swjdp_common_t *swjdp, u8 *buffer, int count, u32 address);
-extern int mem_ap_write_buf_u32(swjdp_common_t *swjdp, u8 *buffer, int count, u32 address);
+extern int mem_ap_read_buf_u8(swjdp_common_t *swjdp, uint8_t *buffer, int count, u32 address);
+extern int mem_ap_read_buf_u16(swjdp_common_t *swjdp, uint8_t *buffer, int count, u32 address);
+extern int mem_ap_read_buf_u32(swjdp_common_t *swjdp, uint8_t *buffer, int count, u32 address);
+extern int mem_ap_write_buf_u8(swjdp_common_t *swjdp, uint8_t *buffer, int count, u32 address);
+extern int mem_ap_write_buf_u16(swjdp_common_t *swjdp, uint8_t *buffer, int count, u32 address);
+extern int mem_ap_write_buf_u32(swjdp_common_t *swjdp, uint8_t *buffer, int count, u32 address);
/* Initialisation of the debug system, power domains and registers */
extern int ahbap_debugport_init(swjdp_common_t *swjdp);
Modified: trunk/src/target/arm_disassembler.c
===================================================================
--- trunk/src/target/arm_disassembler.c 2009-06-18 04:08:51 UTC (rev 2273)
+++ trunk/src/target/arm_disassembler.c 2009-06-18 07:04:08 UTC (rev 2274)
@@ -102,7 +102,7 @@
int evaluate_b_bl(u32 opcode, u32 address, arm_instruction_t *instruction)
{
- u8 L;
+ uint8_t L;
u32 immediate;
int offset;
u32 target_address;
@@ -139,12 +139,12 @@
/* both normal and extended instruction space (condition field b1111) */
int evaluate_ldc_stc_mcrr_mrrc(u32 opcode, u32 address, arm_instruction_t *instruction)
{
- u8 cp_num = (opcode & 0xf00) >> 8;
+ uint8_t cp_num = (opcode & 0xf00) >> 8;
/* MCRR or MRRC */
if (((opcode & 0x0ff00000) == 0x0c400000) || ((opcode & 0x0ff00000) == 0x0c400000))
{
- u8 cp_opcode, Rd, Rn, CRm;
+ uint8_t cp_opcode, Rd, Rn, CRm;
char *mnemonic;
cp_opcode = (opcode & 0xf0) >> 4;
@@ -171,8 +171,8 @@
}
else /* LDC or STC */
{
- u8 CRd, Rn, offset;
- u8 U, N;
+ uint8_t CRd, Rn, offset;
+ uint8_t U, N;
char *mnemonic;
char addressing_mode[32];
@@ -221,7 +221,7 @@
{
char* cond;
char* mnemonic;
- u8 cp_num, opcode_1, CRd_Rd, CRn, CRm, opcode_2;
+ uint8_t cp_num, opcode_1, CRd_Rd, CRn, CRm, opcode_2;
cond = ((opcode & 0xf0000000) == 0xf0000000) ? "2" : COND(opcode);
cp_num = (opcode & 0xf00) >> 8;
@@ -268,8 +268,8 @@
/* Load/store instructions */
int evaluate_load_store(u32 opcode, u32 address, arm_instruction_t *instruction)
{
- u8 I, P, U, B, W, L;
- u8 Rn, Rd;
+ uint8_t I, P, U, B, W, L;
+ uint8_t Rn, Rd;
char *operation; /* "LDR" or "STR" */
char *suffix; /* "", "B", "T", "BT" */
char offset[32];
@@ -351,8 +351,8 @@
}
else /* either +-<Rm> or +-<Rm>, <shift>, #<shift_imm> */
{
- u8 shift_imm, shift;
- u8 Rm;
+ uint8_t shift_imm, shift;
+ uint8_t Rm;
shift_imm = (opcode & 0xf80) >> 7;
shift = (opcode & 0x60) >> 5;
@@ -436,8 +436,8 @@
/* Miscellaneous load/store instructions */
int evaluate_misc_load_store(u32 opcode, u32 address, arm_instruction_t *instruction)
{
- u8 P, U, I, W, L, S, H;
- u8 Rn, Rd;
+ uint8_t P, U, I, W, L, S, H;
+ uint8_t Rn, Rd;
char *operation; /* "LDR" or "STR" */
char *suffix; /* "H", "SB", "SH", "D" */
char offset[32];
@@ -519,7 +519,7 @@
}
else /* Register offset/index (+-<Rm>) */
{
- u8 Rm;
+ uint8_t Rm;
Rm = (opcode & 0xf);
snprintf(offset, 32, "%sr%i", (U) ? "" : "-", Rm);
@@ -563,7 +563,7 @@
/* Load/store multiples instructions */
int evaluate_ldm_stm(u32 opcode, u32 address, arm_instruction_t *instruction)
{
- u8 P, U, S, W, L, Rn;
+ uint8_t P, U, S, W, L, Rn;
u32 register_list;
char *addressing_mode;
char *mnemonic;
@@ -656,7 +656,7 @@
/* Multiply (accumulate) */
if ((opcode & 0x0f800000) == 0x00000000)
{
- u8 Rm, Rs, Rn, Rd, S;
+ uint8_t Rm, Rs, Rn, Rd, S;
Rm = opcode & 0xf;
Rs = (opcode & 0xf00) >> 8;
Rn = (opcode & 0xf000) >> 12;
@@ -684,7 +684,7 @@
if ((opcode & 0x0f800000) == 0x00800000)
{
char* mnemonic = NULL;
- u8 Rm, Rs, RdHi, RdLow, S;
+ uint8_t Rm, Rs, RdHi, RdLow, S;
Rm = opcode & 0xf;
Rs = (opcode & 0xf00) >> 8;
RdHi = (opcode & 0xf000) >> 12;
@@ -721,7 +721,7 @@
/* Swap/swap byte */
if ((opcode & 0x0f800000) == 0x01000000)
{
- u8 Rm, Rd, Rn;
+ uint8_t Rm, Rd, Rn;
Rm = opcode & 0xf;
Rd = (opcode & 0xf000) >> 12;
Rn = (opcode & 0xf0000) >> 16;
@@ -752,8 +752,8 @@
/* immediate variant */
if (opcode & 0x02000000)
{
- u8 immediate = (opcode & 0xff);
- u8 rotate = (opcode & 0xf00);
+ uint8_t immediate = (opcode & 0xff);
+ uint8_t rotate = (opcode & 0xf00);
snprintf(instruction->text, 128, "0x%8.8x\t0x%8.8x\tMSR%s %s_%s%s%s%s, 0x%8.8x",
address, opcode, COND(opcode), PSR,
@@ -766,7 +766,7 @@
}
else /* register variant */
{
- u8 Rm = opcode & 0xf;
+ uint8_t Rm = opcode & 0xf;
snprintf(instruction->text, 128, "0x%8.8x\t0x%8.8x\tMSR%s %s_%s%s%s%s, r%i",
address, opcode, COND(opcode), PSR,
(opcode & 0x10000) ? "c" : "",
@@ -780,7 +780,7 @@
}
else /* Move status register to register (MRS) */
{
- u8 Rd;
+ uint8_t Rd;
instruction->type = ARM_MRS;
Rd = (opcode & 0x0000f000) >> 12;
@@ -804,7 +804,7 @@
/* BX */
if ((opcode & 0x006000f0) == 0x00200010)
{
- u8 Rm;
+ uint8_t Rm;
instruction->type = ARM_BX;
Rm = opcode & 0xf;
@@ -818,7 +818,7 @@
/* CLZ */
if ((opcode & 0x006000f0) == 0x00600010)
{
- u8 Rm, Rd;
+ uint8_t Rm, Rd;
instruction->type = ARM_CLZ;
Rm = opcode & 0xf;
Rd = (opcode & 0xf000) >> 12;
@@ -830,7 +830,7 @@
/* BLX(2) */
if ((opcode & 0x006000f0) == 0x00200030)
{
- u8 Rm;
+ uint8_t Rm;
instruction->type = ARM_BLX;
Rm = opcode & 0xf;
@@ -844,7 +844,7 @@
/* Enhanced DSP add/subtracts */
if ((opcode & 0x0000000f0) == 0x00000050)
{
- u8 Rm, Rd, Rn;
+ uint8_t Rm, Rd, Rn;
char *mnemonic = NULL;
Rm = opcode & 0xf;
Rd = (opcode & 0xf000) >> 12;
@@ -894,7 +894,7 @@
/* SMLA<x><y> */
if ((opcode & 0x00600000) == 0x00000000)
{
- u8 Rd, Rm, Rs, Rn;
+ uint8_t Rd, Rm, Rs, Rn;
instruction->type = ARM_SMLAxy;
Rd = (opcode & 0xf0000) >> 16;
Rm = (opcode & 0xf);
@@ -909,7 +909,7 @@
/* SMLAL<x><y> */
if ((opcode & 0x00600000) == 0x00400000)
{
- u8 RdLow, RdHi, Rm, Rs;
+ uint8_t RdLow, RdHi, Rm, Rs;
instruction->type = ARM_SMLAxy;
RdHi = (opcode & 0xf0000) >> 16;
RdLow = (opcode & 0xf000) >> 12;
@@ -924,7 +924,7 @@
/* SMLAW<y> */
if (((opcode & 0x00600000) == 0x00100000) && (x == 0))
{
- u8 Rd, Rm, Rs, Rn;
+ uint8_t Rd, Rm, Rs, Rn;
instruction->type = ARM_SMLAWy;
Rd = (opcode & 0xf0000) >> 16;
Rm = (opcode & 0xf);
@@ -939,7 +939,7 @@
/* SMUL<x><y> */
if ((opcode & 0x00600000) == 0x00300000)
{
- u8 Rd, Rm, Rs;
+ uint8_t Rd, Rm, Rs;
instruction->type = ARM_SMULxy;
Rd = (opcode & 0xf0000) >> 16;
Rm = (opcode & 0xf);
@@ -953,7 +953,7 @@
/* SMULW<y> */
if (((opcode & 0x00600000) == 0x00100000) && (x == 1))
{
- u8 Rd, Rm, Rs;
+ uint8_t Rd, Rm, Rs;
instruction->type = ARM_SMULWy;
Rd = (opcode & 0xf0000) >> 16;
Rm = (opcode & 0xf);
@@ -970,7 +970,7 @@
int evaluate_data_proc(u32 opcode, u32 address, arm_instruction_t *instruction)
{
- u8 I, op, S, Rn, Rd;
+ uint8_t I, op, S, Rn, Rd;
char *mnemonic = NULL;
char shifter_operand[32];
@@ -1055,8 +1055,8 @@
if (I) /* immediate shifter operand (#<immediate>)*/
{
- u8 immed_8 = opcode & 0xff;
- u8 rotate_imm = (opcode & 0xf00) >> 8;
+ uint8_t immed_8 = opcode & 0xff;
+ uint8_t rotate_imm = (opcode & 0xf00) >> 8;
u32 immediate;
immediate = ror(immed_8, rotate_imm * 2);
@@ -1068,13 +1068,13 @@
}
else /* register-based shifter operand */
{
- u8 shift, Rm;
+ uint8_t shift, Rm;
shift = (opcode & 0x60) >> 5;
Rm = (opcode & 0xf);
if ((opcode & 0x10) != 0x10) /* Immediate shifts ("<Rm>" or "<Rm>, <shift> #<shift_immediate>") */
{
- u8 shift_imm;
+ uint8_t shift_imm;
shift_imm = (opcode & 0xf80) >> 7;
instruction->info.data_proc.variant = 1;
@@ -1124,7 +1124,7 @@
}
else /* Register shifts ("<Rm>, <shift> <Rs>") */
{
- u8 Rs = (opcode & 0xf00) >> 8;
+ uint8_t Rs = (opcode & 0xf00) >> 8;
instruction->info.data_proc.variant = 2;
instruction->info.data_proc.shifter_operand.register_shift.Rm = Rm;
@@ -1368,9 +1368,9 @@
int evaluate_add_sub_thumb(u16 opcode, u32 address, arm_instruction_t *instruction)
{
- u8 Rd = (opcode >> 0) & 0x7;
- u8 Rn = (opcode >> 3) & 0x7;
- u8 Rm_imm = (opcode >> 6) & 0x7;
+ uint8_t Rd = (opcode >> 0) & 0x7;
+ uint8_t Rn = (opcode >> 3) & 0x7;
+ uint8_t Rm_imm = (opcode >> 6) & 0x7;
u32 opc = opcode & (1<<9);
u32 reg_imm = opcode & (1<<10);
char *mnemonic;
@@ -1410,10 +1410,10 @@
int evaluate_shift_imm_thumb(u16 opcode, u32 address, arm_instruction_t *instruction)
{
- u8 Rd = (opcode >> 0) & 0x7;
- u8 Rm = (opcode >> 3) & 0x7;
- u8 imm = (opcode >> 6) & 0x1f;
- u8 opc = (opcode >> 11) & 0x3;
+ uint8_t Rd = (opcode >> 0) & 0x7;
+ uint8_t Rm = (opcode >> 3) & 0x7;
+ uint8_t imm = (opcode >> 6) & 0x1f;
+ uint8_t opc = (opcode >> 11) & 0x3;
char *mnemonic = NULL;
switch(opc)
@@ -1454,8 +1454,8 @@
int evaluate_data_proc_imm_thumb(u16 opcode, u32 address, arm_instruction_t *instruction)
{
- u8 imm = opcode & 0xff;
- u8 Rd = (opcode >> 8) & 0x7;
+ uint8_t imm = opcode & 0xff;
+ uint8_t Rd = (opcode >> 8) & 0x7;
u32 opc = (opcode >> 11) & 0x3;
char *mnemonic = NULL;
@@ -1495,7 +1495,7 @@
int evaluate_data_proc_thumb(u16 opcode, u32 address, arm_instruction_t *instruction)
{
- u8 high_reg, op, Rm, Rd,H1,H2;
+ uint8_t high_reg, op, Rm, Rd,H1,H2;
char *mnemonic = NULL;
high_reg = (opcode & 0x0400) >> 10;
@@ -1655,7 +1655,7 @@
int evaluate_load_literal_thumb(u16 opcode, u32 address, arm_instruction_t *instruction)
{
u32 immediate;
- u8 Rd = (opcode >> 8) & 0x7;
+ uint8_t Rd = (opcode >> 8) & 0x7;
instruction->type = ARM_LDR;
immediate = opcode & 0x000000ff;
@@ -1673,10 +1673,10 @@
int evaluate_load_store_reg_thumb(u16 opcode, u32 address, arm_instruction_t *instruction)
{
- u8 Rd = (opcode >> 0) & 0x7;
- u8 Rn = (opcode >> 3) & 0x7;
- u8 Rm = (opcode >> 6) & 0x7;
- u8 opc = (opcode >> 9) & 0x7;
+ uint8_t Rd = (opcode >> 0) & 0x7;
+ uint8_t Rn = (opcode >> 3) & 0x7;
+ uint8_t Rm = (opcode >> 6) & 0x7;
+ uint8_t opc = (opcode >> 9) & 0x7;
char *mnemonic = NULL;
switch(opc)
@@ -1729,8 +1729,8 @@
int evaluate_load_store_imm_thumb(u16 opcode, u32 address, arm_instruction_t *instruction)
{
u32 offset = (opcode >> 6) & 0x1f;
- u8 Rd = (opcode >> 0) & 0x7;
- u8 Rn = (opcode >> 3) & 0x7;
+ uint8_t Rd = (opcode >> 0) & 0x7;
+ uint8_t Rn = (opcode >> 3) & 0x7;
u32 L = opcode & (1<<11);
u32 B = opcode & (1<<12);
char *mnemonic;
@@ -1773,7 +1773,7 @@
int evaluate_load_store_stack_thumb(u16 opcode, u32 address, arm_instruction_t *instruction)
{
u32 offset = opcode & 0xff;
- u8 Rd = (opcode >> 8) & 0x7;
+ uint8_t Rd = (opcode >> 8) & 0x7;
u32 L = opcode & (1<<11);
char *mnemonic;
@@ -1802,8 +1802,8 @@
int evaluate_add_sp_pc_thumb(u16 opcode, u32 address, arm_instruction_t *instruction)
{
u32 imm = opcode & 0xff;
- u8 Rd = (opcode >> 8) & 0x7;
- u8 Rn;
+ uint8_t Rd = (opcode >> 8) & 0x7;
+ uint8_t Rn;
u32 SP = opcode & (1<<11);
char *reg_name;
@@ -1833,7 +1833,7 @@
int evaluate_adjust_stack_thumb(u16 opcode, u32 address, arm_instruction_t *instruction)
{
u32 imm = opcode & 0x7f;
- u8 opc = opcode & (1<<7);
+ uint8_t opc = opcode & (1<<7);
char *mnemonic;
@@ -1874,8 +1874,8 @@
u32 reg_list = opcode & 0xff;
u32 L = opcode & (1<<11);
u32 R = opcode & (1<<8);
- u8 Rn = (opcode >> 8) & 7;
- u8 addr_mode = 0 /* IA */;
+ uint8_t Rn = (opcode >> 8) & 7;
+ uint8_t addr_mode = 0 /* IA */;
char reg_names[40];
char *reg_names_p;
char *mnemonic;
@@ -1939,7 +1939,7 @@
int evalua...
[truncated message content] |
|
From: <zw...@ma...> - 2009-06-18 06:08:56
|
Author: zwelch
Date: 2009-06-18 06:08:51 +0200 (Thu, 18 Jun 2009)
New Revision: 2273
Modified:
trunk/doc/openocd.texi
Log:
David Brownell <da...@pa...>:
The PLD stuff hasn't been documented yet. It's just Virtex2 for now,
but it looks like adding others would be easy.
Modified: trunk/doc/openocd.texi
===================================================================
--- trunk/doc/openocd.texi 2009-06-18 00:29:45 UTC (rev 2272)
+++ trunk/doc/openocd.texi 2009-06-18 04:08:51 UTC (rev 2273)
@@ -73,6 +73,7 @@
* CPU Configuration:: CPU Configuration
* Flash Commands:: Flash Commands
* NAND Flash Commands:: NAND Flash Commands
+* PLD/FPGA Commands:: PLD/FPGA Commands
* General Commands:: General Commands
* Architecture and Core Commands:: Architecture and Core Commands
* JTAG Commands:: JTAG Commands
@@ -3981,6 +3982,62 @@
change any behavior.
@end deffn
+@node PLD/FPGA Commands
+@chapter PLD/FPGA Commands
+@cindex PLD
+@cindex FPGA
+
+Programmable Logic Devices (PLDs) and the more flexible
+Field Programmable Gate Arrays (FPGAs) are both types of programmable hardware.
+OpenOCD can support programming them.
+Although PLDs are generally restrictive (cells are less functional, and
+there are no special purpose cells for memory or computational tasks),
+they share the same OpenOCD infrastructure.
+Accordingly, both are called PLDs here.
+
+@section PLD/FPGA Configuration and Commands
+
+As it does for JTAG TAPs, debug targets, and flash chips (both NOR and NAND),
+OpenOCD maintains a list of PLDs available for use in various commands.
+Also, each such PLD requires a driver.
+
+They are referenced by the number shown by the @command{pld devices} command,
+and new PLDs are defined by @command{pld device driver_name}.
+
+@deffn {Config Command} {pld device} driver_name tap_name [driver_options]
+Defines a new PLD device, supported by driver @var{driver_name},
+using the TAP named @var{tap_name}.
+The driver may make use of any @var{driver_options} to configure its
+behavior.
+@end deffn
+
+@deffn {Command} {pld devices}
+Lists the PLDs and their numbers.
+@end deffn
+
+@deffn {Command} {pld load} num filename
+Loads the file @file{filename} into the PLD identified by @var{num}.
+The file format must be inferred by the driver.
+@end deffn
+
+@section PLD/FPGA Drivers, Options, and Commands
+
+Drivers may support PLD-specific options to the @command{pld device}
+definition command, and may also define commands usable only with
+that particular type of PLD.
+
+@deffn {FPGA Driver} virtex2
+Virtex-II is a family of FPGAs sold by Xilinx.
+It supports the IEEE 1532 standard for In-System Configuration (ISC).
+No driver-specific PLD definition options are used,
+and one driver-specific command is defined.
+
+@deffn {Command} {virtex2 read_stat} num
+Reads and displays the Virtex-II status register (STAT)
+for FPGA @var{num}.
+@end deffn
+@end deffn
+
@node General Commands
@chapter General Commands
@cindex commands
|
|
From: <zw...@ma...> - 2009-06-18 02:29:52
|
Author: zwelch
Date: 2009-06-18 02:29:45 +0200 (Thu, 18 Jun 2009)
New Revision: 2272
Modified:
trunk/src/pld/pld.c
trunk/src/pld/virtex2.c
trunk/src/pld/xilinx_bit.c
Log:
David Brownell <da...@pa...>:
Clean up the PLD files:
- Get rid of some extraneous whitespace
- Make various functions static
- Wrap overlong lines
Modified: trunk/src/pld/pld.c
===================================================================
--- trunk/src/pld/pld.c 2009-06-18 00:29:39 UTC (rev 2271)
+++ trunk/src/pld/pld.c 2009-06-18 00:29:45 UTC (rev 2272)
@@ -30,18 +30,21 @@
*/
extern pld_driver_t virtex2_pld;
-pld_driver_t *pld_drivers[] =
+static pld_driver_t *pld_drivers[] =
{
&virtex2_pld,
NULL,
};
-pld_device_t *pld_devices;
+static pld_device_t *pld_devices;
static command_t *pld_cmd;
-int handle_pld_devices_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
-int handle_pld_device_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
-int handle_pld_load_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
+static int handle_pld_devices_command(struct command_context_s *cmd_ctx,
+ char *cmd, char **args, int argc);
+static int handle_pld_device_command(struct command_context_s *cmd_ctx,
+ char *cmd, char **args, int argc);
+static int handle_pld_load_command(struct command_context_s *cmd_ctx,
+ char *cmd, char **args, int argc);
int pld_init(struct command_context_s *cmd_ctx)
{
@@ -52,7 +55,7 @@
register_command(cmd_ctx, pld_cmd, "load", handle_pld_load_command, COMMAND_EXEC,
"load configuration <file> into programmable logic device");
}
-
+
return ERROR_OK;
}
@@ -68,47 +71,48 @@
return p;
}
}
-
+
return NULL;
}
/* pld device <driver> [driver_options ...]
*/
-int handle_pld_device_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
+static int handle_pld_device_command(struct command_context_s *cmd_ctx,
+ char *cmd, char **args, int argc)
{
int i;
int found = 0;
-
+
if (argc < 1)
{
- LOG_WARNING("incomplete 'pld bank' configuration");
+ LOG_WARNING("incomplete 'pld device' command");
return ERROR_OK;
}
-
+
for (i = 0; pld_drivers[i]; i++)
{
if (strcmp(args[0], pld_drivers[i]->name) == 0)
{
pld_device_t *p, *c;
-
+
/* register pld specific commands */
if (pld_drivers[i]->register_commands(cmd_ctx) != ERROR_OK)
{
LOG_ERROR("couldn't register '%s' commands", args[0]);
exit(-1);
}
-
+
c = malloc(sizeof(pld_device_t));
c->driver = pld_drivers[i];
c->next = NULL;
-
+
if (pld_drivers[i]->pld_device_command(cmd_ctx, cmd, args, argc, c) != ERROR_OK)
{
LOG_ERROR("'%s' driver rejected pld device", args[0]);
free(c);
return ERROR_OK;
}
-
+
/* put pld device in linked list */
if (pld_devices)
{
@@ -121,61 +125,63 @@
{
pld_devices = c;
}
-
+
found = 1;
}
}
-
+
/* no matching pld driver found */
if (!found)
{
LOG_ERROR("pld driver '%s' not found", args[0]);
exit(-1);
}
-
+
return ERROR_OK;
}
-int handle_pld_devices_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
+static int handle_pld_devices_command(struct command_context_s *cmd_ctx,
+ char *cmd, char **args, int argc)
{
pld_device_t *p;
int i = 0;
-
+
if (!pld_devices)
{
command_print(cmd_ctx, "no pld devices configured");
return ERROR_OK;
}
-
+
for (p = pld_devices; p; p = p->next)
{
command_print(cmd_ctx, "#%i: %s", i++, p->driver->name);
}
-
+
return ERROR_OK;
}
-int handle_pld_load_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
+static int handle_pld_load_command(struct command_context_s *cmd_ctx,
+ char *cmd, char **args, int argc)
{
int retval;
struct timeval start, end, duration;
pld_device_t *p;
-
+
gettimeofday(&start, NULL);
-
+
if (argc < 2)
{
command_print(cmd_ctx, "usage: pld load <device#> <file>");
return ERROR_OK;
}
-
+
p = get_pld_device_by_num(strtoul(args[0], NULL, 0));
if (!p)
{
command_print(cmd_ctx, "pld device '#%s' is out of bounds", args[0]);
return ERROR_OK;
}
-
+
if ((retval = p->driver->load(p, args[1])) != ERROR_OK)
{
command_print(cmd_ctx, "failed loading file %s to pld device %lu",
@@ -186,22 +192,22 @@
}
else
{
- gettimeofday(&end, NULL);
+ gettimeofday(&end, NULL);
timeval_subtract(&duration, &end, &start);
command_print(cmd_ctx, "loaded file %s to pld device %lu in %jis %jius",
args[1], strtoul(args[0], NULL, 0),
(intmax_t)duration.tv_sec, (intmax_t)duration.tv_usec);
}
-
+
return ERROR_OK;
}
int pld_register_commands(struct command_context_s *cmd_ctx)
{
pld_cmd = register_command(cmd_ctx, NULL, "pld", NULL, COMMAND_ANY, "programmable logic device commands");
-
+
register_command(cmd_ctx, pld_cmd, "device", handle_pld_device_command, COMMAND_CONFIG, NULL);
-
+
return ERROR_OK;
}
Modified: trunk/src/pld/virtex2.c
===================================================================
--- trunk/src/pld/virtex2.c 2009-06-18 00:29:39 UTC (rev 2271)
+++ trunk/src/pld/virtex2.c 2009-06-18 00:29:45 UTC (rev 2272)
@@ -26,9 +26,9 @@
#include "pld.h"
-int virtex2_register_commands(struct command_context_s *cmd_ctx);
-int virtex2_pld_device_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct pld_device_s *pld_device);
-int virtex2_load(struct pld_device_s *pld_device, char *filename);
+static int virtex2_register_commands(struct command_context_s *cmd_ctx);
+static int virtex2_pld_device_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct pld_device_s *pld_device);
+static int virtex2_load(struct pld_device_s *pld_device, char *filename);
pld_driver_t virtex2_pld =
{
@@ -38,9 +38,9 @@
.load = virtex2_load,
};
-int virtex2_set_instr(jtag_tap_t *tap, u32 new_instr)
+static int virtex2_set_instr(jtag_tap_t *tap, u32 new_instr)
{
- if (tap==NULL)
+ if (tap == NULL)
return ERROR_FAIL;
if (buf_get_u32(tap->cur_instr, 0, tap->ir_length) != new_instr)
@@ -51,13 +51,8 @@
field.num_bits = tap->ir_length;
field.out_value = calloc(CEIL(field.num_bits, 8), 1);
buf_set_u32(field.out_value, 0, field.num_bits, new_instr);
-
field.in_value = NULL;
-
-
-
-
jtag_add_ir_scan(1, &field, jtag_set_end_state(TAP_IDLE));
free(field.out_value);
@@ -66,7 +61,8 @@
return ERROR_OK;
}
-int virtex2_send_32(struct pld_device_s *pld_device, int num_words, u32 *words)
+static int virtex2_send_32(struct pld_device_s *pld_device,
+ int num_words, u32 *words)
{
virtex2_pld_device_t *virtex2_info = pld_device->driver_priv;
scan_field_t scan_field;
@@ -94,10 +90,11 @@
static __inline__ void virtexflip32(u8 *in)
{
- *((u32 *)in)=flip_u32(le_to_h_u32(in), 32);
+ *((u32 *)in) = flip_u32(le_to_h_u32(in), 32);
}
-int virtex2_receive_32(struct pld_device_s *pld_device, int num_words, u32 *words)
+static int virtex2_receive_32(struct pld_device_s *pld_device,
+ int num_words, u32 *words)
{
virtex2_pld_device_t *virtex2_info = pld_device->driver_priv;
scan_field_t scan_field;
@@ -112,7 +109,7 @@
while (num_words--)
{
scan_field.in_value = (u8 *)words;
-
+
jtag_add_dr_scan(1, &scan_field, jtag_set_end_state(TAP_DRPAUSE));
jtag_add_callback(virtexflip32, (u8 *)words);
@@ -123,7 +120,7 @@
return ERROR_OK;
}
-int virtex2_read_stat(struct pld_device_s *pld_device, u32 *status)
+static int virtex2_read_stat(struct pld_device_s *pld_device, u32 *status)
{
u32 data[5];
@@ -145,23 +142,17 @@
return ERROR_OK;
}
-int virtex2_load(struct pld_device_s *pld_device, char *filename)
+static int virtex2_load(struct pld_device_s *pld_device, char *filename)
{
virtex2_pld_device_t *virtex2_info = pld_device->driver_priv;
xilinx_bit_file_t bit_file;
int retval;
unsigned int i;
-
scan_field_t field;
field.tap = virtex2_info->tap;
-
field.in_value = NULL;
-
-
-
-
if ((retval = xilinx_read_bit_file(&bit_file, filename)) != ERROR_OK)
return retval;
@@ -197,7 +188,8 @@
return ERROR_OK;
}
-int virtex2_handle_read_stat_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
+static int virtex2_handle_read_stat_command(struct command_context_s *cmd_ctx,
+ char *cmd, char **args, int argc)
{
pld_device_t *device;
virtex2_pld_device_t *virtex2_info;
@@ -225,7 +217,7 @@
return ERROR_OK;
}
-int virtex2_register_commands(struct command_context_s *cmd_ctx)
+static int virtex2_register_commands(struct command_context_s *cmd_ctx)
{
command_t *virtex2_cmd = register_command(cmd_ctx, NULL, "virtex2", NULL, COMMAND_ANY, "virtex2 specific commands");
@@ -235,7 +227,8 @@
return ERROR_OK;
}
-int virtex2_pld_device_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct pld_device_s *pld_device)
+static int virtex2_pld_device_command(struct command_context_s *cmd_ctx,
+ char *cmd, char **args, int argc, struct pld_device_s *pld_device)
{
jtag_tap_t *tap;
@@ -247,8 +240,8 @@
return ERROR_PLD_DEVICE_INVALID;
}
- tap = jtag_tap_by_string( args[1] );
- if( tap == NULL ){
+ tap = jtag_tap_by_string(args[1]);
+ if (tap == NULL) {
command_print( cmd_ctx, "Tap: %s does not exist", args[1] );
return ERROR_OK;
}
Modified: trunk/src/pld/xilinx_bit.c
===================================================================
--- trunk/src/pld/xilinx_bit.c 2009-06-18 00:29:39 UTC (rev 2271)
+++ trunk/src/pld/xilinx_bit.c 2009-06-18 00:29:45 UTC (rev 2272)
@@ -28,13 +28,14 @@
#include <sys/stat.h>
-int read_section(FILE *input_file, int length_size, char section, u32 *buffer_length, u8 **buffer)
+static int read_section(FILE *input_file, int length_size, char section,
+ u32 *buffer_length, u8 **buffer)
{
u8 length_buffer[4];
int length;
char section_char;
int read_count;
-
+
if ((length_size != 2) && (length_size != 4))
{
LOG_ERROR("BUG: length_size neither 2 nor 4");
@@ -45,7 +46,7 @@
{
return ERROR_PLD_FILE_LOAD_FAILED;
}
-
+
if (section_char != section)
{
return ERROR_PLD_FILE_LOAD_FAILED;
@@ -55,22 +56,22 @@
{
return ERROR_PLD_FILE_LOAD_FAILED;
}
-
+
if (length_size == 4)
length = be_to_h_u32(length_buffer);
else /* (length_size == 2) */
length = be_to_h_u16(length_buffer);
-
+
if (buffer_length)
*buffer_length = length;
-
+
*buffer = malloc(length);
-
+
if ((read_count = fread(*buffer, 1, length, input_file)) != length)
{
return ERROR_PLD_FILE_LOAD_FAILED;
}
-
+
return ERROR_OK;
}
@@ -79,10 +80,10 @@
FILE *input_file;
struct stat input_stat;
int read_count;
-
+
if (!filename || !bit_file)
return ERROR_INVALID_ARGUMENTS;
-
+
if (stat(filename, &input_stat) == -1)
{
LOG_ERROR("couldn't stat() %s: %s", filename, strerror(errno));
@@ -94,30 +95,30 @@
LOG_ERROR("%s is a directory", filename);
return ERROR_PLD_FILE_LOAD_FAILED;
}
-
+
if (input_stat.st_size == 0){
LOG_ERROR("Empty file %s", filename);
return ERROR_PLD_FILE_LOAD_FAILED;
}
-
+
if (!(input_file = fopen(filename, "rb")))
{
LOG_ERROR("couldn't open %s: %s", filename, strerror(errno));
return ERROR_PLD_FILE_LOAD_FAILED;
}
-
+
if ((read_count = fread(bit_file->unknown_header, 1, 13, input_file)) != 13)
{
LOG_ERROR("couldn't read unknown_header from file '%s'", filename);
return ERROR_PLD_FILE_LOAD_FAILED;
}
-
+
if (read_section(input_file, 2, 'a', NULL, &bit_file->source_file) != ERROR_OK)
return ERROR_PLD_FILE_LOAD_FAILED;
-
+
if (read_section(input_file, 2, 'b', NULL, &bit_file->part_name) != ERROR_OK)
return ERROR_PLD_FILE_LOAD_FAILED;
-
+
if (read_section(input_file, 2, 'c', NULL, &bit_file->date) != ERROR_OK)
return ERROR_PLD_FILE_LOAD_FAILED;
@@ -126,11 +127,11 @@
if (read_section(input_file, 4, 'e', &bit_file->length, &bit_file->data) != ERROR_OK)
return ERROR_PLD_FILE_LOAD_FAILED;
-
+
LOG_DEBUG("bit_file: %s %s %s,%s %i", bit_file->source_file, bit_file->part_name,
bit_file->date, bit_file->time, bit_file->length);
-
+
fclose(input_file);
-
+
return ERROR_OK;
}
|
|
From: <zw...@ma...> - 2009-06-18 02:29:43
|
Author: zwelch
Date: 2009-06-18 02:29:39 +0200 (Thu, 18 Jun 2009)
New Revision: 2271
Modified:
trunk/doc/openocd.texi
Log:
David Brownell <da...@pa...>:
Various bits of cleanup, mostly to match the style hints
I just got around to writing up.
- Various @cindex improvements
- Cross reference the command line options in a few spots,
notably for @command{debug_level}
- Clean the config file guidelines a bit:
* They're for all users, not just integrators
* Reference the interface config chapter
* Don't emphasize command line usage here
* Tweak board and target config introductory text
Plus two minor bits of cleanup: remove most date references,
and refer to the reader as "you" not "the user".
Modified: trunk/doc/openocd.texi
===================================================================
--- trunk/doc/openocd.texi 2009-06-18 00:29:33 UTC (rev 2270)
+++ trunk/doc/openocd.texi 2009-06-18 00:29:39 UTC (rev 2271)
@@ -104,6 +104,8 @@
around the world.
@section What is OpenOCD?
+@cindex TAP
+@cindex JTAG
The Open On-Chip Debugger (OpenOCD) aims to provide debugging,
in-system programming and boundary-scan testing for embedded target
@@ -356,7 +358,11 @@
@option{--with-ftd2xx-linux-tardir=PATH} - If using FTDICHIP.COM ft2232c driver
on Linux, give the directory where the Linux driver's TAR.GZ file was unpacked.
@item
-@option{--with-ftd2xx-lib=shared|static} - Linux only. Default: static. Specifies how the FTDICHIP.COM libftd2xx driver should be linked. Note: 'static' only works in conjunction with @option{--with-ftd2xx-linux-tardir}. The 'shared' value is supported (12/26/2008), however you must manually install the required header files and shared libraries in an appropriate place. This uses ``libusb'' internally.
+@option{--with-ftd2xx-lib=shared|static} - Linux only. Default: static.
+Specifies how the FTDICHIP.COM libftd2xx driver should be linked.
+Note: 'static' only works in conjunction with @option{--with-ftd2xx-linux-tardir}.
+The 'shared' value is supported, however you must manually install the required
+header files and shared libraries in an appropriate place.
@item
@option{--enable-presto_libftdi} - Enable building support for ASIX Presto programmer using the libftdi driver.
@item
@@ -398,8 +404,9 @@
The FTDICHIP drivers come as either a (win32) ZIP file, or a (Linux)
TAR.GZ file. You must unpack them ``some where'' convient. As of this
-writing (12/26/2008) FTDICHIP does not supply means to install these
-files ``in an appropriate place'' As a result, there are two
+writing FTDICHIP does not supply means to install these
+files ``in an appropriate place''.
+As a result, there are two
``./configure'' options that help.
Below is an example build process:
@@ -476,7 +483,7 @@
@cindex zy1000
@cindex printer port
@cindex USB Adapter
-@cindex rtck
+@cindex RTCK
Defined: @b{dongle}: A small device that plugins into a computer and serves as
an adapter .... [snip]
@@ -518,8 +525,6 @@
In summer 2009, USB high speed (480 Mbps) versions of these FTDI
chips are starting to become available in JTAG adapters.
-As of 28/Nov/2008, the following are supported:
-
@itemize @bullet
@item @b{usbjtag}
@* Link @url{http://www.hs-augsburg.de/~hhoegl/proj/usbjtag/usbjtag.html}
@@ -654,11 +659,9 @@
@node Running
@chapter Running
-@cindex running OpenOCD
-@cindex --configfile
-@cindex --debug_level
-@cindex --logfile
-@cindex --search
+@cindex command line options
+@cindex logfile
+@cindex directory search
The @option{--help} option shows:
@verbatim
@@ -696,8 +699,8 @@
@option{debug_level} to "3", outputting the most information,
including debug messages. The default setting is "2", outputting only
informational messages, warnings and errors. You can also change this
-setting from within a telnet or gdb session using @option{debug_level
-<n>} @xref{debug_level}.
+setting from within a telnet or gdb session using @command{debug_level
+<n>} (@pxref{debug_level}).
You can redirect all output from the daemon to a file using the
@option{-l <logfile>} switch.
@@ -851,8 +854,9 @@
to simplify your work.
@section User Config Files
-@cindex config file
+@cindex config file, user
@cindex user config file
+@cindex config file, overview
A user configuration file ties together all the parts of a project
in one place.
@@ -862,8 +866,10 @@
@item Ideally almost everything comes from configuration files
provided by someone else.
For example, OpenOCD distributes a @file{scripts} directory
-(probably in @file{/usr/share/openocd/scripts} on Linux);
-board and tool vendors can provide these too.
+(probably in @file{/usr/share/openocd/scripts} on Linux).
+Board and tool vendors can provide these too, as can individual
+user sites; the @option{-s} command line option lets you say
+where to find these files. (@xref{Running}.)
The AT91SAM7X256 example above works this way.
Three main types of non-user configuration file each have their
@@ -1003,16 +1009,13 @@
@node Config File Guidelines
@chapter Config File Guidelines
-This section/chapter is aimed at developers and integrators of
-OpenOCD. These are guidelines for creating new boards and new target
-configurations as of 28/Nov/2008.
+This chapter is aimed at any user who needs to write a config file,
+including developers and integrators of OpenOCD and any user who
+needs to get a new board working smoothly.
+It provides guidelines for creating those files.
-However, you, the user of OpenOCD, should be somewhat familiar with
-this section as it should help explain some of the internals of what
-you might be looking at.
+You should find the following directories under @t{$(INSTALLDIR)/lib/openocd} :
-The user should find the following directories under @t{$(INSTALLDIR)/lib/openocd} :
-
@itemize @bullet
@item @b{interface}
@*Think JTAG Dongle. Files that configure the JTAG dongle go here.
@@ -1033,43 +1036,43 @@
the target config file defines all of them.
@end itemize
-@b{If needed...} The user in their ``openocd.cfg'' file or the board
-file might override a specific feature in any of the above files by
-setting a variable or two before sourcing the target file. Or adding
-various commands specific to their situation.
+The @file{openocd.cfg} user config
+file may override features in any of the above files by
+setting variables before sourcing the target file, or by adding
+commands specific to their situation.
@section Interface Config Files
-@cindex config file
-The user should be able to source one of these files via a command like this:
+The user config file
+should be able to source one of these files via a command like this:
@example
- source [find interface/FOOBAR.cfg]
-Or:
- openocd -f interface/FOOBAR.cfg
+source [find interface/FOOBAR.cfg]
@end example
A preconfigured interface file should exist for every interface in use
today, that said, perhaps some interfaces have only been used by the
sole developer who created it.
+A separate chapter gives information about how to set these up.
+@xref{Interface - Dongle Configuration}.
+Read the OpenOCD source code if you have a new kind of hardware interface
+and need to provide a driver for it.
+
Interface files should be found in @t{$(INSTALLDIR)/lib/openocd/interface}
@section Board Config Files
-@cindex config file
+@cindex config file, board
+@cindex board config file
-@b{Note: BOARD directory NEW as of 28/nov/2008}
+The user config file
+should be able to source one of these files via a command like this:
-The user should be able to source one of these files via a command like this:
-
@example
- source [find board/FOOBAR.cfg]
-Or:
- openocd -f board/FOOBAR.cfg
+source [find board/FOOBAR.cfg]
@end example
-
-The board file should contain one or more @t{source [find
+The board config file should contain one or more @command{source [find
target/FOO.cfg]} statements along with any board specific things.
In summary the board files should contain (if present)
@@ -1085,14 +1088,14 @@
@end enumerate
@section Target Config Files
-@cindex config file
+@cindex config file, target
+@cindex target config file
-The user should be able to source one of these files via a command like this:
+Board config files should be able to source one or more
+target config files via a command like this:
@example
- source [find target/FOOBAR.cfg]
-Or:
- openocd -f target/FOOBAR.cfg
+source [find target/FOOBAR.cfg]
@end example
In summary the target files should contain
@@ -1100,23 +1103,41 @@
@enumerate
@item Set defaults
@item Add TAPs to the scan chain
-@item Add CPU targets
+@item Add CPU targets (includes GDB support)
@item CPU/Chip/CPU-Core specific features
@item On-Chip flash
@end enumerate
+As a rule of thumb, a target file sets up only one chip.
+For a microcontroller, that will often include a single TAP,
+which is a CPU needing a GDB target; and its on-chip flash.
+
+More complex chips may include multiple TAPs, and the target
+config file may need to define them all before OpenOCD
+can talk to the chip.
+For example, some phone chips have JTAG scan chains that include
+an ARM core for operating system use, a DSP,
+another ARM core embedded in an image processing engine,
+and other processing engines.
+
@subsection Important variable names
-By default, the end user should never need to set these
-variables. However, if the user needs to override a setting they only
-need to set the variable in a simple way.
+Most boards will have only one instance of a chip.
+However, it should be easy to create a board with more than
+one such chip.
+Accordingly, we encourage some conventions for naming
+variables associated with different TAPs, to promote
+consistency and
+so that board files can override target defaults, and
@itemize @bullet
@item @b{CHIPNAME}
@* This gives a name to the overall chip, and is used as part of the
tap identifier dotted name.
+It's normally provided by the chip manufacturer.
@item @b{ENDIAN}
@* By default little - unless the chip or board is not normally used that way.
+Chips that can't change endianness don't need to use this variable.
@item @b{CPUTAPID}
@* When OpenOCD examines the JTAG chain, it will attempt to identify
every chip. If the @t{-expected-id} is nonzero, OpenOCD attempts
@@ -1142,22 +1163,15 @@
If the chip has 2 targets, use the names @b{_TARGETNAME0},
@b{_TARGETNAME1}, ... etc.
-@b{Remember:} The ``board file'' may include multiple targets.
+@emph{Remember:} The ``board file'' may include multiple targets.
+The user (or board) config file should reasonably be able to:
-At no time should the name ``target0'' (the default target name if
-none was specified) be used. The name ``target0'' is a hard coded name
-- the next target on the board will be some other number.
-In the same way, avoid using target numbers even when they are
-permitted; use the right target name(s) for your board.
-
-The user (or board file) should reasonably be able to:
-
@example
- source [find target/FOO.cfg]
- $_TARGETNAME configure ... FOO specific parameters
+source [find target/FOO.cfg]
+$_TARGETNAME configure ... FOO specific parameters
- source [find target/BAR.cfg]
- $_TARGETNAME configure ... BAR specific parameters
+source [find target/BAR.cfg]
+$_TARGETNAME configure ... BAR specific parameters
@end example
@end itemize
@@ -1169,7 +1183,7 @@
a leading underscore are temporary in nature, and can be modified and
used at will within a ?TARGET? configuration file.
-@b{EXAMPLE:} The user should be able to do this:
+@b{EXAMPLE:} The user config file should be able to do this:
@example
# Board has 3 chips,
@@ -1359,7 +1373,7 @@
@item @b{Scripts}
@* OpenOCD configuration scripts are JIM Tcl Scripts. OpenOCD's
-command interpreter today (28/nov/2008) is a mixture of (newer)
+command interpreter today is a mixture of (newer)
JIM-Tcl commands, and (older) the orginal command interpreter.
@item @b{Commands}
@@ -1566,6 +1580,9 @@
@node Interface - Dongle Configuration
@chapter Interface - Dongle Configuration
+@cindex config file, interface
+@cindex interface config file
+
JTAG Adapters/Interfaces/Dongles are normally configured
through commands in an interface configuration
file which is sourced by your @file{openocd.cfg} file, or
@@ -2138,6 +2155,7 @@
probes flash memory, performs low-level JTAG operations, and more.
@section Scan Chains
+@cindex scan chain
TAPs are part of a hardware @dfn{scan chain},
which is daisy chain of TAPs.
@@ -2232,6 +2250,7 @@
@c (on entry to RESET state).
@section TAP Names
+@cindex dotted name
When TAP objects are declared with @command{jtag newtap},
a @dfn{dotted.name} is created for the TAP, combining the
@@ -2330,6 +2349,8 @@
@anchor{Enabling and Disabling TAPs}
@section Enabling and Disabling TAPs
@cindex TAP events
+@cindex JTAG Route Controller
+@cindex jrc
In some systems, a @dfn{JTAG Route Controller} (JRC)
is used to enable and/or disable specific JTAG TAPs.
@@ -2422,6 +2443,8 @@
then look at how to add one more target and how to configure it.
@section Target List
+@cindex target, current
+@cindex target, list
All targets that have been set up are part of a list,
where each member has a name.
@@ -2498,6 +2521,9 @@
@end deffn
@section Target CPU Types and Variants
+@cindex target type
+@cindex CPU type
+@cindex CPU variant
Each target has a @dfn{CPU type}, as shown in the output of
the @command{targets} command. You need to specify that type
@@ -2979,12 +3005,6 @@
However, the documentation also uses ``flash'' as a generic term;
for example, ``Put flash configuration in board-specific files''.
-@quotation Note
-As of 28-nov-2008 OpenOCD does not know how to program a SPI
-flash that a micro may boot from. Perhaps you, the reader, would like to
-contribute support for this.
-@end quotation
-
Flash Steps:
@enumerate
@item Configure via the command @command{flash bank}
@@ -4012,8 +4032,12 @@
This affects the kind of messages sent to the server log.
Level 0 is error messages only;
level 1 adds warnings;
-level 2 (the default) adds informational messages;
+level 2 adds informational messages;
and level 3 adds debugging messages.
+The default is level 2, but that can be overridden on
+the command line along with the location of that log
+file (which is normally the server's standard output).
+@xref{Running}.
@end deffn
@deffn Command fast (@option{enable}|@option{disable})
@@ -4057,7 +4081,7 @@
In this section ``target'' refers to a CPU configured as
shown earlier (@pxref{CPU Configuration}).
These commands, like many, implicitly refer to
-a @dfn{current target} which is used to perform the
+a current target which is used to perform the
various operations. The current target may be changed
by using @command{targets} command with the name of the
target which should become current.
@@ -5743,8 +5767,8 @@
parsed, but are NOT expanded or executed. @{Curly-Braces@} are like
'single-quote' operators in BASH shell scripts, with the added
feature: @{curly-braces@} can be nested, single quotes can not. @{@{@{this is
-nested 3 times@}@}@} NOTE: [date] is perhaps a bad example, as of
-28/nov/2008, Jim/OpenOCD does not have a date command.
+nested 3 times@}@}@} NOTE: [date] is a bad example;
+at this writing, Jim/OpenOCD does not have a date command.
@end itemize
@section Consequences of Rule 1/2/3/4
@@ -5967,7 +5991,7 @@
and the text is evaluated. In case #4, they are replaced before the
``Target Object Command'' is executed. This occurs at the same time
$_TARGETNAME is replaced. In case #4 the date will never
-change. @{BTW: [date] is perhaps a bad example, as of 28/nov/2008,
+change. @{BTW: [date] is a bad example; at this writing,
Jim/OpenOCD does not have a date command@}
@end enumerate
@subsection Global Variables
|
|
From: <zw...@ma...> - 2009-06-18 02:29:37
|
Author: zwelch Date: 2009-06-18 02:29:33 +0200 (Thu, 18 Jun 2009) New Revision: 2270 Modified: trunk/doc/manual/primer/docs.txt trunk/doc/manual/style.txt Log: David Brownell <da...@pa...>: Take a whack at providing some texinfo style docs. Mostly it's just basic "how 2 write sane dox" stuff. Modified: trunk/doc/manual/primer/docs.txt =================================================================== --- trunk/doc/manual/primer/docs.txt 2009-06-17 20:49:55 UTC (rev 2269) +++ trunk/doc/manual/primer/docs.txt 2009-06-18 00:29:33 UTC (rev 2270) @@ -3,7 +3,7 @@ This page provides an introduction to OpenOCD's documentation processes. OpenOCD presently produces several kinds of documentation: -- The Guide: +- The User's Guide: - Focuses on using the OpenOCD software. - Details the installation, usage, and customization. - Provides descriptions of public Jim/TCL script commands. @@ -31,13 +31,15 @@ */ /** @page primertexinfo Texinfo Primer -The OpenOCD User Guide presently exists entirely within the +The OpenOCD User's Guide presently exists entirely within the doc/openocd.texi document. That file contains documentation with mark-up suitable for being parsed by the GNU Texinfo utilities (http://www.gnu.org/software/texinfo/). -This section needs to be expanded to provide an overview to new -developers. +When you add a new command, driver, or driver option, it needs to be +documented in the User's Guide. Use the existing documentation for +models, but feel free to make better use of Texinfo mechanisms. See +the Texinfo web site for the Texinfo manual and more information. OpenOCD style guidelines for Texinfo documentation can be found on the @ref styletexinfo page. Modified: trunk/doc/manual/style.txt =================================================================== --- trunk/doc/manual/style.txt 2009-06-17 20:49:55 UTC (rev 2269) +++ trunk/doc/manual/style.txt 2009-06-18 00:29:33 UTC (rev 2270) @@ -213,9 +213,103 @@ */ /** @page styletexinfo Texinfo Style Guide -This page needs to provide style guidelines for Texinfo, the mark-up -language used by The Guide for OpenOCD Users. +The User's Guide is there to provide two basic kinds of information. It +is a guide for how and why to use each feature or mechanism of OpenOCD. +It is also the reference manual for all commands and options involved +in using them, including interface, flash, target, and other drivers. +At this time, it is the only user-targetted documentation; everything +else is addressing OpenOCD developers. +There are two key audiences for the User's Guide, both developer based. +The primary audience is developers using OpenOCD as a tool in their +work, or who may be starting to use it that way. A secondary audience +includes developers who are supporting those users by packaging or +customizing it for their hardware, installing it as part of some software +distribution, or by evolving OpenOCD itself. There is some crossover +between those audiences. We encourage contributions from users as the +fundamental way to evolve and improve OpenOCD. In particular, creating +a board or target specific configuration file is something that many +users will end up doing at some point, and we like to see such files +become part of the mainline release. + +General documentation rules to remember include: + +- Be concise and clear. It's work to remove those extra words and + sentences, but such "noise" doesn't help readers. +- Make it easy to skim and browse. "Tell what you're going to say, + then say it". Help readers decide whether to dig in now, or + leave it for later. +- Make sure the chapters flow well. Presentations should not jump + around, and should move easily from overview down to details. +- Avoid using the passive voice. +- Address the reader to clarify roles ("your config file", "the board you + are debugging", etc.); "the user" (etc) is artificial. +- Use good English grammar and spelling. Remember also that English + will not be the first language for many readers. Avoid complex or + idiomatic usage that could create needless barriers. +- Use examples to highlight fundamental ideas and common idioms. +- Don't overuse list constructs. This is not a slide presentation; + prefer paragraphs. + +When presenting features and mechanisms of OpenOCD: + +- Explain key concepts before presenting commands using them. +- Tie examples to common developer tasks. +- When giving instructions, you can \@enumerate each step both + to clearly delineate the steps, and to highlight that this is + not explanatory text. +- When you provide "how to use it" advice or tutorials, keep it + in separate sections from the reference material. +- Good indexing is something of a black art. Use \@cindex for important + concepts, but don't overuse it. In particular, rely on the \@deffn + indexing, and use \@cindex primarily with significant blocks of text + such as \@subsection. The \@dfn of a key term may merit indexing. +- Use \@xref (and \@anchor) with care. Hardcopy versions, from the PDF, + must make sense without clickable links (which don't work all that well + with Texinfo in any case). If you find you're using many links, + read that as a symptom that the presentation may be disjointed and + confusing. +- Avoid font tricks like \@b, but use \@option, \@file, \@dfn, \@emph + and related mechanisms where appropriate. + +For technical reference material: + +- It's OK to start sections with explanations and end them with + detailed lists of the relevant commands. +- Use the \@deffn style declarations to define all commands and drivers. + These will automatically appear in the relevant index, and those + declarations help promote consistent presentation and style. + - It's a "Command" if it can be used interactively. + - Else it's a "Config Command" if it must be used before the + configuration stage completes. + - For a "Driver", list its name. + - Use BNF style regular expressions to define parameters: + brackets around zero-or-one choices, parentheses around + exactly-one choices. + - Use \@option, \@file, \@var and other mechanisms where appropriate. + - Say what output it displays, and what value it returns to callers. + - Explain clearly what the command does. Sometimes you will find + that it can't be explained clearly. That usually means the command + is poorly designed; replace it with something better, if you can. + - Be complete: document all commands, except as part of a strategy + to phase something in or out. + - Be correct: review the documentation against the code, and + vice versa. +- Alphabetize the \@defn declarations for all commands in each + section. +- Keep the per-command documentation focussed on exactly what that + command does, not motivation, advice, suggestions, or big examples. + When commands deserve such expanded text, it belongs elsewhere. + Solutions might be using a \@section explaining a cluster of related + commands, or acting as a mini-tutorial. +- Details for any given driver should be grouped together. + +The User's Guide is the first place most users will start reading, +after they begin using OpenOCD. Make that investment of their time +be as productive as possible. Needing to look at OpenOCD source code, +to figure out how to use it is a bad sign, though it's OK to need to +look at the User's guide to figure out what a config script is doing. + */ /** @page stylelatex LaTeX Style Guide |
|
From: <oh...@ma...> - 2009-06-17 22:49:56
|
Author: oharboe
Date: 2009-06-17 22:49:55 +0200 (Wed, 17 Jun 2009)
New Revision: 2269
Modified:
trunk/tcl/target/lpc2478.cfg
Log:
Freddie Chopin <fre...@op...> makes lpc2478.cfg file more "standard" and - what is most important - correct (it's working [; ). I've also added some comments which try to clarify the meaning of all that's in there.
Modified: trunk/tcl/target/lpc2478.cfg
===================================================================
--- trunk/tcl/target/lpc2478.cfg 2009-06-17 10:51:34 UTC (rev 2268)
+++ trunk/tcl/target/lpc2478.cfg 2009-06-17 20:49:55 UTC (rev 2269)
@@ -1,35 +1,49 @@
-# Testing feeedback wanted!
-set _CHIPNAME lpc2478
-set _ENDIAN little
-set _CPUTAPID 0x4f1f0f0f
+# NXP LPC2478 ARM7TDMI-S with 512kB Flash and 64kB Local On-Chip SRAM (98kB total), clocked with 4MHz internal RC oscillator
-# Use RCLK. If RCLK is not available fall back to 500kHz.
-#
-# Depending on cabling you might be able to eek this up to 2000kHz.
-jtag_rclk 500
+if { [info exists CHIPNAME] } {
+ set _CHIPNAME $CHIPNAME
+} else {
+ set _CHIPNAME lpc2478
+}
-jtag_nsrst_delay 200
-jtag_ntrst_delay 200
+if { [info exists ENDIAN] } {
+ set _ENDIAN $ENDIAN
+} else {
+ set _ENDIAN little
+}
-#use combined on interfaces or targets that can't set TRST/SRST separately
+if { [info exists CPUTAPID ] } {
+ set _CPUTAPID $CPUTAPID
+} else {
+ set _CPUTAPID 0x4f1f0f0f
+}
+
+#delays on reset lines
+jtag_nsrst_delay 100
+jtag_ntrst_delay 100
+
+# LPC2000 -> SRST causes TRST
reset_config trst_and_srst srst_pulls_trst
-
jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm7tdmi-s_r4
-$_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x40000000 -work-area-size 0x4000 -work-area-backup 0
+# LPC2478 has 64kB of SRAM on its main system bus (so-called Local On-Chip SRAM)
+$_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x40000000 -work-area-size 0x10000 -work-area-backup 0
$_TARGETNAME configure -event reset-init {
# Force target into ARM state
soft_reset_halt
- # FIX!!!! should we remap the range below??? Is this applicable to
- # Copied from LPC2148.
- #do not remap 0x0000-0x0020 to anything but the flash
+ # Do not remap 0x0000-0x0020 to anything but the Flash
mwb 0xE01FC040 0x01
}
+# LPC2378 has 512kB of FLASH, but upper 8kB are occupied by bootloader.
+# After reset the chip uses its internal 4MHz RC oscillator.
+# flash bank lpc2000 <base> <size> 0 0 <target#> <variant> <clock> [calc checksum]
+flash bank lpc2000 0x0 0x7D000 0 0 0 lpc2000_v2 12000 calc_checksum
-flash bank lpc2000 0x0 0x7D000 0 0 0 lpc2000_v2 12000 calc_checksum
+# Try to use RCLK, if RCLK is not available use "normal" mode. 4MHz / 6 = 666kHz, so use 500.
+jtag_rclk 500
|
