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From: David B. <dbr...@us...> - 2009-11-08 21:24:26
|
This is an automated email from the git hooks/post-receive script. It was generated because a ref change was pushed to the repository containing the project "Main OpenOCD repository". The branch, master has been updated via 7d9df4b13474b25c3170c30a0bee52c387d3d049 (commit) from 3e6f9e8d1e65c4da505ff78481d54a115520d3d1 (commit) Those revisions listed above that are new to this repository have not appeared on any other notification email; so we list those revisions in full, below. - Log ----------------------------------------------------------------- commit 7d9df4b13474b25c3170c30a0bee52c387d3d049 Author: David Brownell <dbr...@us...> Date: Sun Nov 8 12:23:17 2009 -0800 Cortex-M3: fix (debug) message priority Signed-off-by: David Brownell <dbr...@us...> diff --git a/src/target/cortex_m3.c b/src/target/cortex_m3.c index e157805..6b015ca 100644 --- a/src/target/cortex_m3.c +++ b/src/target/cortex_m3.c @@ -1578,7 +1578,7 @@ fail1: *register_get_last_cache_p(&target->reg_cache) = cache; cm3->dwt_cache = cache; - LOG_INFO("DWT dwtcr 0x%" PRIx32 ", comp %d, watch%s", + LOG_DEBUG("DWT dwtcr 0x%" PRIx32 ", comp %d, watch%s", dwtcr, cm3->dwt_num_comp, (dwtcr & (0xf << 24)) ? " only" : "/trigger"); ----------------------------------------------------------------------- Summary of changes: src/target/cortex_m3.c | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-) hooks/post-receive -- Main OpenOCD repository |
From: David B. <dbr...@us...> - 2009-11-08 17:53:17
|
This is an automated email from the git hooks/post-receive script. It was generated because a ref change was pushed to the repository containing the project "Main OpenOCD repository". The branch, master has been updated via 3e6f9e8d1e65c4da505ff78481d54a115520d3d1 (commit) from 2b1bd97508ebaf33c76d4f36ec4bb85592801055 (commit) Those revisions listed above that are new to this repository have not appeared on any other notification email; so we list those revisions in full, below. - Log ----------------------------------------------------------------- commit 3e6f9e8d1e65c4da505ff78481d54a115520d3d1 Author: David Brownell <dbr...@us...> Date: Sun Nov 8 08:52:40 2009 -0800 target.cfg: remove "-work-area-virt 0" The semantics of "-work-area-virt 0" (or phys) changed with the patch to require specifying physical or virtrual work area addresses. Specifying zero was previously a NOP. Now it means that address zero is valid. This patch addresses three related issues: - MMU-less processors should never specify work-area-virt; remove those specifications. Such processors include ARM7TDMI, Cortex-M3, and ARM966. - MMU-equipped processors *can* specify work-area-virt... but zero won't be appropriate, except in mischievous contexts (which hide null pointer exceptions). Remove those specs from those processors too. If any of those mappings is valid, someone will need to submit a patch adding it ... along with a comment saying what OS provides the mapping, and in which context. Example, say "works with Linux 2.6.30+, in kernel mode". (Note that ARM Linux doesn't map kernel memory to zero ...) - Clarify docs on that "-virt" and other work area stuff. Seems to me work-area-virt is quite problematic; not every operating system provides such static mappings; if they do, they're not in every MMU context... Signed-off-by: David Brownell <dbr...@us...> diff --git a/doc/openocd.texi b/doc/openocd.texi index 2ddcd04..e84f4c8 100644 --- a/doc/openocd.texi +++ b/doc/openocd.texi @@ -3185,13 +3185,18 @@ since performing a backup slows down operations. For example, the beginning of an SRAM block is likely to be used by most build systems, but the end is often unused. -@item @code{-work-area-size} @var{size} -- specify/set the work area +@item @code{-work-area-size} @var{size} -- specify work are size, +in bytes. The same size applies regardless of whether its physical +or virtual address is being used. @item @code{-work-area-phys} @var{address} -- set the work area base @var{address} to be used when no MMU is active. @item @code{-work-area-virt} @var{address} -- set the work area base @var{address} to be used when an MMU is active. +@emph{Do not specify a value for this except on targets with an MMU.} +The value should normally correspond to a static mapping for the +@code{-work-area-phys} address, set up by the current operating system. @end itemize @end deffn diff --git a/tcl/board/at91sam9g20-ek.cfg b/tcl/board/at91sam9g20-ek.cfg index 00ab7fa..6e8a193 100644 --- a/tcl/board/at91sam9g20-ek.cfg +++ b/tcl/board/at91sam9g20-ek.cfg @@ -41,8 +41,8 @@ target create $_TARGETNAME arm926ejs -endian $_ENDIAN -chain-position $_TARGETNA # AT91SAM9G20 has two SRAM areas, one starting at 0x00200000 and the other starting at 0x00300000. # Both areas are 16 kB long. -$_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x00200000 -work-area-size 0x4000 -work-area-backup 1 -$_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x00300000 -work-area-size 0x4000 -work-area-backup 1 +#$_TARGETNAME configure -work-area-phys 0x00200000 -work-area-size 0x4000 -work-area-backup 1 +$_TARGETNAME configure -work-area-phys 0x00300000 -work-area-size 0x4000 -work-area-backup 1 # If you don't want to execute built-in boot rom code (and there are good reasons at times not to do that) in the # AT91SAM9 family, the microcontroller is a lump on a log without initialization. Because this family has diff --git a/tcl/board/digi_connectcore_wi-9c.cfg b/tcl/board/digi_connectcore_wi-9c.cfg index 58f12a6..e6d17bd 100644 --- a/tcl/board/digi_connectcore_wi-9c.cfg +++ b/tcl/board/digi_connectcore_wi-9c.cfg @@ -114,7 +114,7 @@ $_TARGETNAME configure -event reset-init { reg cpsr 0xd3 } -$_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x00000000 -work-area-size 0x1000 -work-area-backup 1 +$_TARGETNAME configure -work-area-phys 0x00000000 -work-area-size 0x1000 -work-area-backup 1 ##################### # Flash configuration diff --git a/tcl/board/hitex_str9-comstick.cfg b/tcl/board/hitex_str9-comstick.cfg index 25ff784..e7b7961 100644 --- a/tcl/board/hitex_str9-comstick.cfg +++ b/tcl/board/hitex_str9-comstick.cfg @@ -65,7 +65,7 @@ $_TARGETNAME configure -event reset-init { flash protect 0 0 7 off } -$_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x50000000 -work-area-size 16384 -work-area-backup 0 +$_TARGETNAME configure -work-area-phys 0x50000000 -work-area-size 16384 -work-area-backup 0 #flash bank <driver> <base> <size> <chip_width> <bus_width> flash bank str9x 0x00000000 0x00080000 0 0 0 diff --git a/tcl/board/linksys_nslu2.cfg b/tcl/board/linksys_nslu2.cfg index 5298410..e605fc1 100644 --- a/tcl/board/linksys_nslu2.cfg +++ b/tcl/board/linksys_nslu2.cfg @@ -4,5 +4,5 @@ source [find target/ixp42x.cfg] # The _TARGETNAME is set by the above. -$_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x00020000 -work-area-size 0x10000 -work-area-backup 0 +$_TARGETNAME configure -work-area-phys 0x00020000 -work-area-size 0x10000 -work-area-backup 0 diff --git a/tcl/board/mini2440.cfg b/tcl/board/mini2440.cfg index 90acafa..d17b107 100644 --- a/tcl/board/mini2440.cfg +++ b/tcl/board/mini2440.cfg @@ -104,7 +104,7 @@ jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0x0f -expected-id $_C set _TARGETNAME [format "%s.cpu" $_CHIPNAME] target create $_TARGETNAME arm920t -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm920t -$_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x40000000 -work-area-size 0x4000 -work-area-backup 1 +$_TARGETNAME configure -work-area-phys 0x40000000 -work-area-size 0x4000 -work-area-backup 1 #reset configuration jtag_nsrst_delay 100 diff --git a/tcl/board/pxa255_sst.cfg b/tcl/board/pxa255_sst.cfg index d9f6187..8bc691b 100644 --- a/tcl/board/pxa255_sst.cfg +++ b/tcl/board/pxa255_sst.cfg @@ -10,7 +10,7 @@ source [find target/pxa255.cfg] # Target name is set by above -$_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x4000000 -work-area-size 0x4000 -work-area-backup 0 +$_TARGETNAME configure -work-area-phys 0x4000000 -work-area-size 0x4000 -work-area-backup 0 # flash bank <driver> <base> <size> <chip_width> <bus_width> <target> [options] flash bank cfi 0x00000000 0x80000 2 2 $_TARGETNAME jedec_probe diff --git a/tcl/board/str910-eval.cfg b/tcl/board/str910-eval.cfg index e98c1c7..fa872a9 100644 --- a/tcl/board/str910-eval.cfg +++ b/tcl/board/str910-eval.cfg @@ -39,7 +39,7 @@ jtag newtap $_CHIPNAME bs -irlen 5 -ircapture 0x1 -irmask 0x1 -expected-id $_ set _TARGETNAME [format "%s.cpu" $_CHIPNAME] target create $_TARGETNAME arm966e -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm966e -$_TARGETNAME configure -work-area-phys 0x50000000 -work-area-virt 0x50000000 -work-area-size 16384 -work-area-backup 1 +$_TARGETNAME configure -work-area-phys 0x50000000 -work-area-size 16384 -work-area-backup 1 $_TARGETNAME configure -event reset-init { # We can increase speed now that we know the target is halted. diff --git a/tcl/board/zy1000.cfg b/tcl/board/zy1000.cfg index 2e13ecb..54bb7bb 100644 --- a/tcl/board/zy1000.cfg +++ b/tcl/board/zy1000.cfg @@ -63,7 +63,7 @@ $_TARGETNAME configure -event reset-init { # required for usable performance. Used for lots of # other things than flash programming. -$_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x00020000 -work-area-size 0x20000 -work-area-backup 0 +$_TARGETNAME configure -work-area-phys 0x00020000 -work-area-size 0x20000 -work-area-backup 0 jtag_khz 16000 diff --git a/tcl/target/at91eb40a.cfg b/tcl/target/at91eb40a.cfg index 064a3b5..8b3a9ec 100644 --- a/tcl/target/at91eb40a.cfg +++ b/tcl/target/at91eb40a.cfg @@ -46,7 +46,7 @@ flash bank ecosflash 0x01000000 0x200000 2 2 0 ecos/at91eb40a.elf # required for usable performance. Used for lots of # other things than flash programming. -$_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x00030000 -work-area-size 0x10000 -work-area-backup 0 +$_TARGETNAME configure -work-area-phys 0x00030000 -work-area-size 0x10000 -work-area-backup 0 $_TARGETNAME configure -event reset-init { puts "Running reset init script for AT91EB40A" diff --git a/tcl/target/at91r40008.cfg b/tcl/target/at91r40008.cfg index eb6caba..e8710f7 100644 --- a/tcl/target/at91r40008.cfg +++ b/tcl/target/at91r40008.cfg @@ -43,7 +43,7 @@ $_TARGETNAME configure -event gdb-flash-erase-start { mww 0xffe00020 0x00000001 } -$_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x3C000 -work-area-size 0x4000 -work-area-backup 0 +$_TARGETNAME configure -work-area-phys 0x3C000 -work-area-size 0x4000 -work-area-backup 0 flash bank cfi 0x10000000 0x400000 2 2 $_TARGETNAME diff --git a/tcl/target/at91rm9200.cfg b/tcl/target/at91rm9200.cfg index e20db52..e2972d7 100644 --- a/tcl/target/at91rm9200.cfg +++ b/tcl/target/at91rm9200.cfg @@ -42,7 +42,7 @@ set _TARGETNAME $_CHIPNAME.cpu target create $_TARGETNAME arm920t -endian $_ENDIAN -chain-position $_TARGETNAME # AT91RM9200 has a 16K block of sram @ 0x0020.0000 -$_TARGETNAME configure -work-area-virt 0x00200000 -work-area-phys 0x00200000 \ +$_TARGETNAME configure -work-area-phys 0x00200000 \ -work-area-size 0x4000 -work-area-backup 1 # This chip has a DCC ... use it diff --git a/tcl/target/at91sam3uXX.cfg b/tcl/target/at91sam3uXX.cfg index d54d3a4..985e052 100644 --- a/tcl/target/at91sam3uXX.cfg +++ b/tcl/target/at91sam3uXX.cfg @@ -33,7 +33,7 @@ set _TARGETNAME $_CHIPNAME.cpu target create $_TARGETNAME cortex_m3 -endian $_ENDIAN -chain-position $_TARGETNAME # 16K is plenty, the smallest chip has this much -$_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x20000000 -work-area-size 16384 -work-area-backup 0 +$_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size 16384 -work-area-backup 0 reset_config srst_only diff --git a/tcl/target/at91sam7sx.cfg b/tcl/target/at91sam7sx.cfg index 5cde979..2a7f90c 100644 --- a/tcl/target/at91sam7sx.cfg +++ b/tcl/target/at91sam7sx.cfg @@ -46,7 +46,7 @@ $_TARGETNAME configure -event reset-init { sleep 100 } -$_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x00200000 -work-area-size 0x4000 -work-area-backup 0 +$_TARGETNAME configure -work-area-phys 0x00200000 -work-area-size 0x4000 -work-area-backup 0 #flash bank <driver> <base_addr> <size> <chip_width> <bus_width> <target_number> [<target_name> <banks> <sectors_per_bank> <pages_per_sector> <page_size> <num_nvmbits> <ext_freq_khz>] flash bank at91sam7 0 0 0 0 0 0 0 0 0 0 0 0 18432 diff --git a/tcl/target/at91sam9260.cfg b/tcl/target/at91sam9260.cfg index a6eaa76..df08d10 100644 --- a/tcl/target/at91sam9260.cfg +++ b/tcl/target/at91sam9260.cfg @@ -39,6 +39,6 @@ set _TARGETNAME $_CHIPNAME.cpu target create $_TARGETNAME arm926ejs -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm926ejs # Internal sram1 memory -$_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x00300000 -work-area-size 0x1000 -work-area-backup 1 +$_TARGETNAME configure -work-area-phys 0x00300000 -work-area-size 0x1000 -work-area-backup 1 diff --git a/tcl/target/at91sam9260_ext_RAM_ext_flash.cfg b/tcl/target/at91sam9260_ext_RAM_ext_flash.cfg index 2548962..de7e9ab 100644 --- a/tcl/target/at91sam9260_ext_RAM_ext_flash.cfg +++ b/tcl/target/at91sam9260_ext_RAM_ext_flash.cfg @@ -47,7 +47,7 @@ target create $_TARGETNAME arm926ejs -endian $_ENDIAN -chain-position $_TARGETNA $_TARGETNAME invoke-event halted # Internal sram1 memory -$_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x00300000 -work-area-size 0x1000 -work-area-backup 1 +$_TARGETNAME configure -work-area-phys 0x00300000 -work-area-size 0x1000 -work-area-backup 1 scan_chain $_TARGETNAME configure -event reset-deassert-post {at91sam_init} diff --git a/tcl/target/cs351x.cfg b/tcl/target/cs351x.cfg index 237754b..243f963 100644 --- a/tcl/target/cs351x.cfg +++ b/tcl/target/cs351x.cfg @@ -24,7 +24,7 @@ target create $_TARGETNAME fa526 -endian $_ENDIAN -chain-position $_TARGETNAME - # There is 16K of SRAM on this chip # FIXME: flash programming is not working by using this work area. So comment this out for now. -#$_TARGETNAME configure -work-area-virt 0x00000000 -work-area-phys 0x00000000 -work-area-size 0x4000 -work-area-backup 1 +#$_TARGETNAME configure -work-area-phys 0x00000000 -work-area-size 0x4000 -work-area-backup 1 # This chip has a DCC ... use it arm7_9 dcc_downloads enable diff --git a/tcl/target/epc9301.cfg b/tcl/target/epc9301.cfg index 2b4155f..eaf4ee9 100644 --- a/tcl/target/epc9301.cfg +++ b/tcl/target/epc9301.cfg @@ -24,7 +24,7 @@ jtag_nsrst_delay 100 jtag_ntrst_delay 100 set _TARGETNAME $_CHIPNAME.cpu -target create $_TARGETNAME arm920t -endian $_ENDIAN -chain-position $_TARGETNAME -work-area-virt 0 -work-area-phys 0x80014000 -work-area-size 0x1000 -work-area-backup 1 +target create $_TARGETNAME arm920t -endian $_ENDIAN -chain-position $_TARGETNAME -work-area-phys 0x80014000 -work-area-size 0x1000 -work-area-backup 1 #flash configuration #flash bank <driver> <base> <size> <chip_width> <bus_width> [driver_options ...] diff --git a/tcl/target/imx27.cfg b/tcl/target/imx27.cfg index 837ea61..4a93a67 100644 --- a/tcl/target/imx27.cfg +++ b/tcl/target/imx27.cfg @@ -40,7 +40,9 @@ jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_C # Create the GDB Target. set _TARGETNAME $_CHIPNAME.cpu target create $_TARGETNAME arm926ejs -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm926ejs -$_TARGETNAME configure -work-area-virt 0xffff4c00 -work-area-phys 0xffff4c00 -work-area-size 0x8000 -work-area-backup 1 +# REVISIT what operating environment sets up this virtual address mapping? +$_TARGETNAME configure -work-area-virt 0xffff4c00 -work-area-phys 0xffff4c00 \ + -work-area-size 0x8000 -work-area-backup 1 # Internal to the chip, there is 45K of SRAM # diff --git a/tcl/target/is5114.cfg b/tcl/target/is5114.cfg index 8c15334..091bfc2 100644 --- a/tcl/target/is5114.cfg +++ b/tcl/target/is5114.cfg @@ -46,4 +46,4 @@ $_TARGETNAME configure -event reset-init { # We can increase speed now that we know the target is halted. jtag_rclk 3000 } -$_TARGETNAME configure -work-area-phys 0x50000000 -work-area-virt 0x50000000 -work-area-size 16384 -work-area-backup 1 +$_TARGETNAME configure -work-area-phys 0x50000000 -work-area-size 16384 -work-area-backup 1 diff --git a/tcl/target/lpc1768.cfg b/tcl/target/lpc1768.cfg index 63ec1bb..9f6bcff 100644 --- a/tcl/target/lpc1768.cfg +++ b/tcl/target/lpc1768.cfg @@ -31,7 +31,7 @@ set _TARGETNAME $_CHIPNAME.cpu target create $_TARGETNAME cortex_m3 -endian $_ENDIAN -chain-position $_TARGETNAME # LPC1768 has 32kB of SRAM on its main system bus (so-called Local On-Chip SRAM) -$_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x10000000 -work-area-size 0x8000 -work-area-backup 0 +$_TARGETNAME configure -work-area-phys 0x10000000 -work-area-size 0x8000 -work-area-backup 0 $_TARGETNAME configure -event reset-init { # Force target into ARM state diff --git a/tcl/target/lpc2103.cfg b/tcl/target/lpc2103.cfg index 1a88076..0aadee8 100644 --- a/tcl/target/lpc2103.cfg +++ b/tcl/target/lpc2103.cfg @@ -31,7 +31,7 @@ set _TARGETNAME $_CHIPNAME.cpu target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm7tdmi-s_r4 # 8kB of internal SRAM -$_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x40000000 -work-area-size 0x2000 -work-area-backup 0 +$_TARGETNAME configure -work-area-phys 0x40000000 -work-area-size 0x2000 -work-area-backup 0 # 32kB of internal Flash, core clocked with 12MHz crystal # flash bank lpc2000 <base> <size> 0 0 <target#> <variant> <clock> [calc_checksum] diff --git a/tcl/target/lpc2124.cfg b/tcl/target/lpc2124.cfg index 61d411b..471286b 100644 --- a/tcl/target/lpc2124.cfg +++ b/tcl/target/lpc2124.cfg @@ -35,7 +35,7 @@ jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CP set _TARGETNAME $_CHIPNAME.cpu target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm7tdmi-s_r4 -$_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x40000000 -work-area-size 0x4000 -work-area-backup 0 +$_TARGETNAME configure -work-area-phys 0x40000000 -work-area-size 0x4000 -work-area-backup 0 #flash bank <driver> <base> <size> <chip_width> <bus_width> diff --git a/tcl/target/lpc2129.cfg b/tcl/target/lpc2129.cfg index 5438fc3..a686a47 100644 --- a/tcl/target/lpc2129.cfg +++ b/tcl/target/lpc2129.cfg @@ -35,7 +35,7 @@ jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CP set _TARGETNAME $_CHIPNAME.cpu target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm7tdmi-s_r4 -$_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x40000000 -work-area-size 0x4000 -work-area-backup 0 +$_TARGETNAME configure -work-area-phys 0x40000000 -work-area-size 0x4000 -work-area-backup 0 #flash bank <driver> <base> <size> <chip_width> <bus_width> flash bank lpc2000 0x0 0x40000 0 0 $_TARGETNAME lpc2000_v1 14765 calc_checksum diff --git a/tcl/target/lpc2148.cfg b/tcl/target/lpc2148.cfg index b502343..ce672c8 100644 --- a/tcl/target/lpc2148.cfg +++ b/tcl/target/lpc2148.cfg @@ -35,7 +35,7 @@ jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CP set _TARGETNAME $_CHIPNAME.cpu target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm7tdmi-s_r4 -$_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x40000000 -work-area-size 0x4000 -work-area-backup 0 +$_TARGETNAME configure -work-area-phys 0x40000000 -work-area-size 0x4000 -work-area-backup 0 $_TARGETNAME configure -event reset-init { # Force target into ARM state diff --git a/tcl/target/lpc2294.cfg b/tcl/target/lpc2294.cfg index 08fbf58..a34940e 100644 --- a/tcl/target/lpc2294.cfg +++ b/tcl/target/lpc2294.cfg @@ -28,7 +28,7 @@ jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CP set _TARGETNAME $_CHIPNAME.cpu target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm7tdmi-s_r4 -$_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x40000000 -work-area-size 0x4000 -work-area-backup 0 +$_TARGETNAME configure -work-area-phys 0x40000000 -work-area-size 0x4000 -work-area-backup 0 #flash configuration #flash bank lpc2000 <base> <size> 0 0 <target#> <variant> diff --git a/tcl/target/lpc2378.cfg b/tcl/target/lpc2378.cfg index 34b9963..7f716f3 100644 --- a/tcl/target/lpc2378.cfg +++ b/tcl/target/lpc2378.cfg @@ -31,7 +31,7 @@ set _TARGETNAME $_CHIPNAME.cpu target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm7tdmi-s_r4 # LPC2378 has 32kB of SRAM on its main system bus (so-called Local On-Chip SRAM) -$_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x40000000 -work-area-size 0x8000 -work-area-backup 0 +$_TARGETNAME configure -work-area-phys 0x40000000 -work-area-size 0x8000 -work-area-backup 0 $_TARGETNAME configure -event reset-init { # Force target into ARM state diff --git a/tcl/target/lpc2478.cfg b/tcl/target/lpc2478.cfg index bf33ae0..e78afa1 100644 --- a/tcl/target/lpc2478.cfg +++ b/tcl/target/lpc2478.cfg @@ -31,7 +31,7 @@ set _TARGETNAME $_CHIPNAME.cpu target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm7tdmi-s_r4 # LPC2478 has 64kB of SRAM on its main system bus (so-called Local On-Chip SRAM) -$_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x40000000 -work-area-size 0x10000 -work-area-backup 0 +$_TARGETNAME configure -work-area-phys 0x40000000 -work-area-size 0x10000 -work-area-backup 0 $_TARGETNAME configure -event reset-init { # Force target into ARM state diff --git a/tcl/target/mega128.cfg b/tcl/target/mega128.cfg index 6c0ad85..e444889 100644 --- a/tcl/target/mega128.cfg +++ b/tcl/target/mega128.cfg @@ -20,7 +20,7 @@ jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CP set _TARGETNAME $_CHIPNAME.cpu target create $_TARGETNAME avr -endian $_ENDIAN -chain-position $_TARGETNAME -#$_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x20000000 -work-area-size 16384 -work-area-backup 0 +#$_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size 16384 -work-area-backup 0 flash bank avr 0 0 0 0 0 diff --git a/tcl/target/omap5912.cfg b/tcl/target/omap5912.cfg index b578457..d825df7 100644 --- a/tcl/target/omap5912.cfg +++ b/tcl/target/omap5912.cfg @@ -48,5 +48,5 @@ proc omap5912_reset {} { } # omap5912 lcd frame buffer as working area -$_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x20000000 \ +$_TARGETNAME configure -work-area-phys 0x20000000 \ -work-area-size 0x3e800 -work-area-backup 0 diff --git a/tcl/target/pic32mx.cfg b/tcl/target/pic32mx.cfg index daa54eb..6127a54 100644 --- a/tcl/target/pic32mx.cfg +++ b/tcl/target/pic32mx.cfg @@ -31,7 +31,7 @@ jtag newtap $_CHIPNAME cpu -irlen 5 -ircapture 0x1 -irmask 0x1f -expected-id $_ set _TARGETNAME $_CHIPNAME.cpu target create $_TARGETNAME mips_m4k -endian $_ENDIAN -chain-position $_TARGETNAME -$_TARGETNAME configure -work-area-virt 0 -work-area-phys 0xa0000000 -work-area-size 16384 -work-area-backup 0 +$_TARGETNAME configure -work-area-phys 0xa0000000 -work-area-size 16384 -work-area-backup 0 flash bank pic32mx 0xbd000000 0 0 0 0 flash bank pic32mx 0xbfc00000 0 0 0 0 diff --git a/tcl/target/pxa270.cfg b/tcl/target/pxa270.cfg index 84fc2f7..6ca057c 100644 --- a/tcl/target/pxa270.cfg +++ b/tcl/target/pxa270.cfg @@ -41,4 +41,4 @@ jtag newtap $_CHIPNAME cpu -irlen 7 -ircapture 0x1 -irmask 0x7f -expected-id $_C target create $_TARGETNAME xscale -endian $_ENDIAN -chain-position $_TARGETNAME -variant pxa27x # maps to PXA internal RAM. If you are using a PXA255 # you must initialize SDRAM or leave this option off -$_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x5c000000 -work-area-size 0x10000 -work-area-backup 0 +$_TARGETNAME configure -work-area-phys 0x5c000000 -work-area-size 0x10000 -work-area-backup 0 diff --git a/tcl/target/sam7se512.cfg b/tcl/target/sam7se512.cfg index 4b1d85b..0f1e412 100644 --- a/tcl/target/sam7se512.cfg +++ b/tcl/target/sam7se512.cfg @@ -32,7 +32,7 @@ jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CP set _TARGETNAME $_CHIPNAME.cpu target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm7tdmi -$_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x00200000 -work-area-size 0x4000 -work-area-backup 0 +$_TARGETNAME configure -work-area-phys 0x00200000 -work-area-size 0x4000 -work-area-backup 0 #flash bank <driver> <base_addr> <size> <chip_width> <bus_width> <target_number> [<target_name> <banks> <sectors_per_bank> <pages_per_sector> <page_size> <num_nvmbits> <ext_freq_khz>] flash bank at91sam7 0 0 0 0 0 0 0 0 0 0 0 0 18432 diff --git a/tcl/target/sam7x256.cfg b/tcl/target/sam7x256.cfg index 12f3030..c3f7cd9 100644 --- a/tcl/target/sam7x256.cfg +++ b/tcl/target/sam7x256.cfg @@ -43,7 +43,7 @@ $_TARGETNAME configure -event reset-init { sleep 100 } -$_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x00200000 -work-area-size 0x4000 -work-area-backup 0 +$_TARGETNAME configure -work-area-phys 0x00200000 -work-area-size 0x4000 -work-area-backup 0 #flash bank <driver> <base_addr> <size> <chip_width> <bus_width> <target_number> [<target_name> <banks> <sectors_per_bank> <pages_per_sector> <page_size> <num_nvmbits> <ext_freq_khz>] flash bank at91sam7 0 0 0 0 0 0 0 0 0 0 0 0 18432 diff --git a/tcl/target/samsung_s3c2410.cfg b/tcl/target/samsung_s3c2410.cfg index e845eb5..9682c4c 100644 --- a/tcl/target/samsung_s3c2410.cfg +++ b/tcl/target/samsung_s3c2410.cfg @@ -28,7 +28,7 @@ jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CP set _TARGETNAME $_CHIPNAME.cpu target create $_TARGETNAME arm920t -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm920t -$_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x30800000 -work-area-size 0x20000 -work-area-backup 0 +$_TARGETNAME configure -work-area-phys 0x30800000 -work-area-size 0x20000 -work-area-backup 0 # speed up memory downloads arm7_9 fast_memory_access enable diff --git a/tcl/target/samsung_s3c2440.cfg b/tcl/target/samsung_s3c2440.cfg index f9263a5..d3b665f 100644 --- a/tcl/target/samsung_s3c2440.cfg +++ b/tcl/target/samsung_s3c2440.cfg @@ -29,7 +29,7 @@ jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0x0f -expected-id $_C set _TARGETNAME $_CHIPNAME.cpu target create $_TARGETNAME arm920t -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm920t -$_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x200000 -work-area-size 0x4000 -work-area-backup 1 +$_TARGETNAME configure -work-area-phys 0x200000 -work-area-size 0x4000 -work-area-backup 1 #reset configuration reset_config trst_and_srst diff --git a/tcl/target/stm32.cfg b/tcl/target/stm32.cfg index 97d7678..619824c 100644 --- a/tcl/target/stm32.cfg +++ b/tcl/target/stm32.cfg @@ -63,7 +63,7 @@ jtag newtap $_CHIPNAME bs -irlen 5 -expected-id $_BSTAPID1 \ set _TARGETNAME $_CHIPNAME.cpu target create $_TARGETNAME cortex_m3 -endian $_ENDIAN -chain-position $_TARGETNAME -$_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0 +$_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0 flash bank stm32x 0 0 0 0 $_TARGETNAME diff --git a/tcl/target/str710.cfg b/tcl/target/str710.cfg index 215d12b..8e5d36f 100644 --- a/tcl/target/str710.cfg +++ b/tcl/target/str710.cfg @@ -36,7 +36,7 @@ $_TARGETNAME configure -event gdb-flash-erase-start { flash protect 1 0 1 off } -$_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x2000C000 -work-area-size 0x4000 -work-area-backup 0 +$_TARGETNAME configure -work-area-phys 0x2000C000 -work-area-size 0x4000 -work-area-backup 0 #flash bank str7x <base> <size> 0 0 <target#> <variant> flash bank str7x 0x40000000 0x00040000 0 0 0 STR71x diff --git a/tcl/target/str730.cfg b/tcl/target/str730.cfg index d9e9ecf..fe70802 100644 --- a/tcl/target/str730.cfg +++ b/tcl/target/str730.cfg @@ -40,7 +40,7 @@ $_TARGETNAME configure -event gdb-flash-erase-start { flash protect 0 0 7 off } -$_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x40000000 -work-area-size 0x4000 -work-area-backup 0 +$_TARGETNAME configure -work-area-phys 0x40000000 -work-area-size 0x4000 -work-area-backup 0 #flash bank <driver> <base> <size> <chip_width> <bus_width> flash bank str7x 0x20000000 0x00040000 0 0 0 STR3x diff --git a/tcl/target/str750.cfg b/tcl/target/str750.cfg index 74f2664..22d87f8 100644 --- a/tcl/target/str750.cfg +++ b/tcl/target/str750.cfg @@ -43,7 +43,7 @@ $_TARGETNAME configure -event gdb-flash-erase-start { flash protect 1 0 1 off } -$_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x40000000 -work-area-size 0x4000 -work-area-backup 0 +$_TARGETNAME configure -work-area-phys 0x40000000 -work-area-size 0x4000 -work-area-backup 0 #flash bank <driver> <base> <size> <chip_width> <bus_width> flash bank str7x 0x20000000 0x00040000 0 0 0 STR75x diff --git a/tcl/target/str912.cfg b/tcl/target/str912.cfg index b8f8f1a..0dd6848 100644 --- a/tcl/target/str912.cfg +++ b/tcl/target/str912.cfg @@ -60,7 +60,7 @@ $_TARGETNAME configure -event reset-init { flash protect 0 0 7 off } -$_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x50000000 -work-area-size 16384 -work-area-backup 0 +$_TARGETNAME configure -work-area-phys 0x50000000 -work-area-size 16384 -work-area-backup 0 #flash bank str9x <base> <size> 0 0 <target#> <variant> flash bank str9x 0x00000000 0x00080000 0 0 0 diff --git a/tcl/target/tmpa900.cfg b/tcl/target/tmpa900.cfg index 719c976..80adc65 100644 --- a/tcl/target/tmpa900.cfg +++ b/tcl/target/tmpa900.cfg @@ -52,5 +52,5 @@ target create $_TARGETNAME arm926ejs -endian $_ENDIAN -chain-position $_TARGETNA #working_area 0 0xf8004000 0xc000 nobackup # Internal sram1 memory -$_TARGETNAME configure -work-area-virt 0 -work-area-phys 0xf8004000 -work-area-size 0x8000 \ +$_TARGETNAME configure -work-area-phys 0xf8004000 -work-area-size 0x8000 \ -work-area-backup 0 diff --git a/tcl/target/tmpa910.cfg b/tcl/target/tmpa910.cfg index 4a0ec71..4af5e4e 100644 --- a/tcl/target/tmpa910.cfg +++ b/tcl/target/tmpa910.cfg @@ -52,5 +52,5 @@ target create $_TARGETNAME arm926ejs -endian $_ENDIAN -chain-position $_TARGETNA #working_area 0 0xf8004000 0xc000 nobackup # Internal sram1 memory -$_TARGETNAME configure -work-area-virt 0 -work-area-phys 0xf8004000 -work-area-size 0xc000 \ +$_TARGETNAME configure -work-area-phys 0xf8004000 -work-area-size 0xc000 \ -work-area-backup 0 diff --git a/tcl/target/xba_revA3.cfg b/tcl/target/xba_revA3.cfg index e1c8870..9d258a5 100644 --- a/tcl/target/xba_revA3.cfg +++ b/tcl/target/xba_revA3.cfg @@ -76,7 +76,7 @@ $_TARGETNAME configure -event reset-init { flash probe 0 } -$_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x20010000 -work-area-size 0x8060 -work-area-backup 0 +$_TARGETNAME configure -work-area-phys 0x20010000 -work-area-size 0x8060 -work-area-backup 0 flash bank cfi 0x50000000 0x400000 2 2 $_TARGETNAME diff --git a/tcl/test/syntax1.cfg b/tcl/test/syntax1.cfg index 93beefc..40a7c1d 100644 --- a/tcl/test/syntax1.cfg +++ b/tcl/test/syntax1.cfg @@ -16,7 +16,7 @@ jtag newtap lpc2148 one -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id 0x4f1f0 #daemon_startup reset set _TARGETNAME [format "%s.cpu" lpc2148] -target create lpc2148.cpu arm7tdmi -endian little -work-area-size 0x4000 -work-area-phys 0x40000000 -work-area-virt 0 -work-area-backup 0 +target create lpc2148.cpu arm7tdmi -endian little -work-area-size 0x4000 -work-area-phys 0x40000000 -work-area-backup 0 $_TARGETNAME configure -event reset-init { soft_reset_halt ----------------------------------------------------------------------- Summary of changes: doc/openocd.texi | 7 ++++++- tcl/board/at91sam9g20-ek.cfg | 4 ++-- tcl/board/digi_connectcore_wi-9c.cfg | 2 +- tcl/board/hitex_str9-comstick.cfg | 2 +- tcl/board/linksys_nslu2.cfg | 2 +- tcl/board/mini2440.cfg | 2 +- tcl/board/pxa255_sst.cfg | 2 +- tcl/board/str910-eval.cfg | 2 +- tcl/board/zy1000.cfg | 2 +- tcl/target/at91eb40a.cfg | 2 +- tcl/target/at91r40008.cfg | 2 +- tcl/target/at91rm9200.cfg | 2 +- tcl/target/at91sam3uXX.cfg | 2 +- tcl/target/at91sam7sx.cfg | 2 +- tcl/target/at91sam9260.cfg | 2 +- tcl/target/at91sam9260_ext_RAM_ext_flash.cfg | 2 +- tcl/target/cs351x.cfg | 2 +- tcl/target/epc9301.cfg | 2 +- tcl/target/imx27.cfg | 4 +++- tcl/target/is5114.cfg | 2 +- tcl/target/lpc1768.cfg | 2 +- tcl/target/lpc2103.cfg | 2 +- tcl/target/lpc2124.cfg | 2 +- tcl/target/lpc2129.cfg | 2 +- tcl/target/lpc2148.cfg | 2 +- tcl/target/lpc2294.cfg | 2 +- tcl/target/lpc2378.cfg | 2 +- tcl/target/lpc2478.cfg | 2 +- tcl/target/mega128.cfg | 2 +- tcl/target/omap5912.cfg | 2 +- tcl/target/pic32mx.cfg | 2 +- tcl/target/pxa270.cfg | 2 +- tcl/target/sam7se512.cfg | 2 +- tcl/target/sam7x256.cfg | 2 +- tcl/target/samsung_s3c2410.cfg | 2 +- tcl/target/samsung_s3c2440.cfg | 2 +- tcl/target/stm32.cfg | 2 +- tcl/target/str710.cfg | 2 +- tcl/target/str730.cfg | 2 +- tcl/target/str750.cfg | 2 +- tcl/target/str912.cfg | 2 +- tcl/target/tmpa900.cfg | 2 +- tcl/target/tmpa910.cfg | 2 +- tcl/target/xba_revA3.cfg | 2 +- tcl/test/syntax1.cfg | 2 +- 45 files changed, 53 insertions(+), 46 deletions(-) hooks/post-receive -- Main OpenOCD repository |
From: Zach W. <zw...@us...> - 2009-11-07 22:37:28
|
This is an automated email from the git hooks/post-receive script. It was generated because a ref change was pushed to the repository containing the project "Main OpenOCD repository". The branch, master has been updated via 2b1bd97508ebaf33c76d4f36ec4bb85592801055 (commit) from fb50efc6e712f413d109c3d77683d0358a557ed4 (commit) Those revisions listed above that are new to this repository have not appeared on any other notification email; so we list those revisions in full, below. - Log ----------------------------------------------------------------- commit 2b1bd97508ebaf33c76d4f36ec4bb85592801055 Author: Zachary T Welch <zw...@su...> Date: Sat Nov 7 13:36:47 2009 -0800 Fix vsllink bulk out endpoint parsing. diff --git a/src/jtag/vsllink.c b/src/jtag/vsllink.c index 1f1b867..3c1a046 100644 --- a/src/jtag/vsllink.c +++ b/src/jtag/vsllink.c @@ -1445,7 +1445,7 @@ static int vsllink_handle_usb_bulkout_command(struct command_context_s *cmd_ctx, return ERROR_OK; } - COMMAND_PARSE_NUMBER(u8, args[0], vsllink_usb_bulkin); + COMMAND_PARSE_NUMBER(u8, args[0], vsllink_usb_bulkout); vsllink_usb_bulkout &= ~0x80; ----------------------------------------------------------------------- Summary of changes: src/jtag/vsllink.c | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-) hooks/post-receive -- Main OpenOCD repository |
From: David B. <dbr...@us...> - 2009-11-07 00:14:24
|
This is an automated email from the git hooks/post-receive script. It was generated because a ref change was pushed to the repository containing the project "Main OpenOCD repository". The branch, v0.3.1 has been created at c6ac97cf3b95ad5a9582ad6e6ea159d9d2aa9e1b (commit) - Log ----------------------------------------------------------------- commit c6ac97cf3b95ad5a9582ad6e6ea159d9d2aa9e1b Author: David Brownell <dbr...@us...> Date: Fri Nov 6 15:10:26 2009 -0800 target: don't swap MMU/no-MMU work areas Resolve serious bug inserted by the "target: require working area for physical/virtual addresses to be specified" patch. It forced use of (invalid) virtual addresses when the MMU was disabled, and vice versa. Observed to break at least Cortex-M3, ARM926, ARM7TDMI whenever work areas are used, such as during bulk writes to flash, DDR2, SRAM, and so on. Also, fix overlong lines and whitespace goofs. [ Backport from mainline a9abfa7d06dbcfded97b7fb41f50d3581c24fbae ] Signed-off-by: David Brownell <dbr...@us...> diff --git a/src/target/target.c b/src/target/target.c index 9289d37..698b790 100644 --- a/src/target/target.c +++ b/src/target/target.c @@ -1040,32 +1040,33 @@ int target_alloc_working_area(struct target_s *target, uint32_t size, working_ar { int retval; int enabled; + retval = target->type->mmu(target, &enabled); if (retval != ERROR_OK) { return retval; } - if (enabled) - { - if (target->working_area_phys_spec) - { - LOG_DEBUG("MMU disabled, using physical address for working memory 0x%08x", (unsigned)target->working_area_phys); + if (!enabled) { + if (target->working_area_phys_spec) { + LOG_DEBUG("MMU disabled, using physical " + "address for working memory 0x%08x", + (unsigned)target->working_area_phys); target->working_area = target->working_area_phys; - } else - { - LOG_ERROR("No working memory available. Specify -work-area-phys to target."); + } else { + LOG_ERROR("No working memory available. " + "Specify -work-area-phys to target."); return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; } - } else - { - if (target->working_area_virt_spec) - { - LOG_DEBUG("MMU enabled, using virtual address for working memory 0x%08x", (unsigned)target->working_area_virt); + } else { + if (target->working_area_virt_spec) { + LOG_DEBUG("MMU enabled, using virtual " + "address for working memory 0x%08x", + (unsigned)target->working_area_virt); target->working_area = target->working_area_virt; - } else - { - LOG_ERROR("No working memory available. Specify -work-area-virt to target."); + } else { + LOG_ERROR("No working memory available. " + "Specify -work-area-virt to target."); return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; } } commit 7de1c892cd9c59f135ff5fbeb4c070fa6ec795b2 Author: David Brownell <dbr...@us...> Date: Fri Nov 6 15:05:03 2009 -0800 Start v0.3.1 bugfix branch Add "-dev" tag, increment micro version. Signed-off-by: David Brownell <dbr...@us...> diff --git a/configure.in b/configure.in index 08212e8..4f5733e 100644 --- a/configure.in +++ b/configure.in @@ -1,5 +1,5 @@ AC_PREREQ(2.60) -AC_INIT([openocd], [0.3.0], +AC_INIT([openocd], [0.3.1-dev], [OpenOCD Mailing List <ope...@li...>]) AC_CONFIG_SRCDIR([src/openocd.c]) ----------------------------------------------------------------------- hooks/post-receive -- Main OpenOCD repository |
From: David B. <dbr...@us...> - 2009-11-07 00:02:04
|
This is an automated email from the git hooks/post-receive script. It was generated because a ref change was pushed to the repository containing the project "Main OpenOCD repository". The branch, master has been updated via fb50efc6e712f413d109c3d77683d0358a557ed4 (commit) via a9abfa7d06dbcfded97b7fb41f50d3581c24fbae (commit) from ca00483a95bd574ff824d66212c10a870d6620ee (commit) Those revisions listed above that are new to this repository have not appeared on any other notification email; so we list those revisions in full, below. - Log ----------------------------------------------------------------- commit fb50efc6e712f413d109c3d77683d0358a557ed4 Merge: a9abfa7 ca00483 Author: David Brownell <dbr...@us...> Date: Fri Nov 6 15:01:46 2009 -0800 Merge branch 'master' of ssh://dbr...@op.../gitroot/openocd/openocd commit a9abfa7d06dbcfded97b7fb41f50d3581c24fbae Author: David Brownell <dbr...@us...> Date: Fri Nov 6 14:57:21 2009 -0800 target: don't swap MMU/no-MMU work areas Resolve serious bug inserted by the "target: require working area for physical/virtual addresses to be specified" patch. It forced use of (invalid) virtual addresses when the MMU was disabled, and vice versa. Observed to break at least Cortex-M3, ARM926, ARM7TDMI whenever work areas are used, such as during bulk writes to flash, DDR2, SRAM, and so on. Also, fix overlong lines and whitespace goofs. Signed-off-by: David Brownell <dbr...@us...> diff --git a/src/target/target.c b/src/target/target.c index b5c473b..5eec09c 100644 --- a/src/target/target.c +++ b/src/target/target.c @@ -1115,32 +1115,33 @@ int target_alloc_working_area(struct target_s *target, uint32_t size, working_ar { int retval; int enabled; + retval = target->type->mmu(target, &enabled); if (retval != ERROR_OK) { return retval; } - if (enabled) - { - if (target->working_area_phys_spec) - { - LOG_DEBUG("MMU disabled, using physical address for working memory 0x%08x", (unsigned)target->working_area_phys); + if (!enabled) { + if (target->working_area_phys_spec) { + LOG_DEBUG("MMU disabled, using physical " + "address for working memory 0x%08x", + (unsigned)target->working_area_phys); target->working_area = target->working_area_phys; - } else - { - LOG_ERROR("No working memory available. Specify -work-area-phys to target."); + } else { + LOG_ERROR("No working memory available. " + "Specify -work-area-phys to target."); return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; } - } else - { - if (target->working_area_virt_spec) - { - LOG_DEBUG("MMU enabled, using virtual address for working memory 0x%08x", (unsigned)target->working_area_virt); + } else { + if (target->working_area_virt_spec) { + LOG_DEBUG("MMU enabled, using virtual " + "address for working memory 0x%08x", + (unsigned)target->working_area_virt); target->working_area = target->working_area_virt; - } else - { - LOG_ERROR("No working memory available. Specify -work-area-virt to target."); + } else { + LOG_ERROR("No working memory available. " + "Specify -work-area-virt to target."); return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; } } ----------------------------------------------------------------------- Summary of changes: src/target/target.c | 33 +++++++++++++++++---------------- 1 files changed, 17 insertions(+), 16 deletions(-) hooks/post-receive -- Main OpenOCD repository |
From: Zach W. <zw...@us...> - 2009-11-06 11:59:54
|
This is an automated email from the git hooks/post-receive script. It was generated because a ref change was pushed to the repository containing the project "Main OpenOCD repository". The branch, master has been updated via ca00483a95bd574ff824d66212c10a870d6620ee (commit) via ff61e6a37ce79f00957fc5aeb304291e5fa06323 (commit) via c5f56437c0be07201481ae2232d2c765cc1bc281 (commit) from 6a0af06bd9f66780d2c3e9f69c40f2b89ad90605 (commit) Those revisions listed above that are new to this repository have not appeared on any other notification email; so we list those revisions in full, below. - Log ----------------------------------------------------------------- commit ca00483a95bd574ff824d66212c10a870d6620ee Author: Zachary T Welch <zw...@su...> Date: Thu Nov 5 18:40:52 2009 -0800 Simplify nand indentation. Removes check covered by new nand_command_get_device_by_num helper. Reverses logic of probe check to further reduce indentation. diff --git a/src/flash/nand.c b/src/flash/nand.c index 7fb7c99..81a04f7 100644 --- a/src/flash/nand.c +++ b/src/flash/nand.c @@ -1135,50 +1135,46 @@ static int handle_nand_info_command(struct command_context_s *cmd_ctx, char *cmd break; } - if (p) + if (NULL == p->device) { - if (p->device) - { - if (first >= p->num_blocks) - first = p->num_blocks - 1; + command_print(cmd_ctx, "#%s: not probed", args[0]); + return ERROR_OK; + } - if (last >= p->num_blocks) - last = p->num_blocks - 1; + if (first >= p->num_blocks) + first = p->num_blocks - 1; - command_print(cmd_ctx, "#%i: %s (%s) pagesize: %i, buswidth: %i, erasesize: %i", - i++, p->device->name, p->manufacturer->name, p->page_size, p->bus_width, p->erase_size); + if (last >= p->num_blocks) + last = p->num_blocks - 1; - for (j = first; j <= last; j++) - { - char *erase_state, *bad_state; + command_print(cmd_ctx, "#%i: %s (%s) pagesize: %i, buswidth: %i, erasesize: %i", + i++, p->device->name, p->manufacturer->name, p->page_size, p->bus_width, p->erase_size); - if (p->blocks[j].is_erased == 0) - erase_state = "not erased"; - else if (p->blocks[j].is_erased == 1) - erase_state = "erased"; - else - erase_state = "erase state unknown"; + for (j = first; j <= last; j++) + { + char *erase_state, *bad_state; - if (p->blocks[j].is_bad == 0) - bad_state = ""; - else if (p->blocks[j].is_bad == 1) - bad_state = " (marked bad)"; - else - bad_state = " (block condition unknown)"; - - command_print(cmd_ctx, - "\t#%i: 0x%8.8" PRIx32 " (%" PRId32 "kB) %s%s", - j, - p->blocks[j].offset, - p->blocks[j].size / 1024, - erase_state, - bad_state); - } - } + if (p->blocks[j].is_erased == 0) + erase_state = "not erased"; + else if (p->blocks[j].is_erased == 1) + erase_state = "erased"; else - { - command_print(cmd_ctx, "#%s: not probed", args[0]); - } + erase_state = "erase state unknown"; + + if (p->blocks[j].is_bad == 0) + bad_state = ""; + else if (p->blocks[j].is_bad == 1) + bad_state = " (marked bad)"; + else + bad_state = " (block condition unknown)"; + + command_print(cmd_ctx, + "\t#%i: 0x%8.8" PRIx32 " (%" PRId32 "kB) %s%s", + j, + p->blocks[j].offset, + p->blocks[j].size / 1024, + erase_state, + bad_state); } return ERROR_OK; @@ -1196,20 +1192,17 @@ static int handle_nand_probe_command(struct command_context_s *cmd_ctx, char *cm if (ERROR_OK != retval) return retval; - if (p) + if ((retval = nand_probe(p)) == ERROR_OK) { - if ((retval = nand_probe(p)) == ERROR_OK) - { - command_print(cmd_ctx, "NAND flash device '%s' found", p->device->name); - } - else if (retval == ERROR_NAND_OPERATION_FAILED) - { - command_print(cmd_ctx, "probing failed for NAND flash device"); - } - else - { - command_print(cmd_ctx, "unknown error when probing NAND flash device"); - } + command_print(cmd_ctx, "NAND flash device '%s' found", p->device->name); + } + else if (retval == ERROR_NAND_OPERATION_FAILED) + { + command_print(cmd_ctx, "probing failed for NAND flash device"); + } + else + { + command_print(cmd_ctx, "unknown error when probing NAND flash device"); } return ERROR_OK; @@ -1228,47 +1221,44 @@ static int handle_nand_erase_command(struct command_context_s *cmd_ctx, char *cm if (ERROR_OK != retval) return retval; - if (p) - { - unsigned long offset; - unsigned long length; + unsigned long offset; + unsigned long length; - /* erase specified part of the chip; or else everything */ - if (argc == 3) { - unsigned long size = p->erase_size * p->num_blocks; + /* erase specified part of the chip; or else everything */ + if (argc == 3) { + unsigned long size = p->erase_size * p->num_blocks; - COMMAND_PARSE_NUMBER(ulong, args[1], offset); - if ((offset % p->erase_size) != 0 || offset >= size) - return ERROR_INVALID_ARGUMENTS; + COMMAND_PARSE_NUMBER(ulong, args[1], offset); + if ((offset % p->erase_size) != 0 || offset >= size) + return ERROR_INVALID_ARGUMENTS; - COMMAND_PARSE_NUMBER(ulong, args[2], length); - if ((length == 0) || (length % p->erase_size) != 0 - || (length + offset) > size) - return ERROR_INVALID_ARGUMENTS; + COMMAND_PARSE_NUMBER(ulong, args[2], length); + if ((length == 0) || (length % p->erase_size) != 0 + || (length + offset) > size) + return ERROR_INVALID_ARGUMENTS; - offset /= p->erase_size; - length /= p->erase_size; - } else { - offset = 0; - length = p->num_blocks; - } + offset /= p->erase_size; + length /= p->erase_size; + } else { + offset = 0; + length = p->num_blocks; + } - retval = nand_erase(p, offset, offset + length - 1); - if (retval == ERROR_OK) - { - command_print(cmd_ctx, "erased blocks %lu to %lu " - "on NAND flash device #%s '%s'", - offset, offset + length, - args[0], p->device->name); - } - else if (retval == ERROR_NAND_OPERATION_FAILED) - { - command_print(cmd_ctx, "erase failed"); - } - else - { - command_print(cmd_ctx, "unknown error when erasing NAND flash device"); - } + retval = nand_erase(p, offset, offset + length - 1); + if (retval == ERROR_OK) + { + command_print(cmd_ctx, "erased blocks %lu to %lu " + "on NAND flash device #%s '%s'", + offset, offset + length, + args[0], p->device->name); + } + else if (retval == ERROR_NAND_OPERATION_FAILED) + { + command_print(cmd_ctx, "erase failed"); + } + else + { + command_print(cmd_ctx, "unknown error when erasing NAND flash device"); } return ERROR_OK; @@ -1353,150 +1343,147 @@ static int handle_nand_write_command(struct command_context_s *cmd_ctx, char *cm if (ERROR_OK != retval) return retval; - if (p) - { - uint8_t *page = NULL; - uint32_t page_size = 0; - uint8_t *oob = NULL; - uint32_t oob_size = 0; - const int *eccpos = NULL; + uint8_t *page = NULL; + uint32_t page_size = 0; + uint8_t *oob = NULL; + uint32_t oob_size = 0; + const int *eccpos = NULL; - COMMAND_PARSE_NUMBER(u32, args[2], offset); + COMMAND_PARSE_NUMBER(u32, args[2], offset); - if (argc > 3) + if (argc > 3) + { + int i; + for (i = 3; i < argc; i++) { - int i; - for (i = 3; i < argc; i++) + if (!strcmp(args[i], "oob_raw")) + oob_format |= NAND_OOB_RAW; + else if (!strcmp(args[i], "oob_only")) + oob_format |= NAND_OOB_RAW | NAND_OOB_ONLY; + else if (!strcmp(args[i], "oob_softecc")) + oob_format |= NAND_OOB_SW_ECC; + else if (!strcmp(args[i], "oob_softecc_kw")) + oob_format |= NAND_OOB_SW_ECC_KW; + else { - if (!strcmp(args[i], "oob_raw")) - oob_format |= NAND_OOB_RAW; - else if (!strcmp(args[i], "oob_only")) - oob_format |= NAND_OOB_RAW | NAND_OOB_ONLY; - else if (!strcmp(args[i], "oob_softecc")) - oob_format |= NAND_OOB_SW_ECC; - else if (!strcmp(args[i], "oob_softecc_kw")) - oob_format |= NAND_OOB_SW_ECC_KW; - else - { - command_print(cmd_ctx, "unknown option: %s", args[i]); - return ERROR_COMMAND_SYNTAX_ERROR; - } + command_print(cmd_ctx, "unknown option: %s", args[i]); + return ERROR_COMMAND_SYNTAX_ERROR; } } + } - duration_start_measure(&duration); + duration_start_measure(&duration); - if (fileio_open(&fileio, args[1], FILEIO_READ, FILEIO_BINARY) != ERROR_OK) - { - return ERROR_OK; - } + if (fileio_open(&fileio, args[1], FILEIO_READ, FILEIO_BINARY) != ERROR_OK) + { + return ERROR_OK; + } - buf_cnt = binary_size = fileio.size; + buf_cnt = binary_size = fileio.size; - if (!(oob_format & NAND_OOB_ONLY)) - { - page_size = p->page_size; - page = malloc(p->page_size); - } + if (!(oob_format & NAND_OOB_ONLY)) + { + page_size = p->page_size; + page = malloc(p->page_size); + } - if (oob_format & (NAND_OOB_RAW | NAND_OOB_SW_ECC | NAND_OOB_SW_ECC_KW)) - { - if (p->page_size == 512) { - oob_size = 16; - eccpos = nand_oob_16.eccpos; - } else if (p->page_size == 2048) { - oob_size = 64; - eccpos = nand_oob_64.eccpos; - } - oob = malloc(oob_size); + if (oob_format & (NAND_OOB_RAW | NAND_OOB_SW_ECC | NAND_OOB_SW_ECC_KW)) + { + if (p->page_size == 512) { + oob_size = 16; + eccpos = nand_oob_16.eccpos; + } else if (p->page_size == 2048) { + oob_size = 64; + eccpos = nand_oob_64.eccpos; } + oob = malloc(oob_size); + } - if (offset % p->page_size) - { - command_print(cmd_ctx, "only page size aligned offsets and sizes are supported"); - fileio_close(&fileio); - free(oob); - free(page); - return ERROR_OK; - } + if (offset % p->page_size) + { + command_print(cmd_ctx, "only page size aligned offsets and sizes are supported"); + fileio_close(&fileio); + free(oob); + free(page); + return ERROR_OK; + } - while (buf_cnt > 0) - { - uint32_t size_read; + while (buf_cnt > 0) + { + uint32_t size_read; - if (NULL != page) + if (NULL != page) + { + fileio_read(&fileio, page_size, page, &size_read); + buf_cnt -= size_read; + if (size_read < page_size) { - fileio_read(&fileio, page_size, page, &size_read); - buf_cnt -= size_read; - if (size_read < page_size) - { - memset(page + size_read, 0xff, page_size - size_read); - } + memset(page + size_read, 0xff, page_size - size_read); } + } - if (oob_format & NAND_OOB_SW_ECC) - { - uint32_t i, j; - uint8_t ecc[3]; - memset(oob, 0xff, oob_size); - for (i = 0, j = 0; i < page_size; i += 256) { - nand_calculate_ecc(p, page + i, ecc); - oob[eccpos[j++]] = ecc[0]; - oob[eccpos[j++]] = ecc[1]; - oob[eccpos[j++]] = ecc[2]; - } - } else if (oob_format & NAND_OOB_SW_ECC_KW) - { - /* - * In this case eccpos is not used as - * the ECC data is always stored contigously - * at the end of the OOB area. It consists - * of 10 bytes per 512-byte data block. - */ - uint32_t i; - uint8_t *ecc = oob + oob_size - page_size/512 * 10; - memset(oob, 0xff, oob_size); - for (i = 0; i < page_size; i += 512) { - nand_calculate_ecc_kw(p, page + i, ecc); - ecc += 10; - } + if (oob_format & NAND_OOB_SW_ECC) + { + uint32_t i, j; + uint8_t ecc[3]; + memset(oob, 0xff, oob_size); + for (i = 0, j = 0; i < page_size; i += 256) { + nand_calculate_ecc(p, page + i, ecc); + oob[eccpos[j++]] = ecc[0]; + oob[eccpos[j++]] = ecc[1]; + oob[eccpos[j++]] = ecc[2]; + } + } else if (oob_format & NAND_OOB_SW_ECC_KW) + { + /* + * In this case eccpos is not used as + * the ECC data is always stored contigously + * at the end of the OOB area. It consists + * of 10 bytes per 512-byte data block. + */ + uint32_t i; + uint8_t *ecc = oob + oob_size - page_size/512 * 10; + memset(oob, 0xff, oob_size); + for (i = 0; i < page_size; i += 512) { + nand_calculate_ecc_kw(p, page + i, ecc); + ecc += 10; } - else if (NULL != oob) + } + else if (NULL != oob) + { + fileio_read(&fileio, oob_size, oob, &size_read); + buf_cnt -= size_read; + if (size_read < oob_size) { - fileio_read(&fileio, oob_size, oob, &size_read); - buf_cnt -= size_read; - if (size_read < oob_size) - { - memset(oob + size_read, 0xff, oob_size - size_read); - } + memset(oob + size_read, 0xff, oob_size - size_read); } + } - if (nand_write_page(p, offset / p->page_size, page, page_size, oob, oob_size) != ERROR_OK) - { - command_print(cmd_ctx, "failed writing file %s to NAND flash %s at offset 0x%8.8" PRIx32 "", - args[1], args[0], offset); + if (nand_write_page(p, offset / p->page_size, page, page_size, oob, oob_size) != ERROR_OK) + { + command_print(cmd_ctx, "failed writing file %s to NAND flash %s at offset 0x%8.8" PRIx32 "", + args[1], args[0], offset); - fileio_close(&fileio); - free(oob); - free(page); + fileio_close(&fileio); + free(oob); + free(page); - return ERROR_OK; - } - offset += page_size; + return ERROR_OK; } - - fileio_close(&fileio); - free(oob); - free(page); - oob = NULL; - page = NULL; - duration_stop_measure(&duration, &duration_text); - command_print(cmd_ctx, "wrote file %s to NAND flash %s up to offset 0x%8.8" PRIx32 " in %s", - args[1], args[0], offset, duration_text); - free(duration_text); - duration_text = NULL; + offset += page_size; } + fileio_close(&fileio); + free(oob); + free(page); + oob = NULL; + page = NULL; + duration_stop_measure(&duration, &duration_text); + command_print(cmd_ctx, "wrote file %s to NAND flash %s up to offset 0x%8.8" PRIx32 " in %s", + args[1], args[0], offset, duration_text); + free(duration_text); + duration_text = NULL; + return ERROR_OK; } @@ -1512,113 +1499,108 @@ static int handle_nand_dump_command(struct command_context_s *cmd_ctx, char *cmd if (ERROR_OK != retval) return retval; - if (p) + if (NULL == p->device) { - if (p->device) - { - fileio_t fileio; - duration_t duration; - char *duration_text; - int retval; - - uint8_t *page = NULL; - uint32_t page_size = 0; - uint8_t *oob = NULL; - uint32_t oob_size = 0; - uint32_t address; - COMMAND_PARSE_NUMBER(u32, args[2], address); - uint32_t size; - COMMAND_PARSE_NUMBER(u32, args[3], size); - uint32_t bytes_done = 0; - enum oob_formats oob_format = NAND_OOB_NONE; - - if (argc > 4) - { - int i; - for (i = 4; i < argc; i++) - { - if (!strcmp(args[i], "oob_raw")) - oob_format |= NAND_OOB_RAW; - else if (!strcmp(args[i], "oob_only")) - oob_format |= NAND_OOB_RAW | NAND_OOB_ONLY; - else - command_print(cmd_ctx, "unknown option: '%s'", args[i]); - } - } - - if ((address % p->page_size) || (size % p->page_size)) - { - command_print(cmd_ctx, "only page size aligned addresses and sizes are supported"); - return ERROR_OK; - } + command_print(cmd_ctx, "#%s: not probed", args[0]); + return ERROR_OK; + } - if (!(oob_format & NAND_OOB_ONLY)) - { - page_size = p->page_size; - page = malloc(p->page_size); - } + fileio_t fileio; + duration_t duration; + char *duration_text; - if (oob_format & NAND_OOB_RAW) - { - if (p->page_size == 512) - oob_size = 16; - else if (p->page_size == 2048) - oob_size = 64; - oob = malloc(oob_size); - } + uint8_t *page = NULL; + uint32_t page_size = 0; + uint8_t *oob = NULL; + uint32_t oob_size = 0; + uint32_t address; + COMMAND_PARSE_NUMBER(u32, args[2], address); + uint32_t size; + COMMAND_PARSE_NUMBER(u32, args[3], size); + uint32_t bytes_done = 0; + enum oob_formats oob_format = NAND_OOB_NONE; - if (fileio_open(&fileio, args[1], FILEIO_WRITE, FILEIO_BINARY) != ERROR_OK) - { - return ERROR_OK; - } + if (argc > 4) + { + int i; + for (i = 4; i < argc; i++) + { + if (!strcmp(args[i], "oob_raw")) + oob_format |= NAND_OOB_RAW; + else if (!strcmp(args[i], "oob_only")) + oob_format |= NAND_OOB_RAW | NAND_OOB_ONLY; + else + command_print(cmd_ctx, "unknown option: '%s'", args[i]); + } + } - duration_start_measure(&duration); + if ((address % p->page_size) || (size % p->page_size)) + { + command_print(cmd_ctx, "only page size aligned addresses and sizes are supported"); + return ERROR_OK; + } - while (size > 0) - { - uint32_t size_written; - if ((retval = nand_read_page(p, address / p->page_size, page, page_size, oob, oob_size)) != ERROR_OK) - { - command_print(cmd_ctx, "reading NAND flash page failed"); - free(page); - free(oob); - fileio_close(&fileio); - return ERROR_OK; - } + if (!(oob_format & NAND_OOB_ONLY)) + { + page_size = p->page_size; + page = malloc(p->page_size); + } - if (NULL != page) - { - fileio_write(&fileio, page_size, page, &size_written); - bytes_done += page_size; - } + if (oob_format & NAND_OOB_RAW) + { + if (p->page_size == 512) + oob_size = 16; + else if (p->page_size == 2048) + oob_size = 64; + oob = malloc(oob_size); + } - if (NULL != oob) - { - fileio_write(&fileio, oob_size, oob, &size_written); - bytes_done += oob_size; - } + if (fileio_open(&fileio, args[1], FILEIO_WRITE, FILEIO_BINARY) != ERROR_OK) + { + return ERROR_OK; + } - size -= p->page_size; - address += p->page_size; - } + duration_start_measure(&duration); + while (size > 0) + { + uint32_t size_written; + if ((retval = nand_read_page(p, address / p->page_size, page, page_size, oob, oob_size)) != ERROR_OK) + { + command_print(cmd_ctx, "reading NAND flash page failed"); free(page); - page = NULL; free(oob); - oob = NULL; fileio_close(&fileio); + return ERROR_OK; + } - duration_stop_measure(&duration, &duration_text); - command_print(cmd_ctx, "dumped %lld byte in %s", fileio.size, duration_text); - free(duration_text); - duration_text = NULL; + if (NULL != page) + { + fileio_write(&fileio, page_size, page, &size_written); + bytes_done += page_size; } - else + + if (NULL != oob) { - command_print(cmd_ctx, "#%s: not probed", args[0]); + fileio_write(&fileio, oob_size, oob, &size_written); + bytes_done += oob_size; } + + size -= p->page_size; + address += p->page_size; } + free(page); + page = NULL; + free(oob); + oob = NULL; + fileio_close(&fileio); + + duration_stop_measure(&duration, &duration_text); + command_print(cmd_ctx, "dumped %lld byte in %s", fileio.size, duration_text); + free(duration_text); + duration_text = NULL; + return ERROR_OK; } @@ -1634,33 +1616,24 @@ static int handle_nand_raw_access_command(struct command_context_s *cmd_ctx, cha if (ERROR_OK != retval) return retval; - if (p) + if (NULL == p->device) { - if (p->device) - { - if (argc == 2) - { - if (strcmp("enable", args[1]) == 0) - { - p->use_raw = 1; - } - else if (strcmp("disable", args[1]) == 0) - { - p->use_raw = 0; - } - else - { - return ERROR_COMMAND_SYNTAX_ERROR; - } - } + command_print(cmd_ctx, "#%s: not probed", args[0]); + return ERROR_OK; + } - command_print(cmd_ctx, "raw access is %s", (p->use_raw) ? "enabled" : "disabled"); - } + if (argc == 2) + { + if (strcmp("enable", args[1]) == 0) + p->use_raw = 1; + else if (strcmp("disable", args[1]) == 0) + p->use_raw = 0; else - { - command_print(cmd_ctx, "#%s: not probed", args[0]); - } + return ERROR_COMMAND_SYNTAX_ERROR; } + const char *msg = p->use_raw ? "enabled" : "disabled"; + command_print(cmd_ctx, "raw access is %s", msg); + return ERROR_OK; } commit ff61e6a37ce79f00957fc5aeb304291e5fa06323 Author: Zachary T Welch <zw...@su...> Date: Thu Nov 5 23:52:03 2009 -0800 Improve flash indentation. Removes redundant tests and reverses backwards logic to reduce the indentation level in flash.c. diff --git a/src/flash/flash.c b/src/flash/flash.c index b40e074..329ade6 100644 --- a/src/flash/flash.c +++ b/src/flash/flash.c @@ -177,35 +177,35 @@ int flash_init_drivers(struct command_context_s *cmd_ctx) { register_jim(cmd_ctx, "ocd_flash_banks", jim_flash_banks, "return information about the flash banks"); - if (flash_banks) - { - register_command(cmd_ctx, flash_cmd, "info", handle_flash_info_command, COMMAND_EXEC, - "print info about flash bank <num>"); - register_command(cmd_ctx, flash_cmd, "probe", handle_flash_probe_command, COMMAND_EXEC, - "identify flash bank <num>"); - register_command(cmd_ctx, flash_cmd, "erase_check", handle_flash_erase_check_command, COMMAND_EXEC, - "check erase state of sectors in flash bank <num>"); - register_command(cmd_ctx, flash_cmd, "protect_check", handle_flash_protect_check_command, COMMAND_EXEC, - "check protection state of sectors in flash bank <num>"); - register_command(cmd_ctx, flash_cmd, "erase_sector", handle_flash_erase_command, COMMAND_EXEC, - "erase sectors at <bank> <first> <last>"); - register_command(cmd_ctx, flash_cmd, "erase_address", handle_flash_erase_address_command, COMMAND_EXEC, - "erase address range <address> <length>"); - - register_command(cmd_ctx, flash_cmd, "fillw", handle_flash_fill_command, COMMAND_EXEC, - "fill with pattern (no autoerase) <address> <word_pattern> <count>"); - register_command(cmd_ctx, flash_cmd, "fillh", handle_flash_fill_command, COMMAND_EXEC, - "fill with pattern <address> <halfword_pattern> <count>"); - register_command(cmd_ctx, flash_cmd, "fillb", handle_flash_fill_command, COMMAND_EXEC, - "fill with pattern <address> <byte_pattern> <count>"); - - register_command(cmd_ctx, flash_cmd, "write_bank", handle_flash_write_bank_command, COMMAND_EXEC, - "write binary data to <bank> <file> <offset>"); - register_command(cmd_ctx, flash_cmd, "write_image", handle_flash_write_image_command, COMMAND_EXEC, - "write_image [erase] [unlock] <file> [offset] [type]"); - register_command(cmd_ctx, flash_cmd, "protect", handle_flash_protect_command, COMMAND_EXEC, - "set protection of sectors at <bank> <first> <last> <on | off>"); - } + if (!flash_banks) + return ERROR_OK; + + register_command(cmd_ctx, flash_cmd, "info", handle_flash_info_command, COMMAND_EXEC, + "print info about flash bank <num>"); + register_command(cmd_ctx, flash_cmd, "probe", handle_flash_probe_command, COMMAND_EXEC, + "identify flash bank <num>"); + register_command(cmd_ctx, flash_cmd, "erase_check", handle_flash_erase_check_command, COMMAND_EXEC, + "check erase state of sectors in flash bank <num>"); + register_command(cmd_ctx, flash_cmd, "protect_check", handle_flash_protect_check_command, COMMAND_EXEC, + "check protection state of sectors in flash bank <num>"); + register_command(cmd_ctx, flash_cmd, "erase_sector", handle_flash_erase_command, COMMAND_EXEC, + "erase sectors at <bank> <first> <last>"); + register_command(cmd_ctx, flash_cmd, "erase_address", handle_flash_erase_address_command, COMMAND_EXEC, + "erase address range <address> <length>"); + + register_command(cmd_ctx, flash_cmd, "fillw", handle_flash_fill_command, COMMAND_EXEC, + "fill with pattern (no autoerase) <address> <word_pattern> <count>"); + register_command(cmd_ctx, flash_cmd, "fillh", handle_flash_fill_command, COMMAND_EXEC, + "fill with pattern <address> <halfword_pattern> <count>"); + register_command(cmd_ctx, flash_cmd, "fillb", handle_flash_fill_command, COMMAND_EXEC, + "fill with pattern <address> <byte_pattern> <count>"); + + register_command(cmd_ctx, flash_cmd, "write_bank", handle_flash_write_bank_command, COMMAND_EXEC, + "write binary data to <bank> <file> <offset>"); + register_command(cmd_ctx, flash_cmd, "write_image", handle_flash_write_image_command, COMMAND_EXEC, + "write_image [erase] [unlock] <file> [offset] [type]"); + register_command(cmd_ctx, flash_cmd, "protect", handle_flash_protect_command, COMMAND_EXEC, + "set protection of sectors at <bank> <first> <last> <on | off>"); return ERROR_OK; } @@ -292,54 +292,54 @@ static int handle_flash_bank_command(struct command_context_s *cmd_ctx, char *cm for (i = 0; flash_drivers[i]; i++) { - if (strcmp(args[0], flash_drivers[i]->name) == 0) - { - flash_bank_t *p, *c; + if (strcmp(args[0], flash_drivers[i]->name) != 0) + continue; - /* register flash specific commands */ - if (flash_drivers[i]->register_commands(cmd_ctx) != ERROR_OK) - { - LOG_ERROR("couldn't register '%s' commands", args[0]); - return ERROR_FAIL; - } + flash_bank_t *p, *c; - c = malloc(sizeof(flash_bank_t)); - c->target = target; - c->driver = flash_drivers[i]; - c->driver_priv = NULL; - COMMAND_PARSE_NUMBER(u32, args[1], c->base); - COMMAND_PARSE_NUMBER(u32, args[2], c->size); - COMMAND_PARSE_NUMBER(int, args[3], c->chip_width); - COMMAND_PARSE_NUMBER(int, args[4], c->bus_width); - c->num_sectors = 0; - c->sectors = NULL; - c->next = NULL; - - if ((retval = flash_drivers[i]->flash_bank_command(cmd_ctx, cmd, args, argc, c)) != ERROR_OK) - { - LOG_ERROR("'%s' driver rejected flash bank at 0x%8.8" PRIx32 , args[0], c->base); - free(c); - return retval; - } + /* register flash specific commands */ + if (flash_drivers[i]->register_commands(cmd_ctx) != ERROR_OK) + { + LOG_ERROR("couldn't register '%s' commands", args[0]); + return ERROR_FAIL; + } - /* put flash bank in linked list */ - if (flash_banks) - { - int bank_num = 0; - /* find last flash bank */ - for (p = flash_banks; p && p->next; p = p->next) bank_num++; - if (p) - p->next = c; - c->bank_number = bank_num + 1; - } - else - { - flash_banks = c; - c->bank_number = 0; - } + c = malloc(sizeof(flash_bank_t)); + c->target = target; + c->driver = flash_drivers[i]; + c->driver_priv = NULL; + COMMAND_PARSE_NUMBER(u32, args[1], c->base); + COMMAND_PARSE_NUMBER(u32, args[2], c->size); + COMMAND_PARSE_NUMBER(int, args[3], c->chip_width); + COMMAND_PARSE_NUMBER(int, args[4], c->bus_width); + c->num_sectors = 0; + c->sectors = NULL; + c->next = NULL; + + if ((retval = flash_drivers[i]->flash_bank_command(cmd_ctx, cmd, args, argc, c)) != ERROR_OK) + { + LOG_ERROR("'%s' driver rejected flash bank at 0x%8.8" PRIx32 , args[0], c->base); + free(c); + return retval; + } - found = 1; + /* put flash bank in linked list */ + if (flash_banks) + { + int bank_num = 0; + /* find last flash bank */ + for (p = flash_banks; p && p->next; p = p->next) bank_num++; + if (p) + p->next = c; + c->bank_number = bank_num + 1; } + else + { + flash_banks = c; + c->bank_number = 0; + } + + found = 1; } /* no matching flash driver found */ @@ -367,48 +367,48 @@ static int handle_flash_info_command(struct command_context_s *cmd_ctx, char *cm for (p = flash_banks; p; p = p->next, i++) { - if (i == bank_nr) + if (i != bank_nr) + continue; + + char buf[1024]; + + /* attempt auto probe */ + if ((retval = p->driver->auto_probe(p)) != ERROR_OK) + return retval; + + command_print(cmd_ctx, + "#%" PRIi32 " : %s at 0x%8.8" PRIx32 ", size 0x%8.8" PRIx32 ", buswidth %i, chipwidth %i", + i, + p->driver->name, + p->base, + p->size, + p->bus_width, + p->chip_width); + for (j = 0; j < p->num_sectors; j++) { - char buf[1024]; + char *protect_state; - /* attempt auto probe */ - if ((retval = p->driver->auto_probe(p)) != ERROR_OK) - return retval; + if (p->sectors[j].is_protected == 0) + protect_state = "not protected"; + else if (p->sectors[j].is_protected == 1) + protect_state = "protected"; + else + protect_state = "protection state unknown"; command_print(cmd_ctx, - "#%" PRIi32 " : %s at 0x%8.8" PRIx32 ", size 0x%8.8" PRIx32 ", buswidth %i, chipwidth %i", - i, - p->driver->name, - p->base, - p->size, - p->bus_width, - p->chip_width); - for (j = 0; j < p->num_sectors; j++) - { - char *protect_state; - - if (p->sectors[j].is_protected == 0) - protect_state = "not protected"; - else if (p->sectors[j].is_protected == 1) - protect_state = "protected"; - else - protect_state = "protection state unknown"; - - command_print(cmd_ctx, - "\t#%3i: 0x%8.8" PRIx32 " (0x%" PRIx32 " %" PRIi32 "kB) %s", - j, - p->sectors[j].offset, - p->sectors[j].size, - p->sectors[j].size >> 10, - protect_state); - } - - *buf = '\0'; /* initialize buffer, otherwise it migh contain garbage if driver function fails */ - retval = p->driver->info(p, buf, sizeof(buf)); - command_print(cmd_ctx, "%s", buf); - if (retval != ERROR_OK) - LOG_ERROR("error retrieving flash info (%d)", retval); + "\t#%3i: 0x%8.8" PRIx32 " (0x%" PRIx32 " %" PRIi32 "kB) %s", + j, + p->sectors[j].offset, + p->sectors[j].size, + p->sectors[j].size >> 10, + protect_state); } + + *buf = '\0'; /* initialize buffer, otherwise it migh contain garbage if driver function fails */ + retval = p->driver->info(p, buf, sizeof(buf)); + command_print(cmd_ctx, "%s", buf); + if (retval != ERROR_OK) + LOG_ERROR("error retrieving flash info (%d)", retval); } return ERROR_OK; @@ -463,38 +463,35 @@ static int handle_flash_erase_check_command(struct command_context_s *cmd_ctx, c if (ERROR_OK != retval) return retval; - if (p) + int j; + if ((retval = p->driver->erase_check(p)) == ERROR_OK) { - int j; - if ((retval = p->driver->erase_check(p)) == ERROR_OK) - { - command_print(cmd_ctx, "successfully checked erase state"); - } - else - { - command_print(cmd_ctx, "unknown error when checking erase state of flash bank #%s at 0x%8.8" PRIx32, - args[0], p->base); - } + command_print(cmd_ctx, "successfully checked erase state"); + } + else + { + command_print(cmd_ctx, "unknown error when checking erase state of flash bank #%s at 0x%8.8" PRIx32, + args[0], p->base); + } - for (j = 0; j < p->num_sectors; j++) - { - char *erase_state; + for (j = 0; j < p->num_sectors; j++) + { + char *erase_state; - if (p->sectors[j].is_erased == 0) - erase_state = "not erased"; - else if (p->sectors[j].is_erased == 1) - erase_state = "erased"; - else - erase_state = "erase state unknown"; + if (p->sectors[j].is_erased == 0) + erase_state = "not erased"; + else if (p->sectors[j].is_erased == 1) + erase_state = "erased"; + else + erase_state = "erase state unknown"; - command_print(cmd_ctx, - "\t#%3i: 0x%8.8" PRIx32 " (0x%" PRIx32 " %" PRIi32 "kB) %s", - j, - p->sectors[j].offset, - p->sectors[j].size, - p->sectors[j].size >> 10, - erase_state); - } + command_print(cmd_ctx, + "\t#%3i: 0x%8.8" PRIx32 " (0x%" PRIx32 " %" PRIi32 "kB) %s", + j, + p->sectors[j].offset, + p->sectors[j].size, + p->sectors[j].size >> 10, + erase_state); } return ERROR_OK; @@ -556,21 +553,17 @@ static int handle_flash_protect_check_command(struct command_context_s *cmd_ctx, if (ERROR_OK != retval) return retval; - if (p) + if ((retval = p->driver->protect_check(p)) == ERROR_OK) { - int retval; - if ((retval = p->driver->protect_check(p)) == ERROR_OK) - { - command_print(cmd_ctx, "successfully checked protect state"); - } - else if (retval == ERROR_FLASH_OPERATION_FAILED) - { - command_print(cmd_ctx, "checking protection state failed (possibly unsupported) by flash #%s at 0x%8.8" PRIx32, args[0], p->base); - } - else - { - command_print(cmd_ctx, "unknown error when checking protection state of flash bank '#%s' at 0x%8.8" PRIx32, args[0], p->base); - } + command_print(cmd_ctx, "successfully checked protect state"); + } + else if (retval == ERROR_FLASH_OPERATION_FAILED) + { + command_print(cmd_ctx, "checking protection state failed (possibly unsupported) by flash #%s at 0x%8.8" PRIx32, args[0], p->base); + } + else + { + command_print(cmd_ctx, "unknown error when checking protection state of flash bank '#%s' at 0x%8.8" PRIx32, args[0], p->base); } return ERROR_OK; @@ -597,45 +590,43 @@ static int flash_check_sector_parameters(struct command_context_s *cmd_ctx, static int handle_flash_erase_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc) { - if (argc > 2) - { - uint32_t bank_nr; - uint32_t first; - uint32_t last; - - COMMAND_PARSE_NUMBER(u32, args[0], bank_nr); - flash_bank_t *p = get_flash_bank_by_num(bank_nr); - if (!p) - return ERROR_OK; - - COMMAND_PARSE_NUMBER(u32, args[1], first); - if (strcmp(args[2], "last") == 0) - last = p->num_sectors - 1; - else - COMMAND_PARSE_NUMBER(u32, args[2], last); + if (argc != 2) + return ERROR_COMMAND_SYNTAX_ERROR; - int retval; - if ((retval = flash_check_sector_parameters(cmd_ctx, - first, last, p->num_sectors)) != ERROR_OK) - return retval; + uint32_t bank_nr; + uint32_t first; + uint32_t last; - duration_t duration; - char *duration_text; - duration_start_measure(&duration); + COMMAND_PARSE_NUMBER(u32, args[0], bank_nr); + flash_bank_t *p = get_flash_bank_by_num(bank_nr); + if (!p) + return ERROR_OK; - if ((retval = flash_driver_erase(p, first, last)) == ERROR_OK) { - if ((retval = duration_stop_measure(&duration, - &duration_text)) != ERROR_OK) - return retval; - command_print(cmd_ctx, "erased sectors %i through %i " - "on flash bank %i in %s", - (int) first, (int) last, (int) bank_nr, - duration_text); - free(duration_text); - } - } + COMMAND_PARSE_NUMBER(u32, args[1], first); + if (strcmp(args[2], "last") == 0) + last = p->num_sectors - 1; else - return ERROR_COMMAND_SYNTAX_ERROR; + COMMAND_PARSE_NUMBER(u32, args[2], last); + + int retval; + if ((retval = flash_check_sector_parameters(cmd_ctx, + first, last, p->num_sectors)) != ERROR_OK) + return retval; + + duration_t duration; + char *duration_text; + duration_start_measure(&duration); + + if ((retval = flash_driver_erase(p, first, last)) == ERROR_OK) { + if ((retval = duration_stop_measure(&duration, + &duration_text)) != ERROR_OK) + return retval; + command_print(cmd_ctx, "erased sectors %i through %i " + "on flash bank %i in %s", + (int) first, (int) last, (int) bank_nr, + duration_text); + free(duration_text); + } return ERROR_OK; } @@ -643,47 +634,45 @@ static int handle_flash_erase_command(struct command_context_s *cmd_ctx, static int handle_flash_protect_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc) { - if (argc > 3) - { - uint32_t bank_nr; - uint32_t first; - uint32_t last; - int set; - - COMMAND_PARSE_NUMBER(u32, args[0], bank_nr); - flash_bank_t *p = get_flash_bank_by_num(bank_nr); - if (!p) - return ERROR_OK; - - COMMAND_PARSE_NUMBER(u32, args[1], first); - if (strcmp(args[2], "last") == 0) - last = p->num_sectors - 1; - else - COMMAND_PARSE_NUMBER(u32, args[2], last); + if (argc != 3) + return ERROR_COMMAND_SYNTAX_ERROR; - if (strcmp(args[3], "on") == 0) - set = 1; - else if (strcmp(args[3], "off") == 0) - set = 0; - else - return ERROR_COMMAND_SYNTAX_ERROR; + uint32_t bank_nr; + uint32_t first; + uint32_t last; + int set; - int retval; - if ((retval = flash_check_sector_parameters(cmd_ctx, - first, last, p->num_sectors)) != ERROR_OK) - return retval; + COMMAND_PARSE_NUMBER(u32, args[0], bank_nr); + flash_bank_t *p = get_flash_bank_by_num(bank_nr); + if (!p) + return ERROR_OK; - retval = flash_driver_protect(p, set, first, last); - if (retval == ERROR_OK) { - command_print(cmd_ctx, "%s protection for sectors %i " - "through %i on flash bank %i", - (set) ? "set" : "cleared", (int) first, - (int) last, (int) bank_nr); - } - } + COMMAND_PARSE_NUMBER(u32, args[1], first); + if (strcmp(args[2], "last") == 0) + last = p->num_sectors - 1; + else + COMMAND_PARSE_NUMBER(u32, args[2], last); + + if (strcmp(args[3], "on") == 0) + set = 1; + else if (strcmp(args[3], "off") == 0) + set = 0; else return ERROR_COMMAND_SYNTAX_ERROR; + int retval; + if ((retval = flash_check_sector_parameters(cmd_ctx, + first, last, p->num_sectors)) != ERROR_OK) + return retval; + + retval = flash_driver_protect(p, set, first, last); + if (retval == ERROR_OK) { + command_print(cmd_ctx, "%s protection for sectors %i " + "through %i on flash bank %i", + (set) ? "set" : "cleared", (int) first, + (int) last, (int) bank_nr); + } + return ERROR_OK; } commit c5f56437c0be07201481ae2232d2c765cc1bc281 Author: Zachary T Welch <zw...@su...> Date: Fri Nov 6 00:16:39 2009 -0800 Fix arm11 vcr command parsing. diff --git a/src/target/arm11.c b/src/target/arm11.c index 28ee723..9cb80f1 100644 --- a/src/target/arm11.c +++ b/src/target/arm11.c @@ -2065,6 +2065,7 @@ int arm11_handle_vcr(struct command_context_s *cmd_ctx, char *cmd, char **args, break; case 1: COMMAND_PARSE_NUMBER(u32, args[0], arm11_vcr); + break; default: return ERROR_COMMAND_SYNTAX_ERROR; } ----------------------------------------------------------------------- Summary of changes: src/flash/flash.c | 437 +++++++++++++++++++------------------- src/flash/nand.c | 601 +++++++++++++++++++++++++--------------------------- src/target/arm11.c | 1 + 3 files changed, 501 insertions(+), 538 deletions(-) hooks/post-receive -- Main OpenOCD repository |
From: David B. <dbr...@us...> - 2009-11-06 07:13:54
|
This is an automated email from the git hooks/post-receive script. It was generated because a ref change was pushed to the repository containing the project "Main OpenOCD repository". The annotated tag, v0.1.0 has been created at e7cf58f6f6d6970ee08ae91d98a99eb4d3f2f2a9 (tag) tagging 3b4d5ae050780ddff2366fe6f96858e154573ac1 (commit) tagged by David Brownell on Wed Jan 21 04:15:00 2009 -0800 - Log ----------------------------------------------------------------- OpenOCD 0.1.0 release (approximate) SVN 1355 seems to be the magic point, this is the closest we have in git. https://lists.berlios.de/pipermail/openocd-development/2009-July/009264.html bodylove (12): Merged rev 215 changes from /branches/xscale-ixp-be into trunk: Changed openocd version info creation to be more useful. - XScale DebugHandler code is now installed into - Added PKGLIBDIR define to C options. Allows to store - Enabled URL keyword expansion for enhanced version - Stripped trailing spaces (patch preparation) - Eleminated leading tabs/white space - Eleminated leading tabs/white space - Eleminated leading tabs/white space - Synced code with branch [MERGE] Merged all remaining changes between trunk and xscale big-endian branch. - Added example config and startup-script for a XScale IXP42x system drath (109): - prepare OpenOCD for branching, created ./trunk/ - fixed some spelling errors (thanks to Andrew Dyer) - the 'help' command now takes an optional argument to display help only on a certain command (thanks to Andrew Dyer for this enhancement) - keep additional information for decoded instructions - added support for AT91SAM7A3 flash (patch from andre renaud, thanks) - added "version" command (patch from John Hartman, thanks) - changed use of bzero (deprecated) to memset (thanks to Spen for pointing this out) - fixed bug in Thumb sw breakpoint handling (thanks to Spen for this patch) - Added support for native MinGW builds (thanks to Spencer Oliver and Michael Fischer) - you still need to install GiveIO (not part of OpenOCD) - added configurable delays after reset lines get deasserted. useful if reset circuitry keeps lines asserted for too long. - allow building for MinGW using either -mno-cygwin or the MinGW gcc - fixed a minor problem with the GDB server that could drop the first packet (non-fatal) - fixed jtag_n[st]rst_delay. time is now miliseconds (as documented), not microseconds - added support for FreeBSD ppi (parallel port access similar to /dev/parport on linux) (thanks to Darius for this patch) - added support for the Signalyzer USB->JTAG dongle (www.signalyzer.com) - updated configuration examples, installation instructions and README (including list of supported JTAG interfaces) - fixed bug in .cfg files. Thanks to Michael Fischer for noticing this. - renamed jtag_interface_t.support_statemove to jtag_interface_t.support_pathmove (it is used to indicate jtag_add_pathmove support) - updated version info in openocd.c - made bp command more verbose - endianess fixes everywhere but in the flash code. flashing might still be broken on big-endian targets and/or hosts - added missing AT91RM9200 files - made lpc2000 code endianness safe (support big-endian hosts, target is always little) - added debug output for D/I FSR and FAR (arm920t) - integrated patch from Magnus Lundin that fixes at91sam7 flash timing bugs and possible endianness problems (big endian hosts) - free working area used to store flash write buffer - set the T bit in the CPSR when the core was executing in Thumb state. Mask the T bit from the CPSR for all CPSR-writing operations - allow writes to second flash bank on STR71x devices (cleaned up sector list building) - str9x flash support (Thanks to Spencer Oliver) - fixed regression in gdb_server.c (Thanks to Michael Fischer for finding these bugs) - added support for American Microsystem's M5960 (FT2232 based USB JTAG interface) - allow FT2232 devices to be opened by serial number instead of device description ('ft2232_serial <serial>' command) - fixed endianness handling in arm7_9_read_core_reg (thanks to Magnus Lundin for reporting this) - several small fixes (thanks to Magnus Lundin and Spencer Oliver) - correctly enter debug state on a "soft_reset_halt" command - added support for the oocd-link (http://www.joernonline.de/dw/doku.php?id=en:projects:oocdlink) - added a PLD (programmable logic device) subsystem for FPGA, CPLD etc. configuration - checked in missing configure.in changes for GW16012 support - disabled FT2232 debug output (that code should be fairly stable) - fix incorrect parsing of whitespace in command.c (thanks to Magnus Lundin) - Added support for ARM926EJ-S based cores - disabled JTAG debug output - disabled use of single-step bit for EmbeddedICE version 6 cores - merged several changes from XScale - add missing parentheses around macro parameters (thanks to Matthias Bauch for noticing this bug and providing a fix) - fixed libftdi initialization - reworked file i/o. every fileaccess (target, flash, nand, in future configuration, too) should now go through the fileio subsystem - added missing files for last commit - fixed arm926 cp15 command bug (thanks to Vincent Palatin for this patch) - merged XScale branch back into trunk - added "arm9tdmi vector_catch ['all'|'none'|'vec1 [vec2 [...]]']" command - added support for Turtelizer 2 (USB JTAG interface) (Thanks to Michael Fischer for this patch) - disabled excessive debug output in jtag.h - correctly mask out bits that aren't part of a copied buffer - allow multiple USB vendor and product ids when searching for connected FT2232 based JTAG interfaces (thanks to Werner Almesberger for this patch) - explicitly disable monitor mode on ARM7/9 targets - added support for error handlers to JTAG scan commands (jtag_[plain_][ir|dr]_scan) - improved ETB trace output - further work on ETB decoding (not yet functional) - split fileio handling into fileio part and image handling - add missing image handling files - add missing file src/target/trace.h - reworked image handling to support multiple sections (tested with ihex file containing gaps) - add support for ELF images (thanks to Vincent Palatin for this patch) - added manpage for OpenOCD (thanks to Uwe Hermann) - merged support for Cortex-M3 from cortex-m3 branch (thanks to Magnus Lundin) - added stellaris.[ch] missing from Cortex-M3 merge - added support for pseudo image type "mem", currently only used for etm analysis: "etm image <target#> <dummy base address> mem" - added support for Intel/Marvel PXA27x (XScale) targets - fixed endianness helper macros (thanks to obilix and wiml for finding and fixing this bug) - added support for Asix Presto JTAG interface (thanks to Pavel Chromy and Asix for making this addition possible) - reformat src/jtag/bitq.c (thanks to Pavel Chromy) - documentation fixes (thanks to Uwe Hermann) - restrict direct parallel port access to x86 platforms (thanks to Vincent Palatin) - calculate cycles since last executed instruction when cycle-accurate tracing is enabled - add missing configure.in change from last checkin - cleaned up cycle counting in ETM analysis - renamed M5960 USB JTAG to "flyswatter" - changed mingw host detection to *-mingw instead of *-*-mingw to work with i586-mingw32msvc-gcc - bumped version information - reworked presto.c to allow use of either FTD2XX or libftdi (libftdi not functional yet). Configure option changed from --enable-presto to - corrected automake script - fixed several bugs in flash writing code (thanks to Pavel Chromy) - update jtag_speed setting when changing it during runtime with a FT2232 based interface - renamed "xscale dump_trace_buffer" to "xscale dump_trace" and added code for it - update file size when writing to a fileio - correctly initialize start address for XScale trace buffer decodes in fill-once mode - added support for setting JTAG frequency on ASIX PRESTO (thanks to Pavel Chromy) Patch by Michael Schwingen that - fixed ETM configuration register decoding - use correct SCAN_N check value (disabled by default) - added tms470 flash support (thanks to Chris Kilgour for this patch) - fixed 'make distcheck' (thanks to Theodore A. Roth for this patch - ignore data aborts during gdb memory read packets by default, and return 0x0 instead - Fix problems with stuck telnet sessions. Thanks to Ãyvind Harboe for this patch. - add support for the majority of the Samsung ARM SoC family, S3C2410, S3C2412, S3C2413, S3C2440 and S3C2443 (thanks to Ben Dooks for this patch) - Use NAND extended geometry information (thanks to Ben Dooks for this patch) - fix for feroceon CP15 register access (thanks to Niolas Pitre for this patch) - fixes possible crash when GDB connection is closed while target is running due to log callback sending messages to connection which does not - concretize JTAG state transition rules (previously implied behaviour is now documented) - convert all files to unix line-ending - fix bug in ft2232 pathmove (thanks to Michael Bruck for the patch) - fix typo in ep93xx jtag driver to allow OpenOCD compilation on ARM (thanks to Uwe Hermann for the patch) - fix line-endings - Added coding style to README - fix warnings during configure cause by ecosboard. default to no, if host cpu isn't arm. - Flash auto-erase is disabled by default - fixed xsvf_add_statemove() - fix a off-by-one error in the buffer read/write code that checks for a address wrap duane (29): Test checkin from commandline jtag newtap change & huge manual update Fix for Hiroshi Ito discovery of mis-aligned memory allocation Manual tweak based on feedback from mailing list the iar dongle works Added Joern Kaipf link for oocdlink Test of commit email from duane Typos in config files found by Sergey Lapin Fix from Kees Jongenburger Fix from Kees Jongenburger (Part Duex) More fixes thanks to Kees Jongenburger Updates and fixes from Kees Jongenburger Typos found by miceal catudal Build Permutations with ftd2xx and libftdi addressed. Also added a new se of regression makefiles to build openocd in multiple ways Renamed build.tests to build.test1 Added documentation for build test case1 From Dirk Behme - Further docu fixes Warning removal from lou...@fi... Added dongle VSLLINK - from Simon Qian Quoteify the FT2232 description list, and a missed fix from Dirk Behme about jtag tapisenabled From Lou...@fi... Missed support for without --exec-prefix and ftd2xx stuff Some systems report linux as host, others linux-gnu... grrr From Dirk Behme - another set of typos Added note to user manual for packagers of OpenOCD Tweaks - old crusty code with some warnings & errors - minor stuff Missed the svn add on earlier commit, duh Warnings cleanup ... finish up earlier commit Added another test build configuration Updates from SimonQian kc8apf (21): AXM0432 layout for FDTI provided by Alan Carvalho de Assis (Freescale) Allow -expected-id to be specified multiple times when creating a jtag tap Change tap_state naming to be consistent with SVF documentation. Clean up references to old tap_state names Add JTAG tap events for enable/disable - Update tap_state_strings to correspond to SVF state names - rlink interface support from Lou Deluxe <lou...@fi...> Fix distcheck failure Fix to install manpage as part of 'make install' by Uwe Hermann <uw...@he...> Fix guess-rev.sh where the builtin echo doesn't support -n Fix handling of thumb disassembly in armv4_5 disassemble. Courtesy of Adam Dybkowski <ady...@wp...> SVF player courtesy of Simon Qian <sim...@Si...> imx21 config provided by Alan Carvalho de Assis <ac...@gm...> Fix support for ADuC702x flash. Courtesy of Michael Ashton <da...@gt...> Ignore src/svf/Makefile.in Fix 'make maintainer-clean' courtesy of Zach Welch <zw...@su...> Fixes for handling release versions Add axm0432 interface config courtesy of Alan Carvalho de Assis <ac...@gm...> AT91SAM9260 and Olimex changes by Dean Glazeski <dn...@gm...> Fix for incorrect filename in include for at91sam9260 in unknown-board-atmel-at91sam9260.cfg Add udev rules to contrib. Courtesy of Uwe Hermann <uw...@he...> mifi (73): - added patch to display device information as INFO too - Fixing two compiler warnings - added patch from Dominic to unlock the ATMEL flash in cfi_read_atmel_pri_ext git-svn-id: svn://svn.berlios.de/openocd/trunk@228 b42882b7-edfa-0310-969c-e2dbd0fdcd60 Sorry, I have forgotten to add a description for the last version, where Corrected typo (to many brackets) - added the patch CFI-BE-Fixes-Blockwrite-Support.diff - initialize num_sectors and sectors in handle_flash_bank_command. - change error message for image_open error - removed some compiler warnings The changes allows the "script" command to be used from within - added patch to corrected argument of image_open in handle_flash_write_image_command - fixed relocation problems with image loading. Relocation is handled - only some cosmetic changes, convert \r\n to unix - added patch for new flash functionality like: - this patch allows OpenOCD running under eCos to access files via tftp - corrected working_area of LPC2129 script - added gdb flash fixes patch - added patch for faster start of OpenOCD - added patch "remove error handler as planned" - added patch to fix brocken STR9 line - added patch to fix crash in load_image on corrupt elf file or out of memory. - added patch to check some malloc problems. - added autoprobe functionality - added patch to solve the reset problem with arm9 and cortex which Spen had found. - added patch to solve problem with AT91SAM9260 (dirty register) - added patch to access cp15 register (XScale) - added patch to change pathmove handling - added starting point for development on a ngw100 eval board - removed "starting point" for ngw100, will add it again if it is working - added patch to Improving progress/error output for telnet & GDB monitor - added patch to stop DEBUG messages to be forwarded to telnet/gdb. - added patch which fixed big/small endian problems on non-x86 host CPUs. - added patch to make single-stepping more resilient - added patch to solve problem with AT91SAM7SE MCU have 3, rather than just 2 GPNVM bits. - cosmetic changes to print out version without line number/time - added patch to remove count and time information from log_printf - added a test document as a starting point - added STR710 example which I used for Eclipse debug testing - added test result for str710, and test description - added str912 test example, and test result - added lpc2148 test example, and test result - added lpc2294 test example, and test result - added sam7s256 test example, and test result - added sam7x256 test example, and test result - added at91r40008 test example, and test result - updated svn:eol-style prop to native for AT91R40008 - added example for testing the JTAG speed with a FT2232 device - removed warnings "xxxxx" might be used uninitialized in this function (arm_simulator.c) - added test result for r423 - added str912/str710_program.script - added new test results - added test results - remove AC_C_VARARRAYS and set check of autoconf back to 2.59 - added testing binaries - added test results for r592 - corrected typo in cfg file - smoketest for r651 - added support for ft2232/jtag_khz - corrected rounding in ft2232_khz - added/renamed interfaces, remove jtag_speed from the interface part - added patch from uwe hermann, thanks for the hint. - added arm-usb-ocd.cfg and signalyzer.cfg to the interface - added smoketest result for r657 - replaced JLINK_xxxx command defines by EMU_CMD_ from the - removed obsolete cmd JLINK_TAP_SEQUENCE_COMMAND, use EMU_CMD_HW_JTAG instead - corrected copy/paste type and renamed jlink_usb_read_result to jlink_usb_read_emu_result - swap processing of reset handling. First srst and than trst. - comment out usb_set_altinterface, because it is not working under Mac OS X. - changed some buffer defines to increase performance - renamed EMU_CMD_HW_JTAG to EMU_CMD_HW_JTAG3 - added check for max. value of jtag_speed in ft2232_khz. - added target and event script for the eir-sam7se512 target mlu (8): Added patch for Luminar Micors Fury class devices (Joe Kroesche) - trying to remove a breakpoint with target running should not exit(-1) from OpenOCD - Support for AT91SAM7xx512 chips - Support for AT91SAM7xx512 chips - added ft2232_latency command - Fixed display of sector sizes in flash.c Updated list of LMI partnames Changed at91sam7_ecr working area to a valid SRAM adress for the AT91SAM7S/X target family ntfreak (249): - added support for ST flashlink cable - added support for Hitex comstick. -- corrected embedded ice definitions - added mingw elf patches from Vincent Palatin - str9xpec driver was using stricmp, changed to strcmp for posix compatibility - ST STM32x cortex support added - corrected stm32x_handle_options_write_command, incorrect options printed - motorola s19 file loader added - fix build issues when not using autoconf/automake to build - flash autoerase <on|off> cmd added, default is off - flash banks are calculated and erased prior to write (flash write_image only) - cleaned up str7, str9 and stm32 flash drivers - add verify_image command - corrected str91x bank1 programming issues - reset_run now works as expected on cortex-m3 - added support for Hitex STM32 Performance Stick - added patch by Ãyvind Harboe to Intel Hex Start Segment Address Record (Type 3) - removed flash write_image - binary compare function has been moved to verify_image command - fixed problem when write_image is called multiple times - minimum autoconf 2.59 is now required and verified - due to issues with AS_HELP_STRING - add support for extended gdb packet R (restart), requires gdb to be started with target extended-remote - rename flash_init and flash_erase to flash_init_drivers and flash_erase_address_range - stops conflicts with redboot. Thanks Ãyvind Harboe - added faster gdb packet handling (thanks to oyvind harboe for the patch) - _DEBUG_GDB_IO_ was left on by mistake - fix gdb packet retransmission omission - debug handler file not closed - (thanks to oyvind harboe for the patch) - add missing files from previous commit (tms470 flash driver) - add support for cortex_m3 target_request debugmsgs - updated docs for cfi command, added missing ft2232_layout names fixed incorrect elf segment size - Thanks Ãyvind Harboe Added patch to stop SEGFAULT with missing jtag config lines. Thanks Ãyvind Harboe - fixes issue with reset and arm926ejs core. Thanks Ãyvind Harboe - added synchronous reset patch, Thanks Ãyvind Harboe - added synchronous wait/resume patch. Thanks Ãyvind Harboe - add autoprobe support to the stm32 flash driver - stm32 flash driver now checks for correct target - telnet prompt behaves correctly for new synchronous halt/resume/reset commands - add autoprobe support to flash info command - added check for revA silicon in stm32 flash driver - fix programming issue with lpc2101/2 - fix xscale memory leak and warnings. Thanks Ãyvind Harboe - fix issue with telnet prompt while gdb running - cleanup and remove time() warning - solve lots of problems with stuck GDB connections, making it impossible to connect to GDB, handle timeout of acknowledgement, etc. - combine similar functions in telnet_server.c - Added a "User:" debug level. These are messages that are intended for the user and are part of normal operation. - add new non-cfi SST flash device. Thanks Ãyvind Harboe - removed a raft of unecessary exit() calls. Issuing a reset will solve these ails. - fix broken JTAG error handling - arg list now correctly released on error. Thanks Ãyvind Harboe - reapply fix with telnet prompt while running/halting gdb - Fixed bug in pathmove for XScale - add search paths via new arg -s (-search). Thanks Ted Roth - fix bug when using full paths to config files. Thanks Ted Roth - remove build warnings - code reformat (Thanks Pavel Chromy) - fix issue when target is already halted - correct line endings from previous commit - fix line-endings - added svn props - svn file props set to LF endings - update openocd.texi to fdl 1.2 - fix bug with emulated cortex_m3 dcc channel - added svn prop eol-style native - updated svn:eol-style prop to native - contrib directory added - added svn prop svn:eol-style native - added svn prop svn:eol-style native - correct spelling typo in stm32x flash driver - The elf loader incorrectly assumed that the program header always follows the ELF header. (Thanks Michael Bruck) - added more TARGET_HALTED checks for the read/write_memory handlers - add stm32 target script - 16 and 32 bit unaligned accesses supported - armv7m control register now set as dirty when switching context - changed jtag_add_reset errors to warnings - updated docs with new commands/features - gdb server was incorrectly sending null terminator on qXfer:features:read: packet - rename log functions to stop conflicts under win32 (wingdi) - added note to docs about gdb 6.8 and memory map support - add missing svn props - due to previous patch adding AC_C_VARARRAYS, autoconf v2.61 min required - single core context used, removed debug context as thought unnecessary. - added svn props for newly added parport.cfg - split str71x driver into banks - added new and missing target scripts - stm32stick and str730 - correct stm32stick config script - flash.c change stricmp to strcmp - update docs for flash write_image command - set erase flag on sector - set lpc288x[ch] svn file props - added stm32 stick and luminary eval boards interface configs - fix typo in openocd.texi - added svn props for newly added files - added svn props for newly added files - added svn props for newly added files - change str9 flash controller to read array after a level 1 protect - incorrect ram size for lm3s811 target script - luminary flash now loader polls when finished - added ARMV7_GDB_HACKS define to armv7m.h, enabling all gdb hacks to be enabled/disabled for testing - add cortex_m3 variant luminary to fix reset issue with asserting SRST - updated cortex_m3 docs regarding luminary reset behaviour - stm32x default to 128k if flash size failed. - added new device to luminary flash driver - add missing svn props - add -lusb to link for using libftdi under win32 - added info about libftdi support under win32 - updated docs for ft2232_vid_pid command - added svn props for newly added files - restored tabs and formatting - added jlink support, based on Jürgen Stuber patch - remove error message on shutdown - add support for newer high density stm32 parts - jlink jlink_execute_queue returns result - removed compiler warnings - update sectors on stm32x mass erase - added stellaris flash mass_erase command - updated docs for new stellaris mass_erase command - corrected error with stm32 page calculation - fix issue if jlink sends result in single usb in packet - fixed typo in wp command flash_write will attempt to pad image sections - moved flash erase_check target code to target.c - stellaris flash driver changed warning to info - added checksum_memory and blank_check_memory for xscale - str9 driver remove the duplicate target_free_working_area and reformat spaces to tabs. - luminary, stm32 and str7 flash driver error cleanup - fix jlink accessing incorrect buffer element - erase bank using bank erase rather than each sector - stm32 erase will use mass_erase if all banks selected - error message cleanup in jlink driver - probe incorrect for high density stm32 flash - removed duplicate cortex_m3_register_commands - added missing install entries for eir-sam7se512 target - fix compile errors when _DEBUG_INSTRUCTION_EXECUTION_ is defined - fix reset_halt issue with certain arm cores - address not set in embedded ice reg - added svn props for newly added files - update docs for new target_script events - allocate target_type_t structure for each target, fixes issue when multiple targets of the same type are located on the jtag chain - fixed line endings with commands.tcl - added jtag_khz to target scripts - added event scripts for str73x and str75x targets - added svn props for newly added files - added search for libdl - fixed build issues with win32 - fix typo in memory.tcl - fix duplicate log entry - command_run_line will only search once for the command, and execute if found - apply correct formatting to openocd.c - fix pre_resume script not being called - removed target_process_events as only used in handle_resume_command and events will be called anyway by poll - target_resume is now synchronous with 5sec timeout - only check normal resume, not debug resume - added luminary libftdi interface config - adding missing install entry for luminary-libftdi.cfg - added svn props for newly added files - configure check added for tclsh - remove requirement for file2c.tcl - fix issue when building in separate build dir - added svn props for newly added files - remove unused objcopy from configure.in - stm32 flash driver correctly handles early silicon - reverted resume_target to old behaviour - fix incorrectly registered function openocd_array2mem - remove build warning from keep_alive - updated texi for removed daemon_startup command - added svn props for newly added files - add missing quotes from CFLAGS_FOR_BUILD - fix bug with stm32 high density write protection - more fixes to high density stm32x flash driver - fix typo - fix typo in jtag_add_end_state - comment about dummy ack '+' char from gdb - merged mips target into svn trunk - added run_and_halt_time to deprecated/removed functions section - fix target_examine declaration - added svn props for previously added file - remove Jim_InitEmbedded warning - correct BUILD_ECOSBOARD definition is server.c - added svn props for newly added files - fix build issues under win32 (mingw) - added svn props for newly added files - added missing parport configs to texi - fix win32 build issues from previous jim patch - add support for new gdb QStartNoAckMode, which disables sending of ack's between remote packets - clear any existing breakpoints/watchpoints when restarting in gdb extended remote mode - added myself to copyright on files i remember adding large contributions for over the years - fix typo's - renamed x7926 driver to aduc702x to match other flash drivers - update docs for aduc702x flash driver - convert spaces to tabs in at91sam7.[ch] - at91sam7.c remove build warnings - remove build warnings - remove build warnings from mips_m4k.c and arm11.c - remove build warnings - fix tcl_port typo in docs - make docs more readable - update docs deprecated section to include links to new commands (if any) - remove texi warnings - add link in texi docs - fix native mingw build if gettimeofday not defined. - remove build warning - fix issue with jlink/libusb timeout under linux - remove build warnings - slight mips32 cleanup/reformat - fix crash when variant for mips32 target not given - correct the register hi/lo read - wrong way round - stops multiple calls to examine from allocating the breakpoint arrays - add support for hardware breakpoints to mips32 target - fox small typo in handle_irscan_command - preserve cortex_m3 C_MASKINTS during resume/step - fix issue with gdb_target_to_reg missing second byte - add new cortex_m3 maskisr cmd - correct corrupt target configs - fixes segfault using the targets cmd if multiple targets defined - stm32x flash driver: add support for low density devices - fix issue with luminary flash driver and tail bytes - change mips registers to std names - fix incorrect svn props from last commit - cleanup target config scripts - incorrect str9 irmask used in config files - str9xpec driver now working with new jtag tap config - update texi to describe str9xpec driver flow - fix illegal memory access in unregister_command function - typo with flash bank help command - added Axiom AXM-0432 to texi - incorrect url in last commit for usbjtag - check cortex_m3 FPB is enabled when setting hardware breakpoint - remove target specific variant and use target->variant member - add ability for openocd to communicate to gdb using pipes (stdin/stdout). - add missing svn props from r1243 commit - fix rlink build under native win32 (mingw) - add missing svn props from r1270 commit - fix missing/incorrect svn file props - add gdb pipe support to native win32 (--pipe option) - add missing svn props from r1299 commit - minor doc updates regarding tap creation and gdb connection using pipes - a few more docs tweaks Updates and fixes for the manpage from Uwe Hermann - added mips software breakpoint support - fix mips issues with newer versions of gdb - fix LDFLAGS typo in configure.in - add missing svn props and fix incorrect line endings from last commit - add missing svn props from 1323 commit - add missing bitq and rlink files to distribution - add guess-rev.sh and contrib/libdcc to dist - make guess-rev.sh work with msys - revert guess-rev.sh to using bash - remove unused includes, fixes build issues under FreeBSD - add --enable-release to docs - fix issue with configure when building srcdir != builddir oharboe (672): - added time command cosmetic fixes to debug output + phasing out printf() in favour of logging system. From Pavel Chromy <ch...@as...> added svn:ignore for files generated by bootstrap + build process. sharpend JTAG docs w.r.t. hw fifo implementations and retired jtag_cancel_queue() which is inheritely incompatible with a hw fifo concept. debug_level 3 now prints seconds since start of openocd disable cfi_write_words(). Broken for spansion, fallback - fixed target->type->poll() return value - added -c option that will execute an openocd command move options handling to separate file to better support embedded implementations of OpenOCD - added "xscale fast_memory_access" which speeds up memory Michael Bruck spotted an omission in svn 322 - "flash write_binary" is now "flash write_bank" to clarify the focus of the - using ERROR_COMMAND_SYNTAX_ERROR to print syntax in a couple of places dos2unix fix. committed bugfix from Michael Bruck From Michael Bruck - Fix target library path problem w/Windows Fix from Pavel Chromy. Pavel Chromy style fixes. formatting. Pavel Chromy - jtag minidriver work in progress Next step in the JTAG minidriver. This should be fairly close to the final thing, but jtag_add_reset() minidriver gaffe fixed. oopss.. another jtag minidriver reset gaffe. fix naming conflict under Windows. Nicolas Pitre listed some more devices. Uwe Hermann fixed some warnings. Uwe Hermann Add @dircategory and @direntry to the info page -- they're used to add the openocd info page to the global index of info pages in the system (usually /usr/share/info/dir). - Added TARGET_REQ_DEBUGCHAR target_request debugmsg. This eCos flash driver. lingering change for eCos flash driver jtag_add_shift() fn - minidriver work in progress. fix copyright. added some code that will be used in upcoming minidriver work. code to be used in upcoming minidriver work. fix from Pavel Chromy Pavel Chromy cleaned up checks for halted, error messages, etc. fix gaffe. Pavel Chromy - cleanup error messages small line ending cleanup. numerous fixes from Uwe Hermann Uwe Hermann: Simplify the manpage by removing lots of redundant information which is Pavel Chromy spotted a leak Pavel Chromy spotted duplicated newlines gaffe from yours sincerely. fixed newline gaffe in OUTPUT() changed to eCos license. Michael Bruck: Michael Bruck: Summary: passing of variable argument list reduced, strings sent to logging are now formatted just once - more efficient. Pavel Chromy: clarify error messages do not write single chars to log file. - clean up target output strings a bit - image.c and fileio.c now uses logging to propagate error strings. remove warnings. formatting fixes from Pavel Chromy lingering patch from Pavel Chromy. Uwe Hermann: mproves the manpage text a bit and adds the Pavel Chromy: add missing newlines. Uwe Hermann: Uwe Hermann: Updated version which applies cleanly after the recent whitespace fixes. Pavel Chromy fix: the guess-rev.sh scripts to retrieve SVN revision returns the result including new line Uwe Hermann: Add a --version switch for openocd. Tweaked logging output. fixed stack corruption. Introduced when _check_value was phased out. added an #error in case anybody tries to compile that broken code. error handling fix. wip. fixed gaffe in jtag_add_shift() log_remove_callback Now uses jtag_add_shift() via embeddedice_write_reg_inner(). improve DCC bulk write performance by using jtag_add_shift() + tweaked embedded ICE communication. backed out jtag_add_shift() fix memory corruption regression introduced in 335 wrote up explaining why tests are done on committed code. wrote up explaining why tests are done on committed code. target scripts for test suite. fixed FSF address. Uwe Hermann. Uwe Hermann tightned up comments, etc. to follow OpenOCD policy some comments from Dominic added at91sam9260.cfg, nslu2.cfg, pxa255.cfg, pxa255_sst.cfg added fill_malloc test. Not quite sure what to do here yet, but it would be good to have something... I fixed all the targets even though Michael Bruck: Michael Bruck: fix warnings. Michael Bruck - fix warnings. Fixed GDB timeout crash - regression introduced back when log_add/remove_callback was added. Bogus error message in GDB removed telnet_port can now be invoked multiple times * fixed malloc corruption in target->debug_reason Pavel Chromy: memory leak in at91sam7 flash driver, possible incorrect pointer conversion in gpnvm command handling, added jtag_add_dr_out(). Better for hw fifo, same for software fifo. - This speeds up dcc arm7_9 bulk write a little bit and exercises the jtag_add_dr_out() codepath warnings & comments fixes. make debug code w.r.t. incorrect args for bypass stricter. Michael Bruck: 64 bit va_list fix for crash Michael Bruck: Pavel Chromy: performance tweak of gdb_put_packet_inner() removing malloc and avoiding memcpy of larger blocks of data, Pavel Chromy: faster alloc_printf() comment. tms is never referenced, confusing old code left behind probably. use jtag_execute_queue() instead of jtag->execute_queue() retired Pavel Chromy: va_copy should always be paired with va_end. Cosmetic fixes from Uwe Hermann removed excessive debug output. Perhaps a debug_level 4 should be introduced? Hopefully it can be avoided as this was the only case where debug output was going through the roof. Removed code that inserted prompt after printing asynchronous information. Current implementation was broken beyond repair. wi-9c target scripts alloc_printf and alloc_vprintf Pavel Chromy, the patch fixes an issue with PRESTO & FTD2XX under Linux. minor corrections for target scripts. Added some timeout handling to XScale so OpenOCD doesn't get Edgar Grimberg, fix arm926ejs_examine_debug_reason return value. Michael Bruck: fixed warnings Asynchronous output information from e.g. a halt is now displayed again. - Improves error handling upon GDB connect typo. Michael Bruck: fix warning added stm32.cfg to install list - LOG_SILENT can be used to silence the log(needed in upcoming patches) - Fixed various error handling when looking for memory leaks - the jtag chain is examined and validated after GDB & telnet servers - fixed a problem with big endian XScale and GDB register packets. prettier async output Pavel Chromy: the attached patch refines PRESTO support and makes it work with libftdi. Pavel Chromy: hopefully perfection for async output and prompt/partially typed command line handling. more target scripts wip. more target scripts wip. backed out changes from 483. Pavel Chromy: telnet line buffer size checking, history does not store repeating lines, improved history printing, log callback tweak - fixed jtag_add_reset(). It no longer causes jtag_execute_queue() to JTAG_END_STATE is now retired. It is no longer queued. retire unused code. - retired unused jtag events. The code was incorrect tidy up output a bit. No longer show "accepted connection" inside Telnet session. With the recent changes the TRST needs to happen for every reset. reduce compare noise. If someone should be crazy enough to try to run OpenOCD under eCos, then they'v got some hooks to point them in the general direction. tinkered a bit with testing matrix. Corrections from Dominic more info about latest working version fixed regression in XScale introduce in 297 This moves common code into functions so as to make it clear The bitbang driver leaves the TCK 0 when in idle xscale now passes w/bitbang in 505 Dominic undid some of my damage. CLK should now be set as intended in all cases. marked infinite loop in code w/TODO and fixed warning. XScale excessive waiting fix. print ms in debug_level 3 logs. Seconds is not enough. - adds two speeds to jtag_speed. reset and post reset speed. Default added jtag_khz for use with target library clarified jtag_khz command. Michael Bruck: fixed warnings reset and post reset speed & jtag_khz command documented. added profile command. It was added to simplify evaluation by testers. hooks for multithreading. Disable nagle TAP_SD/SI are now forbidden end states. Edgar Grimberg: added needed delays make jtag_add_statemove() internal to the driver. Removed exit()'s. A reset is usually enough to work around these, reducing cycle times target_call_timer_callbacks_now() now invokes periodic callbacks immediately Do not assert trst in srst_only case even if srst_pulls_trst. - fixes for jtag_khz committed. optional count argument to mwX Added timeout(instead of infinite loop) to soft_reset_halt fix flash info - now reports erased state properly Edgar Grimberg sharpened the str912 target script. - Work on fixing erase check. Many implementations are plain broken. added query of reset speed - reverted some of the changes that possibly broke arm926ejs. Waiting - the reset mode parameter is now DEPRECATED. It is implemented avoid patch trouble by isolating troublesome line... at91eb40a.elf moved to src/target/ecos - only if "reset halt" or "reset init" are issued will the reset vector be set up Spen fixed various issues w.r.t. setting up the sockets for optimal performance. The endstate now reports the endstate of the queue instead of Pavel pointed out that jtag_add_tlr() is better than jtag_add_tms(). added a couple of LOG_ERROR() messages to improve logfile. lm3s6965.cfg contributed by Edwin Olson Edwin Olson found bug & tested fix for flash write_image for stellaris. use jtag.c's cur/end_state global variables. - added "init" command. "init" and "reset" at end of startup script is equivalent Don Porges fixed c99 issues. back out Don Porges workaround for some device with manufcaturer # 0x1a2 target lib wip stop using variable sized arrays. That's something that belongs to C++ and not C. Improved XScale performance for embedded hosted OpenOCD added target->type->examine(). Eventually this will allow for bringing up telnet/gdb *before* jtag chain has been validated + it might fix some reset halt problems seen as examine() needs to run after TRST has been asserted. Wip - split target setup and target examination Reset wip. Just adding hooks. This is just to reduce the size of the actual change, no change in behaviour. Reset wip. Just adding hooks. This is just to reduce the size of the actual change, no change in behaviour. fixed gaffe for default examine implementation found two more gaffes for reset wip - Set up ICE registers after TRST allows launching OpenOCD w/telnet+gdb server w/the allows launching OpenOCD w/telnet+gdb server w/the A dummy driver to test codepath w/no contact w/target. More robust handling of unknown target state for step/continue packet. TRST is asserted *before* target->type->assert_reset() is invoked. Removed old code. Added a few tweaks while playing with texi. moved out stuff that wasn't already moved from openocd.pdf to the target library. retired fast_memory_access. It's always fast now. target read/write is no longer attempted for target_xxx() functions when the target has not been examined(fails w/error). Added checks for target->type->read/write_memory, soft_reset_halt and run_algorithm that the target has been examined. - sw_bkpts fails if the target is not halted. The side effect is fix SEGFAULT regression in cortex after TRST fixes Edgar Grimberg added some missing scripts from the install Update Embedded ICE registers explicitly during target->type->examine() instead fix for gaffe in 555 that stopped JTAG chain examine + validate from running. Edwin Olsen: improves breakpoint handling on cortex-m3 parts. Specifically, this patch allows expressions to be evaluated in GDB that contain function calls. Nicolas Pitre fixed regression. Enabled auto erase, gdb memory map and gdb flash programming by default. retired auto_erase, added optional erase arg to flash write_image. Karl RobinSod <kar...@gm...> added lpc288x support. Some work remaining, committing for test/collaboration purposes. deleted obsolete stuff. wip on reporting bugs. Andre Renaud support for the am29sl800db CFI flash chip (id: 0x0004, 0x226b). added fast option. fixed doc for GDB memory map and flash program defaults to follow code Tim Hudson: removed setting jtag_speed directly (which should not be done). regions outside flash are now read/write nocache by default. GDB 6.8 would mark non-flash areas as inacessible by default. Tim Hudson contributed at91sam9260 target config files + some interface definitions. Pavel Chromy's on chip flash loader Edgar's new test cases. Edgar's new test cases. Close dangling file handle make debug_level 3 useful again... the log just drowns. perhaps introduce debug_level 4? wip instructions for building Cortex toolchain set communication speeds Edgar Grimberg added a new rule for target scripts. Flash + verify must succeed. Edgar's added support for printing jtag_khz Edgar's naming convention fixes. lpc2148 fixes from Edgar Grimberg now compiles again. Tim Hudson worked on English language. add missing reset script The target library is now the authorotative source of config examples Edgar Grimberg found tiny memory leak increase packet size to 16kBytes. Very slightly faster. Edgar Grimberg plugged a leak found w/Valgrind. This matters for embedded devices, but is probably not observably better for PC hosted OpenOCD. print available memory in log_level 3 disable code that prints available mem under windows. Does not compile. Michael Fischer spotted a problem in the reset routines for srst_pulls_trst. It is a bit of a mystery why this was only visible w/LPC2148. printing available memory fails on win + mac. Disable for now until a robust way of doing this can be found. added stack trace. updated guidelines. Michael Fischer found and Edgar Grimberg fixed generic crash in timers reproduceable with at91fr40008 fix mode output when illegal arm mode is detected. Now prints illegal mode for index -1. Michael Fischer found this bogus warning. Fixed. print out an error if srst_pulls_trst is not specified for Fix crash when mode number fetched from the target is invalid. reverted change in 658 and simply removed the busted warning for now. Edgar Grimberg fixes some memory handling issues and moved srst_pulls_trst check into arm7_9_common.c. Not tested yet, if it is broken it should "only" print bogus warnings or not print a warning when it should have. comment. jtag_exexcute_queue() now logs error when it is invoked before 'init' command. clock 1/0 in idle now configurable. found out why str912 reset halt failed. Fredrik Hederstierna: fix leak + clean up return codes Fredrik Hederstierna: fix leak + clean up return codes Pavel Chromy: fix logging syntax error + formatting & removing obsolete comments. Pavel Chromy: TCK returns to zero before state of reset line is changed. Nicolas Pitre: Feroceon fixes GDB timeout fix. If a script takes a long time and does not produce any output, ping between every command. fallback for no implementation of multi word CFI write. Successful codepath not affected. Spen spotted a bug in warning for missing srst_pulls_trst Pavel Chromy: TAP state changed to TLR when SRST goes active with srst_pulls_trst, as in all other drivers Pavel Chromy: Pavel Chromy: added pre/post_reset scripts based on Pieter Conradie's ideas. Fixed bogus error message and plugged memory leak for the case when there was no reset script. David Anders: fixes an issue with large block nand flash address where the beginning of the OOB area is always selected instead of the beginning of a page when needed committing to reduce patch size for Tcl experiments. Not in use currently. David Anders more target lib scripts contributed by export find_file function hooks to enable experimentation with scripting language support. Reduces patch size, but has no effect on OpenOCD otherwise. wip wip. Jim Tcl support added Valentin Longchamp target script for mx31.cfg ARM11 update. OpenOCD supports starting without being able to talk to the hardware. utility fn. added support for Tcl config scripts on the command line(use .tcl extension). tcl config script example typo added echo command in tcl. Issues a LOG_USER() for the single argument. fix to peek command. tcl tinkering. src/helper/configuration.h Oopss. Forgot to list Duane Ellis <op...@du...> as the author of changes in 755. Charles Hardin <ckh...@gm...> - Tcl Server fix a few compilation problems. moving Tcl stuff around slightly. Charles Hardin <ckh...@gm...> Tcl server documentation. fix syntax error. added pre/postlude fn's for when OpenOCD is sleeping. Duane Ellis <op...@du...>: This simple patch adds precision support to JIM's format command. more tcl cleanup. reset event is synonym for post_reset event. * src/jim.c: remove bogus return value from if {[expr]} {xx} when tcl regression fixes. added flash_banks low level command. "flash banks" is now implemented in Tcl on top of "flash_banks". openocd_throw prefix is no longer required when executing OpenOCD commands from tcl. improve error messages a little bit. very slight cleanup of flash banks handling. SEGFAULT fix for syntax error. fix quoting problem when handling OpenOCD commands. - added search paths before running tcl/commands.tcl. Charles Hardin <ckh...@gm...> startup.tcl (former commands.tcl) is now embedded into OpenOCD executable. working notes. .cfg files are now executed as Jim Tcl. Commands that terminate script w/error message. - retired variable stuff. work in progress to improve help tcl_help prettier output. Charles Hardin ckhardin at gmail.com search help text too help is now implemented in startup.tcl/help testing/*.tcl sample & test code testing/*.tcl sample & test code Duane Ellis <op...@du...> fix to tcl puts Charles Hardin <ckh...@gm...> - hopefully final word on startup.tcl => c conversion Charles Hardin <ckh...@gm...> feeble beginnings for tcl api rules. better error messages for target event scripts. print syntax for command upon syntax error. do not print jim tcl error message trace for ERROR_COMMAND_CLOSE_CONNECTION print out jim error message stack trace in expected order(look at any C++ or Java debugger for instance). flash_banks now follow OpenOCD scripting API rules Fixes to \ and / handling for OpenOCD Charles Hardin ckhardin at gmail.com bin2char does not need to be installed as part of openocd Charles Hardin <ckh...@gm...> and Ãyvind Harboe Charles Hardin ckhardin at gmail.com Collect output from openocd commands into openocd_output local variable Charles Hardin ckhardin at gmail.com Instead of stashing the context in a global variable, just use the "context" Charles Hardin <ckh...@gm...> move jim into helper added missing "reset+load" sequence. Charles Hardin <ckh...@gm...> move tcl stuff nearer to where it belongs. Duane Ellis <op...@du...> more interface files. 1. GDB will print cryptic error messages if it is not fed keep-alive packets keep_alive() fix for reset warnings. resume is now asynchronous "reset" without arguments now execute a "reset run". remove obsolete reset_mode This allows overriding builtin openocd commands. daemon_startup is now retired in favour of adding "init" and "reset halt/init/run" to the end of the config file/openocd command line. clarify error message w.r.t. not being able to set breakpoint throw exception upon syntax error. op...@du... fix naming confusion. Use ocd_ prefix for ocd API consistently. Duane Ellis <op...@du...> Ben Bodley <be...@te...> non-CFI compliant flash (AMIC A29L800A) Duane Ellis <op...@du...> - script commands for stm32 BUG: prefix to timeout for gdb keep alive packets. Michael Kurz <mic...@go...> MX29LV800B non-cfi flash. Duane Ellis <op...@du...> stm32 peripherals scripts use reset init explicitly before "load". cross compile fix - jtag_khz/speed are now single parameter only. These are used update jtag_speed/khz docs a bit. jim license cleanup Allows config scripts to override handling of 'R'(restart) GDB packet. restart is a per-target action very slightly improved error message for not being able to find scripts Only print out gobs of information to log when -d3 is enabled. Spen: startup.tcl cross compile support handle end of line comments to improve compatibility with event scripts fix <memory> is missing upon gdb connect warning when no flash is defined for target. wait 500ms for target to halt upon connect. Better handling of OpenOCD command invocation result/context. allow jtag minidriver access to cmd_queue_cur_state for jtag_add_pathmove() retire daemon_startup take path to eCos files from environment variable more error message cleanup. invalid args & syntax errors both now print arguments of command. OpenOCD commands w/prefix ocd_ now set the primary Tcl return value instead of messing with ocd_output local variable. Much more straightforward and expected behaviour. The side effect is that the ocd_xxx commands will print output twice(once immediately and once upon completion of command). This is a strange, expected and intentional behaviour. added yours sincerely for files where I feel that I've made non-trivial contributions. minimum address and maximum length argument to load_image. Used in lieu of reset init script when executable w/reset init sequence is available. add check for target_read/write_buffer 32 bit wrap. working notes. retired reset run_and_init/halt fixed gaffe mea culpa allow minidrivers to implement inner loop of dcc memory writes more jtag_examine() checks. catch errors during first 640 bits. warning output upon connection problems. wip - committing to reduce patch size. wait up to 1 second for halted state upon reset init/halt. The reset routine now works w/LPC2148 out of the box. TAP_TLR won't work in a pathmove sequence. OpenOCD shouldn't and doesn't need to support this. moves handling of problems with resetting into the halted state define resetting the target into the halted or running halting srst_pulls_trst targets is now snappier and has explicit warning. Duane Ellis: fix warnings gaffe in previous commit fixed. "reset run" now works again for arm7/9 GDB monitor commands now also get halted state upon e.g. "reset halt". lpc2148 2MHz, RCLK and clockless config script versions David Kuehling <dvd...@gm...> - added jim-eventloop.c default reset in help text - run Michael Schwingen <rin...@di...> - add jedec_probe to doc place event loop inside #ifdef JIM_EMBEDDED. fix error message fix error output a bit: do not repeat output printed during execution in case of error. propagate error code in case of "reset" failing. updated syntax for post_reset scripts fix output from jtag_khz when only jtag_speed has been invoked avoid empty lines in log as a keep_alive() sideffect return halted signal if step/continue fails fix warning. Clear all dangling breakpoints upon GDB connection. comments. added global gdb breakpoint override configuration command gdb_breakpoint_override comments force lpc2148 target into ARM state. removed old comment documentation wip for upcoming patch. typo spotted by spen. gdb_breakpoint_override not tested yet. arm7/9 breakpoint cleanup. arm7_9 sw/hw commands retired. openocd.texi is alerady updated. feroceon updated w.r.t. latest arm7/9 changes removed obsolete command. Richard <ne...@mu...> fixed bug in padding code deleted superfluous sam7s256 which was identical to sam7x256 fixed not halted error messages openocd.texi is the authoratitive source for documentation. Wiki is dead. added error handling to avoid false error messages. more error propagation Johannes Stezenbach <js...@si...> fix warnings Daniel Gimpelevich <da...@gi...> one more parport device added wip imx31.cfg file removed a couple of exit()'s from error handling. fixed error handling in flash bank. fix comment w.r.t. start address for RAM tinker with Xscale performance. Poll a bit more before sleeping. duane ellis: (A) a new concept called "Name Value Pair" or NVP, in simple terms: Think: "String" and "Value". There can be many strings - all related to a single value, for examle: "T", "t", "y", "1", "yes", all can represent "truth", the reverse mapping is more simplistic - the first matching number wins. tinker with Xscale performance, anti-log spamming is now only for debug_level 3 or more. Otherwise polling is done continously for 1 second. added alive_sleep() function to let GDB alive packets be sent use alive_sleep() from sleep command added some alive_sleep()'s DANGER: committed work-in-progress to handle examination of jtag devices without IDCODE. I think this works, but I may have to pull that change out again... search and replace usleep(1000) with alive_sleep(1) to avoid GDB timeouts. better polling debug_level 3 handling make target_wait_state() usable from other places, made LOG_USER() output LOG_DEBUG() output. Avoids flooding logs in certain cases and OpenOCD will output error message if the halt fails. switch to alive_sleep() to avoid gdb timeouts fixed warning duane ellis: fix warning fix BUG: keep_alive() error messages Daniel Gimpelevich fix reset halt on feroceon sharpen error propagation a wee bit. continue execution even if chain can't be validated. This will, hopefully, give us some more feedback on what's wrong. lm3s3748 config file lm3s3748 config file added gdb timeout handling + error propagation Daniel Gimpelevich <da...@gi...> fix end of address space flash sector comparision duan ellis target tcl work in progress duane ellis - errno ansi fix sync with Jim Tcl repository. fixed gaffe in last release w/target number. fixed bug in arm11 examine code. STR912 uses RCLK if available RCLK is not supported, return error instead of crashing. do not check checksums in noack case ... [truncated message content] |
From: David B. <dbr...@us...> - 2009-11-06 07:13:45
|
This is an automated email from the git hooks/post-receive script. It was generated because a ref change was pushed to the repository containing the project "Main OpenOCD repository". The branch, master has been updated via 6a0af06bd9f66780d2c3e9f69c40f2b89ad90605 (commit) via 03ac53a2cfdb7d0715f7060cecf8719068f6fae1 (commit) via a81df55f393478cdef9197c248a1b64d26465589 (commit) via fec3c4763ad4cf2996fa138c4fd0f555e32e5e9f (commit) via 11fe2ec62e30e4b580ace6821ac4293ed91d53f1 (commit) via 6cf956fa9d0d0a0eddaf0c8878f25c549c005c62 (commit) via 178c7580960b4d84fe83ef579250fba1d6ac4f2d (commit) via 865ed6ed819888910f198f0584cc1b78d1e6e363 (commit) via 1fcb351de6912148aa3ef567aa2de2c74e3b05f3 (commit) via 6e08573efd78b8f38fbe05f4feee2615a90fa41c (commit) via 9be533566ea077c32bf57eb0441c8a4ae2a7c9cc (commit) via da739aa25733b5a252a2b0b8ad76a3dc886f1132 (commit) via db116b1ea3c77a3c5850fccbce9e0795faa21dda (commit) from b7e4c26b9bb10e6e0ebfb07e5d43f0d62526cde2 (commit) Those revisions listed above that are new to this repository have not appeared on any other notification email; so we list those revisions in full, below. - Log ----------------------------------------------------------------- commit 6a0af06bd9f66780d2c3e9f69c40f2b89ad90605 Author: David Brownell <dbr...@us...> Date: Thu Nov 5 22:04:25 2009 -0800 ARM: shrink offsets Move various embedded target structs to the beginnings of their containers ... pretty much the way C++ or Obj-C would for single inheritance. This shrinks code that accesses those embedded structs by letting common offsets use smaller instructions. Sample before/after sizes (on amd64): 17181 312 0 17493 4455 arm920t.o 16810 312 0 17122 42e2 arm920t.o Where the "after" is the smaller number, with this patch over the ones leveraging that embedding knowledge. Signed-off-by: David Brownell <dbr...@us...> diff --git a/src/target/arm720t.h b/src/target/arm720t.h index 0689e44..c10cbe1 100644 --- a/src/target/arm720t.h +++ b/src/target/arm720t.h @@ -27,9 +27,9 @@ typedef struct arm720t_common_s { + arm7tdmi_common_t arm7tdmi_common; uint32_t common_magic; armv4_5_mmu_common_t armv4_5_mmu; - arm7tdmi_common_t arm7tdmi_common; uint32_t cp15_control_reg; uint32_t fsr_reg; uint32_t far_reg; diff --git a/src/target/arm7_9_common.h b/src/target/arm7_9_common.h index 9eafc1d..9c42b6b 100644 --- a/src/target/arm7_9_common.h +++ b/src/target/arm7_9_common.h @@ -39,6 +39,7 @@ */ typedef struct arm7_9_common_s { + armv4_5_common_t armv4_5_common; uint32_t common_magic; arm_jtag_t jtag_info; /**< JTAG information for target */ @@ -107,7 +108,6 @@ typedef struct arm7_9_common_s void (*pre_restore_context)(target_t *target); /**< Callback function called before restoring the processor context */ void (*post_restore_context)(target_t *target); /**< Callback function called after restoring the processor context */ - armv4_5_common_t armv4_5_common; } arm7_9_common_t; diff --git a/src/target/arm920t.h b/src/target/arm920t.h index eb66eaa..af0f982 100644 --- a/src/target/arm920t.h +++ b/src/target/arm920t.h @@ -27,9 +27,9 @@ typedef struct arm920t_common_s { + arm9tdmi_common_t arm9tdmi_common; uint32_t common_magic; armv4_5_mmu_common_t armv4_5_mmu; - arm9tdmi_common_t arm9tdmi_common; uint32_t cp15_control_reg; uint32_t d_fsr; uint32_t i_fsr; diff --git a/src/target/arm926ejs.h b/src/target/arm926ejs.h index ff811e3..01e3c09 100644 --- a/src/target/arm926ejs.h +++ b/src/target/arm926ejs.h @@ -27,9 +27,9 @@ typedef struct arm926ejs_common_s { + arm9tdmi_common_t arm9tdmi_common; uint32_t common_magic; armv4_5_mmu_common_t armv4_5_mmu; - arm9tdmi_common_t arm9tdmi_common; int (*read_cp15)(target_t *target, uint32_t op1, uint32_t op2, uint32_t CRn, uint32_t CRm, uint32_t *value); int (*write_cp15)(target_t *target, uint32_t op1, uint32_t op2, uint32_t CRn, uint32_t CRm, uint32_t value); uint32_t cp15_control_reg; diff --git a/src/target/arm966e.h b/src/target/arm966e.h index 710f207..e8346f9 100644 --- a/src/target/arm966e.h +++ b/src/target/arm966e.h @@ -29,8 +29,8 @@ typedef struct arm966e_common_s { - int common_magic; arm9tdmi_common_t arm9tdmi_common; + int common_magic; uint32_t cp15_control_reg; } arm966e_common_t; diff --git a/src/target/xscale.h b/src/target/xscale.h index 56db181..433ecfc 100644 --- a/src/target/xscale.h +++ b/src/target/xscale.h @@ -80,6 +80,9 @@ typedef struct xscale_trace_s typedef struct xscale_common_s { + /* armv4/5 common stuff */ + armv4_5_common_t armv4_5_common; + int common_magic; /* XScale registers (CP15, DBG) */ @@ -121,9 +124,6 @@ typedef struct xscale_common_s int arch_debug_reason; - /* armv4/5 common stuff */ - armv4_5_common_t armv4_5_common; - /* MMU/Caches */ armv4_5_mmu_common_t armv4_5_mmu; uint32_t cp15_control_reg; commit 03ac53a2cfdb7d0715f7060cecf8719068f6fae1 Author: David Brownell <dbr...@us...> Date: Thu Nov 5 22:04:22 2009 -0800 ARM: other code uses the new inheritance/nesting scheme Remove most remaining uses of target->arch_info from ARM infrastructure, where it hasn't already been updated. Signed-off-by: David Brownell <dbr...@us...> diff --git a/src/target/arm7_9_common.c b/src/target/arm7_9_common.c index 21c5c7a..2a0aefc 100644 --- a/src/target/arm7_9_common.c +++ b/src/target/arm7_9_common.c @@ -172,8 +172,7 @@ static int arm7_9_set_software_breakpoints(arm7_9_common_t *arm7_9) */ int arm7_9_setup(target_t *target) { - armv4_5_common_t *armv4_5 = target->arch_info; - arm7_9_common_t *arm7_9 = armv4_5->arch_info; + struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target); return arm7_9_clear_watchpoints(arm7_9); } @@ -192,18 +191,18 @@ int arm7_9_setup(target_t *target) */ int arm7_9_get_arch_pointers(target_t *target, armv4_5_common_t **armv4_5_p, arm7_9_common_t **arm7_9_p) { - armv4_5_common_t *armv4_5 = target->arch_info; - arm7_9_common_t *arm7_9 = armv4_5->arch_info; + struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target); + struct armv4_5_common_s *armv4_5 = &arm7_9->armv4_5_common; + /* FIXME stop using this routine; just target_to_arm7_9() and + * verify the resulting pointer using a replacement routine + * that emits a usage message. + */ if (armv4_5->common_magic != ARMV4_5_COMMON_MAGIC) - { - return -1; - } + return ERROR_TARGET_INVALID; if (arm7_9->common_magic != ARM7_9_COMMON_MAGIC) - { - return -1; - } + return ERROR_TARGET_INVALID; *armv4_5_p = armv4_5; *arm7_9_p = arm7_9; @@ -224,8 +223,7 @@ int arm7_9_get_arch_pointers(target_t *target, armv4_5_common_t **armv4_5_p, arm */ int arm7_9_set_breakpoint(struct target_s *target, breakpoint_t *breakpoint) { - armv4_5_common_t *armv4_5 = target->arch_info; - arm7_9_common_t *arm7_9 = armv4_5->arch_info; + struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target); int retval = ERROR_OK; LOG_DEBUG("BPID: %d, Address: 0x%08" PRIx32 ", Type: %d" , @@ -355,9 +353,7 @@ int arm7_9_set_breakpoint(struct target_s *target, breakpoint_t *breakpoint) int arm7_9_unset_breakpoint(struct target_s *target, breakpoint_t *breakpoint) { int retval = ERROR_OK; - - armv4_5_common_t *armv4_5 = target->arch_info; - arm7_9_common_t *arm7_9 = armv4_5->arch_info; + struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target); LOG_DEBUG("BPID: %d, Address: 0x%08" PRIx32, breakpoint->unique_id, @@ -451,8 +447,7 @@ int arm7_9_unset_breakpoint(struct target_s *target, breakpoint_t *breakpoint) */ int arm7_9_add_breakpoint(struct target_s *target, breakpoint_t *breakpoint) { - armv4_5_common_t *armv4_5 = target->arch_info; - arm7_9_common_t *arm7_9 = armv4_5->arch_info; + struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target); if (target->state != TARGET_HALTED) { @@ -503,8 +498,7 @@ int arm7_9_add_breakpoint(struct target_s *target, breakpoint_t *breakpoint) int arm7_9_remove_breakpoint(struct target_s *target, breakpoint_t *breakpoint) { int retval = ERROR_OK; - armv4_5_common_t *armv4_5 = target->arch_info; - arm7_9_common_t *arm7_9 = armv4_5->arch_info; + struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target); if ((retval = arm7_9_unset_breakpoint(target, breakpoint)) != ERROR_OK) { @@ -540,8 +534,7 @@ int arm7_9_remove_breakpoint(struct target_s *target, breakpoint_t *breakpoint) int arm7_9_set_watchpoint(struct target_s *target, watchpoint_t *watchpoint) { int retval = ERROR_OK; - armv4_5_common_t *armv4_5 = target->arch_info; - arm7_9_common_t *arm7_9 = armv4_5->arch_info; + struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target); int rw_mask = 1; uint32_t mask; @@ -612,8 +605,7 @@ int arm7_9_set_watchpoint(struct target_s *target, watchpoint_t *watchpoint) int arm7_9_unset_watchpoint(struct target_s *target, watchpoint_t *watchpoint) { int retval = ERROR_OK; - armv4_5_common_t *armv4_5 = target->arch_info; - arm7_9_common_t *arm7_9 = armv4_5->arch_info; + struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target); if (target->state != TARGET_HALTED) { @@ -660,8 +652,7 @@ int arm7_9_unset_watchpoint(struct target_s *target, watchpoint_t *watchpoint) */ int arm7_9_add_watchpoint(struct target_s *target, watchpoint_t *watchpoint) { - armv4_5_common_t *armv4_5 = target->arch_info; - arm7_9_common_t *arm7_9 = armv4_5->arch_info; + struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target); if (target->state != TARGET_HALTED) { @@ -695,8 +686,7 @@ int arm7_9_add_watchpoint(struct target_s *target, watchpoint_t *watchpoint) int arm7_9_remove_watchpoint(struct target_s *target, watchpoint_t *watchpoint) { int retval = ERROR_OK; - armv4_5_common_t *armv4_5 = target->arch_info; - arm7_9_common_t *arm7_9 = armv4_5->arch_info; + struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target); if (watchpoint->set) { @@ -723,9 +713,7 @@ int arm7_9_remove_watchpoint(struct target_s *target, watchpoint_t *watchpoint) int arm7_9_execute_sys_speed(struct target_s *target) { int retval; - - armv4_5_common_t *armv4_5 = target->arch_info; - arm7_9_common_t *arm7_9 = armv4_5->arch_info; + struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target); arm_jtag_t *jtag_info = &arm7_9->jtag_info; reg_t *dbg_stat = &arm7_9->eice_cache->reg_list[EICE_DBG_STAT]; @@ -778,8 +766,7 @@ int arm7_9_execute_fast_sys_speed(struct target_s *target) static int set = 0; static uint8_t check_value[4], check_mask[4]; - armv4_5_common_t *armv4_5 = target->arch_info; - arm7_9_common_t *arm7_9 = armv4_5->arch_info; + struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target); arm_jtag_t *jtag_info = &arm7_9->jtag_info; reg_t *dbg_stat = &arm7_9->eice_cache->reg_list[EICE_DBG_STAT]; @@ -820,8 +807,7 @@ int arm7_9_execute_fast_sys_speed(struct target_s *target) */ int arm7_9_target_request_data(target_t *target, uint32_t size, uint8_t *buffer) { - armv4_5_common_t *armv4_5 = target->arch_info; - arm7_9_common_t *arm7_9 = armv4_5->arch_info; + struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target); arm_jtag_t *jtag_info = &arm7_9->jtag_info; uint32_t *data; int retval = ERROR_OK; @@ -857,8 +843,7 @@ int arm7_9_handle_target_request(void *priv) target_t *target = priv; if (!target_was_examined(target)) return ERROR_OK; - armv4_5_common_t *armv4_5 = target->arch_info; - arm7_9_common_t *arm7_9 = armv4_5->arch_info; + struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target); arm_jtag_t *jtag_info = &arm7_9->jtag_info; reg_t *dcc_control = &arm7_9->eice_cache->reg_list[EICE_COMMS_CTRL]; @@ -916,8 +901,7 @@ int arm7_9_handle_target_request(void *priv) int arm7_9_poll(target_t *target) { int retval; - armv4_5_common_t *armv4_5 = target->arch_info; - arm7_9_common_t *arm7_9 = armv4_5->arch_info; + struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target); reg_t *dbg_stat = &arm7_9->eice_cache->reg_list[EICE_DBG_STAT]; /* read debug status register */ @@ -1009,8 +993,8 @@ int arm7_9_poll(target_t *target) */ int arm7_9_assert_reset(target_t *target) { - armv4_5_common_t *armv4_5 = target->arch_info; - arm7_9_common_t *arm7_9 = armv4_5->arch_info; + struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target); + LOG_DEBUG("target->state: %s", target_state_name(target)); @@ -1141,8 +1125,7 @@ int arm7_9_deassert_reset(target_t *target) */ int arm7_9_clear_halt(target_t *target) { - armv4_5_common_t *armv4_5 = target->arch_info; - arm7_9_common_t *arm7_9 = armv4_5->arch_info; + struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target); reg_t *dbg_ctrl = &arm7_9->eice_cache->reg_list[EICE_DBG_CTRL]; /* we used DBGRQ only if we didn't come out of reset */ @@ -1199,8 +1182,8 @@ int arm7_9_clear_halt(target_t *target) */ int arm7_9_soft_reset_halt(struct target_s *target) { - armv4_5_common_t *armv4_5 = target->arch_info; - arm7_9_common_t *arm7_9 = armv4_5->arch_info; + struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target); + struct armv4_5_common_s *armv4_5 = &arm7_9->armv4_5_common; reg_t *dbg_stat = &arm7_9->eice_cache->reg_list[EICE_DBG_STAT]; reg_t *dbg_ctrl = &arm7_9->eice_cache->reg_list[EICE_DBG_CTRL]; int i; @@ -1318,8 +1301,7 @@ int arm7_9_halt(target_t *target) return ERROR_OK; } - armv4_5_common_t *armv4_5 = target->arch_info; - arm7_9_common_t *arm7_9 = armv4_5->arch_info; + struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target); reg_t *dbg_ctrl = &arm7_9->eice_cache->reg_list[EICE_DBG_CTRL]; LOG_DEBUG("target->state: %s", @@ -1381,9 +1363,8 @@ int arm7_9_debug_entry(target_t *target) uint32_t r0_thumb, pc_thumb; uint32_t cpsr; int retval; - /* get pointers to arch-specific information */ - armv4_5_common_t *armv4_5 = target->arch_info; - arm7_9_common_t *arm7_9 = armv4_5->arch_info; + struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target); + struct armv4_5_common_s *armv4_5 = &arm7_9->armv4_5_common; reg_t *dbg_stat = &arm7_9->eice_cache->reg_list[EICE_DBG_STAT]; reg_t *dbg_ctrl = &arm7_9->eice_cache->reg_list[EICE_DBG_CTRL]; @@ -1536,8 +1517,8 @@ int arm7_9_full_context(target_t *target) { int i; int retval; - armv4_5_common_t *armv4_5 = target->arch_info; - arm7_9_common_t *arm7_9 = armv4_5->arch_info; + struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target); + struct armv4_5_common_s *armv4_5 = &arm7_9->armv4_5_common; LOG_DEBUG("-"); @@ -1627,8 +1608,8 @@ int arm7_9_full_context(target_t *target) */ int arm7_9_restore_context(target_t *target) { - armv4_5_common_t *armv4_5 = target->arch_info; - arm7_9_common_t *arm7_9 = armv4_5->arch_info; + struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target); + struct armv4_5_common_s *armv4_5 = &arm7_9->armv4_5_common; reg_t *reg; armv4_5_core_reg_t *reg_arch_info; enum armv4_5_mode current_mode = armv4_5->core_mode; @@ -1777,8 +1758,7 @@ int arm7_9_restore_context(target_t *target) */ int arm7_9_restart_core(struct target_s *target) { - armv4_5_common_t *armv4_5 = target->arch_info; - arm7_9_common_t *arm7_9 = armv4_5->arch_info; + struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target); arm_jtag_t *jtag_info = &arm7_9->jtag_info; /* set RESTART instruction */ @@ -1831,8 +1811,8 @@ void arm7_9_enable_breakpoints(struct target_s *target) int arm7_9_resume(struct target_s *target, int current, uint32_t address, int handle_breakpoints, int debug_execution) { - armv4_5_common_t *armv4_5 = target->arch_info; - arm7_9_common_t *arm7_9 = armv4_5->arch_info; + struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target); + struct armv4_5_common_s *armv4_5 = &arm7_9->armv4_5_common; breakpoint_t *breakpoint = target->breakpoints; reg_t *dbg_ctrl = &arm7_9->eice_cache->reg_list[EICE_DBG_CTRL]; int err, retval = ERROR_OK; @@ -1991,9 +1971,8 @@ int arm7_9_resume(struct target_s *target, int current, uint32_t address, int ha void arm7_9_enable_eice_step(target_t *target, uint32_t next_pc) { - armv4_5_common_t *armv4_5 = target->arch_info; - arm7_9_common_t *arm7_9 = armv4_5->arch_info; - + struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target); + struct armv4_5_common_s *armv4_5 = &arm7_9->armv4_5_common; uint32_t current_pc; current_pc = buf_get_u32(armv4_5->core_cache->reg_list[15].value, 0, 32); @@ -2029,8 +2008,7 @@ void arm7_9_enable_eice_step(target_t *target, uint32_t next_pc) void arm7_9_disable_eice_step(target_t *target) { - armv4_5_common_t *armv4_5 = target->arch_info; - arm7_9_common_t *arm7_9 = armv4_5->arch_info; + struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target); embeddedice_store_reg(&arm7_9->eice_cache->reg_list[EICE_W0_ADDR_MASK]); embeddedice_store_reg(&arm7_9->eice_cache->reg_list[EICE_W0_DATA_MASK]); @@ -2045,8 +2023,8 @@ void arm7_9_disable_eice_step(target_t *target) int arm7_9_step(struct target_s *target, int current, uint32_t address, int handle_breakpoints) { - armv4_5_common_t *armv4_5 = target->arch_info; - arm7_9_common_t *arm7_9 = armv4_5->arch_info; + struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target); + struct armv4_5_common_s *armv4_5 = &arm7_9->armv4_5_common; breakpoint_t *breakpoint = NULL; int err, retval; @@ -2141,8 +2119,8 @@ int arm7_9_read_core_reg(struct target_s *target, int num, enum armv4_5_mode mod uint32_t* reg_p[16]; uint32_t value; int retval; - armv4_5_common_t *armv4_5 = target->arch_info; - arm7_9_common_t *arm7_9 = armv4_5->arch_info; + struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target); + struct armv4_5_common_s *armv4_5 = &arm7_9->armv4_5_common; if (armv4_5_mode_to_number(armv4_5->core_mode)==-1) return ERROR_FAIL; @@ -2205,8 +2183,8 @@ int arm7_9_read_core_reg(struct target_s *target, int num, enum armv4_5_mode mod int arm7_9_write_core_reg(struct target_s *target, int num, enum armv4_5_mode mode, uint32_t value) { uint32_t reg[16]; - armv4_5_common_t *armv4_5 = target->arch_info; - arm7_9_common_t *arm7_9 = armv4_5->arch_info; + struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target); + struct armv4_5_common_s *armv4_5 = &arm7_9->armv4_5_common; if (armv4_5_mode_to_number(armv4_5->core_mode)==-1) return ERROR_FAIL; @@ -2265,9 +2243,8 @@ int arm7_9_write_core_reg(struct target_s *target, int num, enum armv4_5_mode mo int arm7_9_read_memory(struct target_s *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer) { - armv4_5_common_t *armv4_5 = target->arch_info; - arm7_9_common_t *arm7_9 = armv4_5->arch_info; - + struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target); + struct armv4_5_common_s *armv4_5 = &arm7_9->armv4_5_common; uint32_t reg[16]; uint32_t num_accesses = 0; int thisrun_accesses; @@ -2441,8 +2418,8 @@ int arm7_9_read_memory(struct target_s *target, uint32_t address, uint32_t size, int arm7_9_write_memory(struct target_s *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer) { - armv4_5_common_t *armv4_5 = target->arch_info; - arm7_9_common_t *arm7_9 = armv4_5->arch_info; + struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target); + struct armv4_5_common_s *armv4_5 = &arm7_9->armv4_5_common; reg_t *dbg_ctrl = &arm7_9->eice_cache->reg_list[EICE_DBG_CTRL]; uint32_t reg[16]; @@ -2628,8 +2605,7 @@ static uint8_t *dcc_buffer; static int arm7_9_dcc_completion(struct target_s *target, uint32_t exit_point, int timeout_ms, void *arch_info) { int retval = ERROR_OK; - armv4_5_common_t *armv4_5 = target->arch_info; - arm7_9_common_t *arm7_9 = armv4_5->arch_info; + struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target); if ((retval = target_wait_state(target, TARGET_DEBUG_RUNNING, 500)) != ERROR_OK) return retval; @@ -2694,8 +2670,7 @@ int armv4_5_run_algorithm_inner(struct target_s *target, int num_mem_params, mem int arm7_9_bulk_write_memory(target_t *target, uint32_t address, uint32_t count, uint8_t *buffer) { int retval; - armv4_5_common_t *armv4_5 = target->arch_info; - arm7_9_common_t *arm7_9 = armv4_5->arch_info; + struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target); int i; if (!arm7_9->dcc_downloads) diff --git a/src/target/arm7_9_common.h b/src/target/arm7_9_common.h index d86ac24..9eafc1d 100644 --- a/src/target/arm7_9_common.h +++ b/src/target/arm7_9_common.h @@ -108,7 +108,6 @@ typedef struct arm7_9_common_s void (*post_restore_context)(target_t *target); /**< Callback function called after restoring the processor context */ armv4_5_common_t armv4_5_common; - void *arch_info; } arm7_9_common_t; diff --git a/src/target/arm_simulator.c b/src/target/arm_simulator.c index 27957b2..2d35af9 100644 --- a/src/target/arm_simulator.c +++ b/src/target/arm_simulator.c @@ -825,21 +825,19 @@ static enum armv4_5_mode armv4_5_get_mode(struct arm_sim_interface *sim) int arm_simulate_step(target_t *target, uint32_t *dry_run_pc) { - armv4_5_common_t *armv4_5 = target->arch_info; - + struct armv4_5_common_s *armv4_5 = target_to_armv4_5(target); struct arm_sim_interface sim; - sim.user_data=armv4_5; - sim.get_reg=&armv4_5_get_reg; - sim.set_reg=&armv4_5_set_reg; - sim.get_reg_mode=&armv4_5_get_reg_mode; - sim.set_reg_mode=&armv4_5_set_reg_mode; - sim.get_cpsr=&armv4_5_get_cpsr; - sim.get_mode=&armv4_5_get_mode; - sim.get_state=&armv4_5_get_state; - sim.set_state=&armv4_5_set_state; + sim.user_data = armv4_5; + sim.get_reg = &armv4_5_get_reg; + sim.set_reg = &armv4_5_set_reg; + sim.get_reg_mode = &armv4_5_get_reg_mode; + sim.set_reg_mode = &armv4_5_set_reg_mode; + sim.get_cpsr = &armv4_5_get_cpsr; + sim.get_mode = &armv4_5_get_mode; + sim.get_state = &armv4_5_get_state; + sim.set_state = &armv4_5_set_state; return arm_simulate_step_core(target, dry_run_pc, &sim); - } diff --git a/src/target/armv4_5.c b/src/target/armv4_5.c index 9d942ae..0fe9ee4 100644 --- a/src/target/armv4_5.c +++ b/src/target/armv4_5.c @@ -189,7 +189,7 @@ int armv4_5_set_core_reg(reg_t *reg, uint8_t *buf) { armv4_5_core_reg_t *armv4_5 = reg->arch_info; target_t *target = armv4_5->target; - armv4_5_common_t *armv4_5_target = target->arch_info; + struct armv4_5_common_s *armv4_5_target = target_to_armv4_5(target); uint32_t value = buf_get_u32(buf, 0, 32); if (target->state != TARGET_HALTED) @@ -237,7 +237,7 @@ int armv4_5_set_core_reg(reg_t *reg, uint8_t *buf) int armv4_5_invalidate_core_regs(target_t *target) { - armv4_5_common_t *armv4_5 = target->arch_info; + struct armv4_5_common_s *armv4_5 = target_to_armv4_5(target); int i; for (i = 0; i < 37; i++) @@ -289,7 +289,7 @@ reg_cache_t* armv4_5_build_reg_cache(target_t *target, armv4_5_common_t *armv4_5 int armv4_5_arch_state(struct target_s *target) { - armv4_5_common_t *armv4_5 = target->arch_info; + struct armv4_5_common_s *armv4_5 = target_to_armv4_5(target); if (armv4_5->common_magic != ARMV4_5_COMMON_MAGIC) { @@ -313,7 +313,7 @@ int handle_armv4_5_reg_command(struct command_context_s *cmd_ctx, char *cmd, cha int output_len; int mode, num; target_t *target = get_current_target(cmd_ctx); - armv4_5_common_t *armv4_5 = target->arch_info; + struct armv4_5_common_s *armv4_5 = target_to_armv4_5(target); if (armv4_5->common_magic != ARMV4_5_COMMON_MAGIC) { @@ -362,7 +362,7 @@ int handle_armv4_5_reg_command(struct command_context_s *cmd_ctx, char *cmd, cha int handle_armv4_5_core_state_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc) { target_t *target = get_current_target(cmd_ctx); - armv4_5_common_t *armv4_5 = target->arch_info; + struct armv4_5_common_s *armv4_5 = target_to_armv4_5(target); if (armv4_5->common_magic != ARMV4_5_COMMON_MAGIC) { @@ -393,7 +393,7 @@ handle_armv4_5_disassemble_command(struct command_context_s *cmd_ctx, { int retval = ERROR_OK; target_t *target = get_current_target(cmd_ctx); - armv4_5_common_t *armv4_5 = target->arch_info; + struct armv4_5_common_s *armv4_5 = target_to_armv4_5(target); uint32_t address; int count = 1; int i; @@ -487,7 +487,7 @@ int armv4_5_register_commands(struct command_context_s *cmd_ctx) int armv4_5_get_gdb_reg_list(target_t *target, reg_t **reg_list[], int *reg_list_size) { - armv4_5_common_t *armv4_5 = target->arch_info; + struct armv4_5_common_s *armv4_5 = target_to_armv4_5(target); int i; if (armv4_5_mode_to_number(armv4_5->core_mode)==-1) @@ -516,7 +516,7 @@ int armv4_5_get_gdb_reg_list(target_t *target, reg_t **reg_list[], int *reg_list static int armv4_5_run_algorithm_completion(struct target_s *target, uint32_t exit_point, int timeout_ms, void *arch_info) { int retval; - armv4_5_common_t *armv4_5 = target->arch_info; + struct armv4_5_common_s *armv4_5 = target_to_armv4_5(target); if ((retval = target_wait_state(target, TARGET_HALTED, timeout_ms)) != ERROR_OK) { @@ -547,7 +547,7 @@ static int armv4_5_run_algorithm_completion(struct target_s *target, uint32_t ex int armv4_5_run_algorithm_inner(struct target_s *target, int num_mem_params, mem_param_t *mem_params, int num_reg_params, reg_param_t *reg_params, uint32_t entry_point, uint32_t exit_point, int timeout_ms, void *arch_info, int (*run_it)(struct target_s *target, uint32_t exit_point, int timeout_ms, void *arch_info)) { - armv4_5_common_t *armv4_5 = target->arch_info; + struct armv4_5_common_s *armv4_5 = target_to_armv4_5(target); armv4_5_algorithm_t *armv4_5_algorithm_info = arch_info; enum armv4_5_state core_state = armv4_5->core_state; enum armv4_5_mode core_mode = armv4_5->core_mode; diff --git a/src/target/embeddedice.c b/src/target/embeddedice.c index 9909084..faeef38 100644 --- a/src/target/embeddedice.c +++ b/src/target/embeddedice.c @@ -276,10 +276,13 @@ reg_cache_t* embeddedice_build_reg_cache(target_t *target, arm7_9_common_t *arm7 int embeddedice_setup(target_t *target) { int retval; - armv4_5_common_t *armv4_5 = target->arch_info; - arm7_9_common_t *arm7_9 = armv4_5->arch_info; + struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target); - /* explicitly disable monitor mode */ + /* Explicitly disable monitor mode. For now we only support halting + * debug ... we don't know how to talk with a resident debug monitor + * that manages break requests. ARM's "Angel Debug Monitor" is one + * common example of such code. + */ if (arm7_9->has_monitor_mode) { reg_t *dbg_ctrl = &arm7_9->eice_cache->reg_list[EICE_DBG_CTRL]; diff --git a/src/target/etm.c b/src/target/etm.c index 8229bb0..21087b2 100644 --- a/src/target/etm.c +++ b/src/target/etm.c @@ -410,8 +410,7 @@ int etm_setup(target_t *target) { int retval; uint32_t etm_ctrl_value; - armv4_5_common_t *armv4_5 = target->arch_info; - arm7_9_common_t *arm7_9 = armv4_5->arch_info; + struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target); etm_context_t *etm_ctx = arm7_9->etm_ctx; reg_t *etm_ctrl_reg; commit a81df55f393478cdef9197c248a1b64d26465589 Author: David Brownell <dbr...@us...> Date: Thu Nov 5 22:04:13 2009 -0800 Cortex-A8: use the new inheritance/nesting scheme Use target_to_armv7a() etc, replacing needless pointer traversals. Stop using X->arch_info scheme in most ARMv7-A and Cortex-A8 code. Signed-off-by: David Brownell <dbr...@us...> diff --git a/src/target/armv7a.c b/src/target/armv7a.c index 1583e99..6dfbb16 100644 --- a/src/target/armv7a.c +++ b/src/target/armv7a.c @@ -176,10 +176,7 @@ reg_t armv7a_gdb_dummy_fp_reg = void armv7a_show_fault_registers(target_t *target) { uint32_t dfsr, ifsr, dfar, ifar; - - /* get pointers to arch-specific information */ - armv4_5_common_t *armv4_5 = target->arch_info; - armv7a_common_t *armv7a = armv4_5->arch_info; + struct armv7a_common_s *armv7a = target_to_armv7a(target); armv7a->read_cp15(target, 0, 0, 5, 0, &dfsr); armv7a->read_cp15(target, 0, 1, 5, 0, &ifsr); @@ -200,8 +197,8 @@ int armv7a_arch_state(struct target_s *target) "disabled", "enabled" }; - armv4_5_common_t *armv4_5 = target->arch_info; - armv7a_common_t *armv7a = armv4_5->arch_info; + struct armv7a_common_s *armv7a = target_to_armv7a(target); + struct armv4_5_common_s *armv4_5 = &armv7a->armv4_5_common; if (armv4_5->common_magic != ARMV4_5_COMMON_MAGIC) { @@ -237,8 +234,7 @@ static int handle_dap_baseaddr_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc) { target_t *target = get_current_target(cmd_ctx); - armv4_5_common_t *armv4_5 = target->arch_info; - armv7a_common_t *armv7a = armv4_5->arch_info; + struct armv7a_common_s *armv7a = target_to_armv7a(target); swjdp_common_t *swjdp = &armv7a->swjdp_info; return dap_baseaddr_command(cmd_ctx, swjdp, args, argc); @@ -248,8 +244,7 @@ static int handle_dap_memaccess_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc) { target_t *target = get_current_target(cmd_ctx); - armv4_5_common_t *armv4_5 = target->arch_info; - armv7a_common_t *armv7a = armv4_5->arch_info; + struct armv7a_common_s *armv7a = target_to_armv7a(target); swjdp_common_t *swjdp = &armv7a->swjdp_info; return dap_memaccess_command(cmd_ctx, swjdp, args, argc); @@ -259,8 +254,7 @@ static int handle_dap_apsel_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc) { target_t *target = get_current_target(cmd_ctx); - armv4_5_common_t *armv4_5 = target->arch_info; - armv7a_common_t *armv7a = armv4_5->arch_info; + struct armv7a_common_s *armv7a = target_to_armv7a(target); swjdp_common_t *swjdp = &armv7a->swjdp_info; return dap_apsel_command(cmd_ctx, swjdp, args, argc); @@ -270,8 +264,7 @@ static int handle_dap_apid_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc) { target_t *target = get_current_target(cmd_ctx); - armv4_5_common_t *armv4_5 = target->arch_info; - armv7a_common_t *armv7a = armv4_5->arch_info; + struct armv7a_common_s *armv7a = target_to_armv7a(target); swjdp_common_t *swjdp = &armv7a->swjdp_info; return dap_apid_command(cmd_ctx, swjdp, args, argc); @@ -281,8 +274,7 @@ static int handle_dap_info_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc) { target_t *target = get_current_target(cmd_ctx); - armv4_5_common_t *armv4_5 = target->arch_info; - armv7a_common_t *armv7a = armv4_5->arch_info; + struct armv7a_common_s *armv7a = target_to_armv7a(target); swjdp_common_t *swjdp = &armv7a->swjdp_info; uint32_t apsel; @@ -305,7 +297,7 @@ handle_armv7a_disassemble_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc) { target_t *target = get_current_target(cmd_ctx); - armv4_5_common_t *armv4_5 = target->arch_info; + struct armv4_5_common_s *armv4_5 = target_to_armv4_5(target); int thumb = 0; int count = 1; uint32_t address; @@ -342,7 +334,7 @@ handle_armv7a_disassemble_command(struct command_context_s *cmd_ctx, default: usage: command_print(cmd_ctx, - "usage: armv4_5 disassemble <address> [<count> ['thumb']]"); + "usage: armv7a disassemble <address> [<count> ['thumb']]"); return ERROR_OK; } diff --git a/src/target/armv7a.h b/src/target/armv7a.h index 3fc97f1..2ad0321 100644 --- a/src/target/armv7a.h +++ b/src/target/armv7a.h @@ -107,7 +107,6 @@ typedef struct armv7a_common_s /* Cache and Memory Management Unit */ armv4_5_mmu_common_t armv4_5_mmu; armv4_5_common_t armv4_5_common; - void *arch_info; // int (*full_context)(struct target_s *target); // int (*read_core_reg)(struct target_s *target, int num, enum armv7a_mode mode); diff --git a/src/target/cortex_a8.c b/src/target/cortex_a8.c index 29fffae..141b439 100644 --- a/src/target/cortex_a8.c +++ b/src/target/cortex_a8.c @@ -128,9 +128,7 @@ target_type_t cortexa8_target = */ int cortex_a8_init_debug_access(target_t *target) { - /* get pointers to arch-specific information */ - armv4_5_common_t *armv4_5 = target->arch_info; - armv7a_common_t *armv7a = armv4_5->arch_info; + struct armv7a_common_s *armv7a = target_to_armv7a(target); swjdp_common_t *swjdp = &armv7a->swjdp_info; int retval; @@ -160,9 +158,7 @@ int cortex_a8_exec_opcode(target_t *target, uint32_t opcode) { uint32_t dscr; int retval; - /* get pointers to arch-specific information */ - armv4_5_common_t *armv4_5 = target->arch_info; - armv7a_common_t *armv7a = armv4_5->arch_info; + struct armv7a_common_s *armv7a = target_to_armv7a(target); swjdp_common_t *swjdp = &armv7a->swjdp_info; LOG_DEBUG("exec opcode 0x%08" PRIx32, opcode); @@ -203,9 +199,7 @@ int cortex_a8_read_regs_through_mem(target_t *target, uint32_t address, uint32_t * regfile) { int retval = ERROR_OK; - /* get pointers to arch-specific information */ - armv4_5_common_t *armv4_5 = target->arch_info; - armv7a_common_t *armv7a = armv4_5->arch_info; + struct armv7a_common_s *armv7a = target_to_armv7a(target); swjdp_common_t *swjdp = &armv7a->swjdp_info; cortex_a8_dap_read_coreregister_u32(target, regfile, 0); @@ -222,9 +216,7 @@ int cortex_a8_read_cp(target_t *target, uint32_t *value, uint8_t CP, uint8_t op1, uint8_t CRn, uint8_t CRm, uint8_t op2) { int retval; - /* get pointers to arch-specific information */ - armv4_5_common_t *armv4_5 = target->arch_info; - armv7a_common_t *armv7a = armv4_5->arch_info; + struct armv7a_common_s *armv7a = target_to_armv7a(target); swjdp_common_t *swjdp = &armv7a->swjdp_info; cortex_a8_exec_opcode(target, ARMV4_5_MRC(CP, op1, 0, CRn, CRm, op2)); @@ -243,10 +235,7 @@ int cortex_a8_write_cp(target_t *target, uint32_t value, { int retval; uint32_t dscr; - - /* get pointers to arch-specific information */ - armv4_5_common_t *armv4_5 = target->arch_info; - armv7a_common_t *armv7a = armv4_5->arch_info; + struct armv7a_common_s *armv7a = target_to_armv7a(target); swjdp_common_t *swjdp = &armv7a->swjdp_info; LOG_DEBUG("CP%i, CRn %i, value 0x%08" PRIx32, CP, CRn, value); @@ -310,10 +299,7 @@ int cortex_a8_dap_read_coreregister_u32(target_t *target, int retval = ERROR_OK; uint8_t reg = regnum&0xFF; uint32_t dscr; - - /* get pointers to arch-specific information */ - armv4_5_common_t *armv4_5 = target->arch_info; - armv7a_common_t *armv7a = armv4_5->arch_info; + struct armv7a_common_s *armv7a = target_to_armv7a(target); swjdp_common_t *swjdp = &armv7a->swjdp_info; if (reg > 16) @@ -354,10 +340,7 @@ int cortex_a8_dap_write_coreregister_u32(target_t *target, uint32_t value, int r int retval = ERROR_OK; uint8_t Rd = regnum&0xFF; uint32_t dscr; - - /* get pointers to arch-specific information */ - armv4_5_common_t *armv4_5 = target->arch_info; - armv7a_common_t *armv7a = armv4_5->arch_info; + struct armv7a_common_s *armv7a = target_to_armv7a(target); swjdp_common_t *swjdp = &armv7a->swjdp_info; LOG_DEBUG("register %i, value 0x%08" PRIx32, regnum, value); @@ -404,10 +387,7 @@ int cortex_a8_dap_write_coreregister_u32(target_t *target, uint32_t value, int r int cortex_a8_dap_write_memap_register_u32(target_t *target, uint32_t address, uint32_t value) { int retval; - - /* get pointers to arch-specific information */ - armv4_5_common_t *armv4_5 = target->arch_info; - armv7a_common_t *armv7a = armv4_5->arch_info; + struct armv7a_common_s *armv7a = target_to_armv7a(target); swjdp_common_t *swjdp = &armv7a->swjdp_info; retval = mem_ap_write_atomic_u32(swjdp, address, value); @@ -423,16 +403,12 @@ int cortex_a8_poll(target_t *target) { int retval = ERROR_OK; uint32_t dscr; - /* get pointers to arch-specific information */ - armv4_5_common_t *armv4_5 = target->arch_info; - armv7a_common_t *armv7a = armv4_5->arch_info; - cortex_a8_common_t *cortex_a8 = armv7a->arch_info; + struct cortex_a8_common_s *cortex_a8 = target_to_cortex_a8(target); + struct armv7a_common_s *armv7a = &cortex_a8->armv7a_common; swjdp_common_t *swjdp = &armv7a->swjdp_info; - - enum target_state prev_target_state = target->state; - uint8_t saved_apsel = dap_ap_get_select(swjdp); + dap_ap_select(swjdp, swjdp_debugap); retval = mem_ap_read_atomic_u32(swjdp, armv7a->debug_base + CPUDBG_DSCR, &dscr); @@ -492,12 +468,8 @@ int cortex_a8_halt(target_t *target) { int retval = ERROR_OK; uint32_t dscr; - - /* get pointers to arch-specific information */ - armv4_5_common_t *armv4_5 = target->arch_info; - armv7a_common_t *armv7a = armv4_5->arch_info; + struct armv7a_common_s *armv7a = target_to_armv7a(target); swjdp_common_t *swjdp = &armv7a->swjdp_info; - uint8_t saved_apsel = dap_ap_get_select(swjdp); dap_ap_select(swjdp, swjdp_debugap); @@ -533,9 +505,8 @@ out: int cortex_a8_resume(struct target_s *target, int current, uint32_t address, int handle_breakpoints, int debug_execution) { - /* get pointers to arch-specific information */ - armv4_5_common_t *armv4_5 = target->arch_info; - armv7a_common_t *armv7a = armv4_5->arch_info; + struct armv7a_common_s *armv7a = target_to_armv7a(target); + struct armv4_5_common_s *armv4_5 = &armv7a->armv4_5_common; swjdp_common_t *swjdp = &armv7a->swjdp_info; // breakpoint_t *breakpoint = NULL; @@ -658,11 +629,9 @@ int cortex_a8_debug_entry(target_t *target) uint32_t regfile[16], pc, cpsr, dscr; int retval = ERROR_OK; working_area_t *regfile_working_area = NULL; - - /* get pointers to arch-specific information */ - armv4_5_common_t *armv4_5 = target->arch_info; - armv7a_common_t *armv7a = armv4_5->arch_info; - cortex_a8_common_t *cortex_a8 = armv7a->arch_info; + struct cortex_a8_common_s *cortex_a8 = target_to_cortex_a8(target); + struct armv7a_common_s *armv7a = target_to_armv7a(target); + struct armv4_5_common_s *armv4_5 = &armv7a->armv4_5_common; swjdp_common_t *swjdp = &armv7a->swjdp_info; LOG_DEBUG("dscr = 0x%08" PRIx32, cortex_a8->cpudbg_dscr); @@ -785,10 +754,8 @@ int cortex_a8_debug_entry(target_t *target) void cortex_a8_post_debug_entry(target_t *target) { - /* get pointers to arch-specific information */ - armv4_5_common_t *armv4_5 = target->arch_info; - armv7a_common_t *armv7a = armv4_5->arch_info; - cortex_a8_common_t *cortex_a8 = armv7a->arch_info; + struct cortex_a8_common_s *cortex_a8 = target_to_cortex_a8(target); + struct armv7a_common_s *armv7a = &cortex_a8->armv7a_common; // cortex_a8_read_cp(target, &cp15_control_register, 15, 0, 1, 0, 0); /* examine cp15 control reg */ @@ -820,9 +787,8 @@ void cortex_a8_post_debug_entry(target_t *target) int cortex_a8_step(struct target_s *target, int current, uint32_t address, int handle_breakpoints) { - /* get pointers to arch-specific information */ - armv4_5_common_t *armv4_5 = target->arch_info; - armv7a_common_t *armv7a = armv4_5->arch_info; + struct armv7a_common_s *armv7a = target_to_armv7a(target); + struct armv4_5_common_s *armv4_5 = &armv7a->armv4_5_common; breakpoint_t *breakpoint = NULL; breakpoint_t stepbreakpoint; @@ -901,10 +867,8 @@ int cortex_a8_restore_context(target_t *target) { int i; uint32_t value; - - /* get pointers to arch-specific information */ - armv4_5_common_t *armv4_5 = target->arch_info; - armv7a_common_t *armv7a = armv4_5->arch_info; + struct armv7a_common_s *armv7a = target_to_armv7a(target); + struct armv4_5_common_s *armv4_5 = &armv7a->armv4_5_common; LOG_DEBUG(" "); @@ -939,8 +903,7 @@ int cortex_a8_load_core_reg_u32(struct target_s *target, int num, armv4_5_mode_t mode, uint32_t * value) { int retval; - /* get pointers to arch-specific information */ - armv4_5_common_t *armv4_5 = target->arch_info; + struct armv4_5_common_s *armv4_5 = target_to_armv4_5(target); if ((num <= ARM_CPSR)) { @@ -978,9 +941,7 @@ int cortex_a8_store_core_reg_u32(struct target_s *target, int num, { int retval; // uint32_t reg; - - /* get pointers to arch-specific information */ - armv4_5_common_t *armv4_5 = target->arch_info; + struct armv4_5_common_s *armv4_5 = target_to_armv4_5(target); #ifdef ARMV7_GDB_HACKS /* If the LR register is being modified, make sure it will put us @@ -1021,7 +982,8 @@ int cortex_a8_read_core_reg(struct target_s *target, int num, { uint32_t value; int retval; - armv4_5_common_t *armv4_5 = target->arch_info; + struct armv4_5_common_s *armv4_5 = target_to_armv4_5(target); + cortex_a8_dap_read_coreregister_u32(target, &value, num); if ((retval = jtag_execute_queue()) != ERROR_OK) @@ -1041,7 +1003,7 @@ int cortex_a8_write_core_reg(struct target_s *target, int num, enum armv4_5_mode mode, uint32_t value) { int retval; - armv4_5_common_t *armv4_5 = target->arch_info; + struct armv4_5_common_s *armv4_5 = target_to_armv4_5(target); cortex_a8_dap_write_coreregister_u32(target, value, num); if ((retval = jtag_execute_queue()) != ERROR_OK) @@ -1068,12 +1030,8 @@ int cortex_a8_set_breakpoint(struct target_s *target, int brp_i=0; uint32_t control; uint8_t byte_addr_select = 0x0F; - - - /* get pointers to arch-specific information */ - armv4_5_common_t *armv4_5 = target->arch_info; - armv7a_common_t *armv7a = armv4_5->arch_info; - cortex_a8_common_t *cortex_a8 = armv7a->arch_info; + struct cortex_a8_common_s *cortex_a8 = target_to_cortex_a8(target); + struct armv7a_common_s *armv7a = &cortex_a8->armv7a_common; cortex_a8_brp_t * brp_list = cortex_a8->brp_list; if (breakpoint->set) @@ -1143,10 +1101,8 @@ int cortex_a8_set_breakpoint(struct target_s *target, int cortex_a8_unset_breakpoint(struct target_s *target, breakpoint_t *breakpoint) { int retval; - /* get pointers to arch-specific information */ - armv4_5_common_t *armv4_5 = target->arch_info; - armv7a_common_t *armv7a = armv4_5->arch_info; - cortex_a8_common_t *cortex_a8 = armv7a->arch_info; + struct cortex_a8_common_s *cortex_a8 = target_to_cortex_a8(target); + struct armv7a_common_s *armv7a = &cortex_a8->armv7a_common; cortex_a8_brp_t * brp_list = cortex_a8->brp_list; if (!breakpoint->set) @@ -1202,10 +1158,7 @@ int cortex_a8_unset_breakpoint(struct target_s *target, breakpoint_t *breakpoint int cortex_a8_add_breakpoint(struct target_s *target, breakpoint_t *breakpoint) { - /* get pointers to arch-specific information */ - armv4_5_common_t *armv4_5 = target->arch_info; - armv7a_common_t *armv7a = armv4_5->arch_info; - cortex_a8_common_t *cortex_a8 = armv7a->arch_info; + struct cortex_a8_common_s *cortex_a8 = target_to_cortex_a8(target); if ((breakpoint->type == BKPT_HARD) && (cortex_a8->brp_num_available < 1)) { @@ -1222,10 +1175,7 @@ int cortex_a8_add_breakpoint(struct target_s *target, breakpoint_t *breakpoint) int cortex_a8_remove_breakpoint(struct target_s *target, breakpoint_t *breakpoint) { - /* get pointers to arch-specific information */ - armv4_5_common_t *armv4_5 = target->arch_info; - armv7a_common_t *armv7a = armv4_5->arch_info; - cortex_a8_common_t *cortex_a8 = armv7a->arch_info; + struct cortex_a8_common_s *cortex_a8 = target_to_cortex_a8(target); #if 0 /* It is perfectly possible to remove brakpoints while the taget is running */ @@ -1291,9 +1241,7 @@ int cortex_a8_deassert_reset(target_t *target) int cortex_a8_read_memory(struct target_s *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer) { - /* get pointers to arch-specific information */ - armv4_5_common_t *armv4_5 = target->arch_info; - armv7a_common_t *armv7a = armv4_5->arch_info; + struct armv7a_common_s *armv7a = target_to_armv7a(target); swjdp_common_t *swjdp = &armv7a->swjdp_info; int retval = ERROR_OK; @@ -1328,9 +1276,7 @@ int cortex_a8_read_memory(struct target_s *target, uint32_t address, int cortex_a8_write_memory(struct target_s *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer) { - /* get pointers to arch-specific information */ - armv4_5_common_t *armv4_5 = target->arch_info; - armv7a_common_t *armv7a = armv4_5->arch_info; + struct armv7a_common_s *armv7a = target_to_armv7a(target); swjdp_common_t *swjdp = &armv7a->swjdp_info; int retval; @@ -1416,11 +1362,9 @@ int cortex_a8_handle_target_request(void *priv) target_t *target = priv; if (!target->type->examined) return ERROR_OK; - armv4_5_common_t *armv4_5 = target->arch_info; - armv7a_common_t *armv7a = armv4_5->arch_info; + struct armv7a_common_s *armv7a = target_to_armv7a(target); swjdp_common_t *swjdp = &armv7a->swjdp_info; - if (!target->dbg_msg_enabled) return ERROR_OK; @@ -1457,13 +1401,9 @@ int cortex_a8_handle_target_request(void *priv) int cortex_a8_examine(struct target_s *target) { - /* get pointers to arch-specific information */ - armv4_5_common_t *armv4_5 = target->arch_info; - armv7a_common_t *armv7a = armv4_5->arch_info; - cortex_a8_common_t *cortex_a8 = armv7a->arch_info; + struct cortex_a8_common_s *cortex_a8 = target_to_cortex_a8(target); + struct armv7a_common_s *armv7a = &cortex_a8->armv7a_common; swjdp_common_t *swjdp = &armv7a->swjdp_info; - - int i; int retval = ERROR_OK; uint32_t didr, ctypr, ttypr, cpuid; @@ -1559,8 +1499,7 @@ int cortex_a8_examine(struct target_s *target) void cortex_a8_build_reg_cache(target_t *target) { reg_cache_t **cache_p = register_get_last_cache_p(&target->reg_cache); - /* get pointers to arch-specific information */ - armv4_5_common_t *armv4_5 = target->arch_info; + struct armv4_5_common_s *armv4_5 = target_to_armv4_5(target); (*cache_p) = armv4_5_build_reg_cache(target, armv4_5); armv4_5->core_cache = (*cache_p); @@ -1586,8 +1525,6 @@ int cortex_a8_init_arch_info(target_t *target, /* Setup cortex_a8_common_t */ cortex_a8->common_magic = CORTEX_A8_COMMON_MAGIC; - cortex_a8->arch_info = NULL; - armv7a->arch_info = cortex_a8; armv4_5->arch_info = armv7a; armv4_5_init_arch_info(target, armv4_5); @@ -1656,8 +1593,7 @@ static int cortex_a8_handle_cache_info_command(struct command_context_s *cmd_ctx char *cmd, char **args, int argc) { target_t *target = get_current_target(cmd_ctx); - armv4_5_common_t *armv4_5 = target->arch_info; - armv7a_common_t *armv7a = armv4_5->arch_info; + struct armv7a_common_s *armv7a = target_to_armv7a(target); return armv4_5_handle_cache_info_command(cmd_ctx, &armv7a->armv4_5_mmu.armv4_5_cache); diff --git a/src/target/cortex_a8.h b/src/target/cortex_a8.h index b98a7de..b4cb327 100644 --- a/src/target/cortex_a8.h +++ b/src/target/cortex_a8.h @@ -134,7 +134,6 @@ typedef struct cortex_a8_common_s int fast_reg_read; armv7a_common_t armv7a_common; - void *arch_info; } cortex_a8_common_t; static inline struct cortex_a8_common_s * commit fec3c4763ad4cf2996fa138c4fd0f555e32e5e9f Author: David Brownell <dbr...@us...> Date: Thu Nov 5 22:04:04 2009 -0800 ARM7TDMI uses the new inheritance/nesting scheme Use target_to_arm7_9(), replacing needless pointer traversals. Also: remove now-useless contents of arm7tdmi struct; it's almost ready to be removed. Signed-off-by: David Brownell <dbr...@us...> diff --git a/src/target/arm7tdmi.c b/src/target/arm7tdmi.c index 27a8337..8b929d4 100644 --- a/src/target/arm7tdmi.c +++ b/src/target/arm7tdmi.c @@ -44,9 +44,7 @@ static int arm7tdmi_examine_debug_reason(target_t *target) { int retval = ERROR_OK; - /* get pointers to arch-specific information */ - armv4_5_common_t *armv4_5 = target->arch_info; - arm7_9_common_t *arm7_9 = armv4_5->arch_info; + struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target); /* only check the debug reason if we don't know it already */ if ((target->debug_reason != DBG_REASON_DBGRQ) @@ -268,9 +266,7 @@ static int arm7tdmi_clock_data_in_endianness(arm_jtag_t *jtag_info, static void arm7tdmi_change_to_arm(target_t *target, uint32_t *r0, uint32_t *pc) { - /* get pointers to arch-specific information */ - armv4_5_common_t *armv4_5 = target->arch_info; - arm7_9_common_t *arm7_9 = armv4_5->arch_info; + struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target); arm_jtag_t *jtag_info = &arm7_9->jtag_info; /* save r0 before using it and put system in ARM state @@ -327,9 +323,7 @@ static void arm7tdmi_read_core_regs(target_t *target, uint32_t mask, uint32_t* core_regs[16]) { int i; - /* get pointers to arch-specific information */ - armv4_5_common_t *armv4_5 = target->arch_info; - arm7_9_common_t *arm7_9 = armv4_5->arch_info; + struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target); arm_jtag_t *jtag_info = &arm7_9->jtag_info; /* STMIA r0-15, [r0] at debug speed @@ -354,9 +348,7 @@ static void arm7tdmi_read_core_regs_target_buffer(target_t *target, uint32_t mask, void* buffer, int size) { int i; - /* get pointers to arch-specific information */ - armv4_5_common_t *armv4_5 = target->arch_info; - arm7_9_common_t *arm7_9 = armv4_5->arch_info; + struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target); arm_jtag_t *jtag_info = &arm7_9->jtag_info; int be = (target->endianness == TARGET_BIG_ENDIAN) ? 1 : 0; uint32_t *buf_u32 = buffer; @@ -396,9 +388,7 @@ static void arm7tdmi_read_core_regs_target_buffer(target_t *target, static void arm7tdmi_read_xpsr(target_t *target, uint32_t *xpsr, int spsr) { - /* get pointers to arch-specific information */ - armv4_5_common_t *armv4_5 = target->arch_info; - arm7_9_common_t *arm7_9 = armv4_5->arch_info; + struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target); arm_jtag_t *jtag_info = &arm7_9->jtag_info; /* MRS r0, cpsr */ @@ -416,9 +406,7 @@ static void arm7tdmi_read_xpsr(target_t *target, uint32_t *xpsr, int spsr) static void arm7tdmi_write_xpsr(target_t *target, uint32_t xpsr, int spsr) { - /* get pointers to arch-specific information */ - armv4_5_common_t *armv4_5 = target->arch_info; - arm7_9_common_t *arm7_9 = armv4_5->arch_info; + struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target); arm_jtag_t *jtag_info = &arm7_9->jtag_info; LOG_DEBUG("xpsr: %8.8" PRIx32 ", spsr: %i", xpsr, spsr); @@ -448,9 +436,7 @@ static void arm7tdmi_write_xpsr(target_t *target, uint32_t xpsr, int spsr) static void arm7tdmi_write_xpsr_im8(target_t *target, uint8_t xpsr_im, int rot, int spsr) { - /* get pointers to arch-specific information */ - armv4_5_common_t *armv4_5 = target->arch_info; - arm7_9_common_t *arm7_9 = armv4_5->arch_info; + struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target); arm_jtag_t *jtag_info = &arm7_9->jtag_info; LOG_DEBUG("xpsr_im: %2.2x, rot: %i, spsr: %i", xpsr_im, rot, spsr); @@ -469,9 +455,7 @@ static void arm7tdmi_write_core_regs(target_t *target, uint32_t mask, uint32_t core_regs[16]) { int i; - /* get pointers to arch-specific information */ - armv4_5_common_t *armv4_5 = target->arch_info; - arm7_9_common_t *arm7_9 = armv4_5->arch_info; + struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target); arm_jtag_t *jtag_info = &arm7_9->jtag_info; /* LDMIA r0-15, [r0] at debug speed @@ -495,9 +479,7 @@ static void arm7tdmi_write_core_regs(target_t *target, static void arm7tdmi_load_word_regs(target_t *target, uint32_t mask) { - /* get pointers to arch-specific information */ - armv4_5_common_t *armv4_5 = target->arch_info; - arm7_9_common_t *arm7_9 = armv4_5->arch_info; + struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target); arm_jtag_t *jtag_info = &arm7_9->jtag_info; /* put system-speed load-multiple into the pipeline */ @@ -508,9 +490,7 @@ static void arm7tdmi_load_word_regs(target_t *target, uint32_t mask) static void arm7tdmi_load_hword_reg(target_t *target, int num) { - /* get pointers to arch-specific information */ - armv4_5_common_t *armv4_5 = target->arch_info; - arm7_9_common_t *arm7_9 = armv4_5->arch_info; + struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target); arm_jtag_t *jtag_info = &arm7_9->jtag_info; /* put system-speed load half-word into the pipeline */ @@ -521,9 +501,7 @@ static void arm7tdmi_load_hword_reg(target_t *target, int num) static void arm7tdmi_load_byte_reg(target_t *target, int num) { - /* get pointers to arch-specific information */ - armv4_5_common_t *armv4_5 = target->arch_info; - arm7_9_common_t *arm7_9 = armv4_5->arch_info; + struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target); arm_jtag_t *jtag_info = &arm7_9->jtag_info; /* put system-speed load byte into the pipeline */ @@ -534,9 +512,7 @@ static void arm7tdmi_load_byte_reg(target_t *target, int num) static void arm7tdmi_store_word_regs(target_t *target, uint32_t mask) { - /* get pointers to arch-specific information */ - armv4_5_common_t *armv4_5 = target->arch_info; - arm7_9_common_t *arm7_9 = armv4_5->arch_info; + struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target); arm_jtag_t *jtag_info = &arm7_9->jtag_info; /* put system-speed store-multiple into the pipeline */ @@ -547,9 +523,7 @@ static void arm7tdmi_store_word_regs(target_t *target, uint32_t mask) static void arm7tdmi_store_hword_reg(target_t *target, int num) { - /* get pointers to arch-specific information */ - armv4_5_common_t *armv4_5 = target->arch_info; - arm7_9_common_t *arm7_9 = armv4_5->arch_info; + struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target); arm_jtag_t *jtag_info = &arm7_9->jtag_info; /* put system-speed store half-word into the pipeline */ @@ -560,9 +534,7 @@ static void arm7tdmi_store_hword_reg(target_t *target, int num) static void arm7tdmi_store_byte_reg(target_t *target, int num) { - /* get pointers to arch-specific information */ - armv4_5_common_t *armv4_5 = target->arch_info; - arm7_9_common_t *arm7_9 = armv4_5->arch_info; + struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target); arm_jtag_t *jtag_info = &arm7_9->jtag_info; /* put system-speed store byte into the pipeline */ @@ -573,9 +545,7 @@ static void arm7tdmi_store_byte_reg(target_t *target, int num) static void arm7tdmi_write_pc(target_t *target, uint32_t pc) { - /* get pointers to arch-specific information */ - armv4_5_common_t *armv4_5 = target->arch_info; - arm7_9_common_t *arm7_9 = armv4_5->arch_info; + struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target); arm_jtag_t *jtag_info = &arm7_9->jtag_info; /* LDMIA r0-15, [r0] at debug speed @@ -600,9 +570,7 @@ static void arm7tdmi_write_pc(target_t *target, uint32_t pc) static void arm7tdmi_branch_resume(target_t *target) { - /* get pointers to arch-specific information */ - armv4_5_common_t *armv4_5 = target->arch_info; - arm7_9_common_t *arm7_9 = armv4_5->arch_info; + struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target); arm_jtag_t *jtag_info = &arm7_9->jtag_info; arm7tdmi_clock_out(jtag_info, ARMV4_5_NOP, NULL, 1); @@ -611,14 +579,13 @@ static void arm7tdmi_branch_resume(target_t *target) static void arm7tdmi_branch_resume_thumb(target_t *target) { - LOG_DEBUG("-"); - - /* get pointers to arch-specific information */ - armv4_5_common_t *armv4_5 = target->arch_info; - arm7_9_common_t *arm7_9 = armv4_5->arch_info; + struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target); + struct armv4_5_common_s *armv4_5 = &arm7_9->armv4_5_common; arm_jtag_t *jtag_info = &arm7_9->jtag_info; reg_t *dbg_stat = &arm7_9->eice_cache->reg_list[EICE_DBG_STAT]; + LOG_DEBUG("-"); + /* LDMIA r0, [r0] at debug speed * register values will start to appear on 4th DCLK */ @@ -673,8 +640,7 @@ static void arm7tdmi_branch_resume_thumb(target_t *target) static void arm7tdmi_build_reg_cache(target_t *target) { reg_cache_t **cache_p = register_get_last_cache_p(&target->reg_cache); - /* get pointers to arch-specific information */ - armv4_5_common_t *armv4_5 = target->arch_info; + struct armv4_5_common_s *armv4_5 = target_to_armv4_5(target); (*cache_p) = armv4_5_build_reg_cache(target, armv4_5); armv4_5->core_cache = (*cache_p); @@ -682,9 +648,10 @@ static void arm7tdmi_build_reg_cache(target_t *target) int arm7tdmi_examine(struct target_s *target) { + struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target); int retval; - armv4_5_common_t *armv4_5 = target->arch_info; - arm7_9_common_t *arm7_9 = armv4_5->arch_info; + + if (!target_was_examined(target)) { /* get pointers to arch-specific information */ @@ -725,11 +692,7 @@ int arm7tdmi_init_target(struct command_context_s *cmd_ctx, struct target_s *tar int arm7tdmi_init_arch_info(target_t *target, arm7tdmi_common_t *arm7tdmi, jtag_tap_t *tap) { - armv4_5_common_t *armv4_5; - arm7_9_common_t *arm7_9; - - arm7_9 = &arm7tdmi->arm7_9_common; - armv4_5 = &arm7_9->armv4_5_common; + struct arm7_9_common_s *arm7_9 = &arm7tdmi->arm7_9_common; /* prepare JTAG information for the new target */ arm7_9->jtag_info.tap = tap; @@ -771,10 +734,6 @@ int arm7tdmi_init_arch_info(target_t *target, arm7tdmi_common_t *arm7tdmi, jtag_ arm7_9->thumb_bkpt = 0xdeee; arm7_9->dbgreq_adjust_pc = 2; - arm7_9->arch_info = arm7tdmi; - - arm7tdmi->arch_info = NULL; - arm7tdmi->common_magic = ARM7TDMI_COMMON_MAGIC; arm7_9_init_arch_info(target, arm7_9); diff --git a/src/target/arm7tdmi.h b/src/target/arm7tdmi.h index da5c040..f69ba49 100644 --- a/src/target/arm7tdmi.h +++ b/src/target/arm7tdmi.h @@ -25,12 +25,11 @@ #include "embeddedice.h" -#define ARM7TDMI_COMMON_MAGIC 0x00a700a7 - +/* FIXME we don't really need a separate arm7tdmi struct any more... + * remove it, the arm7/arm9 common struct suffices. + */ typedef struct arm7tdmi_common_s { - int common_magic; - void *arch_info; arm7_9_common_t arm7_9_common; } arm7tdmi_common_t; commit 11fe2ec62e30e4b580ace6821ac4293ed91d53f1 Author: David Brownell <dbr...@us...> Date: Thu Nov 5 22:03:56 2009 -0800 ARM720 uses the new inheritance/nesting scheme Use target_to_arm720(), replacing needless pointer traversals and simplifying a bunch of nasty code. Stop setting arch_info for arm720 type parts, it's not used any longer. Signed-off-by: David Brownell <dbr...@us...> diff --git a/src/target/arm720t.c b/src/target/arm720t.c index cb21d5f..673296e 100644 --- a/src/target/arm720t.c +++ b/src/target/arm720t.c @@ -41,14 +41,15 @@ static int arm720t_scan_cp15(target_t *target, uint32_t out, uint32_t *in, int instruction, int clock) { - int retval = ERROR_OK; - armv4_5_common_t *armv4_5 = target->arch_info; - arm7_9_common_t *arm7_9 = armv4_5->arch_info; - arm_jtag_t *jtag_info = &arm7_9->jtag_info; + int retval; + struct arm720t_common_s *arm720t = target_to_arm720(target); + arm_jtag_t *jtag_info; scan_field_t fields[2]; uint8_t out_buf[4]; uint8_t instruction_buf = instruction; + jtag_info = &arm720t->arm7tdmi_common.arm7_9_common.jtag_info; + buf_set_u32(out_buf, 0, 32, flip_u32(out, 32)); jtag_set_end_state(TAP_DRPAUSE); @@ -184,10 +185,7 @@ static void arm720t_enable_mmu_caches(target_t *target, static void arm720t_post_debug_entry(target_t *target) { - armv4_5_common_t *armv4_5 = target->arch_info; - arm7_9_common_t *arm7_9 = armv4_5->arch_info; - arm7tdmi_common_t *arm7tdmi = arm7_9->arch_info; - arm720t_common_t *arm720t = arm7tdmi->arch_info; + struct arm720t_common_s *arm720t = target_to_arm720(target); /* examine cp15 control reg */ arm720t_read_cp15(target, 0xee110f10, &arm720t->cp15_control_reg); @@ -206,68 +204,35 @@ static void arm720t_post_debug_entry(target_t *target) static void arm720t_pre_restore_context(target_t *target) { - armv4_5_common_t *armv4_5 = target->arch_info; - arm7_9_common_t *arm7_9 = armv4_5->arch_info; - arm7tdmi_common_t *arm7tdmi = arm7_9->arch_info; - arm720t_common_t *arm720t = arm7tdmi->arch_info; + struct arm720t_common_s *arm720t = target_to_arm720(target); /* restore i/d fault status and address register */ arm720t_write_cp15(target, 0xee050f10, arm720t->fsr_reg); arm720t_write_cp15(target, 0xee060f10, arm720t->far_reg); } -static int arm720t_get_arch_pointers(target_t *target, - armv4_5_common_t **armv4_5_p, arm7_9_common_t **arm7_9_p, - arm7tdmi_common_t **arm7tdmi_p, arm720t_common_t **arm720t_p) +static int arm720t_verify_pointer(struct command_context_s *cmd_ctx, + struct arm720t_common_s *arm720t) { - armv4_5_common_t *armv4_5 = target->arch_info; - arm7_9_common_t *arm7_9; - arm7tdmi_common_t *arm7tdmi; - arm720t_common_t *arm720t; - - if (armv4_5->common_magic != ARMV4_5_COMMON_MAGIC) - { - return -1; - } - - arm7_9 = armv4_5->arch_info; - if (arm7_9->common_magic != ARM7_9_COMMON_MAGIC) - { - return -1; - } - - arm7tdmi = arm7_9->arch_info; - if (arm7tdmi->common_magic != ARM7TDMI_COMMON_MAGIC) - { - return -1; - } - - arm720t = arm7tdmi->arch_info; - if (arm720t->common_magic != ARM720T_COMMON_MAGIC) - { - return -1; + if (arm720t->common_magic != ARM720T_COMMON_MAGIC) { + command_print(cmd_ctx, "target is not an ARM720"); + return ERROR_TARGET_INVALID; } - - *armv4_5_p = armv4_5; - *arm7_9_p = arm7_9; - *arm7tdmi_p = arm7tdmi; - *arm720t_p = arm720t; - return ERROR_OK; } static int arm720t_arch... [truncated message content] |
From: David B. <dbr...@us...> - 2009-11-06 05:37:03
|
This is an automated email from the git hooks/post-receive script. It was generated because a ref change was pushed to the repository containing the project "Main OpenOCD repository". The branch, master has been updated via b7e4c26b9bb10e6e0ebfb07e5d43f0d62526cde2 (commit) via 1e57376c1a54e2a6097d1578aaeb387276377969 (commit) via dd96b2c28e8ab633678c13636410f9f9a541dbd3 (commit) via b52fa7492cfaf079145222d31eb8a2c9c6108ac4 (commit) via 20ff0a9682090912e84cc5c80be92b1e0ea78216 (commit) via ed9ac9b6fe3257bb728db059f4ae689fc5469fdd (commit) via aab023570b7cc8f884715fc6a8af9c296d24ea8e (commit) from 36b4ac90e45dda4df505981bd8d090971e478867 (commit) Those revisions listed above that are new to this repository have not appeared on any other notification email; so we list those revisions in full, below. - Log ----------------------------------------------------------------- commit b7e4c26b9bb10e6e0ebfb07e5d43f0d62526cde2 Author: David Brownell <dbr...@us...> Date: Thu Nov 5 20:36:42 2009 -0800 ARM7TDMI: remove forward decls The forward decls are just code clutter; remove them, by moving their references after definitions. This is another file which never needed even one internal forward declaration. Also shrink a few overly-long lines with function declarations or definitions; get rid of arm7tdmi_register_commands(), it's not needed (just delegated); minor whitespace declutter. Signed-off-by: David Brownell <dbr...@us...> diff --git a/src/target/arm7tdmi.c b/src/target/arm7tdmi.c index ec7b4f9..27a8337 100644 --- a/src/target/arm7tdmi.c +++ b/src/target/arm7tdmi.c @@ -31,57 +31,17 @@ #include "target_type.h" +/* + * For information about ARM7TDMI, see ARM DDI 0210C (r4p1) + * or ARM DDI 0029G (r3). "Debug In Depth", Appendix B, + * covers JTAG support. + */ + #if 0 #define _DEBUG_INSTRUCTION_EXECUTION_ #endif -/* forward declarations */ - -int arm7tdmi_target_create(struct target_s *target,Jim_Interp *interp); - -/* target function declarations */ -int arm7tdmi_poll(struct target_s *target); -int arm7tdmi_halt(target_t *target); - -target_type_t arm7tdmi_target = -{ - .name = "arm7tdmi", - - .poll = arm7_9_poll, - .arch_state = armv4_5_arch_state, - - .target_request_data = arm7_9_target_request_data, - - .halt = arm7_9_halt, - .resume = arm7_9_resume, - .step = arm7_9_step, - - .assert_reset = arm7_9_assert_reset, - .deassert_reset = arm7_9_deassert_reset, - .soft_reset_halt = arm7_9_soft_reset_halt, - - .get_gdb_reg_list = armv4_5_get_gdb_reg_list, - - .read_memory = arm7_9_read_memory, - .write_memory = arm7_9_write_memory, - .bulk_write_memory = arm7_9_bulk_write_memory, - .checksum_memory = arm7_9_checksum_memory, - .blank_check_memory = arm7_9_blank_check_memory, - - .run_algorithm = armv4_5_run_algorithm, - - .add_breakpoint = arm7_9_add_breakpoint, - .remove_breakpoint = arm7_9_remove_breakpoint, - .add_watchpoint = arm7_9_add_watchpoint, - .remove_watchpoint = arm7_9_remove_watchpoint, - - .register_commands = arm7tdmi_register_commands, - .target_create = arm7tdmi_target_create, - .init_target = arm7tdmi_init_target, - .examine = arm7tdmi_examine, -}; - -int arm7tdmi_examine_debug_reason(target_t *target) +static int arm7tdmi_examine_debug_reason(target_t *target) { int retval = ERROR_OK; /* get pointers to arch-specific information */ @@ -136,7 +96,8 @@ int arm7tdmi_examine_debug_reason(target_t *target) return ERROR_OK; } -static int arm7tdmi_num_bits[]={1, 32}; +static const int arm7tdmi_num_bits[] = {1, 32}; + static __inline int arm7tdmi_clock_out_inner(arm_jtag_t *jtag_info, uint32_t out, int breakpoint) { uint32_t values[2]={breakpoint, flip_u32(out, 32)}; @@ -152,8 +113,13 @@ static __inline int arm7tdmi_clock_out_inner(arm_jtag_t *jtag_info, uint32_t out return ERROR_OK; } -/* put an instruction in the ARM7TDMI pipeline or write the data bus, and optionally read data */ -static __inline int arm7tdmi_clock_out(arm_jtag_t *jtag_info, uint32_t out, uint32_t *deprecated, int breakpoint) +/* put an instruction in the ARM7TDMI pipeline or write the data bus, + * and optionally read data + * + * FIXME remove the unused "deprecated" parameter + */ +static __inline int arm7tdmi_clock_out(arm_jtag_t *jtag_info, + uint32_t out, uint32_t *deprecated, int breakpoint) { jtag_set_end_state(TAP_DRPAUSE); arm_jtag_scann(jtag_info, 0x1); @@ -163,7 +129,7 @@ static __inline int arm7tdmi_clock_out(arm_jtag_t *jtag_info, uint32_t out, uint } /* clock the target, reading the databus */ -int arm7tdmi_clock_data_in(arm_jtag_t *jtag_info, uint32_t *in) +static int arm7tdmi_clock_data_in(arm_jtag_t *jtag_info, uint32_t *in) { int retval = ERROR_OK; scan_field_t fields[2]; @@ -192,21 +158,13 @@ int arm7tdmi_clock_data_in(arm_jtag_t *jtag_info, uint32_t *in) jtag_add_runtest(0, jtag_get_end_state()); #ifdef _DEBUG_INSTRUCTION_EXECUTION_ -{ - if ((retval = jtag_execute_queue()) != ERROR_OK) - { - return retval; - } + if ((retval = jtag_execute_queue()) != ERROR_OK) + return retval; - if (in) - { - LOG_DEBUG("in: 0x%8.8x", *in); - } - else - { - LOG_ERROR("BUG: called with in == NULL"); - } -} + if (in) + LOG_DEBUG("in: 0x%8.8x", *in); + else + LOG_ERROR("BUG: called with in == NULL"); #endif return ERROR_OK; @@ -243,9 +201,12 @@ void arm_endianness(uint8_t *tmp, void *in, int size, int be, int flip) } } -static int arm7endianness(jtag_callback_data_t arg, jtag_callback_data_t size, jtag_callback_data_t be, jtag_callback_data_t captured) +static int arm7endianness(jtag_callback_data_t arg, + jtag_callback_data_t size, jtag_callback_data_t be, + jtag_callback_data_t captured) { - uint8_t *in = (uint8_t *)arg; + uint8_t *in = (uint8_t *)arg; + arm_endianness((uint8_t *)captured, in, (int)size, (int)be, 1); return ERROR_OK; } @@ -254,7 +215,8 @@ static int arm7endianness(jtag_callback_data_t arg, jtag_callback_data_t size, j * the *in pointer points to a buffer where elements of 'size' bytes * are stored in big (be == 1) or little (be == 0) endianness */ -int arm7tdmi_clock_data_in_endianness(arm_jtag_t *jtag_info, void *in, int size, int be) +static int arm7tdmi_clock_data_in_endianness(arm_jtag_t *jtag_info, + void *in, int size, int be) { int retval = ERROR_OK; scan_field_t fields[2]; @@ -303,7 +265,8 @@ int arm7tdmi_clock_data_in_endianness(arm_jtag_t *jtag_info, void *in, int size, return ERROR_OK; } -void arm7tdmi_change_to_arm(target_t *target, uint32_t *r0, uint32_t *pc) +static void arm7tdmi_change_to_arm(target_t *target, + uint32_t *r0, uint32_t *pc) { /* get pointers to arch-specific information */ armv4_5_common_t *armv4_5 = target->arch_info; @@ -360,7 +323,8 @@ void arm7tdmi_change_to_arm(target_t *target, uint32_t *r0, uint32_t *pc) * The solution is to arrange for a large out/in scan in this loop and * and convert data afterwards. */ -void arm7tdmi_read_core_regs(target_t *target, uint32_t mask, uint32_t* core_regs[16]) +static void arm7tdmi_read_core_regs(target_t *target, + uint32_t mask, uint32_t* core_regs[16]) { int i; /* get pointers to arch-specific information */ @@ -386,7 +350,8 @@ void arm7tdmi_read_core_regs(target_t *target, uint32_t mask, uint32_t* core_reg } } -void arm7tdmi_read_core_regs_target_buffer(target_t *target, uint32_t mask, void* buffer, int size) +static void arm7tdmi_read_core_regs_target_buffer(target_t *target, + uint32_t mask, void* buffer, int size) { int i; /* get pointers to arch-specific information */ @@ -429,7 +394,7 @@ void arm7tdmi_read_core_regs_target_buffer(target_t *target, uint32_t mask, void } } -void arm7tdmi_read_xpsr(target_t *target, uint32_t *xpsr, int spsr) +static void arm7tdmi_read_xpsr(target_t *target, uint32_t *xpsr, int spsr) { /* get pointers to arch-specific information */ armv4_5_common_t *armv4_5 = target->arch_info; @@ -449,7 +414,7 @@ void arm7tdmi_read_xpsr(target_t *target, uint32_t *xpsr, int spsr) arm7tdmi_clock_data_in(jtag_info, xpsr); } -void arm7tdmi_write_xpsr(target_t *target, uint32_t xpsr, int spsr) +static void arm7tdmi_write_xpsr(target_t *target, uint32_t xpsr, int spsr) { /* get pointers to arch-specific information */ armv4_5_common_t *armv4_5 = target->arch_info; @@ -480,7 +445,8 @@ void arm7tdmi_write_xpsr(target_t *target, uint32_t xpsr, int spsr) arm7tdmi_clock_out(jtag_info, ARMV4_5_NOP, NULL, 0); } -void arm7tdmi_write_xpsr_im8(target_t *target, uint8_t xpsr_im, int rot, int spsr) +static void arm7tdmi_write_xpsr_im8(target_t *target, + uint8_t xpsr_im, int rot, int spsr) { /* get pointers to arch-specific information */ armv4_5_common_t *armv4_5 = target->arch_info; @@ -499,7 +465,8 @@ void arm7tdmi_write_xpsr_im8(target_t *target, uint8_t xpsr_im, int rot, int sps arm7tdmi_clock_out(jtag_info, ARMV4_5_NOP, NULL, 0); } -void arm7tdmi_write_core_regs(target_t *target, uint32_t mask, uint32_t core_regs[16]) +static void arm7tdmi_write_core_regs(target_t *target, + uint32_t mask, uint32_t core_regs[16]) { int i; /* get pointers to arch-specific information */ @@ -526,7 +493,7 @@ void arm7tdmi_write_core_regs(target_t *target, uint32_t mask, uint32_t core_reg arm7tdmi_clock_out_inner(jtag_info, ARMV4_5_NOP, 0); } -void arm7tdmi_load_word_regs(target_t *target, uint32_t mask) +static void arm7tdmi_load_word_regs(target_t *target, uint32_t mask) { /* get pointers to arch-specific information */ armv4_5_common_t *armv4_5 = target->arch_info; @@ -539,7 +506,7 @@ void arm7tdmi_load_word_regs(target_t *target, uint32_t mask) arm7tdmi_clock_out(jtag_info, ARMV4_5_LDMIA(0, mask & 0xffff, 0, 1), NULL, 0); } -void arm7tdmi_load_hword_reg(target_t *target, int num) +static void arm7tdmi_load_hword_reg(target_t *target, int num) { /* get pointers to arch-specific information */ armv4_5_common_t *armv4_5 = target->arch_info; @@ -552,7 +519,7 @@ void arm7tdmi_load_hword_reg(target_t *target, int num) arm7tdmi_clock_out(jtag_info, ARMV4_5_LDRH_IP(num, 0), NULL, 0); } -void arm7tdmi_load_byte_reg(target_t *target, int num) +static void arm7tdmi_load_byte_reg(target_t *target, int num) { /* get pointers to arch-specific information */ armv4_5_common_t *armv4_5 = target->arch_info; @@ -565,7 +532,7 @@ void arm7tdmi_load_byte_reg(target_t *target, int num) arm7tdmi_clock_out(jtag_info, ARMV4_5_LDRB_IP(num, 0), NULL, 0); } -void arm7tdmi_store_word_regs(target_t *target, uint32_t mask) +static void arm7tdmi_store_word_regs(target_t *target, uint32_t mask) { /* get pointers to arch-specific information */ armv4_5_common_t *armv4_5 = target->arch_info; @@ -578,7 +545,7 @@ void arm7tdmi_store_word_regs(target_t *target, uint32_t mask) arm7tdmi_clock_out(jtag_info, ARMV4_5_STMIA(0, mask, 0, 1), NULL, 0); } -void arm7tdmi_store_hword_reg(target_t *target, int num) +static void arm7tdmi_store_hword_reg(target_t *target, int num) { /* get pointers to arch-specific information */ armv4_5_common_t *armv4_5 = target->arch_info; @@ -591,7 +558,7 @@ void arm7tdmi_store_hword_reg(target_t *target, int num) arm7tdmi_clock_out(jtag_info, ARMV4_5_STRH_IP(num, 0), NULL, 0); } -void arm7tdmi_store_byte_reg(target_t *target, int num) +static void arm7tdmi_store_byte_reg(target_t *target, int num) { /* get pointers to arch-specific information */ armv4_5_common_t *armv4_5 = target->arch_info; @@ -604,7 +571,7 @@ void arm7tdmi_store_byte_reg(target_t *target, int num) arm7tdmi_clock_out(jtag_info, ARMV4_5_STRB_IP(num, 0), NULL, 0); } -void arm7tdmi_write_pc(target_t *target, uint32_t pc) +static void arm7tdmi_write_pc(target_t *target, uint32_t pc) { /* get pointers to arch-specific information */ armv4_5_common_t *armv4_5 = target->arch_info; @@ -631,7 +598,7 @@ void arm7tdmi_write_pc(target_t *target, uint32_t pc) arm7tdmi_clock_out_inner(jtag_info, ARMV4_5_NOP, 0); } -void arm7tdmi_branch_resume(target_t *target) +static void arm7tdmi_branch_resume(target_t *target) { /* get pointers to arch-specific information */ armv4_5_common_t *armv4_5 = target->arch_info; @@ -642,7 +609,7 @@ void arm7tdmi_branch_resume(target_t *target) arm7tdmi_clock_out_inner(jtag_info, ARMV4_5_B(0xfffffa, 0), 0); } -void arm7tdmi_branch_resume_thumb(target_t *target) +static void arm7tdmi_branch_resume_thumb(target_t *target) { LOG_DEBUG("-"); @@ -703,7 +670,7 @@ void arm7tdmi_branch_resume_thumb(target_t *target) arm7tdmi_clock_out(jtag_info, ARMV4_5_T_B(0x7f8), NULL, 0); } -void arm7tdmi_build_reg_cache(target_t *target) +static void arm7tdmi_build_reg_cache(target_t *target) { reg_cache_t **cache_p = register_get_last_cache_p(&target->reg_cache); /* get pointers to arch-specific information */ @@ -814,7 +781,7 @@ int arm7tdmi_init_arch_info(target_t *target, arm7tdmi_common_t *arm7tdmi, jtag_ return ERROR_OK; } -int arm7tdmi_target_create(struct target_s *target, Jim_Interp *interp) +static int arm7tdmi_target_create(struct target_s *target, Jim_Interp *interp) { arm7tdmi_common_t *arm7tdmi; @@ -825,11 +792,41 @@ int arm7tdmi_target_create(struct target_s *target, Jim_Interp *interp) return ERROR_OK; } -int arm7tdmi_register_commands(struct command_context_s *cmd_ctx) +/** Holds methods for ARM7TDMI targets. */ +target_type_t arm7tdmi_target = { - int retval; + .name = "arm7tdmi", - retval = arm7_9_register_commands(cmd_ctx); + .poll = arm7_9_poll, + .arch_state = armv4_5_arch_state, - return retval; -} + .target_request_data = arm7_9_target_request_data, + + .halt = arm7_9_halt, + .resume = arm7_9_resume, + .step = arm7_9_step, + + .assert_reset = arm7_9_assert_reset, + .deassert_reset = arm7_9_deassert_reset, + .soft_reset_halt = arm7_9_soft_reset_halt, + + .get_gdb_reg_list = armv4_5_get_gdb_reg_list, + + .read_memory = arm7_9_read_memory, + .write_memory = arm7_9_write_memory, + .bulk_write_memory = arm7_9_bulk_write_memory, + .checksum_memory = arm7_9_checksum_memory, + .blank_check_memory = arm7_9_blank_check_memory, + + .run_algorithm = armv4_5_run_algorithm, + + .add_breakpoint = arm7_9_add_breakpoint, + .remove_breakpoint = arm7_9_remove_breakpoint, + .add_watchpoint = arm7_9_add_watchpoint, + .remove_watchpoint = arm7_9_remove_watchpoint, + + .register_commands = arm7_9_register_commands, + .target_create = arm7tdmi_target_create, + .init_target = arm7tdmi_init_target, + .examine = arm7tdmi_examine, +}; diff --git a/src/target/arm7tdmi.h b/src/target/arm7tdmi.h index b3ece44..da5c040 100644 --- a/src/target/arm7tdmi.h +++ b/src/target/arm7tdmi.h @@ -34,7 +34,6 @@ typedef struct arm7tdmi_common_s arm7_9_common_t arm7_9_common; } arm7tdmi_common_t; -int arm7tdmi_register_commands(struct command_context_s *cmd_ctx); int arm7tdmi_init_arch_info(target_t *target, arm7tdmi_common_t *arm7tdmi, jtag_tap_t *tap); int arm7tdmi_init_target(struct command_context_s *cmd_ctx, struct target_s *target); int arm7tdmi_examine(struct target_s *target); commit 1e57376c1a54e2a6097d1578aaeb387276377969 Author: David Brownell <dbr...@us...> Date: Thu Nov 5 20:36:27 2009 -0800 ARM720: remove exports and forward decls Unneeded exports cause confusion about the module interfaces. Make all functions static. Add a short header comment. The forward decls are just code clutter; remove them, by moving their references after definitions. This is another file which never needed even one internal forward declaration. Remove unneeded indirection for the write_memory() method. Make a table static, remove a can't-happen case with nasty exit(). Signed-off-by: David Brownell <dbr...@us...> diff --git a/src/target/arm720t.c b/src/target/arm720t.c index 836d347..cb21d5f 100644 --- a/src/target/arm720t.c +++ b/src/target/arm720t.c @@ -29,70 +29,17 @@ #include "target_type.h" +/* + * ARM720 is an ARM7TDMI-S with MMU and ETM7. For information, see + * ARM DDI 0229C especially Chapter 9 about debug support. + */ + #if 0 #define _DEBUG_INSTRUCTION_EXECUTION_ #endif -/* cli handling */ -int arm720t_register_commands(struct command_context_s *cmd_ctx); - -int arm720t_handle_cp15_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc); - -/* forward declarations */ -int arm720t_target_create(struct target_s *target,Jim_Interp *interp); -int arm720t_init_target(struct command_context_s *cmd_ctx, struct target_s *target); -int arm720t_arch_state(struct target_s *target); -int arm720t_read_memory(struct target_s *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer); -int arm720t_write_memory(struct target_s *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer); -int arm720t_read_phys_memory(struct target_s *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer); -int arm720t_write_phys_memory(struct target_s *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer); -int arm720t_soft_reset_halt(struct target_s *target); - -static int arm720t_mrc(target_t *target, int cpnum, uint32_t op1, uint32_t op2, uint32_t CRn, uint32_t CRm, uint32_t *value); -static int arm720t_mcr(target_t *target, int cpnum, uint32_t op1, uint32_t op2, uint32_t CRn, uint32_t CRm, uint32_t value); - -target_type_t arm720t_target = -{ - .name = "arm720t", - - .poll = arm7_9_poll, - .arch_state = arm720t_arch_state, - - .halt = arm7_9_halt, - .resume = arm7_9_resume, - .step = arm7_9_step, - - .assert_reset = arm7_9_assert_reset, - .deassert_reset = arm7_9_deassert_reset, - .soft_reset_halt = arm720t_soft_reset_halt, - - .get_gdb_reg_list = armv4_5_get_gdb_reg_list, - - .read_memory = arm720t_read_memory, - .write_memory = arm720t_write_memory, - .read_phys_memory = arm720t_read_phys_memory, - .write_phys_memory = arm720t_write_phys_memory, - .bulk_write_memory = arm7_9_bulk_write_memory, - .checksum_memory = arm7_9_checksum_memory, - .blank_check_memory = arm7_9_blank_check_memory, - - .run_algorithm = armv4_5_run_algorithm, - - .add_breakpoint = arm7_9_add_breakpoint, - .remove_breakpoint = arm7_9_remove_breakpoint, - .add_watchpoint = arm7_9_add_watchpoint, - .remove_watchpoint = arm7_9_remove_watchpoint, - - .register_commands = arm720t_register_commands, - .target_create = arm720t_target_create, - .init_target = arm720t_init_target, - .examine = arm7tdmi_examine, - .mrc = arm720t_mrc, - .mcr = arm720t_mcr, - -}; - -int arm720t_scan_cp15(target_t *target, uint32_t out, uint32_t *in, int instruction, int clock) +static int arm720t_scan_cp15(target_t *target, + uint32_t out, uint32_t *in, int instruction, int clock) { int retval = ERROR_OK; armv4_5_common_t *armv4_5 = target->arch_info; @@ -154,7 +101,7 @@ int arm720t_scan_cp15(target_t *target, uint32_t out, uint32_t *in, int instruct return ERROR_OK; } -int arm720t_read_cp15(target_t *target, uint32_t opcode, uint32_t *value) +static int arm720t_read_cp15(target_t *target, uint32_t opcode, uint32_t *value) { /* fetch CP15 opcode */ arm720t_scan_cp15(target, opcode, NULL, 1, 1); @@ -171,7 +118,7 @@ int arm720t_read_cp15(target_t *target, uint32_t opcode, uint32_t *value) return ERROR_OK; } -int arm720t_write_cp15(target_t *target, uint32_t opcode, uint32_t value) +static int arm720t_write_cp15(target_t *target, uint32_t opcode, uint32_t value) { /* fetch CP15 opcode */ arm720t_scan_cp15(target, opcode, NULL, 1, 1); @@ -187,7 +134,7 @@ int arm720t_write_cp15(target_t *target, uint32_t opcode, uint32_t value) return ERROR_OK; } -uint32_t arm720t_get_ttb(target_t *target) +static uint32_t arm720t_get_ttb(target_t *target) { uint32_t ttb = 0x0; @@ -199,7 +146,8 @@ uint32_t arm720t_get_ttb(target_t *target) return ttb; } -void arm720t_disable_mmu_caches(target_t *target, int mmu, int d_u_cache, int i_cache) +static void arm720t_disable_mmu_caches(target_t *target, + int mmu, int d_u_cache, int i_cache) { uint32_t cp15_control; @@ -216,7 +164,8 @@ void arm720t_disable_mmu_caches(target_t *target, int mmu, int d_u_cache, int i_ arm720t_write_cp15(target, 0xee010f10, cp15_control); } -void arm720t_enable_mmu_caches(target_t *target, int mmu, int d_u_cache, int i_cache) +static void arm720t_enable_mmu_caches(target_t *target, + int mmu, int d_u_cache, int i_cache) { uint32_t cp15_control; @@ -233,7 +182,7 @@ void arm720t_enable_mmu_caches(target_t *target, int mmu, int d_u_cache, int i_c arm720t_write_cp15(target, 0xee010f10, cp15_control); } -void arm720t_post_debug_entry(target_t *target) +static void arm720t_post_debug_entry(target_t *target) { armv4_5_common_t *armv4_5 = target->arch_info; arm7_9_common_t *arm7_9 = armv4_5->arch_info; @@ -255,7 +204,7 @@ void arm720t_post_debug_entry(target_t *target) jtag_execute_queue(); } -void arm720t_pre_restore_context(target_t *target) +static void arm720t_pre_restore_context(target_t *target) { armv4_5_common_t *armv4_5 = target->arch_info; arm7_9_common_t *arm7_9 = armv4_5->arch_info; @@ -267,7 +216,9 @@ void arm720t_pre_restore_context(target_t *target) arm720t_write_cp15(target, 0xee060f10, arm720t->far_reg); } -int arm720t_get_arch_pointers(target_t *target, armv4_5_common_t **armv4_5_p, arm7_9_common_t **arm7_9_p, arm7tdmi_common_t **arm7tdmi_p, arm720t_common_t **arm720t_p) +static int arm720t_get_arch_pointers(target_t *target, + armv4_5_common_t **armv4_5_p, arm7_9_common_t **arm7_9_p, + arm7tdmi_common_t **arm7tdmi_p, arm720t_common_t **arm720t_p) { armv4_5_common_t *armv4_5 = target->arch_info; arm7_9_common_t *arm7_9; @@ -305,24 +256,18 @@ int arm720t_get_arch_pointers(target_t *target, armv4_5_common_t **armv4_5_p, ar return ERROR_OK; } -int arm720t_arch_state(struct target_s *target) +static int arm720t_arch_state(struct target_s *target) { armv4_5_common_t *armv4_5 = target->arch_info; arm7_9_common_t *arm7_9 = armv4_5->arch_info; arm7tdmi_common_t *arm7tdmi = arm7_9->arch_info; arm720t_common_t *arm720t = arm7tdmi->arch_info; - char *state[] = + static const char *state[] = { "disabled", "enabled" }; - if (armv4_5->common_magic != ARMV4_5_COMMON_MAGIC) - { - LOG_ERROR("BUG: called for a non-ARMv4/5 target"); - exit(-1); - } - LOG_USER("target halted in %s state due to %s, current mode: %s\n" "cpsr: 0x%8.8" PRIx32 " pc: 0x%8.8" PRIx32 "\n" "MMU: %s, Cache: %s", @@ -337,7 +282,8 @@ int arm720t_arch_state(struct target_s *target) return ERROR_OK; } -int arm720t_read_memory(struct target_s *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer) +static int arm720t_read_memory(struct target_s *target, + uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer) { int retval; armv4_5_common_t *armv4_5 = target->arch_info; @@ -357,18 +303,8 @@ int arm720t_read_memory(struct target_s *target, uint32_t address, uint32_t size return retval; } -int arm720t_write_memory(struct target_s *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer) -{ - int retval; - - if ((retval = arm7_9_write_memory(target, address, size, count, buffer)) != ERROR_OK) - return retval; - - return retval; -} - - -int arm720t_read_phys_memory(struct target_s *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer) +static int arm720t_read_phys_memory(struct target_s *target, + uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer) { armv4_5_common_t *armv4_5 = target->arch_info; arm7_9_common_t *arm7_9 = armv4_5->arch_info; @@ -378,7 +314,8 @@ int arm720t_read_phys_memory(struct target_s *target, uint32_t address, uint32_t return armv4_5_mmu_read_physical(target, &arm720t->armv4_5_mmu, address, size, count, buffer); } -int arm720t_write_phys_memory(struct target_s *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer) +static int arm720t_write_phys_memory(struct target_s *target, + uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer) { armv4_5_common_t *armv4_5 = target->arch_info; arm7_9_common_t *arm7_9 = armv4_5->arch_info; @@ -388,8 +325,7 @@ int arm720t_write_phys_memory(struct target_s *target, uint32_t address, uint32_ return armv4_5_mmu_write_physical(target, &arm720t->armv4_5_mmu, address, size, count, buffer); } - -int arm720t_soft_reset_halt(struct target_s *target) +static int arm720t_soft_reset_halt(struct target_s *target) { int retval = ERROR_OK; armv4_5_common_t *armv4_5 = target->arch_info; @@ -460,15 +396,13 @@ int arm720t_soft_reset_halt(struct target_s *target) return ERROR_OK; } -int arm720t_init_target(struct command_context_s *cmd_ctx, struct target_s *target) +static int arm720t_init_target(struct command_context_s *cmd_ctx, struct target_s *target) { - arm7tdmi_init_target(cmd_ctx, target); - - return ERROR_OK; + return arm7tdmi_init_target(cmd_ctx, target); } - -int arm720t_init_arch_info(target_t *target, arm720t_common_t *arm720t, jtag_tap_t *tap) +static int arm720t_init_arch_info(target_t *target, + arm720t_common_t *arm720t, jtag_tap_t *tap) { arm7tdmi_common_t *arm7tdmi = &arm720t->arm7tdmi_common; arm7_9_common_t *arm7_9 = &arm7tdmi->arm7_9_common; @@ -493,31 +427,15 @@ int arm720t_init_arch_info(target_t *target, arm720t_common_t *arm720t, jtag_tap return ERROR_OK; } -int arm720t_target_create(struct target_s *target, Jim_Interp *interp) +static int arm720t_target_create(struct target_s *target, Jim_Interp *interp) { arm720t_common_t *arm720t = calloc(1,sizeof(arm720t_common_t)); - arm720t_init_arch_info(target, arm720t, target->tap); - - return ERROR_OK; -} - -int arm720t_register_commands(struct command_context_s *cmd_ctx) -{ - int retval; - command_t *arm720t_cmd; - - - retval = arm7tdmi_register_commands(cmd_ctx); - - arm720t_cmd = register_command(cmd_ctx, NULL, "arm720t", NULL, COMMAND_ANY, "arm720t specific commands"); - - register_command(cmd_ctx, arm720t_cmd, "cp15", arm720t_handle_cp15_command, COMMAND_EXEC, "display/modify cp15 register <opcode> [value]"); - - return ERROR_OK; + return arm720t_init_arch_info(target, arm720t, target->tap); } -int arm720t_handle_cp15_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc) +static int arm720t_handle_cp15_command(struct command_context_s *cmd_ctx, + char *cmd, char **args, int argc) { int retval; target_t *target = get_current_target(cmd_ctx); @@ -580,7 +498,6 @@ int arm720t_handle_cp15_command(struct command_context_s *cmd_ctx, char *cmd, ch return ERROR_OK; } - static int arm720t_mrc(target_t *target, int cpnum, uint32_t op1, uint32_t op2, uint32_t CRn, uint32_t CRm, uint32_t *value) { if (cpnum!=15) @@ -604,4 +521,63 @@ static int arm720t_mcr(target_t *target, int cpnum, uint32_t op1, uint32_t op2, return arm720t_write_cp15(target, mrc_opcode(cpnum, op1, op2, CRn, CRm), value); } +static int arm720t_register_commands(struct command_context_s *cmd_ctx) +{ + int retval; + command_t *arm720t_cmd; + + + retval = arm7_9_register_commands(cmd_ctx); + + arm720t_cmd = register_command(cmd_ctx, NULL, "arm720t", + NULL, COMMAND_ANY, + "arm720t specific commands"); + + register_command(cmd_ctx, arm720t_cmd, "cp15", + arm720t_handle_cp15_command, COMMAND_EXEC, + "display/modify cp15 register <opcode> [value]"); + + return ERROR_OK; +} + +/** Holds methods for ARM720 targets. */ +target_type_t arm720t_target = +{ + .name = "arm720t", + + .poll = arm7_9_poll, + .arch_state = arm720t_arch_state, + + .halt = arm7_9_halt, + .resume = arm7_9_resume, + .step = arm7_9_step, + + .assert_reset = arm7_9_assert_reset, + .deassert_reset = arm7_9_deassert_reset, + .soft_reset_halt = arm720t_soft_reset_halt, + + .get_gdb_reg_list = armv4_5_get_gdb_reg_list, + + .read_memory = arm720t_read_memory, + .write_memory = arm7_9_write_memory, + .read_phys_memory = arm720t_read_phys_memory, + .write_phys_memory = arm720t_write_phys_memory, + .bulk_write_memory = arm7_9_bulk_write_memory, + .checksum_memory = arm7_9_checksum_memory, + .blank_check_memory = arm7_9_blank_check_memory, + .run_algorithm = armv4_5_run_algorithm, + + .add_breakpoint = arm7_9_add_breakpoint, + .remove_breakpoint = arm7_9_remove_breakpoint, + .add_watchpoint = arm7_9_add_watchpoint, + .remove_watchpoint = arm7_9_remove_watchpoint, + + .register_commands = arm720t_register_commands, + .target_create = arm720t_target_create, + .init_target = arm720t_init_target, + .examine = arm7tdmi_examine, + .mrc = arm720t_mrc, + .mcr = arm720t_mcr, + +}; commit dd96b2c28e8ab633678c13636410f9f9a541dbd3 Author: David Brownell <dbr...@us...> Date: Thu Nov 5 20:36:18 2009 -0800 FA526: remove exports and forward decls Unneeded exports cause confusion about the module interfaces. Make most functions static. The forward decls are just code clutter; remove them, by moving their references after definitions. This is another file which never needed even one internal forward declaration. Signed-off-by: David Brownell <dbr...@us...> diff --git a/src/target/fa526.c b/src/target/fa526.c index 4f8c3b2..53efaae 100644 --- a/src/target/fa526.c +++ b/src/target/fa526.c @@ -34,53 +34,13 @@ #include "arm920t.h" #include "target_type.h" -int fa526_target_create(struct target_s *target, Jim_Interp *interp); -int fa526_init_target(struct command_context_s *cmd_ctx, struct target_s *target); - -target_type_t fa526_target = -{ - .name = "fa526", - - .poll = arm7_9_poll, - .arch_state = arm920t_arch_state, - - .target_request_data = arm7_9_target_request_data, - - .halt = arm7_9_halt, - .resume = arm7_9_resume, - .step = arm7_9_step, - - .assert_reset = arm7_9_assert_reset, - .deassert_reset = arm7_9_deassert_reset, - .soft_reset_halt = arm920t_soft_reset_halt, - - .get_gdb_reg_list = armv4_5_get_gdb_reg_list, - - .read_memory = arm920t_read_memory, - .write_memory = arm920t_write_memory, - .bulk_write_memory = arm7_9_bulk_write_memory, - .checksum_memory = arm7_9_checksum_memory, - .blank_check_memory = arm7_9_blank_check_memory, - - .run_algorithm = armv4_5_run_algorithm, - - .add_breakpoint = arm7_9_add_breakpoint, - .remove_breakpoint = arm7_9_remove_breakpoint, - .add_watchpoint = arm7_9_add_watchpoint, - .remove_watchpoint = arm7_9_remove_watchpoint, - - .register_commands = arm920t_register_commands, - .target_create = fa526_target_create, - .init_target = fa526_init_target, - .examine = arm9tdmi_examine, -}; - -void fa526_change_to_arm(target_t *target, uint32_t *r0, uint32_t *pc) +static void fa526_change_to_arm(target_t *target, uint32_t *r0, uint32_t *pc) { LOG_ERROR("%s: there is no Thumb state on FA526", __func__); } -void fa526_read_core_regs(target_t *target, uint32_t mask, uint32_t* core_regs[16]) +static void fa526_read_core_regs(target_t *target, + uint32_t mask, uint32_t* core_regs[16]) { int i; /* get pointers to arch-specific information */ @@ -108,7 +68,8 @@ void fa526_read_core_regs(target_t *target, uint32_t mask, uint32_t* core_regs[1 } } -void fa526_read_core_regs_target_buffer(target_t *target, uint32_t mask, void* buffer, int size) +static void fa526_read_core_regs_target_buffer(target_t *target, + uint32_t mask, void* buffer, int size) { int i; /* get pointers to arch-specific information */ @@ -151,7 +112,7 @@ void fa526_read_core_regs_target_buffer(target_t *target, uint32_t mask, void* b } } -void fa526_read_xpsr(target_t *target, uint32_t *xpsr, int spsr) +static void fa526_read_xpsr(target_t *target, uint32_t *xpsr, int spsr) { /* get pointers to arch-specific information */ armv4_5_common_t *armv4_5 = target->arch_info; @@ -178,7 +139,7 @@ void fa526_read_xpsr(target_t *target, uint32_t *xpsr, int spsr) arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, xpsr, 0); } -void fa526_write_xpsr(target_t *target, uint32_t xpsr, int spsr) +static void fa526_write_xpsr(target_t *target, uint32_t xpsr, int spsr) { /* get pointers to arch-specific information */ armv4_5_common_t *armv4_5 = target->arch_info; @@ -216,7 +177,8 @@ void fa526_write_xpsr(target_t *target, uint32_t xpsr, int spsr) arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, NULL, 0); } -void fa526_write_xpsr_im8(target_t *target, uint8_t xpsr_im, int rot, int spsr) +static void fa526_write_xpsr_im8(target_t *target, + uint8_t xpsr_im, int rot, int spsr) { /* get pointers to arch-specific information */ armv4_5_common_t *armv4_5 = target->arch_info; @@ -244,7 +206,8 @@ void fa526_write_xpsr_im8(target_t *target, uint8_t xpsr_im, int rot, int spsr) } } -void fa526_write_core_regs(target_t *target, uint32_t mask, uint32_t core_regs[16]) +static void fa526_write_core_regs(target_t *target, + uint32_t mask, uint32_t core_regs[16]) { int i; /* get pointers to arch-specific information */ @@ -273,7 +236,7 @@ void fa526_write_core_regs(target_t *target, uint32_t mask, uint32_t core_regs[1 arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, NULL, 0); } -void fa526_write_pc(target_t *target, uint32_t pc) +static void fa526_write_pc(target_t *target, uint32_t pc) { /* get pointers to arch-specific information */ armv4_5_common_t *armv4_5 = target->arch_info; @@ -301,12 +264,13 @@ void fa526_write_pc(target_t *target, uint32_t pc) arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, NULL, 0); } -void fa526_branch_resume_thumb(target_t *target) +static void fa526_branch_resume_thumb(target_t *target) { LOG_ERROR("%s: there is no Thumb state on FA526", __func__); } -int fa526_init_arch_info_2(target_t *target, arm9tdmi_common_t *arm9tdmi, jtag_tap_t *tap) +static int fa526_init_arch_info_2(target_t *target, + arm9tdmi_common_t *arm9tdmi, jtag_tap_t *tap) { armv4_5_common_t *armv4_5; arm7_9_common_t *arm7_9; @@ -370,7 +334,8 @@ int fa526_init_arch_info_2(target_t *target, arm9tdmi_common_t *arm9tdmi, jtag_t return ERROR_OK; } -int fa526_init_arch_info(target_t *target, arm920t_common_t *arm920t, jtag_tap_t *tap) +static int fa526_init_arch_info(target_t *target, + arm920t_common_t *arm920t, jtag_tap_t *tap) { arm9tdmi_common_t *arm9tdmi = &arm920t->arm9tdmi_common; arm7_9_common_t *arm7_9 = &arm9tdmi->arm7_9_common; @@ -406,17 +371,48 @@ int fa526_init_arch_info(target_t *target, arm920t_common_t *arm920t, jtag_tap_t return ERROR_OK; } -int fa526_target_create(struct target_s *target, Jim_Interp *interp) +static int fa526_target_create(struct target_s *target, Jim_Interp *interp) { arm920t_common_t *arm920t = calloc(1,sizeof(arm920t_common_t)); - fa526_init_arch_info(target, arm920t, target->tap); - - return ERROR_OK; + return fa526_init_arch_info(target, arm920t, target->tap); } -int fa526_init_target(struct command_context_s *cmd_ctx, struct target_s *target) +/** Holds methods for FA526 targets. */ +target_type_t fa526_target = { - arm9tdmi_init_target(cmd_ctx, target); - return ERROR_OK; -} + .name = "fa526", + + .poll = arm7_9_poll, + .arch_state = arm920t_arch_state, + + .target_request_data = arm7_9_target_request_data, + + .halt = arm7_9_halt, + .resume = arm7_9_resume, + .step = arm7_9_step, + + .assert_reset = arm7_9_assert_reset, + .deassert_reset = arm7_9_deassert_reset, + .soft_reset_halt = arm920t_soft_reset_halt, + + .get_gdb_reg_list = armv4_5_get_gdb_reg_list, + + .read_memory = arm920t_read_memory, + .write_memory = arm920t_write_memory, + .bulk_write_memory = arm7_9_bulk_write_memory, + .checksum_memory = arm7_9_checksum_memory, + .blank_check_memory = arm7_9_blank_check_memory, + + .run_algorithm = armv4_5_run_algorithm, + + .add_breakpoint = arm7_9_add_breakpoint, + .remove_breakpoint = arm7_9_remove_breakpoint, + .add_watchpoint = arm7_9_add_watchpoint, + .remove_watchpoint = arm7_9_remove_watchpoint, + + .register_commands = arm920t_register_commands, + .target_create = fa526_target_create, + .init_target = arm9tdmi_init_target, + .examine = arm9tdmi_examine, +}; commit b52fa7492cfaf079145222d31eb8a2c9c6108ac4 Author: David Brownell <dbr...@us...> Date: Thu Nov 5 20:36:09 2009 -0800 ARM9TDMI: remove forward decls The forward decls are just code clutter; remove them, by moving their references after definitions. This is another file which never needed even one internal forward declaration. Also shrink a few overly-long lines with function declarations or definitions. Signed-off-by: David Brownell <dbr...@us...> diff --git a/src/target/arm9tdmi.c b/src/target/arm9tdmi.c index 72a24b4..3110f95 100644 --- a/src/target/arm9tdmi.c +++ b/src/target/arm9tdmi.c @@ -45,48 +45,7 @@ #define _DEBUG_INSTRUCTION_EXECUTION_ #endif -/* forward declarations */ -static int arm9tdmi_target_create(struct target_s *target, Jim_Interp *interp); - -target_type_t arm9tdmi_target = -{ - .name = "arm9tdmi", - - .poll = arm7_9_poll, - .arch_state = armv4_5_arch_state, - - .target_request_data = arm7_9_target_request_data, - - .halt = arm7_9_halt, - .resume = arm7_9_resume, - .step = arm7_9_step, - - .assert_reset = arm7_9_assert_reset, - .deassert_reset = arm7_9_deassert_reset, - .soft_reset_halt = arm7_9_soft_reset_halt, - - .get_gdb_reg_list = armv4_5_get_gdb_reg_list, - - .read_memory = arm7_9_read_memory, - .write_memory = arm7_9_write_memory, - .bulk_write_memory = arm7_9_bulk_write_memory, - .checksum_memory = arm7_9_checksum_memory, - .blank_check_memory = arm7_9_blank_check_memory, - - .run_algorithm = armv4_5_run_algorithm, - - .add_breakpoint = arm7_9_add_breakpoint, - .remove_breakpoint = arm7_9_remove_breakpoint, - .add_watchpoint = arm7_9_add_watchpoint, - .remove_watchpoint = arm7_9_remove_watchpoint, - - .register_commands = arm9tdmi_register_commands, - .target_create = arm9tdmi_target_create, - .init_target = arm9tdmi_init_target, - .examine = arm9tdmi_examine, -}; - -static arm9tdmi_vector_t arm9tdmi_vectors[] = +static const arm9tdmi_vector_t arm9tdmi_vectors[] = { {"reset", ARM9TDMI_RESET_VECTOR}, {"undef", ARM9TDMI_UNDEF_VECTOR}, @@ -164,8 +123,11 @@ int arm9tdmi_examine_debug_reason(target_t *target) return ERROR_OK; } -/* put an instruction in the ARM9TDMI pipeline or write the data bus, and optionally read data */ -int arm9tdmi_clock_out(arm_jtag_t *jtag_info, uint32_t instr, uint32_t out, uint32_t *in, int sysspeed) +/* put an instruction in the ARM9TDMI pipeline or write the data bus, + * and optionally read data + */ +int arm9tdmi_clock_out(arm_jtag_t *jtag_info, uint32_t instr, + uint32_t out, uint32_t *in, int sysspeed) { int retval = ERROR_OK; scan_field_t fields[3]; @@ -295,9 +257,12 @@ int arm9tdmi_clock_data_in(arm_jtag_t *jtag_info, uint32_t *in) extern void arm_endianness(uint8_t *tmp, void *in, int size, int be, int flip); -static int arm9endianness(jtag_callback_data_t arg, jtag_callback_data_t size, jtag_callback_data_t be, jtag_callback_data_t captured) +static int arm9endianness(jtag_callback_data_t arg, + jtag_callback_data_t size, jtag_callback_data_t be, + jtag_callback_data_t captured) { - uint8_t *in = (uint8_t *)arg; + uint8_t *in = (uint8_t *)arg; + arm_endianness((uint8_t *)captured, in, (int)size, (int)be, 0); return ERROR_OK; } @@ -306,7 +271,8 @@ static int arm9endianness(jtag_callback_data_t arg, jtag_callback_data_t size, j * the *in pointer points to a buffer where elements of 'size' bytes * are stored in big (be == 1) or little (be == 0) endianness */ -int arm9tdmi_clock_data_in_endianness(arm_jtag_t *jtag_info, void *in, int size, int be) +int arm9tdmi_clock_data_in_endianness(arm_jtag_t *jtag_info, + void *in, int size, int be) { int retval = ERROR_OK; scan_field_t fields[3]; @@ -417,7 +383,8 @@ static void arm9tdmi_change_to_arm(target_t *target, *pc -= 0xc; } -void arm9tdmi_read_core_regs(target_t *target, uint32_t mask, uint32_t* core_regs[16]) +void arm9tdmi_read_core_regs(target_t *target, + uint32_t mask, uint32_t* core_regs[16]) { int i; /* get pointers to arch-specific information */ @@ -572,7 +539,8 @@ static void arm9tdmi_write_xpsr_im8(target_t *target, } } -void arm9tdmi_write_core_regs(target_t *target, uint32_t mask, uint32_t core_regs[16]) +void arm9tdmi_write_core_regs(target_t *target, + uint32_t mask, uint32_t core_regs[16]) { int i; /* get pointers to arch-specific information */ @@ -849,11 +817,10 @@ int arm9tdmi_examine(struct target_s *target) return ERROR_OK; } -int arm9tdmi_init_target(struct command_context_s *cmd_ctx, struct target_s *target) +int arm9tdmi_init_target(struct command_context_s *cmd_ctx, + struct target_s *target) { - arm9tdmi_build_reg_cache(target); - return ERROR_OK; } @@ -1060,3 +1027,41 @@ int arm9tdmi_register_commands(struct command_context_s *cmd_ctx) return retval; } +/** Holds methods for ARM9TDMI targets. */ +target_type_t arm9tdmi_target = +{ + .name = "arm9tdmi", + + .poll = arm7_9_poll, + .arch_state = armv4_5_arch_state, + + .target_request_data = arm7_9_target_request_data, + + .halt = arm7_9_halt, + .resume = arm7_9_resume, + .step = arm7_9_step, + + .assert_reset = arm7_9_assert_reset, + .deassert_reset = arm7_9_deassert_reset, + .soft_reset_halt = arm7_9_soft_reset_halt, + + .get_gdb_reg_list = armv4_5_get_gdb_reg_list, + + .read_memory = arm7_9_read_memory, + .write_memory = arm7_9_write_memory, + .bulk_write_memory = arm7_9_bulk_write_memory, + .checksum_memory = arm7_9_checksum_memory, + .blank_check_memory = arm7_9_blank_check_memory, + + .run_algorithm = armv4_5_run_algorithm, + + .add_breakpoint = arm7_9_add_breakpoint, + .remove_breakpoint = arm7_9_remove_breakpoint, + .add_watchpoint = arm7_9_add_watchpoint, + .remove_watchpoint = arm7_9_remove_watchpoint, + + .register_commands = arm9tdmi_register_commands, + .target_create = arm9tdmi_target_create, + .init_target = arm9tdmi_init_target, + .examine = arm9tdmi_examine, +}; diff --git a/src/target/arm9tdmi.h b/src/target/arm9tdmi.h index 9dfa886..8f89316 100644 --- a/src/target/arm9tdmi.h +++ b/src/target/arm9tdmi.h @@ -52,16 +52,22 @@ enum arm9tdmi_vector ARM9TDMI_FIQ_VECTOR = 0x80, }; -extern int arm9tdmi_init_target(struct command_context_s *cmd_ctx, struct target_s *target); +extern int arm9tdmi_init_target(struct command_context_s *cmd_ctx, + struct target_s *target); int arm9tdmi_examine(struct target_s *target); -extern int arm9tdmi_init_arch_info(target_t *target, arm9tdmi_common_t *arm9tdmi, jtag_tap_t *tap); +extern int arm9tdmi_init_arch_info(target_t *target, + arm9tdmi_common_t *arm9tdmi, jtag_tap_t *tap); extern int arm9tdmi_register_commands(struct command_context_s *cmd_ctx); -extern int arm9tdmi_clock_out(arm_jtag_t *jtag_info, uint32_t instr, uint32_t out, uint32_t *in, int sysspeed); +extern int arm9tdmi_clock_out(arm_jtag_t *jtag_info, + uint32_t instr, uint32_t out, uint32_t *in, int sysspeed); extern int arm9tdmi_clock_data_in(arm_jtag_t *jtag_info, uint32_t *in); -extern int arm9tdmi_clock_data_in_endianness(arm_jtag_t *jtag_info, void *in, int size, int be); -extern void arm9tdmi_read_core_regs(target_t *target, uint32_t mask, uint32_t* core_regs[16]); -extern void arm9tdmi_write_core_regs(target_t *target, uint32_t mask, uint32_t core_regs[16]); +extern int arm9tdmi_clock_data_in_endianness(arm_jtag_t *jtag_info, + void *in, int size, int be); +extern void arm9tdmi_read_core_regs(target_t *target, + uint32_t mask, uint32_t* core_regs[16]); +extern void arm9tdmi_write_core_regs(target_t *target, + uint32_t mask, uint32_t core_regs[16]); extern int arm9tdmi_examine_debug_reason(target_t *target); commit 20ff0a9682090912e84cc5c80be92b1e0ea78216 Author: David Brownell <dbr...@us...> Date: Thu Nov 5 20:35:53 2009 -0800 ARM966: remove exports and forward decls Unneeded exports cause confusion about the module interfaces. Make most functions static. The forward decls are just code clutter; remove them, by moving their references after definitions. This is another file which never needed even one internal forward declaration. Also remove needless arm966e_init_target(), in favor of the arm9tdmi routine to which it delegates its work. This saved over 100 bytes of code on x86_32. Signed-off-by: David Brownell <dbr...@us...> diff --git a/src/target/arm966e.c b/src/target/arm966e.c index 5770895..30927f0 100644 --- a/src/target/arm966e.c +++ b/src/target/arm966e.c @@ -32,55 +32,6 @@ #define _DEBUG_INSTRUCTION_EXECUTION_ #endif -/* forward declarations */ -int arm966e_target_create(struct target_s *target, Jim_Interp *interp); -int arm966e_init_target(struct command_context_s *cmd_ctx, struct target_s *target); - -target_type_t arm966e_target = -{ - .name = "arm966e", - - .poll = arm7_9_poll, - .arch_state = armv4_5_arch_state, - - .target_request_data = arm7_9_target_request_data, - - .halt = arm7_9_halt, - .resume = arm7_9_resume, - .step = arm7_9_step, - - .assert_reset = arm7_9_assert_reset, - .deassert_reset = arm7_9_deassert_reset, - .soft_reset_halt = arm7_9_soft_reset_halt, - - .get_gdb_reg_list = armv4_5_get_gdb_reg_list, - - .read_memory = arm7_9_read_memory, - .write_memory = arm7_9_write_memory, - .bulk_write_memory = arm7_9_bulk_write_memory, - .checksum_memory = arm7_9_checksum_memory, - .blank_check_memory = arm7_9_blank_check_memory, - - .run_algorithm = armv4_5_run_algorithm, - - .add_breakpoint = arm7_9_add_breakpoint, - .remove_breakpoint = arm7_9_remove_breakpoint, - .add_watchpoint = arm7_9_add_watchpoint, - .remove_watchpoint = arm7_9_remove_watchpoint, - - .register_commands = arm966e_register_commands, - .target_create = arm966e_target_create, - .init_target = arm966e_init_target, - .examine = arm9tdmi_examine, -}; - -int arm966e_init_target(struct command_context_s *cmd_ctx, struct target_s *target) -{ - arm9tdmi_init_target(cmd_ctx, target); - - return ERROR_OK; -} - int arm966e_init_arch_info(target_t *target, arm966e_common_t *arm966e, jtag_tap_t *tap) { arm9tdmi_common_t *arm9tdmi = &arm966e->arm9tdmi_common; @@ -100,16 +51,16 @@ int arm966e_init_arch_info(target_t *target, arm966e_common_t *arm966e, jtag_tap return ERROR_OK; } -int arm966e_target_create(struct target_s *target, Jim_Interp *interp) +static int arm966e_target_create(struct target_s *target, Jim_Interp *interp) { arm966e_common_t *arm966e = calloc(1,sizeof(arm966e_common_t)); - arm966e_init_arch_info(target, arm966e, target->tap); - - return ERROR_OK; + return arm966e_init_arch_info(target, arm966e, target->tap); } -int arm966e_get_arch_pointers(target_t *target, armv4_5_common_t **armv4_5_p, arm7_9_common_t **arm7_9_p, arm9tdmi_common_t **arm9tdmi_p, arm966e_common_t **arm966e_p) +static int arm966e_get_arch_pointers(target_t *target, + armv4_5_common_t **armv4_5_p, arm7_9_common_t **arm7_9_p, + arm9tdmi_common_t **arm9tdmi_p, arm966e_common_t **arm966e_p) { armv4_5_common_t *armv4_5 = target->arch_info; arm7_9_common_t *arm7_9; @@ -147,7 +98,7 @@ int arm966e_get_arch_pointers(target_t *target, armv4_5_common_t **armv4_5_p, ar return ERROR_OK; } -int arm966e_read_cp15(target_t *target, int reg_addr, uint32_t *value) +static int arm966e_read_cp15(target_t *target, int reg_addr, uint32_t *value) { int retval = ERROR_OK; armv4_5_common_t *armv4_5 = target->arch_info; @@ -199,6 +150,7 @@ int arm966e_read_cp15(target_t *target, int reg_addr, uint32_t *value) return ERROR_OK; } +// EXPORTED to str9x (flash) int arm966e_write_cp15(target_t *target, int reg_addr, uint32_t value) { int retval = ERROR_OK; @@ -243,7 +195,8 @@ int arm966e_write_cp15(target_t *target, int reg_addr, uint32_t value) return ERROR_OK; } -int arm966e_handle_cp15_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc) +static int arm966e_handle_cp15_command(struct command_context_s *cmd_ctx, + char *cmd, char **args, int argc) { int retval; target_t *target = get_current_target(cmd_ctx); @@ -304,14 +257,58 @@ int arm966e_handle_cp15_command(struct command_context_s *cmd_ctx, char *cmd, ch return ERROR_OK; } +/** Registers commands used to access coprocessor resources. */ int arm966e_register_commands(struct command_context_s *cmd_ctx) { int retval; command_t *arm966e_cmd; retval = arm9tdmi_register_commands(cmd_ctx); - arm966e_cmd = register_command(cmd_ctx, NULL, "arm966e", NULL, COMMAND_ANY, "arm966e specific commands"); - register_command(cmd_ctx, arm966e_cmd, "cp15", arm966e_handle_cp15_command, COMMAND_EXEC, "display/modify cp15 register <num> [value]"); + arm966e_cmd = register_command(cmd_ctx, NULL, "arm966e", + NULL, COMMAND_ANY, + "arm966e specific commands"); + register_command(cmd_ctx, arm966e_cmd, "cp15", + arm966e_handle_cp15_command, COMMAND_EXEC, + "display/modify cp15 register <num> [value]"); return retval; } + +/** Holds methods for ARM966 targets. */ +target_type_t arm966e_target = +{ + .name = "arm966e", + + .poll = arm7_9_poll, + .arch_state = armv4_5_arch_state, + + .target_request_data = arm7_9_target_request_data, + + .halt = arm7_9_halt, + .resume = arm7_9_resume, + .step = arm7_9_step, + + .assert_reset = arm7_9_assert_reset, + .deassert_reset = arm7_9_deassert_reset, + .soft_reset_halt = arm7_9_soft_reset_halt, + + .get_gdb_reg_list = armv4_5_get_gdb_reg_list, + + .read_memory = arm7_9_read_memory, + .write_memory = arm7_9_write_memory, + .bulk_write_memory = arm7_9_bulk_write_memory, + .checksum_memory = arm7_9_checksum_memory, + .blank_check_memory = arm7_9_blank_check_memory, + + .run_algorithm = armv4_5_run_algorithm, + + .add_breakpoint = arm7_9_add_breakpoint, + .remove_breakpoint = arm7_9_remove_breakpoint, + .add_watchpoint = arm7_9_add_watchpoint, + .remove_watchpoint = arm7_9_remove_watchpoint, + + .register_commands = arm966e_register_commands, + .target_create = arm966e_target_create, + .init_target = arm9tdmi_init_target, + .examine = arm9tdmi_examine, +}; diff --git a/src/target/arm966e.h b/src/target/arm966e.h index c7a5b1b..21dee1e 100644 --- a/src/target/arm966e.h +++ b/src/target/arm966e.h @@ -36,7 +36,6 @@ typedef struct arm966e_common_s extern int arm966e_init_arch_info(target_t *target, arm966e_common_t *arm966e, jtag_tap_t *tap); extern int arm966e_register_commands(struct command_context_s *cmd_ctx); -extern int arm966e_read_cp15(target_t *target, int reg_addr, uint32_t *value); extern int arm966e_write_cp15(target_t *target, int reg_addr, uint32_t value); #endif /* ARM966E_H */ commit ed9ac9b6fe3257bb728db059f4ae689fc5469fdd Author: David Brownell <dbr...@us...> Date: Thu Nov 5 20:35:47 2009 -0800 ARM926: more cleanup An init_target() wrapper isn't needed, and target_create() can shrink a bit. Add a header comment and some doxygen. Remove arm926ejs_catch_broken_irscan() which has been a NOP for quite a few months now, and in any case duplicates logic in the JTAG core to validate IR capture data. But force the capture mask to 0x0f, so those tests are most effective. Signed-off-by: David Brownell <dbr...@us...> diff --git a/src/target/arm926ejs.c b/src/target/arm926ejs.c index 03adc77..7147dbf 100644 --- a/src/target/arm926ejs.c +++ b/src/target/arm926ejs.c @@ -29,32 +29,21 @@ #include "target_type.h" -#if 0 -#define _DEBUG_INSTRUCTION_EXECUTION_ -#endif +/* + * The ARM926 is built around the ARM9EJ-S core, and most JTAG docs + * are in the ARM9EJ-S Technical Reference Manual (ARM DDI 0222B) not + * the ARM926 manual (ARM DDI 0198E). The scan chains are: + * + * 1 ... core debugging + * 2 ... EmbeddedICE + * 3 ... external boundary scan (SoC-specific, unused here) + * 6 ... ETM + * 15 ... coprocessor 15 + */ -static int arm926ejs_catch_broken_irscan(uint8_t *captured, void *priv, - scan_field_t *field) -{ - /* FIX!!!! this code should be reenabled. For now it does not check - * the queue...*/ - return 0; #if 0 - /* The ARM926EJ-S' instruction register is 4 bits wide */ - uint8_t t = *captured & 0xf; - uint8_t t2 = *field->in_check_value & 0xf; - if (t == t2) - { - return ERROR_OK; - } - else if ((t == 0x0f) || (t == 0x00)) - { - LOG_DEBUG("caught ARM926EJ-S invalid Capture-IR result after CP15 access"); - return ERROR_OK; - } - return ERROR_JTAG_QUEUE_FAILED;; +#define _DEBUG_INSTRUCTION_EXECUTION_ #endif -} #define ARM926EJS_CP15_ADDR(opcode_1, opcode_2, CRn, CRm) ((opcode_1 << 11) | (opcode_2 << 8) | (CRn << 4) | (CRm << 0)) @@ -136,7 +125,7 @@ static int arm926ejs_cp15_read(target_t *target, uint32_t op1, uint32_t op2, LOG_DEBUG("addr: 0x%x value: %8.8x", address, *value); #endif - arm_jtag_set_instr(jtag_info, 0xc, &arm926ejs_catch_broken_irscan); + arm_jtag_set_instr(jtag_info, 0xc, NULL); return ERROR_OK; } @@ -227,7 +216,7 @@ static int arm926ejs_cp15_write(target_t *target, uint32_t op1, uint32_t op2, LOG_DEBUG("addr: 0x%x value: %8.8x", address, value); #endif - arm_jtag_set_instr(jtag_info, 0xf, &arm926ejs_catch_broken_irscan); + arm_jtag_set_instr(jtag_info, 0xf, NULL); return ERROR_OK; } @@ -543,6 +532,7 @@ static int arm926ejs_get_arch_pointers(target_t *target, return ERROR_OK; } +/** Logs summary of ARM926 state for a halted target. */ int arm926ejs_arch_state(struct target_s *target) { armv4_5_common_t *armv4_5 = target->arch_info; @@ -644,6 +634,7 @@ int arm926ejs_soft_reset_halt(struct target_s *target) return target_call_event_callbacks(target, TARGET_EVENT_HALTED); } +/** Writes a buffer, in the specified word size, with current MMU settings. */ int arm926ejs_write_memory(struct target_s *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer) { @@ -732,14 +723,6 @@ static int arm926ejs_read_phys_memory(struct target_s *target, return armv4_5_mmu_read_physical(target, &arm926ejs->armv4_5_mmu, address, size, count, buffer); } -static int arm926ejs_init_target(struct command_context_s *cmd_ctx, - struct target_s *target) -{ - arm9tdmi_init_target(cmd_ctx, target); - - return ERROR_OK; -} - int arm926ejs_init_arch_info(target_t *target, arm926ejs_common_t *arm926ejs, jtag_tap_t *tap) { @@ -782,9 +765,10 @@ static int arm926ejs_target_create(struct target_s *target, Jim_Interp *interp) { arm926ejs_common_t *arm926ejs = calloc(1,sizeof(arm926ejs_common_t)); - arm926ejs_init_arch_info(target, arm926ejs, target->tap); + /* ARM9EJ-S core always reports 0x1 in Capture-IR */ + target->tap->ir_capture_mask = 0x0f; - return ERROR_OK; + return arm926ejs_init_arch_info(target, arm926ejs, target->tap); } static int arm926ejs_handle_cp15_command(struct command_context_s *cmd_ctx, @@ -915,6 +899,7 @@ static int arm926ejs_mmu(struct target_s *target, int *enabled) return ERROR_OK; } +/** Registers commands to access coprocessor, cache, and debug resources. */ int arm926ejs_register_commands(struct command_context_s *cmd_ctx) { int retval; @@ -938,6 +923,7 @@ int arm926ejs_register_commands(struct command_context_s *cmd_ctx) return retval; } +/** Holds methods for ARM926 targets. */ target_type_t arm926ejs_target = { .name = "arm926ejs", @@ -972,7 +958,7 @@ target_type_t arm926ejs_target = .register_commands = arm926ejs_register_commands, .target_create = arm926ejs_target_create, - .init_target = arm926ejs_init_target, + .init_target = arm9tdmi_init_target, .examine = arm9tdmi_examine, .virt2phys = arm926ejs_virt2phys, .mmu = arm926ejs_mmu, @@ -982,4 +968,3 @@ target_type_t arm926ejs_target = .mrc = arm926ejs_mrc, .mcr = arm926ejs_mcr, }; - commit aab023570b7cc8f884715fc6a8af9c296d24ea8e Author: David Brownell <dbr...@us...> Date: Thu Nov 5 20:35:37 2009 -0800 ARM920: remove exports and forward decls Unneeded exports cause confusion about the module interfaces. Make most functions static. Add a short header comment. The forward decls are just code clutter; remove them, by moving their references after definitions. This is another file which never needed even one internal forward declaration. This saved almost 900 bytes of code on x86_32; it seems the compiler can leverage its knowledge that these functions are not called from the outside world... Signed-off-by: David Brownell <dbr...@us...> diff --git a/src/target/arm920t.c b/src/target/arm920t.c index 40f4b4d..1c63327 100644 --- a/src/target/arm920t.c +++ b/src/target/arm920t.c @@ -26,73 +26,33 @@ #include "target_type.h" +/* + * For information about the ARM920T, see ARM DDI 0151C especially + * Chapter 9 about debug support, which shows how to manipulate each + * of the different scan chains: + * + * 0 ... ARM920 signals, e.g. to rest of SOC (unused here) + * 1 ... debugging; watchpoint and breakpoint status, etc; also + * MMU and cache access in conjunction with scan chain 15 + * 2 ... EmbeddedICE + * 3 ... external boundary scan (SoC-specific, unused here) + * 4 ... access to cache tag RAM + * 6 ... ETM9 + * 15 ... access coprocessor 15, "physical" or "interpreted" modes + * "interpreted" works with a few actual MRC/MCR instructions + * "physical" provides register-like behaviors. + * + * The ARM922T is similar, but with smaller caches (8K each, vs 16K). + */ + #if 0 #define _DEBUG_INSTRUCTION_EXECUTION_ #endif -/* cli handling */ -int arm920t_handle_cp15_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc); -int arm920t_handle_cp15i_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc); -int arm920t_handle_cache_info_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc); -int arm920t_read_phys_memory(struct target_s *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer); -int arm920t_write_phys_memory(struct target_s *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer); - -int arm920t_handle_read_cache_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc); -int arm920t_handle_read_mmu_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc); - -/* forward declarations */ -int arm920t_target_create(struct target_s *target, Jim_Interp *interp); -int arm920t_init_target(struct command_context_s *cmd_ctx, struct target_s *target); - #define ARM920T_CP15_PHYS_ADDR(x, y, z) ((x << 5) | (y << 1) << (z)) -static int arm920t_mrc(target_t *target, int cpnum, uint32_t op1, uint32_t op2, uint32_t CRn, uint32_t CRm, uint32_t *value); -static int arm920t_mcr(target_t *target, int cpnum, uint32_t op1, uint32_t op2, uint32_t CRn, uint32_t CRm, uint32_t value); - - -target_type_t arm920t_target = -{ - .name = "arm920t", - - .poll = arm7_9_poll, - .arch_state = arm920t_arch_state, - - .target_request_data = arm7_9_target_request_data, - - .halt = arm7_9_halt, - .resume = arm7_9_resume, - .step = arm7_9_step, - - .assert_reset = arm7_9_assert_reset, - .deassert_reset = arm7_9_deassert_reset, - .soft_reset_halt = arm920t_soft_reset_halt, - - .get_gdb_reg_list = armv4_5_get_gdb_reg_list, - - .read_memory = arm920t_read_memory, - .write_memory = arm920t_write_memory, - .read_phys_memory = arm920t_read_phys_memory, - .write_phys_memory = arm920t_write_phys_memory, - .bulk_write_memory = arm7_9_bulk_write_memory, - .checksum_memory = arm7_9_checksum_memory, - .blank_check_memory = arm7_9_blank_check_memory, - - .run_algorithm = armv4_5_run_algorithm, - - .add_breakpoint = arm7_9_add_breakpoint, - .remove_breakpoint = arm7_9_remove_breakpoint, - .add_watchpoint = arm7_9_add_watchpoint, - .remove_watchpoint = arm7_9_remove_watchpoint, - - .register_commands = arm920t_register_commands, - .target_create = arm920t_target_create, - .init_target = arm920t_init_target, - .examine = arm9tdmi_examine, - .mrc = arm920t_mrc, - .mcr = arm920t_mcr, -}; - -int arm920t_read_cp15_physical(target_t *target, int reg_addr, uint32_t *value) +static int arm920t_read_cp15_physical(target_t *target, + int reg_addr, uint32_t *value) { armv4_5_common_t *armv4_5 = target->arch_info; arm7_9_common_t *arm7_9 = armv4_5->arch_info; @@ -134,7 +94,7 @@ int arm920t_read_cp15_physical(target_t *target, int reg_addr, uint32_t *value) jtag_add_callback(arm_le_to_h_u32, (jtag_callback_data_t)value); - #ifdef _DEBUG_INSTRUCTION_EXECUTION_ +#ifdef _DEBUG_INSTRUCTION_EXECUTION_ jtag_execute_queue(); LOG_DEBUG("addr: 0x%x value: %8.8x", reg_addr, *value); #endif @@ -142,7 +102,8 @@ int arm920t_read_cp15_physical(target_t *target, int reg_addr, ui... [truncated message content] |
From: Zach W. <zw...@us...> - 2009-11-06 03:24:52
|
This is an automated email from the git hooks/post-receive script. It was generated because a ref change was pushed to the repository containing the project "Main OpenOCD repository". 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so we list those revisions in full, below. - Log ----------------------------------------------------------------- commit 36b4ac90e45dda4df505981bd8d090971e478867 Author: Zachary T Welch <zw...@su...> Date: Fri Oct 23 01:18:25 2009 -0700 Improve str9xpec command argument parsing. diff --git a/src/flash/str9xpec.c b/src/flash/str9xpec.c index 33471e6..711ee7a 100644 --- a/src/flash/str9xpec.c +++ b/src/flash/str9xpec.c @@ -795,7 +795,6 @@ static int str9xpec_probe(struct flash_bank_s *bank) static int str9xpec_handle_part_id_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc) { - flash_bank_t *bank; scan_field_t field; uint8_t *buffer = NULL; jtag_tap_t *tap; @@ -803,16 +802,12 @@ static int str9xpec_handle_part_id_command(struct command_context_s *cmd_ctx, ch str9xpec_flash_controller_t *str9xpec_info = NULL; if (argc < 1) - { return ERROR_COMMAND_SYNTAX_ERROR; - } - bank = get_flash_bank_by_num(strtoul(args[0], NULL, 0)); - if (!bank) - { - command_print(cmd_ctx, "flash bank '#%s' is out of bounds", args[0]); - return ERROR_OK; - } + flash_bank_t *bank; + int retval = flash_command_get_bank_by_num(cmd_ctx, args[0], &bank); + if (ERROR_OK != retval) + return retval; str9xpec_info = bank->driver_priv; tap = str9xpec_info->tap; @@ -851,7 +846,6 @@ static int str9xpec_info(struct flash_bank_s *bank, char *buf, int buf_size) static int str9xpec_handle_flash_options_read_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc) { - flash_bank_t *bank; uint8_t status; str9xpec_flash_controller_t *str9xpec_info = NULL; @@ -861,12 +855,10 @@ static int str9xpec_handle_flash_options_read_command(struct command_context_s * return ERROR_OK; } - bank = get_flash_bank_by_num(strtoul(args[0], NULL, 0)); - if (!bank) - { - command_print(cmd_ctx, "flash bank '#%s' is out of bounds", args[0]); - return ERROR_OK; - } + flash_bank_t *bank; + int retval = flash_command_get_bank_by_num(cmd_ctx, args[0], &bank); + if (ERROR_OK != retval) + return retval; str9xpec_info = bank->driver_priv; @@ -971,7 +963,6 @@ static int str9xpec_write_options(struct flash_bank_s *bank) static int str9xpec_handle_flash_options_write_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc) { - flash_bank_t *bank; uint8_t status; if (argc < 1) @@ -980,12 +971,10 @@ static int str9xpec_handle_flash_options_write_command(struct command_context_s return ERROR_OK; } - bank = get_flash_bank_by_num(strtoul(args[0], NULL, 0)); - if (!bank) - { - command_print(cmd_ctx, "flash bank '#%s' is out of bounds", args[0]); - return ERROR_OK; - } + flash_bank_t *bank; + int retval = flash_command_get_bank_by_num(cmd_ctx, args[0], &bank); + if (ERROR_OK != retval) + return retval; status = str9xpec_write_options(bank); @@ -997,7 +986,6 @@ static int str9xpec_handle_flash_options_write_command(struct command_context_s static int str9xpec_handle_flash_options_cmap_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc) { - flash_bank_t *bank; str9xpec_flash_controller_t *str9xpec_info = NULL; if (argc < 2) @@ -1006,12 +994,10 @@ static int str9xpec_handle_flash_options_cmap_command(struct command_context_s * return ERROR_OK; } - bank = get_flash_bank_by_num(strtoul(args[0], NULL, 0)); - if (!bank) - { - command_print(cmd_ctx, "flash bank '#%s' is out of bounds", args[0]); - return ERROR_OK; - } + flash_bank_t *bank; + int retval = flash_command_get_bank_by_num(cmd_ctx, args[0], &bank); + if (ERROR_OK != retval) + return retval; str9xpec_info = bank->driver_priv; @@ -1029,7 +1015,6 @@ static int str9xpec_handle_flash_options_cmap_command(struct command_context_s * static int str9xpec_handle_flash_options_lvdthd_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc) { - flash_bank_t *bank; str9xpec_flash_controller_t *str9xpec_info = NULL; if (argc < 2) @@ -1038,12 +1023,10 @@ static int str9xpec_handle_flash_options_lvdthd_command(struct command_context_s return ERROR_OK; } - bank = get_flash_bank_by_num(strtoul(args[0], NULL, 0)); - if (!bank) - { - command_print(cmd_ctx, "flash bank '#%s' is out of bounds", args[0]); - return ERROR_OK; - } + flash_bank_t *bank; + int retval = flash_command_get_bank_by_num(cmd_ctx, args[0], &bank); + if (ERROR_OK != retval) + return retval; str9xpec_info = bank->driver_priv; @@ -1061,7 +1044,6 @@ static int str9xpec_handle_flash_options_lvdthd_command(struct command_context_s int str9xpec_handle_flash_options_lvdsel_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc) { - flash_bank_t *bank; str9xpec_flash_controller_t *str9xpec_info = NULL; if (argc < 2) @@ -1070,12 +1052,10 @@ int str9xpec_handle_flash_options_lvdsel_command(struct command_context_s *cmd_c return ERROR_OK; } - bank = get_flash_bank_by_num(strtoul(args[0], NULL, 0)); - if (!bank) - { - command_print(cmd_ctx, "flash bank '#%s' is out of bounds", args[0]); - return ERROR_OK; - } + flash_bank_t *bank; + int retval = flash_command_get_bank_by_num(cmd_ctx, args[0], &bank); + if (ERROR_OK != retval) + return retval; str9xpec_info = bank->driver_priv; @@ -1093,7 +1073,6 @@ int str9xpec_handle_flash_options_lvdsel_command(struct command_context_s *cmd_c static int str9xpec_handle_flash_options_lvdwarn_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc) { - flash_bank_t *bank; str9xpec_flash_controller_t *str9xpec_info = NULL; if (argc < 2) @@ -1102,12 +1081,10 @@ static int str9xpec_handle_flash_options_lvdwarn_command(struct command_context_ return ERROR_OK; } - bank = get_flash_bank_by_num(strtoul(args[0], NULL, 0)); - if (!bank) - { - command_print(cmd_ctx, "flash bank '#%s' is out of bounds", args[0]); - return ERROR_OK; - } + flash_bank_t *bank; + int retval = flash_command_get_bank_by_num(cmd_ctx, args[0], &bank); + if (ERROR_OK != retval) + return retval; str9xpec_info = bank->driver_priv; @@ -1126,7 +1103,6 @@ static int str9xpec_handle_flash_options_lvdwarn_command(struct command_context_ static int str9xpec_handle_flash_lock_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc) { uint8_t status; - flash_bank_t *bank; if (argc < 1) { @@ -1134,12 +1110,10 @@ static int str9xpec_handle_flash_lock_command(struct command_context_s *cmd_ctx, return ERROR_OK; } - bank = get_flash_bank_by_num(strtoul(args[0], NULL, 0)); - if (!bank) - { - command_print(cmd_ctx, "flash bank '#%s' is out of bounds", args[0]); - return ERROR_OK; - } + flash_bank_t *bank; + int retval = flash_command_get_bank_by_num(cmd_ctx, args[0], &bank); + if (ERROR_OK != retval) + return retval; status = str9xpec_lock_device(bank); @@ -1152,7 +1126,6 @@ static int str9xpec_handle_flash_lock_command(struct command_context_s *cmd_ctx, static int str9xpec_handle_flash_unlock_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc) { uint8_t status; - flash_bank_t *bank; if (argc < 1) { @@ -1160,12 +1133,10 @@ static int str9xpec_handle_flash_unlock_command(struct command_context_s *cmd_ct return ERROR_OK; } - bank = get_flash_bank_by_num(strtoul(args[0], NULL, 0)); - if (!bank) - { - command_print(cmd_ctx, "flash bank '#%s' is out of bounds", args[0]); - return ERROR_OK; - } + flash_bank_t *bank; + int retval = flash_command_get_bank_by_num(cmd_ctx, args[0], &bank); + if (ERROR_OK != retval) + return retval; status = str9xpec_unlock_device(bank); @@ -1177,8 +1148,6 @@ static int str9xpec_handle_flash_unlock_command(struct command_context_s *cmd_ct static int str9xpec_handle_flash_enable_turbo_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc) { - int retval; - flash_bank_t *bank; jtag_tap_t *tap0; jtag_tap_t *tap1; jtag_tap_t *tap2; @@ -1190,12 +1159,10 @@ static int str9xpec_handle_flash_enable_turbo_command(struct command_context_s * return ERROR_OK; } - bank = get_flash_bank_by_num(strtoul(args[0], NULL, 0)); - if (!bank) - { - command_print(cmd_ctx, "flash bank '#%s' is out of bounds", args[0]); - return ERROR_OK; - } + flash_bank_t *bank; + int retval = flash_command_get_bank_by_num(cmd_ctx, args[0], &bank); + if (ERROR_OK != retval) + return retval; str9xpec_info = bank->driver_priv; @@ -1230,7 +1197,6 @@ static int str9xpec_handle_flash_enable_turbo_command(struct command_context_s * static int str9xpec_handle_flash_disable_turbo_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc) { - flash_bank_t *bank; jtag_tap_t *tap; str9xpec_flash_controller_t *str9xpec_info = NULL; @@ -1240,12 +1206,10 @@ static int str9xpec_handle_flash_disable_turbo_command(struct command_context_s return ERROR_OK; } - bank = get_flash_bank_by_num(strtoul(args[0], NULL, 0)); - if (!bank) - { - command_print(cmd_ctx, "flash bank '#%s' is out of bounds", args[0]); - return ERROR_OK; - } + flash_bank_t *bank; + int retval = flash_command_get_bank_by_num(cmd_ctx, args[0], &bank); + if (ERROR_OK != retval) + return retval; str9xpec_info = bank->driver_priv; tap = str9xpec_info->tap; commit fa9e5d102708df2dcc0f070c847adf250ee1aa33 Author: Zachary T Welch <zw...@su...> Date: Fri Oct 23 01:25:22 2009 -0700 Improve str9x config command argument parsing. diff --git a/src/flash/str9x.c b/src/flash/str9x.c index 9d7b672..fe6c086 100644 --- a/src/flash/str9x.c +++ b/src/flash/str9x.c @@ -673,7 +673,6 @@ static int str9x_handle_flash_config_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc) { str9x_flash_bank_t *str9x_info; - flash_bank_t *bank; target_t *target = NULL; if (argc < 5) @@ -681,12 +680,16 @@ static int str9x_handle_flash_config_command(struct command_context_s *cmd_ctx, return ERROR_COMMAND_SYNTAX_ERROR; } - bank = get_flash_bank_by_num(strtoul(args[0], NULL, 0)); - if (!bank) - { - command_print(cmd_ctx, "flash bank '#%s' is out of bounds", args[0]); - return ERROR_OK; - } + flash_bank_t *bank; + int retval = flash_command_get_bank_by_num(cmd_ctx, args[0], &bank); + if (ERROR_OK != retval) + return retval; + + uint32_t bbsr, nbbsr, bbadr, nbbadr; + COMMAND_PARSE_NUMBER(u32, args[1], bbsr); + COMMAND_PARSE_NUMBER(u32, args[2], nbbsr); + COMMAND_PARSE_NUMBER(u32, args[3], bbadr); + COMMAND_PARSE_NUMBER(u32, args[4], nbbadr); str9x_info = bank->driver_priv; @@ -699,10 +702,10 @@ static int str9x_handle_flash_config_command(struct command_context_s *cmd_ctx, } /* config flash controller */ - target_write_u32(target, FLASH_BBSR, strtoul(args[1], NULL, 0)); - target_write_u32(target, FLASH_NBBSR, strtoul(args[2], NULL, 0)); - target_write_u32(target, FLASH_BBADR, (strtoul(args[3], NULL, 0) >> 2)); - target_write_u32(target, FLASH_NBBADR, (strtoul(args[4], NULL, 0) >> 2)); + target_write_u32(target, FLASH_BBSR, bbsr); + target_write_u32(target, FLASH_NBBSR, nbbsr); + target_write_u32(target, FLASH_BBADR, bbadr >> 2); + target_write_u32(target, FLASH_NBBADR, nbbadr >> 2); /* set bit 18 instruction TCM order as per flash programming manual */ arm966e_write_cp15(target, 62, 0x40000); commit 111b7a6a9dbd68c906b8a8dff6e6c34d780297db Author: Zachary T Welch <zw...@su...> Date: Fri Oct 23 01:32:20 2009 -0700 Improve str7x config command argument parsing. diff --git a/src/flash/str7x.c b/src/flash/str7x.c index 4d35748..650c0bc 100644 --- a/src/flash/str7x.c +++ b/src/flash/str7x.c @@ -640,12 +640,10 @@ static int str7x_info(struct flash_bank_s *bank, char *buf, int buf_size) static int str7x_handle_disable_jtag_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc) { - flash_bank_t *bank; target_t *target = NULL; str7x_flash_bank_t *str7x_info = NULL; uint32_t flash_cmd; - uint32_t retval; uint16_t ProtectionLevel = 0; uint16_t ProtectionRegs; @@ -655,12 +653,10 @@ static int str7x_handle_disable_jtag_command(struct command_context_s *cmd_ctx, return ERROR_OK; } - bank = get_flash_bank_by_num(strtoul(args[0], NULL, 0)); - if (!bank) - { - command_print(cmd_ctx, "str7x disable_jtag <bank> ok"); - return ERROR_OK; - } + flash_bank_t *bank; + int retval = flash_command_get_bank_by_num(cmd_ctx, args[0], &bank); + if (ERROR_OK != retval) + return retval; str7x_info = bank->driver_priv; @@ -673,15 +669,16 @@ static int str7x_handle_disable_jtag_command(struct command_context_s *cmd_ctx, } /* first we get protection status */ - target_read_u32(target, str7x_get_flash_adr(bank, FLASH_NVAPR0), &retval); + uint32_t reg; + target_read_u32(target, str7x_get_flash_adr(bank, FLASH_NVAPR0), ®); - if (!(retval & str7x_info->disable_bit)) + if (!(reg & str7x_info->disable_bit)) { ProtectionLevel = 1; } - target_read_u32(target, str7x_get_flash_adr(bank, FLASH_NVAPR1), &retval); - ProtectionRegs = ~(retval >> 16); + target_read_u32(target, str7x_get_flash_adr(bank, FLASH_NVAPR1), ®); + ProtectionRegs = ~(reg >> 16); while (((ProtectionRegs) != 0) && (ProtectionLevel < 16)) { commit aa9351ba46d0959555a4b293627ea14b5b42344f Author: Zachary T Welch <zw...@su...> Date: Thu Oct 22 22:33:12 2009 -0700 Improve stm32x.c command argument parsing. diff --git a/src/flash/stm32x.c b/src/flash/stm32x.c index 22bd4f9..158f264 100644 --- a/src/flash/stm32x.c +++ b/src/flash/stm32x.c @@ -942,7 +942,6 @@ static int stm32x_info(struct flash_bank_s *bank, char *buf, int buf_size) static int stm32x_handle_lock_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc) { - flash_bank_t *bank; target_t *target = NULL; stm32x_flash_bank_t *stm32x_info = NULL; @@ -952,12 +951,10 @@ static int stm32x_handle_lock_command(struct command_context_s *cmd_ctx, char *c return ERROR_OK; } - bank = get_flash_bank_by_num(strtoul(args[0], NULL, 0)); - if (!bank) - { - command_print(cmd_ctx, "flash bank '#%s' is out of bounds", args[0]); - return ERROR_OK; - } + flash_bank_t *bank; + int retval = flash_command_get_bank_by_num(cmd_ctx, args[0], &bank); + if (ERROR_OK != retval) + return retval; stm32x_info = bank->driver_priv; @@ -991,7 +988,6 @@ static int stm32x_handle_lock_command(struct command_context_s *cmd_ctx, char *c static int stm32x_handle_unlock_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc) { - flash_bank_t *bank; target_t *target = NULL; stm32x_flash_bank_t *stm32x_info = NULL; @@ -1001,12 +997,10 @@ static int stm32x_handle_unlock_command(struct command_context_s *cmd_ctx, char return ERROR_OK; } - bank = get_flash_bank_by_num(strtoul(args[0], NULL, 0)); - if (!bank) - { - command_print(cmd_ctx, "flash bank '#%s' is out of bounds", args[0]); - return ERROR_OK; - } + flash_bank_t *bank; + int retval = flash_command_get_bank_by_num(cmd_ctx, args[0], &bank); + if (ERROR_OK != retval) + return retval; stm32x_info = bank->driver_priv; @@ -1037,7 +1031,6 @@ static int stm32x_handle_unlock_command(struct command_context_s *cmd_ctx, char static int stm32x_handle_options_read_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc) { - flash_bank_t *bank; uint32_t optionbyte; target_t *target = NULL; stm32x_flash_bank_t *stm32x_info = NULL; @@ -1048,12 +1041,10 @@ static int stm32x_handle_options_read_command(struct command_context_s *cmd_ctx, return ERROR_OK; } - bank = get_flash_bank_by_num(strtoul(args[0], NULL, 0)); - if (!bank) - { - command_print(cmd_ctx, "flash bank '#%s' is out of bounds", args[0]); - return ERROR_OK; - } + flash_bank_t *bank; + int retval = flash_command_get_bank_by_num(cmd_ctx, args[0], &bank); + if (ERROR_OK != retval) + return retval; stm32x_info = bank->driver_priv; @@ -1096,7 +1087,6 @@ static int stm32x_handle_options_read_command(struct command_context_s *cmd_ctx, static int stm32x_handle_options_write_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc) { - flash_bank_t *bank; target_t *target = NULL; stm32x_flash_bank_t *stm32x_info = NULL; uint16_t optionbyte = 0xF8; @@ -1107,12 +1097,10 @@ static int stm32x_handle_options_write_command(struct command_context_s *cmd_ctx return ERROR_OK; } - bank = get_flash_bank_by_num(strtoul(args[0], NULL, 0)); - if (!bank) - { - command_print(cmd_ctx, "flash bank '#%s' is out of bounds", args[0]); - return ERROR_OK; - } + flash_bank_t *bank; + int retval = flash_command_get_bank_by_num(cmd_ctx, args[0], &bank); + if (ERROR_OK != retval) + return retval; stm32x_info = bank->driver_priv; @@ -1210,7 +1198,6 @@ static int stm32x_mass_erase(struct flash_bank_s *bank) static int stm32x_handle_mass_erase_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc) { - flash_bank_t *bank; int i; if (argc < 1) @@ -1219,12 +1206,10 @@ static int stm32x_handle_mass_erase_command(struct command_context_s *cmd_ctx, c return ERROR_OK; } - bank = get_flash_bank_by_num(strtoul(args[0], NULL, 0)); - if (!bank) - { - command_print(cmd_ctx, "flash bank '#%s' is out of bounds", args[0]); - return ERROR_OK; - } + flash_bank_t *bank; + int retval = flash_command_get_bank_by_num(cmd_ctx, args[0], &bank); + if (ERROR_OK != retval) + return retval; if (stm32x_mass_erase(bank) == ERROR_OK) { commit 786106d725aace7637e8b628a66aa0fbc03b2e19 Author: Zachary T Welch <zw...@su...> Date: Fri Oct 23 01:40:47 2009 -0700 Improve stellaris.c erase argument parsing. diff --git a/src/flash/stellaris.c b/src/flash/stellaris.c index dfc276e..b482ce2 100644 --- a/src/flash/stellaris.c +++ b/src/flash/stellaris.c @@ -1162,7 +1162,6 @@ static int stellaris_mass_erase(struct flash_bank_s *bank) static int stellaris_handle_mass_erase_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc) { - flash_bank_t *bank; int i; if (argc < 1) @@ -1171,12 +1170,10 @@ static int stellaris_handle_mass_erase_command(struct command_context_s *cmd_ctx return ERROR_OK; } - bank = get_flash_bank_by_num(strtoul(args[0], NULL, 0)); - if (!bank) - { - command_print(cmd_ctx, "flash bank '#%s' is out of bounds", args[0]); - return ERROR_OK; - } + flash_bank_t *bank; + int retval = flash_command_get_bank_by_num(cmd_ctx, args[0], &bank); + if (ERROR_OK != retval) + return retval; if (stellaris_mass_erase(bank) == ERROR_OK) { commit fc116380bf26ac00b8d0a37fee91e74118e12d8d Author: Zachary T Welch <zw...@su...> Date: Thu Oct 22 22:33:12 2009 -0700 Improve pic32mx.c command argument parsing. diff --git a/src/flash/pic32mx.c b/src/flash/pic32mx.c index 48ba38c..d9966bf 100644 --- a/src/flash/pic32mx.c +++ b/src/flash/pic32mx.c @@ -724,7 +724,6 @@ static int pic32mx_info(struct flash_bank_s *bank, char *buf, int buf_size) #if 0 int pic32mx_handle_lock_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc) { - flash_bank_t *bank; target_t *target = NULL; pic32mx_flash_bank_t *pic32mx_info = NULL; @@ -734,12 +733,10 @@ int pic32mx_handle_lock_command(struct command_context_s *cmd_ctx, char *cmd, ch return ERROR_OK; } - bank = get_flash_bank_by_num(strtoul(args[0], NULL, 0)); - if (!bank) - { - command_print(cmd_ctx, "flash bank '#%s' is out of bounds", args[0]); - return ERROR_OK; - } + flash_bank_t *bank; + int retval = flash_command_get_bank_by_num(cmd_ctx, args[0], &bank); + if (ERROR_OK != retval) + return retval; pic32mx_info = bank->driver_priv; @@ -773,7 +770,6 @@ int pic32mx_handle_lock_command(struct command_context_s *cmd_ctx, char *cmd, ch int pic32mx_handle_unlock_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc) { - flash_bank_t *bank; target_t *target = NULL; pic32mx_flash_bank_t *pic32mx_info = NULL; @@ -783,12 +779,10 @@ int pic32mx_handle_unlock_command(struct command_context_s *cmd_ctx, char *cmd, return ERROR_OK; } - bank = get_flash_bank_by_num(strtoul(args[0], NULL, 0)); - if (!bank) - { - command_print(cmd_ctx, "flash bank '#%s' is out of bounds", args[0]); - return ERROR_OK; - } + flash_bank_t *bank; + int retval = flash_command_get_bank_by_num(cmd_ctx, args[0], &bank); + if (ERROR_OK != retval) + return retval; pic32mx_info = bank->driver_priv; @@ -867,7 +861,6 @@ static int pic32mx_chip_erase(struct flash_bank_s *bank) static int pic32mx_handle_chip_erase_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc) { #if 0 - flash_bank_t *bank; int i; if (argc != 0) @@ -876,12 +869,10 @@ static int pic32mx_handle_chip_erase_command(struct command_context_s *cmd_ctx, return ERROR_OK; } - bank = get_flash_bank_by_num(strtoul(args[0], NULL, 0)); - if (!bank) - { - command_print(cmd_ctx, "flash bank '#%s' is out of bounds", args[0]); - return ERROR_OK; - } + flash_bank_t *bank; + int retval = flash_command_get_bank_by_num(cmd_ctx, args[0], &bank); + if (ERROR_OK != retval) + return retval; if (pic32mx_chip_erase(bank) == ERROR_OK) { @@ -904,7 +895,6 @@ static int pic32mx_handle_chip_erase_command(struct command_context_s *cmd_ctx, static int pic32mx_handle_pgm_word_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc) { - flash_bank_t *bank; uint32_t address, value; int status, res; @@ -914,15 +904,14 @@ static int pic32mx_handle_pgm_word_command(struct command_context_s *cmd_ctx, ch return ERROR_OK; } - address = strtoul(args[0], NULL, 0); - value = strtoul(args[1], NULL, 0); + COMMAND_PARSE_NUMBER(u32, args[0], address); + COMMAND_PARSE_NUMBER(u32, args[1], value); + + flash_bank_t *bank; + int retval = flash_command_get_bank_by_num(cmd_ctx, args[2], &bank); + if (ERROR_OK != retval) + return retval; - bank = get_flash_bank_by_num(strtoul(args[2], NULL, 0)); - if (!bank) - { - command_print(cmd_ctx, "flash bank '#%s' is out of bounds", args[2]); - return ERROR_OK; - } if (address < bank->base || address >= (bank->base + bank->size)) { command_print(cmd_ctx, "flash address '%s' is out of bounds", args[0]); commit ee4723c494fb9cd8deefdbf5387f0ba31ea57c65 Author: Zachary T Welch <zw...@su...> Date: Fri Oct 23 02:17:17 2009 -0700 Improve mflash.c command argument parsing. diff --git a/src/flash/mflash.c b/src/flash/mflash.c index 63ba054..bf759c9 100644 --- a/src/flash/mflash.c +++ b/src/flash/mflash.c @@ -716,7 +716,7 @@ static int mg_write_cmd(struct command_context_s *cmd_ctx, char *cmd, char **arg return ERROR_COMMAND_SYNTAX_ERROR; } - address = strtoul(args[2], NULL, 0); + COMMAND_PARSE_NUMBER(u32, args[2], address); ret = fileio_open(&fileio, args[1], FILEIO_READ, FILEIO_BINARY); if (ret != ERROR_OK) @@ -783,8 +783,8 @@ static int mg_dump_cmd(struct command_context_s *cmd_ctx, char *cmd, char **args return ERROR_COMMAND_SYNTAX_ERROR; } - address = strtoul(args[2], NULL, 0); - size = strtoul(args[3], NULL, 0); + COMMAND_PARSE_NUMBER(u32, args[2], address); + COMMAND_PARSE_NUMBER(u32, args[3], size); ret = fileio_open(&fileio, args[1], FILEIO_WRITE, FILEIO_BINARY); if (ret != ERROR_OK) @@ -1238,7 +1238,9 @@ int mg_config_cmd(struct command_context_s *cmd_ctx, char *cmd, break; case 3: if (!strcmp(args[1], "pll")) { - fin = strtoul(args[2], NULL, 0); + unsigned long freq; + COMMAND_PARSE_NUMBER(ulong, args[2], freq); + fin = freq; if (fin > MG_PLL_CLK_OUT) { LOG_ERROR("mflash: input freq. is too large"); @@ -1288,7 +1290,6 @@ int mflash_init_drivers(struct command_context_s *cmd_ctx) static int mg_bank_cmd(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc) { target_t *target; - char *str; int i; if (argc < 4) @@ -1303,7 +1304,9 @@ static int mg_bank_cmd(struct command_context_s *cmd_ctx, char *cmd, char **args } mflash_bank = calloc(sizeof(mflash_bank_t), 1); - mflash_bank->base = strtoul(args[1], NULL, 0); + COMMAND_PARSE_NUMBER(u32, args[1], mflash_bank->base); + /// @todo Verify how this parsing should work, then document it. + char *str; mflash_bank->rst_pin.num = strtoul(args[2], &str, 0); if (*str) mflash_bank->rst_pin.port[0] = (uint16_t)tolower(str[0]); commit c63671e4f7eac5488e1ec0ef50f9d32e12cf3b31 Author: Zachary T Welch <zw...@su...> Date: Fri Oct 23 02:17:17 2009 -0700 Improve lpc3180_nand_controller.c parsing. This fixes a memory leak in lpc3180_nand_device_command by reordering the malloc to occur after all parsing has completed. diff --git a/src/flash/lpc3180_nand_controller.c b/src/flash/lpc3180_nand_controller.c index de6d4e2..ac079c6 100644 --- a/src/flash/lpc3180_nand_controller.c +++ b/src/flash/lpc3180_nand_controller.c @@ -60,25 +60,29 @@ nand_flash_controller_t lpc3180_nand_controller = */ static int lpc3180_nand_device_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct nand_device_s *device) { - lpc3180_nand_controller_t *lpc3180_info; - if (argc < 3) { LOG_WARNING("incomplete 'lpc3180' nand flash configuration"); return ERROR_FLASH_BANK_INVALID; } - lpc3180_info = malloc(sizeof(lpc3180_nand_controller_t)); - device->controller_priv = lpc3180_info; - - lpc3180_info->target = get_target(args[1]); - if (!lpc3180_info->target) + target_t *target = get_target(args[1]); + if (NULL == target) { LOG_ERROR("target '%s' not defined", args[1]); return ERROR_NAND_DEVICE_INVALID; } - lpc3180_info->osc_freq = strtoul(args[2], NULL, 0); + uint32_t osc_freq; + COMMAND_PARSE_NUMBER(u32, args[2], osc_freq); + + lpc3180_nand_controller_t *lpc3180_info; + lpc3180_info = malloc(sizeof(lpc3180_nand_controller_t)); + device->controller_priv = lpc3180_info; + + lpc3180_info->target = target; + lpc3180_info->osc_freq = osc_freq; + if ((lpc3180_info->osc_freq < 1000) || (lpc3180_info->osc_freq > 20000)) { LOG_WARNING("LPC3180 oscillator frequency should be between 1000 and 20000 kHz, was %i", lpc3180_info->osc_freq); @@ -864,7 +868,6 @@ static int lpc3180_nand_ready(struct nand_device_s *device, int timeout) static int handle_lpc3180_select_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc) { - nand_device_t *device = NULL; lpc3180_nand_controller_t *lpc3180_info = NULL; char *selected[] = { @@ -876,7 +879,9 @@ static int handle_lpc3180_select_command(struct command_context_s *cmd_ctx, char return ERROR_COMMAND_SYNTAX_ERROR; } - device = get_nand_device_by_num(strtoul(args[0], NULL, 0)); + unsigned num; + COMMAND_PARSE_NUMBER(uint, args[1], num); + nand_device_t *device = get_nand_device_by_num(num); if (!device) { command_print(cmd_ctx, "nand device '#%s' is out of bounds", args[0]); commit 7b2d8d93e6b132048f951106480b4e6a6f0b885a Author: Zachary T Welch <zw...@su...> Date: Fri Oct 23 02:17:17 2009 -0700 Improve lpc2900.c command argument parsing. diff --git a/src/flash/lpc2900.c b/src/flash/lpc2900.c index 902180c..e15d93b 100644 --- a/src/flash/lpc2900.c +++ b/src/flash/lpc2900.c @@ -554,7 +554,6 @@ static uint32_t lpc2900_calc_tr( uint32_t clock, uint32_t time ) static int lpc2900_handle_signature_command( struct command_context_s *cmd_ctx, char *cmd, char **args, int argc ) { - flash_bank_t *bank; uint32_t status; uint32_t signature[4]; @@ -565,13 +564,10 @@ static int lpc2900_handle_signature_command( struct command_context_s *cmd_ctx, return ERROR_FLASH_BANK_INVALID; } - /* Get the bank descriptor */ - bank = get_flash_bank_by_num( strtoul(args[0], NULL, 0) ); - if( !bank ) - { - command_print( cmd_ctx, "flash bank '#%s' is out of bounds", args[0] ); - return ERROR_OK; - } + flash_bank_t *bank; + int retval = flash_command_get_bank_by_num(cmd_ctx, args[0], &bank); + if (ERROR_OK != retval) + return retval; if( bank->target->state != TARGET_HALTED ) { @@ -614,21 +610,16 @@ static int lpc2900_handle_signature_command( struct command_context_s *cmd_ctx, static int lpc2900_handle_read_custom_command( struct command_context_s *cmd_ctx, char *cmd, char **args, int argc ) { - flash_bank_t *bank; - - if( argc < 2 ) { return ERROR_COMMAND_SYNTAX_ERROR; } - /* Get the bank descriptor */ - bank = get_flash_bank_by_num( strtoul(args[0], NULL, 0) ); - if( !bank ) - { - command_print( cmd_ctx, "flash bank '#%s' is out of bounds", args[0] ); - return ERROR_OK; - } + flash_bank_t *bank; + int retval = flash_command_get_bank_by_num(cmd_ctx, args[0], &bank); + if (ERROR_OK != retval) + return retval; + lpc2900_flash_bank_t *lpc2900_info = bank->driver_priv; lpc2900_info->risky = 0; @@ -696,21 +687,16 @@ static int lpc2900_handle_read_custom_command( struct command_context_s *cmd_ctx static int lpc2900_handle_password_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc) { - flash_bank_t *bank; - - if (argc < 2) { return ERROR_COMMAND_SYNTAX_ERROR; } - /* Get the bank descriptor */ - bank = get_flash_bank_by_num(strtoul(args[0], NULL, 0)); - if (!bank) - { - command_print(cmd_ctx, "flash bank '#%s' is out of bounds", args[0]); - return ERROR_OK; - } + flash_bank_t *bank; + int retval = flash_command_get_bank_by_num(cmd_ctx, args[0], &bank); + if (ERROR_OK != retval) + return retval; + lpc2900_flash_bank_t *lpc2900_info = bank->driver_priv; #define ISS_PASSWORD "I_know_what_I_am_doing" @@ -747,13 +733,11 @@ static int lpc2900_handle_write_custom_command( struct command_context_s *cmd_ct return ERROR_COMMAND_SYNTAX_ERROR; } - /* Get the bank descriptor */ - flash_bank_t *bank = get_flash_bank_by_num(strtoul(args[0], NULL, 0)); - if (!bank) - { - command_print(cmd_ctx, "flash bank '#%s' is out of bounds", args[0]); - return ERROR_OK; - } + flash_bank_t *bank; + int retval = flash_command_get_bank_by_num(cmd_ctx, args[0], &bank); + if (ERROR_OK != retval) + return retval; + lpc2900_flash_bank_t *lpc2900_info = bank->driver_priv; /* Check if command execution is allowed. */ @@ -780,7 +764,7 @@ static int lpc2900_handle_write_custom_command( struct command_context_s *cmd_ct char *filename = args[1]; char *type = (argc >= 3) ? args[2] : NULL; - int retval = image_open(&image, filename, type); + retval = image_open(&image, filename, type); if (retval != ERROR_OK) { return retval; @@ -866,12 +850,11 @@ static int lpc2900_handle_secure_sector_command(struct command_context_s *cmd_ct } /* Get the bank descriptor */ - flash_bank_t *bank = get_flash_bank_by_num(strtoul(args[0], NULL, 0)); - if (!bank) - { - command_print(cmd_ctx, "flash bank '#%s' is out of bounds", args[0]); - return ERROR_OK; - } + flash_bank_t *bank; + int retval = flash_command_get_bank_by_num(cmd_ctx, args[0], &bank); + if (ERROR_OK != retval) + return retval; + lpc2900_flash_bank_t *lpc2900_info = bank->driver_priv; /* Check if command execution is allowed. */ @@ -884,8 +867,9 @@ static int lpc2900_handle_secure_sector_command(struct command_context_s *cmd_ct lpc2900_info->risky = 0; /* Read sector range, and do a sanity check. */ - int first = strtoul(args[1], NULL, 0); - int last = strtoul(args[2], NULL, 0); + int first, last; + COMMAND_PARSE_NUMBER(int, args[1], first); + COMMAND_PARSE_NUMBER(int, args[2], last); if( (first >= bank->num_sectors) || (last >= bank->num_sectors) || (first > last) ) @@ -896,7 +880,6 @@ static int lpc2900_handle_secure_sector_command(struct command_context_s *cmd_ct uint8_t page[FLASH_PAGE_SIZE]; int sector; - int retval; /* Sectors in page 6 */ if( (first <= 4) || (last >= 8) ) @@ -972,12 +955,11 @@ static int lpc2900_handle_secure_jtag_command(struct command_context_s *cmd_ctx, } /* Get the bank descriptor */ - flash_bank_t *bank = get_flash_bank_by_num(strtoul(args[0], NULL, 0)); - if (!bank) - { - command_print(cmd_ctx, "flash bank '#%s' is out of bounds", args[0]); - return ERROR_OK; - } + flash_bank_t *bank; + int retval = flash_command_get_bank_by_num(cmd_ctx, args[0], &bank); + if (ERROR_OK != retval) + return retval; + lpc2900_flash_bank_t *lpc2900_info = bank->driver_priv; /* Check if command execution is allowed. */ @@ -1001,7 +983,6 @@ static int lpc2900_handle_secure_jtag_command(struct command_context_s *cmd_ctx, page[0x30 + 3] = 0x7F; /* Write to page 5 */ - int retval; if( (retval = lpc2900_write_index_page( bank, 5, &page )) != ERROR_OK ) { @@ -1117,7 +1098,9 @@ static int lpc2900_flash_bank_command(struct command_context_s *cmd_ctx, * Reject it if we can't meet the requirements for program time * (if clock too slow), or for erase time (clock too fast). */ - lpc2900_info->clk_sys_fmc = strtoul(args[6], NULL, 0) * 1000; + uint32_t clk_sys_fmc; + COMMAND_PARSE_NUMBER(u32, args[6], clk_sys_fmc); + lpc2900_info->clk_sys_fmc = clk_sys_fmc * 1000; uint32_t clock_limit; /* Check program time limit */ commit 0004691e9104c9a59336fbe6e230597d48e8cb57 Author: Zachary T Welch <zw...@su...> Date: Fri Oct 23 02:17:17 2009 -0700 Improve lpc288x.c command argument parsing. diff --git a/src/flash/lpc288x.c b/src/flash/lpc288x.c index 513e2fc..61aa3a0 100644 --- a/src/flash/lpc288x.c +++ b/src/flash/lpc288x.c @@ -209,7 +209,7 @@ static int lpc288x_flash_bank_command(struct command_context_s *cmd_ctx, char *c /* part wasn't probed for info yet */ lpc288x_info->cidr = 0; - lpc288x_info->cclk = strtoul(args[6], NULL, 0); + COMMAND_PARSE_NUMBER(u32, args[6], lpc288x_info->cclk); return ERROR_OK; } commit 7f6ad49d12e3d166c730d27306d887bb3ed48a1b Author: Zachary T Welch <zw...@su...> Date: Fri Oct 23 02:17:17 2009 -0700 Improve lpc2000.c command argument parsing. diff --git a/src/flash/lpc2000.c b/src/flash/lpc2000.c index 5dcf1bb..ed9c7c3 100644 --- a/src/flash/lpc2000.c +++ b/src/flash/lpc2000.c @@ -501,7 +501,7 @@ static int lpc2000_flash_bank_command(struct command_context_s *cmd_ctx, char *c } lpc2000_info->iap_working_area = NULL; - lpc2000_info->cclk = strtoul(args[7], NULL, 0); + COMMAND_PARSE_NUMBER(u32, args[7], lpc2000_info->cclk); lpc2000_info->calc_checksum = 0; lpc2000_build_sector_list(bank); @@ -776,7 +776,6 @@ static int lpc2000_info(struct flash_bank_s *bank, char *buf, int buf_size) static int lpc2000_handle_part_id_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc) { - flash_bank_t *bank; uint32_t param_table[5]; uint32_t result_table[4]; int status_code; @@ -786,12 +785,10 @@ static int lpc2000_handle_part_id_command(struct command_context_s *cmd_ctx, cha return ERROR_COMMAND_SYNTAX_ERROR; } - bank = get_flash_bank_by_num(strtoul(args[0], NULL, 0)); - if (!bank) - { - command_print(cmd_ctx, "flash bank '#%s' is out of bounds", args[0]); - return ERROR_OK; - } + flash_bank_t *bank; + int retval = flash_command_get_bank_by_num(cmd_ctx, args[0], &bank); + if (ERROR_OK != retval) + return retval; if (bank->target->state != TARGET_HALTED) { commit 680e22c4d7d71d88128bd12e3ecc08b135da626a Author: Zachary T Welch <zw...@su...> Date: Fri Oct 23 02:17:17 2009 -0700 Improve cfi.c command argument parsing. diff --git a/src/flash/cfi.c b/src/flash/cfi.c index 2d75ff4..93e661c 100644 --- a/src/flash/cfi.c +++ b/src/flash/cfi.c @@ -641,8 +641,12 @@ static int cfi_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, return ERROR_FLASH_BANK_INVALID; } - if ((strtoul(args[4], NULL, 0) > CFI_MAX_CHIP_WIDTH) - || (strtoul(args[3], NULL, 0) > CFI_MAX_BUS_WIDTH)) + uint16_t chip_width, bus_width; + COMMAND_PARSE_NUMBER(u16, args[3], bus_width); + COMMAND_PARSE_NUMBER(u16, args[4], chip_width); + + if ((chip_width > CFI_MAX_CHIP_WIDTH) + || (bus_width > CFI_MAX_BUS_WIDTH)) { LOG_ERROR("chip and bus width have to specified in bytes"); return ERROR_FLASH_BANK_INVALID; commit 7b3d54a1278dc89f5ad43a5c00bfacbbddc8a9b6 Author: Zachary T Welch <zw...@su...> Date: Fri Oct 23 02:17:17 2009 -0700 Improve avrf.c command argument parsing. diff --git a/src/flash/avrf.c b/src/flash/avrf.c index 533822e..2b95b8a 100644 --- a/src/flash/avrf.c +++ b/src/flash/avrf.c @@ -456,7 +456,6 @@ static int avrf_mass_erase(struct flash_bank_s *bank) static int avrf_handle_mass_erase_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc) { - flash_bank_t *bank; int i; if (argc < 1) @@ -465,12 +464,10 @@ static int avrf_handle_mass_erase_command(struct command_context_s *cmd_ctx, cha return ERROR_OK; } - bank = get_flash_bank_by_num(strtoul(args[0], NULL, 0)); - if (!bank) - { - command_print(cmd_ctx, "flash bank '#%s' is out of bounds", args[0]); - return ERROR_OK; - } + flash_bank_t *bank; + int retval = flash_command_get_bank_by_num(cmd_ctx, args[0], &bank); + if (ERROR_OK != retval) + return retval; if (avrf_mass_erase(bank) == ERROR_OK) { commit 266c423bbdea4e09c6b1f6cd216f872f8e3ef3f8 Author: Zachary T Welch <zw...@su...> Date: Thu Oct 22 22:33:12 2009 -0700 Improve orion_nand.c command argument parsing. diff --git a/src/flash/orion_nand.c b/src/flash/orion_nand.c index 94df17b..6e88f82 100644 --- a/src/flash/orion_nand.c +++ b/src/flash/orion_nand.c @@ -152,7 +152,7 @@ int orion_nand_device_command(struct command_context_s *cmd_ctx, char *cmd, return ERROR_NAND_DEVICE_INVALID; } - base = strtoul(args[2], NULL, 0); + COMMAND_PARSE_NUMBER(u32, args[2], base); cle = 0; ale = 1; commit 7b49739790cf8c7638ff11573c0e40626b936d3d Author: Zachary T Welch <zw...@su...> Date: Thu Oct 22 22:33:12 2009 -0700 Improve davinci_nand.c command argument parsing. diff --git a/src/flash/davinci_nand.c b/src/flash/davinci_nand.c index 41c2b20..b6210b8 100644 --- a/src/flash/davinci_nand.c +++ b/src/flash/davinci_nand.c @@ -638,7 +638,6 @@ static int davinci_nand_device_command(struct command_context_s *cmd_ctx, unsigned long chip, aemif; enum ecc eccmode; int chipsel; - char *ep; /* arguments: * - "davinci" @@ -661,8 +660,8 @@ static int davinci_nand_device_command(struct command_context_s *cmd_ctx, goto fail; } - chip = strtoul(argv[2], &ep, 0); - if (*ep || chip == 0 || chip == ULONG_MAX) { + COMMAND_PARSE_NUMBER(ulong, argv[2], chip); + if (chip == 0) { LOG_ERROR("Invalid NAND chip address %s", argv[2]); goto fail; } @@ -678,8 +677,8 @@ static int davinci_nand_device_command(struct command_context_s *cmd_ctx, goto fail; } - aemif = strtoul(argv[4], &ep, 0); - if (*ep || aemif == 0 || aemif == ULONG_MAX) { + COMMAND_PARSE_NUMBER(ulong, argv[4], aemif); + if (aemif == 0) { LOG_ERROR("Invalid AEMIF controller address %s", argv[4]); goto fail; } commit 75b601b1f31de52885448bc59ce5c5f5a5048d93 Author: Zachary T Welch <zw...@su...> Date: Thu Oct 22 22:33:12 2009 -0700 Improve at91sam7.c command argument parsing. diff --git a/src/flash/at91sam7.c b/src/flash/at91sam7.c index 315a3f3..7d93c9e 100644 --- a/src/flash/at91sam7.c +++ b/src/flash/at91sam7.c @@ -752,7 +752,7 @@ static int at91sam7_flash_bank_command(struct command_context_s *cmd_ctx, char * uint32_t base_address; uint32_t bank_size; - uint32_t ext_freq; + uint32_t ext_freq = 0; int chip_width; int bus_width; @@ -776,33 +776,37 @@ static int at91sam7_flash_bank_command(struct command_context_s *cmd_ctx, char * at91sam7_info->ext_freq = 0; at91sam7_info->flash_autodetection = 0; - if (argc == 14) + if (argc < 13) { - ext_freq = atol(args[13]) * 1000; + at91sam7_info->flash_autodetection = 1; + return ERROR_OK; + } + + COMMAND_PARSE_NUMBER(u32, args[1], base_address); + + COMMAND_PARSE_NUMBER(int, args[3], chip_width); + COMMAND_PARSE_NUMBER(int, args[4], bus_width); + + COMMAND_PARSE_NUMBER(int, args[8], banks_num); + COMMAND_PARSE_NUMBER(int, args[9], num_sectors); + COMMAND_PARSE_NUMBER(u16, args[10], pages_per_sector); + COMMAND_PARSE_NUMBER(u16, args[11], page_size); + COMMAND_PARSE_NUMBER(u16, args[12], num_nvmbits); + + if (argc == 14) { + unsigned long freq; + COMMAND_PARSE_NUMBER(ulong, args[13], freq); + ext_freq = freq * 1000; at91sam7_info->ext_freq = ext_freq; } - if ((argc != 14) || - (atoi(args[4]) == 0) || /* bus width */ - (atoi(args[8]) == 0) || /* banks number */ - (atoi(args[9]) == 0) || /* sectors per bank */ - (atoi(args[10]) == 0) || /* pages per sector */ - (atoi(args[11]) == 0) || /* page size */ - (atoi(args[12]) == 0)) /* nvmbits number */ + if ((bus_width == 0) || (banks_num == 0) || (num_sectors == 0) || + (pages_per_sector == 0) || (page_size == 0) || (num_nvmbits == 0)) { at91sam7_info->flash_autodetection = 1; return ERROR_OK; } - base_address = strtoul(args[1], NULL, 0); - chip_width = atoi(args[3]); - bus_width = atoi(args[4]); - banks_num = atoi(args[8]); - num_sectors = atoi(args[9]); - pages_per_sector = atoi(args[10]); - page_size = atoi(args[11]); - num_nvmbits = atoi(args[12]); - target_name = calloc(strlen(args[7]) + 1, sizeof(char)); strcpy(target_name, args[7]); @@ -1181,7 +1185,7 @@ static int at91sam7_handle_gpnvm_command(struct command_context_s *cmd_ctx, char } } - bit = atoi(args[0]); + COMMAND_PARSE_NUMBER(int, args[0], bit); if ((bit < 0) || (bit >= at91sam7_info->num_nvmbits)) { command_print(cmd_ctx, "gpnvm bit '#%s' is out of bounds for target %s", args[0], at91sam7_info->target_name); commit 5e0ee6ab083f999e7007696762d8c55d647624dd Author: Zachary T Welch <zw...@su...> Date: Thu Oct 22 22:33:12 2009 -0700 Improve at91sam3.c command argument parsing. diff --git a/src/flash/at91sam3.c b/src/flash/at91sam3.c index 5edaa69..aff4d98 100644 --- a/src/flash/at91sam3.c +++ b/src/flash/at91sam3.c @@ -2347,7 +2347,6 @@ static int sam3_handle_gpnvm_command(struct command_context_s *cmd_ctx, char *cmd, char **argv, int argc) { unsigned x,v; - uint32_t v32; int r,who; struct sam3_chip *pChip; @@ -2391,11 +2390,8 @@ sam3_handle_gpnvm_command(struct command_context_s *cmd_ctx, char *cmd, char **a if ((0 == strcmp(argv[0], "show")) && (0 == strcmp(argv[1], "all"))) { who = -1; } else { - r = parse_u32(argv[1], &v32); - if (r != ERROR_OK) { - command_print(cmd_ctx, "Not a number: %s", argv[1]); - return r; - } + uint32_t v32; + COMMAND_PARSE_NUMBER(u32, argv[1], v32); who = v32; } break; @@ -2444,9 +2440,6 @@ sam3_handle_gpnvm_command(struct command_context_s *cmd_ctx, char *cmd, char **a static int sam3_handle_slowclk_command(struct command_context_s *cmd_ctx, char *cmd, char **argv, int argc) { - uint32_t v; - int r; - struct sam3_chip *pChip; pChip = get_current_sam3(cmd_ctx); @@ -2460,8 +2453,10 @@ sam3_handle_slowclk_command(struct command_context_s *cmd_ctx, char *cmd, char * // show break; case 1: + { // set - r = parse_u32(argv[0], &v); + uint32_t v; + COMMAND_PARSE_NUMBER(u32, argv[0], v); if (v > 200000) { // absurd slow clock of 200Khz? command_print(cmd_ctx,"Absurd/illegal slow clock freq: %d\n", (int)(v)); @@ -2469,7 +2464,7 @@ sam3_handle_slowclk_command(struct command_context_s *cmd_ctx, char *cmd, char * } pChip->cfg.slow_freq = v; break; - + } default: // error command_print(cmd_ctx,"Too many parameters"); commit 93ab9ce8885cd45f5f9beba7d7e55536655eb5bf Author: Zachary T Welch <zw...@su...> Date: Thu Oct 22 22:33:12 2009 -0700 Improve nand.c command argument parsing. diff --git a/src/flash/nand.c b/src/flash/nand.c index d97c817..7fb7c99 100644 --- a/src/flash/nand.c +++ b/src/flash/nand.c @@ -1107,12 +1107,16 @@ int handle_nand_list_command(struct command_context_s *cmd_ctx, char *cmd, char static int handle_nand_info_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc) { - nand_device_t *p; int i = 0; int j = 0; int first = -1; int last = -1; + nand_device_t *p; + int retval = nand_command_get_device_by_num(cmd_ctx, args[0], &p); + if (ERROR_OK != retval) + return retval; + switch (argc) { default: return ERROR_COMMAND_SYNTAX_ERROR; @@ -1121,15 +1125,16 @@ static int handle_nand_info_command(struct command_context_s *cmd_ctx, char *cmd last = INT32_MAX; break; case 2: - first = last = strtoul(args[1], NULL, 0); + COMMAND_PARSE_NUMBER(int, args[1], i); + first = last = i; + i = 0; break; case 3: - first = strtoul(args[1], NULL, 0); - last = strtoul(args[2], NULL, 0); + COMMAND_PARSE_NUMBER(int, args[1], first); + COMMAND_PARSE_NUMBER(int, args[2], last); break; } - p = get_nand_device_by_num(strtoul(args[0], NULL, 0)); if (p) { if (p->device) @@ -1181,15 +1186,16 @@ static int handle_nand_info_command(struct command_context_s *cmd_ctx, char *cmd static int handle_nand_probe_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc) { - nand_device_t *p; - int retval; - if (argc != 1) { return ERROR_COMMAND_SYNTAX_ERROR; } - p = get_nand_device_by_num(strtoul(args[0], NULL, 0)); + nand_device_t *p; + int retval = nand_command_get_device_by_num(cmd_ctx, args[0], &p); + if (ERROR_OK != retval) + return retval; + if (p) { if ((retval = nand_probe(p)) == ERROR_OK) @@ -1205,29 +1211,25 @@ static int handle_nand_probe_command(struct command_context_s *cmd_ctx, char *cm command_print(cmd_ctx, "unknown error when probing NAND flash device"); } } - else - { - command_print(cmd_ctx, "NAND flash device '#%s' is out of bounds", args[0]); - } return ERROR_OK; } static int handle_nand_erase_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc) { - nand_device_t *p; - int retval; - if (argc != 1 && argc != 3) { return ERROR_COMMAND_SYNTAX_ERROR; } - p = get_nand_device_by_num(strtoul(args[0], NULL, 0)); + nand_device_t *p; + int retval = nand_command_get_device_by_num(cmd_ctx, args[0], &p); + if (ERROR_OK != retval) + return retval; + if (p) { - char *cp; unsigned long offset; unsigned long length; @@ -1235,16 +1237,12 @@ static int handle_nand_erase_command(struct command_context_s *cmd_ctx, char *cm if (argc == 3) { unsigned long size = p->erase_size * p->num_blocks; - offset = strtoul(args[1], &cp, 0); - if (*cp || (offset == ULONG_MAX) - || (offset % p->erase_size) != 0 - || offset >= size) + COMMAND_PARSE_NUMBER(ulong, args[1], offset); + if ((offset % p->erase_size) != 0 || offset >= size) return ERROR_INVALID_ARGUMENTS; - length = strtoul(args[2], &cp, 0); - if (*cp || (length == ULONG_MAX) - || (length == 0) - || (length % p->erase_size) != 0 + COMMAND_PARSE_NUMBER(ulong, args[2], length); + if ((length == 0) || (length % p->erase_size) != 0 || (length + offset) > size) return ERROR_INVALID_ARGUMENTS; @@ -1272,18 +1270,12 @@ static int handle_nand_erase_command(struct command_context_s *cmd_ctx, char *cm command_print(cmd_ctx, "unknown error when erasing NAND flash device"); } } - else - { - command_print(cmd_ctx, "NAND flash device '#%s' is out of bounds", args[0]); - } return ERROR_OK; } int handle_nand_check_bad_blocks_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc) { - nand_device_t *p; - int retval; int first = -1; int last = -1; @@ -1293,31 +1285,25 @@ int handle_nand_check_bad_blocks_command(struct command_context_s *cmd_ctx, char } - p = get_nand_device_by_num(strtoul(args[0], NULL, 0)); - if (!p) { - command_print(cmd_ctx, "NAND flash device '#%s' is out of bounds", - args[0]); - return ERROR_INVALID_ARGUMENTS; - } + nand_device_t *p; + int retval = nand_command_get_device_by_num(cmd_ctx, args[0], &p); + if (ERROR_OK != retval) + return retval; if (argc == 3) { - char *cp; unsigned long offset; unsigned long length; - offset = strtoul(args[1], &cp, 0); - if (*cp || offset == ULONG_MAX || offset % p->erase_size) - { + COMMAND_PARSE_NUMBER(ulong, args[1], offset); + if (offset % p->erase_size) return ERROR_INVALID_ARGUMENTS; - } offset /= p->erase_size; - length = strtoul(args[2], &cp, 0); - if (*cp || length == ULONG_MAX || length % p->erase_size) - { + COMMAND_PARSE_NUMBER(ulong, args[2], length); + if (length % p->erase_size) return ERROR_INVALID_ARGUMENTS; - } + length -= 1; length /= p->erase_size; @@ -1357,15 +1343,16 @@ static int handle_nand_write_command(struct command_context_s *cmd_ctx, char *cm duration_t duration; char *duration_text; - nand_device_t *p; - if (argc < 3) { return ERROR_COMMAND_SYNTAX_ERROR; - } - p = get_nand_device_by_num(strtoul(args[0], NULL, 0)); + nand_device_t *p; + int retval = nand_command_get_device_by_num(cmd_ctx, args[0], &p); + if (ERROR_OK != retval) + return retval; + if (p) { uint8_t *page = NULL; @@ -1374,7 +1361,7 @@ static int handle_nand_write_command(struct command_context_s *cmd_ctx, char *cm uint32_t oob_size = 0; const int *eccpos = NULL; - offset = strtoul(args[2], NULL, 0); + COMMAND_PARSE_NUMBER(u32, args[2], offset); if (argc > 3) { @@ -1509,24 +1496,22 @@ static int handle_nand_write_command(struct command_context_s *cmd_ctx, char *cm free(duration_text); duration_text = NULL; } - else - { - command_print(cmd_ctx, "NAND flash device '#%s' is out of bounds", args[0]); - } return ERROR_OK; } static int handle_nand_dump_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc) { - nand_device_t *p; - if (argc < 4) { return ERROR_COMMAND_SYNTAX_ERROR; } - p = get_nand_device_by_num(strtoul(args[0], NULL, 0)); + nand_device_t *p; + int retval = nand_command_get_device_by_num(cmd_ctx, args[0], &p); + if (ERROR_OK != retval) + return retval; + if (p) { if (p->device) @@ -1540,8 +1525,10 @@ static int handle_nand_dump_command(struct command_context_s *cmd_ctx, char *cmd uint32_t page_size = 0; uint8_t *oob = NULL; uint32_t oob_size = 0; - uint32_t address = strtoul(args[2], NULL, 0); - uint32_t size = strtoul(args[3], NULL, 0); + uint32_t address; + COMMAND_PARSE_NUMBER(u32, args[2], address); + uint32_t size; + COMMAND_PARSE_NUMBER(u32, args[3], size); uint32_t bytes_done = 0; enum oob_formats oob_format = NAND_OOB_NONE; @@ -1631,24 +1618,22 @@ static int handle_nand_dump_command(struct command_context_s *cmd_ctx, char *cmd command_print(cmd_ctx, "#%s: not probed", args[0]); } } - else - { - command_print(cmd_ctx, "NAND flash device '#%s' is out of bounds", args[0]); - } return ERROR_OK; } static int handle_nand_raw_access_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc) { - nand_device_t *p; - if ((argc < 1) || (argc > 2)) { return ERROR_COMMAND_SYNTAX_ERROR; } - p = get_nand_device_by_num(strtoul(args[0], NULL, 0)); + nand_device_t *p; + int retval = nand_command_get_device_by_num(cmd_ctx, args[0], &p); + if (ERROR_OK != retval) + return retval; + if (p) { if (p->device) @@ -1676,10 +1661,6 @@ static int handle_nand_raw_access_command(struct command_context_s *cmd_ctx, cha command_print(cmd_ctx, "#%s: not probed", args[0]); } } - else - { - command_print(cmd_ctx, "NAND flash device '#%s' is out of bounds", args[0]); - } return ERROR_OK; } commit e9566a4a6af9b16762c66cf632abbeafbe8f874f Author: Zachary T Welch <zw...@su...> Date: Thu Oct 22 22:33:12 2009 -0700 Improve flash.c command argument parsing. diff --git a/src/flash/flash.c b/src/flash/flash.c index aa24659..b40e074 100644 --- a/src/flash/flash.c +++ b/src/flash/flash.c @@ -307,10 +307,10 @@ static int handle_flash_bank_command(struct command_context_s *cmd_ctx, char *cm c->target = target; c->driver = flash_drivers[i]; c->driver_priv = NULL; - c->base = strtoul(args[1], NULL, 0); - c->size = strtoul(args[2], NULL, 0); - c->chip_width = strtoul(args[3], NULL, 0); - c->bus_width = strtoul(args[4], NULL, 0); + COMMAND_PARSE_NUMBER(u32, args[1], c->base); + COMMAND_PARSE_NUMBER(u32, args[2], c->size); + COMMAND_PARSE_NUMBER(int, args[3], c->chip_width); + COMMAND_PARSE_NUMBER(int, args[4], c->bus_width); c->num_sectors = 0; c->sectors = NULL; c->next = NULL; @@ -360,13 +360,14 @@ static int handle_flash_info_command(struct command_context_s *cmd_ctx, char *cm int retval; if (argc != 1) - { return ERROR_COMMAND_SYNTAX_ERROR; - } + + unsigned bank_nr; + COMMAND_PARSE_NUMBER(uint, args[0], bank_nr); for (p = flash_banks; p; p = p->next, i++) { - if (i == strtoul(args[0], NULL, 0)) + if (i == bank_nr) { char buf[1024]; @@ -415,7 +416,6 @@ static int handle_flash_info_command(struct command_context_s *cmd_ctx, char *cm static int handle_flash_probe_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc) { - flash_bank_t *p; int retval; if (argc != 1) @@ -423,7 +423,9 @@ static int handle_flash_probe_command(struct command_context_s *cmd_ctx, char *c return ERROR_COMMAND_SYNTAX_ERROR; } - p = get_flash_bank_by_num_noprobe(strtoul(args[0], NULL, 0)); + unsigned bank_nr; + COMMAND_PARSE_NUMBER(uint, args[0], bank_nr); + flash_bank_t *p = get_flash_bank_by_num_noprobe(bank_nr); if (p) { if ((retval = p->driver->probe(p)) == ERROR_OK) @@ -451,15 +453,16 @@ static int handle_flash_probe_command(struct command_context_s *cmd_ctx, char *c static int handle_flash_erase_check_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc) { - flash_bank_t *p; - int retval; - if (argc != 1) { return ERROR_COMMAND_SYNTAX_ERROR; } - p = get_flash_bank_by_num(strtoul(args[0], NULL, 0)); + flash_bank_t *p; + int retval = flash_command_get_bank_by_num(cmd_ctx, args[0], &p); + if (ERROR_OK != retval) + return retval; + if (p) { int j; @@ -509,12 +512,10 @@ static int handle_flash_erase_address_command(struct command_context_s *cmd_ctx, target_t *target = get_current_target(cmd_ctx); if (argc != 2) - { return ERROR_COMMAND_SYNTAX_ERROR; - } - address = strtoul(args[0], NULL, 0); - length = strtoul(args[1], NULL, 0); + COMMAND_PARSE_NUMBER(int, args[0], address); + COMMAND_PARSE_NUMBER(int, args[1], length); if (length <= 0) { command_print(cmd_ctx, "Length must be >0"); @@ -547,17 +548,17 @@ static int handle_flash_erase_address_command(struct command_context_s *cmd_ctx, static int handle_flash_protect_check_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc) { - flash_bank_t *p; - int retval; - if (argc != 1) - { return ERROR_COMMAND_SYNTAX_ERROR; - } - p = get_flash_bank_by_num(strtoul(args[0], NULL, 0)); + flash_bank_t *p; + int retval = flash_command_get_bank_by_num(cmd_ctx, args[0], &p); + if (ERROR_OK != retval) + return retval; + if (p) { + int retval; if ((retval = p->driver->protect_check(p)) == ERROR_OK) { command_print(cmd_ctx, "successfully checked protect state"); @@ -571,10 +572,6 @@ static int handle_flash_protect_check_command(struct command_context_s *cmd_ctx, command_print(cmd_ctx, "unknown error when checking protection state of flash bank '#%s' at 0x%8.8" PRIx32, args[0], p->base); } } - else - { - return ERROR_COMMAND_SYNTAX_ERROR; - } return ERROR_OK; } @@ -605,23 +602,19 @@ static int handle_flash_erase_command(struct command_context_s *cmd_ctx, uint32_t bank_nr; uint32_t first; uint32_t last; - int retval; - - if ((retval = parse_u32(args[0], &bank_nr)) != ERROR_OK) - return retval; + COMMAND_PARSE_NUMBER(u32, args[0], bank_nr); flash_bank_t *p = get_flash_bank_by_num(bank_nr); if (!p) return ERROR_OK; - if ((retval = parse_u32(args[1], &first)) != ERROR_OK) - return retval; + COMMAND_PARSE_NUMBER(u32, args[1], first); if (strcmp(args[2], "last") == 0) last = p->num_sectors - 1; else - if ((retval = parse_u32(args[2], &last)) != ERROR_OK) - return retval; + COMMAND_PARSE_NUMBER(u32, args[2], last); + int retval; if ((retval = flash_check_sector_parameters(cmd_ctx, first, last, p->num_sectors)) != ERROR_OK) return retval; @@ -655,23 +648,18 @@ static int handle_flash_protect_command(struct command_context_s *cmd_ctx, uint32_t bank_nr; uint32_t first; uint32_t last; - int retval; int set; - if ((retval = parse_u32(args[0], &bank_nr)) != ERROR_OK) - return retval; - + COMMAND_PARSE_NUMBER(u32, args[0], bank_nr); flash_bank_t *p = get_flash_bank_by_num(bank_nr); if (!p) return ERROR_OK; - if ((retval = parse_u32(args[1], &first)) != ERROR_OK) - return retval; + COMMAND_PARSE_NUMBER(u32, args[1], first); if (strcmp(args[2], "last") == 0) last = p->num_sectors - 1; else - if ((retval = parse_u32(args[2], &last)) != ERROR_OK) - return retval; + COMMAND_PARSE_NUMBER(u32, args[2], last); if (strcmp(args[3], "on") == 0) set = 1; @@ -680,6 +668,7 @@ static int handle_flash_protect_command(struct command_context_s *cmd_ctx, else return ERROR_COMMAND_SYNTAX_ERROR; + int retval; if ((retval = flash_check_sector_parameters(cmd_ctx, first, last, p->num_sectors)) != ERROR_OK) return retval; @@ -755,7 +744,7 @@ static int handle_flash_write_image_command(struct command_context_s *cmd_c... [truncated message content] |
From: Øyvind H. <go...@us...> - 2009-11-06 00:02:14
|
This is an automated email from the git hooks/post-receive script. It was generated because a ref change was pushed to the repository containing the project "Main OpenOCD repository". The branch, master has been updated via 0f3117c19d3b0bf8d693b25c2e97ff874d8acc99 (commit) via dc98c64d714c3c2e04bb96400955864b59655575 (commit) via 051eaf795023e990519b093423dd697b4d757f10 (commit) via 4e3c2676f15a130d0594b7c5164ae09f8bd41648 (commit) via 4441c1ffdcc30a3c51a6d407a2f178a1b3fba28a (commit) via cca7cf1e74ef0fd910e090eaa22c9099c30b06c9 (commit) via b64503e37f1080b8d78cc9303363179ae8e38269 (commit) via 1ebdc244941c02503fc042e538991d617157184f (commit) from afed39c0fe20bffcf0f289e59e80ab9d6bb40a91 (commit) Those revisions listed above that are new to this repository have not appeared on any other notification email; so we list those revisions in full, below. - Log ----------------------------------------------------------------- commit 0f3117c19d3b0bf8d693b25c2e97ff874d8acc99 Author: Ãyvind Harboe <oyv...@zy...> Date: Tue Nov 3 12:54:26 2009 +0100 arm920t: add mrcmcr interface fn's. The arm920t has a concept of read modify write cycles that may have to be represented in the mrcmcr interface eventually. Signed-off-by: Ãyvind Harboe <oyv...@zy...> diff --git a/src/target/arm920t.c b/src/target/arm920t.c index 835e4ee..2556002 100644 --- a/src/target/arm920t.c +++ b/src/target/arm920t.c @@ -46,6 +46,10 @@ int arm920t_init_target(struct command_context_s *cmd_ctx, struct target_s *targ #define ARM920T_CP15_PHYS_ADDR(x, y, z) ((x << 5) | (y << 1) << (z)) +static int arm920t_mrc(target_t *target, int cpnum, uint32_t op1, uint32_t op2, uint32_t CRn, uint32_t CRm, uint32_t *value); +static int arm920t_mcr(target_t *target, int cpnum, uint32_t op1, uint32_t op2, uint32_t CRn, uint32_t CRm, uint32_t value); + + target_type_t arm920t_target = { .name = "arm920t", @@ -84,6 +88,8 @@ target_type_t arm920t_target = .target_create = arm920t_target_create, .init_target = arm920t_init_target, .examine = arm9tdmi_examine, + .mrc = arm920t_mrc, + .mcr = arm920t_mcr, }; int arm920t_read_cp15_physical(target_t *target, int reg_addr, uint32_t *value) @@ -1407,3 +1413,26 @@ int arm920t_handle_cache_info_command(struct command_context_s *cmd_ctx, char *c return armv4_5_handle_cache_info_command(cmd_ctx, &arm920t->armv4_5_mmu.armv4_5_cache); } + + +static int arm920t_mrc(target_t *target, int cpnum, uint32_t op1, uint32_t op2, uint32_t CRn, uint32_t CRm, uint32_t *value) +{ + if (cpnum!=15) + { + LOG_ERROR("Only cp15 is supported"); + return ERROR_FAIL; + } + + return arm920t_read_cp15_interpreted(target, mrc_opcode(cpnum, op1, op2, CRn, CRm), 0, value); +} + +static int arm920t_mcr(target_t *target, int cpnum, uint32_t op1, uint32_t op2, uint32_t CRn, uint32_t CRm, uint32_t value) +{ + if (cpnum!=15) + { + LOG_ERROR("Only cp15 is supported"); + return ERROR_FAIL; + } + + return arm920t_write_cp15_interpreted(target, mrc_opcode(cpnum, op1, op2, CRn, CRm), 0, value); +} commit dc98c64d714c3c2e04bb96400955864b59655575 Author: Ãyvind Harboe <oyv...@zy...> Date: Tue Oct 27 13:43:42 2009 +0100 arm11: check if target is halted before executing mrc/mcr commands. Signed-off-by: Ãyvind Harboe <oyv...@zy...> diff --git a/src/target/arm11.c b/src/target/arm11.c index f1e062a..5411b04 100644 --- a/src/target/arm11.c +++ b/src/target/arm11.c @@ -2201,6 +2201,13 @@ int arm11_handle_mcr(struct command_context_s *cmd_ctx, char *cmd, char **args, static int arm11_mrc_inner(target_t *target, int cpnum, uint32_t op1, uint32_t op2, uint32_t CRn, uint32_t CRm, uint32_t *value, bool read) { int retval; + + if (target->state != TARGET_HALTED) + { + LOG_ERROR("Target not halted"); + return ERROR_FAIL; + } + arm11_common_t * arm11 = target->arch_info; uint32_t instr = 0xEE000010 | commit 051eaf795023e990519b093423dd697b4d757f10 Author: Ãyvind Harboe <oyv...@zy...> Date: Mon Oct 26 18:57:52 2009 +0100 target: fix ordering of arguments to mcr and mrc commands Now matches machine code syntax and old arm11 syntax. Signed-off-by: Ãyvind Harboe <oyv...@zy...> diff --git a/src/target/target.c b/src/target/target.c index 9b07df1..9502490 100644 --- a/src/target/target.c +++ b/src/target/target.c @@ -722,25 +722,25 @@ static int arm_cp_check(struct target_s *target, int cpnum, uint32_t op1, uint32 return ERROR_FAIL; } - if (op1>7) + if (op1 > 7) { LOG_ERROR("Illegal op1"); return ERROR_FAIL; } - if (op2>7) + if (op2 > 7) { LOG_ERROR("Illegal op2"); return ERROR_FAIL; } - if (CRn>15) + if (CRn > 15) { LOG_ERROR("Illegal CRn"); return ERROR_FAIL; } - if (CRm>7) + if (CRm > 15) { LOG_ERROR("Illegal CRm"); return ERROR_FAIL; @@ -4899,19 +4899,19 @@ static int jim_mcrmrc(Jim_Interp *interp, int argc, Jim_Obj *const *argv) if (e != JIM_OK) { return e; } - op2 = l; + CRn = l; e = Jim_GetLong(interp, argv[4], &l); if (e != JIM_OK) { return e; } - CRn = l; + CRm = l; e = Jim_GetLong(interp, argv[5], &l); if (e != JIM_OK) { return e; } - CRm = l; + op2 = l; value = 0; commit 4e3c2676f15a130d0594b7c5164ae09f8bd41648 Author: Ãyvind Harboe <oyv...@zy...> Date: Mon Oct 26 18:53:19 2009 +0100 target: check args to mrc/mcr. Signed-off-by: Ãyvind Harboe <oyv...@zy...> diff --git a/src/target/target.c b/src/target/target.c index d4662f7..9b07df1 100644 --- a/src/target/target.c +++ b/src/target/target.c @@ -722,6 +722,30 @@ static int arm_cp_check(struct target_s *target, int cpnum, uint32_t op1, uint32 return ERROR_FAIL; } + if (op1>7) + { + LOG_ERROR("Illegal op1"); + return ERROR_FAIL; + } + + if (op2>7) + { + LOG_ERROR("Illegal op2"); + return ERROR_FAIL; + } + + if (CRn>15) + { + LOG_ERROR("Illegal CRn"); + return ERROR_FAIL; + } + + if (CRm>7) + { + LOG_ERROR("Illegal CRm"); + return ERROR_FAIL; + } + return ERROR_OK; } commit 4441c1ffdcc30a3c51a6d407a2f178a1b3fba28a Author: Ãyvind Harboe <oyv...@zy...> Date: Mon Oct 26 14:39:32 2009 +0100 ARM11: added mrc/mcr support to arm11 code. Signed-off-by: Ãyvind Harboe <oyv...@zy...> diff --git a/TODO b/TODO index 11318a9..8713e81 100644 --- a/TODO +++ b/TODO @@ -143,7 +143,7 @@ Once the above are completed: - regression: "reset halt" between 729(works) and 788(fails): @par https://lists.berlios.de/pipermail/openocd-development/2009-July/009206.html - mcr/mrc target->type support - - missing from ARM11, ARM920t, ARM966e, XScale. + - missing from ARM920t, ARM966e, XScale. It's possible that the current syntax is unable to support read-modify-write operations(see arm966e). - mcr/mrc - retire cp15 commands when there the mrc/mrc commands have been diff --git a/src/target/arm11.c b/src/target/arm11.c index 1e82b93..f1e062a 100644 --- a/src/target/arm11.c +++ b/src/target/arm11.c @@ -60,6 +60,10 @@ bool arm11_config_hardware_step = false; #define ARM11_HANDLER(x) \ .x = arm11_##x + +static int arm11_mrc(target_t *target, int cpnum, uint32_t op1, uint32_t op2, uint32_t CRn, uint32_t CRm, uint32_t *value); +static int arm11_mcr(target_t *target, int cpnum, uint32_t op1, uint32_t op2, uint32_t CRn, uint32_t CRm, uint32_t value); + target_type_t arm11_target = { .name = "arm11", @@ -97,6 +101,9 @@ target_type_t arm11_target = ARM11_HANDLER(target_create), ARM11_HANDLER(init_target), ARM11_HANDLER(examine), + .mrc = arm11_mrc, + .mcr = arm11_mcr, + }; int arm11_regs_arch_type = -1; @@ -2191,6 +2198,52 @@ int arm11_handle_mcr(struct command_context_s *cmd_ctx, char *cmd, char **args, return arm11_handle_mrc_mcr(cmd_ctx, cmd, args, argc, false); } +static int arm11_mrc_inner(target_t *target, int cpnum, uint32_t op1, uint32_t op2, uint32_t CRn, uint32_t CRm, uint32_t *value, bool read) +{ + int retval; + arm11_common_t * arm11 = target->arch_info; + + uint32_t instr = 0xEE000010 | + (cpnum << 8) | + (op1 << 21) | + (CRn << 16) | + (CRm << 0) | + (op2 << 5); + + if (read) + instr |= 0x00100000; + + retval = arm11_run_instr_data_prepare(arm11); + if (retval != ERROR_OK) + return retval; + + if (read) + { + retval = arm11_run_instr_data_from_core_via_r0(arm11, instr, value); + if (retval != ERROR_OK) + return retval; + } + else + { + retval = arm11_run_instr_data_to_core_via_r0(arm11, instr, *value); + if (retval != ERROR_OK) + return retval; + } + + return arm11_run_instr_data_finish(arm11); +} + +static int arm11_mrc(target_t *target, int cpnum, uint32_t op1, uint32_t op2, uint32_t CRn, uint32_t CRm, uint32_t *value) +{ + return arm11_mrc_inner(target, cpnum, op1, op2, CRn, CRm, value, true); +} + +static int arm11_mcr(target_t *target, int cpnum, uint32_t op1, uint32_t op2, uint32_t CRn, uint32_t CRm, uint32_t value) +{ + return arm11_mrc_inner(target, cpnum, op1, op2, CRn, CRm, &value, false); +} + + int arm11_register_commands(struct command_context_s *cmd_ctx) { FNC_INFO; commit cca7cf1e74ef0fd910e090eaa22c9099c30b06c9 Author: Ãyvind Harboe <oyv...@zy...> Date: Sat Oct 24 14:50:57 2009 +0200 TODO: Wrote up list of remaining tasks for target->type->mrc/mcr Signed-off-by: Ãyvind Harboe <oyv...@zy...> diff --git a/TODO b/TODO index 7bdd626..11318a9 100644 --- a/TODO +++ b/TODO @@ -142,6 +142,12 @@ Once the above are completed: https://lists.berlios.de/pipermail/openocd-development/2009-May/006590.html - regression: "reset halt" between 729(works) and 788(fails): @par https://lists.berlios.de/pipermail/openocd-development/2009-July/009206.html +- mcr/mrc target->type support + - missing from ARM11, ARM920t, ARM966e, XScale. + It's possible that the current syntax is unable to support read-modify-write + operations(see arm966e). + - mcr/mrc - retire cp15 commands when there the mrc/mrc commands have been + tested from: arm926ejs, arm720t, cortex_a8 - ARM7/9: - clean up "arm9tdmi vector_catch". Available for some arm7 cores? @par https://lists.berlios.de/pipermail/openocd-development/2009-October/011488.html commit b64503e37f1080b8d78cc9303363179ae8e38269 Author: Ãyvind Harboe <oyv...@zy...> Date: Sat Oct 24 13:24:35 2009 +0200 target: Only register mrc mcr commands when one of the targets support them. This avoids polluting help for targets that can never support mrc/mcr Signed-off-by: Ãyvind Harboe <oyv...@zy...> diff --git a/src/target/target.c b/src/target/target.c index 55fc2c8..d4662f7 100644 --- a/src/target/target.c +++ b/src/target/target.c @@ -816,11 +816,22 @@ int target_init(struct command_context_s *cmd_ctx) if (target->type->mcr == NULL) { target->type->mcr = default_mcr; + } else + { + /* FIX! multiple targets will generally register global commands + * multiple times. Only register this one if *one* of the + * targets need the command. Hmm... make it a command on the + * Jim Tcl target object? + */ + register_jim(cmd_ctx, "mcr", jim_mcrmrc, "write coprocessor <cpnum> <op1> <op2> <CRn> <CRm> <value>"); } if (target->type->mrc == NULL) { target->type->mrc = default_mrc; + } else + { + register_jim(cmd_ctx, "mrc", jim_mcrmrc, "read coprocessor <cpnum> <op1> <op2> <CRn> <CRm>"); } @@ -1660,9 +1671,6 @@ int target_register_user_commands(struct command_context_s *cmd_ctx) register_jim(cmd_ctx, "ocd_mem2array", jim_mem2array, "read memory and return as a TCL array for script processing <ARRAYNAME> <WIDTH = 32/16/8> <ADDRESS> <COUNT>"); register_jim(cmd_ctx, "ocd_array2mem", jim_array2mem, "convert a TCL array to memory locations and write the values <ARRAYNAME> <WIDTH = 32/16/8> <ADDRESS> <COUNT>"); - register_jim(cmd_ctx, "mrc", jim_mcrmrc, "read coprocessor <cpnum> <op1> <op2> <CRn> <CRm>"); - register_jim(cmd_ctx, "mcr", jim_mcrmrc, "write coprocessor <cpnum> <op1> <op2> <CRn> <CRm> <value>"); - register_command(cmd_ctx, NULL, "fast_load_image", handle_fast_load_image_command, COMMAND_ANY, "same args as load_image, image stored in memory - mainly for profiling purposes"); commit 1ebdc244941c02503fc042e538991d617157184f Author: Ãyvind Harboe <oyv...@zy...> Date: Sat Oct 24 13:17:04 2009 +0200 cortex_a8: add mrc mcr interface. Signed-off-by: Ãyvind Harboe <oyv...@zy...> diff --git a/src/target/cortex_a8.c b/src/target/cortex_a8.c index 11068ba..29fffae 100644 --- a/src/target/cortex_a8.c +++ b/src/target/cortex_a8.c @@ -70,6 +70,11 @@ int cortex_a8_dap_write_coreregister_u32(target_t *target, int cortex_a8_assert_reset(target_t *target); int cortex_a8_deassert_reset(target_t *target); +static int cortex_a8_mrc(target_t *target, int cpnum, uint32_t op1, + uint32_t op2, uint32_t CRn, uint32_t CRm, uint32_t *value); +static int cortex_a8_mcr(target_t *target, int cpnum, uint32_t op1, + uint32_t op2, uint32_t CRn, uint32_t CRm, uint32_t value); + target_type_t cortexa8_target = { .name = "cortex_a8", @@ -106,6 +111,8 @@ target_type_t cortexa8_target = .target_create = cortex_a8_target_create, .init_target = cortex_a8_init_target, .examine = cortex_a8_examine, + .mrc = cortex_a8_mrc, + .mcr = cortex_a8_mcr, }; /* @@ -275,6 +282,28 @@ int cortex_a8_write_cp15(target_t *target, uint32_t op1, uint32_t op2, return cortex_a8_write_cp(target, value, 15, op1, CRn, CRm, op2); } +static int cortex_a8_mrc(target_t *target, int cpnum, uint32_t op1, uint32_t op2, uint32_t CRn, uint32_t CRm, uint32_t *value) +{ + if (cpnum!=15) + { + LOG_ERROR("Only cp15 is supported"); + return ERROR_FAIL; + } + return cortex_a8_read_cp15(target, op1, op2, CRn, CRm, value); +} + +static int cortex_a8_mcr(target_t *target, int cpnum, uint32_t op1, uint32_t op2, uint32_t CRn, uint32_t CRm, uint32_t value) +{ + if (cpnum!=15) + { + LOG_ERROR("Only cp15 is supported"); + return ERROR_FAIL; + } + return cortex_a8_write_cp15(target, op1, op2, CRn, CRm, value); +} + + + int cortex_a8_dap_read_coreregister_u32(target_t *target, uint32_t *value, int regnum) { ----------------------------------------------------------------------- Summary of changes: TODO | 6 ++++ src/target/arm11.c | 60 ++++++++++++++++++++++++++++++++++++++++++++++++ src/target/arm920t.c | 29 +++++++++++++++++++++++ src/target/cortex_a8.c | 29 +++++++++++++++++++++++ src/target/target.c | 44 ++++++++++++++++++++++++++++++---- 5 files changed, 162 insertions(+), 6 deletions(-) hooks/post-receive -- Main OpenOCD repository |
From: David B. <dbr...@us...> - 2009-11-05 20:31:52
|
This is an automated email from the git hooks/post-receive script. It was generated because a ref change was pushed to the repository containing the project "Main OpenOCD repository". The branch, master has been updated via afed39c0fe20bffcf0f289e59e80ab9d6bb40a91 (commit) from 98788d7a75b4321c96845a8fbf814f254a6cf153 (commit) Those revisions listed above that are new to this repository have not appeared on any other notification email; so we list those revisions in full, below. - Log ----------------------------------------------------------------- commit afed39c0fe20bffcf0f289e59e80ab9d6bb40a91 Author: David Brownell <dbr...@us...> Date: Thu Nov 5 11:31:32 2009 -0800 User's Guide: TAP setup tweakage Highlight that the "-expected-id" probably comes from vendor documentation, and that it *should* be used where possible. Don't use ircapture/irmask in examples, to help discourage use of those params when they're not required. Explain a bit better about why/when those params get used. Signed-off-by: David Brownell <dbr...@us...> diff --git a/doc/openocd.texi b/doc/openocd.texi index 2108f8e..2ddcd04 100644 --- a/doc/openocd.texi +++ b/doc/openocd.texi @@ -1339,8 +1339,7 @@ The config file for the Atmel AT91SAM7X256 looks (in part) like this: @example -jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf \ - -expected-id $_CPUTAPID +jtag newtap $_CHIPNAME cpu -irlen 4 -expected-id $_CPUTAPID @end example A board with two such at91sam7 chips would be able @@ -2496,7 +2495,7 @@ requires explicit configuration of all TAP devices using A command like this would declare one tap and name it @code{chip1.cpu}: @example -jtag newtap chip1 cpu -irlen 7 -ircapture 0x01 -irmask 0x55 +jtag newtap chip1 cpu -irlen 4 -expected-id 0x3ba00477 @end example Each target configuration file lists the TAPs provided @@ -2641,13 +2640,21 @@ These codes are not required by all JTAG devices. ID code could appear (for example, multiple versions). Specify @var{number} as zero to suppress warnings about IDCODE values that were found but not included in the list. + +Provide this value if at all possible, since it lets OpenOCD +tell when the scan chain it sees isn't right. These values +are provided in vendors' chip documentation, usually a technical +reference manual. Sometimes you may need to probe the JTAG +hardware to find these values. +@xref{Autoprobing}. @item @code{-ircapture} @var{NUMBER} @*The bit pattern loaded by the TAP into the JTAG shift register on entry to the @sc{ircapture} state, such as 0x01. JTAG requires the two LSBs of this value to be 01. By default, @code{-ircapture} and @code{-irmask} are set -up to verify that two-bit value; but you may provide -additional bits, if you know them. +up to verify that two-bit value. You may provide +additional bits, if you know them, or indicate that +a TAP doesn't conform to the JTAG specification. @item @code{-irmask} @var{NUMBER} @*A mask used with @code{-ircapture} to verify that instruction scans work correctly. @@ -6149,12 +6156,13 @@ to execute before they take effect. @end deffn @c tms_sequence (short|long) -@c ... temporary, debug-only, probably gone before 0.2 ships +@c ... temporary, debug-only, other than USBprog bug workaround... @deffn Command {verify_ircapture} (@option{enable}|@option{disable}) Verify values captured during @sc{ircapture} and returned during IR scans. Default is enabled, but this can be overridden by @command{verify_jtag}. +This flag is ignored when validating JTAG chain configuration. @end deffn @deffn Command {verify_jtag} (@option{enable}|@option{disable}) ----------------------------------------------------------------------- Summary of changes: doc/openocd.texi | 20 ++++++++++++++------ 1 files changed, 14 insertions(+), 6 deletions(-) hooks/post-receive -- Main OpenOCD repository |
From: David B. <dbr...@us...> - 2009-11-05 10:48:03
|
This is an automated email from the git hooks/post-receive script. It was generated because a ref change was pushed to the repository containing the project "Main OpenOCD repository". The branch, master has been updated via 98788d7a75b4321c96845a8fbf814f254a6cf153 (commit) from 16b4b8cf5453660c849546ebf8a0c3a5a082329e (commit) Those revisions listed above that are new to this repository have not appeared on any other notification email; so we list those revisions in full, below. - Log ----------------------------------------------------------------- commit 98788d7a75b4321c96845a8fbf814f254a6cf153 Author: David Brownell <dbr...@us...> Date: Thu Nov 5 01:47:44 2009 -0800 watchpoint_add() cleanup Fail watchpoint_add() if it's the same address but the parameters are different ... don't just assume having the same address means the same watchpoint! (Note that overlapping watchpoints aren't detected...) Handle unrecognized return codes more sanely; don't exit()! And describe command params right. Signed-off-by: David Brownell <dbr...@us...> diff --git a/src/target/breakpoints.c b/src/target/breakpoints.c index 8898651..dd672b9 100644 --- a/src/target/breakpoints.c +++ b/src/target/breakpoints.c @@ -178,54 +178,61 @@ breakpoint_t* breakpoint_find(target_t *target, uint32_t address) return NULL; } -int watchpoint_add(target_t *target, uint32_t address, uint32_t length, enum watchpoint_rw rw, uint32_t value, uint32_t mask) +int watchpoint_add(target_t *target, uint32_t address, uint32_t length, + enum watchpoint_rw rw, uint32_t value, uint32_t mask) { watchpoint_t *watchpoint = target->watchpoints; watchpoint_t **watchpoint_p = &target->watchpoints; int retval; + char *reason; while (watchpoint) { - if (watchpoint->address == address) + if (watchpoint->address == address) { + if (watchpoint->length != length + || watchpoint->value != value + || watchpoint->mask != mask + || watchpoint->rw != rw) { + LOG_ERROR("address 0x%8.8" PRIx32 + "already has watchpoint %d", + address, watchpoint->unique_id); + return ERROR_FAIL; + } + + /* ignore duplicate watchpoint */ return ERROR_OK; + } watchpoint_p = &watchpoint->next; watchpoint = watchpoint->next; } - (*watchpoint_p) = malloc(sizeof(watchpoint_t)); + (*watchpoint_p) = calloc(1, sizeof(watchpoint_t)); (*watchpoint_p)->address = address; (*watchpoint_p)->length = length; (*watchpoint_p)->value = value; (*watchpoint_p)->mask = mask; (*watchpoint_p)->rw = rw; - (*watchpoint_p)->set = 0; - (*watchpoint_p)->next = NULL; (*watchpoint_p)->unique_id = bpwp_unique_id++; - if ((retval = target_add_watchpoint(target, *watchpoint_p)) != ERROR_OK) - { - switch (retval) - { - case ERROR_TARGET_RESOURCE_NOT_AVAILABLE: - LOG_INFO("can't add %s watchpoint, resource not available (WPID: %d)", - watchpoint_rw_strings[(*watchpoint_p)->rw], - (*watchpoint_p)->unique_id ); - free (*watchpoint_p); - *watchpoint_p = NULL; - return retval; - break; - case ERROR_TARGET_NOT_HALTED: - LOG_INFO("can't add watchpoint while target is running (WPID: %d)", - (*watchpoint_p)->unique_id ); - free (*watchpoint_p); - *watchpoint_p = NULL; - return retval; - break; - default: - LOG_ERROR("unknown error"); - exit(-1); - break; - } + retval = target_add_watchpoint(target, *watchpoint_p); + switch (retval) { + case ERROR_OK: + break; + case ERROR_TARGET_RESOURCE_NOT_AVAILABLE: + reason = "resource not available"; + goto bye; + case ERROR_TARGET_NOT_HALTED: + reason = "target running"; + goto bye; + default: + reason = "unrecognized error"; +bye: + LOG_ERROR("can't add %s watchpoint at 0x%8.8" PRIx32 ", %s", + watchpoint_rw_strings[(*watchpoint_p)->rw], + address, reason); + free (*watchpoint_p); + *watchpoint_p = NULL; + return retval; } LOG_DEBUG("added %s watchpoint at 0x%8.8" PRIx32 " of length 0x%8.8x (WPID: %d)", diff --git a/src/target/breakpoints.h b/src/target/breakpoints.h index b75aae6..9145966 100644 --- a/src/target/breakpoints.h +++ b/src/target/breakpoints.h @@ -49,7 +49,7 @@ typedef struct breakpoint_s typedef struct watchpoint_s { uint32_t address; - int length; + uint32_t length; uint32_t mask; uint32_t value; enum watchpoint_rw rw; diff --git a/src/target/cortex_m3.c b/src/target/cortex_m3.c index eb37add..51481a9 100644 --- a/src/target/cortex_m3.c +++ b/src/target/cortex_m3.c @@ -1199,7 +1199,7 @@ cortex_m3_add_watchpoint(struct target_s *target, watchpoint_t *watchpoint) unsigned mask; for (mask = 0; mask < 16; mask++) { - if ((1 << mask) == watchpoint->length) + if ((1u << mask) == watchpoint->length) break; } if (mask == 16) { diff --git a/src/target/target.c b/src/target/target.c index 2a66fcf..55fc2c8 100644 --- a/src/target/target.c +++ b/src/target/target.c @@ -2988,7 +2988,8 @@ static int handle_wp_command(struct command_context_s *cmd_ctx, char *cmd, char break; default: - command_print(cmd_ctx, "usage: wp <address> <length> [r/w/a] [value] [mask]"); + command_print(cmd_ctx, "usage: wp [address length " + "[(r|w|a) [value [mask]]]]"); return ERROR_COMMAND_SYNTAX_ERROR; } ----------------------------------------------------------------------- Summary of changes: src/target/breakpoints.c | 65 +++++++++++++++++++++++++-------------------- src/target/breakpoints.h | 2 +- src/target/cortex_m3.c | 2 +- src/target/target.c | 3 +- 4 files changed, 40 insertions(+), 32 deletions(-) hooks/post-receive -- Main OpenOCD repository |
From: David B. <dbr...@us...> - 2009-11-05 10:07:06
|
This is an automated email from the git hooks/post-receive script. It was generated because a ref change was pushed to the repository containing the project "Main OpenOCD repository". The branch, master has been updated via 16b4b8cf5453660c849546ebf8a0c3a5a082329e (commit) via 8fb2baaa6b428bd50165f045749786c34857ab02 (commit) via 7acb2607ff79336174014ddfc313433ada9abc44 (commit) via ff50caa8faaf135426d08f082805b9895b978e9b (commit) from d269122f91efaf2f745424c215fabb758b7e7ea0 (commit) Those revisions listed above that are new to this repository have not appeared on any other notification email; so we list those revisions in full, below. - Log ----------------------------------------------------------------- commit 16b4b8cf5453660c849546ebf8a0c3a5a082329e Author: David Brownell <dbr...@us...> Date: Thu Nov 5 01:04:08 2009 -0800 Cortex-M3: expose most DWT registers Expose most DWT registers via Tcl; there are a few more, but those are mostly for profiling along with the ITM. Having this set available enables operations which aren't possible with just the standard watchpoint operations. The cycle counter may be interesting. Turn it on after reset by setting the LSB of the dwt_ctrl register, and it counts CPU clocks. You can program the comparator 0 watchpoint to trigger on a given cycle count, rather than a data address. Likewise, comparator 1 may be able to match data values given address matches from one or two other comparators. (Not all hardware supports this capability though; try it. That is something the standard watchpoint methods should eventually handle, for the single address case.) Minor cleanup: remove needless functional indirection for exposing the v7m architctural registers. Signed-off-by: David Brownell <dbr...@us...> diff --git a/src/target/cortex_m3.c b/src/target/cortex_m3.c index d8a2879..eb37add 100644 --- a/src/target/cortex_m3.c +++ b/src/target/cortex_m3.c @@ -1480,22 +1480,157 @@ static int cortex_m3_bulk_write_memory(target_t *target, uint32_t address, return cortex_m3_write_memory(target, address, 4, count, buffer); } -static void cortex_m3_build_reg_cache(target_t *target) +static int cortex_m3_init_target(struct command_context_s *cmd_ctx, + struct target_s *target) { armv7m_build_reg_cache(target); + return ERROR_OK; } -static int cortex_m3_init_target(struct command_context_s *cmd_ctx, - struct target_s *target) +/* REVISIT cache valid/dirty bits are unmaintained. We could set "valid" + * on r/w if the core is not running, and clear on resume or reset ... or + * at least, in a post_restore_context() method. + */ + +struct dwt_reg_state { + struct target_s *target; + uint32_t addr; + uint32_t value; /* scratch/cache */ +}; + +static int cortex_m3_dwt_get_reg(struct reg_s *reg) { - cortex_m3_build_reg_cache(target); - return ERROR_OK; + struct dwt_reg_state *state = reg->arch_info; + + return target_read_u32(state->target, state->addr, &state->value); +} + +static int cortex_m3_dwt_set_reg(struct reg_s *reg, uint8_t *buf) +{ + struct dwt_reg_state *state = reg->arch_info; + + return target_write_u32(state->target, state->addr, + buf_get_u32(buf, 0, reg->size)); +} + +struct dwt_reg { + uint32_t addr; + char *name; + unsigned size; +}; + +static struct dwt_reg dwt_base_regs[] = { + { DWT_CTRL, "dwt_ctrl", 32, }, + { DWT_CYCCNT, "dwt_cyccnt", 32, }, + /* plus some 8 bit counters, useful for profiling with TPIU */ +}; + +static struct dwt_reg dwt_comp[] = { +#define DWT_COMPARATOR(i) \ + { DWT_COMP0 + 0x10 * (i), "dwt_" #i "_comp", 32, }, \ + { DWT_MASK0 + 0x10 * (i), "dwt_" #i "_mask", 4, }, \ + { DWT_FUNCTION0 + 0x10 * (i), "dwt_" #i "_function", 32, } + DWT_COMPARATOR(0), + DWT_COMPARATOR(1), + DWT_COMPARATOR(2), + DWT_COMPARATOR(3), +#undef DWT_COMPARATOR +}; + +static int dwt_reg_type = -1; + +static void +cortex_m3_dwt_addreg(struct target_s *t, struct reg_s *r, struct dwt_reg *d) +{ + struct dwt_reg_state *state; + + state = calloc(1, sizeof *state); + if (!state) + return; + state->addr = d->addr; + state->target = t; + + r->name = d->name; + r->size = d->size; + r->value = &state->value; + r->arch_info = state; + r->arch_type = dwt_reg_type; +} + +static void +cortex_m3_dwt_setup(cortex_m3_common_t *cm3, struct target_s *target) +{ + uint32_t dwtcr; + struct reg_cache_s *cache; + cortex_m3_dwt_comparator_t *comparator; + int reg, i; + + target_read_u32(target, DWT_CTRL, &dwtcr); + if (!dwtcr) { + LOG_DEBUG("no DWT"); + return; + } + + if (dwt_reg_type < 0) + dwt_reg_type = register_reg_arch_type(cortex_m3_dwt_get_reg, + cortex_m3_dwt_set_reg); + + cm3->dwt_num_comp = (dwtcr >> 28) & 0xF; + cm3->dwt_comp_available = cm3->dwt_num_comp; + cm3->dwt_comparator_list = calloc(cm3->dwt_num_comp, + sizeof(cortex_m3_dwt_comparator_t)); + if (!cm3->dwt_comparator_list) { +fail0: + cm3->dwt_num_comp = 0; + LOG_ERROR("out of mem"); + return; + } + + cache = calloc(1, sizeof *cache); + if (!cache) { +fail1: + free(cm3->dwt_comparator_list); + goto fail0; + } + cache->name = "cortex-m3 dwt registers"; + cache->num_regs = 2 + cm3->dwt_num_comp * 3; + cache->reg_list = calloc(cache->num_regs, sizeof *cache->reg_list); + if (!cache->reg_list) { + free(cache); + goto fail1; + } + + for (reg = 0; reg < 2; reg++) + cortex_m3_dwt_addreg(target, cache->reg_list + reg, + dwt_base_regs + reg); + + comparator = cm3->dwt_comparator_list; + for (i = 0; i < cm3->dwt_num_comp; i++, comparator++) { + int j; + + comparator->dwt_comparator_address = DWT_COMP0 + 0x10 * i; + for (j = 0; j < 3; j++, reg++) + cortex_m3_dwt_addreg(target, cache->reg_list + reg, + dwt_comp + 3 * i + j); + } + + *register_get_last_cache_p(&target->reg_cache) = cache; + cm3->dwt_cache = cache; + + LOG_INFO("DWT dwtcr 0x%" PRIx32 ", comp %d, watch%s", + dwtcr, cm3->dwt_num_comp, + (dwtcr & (0xf << 24)) ? " only" : "/trigger"); + + /* REVISIT: if num_comp > 1, check whether comparator #1 can + * implement single-address data value watchpoints ... so we + * won't need to check it later, when asked to set one up. + */ } static int cortex_m3_examine(struct target_s *target) { int retval; - uint32_t cpuid, fpcr, dwtcr; + uint32_t cpuid, fpcr; int i; /* get pointers to arch-specific information */ @@ -1537,21 +1672,7 @@ static int cortex_m3_examine(struct target_s *target) LOG_DEBUG("FPB fpcr 0x%" PRIx32 ", numcode %i, numlit %i", fpcr, cortex_m3->fp_num_code, cortex_m3->fp_num_lit); /* Setup DWT */ - target_read_u32(target, DWT_CTRL, &dwtcr); - cortex_m3->dwt_num_comp = (dwtcr >> 28) & 0xF; - cortex_m3->dwt_comp_available = cortex_m3->dwt_num_comp; - cortex_m3->dwt_comparator_list = calloc( - cortex_m3->dwt_num_comp, - sizeof(cortex_m3_dwt_comparator_t)); - for (i = 0; i < cortex_m3->dwt_num_comp; i++) - { - cortex_m3->dwt_comparator_list[i] - .dwt_comparator_address = DWT_COMP0 + 0x10 * i; - } - if (cortex_m3->dwt_num_comp) - LOG_DEBUG("DWT dwtcr 0x%" PRIx32 ", comp %d, watch%s", - dwtcr, cortex_m3->dwt_num_comp, - (dwtcr & (0xf << 24)) ? " only" : "/trigger"); + cortex_m3_dwt_setup(cortex_m3, target); } return ERROR_OK; diff --git a/src/target/cortex_m3.h b/src/target/cortex_m3.h index a7074d3..1dd724c 100644 --- a/src/target/cortex_m3.h +++ b/src/target/cortex_m3.h @@ -45,6 +45,7 @@ #define DCRSR_WnR (1 << 16) #define DWT_CTRL 0xE0001000 +#define DWT_CYCCNT 0xE0001004 #define DWT_COMP0 0xE0001020 #define DWT_MASK0 0xE0001024 #define DWT_FUNCTION0 0xE0001028 @@ -157,6 +158,7 @@ typedef struct cortex_m3_common_s int dwt_num_comp; int dwt_comp_available; cortex_m3_dwt_comparator_t *dwt_comparator_list; + struct reg_cache_s *dwt_cache; armv7m_common_t armv7m; void *arch_info; commit 8fb2baaa6b428bd50165f045749786c34857ab02 Author: David Brownell <dbr...@us...> Date: Thu Nov 5 01:03:54 2009 -0800 Cortex-M3: minor cleanup There's no reason to read which interrupts are enabled from the NVIC; that state isn't used. Plus, it's highly dynamic since firmware can change it at any time; remove the support for those state records. Remove duplicate definition of DWT_CTRL address; shrink a line. Signed-off-by: David Brownell <dbr...@us...> diff --git a/src/target/cortex_m3.c b/src/target/cortex_m3.c index ef57a4c..d8a2879 100644 --- a/src/target/cortex_m3.c +++ b/src/target/cortex_m3.c @@ -1495,7 +1495,7 @@ static int cortex_m3_init_target(struct command_context_s *cmd_ctx, static int cortex_m3_examine(struct target_s *target) { int retval; - uint32_t cpuid, fpcr, dwtcr, ictr; + uint32_t cpuid, fpcr, dwtcr; int i; /* get pointers to arch-specific information */ @@ -1511,21 +1511,15 @@ static int cortex_m3_examine(struct target_s *target) target_set_examined(target); /* Read from Device Identification Registers */ - if ((retval = target_read_u32(target, CPUID, &cpuid)) != ERROR_OK) + retval = target_read_u32(target, CPUID, &cpuid); + if (retval != ERROR_OK) return retval; if (((cpuid >> 4) & 0xc3f) == 0xc23) LOG_DEBUG("CORTEX-M3 processor detected"); LOG_DEBUG("cpuid: 0x%8.8" PRIx32 "", cpuid); - target_read_u32(target, NVIC_ICTR, &ictr); - cortex_m3->intlinesnum = (ictr & 0x1F) + 1; - cortex_m3->intsetenable = calloc(cortex_m3->intlinesnum, 4); - for (i = 0; i < cortex_m3->intlinesnum; i++) - { - target_read_u32(target, NVIC_ISE0 + 4 * i, cortex_m3->intsetenable + i); - LOG_DEBUG("interrupt enable[%i] = 0x%8.8" PRIx32 "", i, cortex_m3->intsetenable[i]); - } + /* NOTE: FPB and DWT are both optional. */ /* Setup FPB */ target_read_u32(target, FP_CTRL, &fpcr); diff --git a/src/target/cortex_m3.h b/src/target/cortex_m3.h index f4cefa7..a7074d3 100644 --- a/src/target/cortex_m3.h +++ b/src/target/cortex_m3.h @@ -60,8 +60,6 @@ #define FP_COMP6 0xE0002020 #define FP_COMP7 0xE0002024 -#define DWT_CTRL 0xE0001000 - /* DCB_DHCSR bit and field definitions */ #define DBGKEY (0xA05F << 16) #define C_DEBUGEN (1 << 0) @@ -160,10 +158,6 @@ typedef struct cortex_m3_common_s int dwt_comp_available; cortex_m3_dwt_comparator_t *dwt_comparator_list; - /* Interrupts */ - int intlinesnum; - uint32_t *intsetenable; - armv7m_common_t armv7m; void *arch_info; } cortex_m3_common_t; commit 7acb2607ff79336174014ddfc313433ada9abc44 Author: David Brownell <dbr...@us...> Date: Thu Nov 5 01:03:17 2009 -0800 Cortex-M3: DWT cleanup/fixes Fix the watchpoint error checks, and do them in add(), not later in set() when it's mostly too late. Support the full range of watchpoint sizes (1 to 32K bytes each), and check alignments. Minor cleanup of DWT access: shrink lines, use "+" for address calculations, comment a few issues. Add debug message reporting DWT capabilities, matching the message for FBP, and some minor code and spec review comments. Signed-off-by: David Brownell <dbr...@us...> diff --git a/src/target/cortex_m3.c b/src/target/cortex_m3.c index 1afa29f..ef57a4c 100644 --- a/src/target/cortex_m3.c +++ b/src/target/cortex_m3.c @@ -223,9 +223,12 @@ static int cortex_m3_endreset_event(target_t *target) /* Restore DWT registers */ for (i = 0; i < cortex_m3->dwt_num_comp; i++) { - target_write_u32(target, dwt_list[i].dwt_comparator_address, dwt_list[i].comp); - target_write_u32(target, dwt_list[i].dwt_comparator_address | 0x4, dwt_list[i].mask); - target_write_u32(target, dwt_list[i].dwt_comparator_address | 0x8, dwt_list[i].function); + target_write_u32(target, dwt_list[i].dwt_comparator_address + 0, + dwt_list[i].comp); + target_write_u32(target, dwt_list[i].dwt_comparator_address + 4, + dwt_list[i].mask); + target_write_u32(target, dwt_list[i].dwt_comparator_address + 8, + dwt_list[i].function); } swjdp_transaction_endcheck(swjdp); @@ -259,7 +262,7 @@ static int cortex_m3_examine_debug_reason(target_t *target) target->debug_reason = DBG_REASON_WATCHPOINT; else if (cortex_m3->nvic_dfsr & DFSR_VCATCH) target->debug_reason = DBG_REASON_BREAKPOINT; - else /* EXTERNAL, HALTED, DWTTRAP w/o BKPT */ + else /* EXTERNAL, HALTED */ target->debug_reason = DBG_REASON_UNDEFINED; } @@ -621,7 +624,7 @@ static int cortex_m3_resume(struct target_s *target, int current, { LOG_DEBUG("unset breakpoint at 0x%8.8" PRIx32 " (ID: %d)", breakpoint->address, - breakpoint->unique_id ); + breakpoint->unique_id); cortex_m3_unset_breakpoint(target, breakpoint); cortex_m3_single_step_core(target); cortex_m3_set_breakpoint(target, breakpoint); @@ -1036,6 +1039,7 @@ cortex_m3_remove_breakpoint(struct target_s *target, breakpoint_t *breakpoint) armv7m_common_t *armv7m = target->arch_info; cortex_m3_common_t *cortex_m3 = armv7m->arch_info; + /* REVISIT why check? FBP can be updated with core running ... */ if (target->state != TARGET_HALTED) { LOG_WARNING("target not halted"); @@ -1067,52 +1071,63 @@ cortex_m3_set_watchpoint(struct target_s *target, watchpoint_t *watchpoint) /* get pointers to arch-specific information */ armv7m_common_t *armv7m = target->arch_info; cortex_m3_common_t *cortex_m3 = armv7m->arch_info; - cortex_m3_dwt_comparator_t * comparator_list = cortex_m3->dwt_comparator_list; - if (watchpoint->set) - { - LOG_WARNING("watchpoint (%d) already set", watchpoint->unique_id ); - return ERROR_OK; + /* watchpoint params were validated earlier */ + mask = 0; + temp = watchpoint->length; + while (temp) { + temp >>= 1; + mask++; } + mask--; + + /* REVISIT Don't fully trust these "not used" records ... users + * may set up breakpoints by hand, e.g. dual-address data value + * watchpoint using comparator #1; comparator #0 matching cycle + * count; send data trace info through ITM and TPIU; etc + */ + cortex_m3_dwt_comparator_t *comparator; - if (watchpoint->mask == 0xffffffffu) + for (comparator = cortex_m3->dwt_comparator_list; + comparator->used && dwt_num < cortex_m3->dwt_num_comp; + comparator++, dwt_num++) + continue; + if (dwt_num >= cortex_m3->dwt_num_comp) { - while (comparator_list[dwt_num].used && (dwt_num < cortex_m3->dwt_num_comp)) - dwt_num++; - if (dwt_num >= cortex_m3->dwt_num_comp) - { - LOG_DEBUG("ERROR Can not find free DWT Comparator"); - LOG_WARNING("ERROR Can not find free DWT Comparator"); - return -1; - } - watchpoint->set = dwt_num + 1; - mask = 0; - temp = watchpoint->length; - while (temp > 1) - { - temp = temp / 2; - mask++; - } - comparator_list[dwt_num].used = 1; - comparator_list[dwt_num].comp = watchpoint->address; - comparator_list[dwt_num].mask = mask; - comparator_list[dwt_num].function = watchpoint->rw + 5; - target_write_u32(target, comparator_list[dwt_num].dwt_comparator_address, comparator_list[dwt_num].comp); - target_write_u32(target, comparator_list[dwt_num].dwt_comparator_address | 0x4, comparator_list[dwt_num].mask); - target_write_u32(target, comparator_list[dwt_num].dwt_comparator_address | 0x8, comparator_list[dwt_num].function); - LOG_DEBUG("dwt_num %i 0x%" PRIx32 " 0x%" PRIx32 " 0x%" PRIx32 "", dwt_num, comparator_list[dwt_num].comp, comparator_list[dwt_num].mask, comparator_list[dwt_num].function); + LOG_ERROR("Can not find free DWT Comparator"); + return ERROR_FAIL; } - else - { - /* Move this test to add_watchpoint */ - LOG_WARNING("Cannot watch data values (id: %d)", - watchpoint->unique_id ); - return ERROR_OK; + comparator->used = 1; + watchpoint->set = dwt_num + 1; + + comparator->comp = watchpoint->address; + target_write_u32(target, comparator->dwt_comparator_address + 0, + comparator->comp); + + comparator->mask = mask; + target_write_u32(target, comparator->dwt_comparator_address + 4, + comparator->mask); + + switch (watchpoint->rw) { + case WPT_READ: + comparator->function = 5; + break; + case WPT_WRITE: + comparator->function = 6; + break; + case WPT_ACCESS: + comparator->function = 7; + break; } - LOG_DEBUG("Watchpoint (ID: %d) address: 0x%08" PRIx32 " set=%d ", - watchpoint->unique_id, watchpoint->address, watchpoint->set ); - return ERROR_OK; + target_write_u32(target, comparator->dwt_comparator_address + 8, + comparator->function); + LOG_DEBUG("Watchpoint (ID %d) DWT%d 0x%08x 0x%x 0x%05x", + watchpoint->unique_id, dwt_num, + (unsigned) comparator->comp, + (unsigned) comparator->mask, + (unsigned) comparator->function); + return ERROR_OK; } static int @@ -1121,28 +1136,33 @@ cortex_m3_unset_watchpoint(struct target_s *target, watchpoint_t *watchpoint) /* get pointers to arch-specific information */ armv7m_common_t *armv7m = target->arch_info; cortex_m3_common_t *cortex_m3 = armv7m->arch_info; - cortex_m3_dwt_comparator_t * comparator_list = cortex_m3->dwt_comparator_list; + cortex_m3_dwt_comparator_t *comparator; int dwt_num; if (!watchpoint->set) { - LOG_WARNING("watchpoint (wpid: %d) not set", watchpoint->unique_id ); + LOG_WARNING("watchpoint (wpid: %d) not set", + watchpoint->unique_id); return ERROR_OK; } - LOG_DEBUG("Watchpoint (ID: %d) address: 0x%08" PRIx32 " set=%d ", - watchpoint->unique_id, watchpoint->address,watchpoint->set ); - dwt_num = watchpoint->set - 1; + LOG_DEBUG("Watchpoint (ID %d) DWT%d address: 0x%08x clear", + watchpoint->unique_id, dwt_num, + (unsigned) watchpoint->address); + if ((dwt_num < 0) || (dwt_num >= cortex_m3->dwt_num_comp)) { LOG_DEBUG("Invalid DWT Comparator number in watchpoint"); return ERROR_OK; } - comparator_list[dwt_num].used = 0; - comparator_list[dwt_num].function = 0; - target_write_u32(target, comparator_list[dwt_num].dwt_comparator_address | 0x8, comparator_list[dwt_num].function); + + comparator = cortex_m3->dwt_comparator_list + dwt_num; + comparator->used = 0; + comparator->function = 0; + target_write_u32(target, comparator->dwt_comparator_address + 8, + comparator->function); watchpoint->set = 0; @@ -1156,6 +1176,7 @@ cortex_m3_add_watchpoint(struct target_s *target, watchpoint_t *watchpoint) armv7m_common_t *armv7m = target->arch_info; cortex_m3_common_t *cortex_m3 = armv7m->arch_info; + /* REVISIT why check? DWT can be updated with core running ... */ if (target->state != TARGET_HALTED) { LOG_WARNING("target not halted"); @@ -1164,11 +1185,41 @@ cortex_m3_add_watchpoint(struct target_s *target, watchpoint_t *watchpoint) if (cortex_m3->dwt_comp_available < 1) { + LOG_DEBUG("no comparators?"); return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; } - if ((watchpoint->length != 1) && (watchpoint->length != 2) && (watchpoint->length != 4)) - { + /* hardware doesn't support data value masking */ + if (watchpoint->mask != ~(uint32_t)0) { + LOG_DEBUG("watchpoint value masks not supported"); + return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; + } + + /* hardware allows address masks of up to 32K */ + unsigned mask; + + for (mask = 0; mask < 16; mask++) { + if ((1 << mask) == watchpoint->length) + break; + } + if (mask == 16) { + LOG_DEBUG("unsupported watchpoint length"); + return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; + } + if (watchpoint->address & ((1 << mask) - 1)) { + LOG_DEBUG("watchpoint address is unaligned"); + return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; + } + + /* Caller doesn't seem to be able to describe watching for data + * values of zero; that flags "no value". + * + * REVISIT This DWT may well be able to watch for specific data + * values. Requires comparator #1 to set DATAVMATCH and match + * the data, and another comparator (DATAVADDR0) matching addr. + */ + if (watchpoint->value) { + LOG_DEBUG("data value watchpoint not YET supported"); return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; } @@ -1185,6 +1236,7 @@ cortex_m3_remove_watchpoint(struct target_s *target, watchpoint_t *watchpoint) armv7m_common_t *armv7m = target->arch_info; cortex_m3_common_t *cortex_m3 = armv7m->arch_info; + /* REVISIT why check? DWT can be updated with core running ... */ if (target->state != TARGET_HALTED) { LOG_WARNING("target not halted"); @@ -1494,11 +1546,18 @@ static int cortex_m3_examine(struct target_s *target) target_read_u32(target, DWT_CTRL, &dwtcr); cortex_m3->dwt_num_comp = (dwtcr >> 28) & 0xF; cortex_m3->dwt_comp_available = cortex_m3->dwt_num_comp; - cortex_m3->dwt_comparator_list = calloc(cortex_m3->dwt_num_comp, sizeof(cortex_m3_dwt_comparator_t)); + cortex_m3->dwt_comparator_list = calloc( + cortex_m3->dwt_num_comp, + sizeof(cortex_m3_dwt_comparator_t)); for (i = 0; i < cortex_m3->dwt_num_comp; i++) { - cortex_m3->dwt_comparator_list[i].dwt_comparator_address = DWT_COMP0 + 0x10 * i; + cortex_m3->dwt_comparator_list[i] + .dwt_comparator_address = DWT_COMP0 + 0x10 * i; } + if (cortex_m3->dwt_num_comp) + LOG_DEBUG("DWT dwtcr 0x%" PRIx32 ", comp %d, watch%s", + dwtcr, cortex_m3->dwt_num_comp, + (dwtcr & (0xf << 24)) ? " only" : "/trigger"); } return ERROR_OK; commit ff50caa8faaf135426d08f082805b9895b978e9b Author: David Brownell <dbr...@us...> Date: Thu Nov 5 01:02:52 2009 -0800 ARMv7M: add docs, remove exports Add Doxygen for the exported ARMv7-M interfaces. Make the non-exported stuff static. Remove functions and data which are now observably unused. Add comment about a small speedup that the run_algorithm() logic could use. Shrink a few too-long lines. Signed-off-by: David Brownell <dbr...@us...> diff --git a/src/target/armv7m.c b/src/target/armv7m.c index 75a2fb9..64bdfd5 100644 --- a/src/target/armv7m.c +++ b/src/target/armv7m.c @@ -43,7 +43,8 @@ #define _DEBUG_INSTRUCTION_EXECUTION_ #endif -char* armv7m_mode_strings[] = +/** Maps from enum armv7m_mode (except ARMV7M_MODE_ANY) to name. */ +char *armv7m_mode_strings[] = { "Thread", "Thread (User)", "Handler", }; @@ -56,16 +57,18 @@ static char *armv7m_exception_strings[] = "DebugMonitor", "RESERVED", "PendSV", "SysTick" }; -uint8_t armv7m_gdb_dummy_fp_value[] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}; +static uint8_t armv7m_gdb_dummy_fp_value[12] = { + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, +}; -reg_t armv7m_gdb_dummy_fp_reg = +static reg_t armv7m_gdb_dummy_fp_reg = { "GDB dummy floating-point register", armv7m_gdb_dummy_fp_value, 0, 1, 96, NULL, 0, NULL, 0 }; -uint8_t armv7m_gdb_dummy_fps_value[] = {0, 0, 0, 0}; +static uint8_t armv7m_gdb_dummy_fps_value[] = {0, 0, 0, 0}; -reg_t armv7m_gdb_dummy_fps_reg = +static reg_t armv7m_gdb_dummy_fps_reg = { "GDB dummy floating-point status register", armv7m_gdb_dummy_fps_value, 0, 1, 32, NULL, 0, NULL, 0 }; @@ -83,6 +86,9 @@ reg_t armv7m_gdb_dummy_cpsr_reg = * These registers are not memory-mapped. The ARMv7-M profile includes * memory mapped registers too, such as for the NVIC (interrupt controller) * and SysTick (timer) modules; those can mostly be treated as peripherals. + * + * The ARMv6-M profile is almost identical in this respect, except that it + * doesn't include basepri or faultmask registers. */ static const struct { unsigned id; @@ -121,9 +127,12 @@ static const struct { #define ARMV7M_NUM_REGS ARRAY_SIZE(armv7m_regs) -int armv7m_core_reg_arch_type = -1; -int armv7m_dummy_core_reg_arch_type = -1; +static int armv7m_core_reg_arch_type = -1; +/** + * Restores target context using the cache of core registers set up + * by armv7m_build_reg_cache(), calling optional core-specific hooks. + */ int armv7m_restore_context(target_t *target) { int i; @@ -151,6 +160,14 @@ int armv7m_restore_context(target_t *target) } /* Core state functions */ + +/** + * Maps ISR number (from xPSR) to name. + * Note that while names and meanings for the first sixteen are standardized + * (with zero not a true exception), external interrupts are only numbered. + * They are assigned by vendors, which generally assign different numbers to + * peripherals (such as UART0 or a USB peripheral controller). + */ char *armv7m_exception_string(int number) { static char enamebuf[32]; @@ -163,7 +180,7 @@ char *armv7m_exception_string(int number) return enamebuf; } -int armv7m_get_core_reg(reg_t *reg) +static int armv7m_get_core_reg(reg_t *reg) { int retval; armv7m_core_reg_t *armv7m_reg = reg->arch_info; @@ -180,7 +197,7 @@ int armv7m_get_core_reg(reg_t *reg) return retval; } -int armv7m_set_core_reg(reg_t *reg, uint8_t *buf) +static int armv7m_set_core_reg(reg_t *reg, uint8_t *buf) { armv7m_core_reg_t *armv7m_reg = reg->arch_info; target_t *target = armv7m_reg->target; @@ -198,7 +215,7 @@ int armv7m_set_core_reg(reg_t *reg, uint8_t *buf) return ERROR_OK; } -int armv7m_read_core_reg(struct target_s *target, int num) +static int armv7m_read_core_reg(struct target_s *target, int num) { uint32_t reg_value; int retval; @@ -219,7 +236,7 @@ int armv7m_read_core_reg(struct target_s *target, int num) return retval; } -int armv7m_write_core_reg(struct target_s *target, int num) +static int armv7m_write_core_reg(struct target_s *target, int num) { int retval; uint32_t reg_value; @@ -247,6 +264,7 @@ int armv7m_write_core_reg(struct target_s *target, int num) return ERROR_OK; } +/** Invalidates cache of core registers set up by armv7m_build_reg_cache(). */ int armv7m_invalidate_core_regs(target_t *target) { /* get pointers to arch-specific information */ @@ -262,6 +280,12 @@ int armv7m_invalidate_core_regs(target_t *target) return ERROR_OK; } +/** + * Returns generic ARM userspace registers to GDB. + * GDB doesn't quite understand that most ARMs don't have floating point + * hardware, so this also fakes a set of long-obsolete FPA registers that + * are not used in EABI based software stacks. + */ int armv7m_get_gdb_reg_list(target_t *target, reg_t **reg_list[], int *reg_list_size) { /* get pointers to arch-specific information */ @@ -339,7 +363,12 @@ static int armv7m_run_and_wait(struct target_s *target, uint32_t entry_point, in return ERROR_OK; } -int armv7m_run_algorithm(struct target_s *target, int num_mem_params, mem_param_t *mem_params, int num_reg_params, reg_param_t *reg_params, uint32_t entry_point, uint32_t exit_point, int timeout_ms, void *arch_info) +/** Runs a Thumb algorithm in the target. */ +int armv7m_run_algorithm(struct target_s *target, + int num_mem_params, mem_param_t *mem_params, + int num_reg_params, reg_param_t *reg_params, + uint32_t entry_point, uint32_t exit_point, + int timeout_ms, void *arch_info) { /* get pointers to arch-specific information */ armv7m_common_t *armv7m = target->arch_info; @@ -406,6 +435,11 @@ int armv7m_run_algorithm(struct target_s *target, int num_mem_params, mem_param_ armv7m->core_cache->reg_list[ARMV7M_CONTROL].valid = 1; } + /* REVISIT speed things up (3% or so in one case) by requiring + * algorithms to include a BKPT instruction at each exit point. + * This eliminates overheads of adding/removing a breakpoint. + */ + /* ARMV7M always runs in Thumb state */ if ((retval = breakpoint_add(target, exit_point, 2, BKPT_SOFT)) != ERROR_OK) { @@ -475,6 +509,7 @@ int armv7m_run_algorithm(struct target_s *target, int num_mem_params, mem_param_ return retval; } +/** Logs summary of ARMv7-M state for a halted target. */ int armv7m_arch_state(struct target_s *target) { /* get pointers to arch-specific information */ @@ -498,6 +533,7 @@ int armv7m_arch_state(struct target_s *target) return ERROR_OK; } +/** Builds cache of architecturally defined registers. */ reg_cache_t *armv7m_build_reg_cache(target_t *target) { /* get pointers to arch-specific information */ @@ -548,13 +584,7 @@ reg_cache_t *armv7m_build_reg_cache(target_t *target) return cache; } -int armv7m_init_target(struct command_context_s *cmd_ctx, struct target_s *target) -{ - armv7m_build_reg_cache(target); - - return ERROR_OK; -} - +/** Sets up target as a generic ARMv7-M core */ int armv7m_init_arch_info(target_t *target, armv7m_common_t *armv7m) { /* register arch-specific functions */ @@ -566,7 +596,9 @@ int armv7m_init_arch_info(target_t *target, armv7m_common_t *armv7m) return ERROR_OK; } -int armv7m_checksum_memory(struct target_s *target, uint32_t address, uint32_t count, uint32_t* checksum) +/** Generates a CRC32 checksum of a memory region. */ +int armv7m_checksum_memory(struct target_s *target, + uint32_t address, uint32_t count, uint32_t* checksum) { working_area_t *crc_algorithm; armv7m_algorithm_t armv7m_info; @@ -647,7 +679,9 @@ int armv7m_checksum_memory(struct target_s *target, uint32_t address, uint32_t c return ERROR_OK; } -int armv7m_blank_check_memory(struct target_s *target, uint32_t address, uint32_t count, uint32_t* blank) +/** Checks whether a memory region is zeroed. */ +int armv7m_blank_check_memory(struct target_s *target, + uint32_t address, uint32_t count, uint32_t* blank) { working_area_t *erase_check_algorithm; reg_param_t reg_params[3]; @@ -657,13 +691,13 @@ int armv7m_blank_check_memory(struct target_s *target, uint32_t address, uint32_ static const uint16_t erase_check_code[] = { - /* loop: */ + /* loop: */ 0xF810, 0x3B01, /* ldrb r3, [r0], #1 */ 0xEA02, 0x0203, /* and r2, r2, r3 */ - 0x3901, /* subs r1, r1, #1 */ - 0xD1F9, /* bne loop */ - /* end: */ - 0xE7FE, /* b end */ + 0x3901, /* subs r1, r1, #1 */ + 0xD1F9, /* bne loop */ + /* end: */ + 0xE7FE, /* b end */ }; /* make sure we have a working area */ @@ -745,12 +779,11 @@ static int handle_dap_baseaddr_command(struct command_context_s *cmd_ctx, return retval; } - /* * Return the debug ap id in hexadecimal; * no extra output to simplify script processing */ -extern int handle_dap_apid_command(struct command_context_s *cmd_ctx, +static int handle_dap_apid_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc) { target_t *target = get_current_target(cmd_ctx); @@ -796,6 +829,7 @@ static int handle_dap_info_command(struct command_context_s *cmd_ctx, return dap_info_command(cmd_ctx, swjdp, apsel); } +/** Registers commands used to access DAP resources. */ int armv7m_register_commands(struct command_context_s *cmd_ctx) { command_t *arm_adi_v5_dap_cmd; diff --git a/src/target/armv7m.h b/src/target/armv7m.h index 2ee92f4..d9c62a8 100644 --- a/src/target/armv7m.h +++ b/src/target/armv7m.h @@ -41,7 +41,7 @@ enum armv7m_mode ARMV7M_MODE_ANY = -1 }; -extern char* armv7m_mode_strings[]; +extern char *armv7m_mode_strings[]; enum armv7m_regtype { ----------------------------------------------------------------------- Summary of changes: src/target/armv7m.c | 90 +++++++++---- src/target/armv7m.h | 2 +- src/target/cortex_m3.c | 328 ++++++++++++++++++++++++++++++++++++----------- src/target/cortex_m3.h | 8 +- 4 files changed, 316 insertions(+), 112 deletions(-) hooks/post-receive -- Main OpenOCD repository |
From: Øyvind H. <go...@us...> - 2009-11-05 09:54:45
|
This is an automated email from the git hooks/post-receive script. It was generated because a ref change was pushed to the repository containing the project "Main OpenOCD repository". The branch, master has been updated via d269122f91efaf2f745424c215fabb758b7e7ea0 (commit) via 972924b2ad4bb7da34e331d4854b5f3d3e9e7260 (commit) from af66678c9a76f3bdab23beb3ffa7d7d53423bdfa (commit) Those revisions listed above that are new to this repository have not appeared on any other notification email; so we list those revisions in full, below. - Log ----------------------------------------------------------------- commit d269122f91efaf2f745424c215fabb758b7e7ea0 Author: Ãyvind Harboe <oyv...@zy...> Date: Tue Oct 27 14:02:16 2009 +0100 target: add target->type->has_mmu fn. improve default target->read/write_phys_memory, produce more sensible error messages if the mmu interface functions have not been implemented yet vs. will not be implemented(e.g. cortex m3). Signed-off-by: Ãyvind Harboe <oyv...@zy...> diff --git a/src/target/cortex_m3.c b/src/target/cortex_m3.c index ff97792..1afa29f 100644 --- a/src/target/cortex_m3.c +++ b/src/target/cortex_m3.c @@ -52,6 +52,12 @@ extern uint8_t armv7m_gdb_dummy_cpsr_value[]; extern reg_t armv7m_gdb_dummy_cpsr_reg; #endif +static int cortex_m3_has_mmu(struct target_s *target, bool *has_mmu) +{ + *has_mmu = false; + return ERROR_OK; +} + static int cortexm3_dap_read_coreregister_u32(swjdp_common_t *swjdp, uint32_t *value, int regnum) { @@ -1837,6 +1843,7 @@ target_type_t cortexm3_target = .register_commands = cortex_m3_register_commands, .target_create = cortex_m3_target_create, .init_target = cortex_m3_init_target, + .has_mmu = cortex_m3_has_mmu, .examine = cortex_m3_examine, }; diff --git a/src/target/target.c b/src/target/target.c index 5cf7011..2a66fcf 100644 --- a/src/target/target.c +++ b/src/target/target.c @@ -496,7 +496,13 @@ static int default_virt2phys(struct target_s *target, uint32_t virtual, uint32_t static int default_mmu(struct target_s *target, int *enabled) { - *enabled = 0; + LOG_ERROR("Not implemented."); + return ERROR_FAIL; +} + +static int default_has_mmu(struct target_s *target, bool *has_mmu) +{ + *has_mmu = true; return ERROR_OK; } @@ -743,14 +749,32 @@ int target_mcr(struct target_s *target, int cpnum, uint32_t op1, uint32_t op2, u static int default_read_phys_memory(struct target_s *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer) { - LOG_ERROR("Not implemented"); - return ERROR_FAIL; + int retval; + bool mmu; + retval = target->type->has_mmu(target, &mmu); + if (retval != ERROR_OK) + return retval; + if (mmu) + { + LOG_ERROR("Not implemented"); + return ERROR_FAIL; + } + return target_read_memory(target, address, size, count, buffer); } static int default_write_phys_memory(struct target_s *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer) { - LOG_ERROR("Not implemented"); - return ERROR_FAIL; + int retval; + bool mmu; + retval = target->type->has_mmu(target, &mmu); + if (retval != ERROR_OK) + return retval; + if (mmu) + { + LOG_ERROR("Not implemented"); + return ERROR_FAIL; + } + return target_write_memory(target, address, size, count, buffer); } @@ -816,6 +840,10 @@ int target_init(struct command_context_s *cmd_ctx) { target->type->mmu = default_mmu; } + if (target->type->has_mmu == NULL) + { + target->type->has_mmu = default_has_mmu; + } target = target->next; } diff --git a/src/target/target_type.h b/src/target/target_type.h index dd469db..23ed40e 100644 --- a/src/target/target_type.h +++ b/src/target/target_type.h @@ -199,8 +199,16 @@ struct target_type_s */ int (*write_phys_memory)(struct target_s *target, uint32_t phys_address, uint32_t size, uint32_t count, uint8_t *buffer); + /* returns true if the mmu is enabled. Default implementation returns error. */ int (*mmu)(struct target_s *target, int *enabled); + /* returns true if the target has an mmu. This can only be + determined after the target has been examined. + + Default implementation returns success and has_mmu==true. + */ + int (*has_mmu)(struct target_s *target, bool *has_mmu); + /* Read coprocessor - arm specific. Default implementation returns error. */ int (*mrc)(struct target_s *target, int cpnum, uint32_t op1, uint32_t op2, uint32_t CRn, uint32_t CRm, uint32_t *value); commit 972924b2ad4bb7da34e331d4854b5f3d3e9e7260 Author: Ãyvind Harboe <oyv...@zy...> Date: Mon Oct 26 21:47:41 2009 +0100 Make default implementation of mdw/mmw phys return error 'not implemented' diff --git a/src/target/target.c b/src/target/target.c index 9289d37..5cf7011 100644 --- a/src/target/target.c +++ b/src/target/target.c @@ -741,6 +741,18 @@ int target_mcr(struct target_s *target, int cpnum, uint32_t op1, uint32_t op2, u return target->type->mcr(target, cpnum, op1, op2, CRn, CRm, value); } +static int default_read_phys_memory(struct target_s *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer) +{ + LOG_ERROR("Not implemented"); + return ERROR_FAIL; +} + +static int default_write_phys_memory(struct target_s *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer) +{ + LOG_ERROR("Not implemented"); + return ERROR_FAIL; +} + int target_init(struct command_context_s *cmd_ctx) { @@ -769,12 +781,12 @@ int target_init(struct command_context_s *cmd_ctx) if (target->type->read_phys_memory == NULL) { - target->type->read_phys_memory = target->type->read_memory; + target->type->read_phys_memory = default_read_phys_memory; } if (target->type->write_phys_memory == NULL) { - target->type->write_phys_memory = target->type->write_memory; + target->type->write_phys_memory = default_write_phys_memory; } if (target->type->mcr == NULL) ----------------------------------------------------------------------- Summary of changes: src/target/cortex_m3.c | 7 +++++++ src/target/target.c | 46 +++++++++++++++++++++++++++++++++++++++++++--- src/target/target_type.h | 8 ++++++++ 3 files changed, 58 insertions(+), 3 deletions(-) hooks/post-receive -- Main OpenOCD repository |
From: Øyvind H. <go...@us...> - 2009-11-05 09:10:01
|
This is an automated email from the git hooks/post-receive script. It was generated because a ref change was pushed to the repository containing the project "Main OpenOCD repository". The branch, master has been updated via af66678c9a76f3bdab23beb3ffa7d7d53423bdfa (commit) from acff2521fb8e47dce4a2e89e2de77e71bf314047 (commit) Those revisions listed above that are new to this repository have not appeared on any other notification email; so we list those revisions in full, below. - Log ----------------------------------------------------------------- commit af66678c9a76f3bdab23beb3ffa7d7d53423bdfa Author: Ãyvind Harboe <oyv...@zy...> Date: Sat Oct 31 13:57:18 2009 +0100 target: remove unused interface fn that clutters code The quit entry point was not being invoked. Just a source of confusion at this point. XScale ran 100x reset upon quit, but that code made no sense, wasn't commented and never invoke. Signed-off-by: Ãyvind Harboe <oyv...@zy...> diff --git a/src/target/arm11.c b/src/target/arm11.c index 289d64c..1e82b93 100644 --- a/src/target/arm11.c +++ b/src/target/arm11.c @@ -97,7 +97,6 @@ target_type_t arm11_target = ARM11_HANDLER(target_create), ARM11_HANDLER(init_target), ARM11_HANDLER(examine), - ARM11_HANDLER(quit), }; int arm11_regs_arch_type = -1; @@ -1904,12 +1903,6 @@ int arm11_examine(struct target_s *target) return ERROR_OK; } -int arm11_quit(void) -{ - FNC_INFO_NOTIMPLEMENTED; - - return ERROR_OK; -} /** Load a register that is marked !valid in the register cache */ int arm11_get_reg(reg_t *reg) diff --git a/src/target/arm11.h b/src/target/arm11.h index 9afff23..67320de 100644 --- a/src/target/arm11.h +++ b/src/target/arm11.h @@ -230,7 +230,6 @@ int arm11_run_algorithm(struct target_s *target, int num_mem_params, mem_param_t int arm11_register_commands(struct command_context_s *cmd_ctx); int arm11_target_create(struct target_s *target, Jim_Interp *interp); int arm11_init_target(struct command_context_s *cmd_ctx, struct target_s *target); -int arm11_quit(void); /* helpers */ int arm11_build_reg_cache(target_t *target); diff --git a/src/target/arm720t.c b/src/target/arm720t.c index 6ed66cd..c18291a 100644 --- a/src/target/arm720t.c +++ b/src/target/arm720t.c @@ -41,7 +41,6 @@ int arm720t_handle_cp15_command(struct command_context_s *cmd_ctx, char *cmd, ch /* forward declarations */ int arm720t_target_create(struct target_s *target,Jim_Interp *interp); int arm720t_init_target(struct command_context_s *cmd_ctx, struct target_s *target); -int arm720t_quit(void); int arm720t_arch_state(struct target_s *target); int arm720t_read_memory(struct target_s *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer); int arm720t_write_memory(struct target_s *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer); @@ -88,7 +87,6 @@ target_type_t arm720t_target = .target_create = arm720t_target_create, .init_target = arm720t_init_target, .examine = arm7tdmi_examine, - .quit = arm720t_quit, .mrc = arm720t_mrc, .mcr = arm720t_mcr, @@ -469,10 +467,6 @@ int arm720t_init_target(struct command_context_s *cmd_ctx, struct target_s *targ return ERROR_OK; } -int arm720t_quit(void) -{ - return ERROR_OK; -} int arm720t_init_arch_info(target_t *target, arm720t_common_t *arm720t, jtag_tap_t *tap) { diff --git a/src/target/arm7tdmi.c b/src/target/arm7tdmi.c index 253bdf0..ec7b4f9 100644 --- a/src/target/arm7tdmi.c +++ b/src/target/arm7tdmi.c @@ -38,7 +38,6 @@ /* forward declarations */ int arm7tdmi_target_create(struct target_s *target,Jim_Interp *interp); -int arm7tdmi_quit(void); /* target function declarations */ int arm7tdmi_poll(struct target_s *target); @@ -80,7 +79,6 @@ target_type_t arm7tdmi_target = .target_create = arm7tdmi_target_create, .init_target = arm7tdmi_init_target, .examine = arm7tdmi_examine, - .quit = arm7tdmi_quit }; int arm7tdmi_examine_debug_reason(target_t *target) @@ -758,11 +756,6 @@ int arm7tdmi_init_target(struct command_context_s *cmd_ctx, struct target_s *tar return ERROR_OK; } -int arm7tdmi_quit(void) -{ - return ERROR_OK; -} - int arm7tdmi_init_arch_info(target_t *target, arm7tdmi_common_t *arm7tdmi, jtag_tap_t *tap) { armv4_5_common_t *armv4_5; diff --git a/src/target/arm920t.c b/src/target/arm920t.c index a332db0..835e4ee 100644 --- a/src/target/arm920t.c +++ b/src/target/arm920t.c @@ -43,7 +43,6 @@ int arm920t_handle_read_mmu_command(struct command_context_s *cmd_ctx, char *cmd /* forward declarations */ int arm920t_target_create(struct target_s *target, Jim_Interp *interp); int arm920t_init_target(struct command_context_s *cmd_ctx, struct target_s *target); -int arm920t_quit(void); #define ARM920T_CP15_PHYS_ADDR(x, y, z) ((x << 5) | (y << 1) << (z)) @@ -85,7 +84,6 @@ target_type_t arm920t_target = .target_create = arm920t_target_create, .init_target = arm920t_init_target, .examine = arm9tdmi_examine, - .quit = arm920t_quit }; int arm920t_read_cp15_physical(target_t *target, int reg_addr, uint32_t *value) @@ -659,11 +657,6 @@ int arm920t_init_target(struct command_context_s *cmd_ctx, struct target_s *targ return ERROR_OK; } -int arm920t_quit(void) -{ - return ERROR_OK; -} - int arm920t_init_arch_info(target_t *target, arm920t_common_t *arm920t, jtag_tap_t *tap) { arm9tdmi_common_t *arm9tdmi = &arm920t->arm9tdmi_common; diff --git a/src/target/arm926ejs.c b/src/target/arm926ejs.c index 608a7ed..ee24f5c 100644 --- a/src/target/arm926ejs.c +++ b/src/target/arm926ejs.c @@ -740,11 +740,6 @@ static int arm926ejs_init_target(struct command_context_s *cmd_ctx, return ERROR_OK; } -static int arm926ejs_quit(void) -{ - return ERROR_OK; -} - int arm926ejs_init_arch_info(target_t *target, arm926ejs_common_t *arm926ejs, jtag_tap_t *tap) { @@ -978,7 +973,6 @@ target_type_t arm926ejs_target = .target_create = arm926ejs_target_create, .init_target = arm926ejs_init_target, .examine = arm9tdmi_examine, - .quit = arm926ejs_quit, .virt2phys = arm926ejs_virt2phys, .mmu = arm926ejs_mmu, diff --git a/src/target/arm966e.c b/src/target/arm966e.c index badcd4f..c06562c 100644 --- a/src/target/arm966e.c +++ b/src/target/arm966e.c @@ -35,7 +35,6 @@ /* forward declarations */ int arm966e_target_create(struct target_s *target, Jim_Interp *interp); int arm966e_init_target(struct command_context_s *cmd_ctx, struct target_s *target); -int arm966e_quit(void); target_type_t arm966e_target = { @@ -73,7 +72,6 @@ target_type_t arm966e_target = .target_create = arm966e_target_create, .init_target = arm966e_init_target, .examine = arm9tdmi_examine, - .quit = arm966e_quit, }; int arm966e_init_target(struct command_context_s *cmd_ctx, struct target_s *target) @@ -83,11 +81,6 @@ int arm966e_init_target(struct command_context_s *cmd_ctx, struct target_s *targ return ERROR_OK; } -int arm966e_quit(void) -{ - return ERROR_OK; -} - int arm966e_init_arch_info(target_t *target, arm966e_common_t *arm966e, jtag_tap_t *tap) { arm9tdmi_common_t *arm9tdmi = &arm966e->arm9tdmi_common; diff --git a/src/target/arm9tdmi.c b/src/target/arm9tdmi.c index ac233f6..72a24b4 100644 --- a/src/target/arm9tdmi.c +++ b/src/target/arm9tdmi.c @@ -47,7 +47,6 @@ /* forward declarations */ static int arm9tdmi_target_create(struct target_s *target, Jim_Interp *interp); -static int arm9tdmi_quit(void); target_type_t arm9tdmi_target = { @@ -85,7 +84,6 @@ target_type_t arm9tdmi_target = .target_create = arm9tdmi_target_create, .init_target = arm9tdmi_init_target, .examine = arm9tdmi_examine, - .quit = arm9tdmi_quit }; static arm9tdmi_vector_t arm9tdmi_vectors[] = @@ -859,11 +857,6 @@ int arm9tdmi_init_target(struct command_context_s *cmd_ctx, struct target_s *tar return ERROR_OK; } -static int arm9tdmi_quit(void) -{ - return ERROR_OK; -} - int arm9tdmi_init_arch_info(target_t *target, arm9tdmi_common_t *arm9tdmi, jtag_tap_t *tap) { armv4_5_common_t *armv4_5; diff --git a/src/target/avrt.c b/src/target/avrt.c index 2b73c32..d3e6282 100644 --- a/src/target/avrt.c +++ b/src/target/avrt.c @@ -34,7 +34,6 @@ int avr_register_commands(struct command_context_s *cmd_ctx); /* forward declarations */ int avr_target_create(struct target_s *target, Jim_Interp *interp); int avr_init_target(struct command_context_s *cmd_ctx, struct target_s *target); -int avr_quit(void); int avr_arch_state(struct target_s *target); int avr_poll(target_t *target); @@ -95,7 +94,6 @@ target_type_t avr_target = .register_commands = avr_register_commands, .target_create = avr_target_create, .init_target = avr_init_target, - .quit = avr_quit, /* .virt2phys = avr_virt2phys, .mmu = avr_mmu @@ -124,12 +122,6 @@ int avr_init_target(struct command_context_s *cmd_ctx, struct target_s *target) return ERROR_OK; } -int avr_quit(void) -{ - LOG_DEBUG("%s", __FUNCTION__); - return ERROR_OK; -} - int avr_arch_state(struct target_s *target) { LOG_DEBUG("%s", __FUNCTION__); diff --git a/src/target/cortex_a8.c b/src/target/cortex_a8.c index e716999..11068ba 100644 --- a/src/target/cortex_a8.c +++ b/src/target/cortex_a8.c @@ -106,7 +106,6 @@ target_type_t cortexa8_target = .target_create = cortex_a8_target_create, .init_target = cortex_a8_init_target, .examine = cortex_a8_examine, - .quit = NULL }; /* diff --git a/src/target/cortex_m3.c b/src/target/cortex_m3.c index e854f6b..ff97792 100644 --- a/src/target/cortex_m3.c +++ b/src/target/cortex_m3.c @@ -1498,11 +1498,6 @@ static int cortex_m3_examine(struct target_s *target) return ERROR_OK; } -static int cortex_m3_quit(void) -{ - return ERROR_OK; -} - static int cortex_m3_dcc_read(swjdp_common_t *swjdp, uint8_t *value, uint8_t *ctrl) { uint16_t dcrdr; @@ -1843,6 +1838,5 @@ target_type_t cortexm3_target = .target_create = cortex_m3_target_create, .init_target = cortex_m3_init_target, .examine = cortex_m3_examine, - .quit = cortex_m3_quit }; diff --git a/src/target/fa526.c b/src/target/fa526.c index 9cdbf3d..4f8c3b2 100644 --- a/src/target/fa526.c +++ b/src/target/fa526.c @@ -36,7 +36,6 @@ int fa526_target_create(struct target_s *target, Jim_Interp *interp); int fa526_init_target(struct command_context_s *cmd_ctx, struct target_s *target); -int fa526_quit(void); target_type_t fa526_target = { @@ -74,7 +73,6 @@ target_type_t fa526_target = .target_create = fa526_target_create, .init_target = fa526_init_target, .examine = arm9tdmi_examine, - .quit = fa526_quit }; void fa526_change_to_arm(target_t *target, uint32_t *r0, uint32_t *pc) @@ -422,8 +420,3 @@ int fa526_init_target(struct command_context_s *cmd_ctx, struct target_s *target arm9tdmi_init_target(cmd_ctx, target); return ERROR_OK; } - -int fa526_quit(void) -{ - return ERROR_OK; -} diff --git a/src/target/feroceon.c b/src/target/feroceon.c index f084201..e1dc068 100644 --- a/src/target/feroceon.c +++ b/src/target/feroceon.c @@ -583,11 +583,6 @@ int feroceon_init_target(struct command_context_s *cmd_ctx, struct target_s *tar return ERROR_OK; } -int feroceon_quit(void) -{ - return ERROR_OK; -} - void feroceon_common_setup(struct target_s *target) { armv4_5_common_t *armv4_5 = target->arch_info; @@ -715,7 +710,6 @@ target_type_t feroceon_target = .target_create = feroceon_target_create, .init_target = feroceon_init_target, .examine = feroceon_examine, - .quit = feroceon_quit }; target_type_t dragonite_target = @@ -754,6 +748,5 @@ target_type_t dragonite_target = .target_create = dragonite_target_create, .init_target = feroceon_init_target, .examine = feroceon_examine, - .quit = feroceon_quit }; diff --git a/src/target/mips_m4k.c b/src/target/mips_m4k.c index 6458c26..07731a0 100644 --- a/src/target/mips_m4k.c +++ b/src/target/mips_m4k.c @@ -41,7 +41,6 @@ int mips_m4k_read_memory(struct target_s *target, uint32_t address, uint32_t siz int mips_m4k_write_memory(struct target_s *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer); int mips_m4k_register_commands(struct command_context_s *cmd_ctx); int mips_m4k_init_target(struct command_context_s *cmd_ctx, struct target_s *target); -int mips_m4k_quit(void); int mips_m4k_target_create(struct target_s *target, Jim_Interp *interp); int mips_m4k_examine(struct target_s *target); @@ -85,7 +84,6 @@ target_type_t mips_m4k_target = .target_create = mips_m4k_target_create, .init_target = mips_m4k_init_target, .examine = mips_m4k_examine, - .quit = mips_m4k_quit }; int mips_m4k_examine_debug_reason(target_t *target) @@ -919,11 +917,6 @@ int mips_m4k_init_target(struct command_context_s *cmd_ctx, struct target_s *tar return ERROR_OK; } -int mips_m4k_quit(void) -{ - return ERROR_OK; -} - int mips_m4k_init_arch_info(target_t *target, mips_m4k_common_t *mips_m4k, jtag_tap_t *tap) { mips32_common_t *mips32 = &mips_m4k->mips32_common; diff --git a/src/target/target_type.h b/src/target/target_type.h index 83baa25..dd469db 100644 --- a/src/target/target_type.h +++ b/src/target/target_type.h @@ -178,7 +178,6 @@ struct target_type_s * before the JTAG chain has been examined/verified * */ int (*init_target)(struct command_context_s *cmd_ctx, struct target_s *target); - int (*quit)(void); /* translate from virtual to physical address. Default implementation is successful * no-op(i.e. virtual==physical). diff --git a/src/target/xscale.c b/src/target/xscale.c index ee9d88d..cc4176b 100644 --- a/src/target/xscale.c +++ b/src/target/xscale.c @@ -2919,12 +2919,6 @@ static int xscale_init_target(struct command_context_s *cmd_ctx, return ERROR_OK; } -static int xscale_quit(void) -{ - jtag_add_runtest(100, TAP_RESET); - return ERROR_OK; -} - static int xscale_init_arch_info(target_t *target, xscale_common_t *xscale, jtag_tap_t *tap, const char *variant) { @@ -3734,7 +3728,6 @@ target_type_t xscale_target = .register_commands = xscale_register_commands, .target_create = xscale_target_create, .init_target = xscale_init_target, - .quit = xscale_quit, .virt2phys = xscale_virt2phys, .mmu = xscale_mmu ----------------------------------------------------------------------- Summary of changes: src/target/arm11.c | 7 ------- src/target/arm11.h | 1 - src/target/arm720t.c | 6 ------ src/target/arm7tdmi.c | 7 ------- src/target/arm920t.c | 7 ------- src/target/arm926ejs.c | 6 ------ src/target/arm966e.c | 7 ------- src/target/arm9tdmi.c | 7 ------- src/target/avrt.c | 8 -------- src/target/cortex_a8.c | 1 - src/target/cortex_m3.c | 6 ------ src/target/fa526.c | 7 ------- src/target/feroceon.c | 7 ------- src/target/mips_m4k.c | 7 ------- src/target/target_type.h | 1 - src/target/xscale.c | 7 ------- 16 files changed, 0 insertions(+), 92 deletions(-) hooks/post-receive -- Main OpenOCD repository |
From: Øyvind H. <go...@us...> - 2009-11-05 09:06:32
|
This is an automated email from the git hooks/post-receive script. It was generated because a ref change was pushed to the repository containing the project "Main OpenOCD repository". The branch, master has been updated via acff2521fb8e47dce4a2e89e2de77e71bf314047 (commit) from a5e396b9641c425225e3820a160ee66887416d71 (commit) Those revisions listed above that are new to this repository have not appeared on any other notification email; so we list those revisions in full, below. - Log ----------------------------------------------------------------- commit acff2521fb8e47dce4a2e89e2de77e71bf314047 Author: Ãyvind Harboe <oyv...@zy...> Date: Fri Oct 30 18:29:09 2009 +0100 debug interface: get rid of unused pre_debug fn Removing unused code makes it much less mysterius. Signed-off-by: Ãyvind Harboe <oyv...@zy...> diff --git a/src/target/arm7_9_common.c b/src/target/arm7_9_common.c index 3275584..45394b7 100644 --- a/src/target/arm7_9_common.c +++ b/src/target/arm7_9_common.c @@ -1391,9 +1391,6 @@ int arm7_9_debug_entry(target_t *target) LOG_DEBUG("-"); #endif - if (arm7_9->pre_debug_entry) - arm7_9->pre_debug_entry(target); - /* program EmbeddedICE Debug Control Register to assert DBGACK and INTDIS * ensure that DBGRQ is cleared */ diff --git a/src/target/arm7_9_common.h b/src/target/arm7_9_common.h index b3c3c58..80f8fc7 100644 --- a/src/target/arm7_9_common.h +++ b/src/target/arm7_9_common.h @@ -102,7 +102,6 @@ typedef struct arm7_9_common_s void (*set_special_dbgrq)(target_t *target); /**< Function for setting DBGRQ if the normal way won't work */ - void (*pre_debug_entry)(target_t *target); /**< Callback function called before entering debug mode */ void (*post_debug_entry)(target_t *target); /**< Callback function called after entering debug mode */ void (*pre_restore_context)(target_t *target); /**< Callback function called before restoring the processor context */ diff --git a/src/target/arm7tdmi.c b/src/target/arm7tdmi.c index 0e978c2..253bdf0 100644 --- a/src/target/arm7tdmi.c +++ b/src/target/arm7tdmi.c @@ -801,7 +801,6 @@ int arm7tdmi_init_arch_info(target_t *target, arm7tdmi_common_t *arm7tdmi, jtag_ arm7_9->enable_single_step = arm7_9_enable_eice_step; arm7_9->disable_single_step = arm7_9_disable_eice_step; - arm7_9->pre_debug_entry = NULL; arm7_9->post_debug_entry = NULL; arm7_9->pre_restore_context = NULL; diff --git a/src/target/arm9tdmi.c b/src/target/arm9tdmi.c index 9c90f00..ac233f6 100644 --- a/src/target/arm9tdmi.c +++ b/src/target/arm9tdmi.c @@ -902,7 +902,6 @@ int arm9tdmi_init_arch_info(target_t *target, arm9tdmi_common_t *arm9tdmi, jtag_ arm7_9->enable_single_step = arm9tdmi_enable_single_step; arm7_9->disable_single_step = arm9tdmi_disable_single_step; - arm7_9->pre_debug_entry = NULL; arm7_9->post_debug_entry = NULL; arm7_9->pre_restore_context = NULL; diff --git a/src/target/armv7a.h b/src/target/armv7a.h index 5814c13..c5e3257 100644 --- a/src/target/armv7a.h +++ b/src/target/armv7a.h @@ -120,7 +120,6 @@ typedef struct armv7a_common_s uint32_t CRn, uint32_t CRm, uint32_t value); int (*examine_debug_reason)(target_t *target); - void (*pre_debug_entry)(target_t *target); void (*post_debug_entry)(target_t *target); void (*pre_restore_context)(target_t *target); diff --git a/src/target/armv7m.h b/src/target/armv7m.h index f3a7422..2ee92f4 100644 --- a/src/target/armv7m.h +++ b/src/target/armv7m.h @@ -108,7 +108,6 @@ typedef struct armv7m_common_s int (*write_core_reg)(struct target_s *target, int num); int (*examine_debug_reason)(target_t *target); - void (*pre_debug_entry)(target_t *target); void (*post_debug_entry)(target_t *target); void (*pre_restore_context)(target_t *target); diff --git a/src/target/cortex_a8.c b/src/target/cortex_a8.c index 025a468..e716999 100644 --- a/src/target/cortex_a8.c +++ b/src/target/cortex_a8.c @@ -637,9 +637,6 @@ int cortex_a8_debug_entry(target_t *target) cortex_a8_common_t *cortex_a8 = armv7a->arch_info; swjdp_common_t *swjdp = &armv7a->swjdp_info; - if (armv7a->pre_debug_entry) - armv7a->pre_debug_entry(target); - LOG_DEBUG("dscr = 0x%08" PRIx32, cortex_a8->cpudbg_dscr); /* Enable the ITR execution once we are in debug mode */ @@ -1586,7 +1583,6 @@ LOG_DEBUG(" "); /* register arch-specific functions */ armv7a->examine_debug_reason = NULL; - armv7a->pre_debug_entry = NULL; armv7a->post_debug_entry = cortex_a8_post_debug_entry; armv7a->pre_restore_context = NULL; diff --git a/src/target/cortex_m3.c b/src/target/cortex_m3.c index 1c59f02..e854f6b 100644 --- a/src/target/cortex_m3.c +++ b/src/target/cortex_m3.c @@ -322,8 +322,6 @@ static int cortex_m3_debug_entry(target_t *target) swjdp_common_t *swjdp = &armv7m->swjdp_info; LOG_DEBUG(" "); - if (armv7m->pre_debug_entry) - armv7m->pre_debug_entry(target); cortex_m3_clear_halt(target); mem_ap_read_atomic_u32(swjdp, DCB_DHCSR, &cortex_m3->dcb_dhcsr); @@ -1610,7 +1608,6 @@ static int cortex_m3_init_arch_info(target_t *target, /* register arch-specific functions */ armv7m->examine_debug_reason = cortex_m3_examine_debug_reason; - armv7m->pre_debug_entry = NULL; armv7m->post_debug_entry = NULL; armv7m->pre_restore_context = NULL; diff --git a/src/target/fa526.c b/src/target/fa526.c index eee9e50..9cdbf3d 100644 --- a/src/target/fa526.c +++ b/src/target/fa526.c @@ -346,7 +346,6 @@ int fa526_init_arch_info_2(target_t *target, arm9tdmi_common_t *arm9tdmi, jtag_t arm7_9->enable_single_step = arm9tdmi_enable_single_step; arm7_9->disable_single_step = arm9tdmi_disable_single_step; - arm7_9->pre_debug_entry = NULL; arm7_9->post_debug_entry = NULL; arm7_9->pre_restore_context = NULL; ----------------------------------------------------------------------- Summary of changes: src/target/arm7_9_common.c | 3 --- src/target/arm7_9_common.h | 1 - src/target/arm7tdmi.c | 1 - src/target/arm9tdmi.c | 1 - src/target/armv7a.h | 1 - src/target/armv7m.h | 1 - src/target/cortex_a8.c | 4 ---- src/target/cortex_m3.c | 3 --- src/target/fa526.c | 1 - 9 files changed, 0 insertions(+), 16 deletions(-) hooks/post-receive -- Main OpenOCD repository |
From: Øyvind H. <go...@us...> - 2009-11-05 09:03:48
|
This is an automated email from the git hooks/post-receive script. It was generated because a ref change was pushed to the repository containing the project "Main OpenOCD repository". The branch, master has been updated via a5e396b9641c425225e3820a160ee66887416d71 (commit) from 2d9863e121ff0c02b33f1b8a3e74fae55d901fa6 (commit) Those revisions listed above that are new to this repository have not appeared on any other notification email; so we list those revisions in full, below. - Log ----------------------------------------------------------------- commit a5e396b9641c425225e3820a160ee66887416d71 Author: Ãyvind Harboe <oyv...@zy...> Date: Thu Nov 5 09:02:06 2009 +0100 warnings: remove Signed-off-by: Ãyvind Harboe <oyv...@zy...> diff --git a/src/ecosboard.c b/src/ecosboard.c index bad5fd5..b0f9525 100644 --- a/src/ecosboard.c +++ b/src/ecosboard.c @@ -474,7 +474,6 @@ static int zylinjtag_Jim_Command_reboot(Jim_Interp *interp, int argc, return JIM_OK; } - static void zylinjtag_startNetwork(void) { // Bring TCP/IP up immediately before we're ready to accept commands. @@ -591,6 +590,7 @@ static void print_exception_handler(cyg_addrword_t data, cyg_code_t exception, } +#ifdef CYGNUM_HAL_VECTOR_UNDEF_INSTRUCTION static void setHandler(cyg_code_t exception) { cyg_exception_handler_t *old_handler; @@ -599,6 +599,7 @@ static void setHandler(cyg_code_t exception) cyg_exception_set_handler(exception, print_exception_handler, 0, &old_handler, &old_data); } +#endif static cyg_thread zylinjtag_uart_thread_object; static cyg_handle_t zylinjtag_uart_thread_handle; @@ -748,7 +749,6 @@ static void zylinjtag_uart(cyg_addrword_t data) pos2 = 0; } - size_t x = actual2; size_t y = 0; if (actual2 > 0) { @@ -778,7 +778,6 @@ static void zylinjtag_uart(cyg_addrword_t data) actual += t; } - int x2 = actual; int y2 = 0; if (actual > 0) { ----------------------------------------------------------------------- Summary of changes: src/ecosboard.c | 5 ++--- 1 files changed, 2 insertions(+), 3 deletions(-) hooks/post-receive -- Main OpenOCD repository |
From: David B. <dbr...@us...> - 2009-11-05 06:42:30
|
This is an automated email from the git hooks/post-receive script. It was generated because a ref change was pushed to the repository containing the project "Main OpenOCD repository". The branch, master has been updated via 2d9863e121ff0c02b33f1b8a3e74fae55d901fa6 (commit) from 2970696e8923248ae84640ed67a3d1e4b50f8629 (commit) Those revisions listed above that are new to this repository have not appeared on any other notification email; so we list those revisions in full, below. - Log ----------------------------------------------------------------- commit 2d9863e121ff0c02b33f1b8a3e74fae55d901fa6 Author: David Brownell <dbr...@us...> Date: Wed Nov 4 21:41:08 2009 -0800 ft2232: cleanup Previous patch somehow made GCC lose some of its cookies; work around, zero-init that struct. Clean up code from the previous patch. Signed-off-by: David Brownell <dbr...@us...> diff --git a/src/jtag/ft2232.c b/src/jtag/ft2232.c index 7e8c84f..bd910b3 100644 --- a/src/jtag/ft2232.c +++ b/src/jtag/ft2232.c @@ -3256,7 +3256,7 @@ static int signalyzer_h_init(void) char *end_of_desc; - uint16_t read_buf[12]; + uint16_t read_buf[12] = { 0 }; uint8_t buf[3]; uint32_t bytes_written; @@ -3909,122 +3909,109 @@ static void signalyzer_h_blink(void) *******************************************************************/ static int ktlink_init(void) { - uint8_t buf[3]; - uint32_t bytes_written; - uint8_t swd_en = 0x20; //0x20 SWD disable, 0x00 SWD enable (ADBUS5) - - low_output = 0x08 | swd_en; // value; TMS=1,TCK=0,TDI=0,SWD=swd_en - low_direction = 0x3B; // out=1; TCK/TDI/TMS=out,TDO=in,SWD=out,RTCK=in,SRSTIN=in - - // initialize low port - buf[0] = 0x80; // command "set data bits low byte" - buf[1] = low_output; - buf[2] = low_direction; - LOG_DEBUG("%2.2x %2.2x %2.2x", buf[0], buf[1], buf[2]); - - if ( ( ( ft2232_write(buf, 3, &bytes_written) ) != ERROR_OK ) || (bytes_written != 3) ) - { - LOG_ERROR("couldn't initialize FT2232 with 'ktlink' layout"); - return ERROR_JTAG_INIT_FAILED; - } - - nTRST = 0x01; - nSRST = 0x02; - nTRSTnOE = 0x04; - nSRSTnOE = 0x08; - - high_output = 0x80; // turn LED on - high_direction = 0xFF; // all outputs - - enum reset_types jtag_reset_config = jtag_get_reset_config(); - - if (jtag_reset_config & RESET_TRST_OPEN_DRAIN) - { - high_output |= nTRSTnOE; - high_output &= ~nTRST; - } - else - { - high_output &= ~nTRSTnOE; - high_output |= nTRST; - } - - if (jtag_reset_config & RESET_SRST_PUSH_PULL) - { - high_output &= ~nSRSTnOE; - high_output |= nSRST; - } - else - { - high_output |= nSRSTnOE; - high_output &= ~nSRST; - } - - // initialize high port - buf[0] = 0x82; // command "set data bits high byte" - buf[1] = high_output; // value - buf[2] = high_direction; - LOG_DEBUG("%2.2x %2.2x %2.2x", buf[0], buf[1], buf[2]); - - if ( ( ( ft2232_write(buf, 3, &bytes_written) ) != ERROR_OK ) || (bytes_written != 3) ) - { - LOG_ERROR("couldn't initialize FT2232 with 'ktlink' layout"); - return ERROR_JTAG_INIT_FAILED; - } - - return ERROR_OK; + uint8_t buf[3]; + uint32_t bytes_written; + uint8_t swd_en = 0x20; //0x20 SWD disable, 0x00 SWD enable (ADBUS5) + + low_output = 0x08 | swd_en; // value; TMS=1,TCK=0,TDI=0,SWD=swd_en + low_direction = 0x3B; // out=1; TCK/TDI/TMS=out,TDO=in,SWD=out,RTCK=in,SRSTIN=in + + // initialize low port + buf[0] = 0x80; // command "set data bits low byte" + buf[1] = low_output; + buf[2] = low_direction; + LOG_DEBUG("%2.2x %2.2x %2.2x", buf[0], buf[1], buf[2]); + + if (((ft2232_write(buf, 3, &bytes_written)) != ERROR_OK) || (bytes_written != 3)) + { + LOG_ERROR("couldn't initialize FT2232 with 'ktlink' layout"); + return ERROR_JTAG_INIT_FAILED; + } + + nTRST = 0x01; + nSRST = 0x02; + nTRSTnOE = 0x04; + nSRSTnOE = 0x08; + + high_output = 0x80; // turn LED on + high_direction = 0xFF; // all outputs + + enum reset_types jtag_reset_config = jtag_get_reset_config(); + + if (jtag_reset_config & RESET_TRST_OPEN_DRAIN) { + high_output |= nTRSTnOE; + high_output &= ~nTRST; + } else { + high_output &= ~nTRSTnOE; + high_output |= nTRST; + } + + if (jtag_reset_config & RESET_SRST_PUSH_PULL) { + high_output &= ~nSRSTnOE; + high_output |= nSRST; + } else { + high_output |= nSRSTnOE; + high_output &= ~nSRST; + } + + // initialize high port + buf[0] = 0x82; // command "set data bits high byte" + buf[1] = high_output; // value + buf[2] = high_direction; + LOG_DEBUG("%2.2x %2.2x %2.2x", buf[0], buf[1], buf[2]); + + if (((ft2232_write(buf, 3, &bytes_written)) != ERROR_OK) || (bytes_written != 3)) + { + LOG_ERROR("couldn't initialize FT2232 with 'ktlink' layout"); + return ERROR_JTAG_INIT_FAILED; + } + + return ERROR_OK; } static void ktlink_reset(int trst, int srst) { - enum reset_types jtag_reset_config = jtag_get_reset_config(); - - if (trst == 1) - { - if (jtag_reset_config & RESET_TRST_OPEN_DRAIN) - high_output &= ~nTRSTnOE; - else - high_output &= ~nTRST; - } - else if (trst == 0) - { - if (jtag_reset_config & RESET_TRST_OPEN_DRAIN) - high_output |= nTRSTnOE; - else - high_output |= nTRST; - } - - if (srst == 1) - { - if (jtag_reset_config & RESET_SRST_PUSH_PULL) - high_output &= ~nSRST; - else - high_output &= ~nSRSTnOE; - } - else if (srst == 0) - { - if (jtag_reset_config & RESET_SRST_PUSH_PULL) - high_output |= nSRST; - else - high_output |= nSRSTnOE; - } - - buffer_write(0x82); // command "set data bits high byte" - buffer_write(high_output); - buffer_write(high_direction); - LOG_DEBUG("trst: %i, srst: %i, high_output: 0x%2.2x, high_direction: 0x%2.2x", trst, srst, high_output,high_direction); + enum reset_types jtag_reset_config = jtag_get_reset_config(); + + if (trst == 1) { + if (jtag_reset_config & RESET_TRST_OPEN_DRAIN) + high_output &= ~nTRSTnOE; + else + high_output &= ~nTRST; + } else if (trst == 0) { + if (jtag_reset_config & RESET_TRST_OPEN_DRAIN) + high_output |= nTRSTnOE; + else + high_output |= nTRST; + } + + if (srst == 1) { + if (jtag_reset_config & RESET_SRST_PUSH_PULL) + high_output &= ~nSRST; + else + high_output &= ~nSRSTnOE; + } else if (srst == 0) { + if (jtag_reset_config & RESET_SRST_PUSH_PULL) + high_output |= nSRST; + else + high_output |= nSRSTnOE; + } + + buffer_write(0x82); // command "set data bits high byte" + buffer_write(high_output); + buffer_write(high_direction); + LOG_DEBUG("trst: %i, srst: %i, high_output: 0x%2.2x, high_direction: 0x%2.2x", trst, srst, high_output,high_direction); } static void ktlink_blink(void) { - /*LED connected to ACBUS7 */ - if (high_output & 0x80) - high_output &= 0x7F; - else - high_output |= 0x80; + /* LED connected to ACBUS7 */ + if (high_output & 0x80) + high_output &= 0x7F; + else + high_output |= 0x80; - buffer_write(0x82); // command "set data bits high byte" - buffer_write(high_output); - buffer_write(high_direction); + buffer_write(0x82); // command "set data bits high byte" + buffer_write(high_output); + buffer_write(high_direction); } - ----------------------------------------------------------------------- Summary of changes: src/jtag/ft2232.c | 207 +++++++++++++++++++++++++---------------------------- 1 files changed, 97 insertions(+), 110 deletions(-) hooks/post-receive -- Main OpenOCD repository |
From: David B. <dbr...@us...> - 2009-11-05 06:22:46
|
This is an automated email from the git hooks/post-receive script. It was generated because a ref change was pushed to the repository containing the project "Main OpenOCD repository". The annotated tag, v0.3.0 has been created at a6b0ba52afeae4ff34d5e3a0cfd77cc737b9a60a (tag) tagging 1d5a3a6bcd02f6abef710b16a86701e41ecf0a9e (commit) replaces v0.3.0-rc0 tagged by David Brownell on Wed Nov 4 19:41:14 2009 -0800 - Log ----------------------------------------------------------------- The openocd-0.3.0 release. David Brownell (14): XSVF: bugfix handling state paths ARM926: fix arm926ejs_mmu() reading from bad pointer NEWS: more info arm9tdmi: more correct fix for vector_catch doxygen: avoid most internals User's Guide: more init info, autoprobing, etc Release scripts: comments, run on Ubuntu Tweak release docs NEWS refs repository history, not ChangeLog Other files: stop referring to ChangeLog too NEWS: mention switch to git! Doc: fix broken link Release docs: fix notes Version 0.3.0 Dimitar Dimitrov (2): Olimex FT2232H JTAG adapters FT2232: increase read retry counts Freddie Chopin (2): target.cfg: use $_TARGETNAME for flash remove "-ircapture 0x1 -irmask 0x1" from stm32.cfg Michael Roth (1): SVF: fix checking bit pattern against length Spencer Oliver (1): bin2char: for win32 set stdin/stdout to binary mode Zachary T Welch (1): Bump rc version and add -dev tag. Ãyvind Harboe (5): target: require working area for physical/virtual addresses to be specified arm920t: memory writes were broken when MMU was disabled target: 20 second timeout/megabyte for CRC check docs: add reference to git bisect docs on BUGS page configure: fix build problems with eCos ----------------------------------------------------------------------- hooks/post-receive -- Main OpenOCD repository |
From: David B. <dbr...@us...> - 2009-11-05 06:21:10
|
This is an automated email from the git hooks/post-receive script. It was generated because a ref change was pushed to the repository containing the project "Main OpenOCD repository". The branch, master has been updated via 2970696e8923248ae84640ed67a3d1e4b50f8629 (commit) via fd108f57375bce392a73a8f9a7b46c74ce0e604e (commit) via 067501b0c79e5350e0a6309523fa27bf882e0e7d (commit) via 1d5a3a6bcd02f6abef710b16a86701e41ecf0a9e (commit) from ecd9c0d8bf27f2a8d626ce535a2e7ee48a61bd28 (commit) Those revisions listed above that are new to this repository have not appeared on any other notification email; so we list those revisions in full, below. - Log ----------------------------------------------------------------- commit 2970696e8923248ae84640ed67a3d1e4b50f8629 Author: Krzysztof Kajstura <su...@kr...> Date: Wed Nov 4 21:20:44 2009 -0800 JTAG: support KT-LINK adapter Signed-off-by: David Brownell <dbr...@us...> diff --git a/NEWS b/NEWS index d0f5d70..813ecda 100644 --- a/NEWS +++ b/NEWS @@ -4,6 +4,8 @@ history for details about what changed, including bugfixes and other issues not mentioned here. JTAG Layer: + Support KT-Link JTAG adapter. + Boundary Scan: Target Layer: Flash Layer: diff --git a/src/jtag/ft2232.c b/src/jtag/ft2232.c index e570cbe..7e8c84f 100644 --- a/src/jtag/ft2232.c +++ b/src/jtag/ft2232.c @@ -149,6 +149,7 @@ static int sheevaplug_init(void); static int icebear_jtag_init(void); static int cortino_jtag_init(void); static int signalyzer_h_init(void); +static int ktlink_init(void); /* reset procedures for supported layouts */ static void usbjtag_reset(int trst, int srst); @@ -162,12 +163,14 @@ static void axm0432_jtag_reset(int trst, int srst); static void sheevaplug_reset(int trst, int srst); static void icebear_jtag_reset(int trst, int srst); static void signalyzer_h_reset(int trst, int srst); +static void ktlink_reset(int trst, int srst); /* blink procedures for layouts that support a blinking led */ static void olimex_jtag_blink(void); static void flyswatter_jtag_blink(void); static void turtle_jtag_blink(void); static void signalyzer_h_blink(void); +static void ktlink_blink(void); static const ft2232_layout_t ft2232_layouts[] = { @@ -188,6 +191,7 @@ static const ft2232_layout_t ft2232_layouts[] = { "icebear", icebear_jtag_init, icebear_jtag_reset, NULL }, { "cortino", cortino_jtag_init, comstick_reset, NULL }, { "signalyzer-h", signalyzer_h_init, signalyzer_h_reset, signalyzer_h_blink }, + { "ktlink", ktlink_init, ktlink_reset, ktlink_blink }, { NULL, NULL, NULL, NULL }, }; @@ -3897,3 +3901,130 @@ static void signalyzer_h_blink(void) { signalyzer_h_led_set(signalyzer_h_side, SIGNALYZER_LED_RED, 100, 0, 1); } + +/******************************************************************** + * Support for KT-LINK + * JTAG adapter from KRISTECH + * http://www.kristech.eu + *******************************************************************/ +static int ktlink_init(void) +{ + uint8_t buf[3]; + uint32_t bytes_written; + uint8_t swd_en = 0x20; //0x20 SWD disable, 0x00 SWD enable (ADBUS5) + + low_output = 0x08 | swd_en; // value; TMS=1,TCK=0,TDI=0,SWD=swd_en + low_direction = 0x3B; // out=1; TCK/TDI/TMS=out,TDO=in,SWD=out,RTCK=in,SRSTIN=in + + // initialize low port + buf[0] = 0x80; // command "set data bits low byte" + buf[1] = low_output; + buf[2] = low_direction; + LOG_DEBUG("%2.2x %2.2x %2.2x", buf[0], buf[1], buf[2]); + + if ( ( ( ft2232_write(buf, 3, &bytes_written) ) != ERROR_OK ) || (bytes_written != 3) ) + { + LOG_ERROR("couldn't initialize FT2232 with 'ktlink' layout"); + return ERROR_JTAG_INIT_FAILED; + } + + nTRST = 0x01; + nSRST = 0x02; + nTRSTnOE = 0x04; + nSRSTnOE = 0x08; + + high_output = 0x80; // turn LED on + high_direction = 0xFF; // all outputs + + enum reset_types jtag_reset_config = jtag_get_reset_config(); + + if (jtag_reset_config & RESET_TRST_OPEN_DRAIN) + { + high_output |= nTRSTnOE; + high_output &= ~nTRST; + } + else + { + high_output &= ~nTRSTnOE; + high_output |= nTRST; + } + + if (jtag_reset_config & RESET_SRST_PUSH_PULL) + { + high_output &= ~nSRSTnOE; + high_output |= nSRST; + } + else + { + high_output |= nSRSTnOE; + high_output &= ~nSRST; + } + + // initialize high port + buf[0] = 0x82; // command "set data bits high byte" + buf[1] = high_output; // value + buf[2] = high_direction; + LOG_DEBUG("%2.2x %2.2x %2.2x", buf[0], buf[1], buf[2]); + + if ( ( ( ft2232_write(buf, 3, &bytes_written) ) != ERROR_OK ) || (bytes_written != 3) ) + { + LOG_ERROR("couldn't initialize FT2232 with 'ktlink' layout"); + return ERROR_JTAG_INIT_FAILED; + } + + return ERROR_OK; +} + +static void ktlink_reset(int trst, int srst) +{ + enum reset_types jtag_reset_config = jtag_get_reset_config(); + + if (trst == 1) + { + if (jtag_reset_config & RESET_TRST_OPEN_DRAIN) + high_output &= ~nTRSTnOE; + else + high_output &= ~nTRST; + } + else if (trst == 0) + { + if (jtag_reset_config & RESET_TRST_OPEN_DRAIN) + high_output |= nTRSTnOE; + else + high_output |= nTRST; + } + + if (srst == 1) + { + if (jtag_reset_config & RESET_SRST_PUSH_PULL) + high_output &= ~nSRST; + else + high_output &= ~nSRSTnOE; + } + else if (srst == 0) + { + if (jtag_reset_config & RESET_SRST_PUSH_PULL) + high_output |= nSRST; + else + high_output |= nSRSTnOE; + } + + buffer_write(0x82); // command "set data bits high byte" + buffer_write(high_output); + buffer_write(high_direction); + LOG_DEBUG("trst: %i, srst: %i, high_output: 0x%2.2x, high_direction: 0x%2.2x", trst, srst, high_output,high_direction); +} + +static void ktlink_blink(void) +{ + /*LED connected to ACBUS7 */ + if (high_output & 0x80) + high_output &= 0x7F; + else + high_output |= 0x80; + + buffer_write(0x82); // command "set data bits high byte" + buffer_write(high_output); + buffer_write(high_direction); +} + diff --git a/tcl/interface/kt-link.cfg b/tcl/interface/kt-link.cfg new file mode 100644 index 0000000..93af8e4 --- /dev/null +++ b/tcl/interface/kt-link.cfg @@ -0,0 +1,10 @@ +# +# Kristech KT-Link +# +# http://www.kristech.eu +# + +interface ft2232 +ft2232_device_desc "KT-LINK" +ft2232_layout ktlink +ft2232_vid_pid 0x0403 0xBBE2 commit fd108f57375bce392a73a8f9a7b46c74ce0e604e Author: David Brownell <dbr...@us...> Date: Wed Nov 4 21:11:44 2009 -0800 PXA255: support Intel "Lubbock" platform Config for Intel's "Lubbock" PXA255 development board. Even more so than the PXA255 itself, this is obsolete. AFAIK this was the first generally available development platform for PXA255. Intel stopped providing these after other devel boards became available. One interesting thing about this board from the OpenOCD perspective is probably its flash configuration. Each bank is 32 bits wide, built from two 16-bit StrataFlash chips wired in parallel. This doubles throughput ... it reads/writes 32 bits in the time a single chip takes to write just 16 bits. This conf mostly works, given XScale bugfixes, but has some issues (notably: no access to the on-board SDRAM) flagged by FIXMEs. Signed-off-by: David Brownell <dbr...@us...> diff --git a/tcl/board/lubbock.cfg b/tcl/board/lubbock.cfg new file mode 100644 index 0000000..63cc2a4 --- /dev/null +++ b/tcl/board/lubbock.cfg @@ -0,0 +1,110 @@ +# Intel "Lubbock" Development Board with PXA255 (dbpxa255) +# Obsolete; this was Intel's original PXA255 development system +# Board also had CPU cards for SA1100, PXA210, PXA250, and more. + +source [find target/pxa255.cfg] + +jtag_nsrst_delay 250 +jtag_ntrst_delay 250 + +# NOTE: until after pinmux and such are set up, only CS0 is +# available ... not 2nd bank of CFI, or FPGA, SRAM, ENET, etc. + +# CS0, CS1 -- two banks of CFI flash, 32 MBytes each +# each bank is 32-bits wide, two 16-bit chips in parallel +flash bank cfi 0x00000000 0x02000000 2 4 $_TARGETNAME +flash bank cfi 0x04000000 0x02000000 2 4 $_TARGETNAME + +# CS2 low -- FPGA registers +# CS2 high -- 1 MByte SRAM at 0x0a00.0000 ... last 64K for scratch +$_TARGETNAME configure -work-area-phys 0x0a0f0000 + +$_TARGETNAME configure -event reset-assert-pre \ + "$_TARGETNAME configure -work-area-size 0" + +# Make the hex led display a number, assuming CS2 is set up +# and all digits have been enabled through the FPGA. +proc hexled {u32} { + mww 0x08000010 $u32 +} + +# CS3 -- Ethernet +# CS4 -- SA1111 +# CS5 -- PCMCIA + +# NOTE: system console normally uses the FF UART connector + +proc lubbock_init {target} { + + puts "Initialize PXA255 Lubbock board" + + # (1) pinmux + + # GPSR0..GPSR2 + mww 0x40e00018 0x00008000 + mww 0x40e0001c 0x00FC0382 + mww 0x40e00020 0x0001FFFF + # GPDR0..GPDR2 + mww 0x40e0000c 0x0060A800 + mww 0x40e00010 0x00FF0382 + mww 0x40e00014 0x0001C000 + # GAFR0_[LU]..GAFR2_[LU] + mww 0x40e00054 0x98400000 + mww 0x40e00058 0x00002950 + mww 0x40e0005c 0x000A9558 + mww 0x40e00060 0x0005AAAA + mww 0x40e00064 0xA0000000 + mww 0x40e00068 0x00000002 + + # write PSSR, enable GPIOs + mww 0x40f00000 0x00000020 + + # write LED ctrl register ... ones disable + # high byte, 8 hex leds; low byte, 8 discretes + mwh 0x08000040 0xf0ff + + hexled 0x0000 + + # (2) Address space setup + + # MSC0/MSC1/MSC2 + mww 0x48000008 0x23f223f2 + mww 0x4800000c 0x3ff1a441 + mww 0x48000010 0x7ff97ff1 + # pcmcia/cf + mww 0x48000014 0x00000000 + mww 0x48000028 0x00010504 + mww 0x4800002c 0x00010504 + mww 0x48000030 0x00010504 + mww 0x48000034 0x00010504 + mww 0x48000038 0x00004715 + mww 0x4800003c 0x00004715 + + hexled 0x1111 + + # (3) SDRAM setup + # REVISIT this looks dubious ... no refresh cycles + mww 0x48000004 0x03CA4018 + mww 0x48000004 0x004B4018 + mww 0x48000004 0x000B4018 + mww 0x48000004 0x000BC018 + mww 0x48000000 0x00001AC8 + mww 0x48000000 0x00001AC9 + + mww 0x48000040 0x00000000 + + # FIXME -- setup: + # CLOCKS (and faster JTAG) + # enable icache + + # FIXME SRAM isn't working + # $target configure -work-area-size 0x10000 + + hexled 0x2222 + + flash probe 0 + flash probe 1 + + hexled 0xcafe +} +$_TARGETNAME configure -event reset-init "lubbock_init $_TARGETNAME" commit 067501b0c79e5350e0a6309523fa27bf882e0e7d Author: David Brownell <dbr...@us...> Date: Wed Nov 4 19:44:36 2009 -0800 Version 0.4.0-dev Add "-dev" tag. Update minor version number. Archive old NEWS file, start a new one. diff --git a/NEWS b/NEWS index 80e8823..d0f5d70 100644 --- a/NEWS +++ b/NEWS @@ -1,74 +1,15 @@ -This file should include highlights of the changes made in the -OpenOCD openocd-0.3.0 source archive release. See the repository -history for details about what changed, including bugfixes and -other issues not mentioned here. +This file includes highlights of the changes made in the +OpenOCD 0.4.0 source archive release. See the repository +history for details about what changed, including bugfixes +and other issues not mentioned here. JTAG Layer: - FT2232H (high speed USB) support doesn't need separate configuration - New FT2232H JTAG adapters: Amontec, Olimex, Signalyzer - New reset_config options for SRST gating the JTAG clock (or not) - TAP declaration no longer requires ircapture and mask attributes - Scan chain setup should be more robust, with better diagnostics - New TAP events: - "post-reset" for TAP-invariant setup code (TAPs not usable yet) - "setup" for use once TAPs are addressable (e.g. with ICEpick) - Overridable Tcl "init_reset" and "jtag_init" procedures - Simple "autoprobe" mechanism to help simplify server setup - Boundary Scan: - SVF bugfixes ... parsing fixes, better STATE switch conformance - XSVF bugfixes ... be more correct, handle Xilinx tool output - Target Layer: - Warn on use of obsolete numeric target IDs - New commands for use with Cortex-M3 processors: - "cortex_m3 disassemble" ... Thumb2 disassembly (UAL format) - "cortex_m3 vector_catch" ... traps certain hardware faults - without tying up breakpoint resources - If you're willing to help debug it - VERY EARLY Cortex-A8 and ARMv7A support - Updated BeagleBoard.org hardware support - you may need to explicitly "reset" after connect-to-Beagle - New commands for use with XScale processors: "xscale vector_table" - ARM - bugfixes to single-stepping Thumb code - ETM: unavailable registers are not listed - ETB, ETM: report actual hardware status - ARM9 - name change: "arm9 vector_catch" not "arm9tdmi vector_catch" - ARM11 - single stepping support for i.MX31 - bugfix for missing "arm11" prefix on "arm11 memwrite ..." - GDB support - gdb_attach command is gone - Flash Layer: - The lpc2000 driver handles the new NXP LPC1700 (Cortex-M3) chips - New drivers: - lpc2900, for NXP LPC2900 chips (ARM968 based) - mx3_nand, for imx31 - New "last" flag for NOR "flash erase_sector" and "flash protect" - The "nand erase N" command now erases all of bank N - Speed up davinci_nand by about 3x - Board, Target, and Interface Configuration Scripts: - Amontec JTAGkey2 support - Cleanup and additions for the TI/Luminary Stellaris scripts - LPC1768 target (and flash) support - Keil MCB1700 eval board - Samsung s3c2450 - Mini2440 board - Numeric TAP and Target identifiers now trigger warnings - PXA255 partially enumerates - Documentation: - Capture more debugging and setup advice - Notes on target source code changes that may help debugging - Build and Release: - Repository moved from SVN at Berlios to GIT at SourceForge - Clean builds on (32-bit) Cygwin - Clean builds on 64-bit MinGW For more details about what has changed since the last release, see the git repository history. With gitweb, you can browse that diff --git a/NEWS b/NEWS-0.3.0 similarity index 100% copy from NEWS copy to NEWS-0.3.0 diff --git a/configure.in b/configure.in index 08212e8..d7f8d47 100644 --- a/configure.in +++ b/configure.in @@ -1,5 +1,5 @@ AC_PREREQ(2.60) -AC_INIT([openocd], [0.3.0], +AC_INIT([openocd], [0.4.0-dev], [OpenOCD Mailing List <ope...@li...>]) AC_CONFIG_SRCDIR([src/openocd.c]) commit 1d5a3a6bcd02f6abef710b16a86701e41ecf0a9e Author: David Brownell <dbr...@us...> Date: Wed Nov 4 19:39:59 2009 -0800 Version 0.3.0 Remove -dev tag, remove -rc tag. Signed-off-by: David Brownell <dbr...@us...> diff --git a/configure.in b/configure.in index 5772383..08212e8 100644 --- a/configure.in +++ b/configure.in @@ -1,5 +1,5 @@ AC_PREREQ(2.60) -AC_INIT([openocd], [0.3.0-rc1-dev], +AC_INIT([openocd], [0.3.0], [OpenOCD Mailing List <ope...@li...>]) AC_CONFIG_SRCDIR([src/openocd.c]) ----------------------------------------------------------------------- Summary of changes: NEWS | 67 ++--------------------- NEWS => NEWS-0.3.0 | 0 configure.in | 2 +- src/jtag/ft2232.c | 131 +++++++++++++++++++++++++++++++++++++++++++++ tcl/board/lubbock.cfg | 110 +++++++++++++++++++++++++++++++++++++ tcl/interface/kt-link.cfg | 10 ++++ 6 files changed, 257 insertions(+), 63 deletions(-) copy NEWS => NEWS-0.3.0 (100%) create mode 100644 tcl/board/lubbock.cfg create mode 100644 tcl/interface/kt-link.cfg hooks/post-receive -- Main OpenOCD repository |
From: David B. <dbr...@us...> - 2009-11-05 02:55:08
|
This is an automated email from the git hooks/post-receive script. It was generated because a ref change was pushed to the repository containing the project "Main OpenOCD repository". The branch, master has been updated via ecd9c0d8bf27f2a8d626ce535a2e7ee48a61bd28 (commit) via 6455ae4a59079020dc4e0b9ad0bf1a29f69d6cfa (commit) from efa7f8b4bb2cab3f71a5f943c625576505b369f0 (commit) Those revisions listed above that are new to this repository have not appeared on any other notification email; so we list those revisions in full, below. - Log ----------------------------------------------------------------- commit ecd9c0d8bf27f2a8d626ce535a2e7ee48a61bd28 Author: David Brownell <dbr...@us...> Date: Wed Nov 4 17:49:06 2009 -0800 Release docs: fix notes We currently do something unusual: version codes in config.in get updated after the release, which means that "git describe" won't match up to development version labels. Comment that trouble spot. We can fix this by switching away from the major/minor/micro type release numbering, as various other projects have done. The major numbers basically don't tend to change, and doing a good job with micro versions is so annoying that they rarely change either. diff --git a/doc/manual/release.txt b/doc/manual/release.txt index fa075ee..737cf13 100644 --- a/doc/manual/release.txt +++ b/doc/manual/release.txt @@ -156,7 +156,8 @@ can be useful when tracking down bugs. (Note that at this writing, the tags do not directly correspond to <code>git describe</code> output. The hash ID can be used with <code>git show</code>, but -the preceding segments can't.) +the relevant repository tag isn't <em>0.3.0-rc1-dev</em>; +this might change in the future.) @section releasewho Release Manager @@ -293,17 +294,21 @@ The following steps should be followed to produce each release: - If producing the next RC in a series, bump the rc number -# Commit that version change. -# Create a git tag for the final commit, with a tag name matching - the version string in <code>configure.in</code>: + the version string in <code>configure.in</code> (including <em>-rcN</em> + where relevant): @verbatim PACKAGE_VERSION="x.y.z" PACKAGE_TAG="v${PACKAGE_VERSION}" git tag -m "The openocd-${PACKAGE_VERSION} release." "${PACKAGE_TAG}" @endverbatim --# Prepare to resume normal development on mainline: - - Restore @c -dev version tag. - - To start a new major (or minor) release cycle on the @c master branch: - - Archive @c NEWS file as "<code>doc/news/NEWS-${PACKAGE_VERSION}</code>". - - Create a new @c NEWS file for the next release +-# Prepare to resume normal development on mainline (major or minor release) + - Update the version label + - Restore @c -dev version tag. + - For a new minor release cycle, increment the release's minor number + - For a new major release cycle, increment the release's major number + and zero its minor number + - Archive @c NEWS file as "<code>doc/news/NEWS-${PACKAGE_VERSION}</code>". + - Create a new @c NEWS file for the next release - Commit those changes, and push the commit and the release tag to mainline. -# Produce the package source archives: commit 6455ae4a59079020dc4e0b9ad0bf1a29f69d6cfa Author: David Brownell <dbr...@us...> Date: Wed Nov 4 17:12:53 2009 -0800 Doc: fix broken link Signed-off-by: David Brownell <dbr...@us...> diff --git a/doc/manual/release.txt b/doc/manual/release.txt index d05ac74..fa075ee 100644 --- a/doc/manual/release.txt +++ b/doc/manual/release.txt @@ -10,7 +10,7 @@ This page provides an introduction to the OpenOCD Release Processes: activities for each release cycle. - @ref releasehow - Outlines all of the steps for the processes used to produce and release the package source archives. -- @ref releasescript - Introduces the automated @c release.sh script. +- @ref releasescriptcmds - Introduces the automated @c release.sh script. @section releasewhy Why Produce Releases? ----------------------------------------------------------------------- Summary of changes: doc/manual/release.txt | 21 +++++++++++++-------- 1 files changed, 13 insertions(+), 8 deletions(-) hooks/post-receive -- Main OpenOCD repository |
From: David B. <dbr...@us...> - 2009-11-05 02:03:52
|
This is an automated email from the git hooks/post-receive script. It was generated because a ref change was pushed to the repository containing the project "Main OpenOCD repository". The branch, master has been updated via efa7f8b4bb2cab3f71a5f943c625576505b369f0 (commit) from 16f485aca2193b06d182ab30dd5afe36826e92b5 (commit) Those revisions listed above that are new to this repository have not appeared on any other notification email; so we list those revisions in full, below. - Log ----------------------------------------------------------------- commit efa7f8b4bb2cab3f71a5f943c625576505b369f0 Author: David Brownell <dbr...@us...> Date: Wed Nov 4 17:03:20 2009 -0800 NEWS: mention switch to git! diff --git a/NEWS b/NEWS index 9d8bfde..80e8823 100644 --- a/NEWS +++ b/NEWS @@ -66,6 +66,7 @@ Documentation: Notes on target source code changes that may help debugging Build and Release: + Repository moved from SVN at Berlios to GIT at SourceForge Clean builds on (32-bit) Cygwin Clean builds on 64-bit MinGW ----------------------------------------------------------------------- Summary of changes: NEWS | 1 + 1 files changed, 1 insertions(+), 0 deletions(-) hooks/post-receive -- Main OpenOCD repository |
From: David B. <dbr...@us...> - 2009-11-05 01:48:50
|
This is an automated email from the git hooks/post-receive script. It was generated because a ref change was pushed to the repository containing the project "Main OpenOCD repository". The branch, master has been updated via 16f485aca2193b06d182ab30dd5afe36826e92b5 (commit) from 0e37ea6499fd493a32ebdfd3a27c6a01426b3a19 (commit) Those revisions listed above that are new to this repository have not appeared on any other notification email; so we list those revisions in full, below. - Log ----------------------------------------------------------------- commit 16f485aca2193b06d182ab30dd5afe36826e92b5 Author: David Brownell <dbr...@us...> Date: Wed Nov 4 16:46:27 2009 -0800 Other files: stop referring to ChangeLog too The ChangeLog idiom is redundant given any decent SCM. Time to phase it out here. Signed-off-by: David Brownell <dbr...@us...> diff --git a/doc/manual/release.txt b/doc/manual/release.txt index 31bf44d..d05ac74 100644 --- a/doc/manual/release.txt +++ b/doc/manual/release.txt @@ -311,7 +311,6 @@ git tag -m "The openocd-${PACKAGE_VERSION} release." "${PACKAGE_TAG}" release's tag. This is used only for producing these packages. -# Checkout the appropriate tag: <code>git checkout "${PACKAGE_VERSION}"</code> - -# Produce a ChangeLog for the release (using @c git2cl). -# @c bootstrap, @c configure, and @c make the package. -# Run <code>make distcheck</code> to produce the distribution archives. -# Run <code>make maintainer-clean</code> verify the repository is empty. @@ -320,7 +319,6 @@ git tag -m "The openocd-${PACKAGE_VERSION} release." "${PACKAGE_TAG}" - Allow users to access the documentation for each of our releases. - Place static copies of the following files on the project website: - @c NEWS: to provide a blurb for each release - - @c ChangeLog: to show exactly what has been changed - User's Guide, Developer Manual: to allow easy on-line viewing -# Upload packages and post announcements of their availability: -# Release packages into files section of project sites: @@ -334,7 +332,7 @@ git tag -m "The openocd-${PACKAGE_VERSION} release." "${PACKAGE_TAG}" - .zip: Windows - Berlios: -# Create the new release for the new version. - -# Provide @c NEWS and ChangeLog files, as requested. + -# Provide @c NEWS file, as requested. -# Upload files via FTP to ftp://ftp.berlios.de/incoming/ -# Edit descriptions for each file. -# Click button to send E-mail Release Notice. diff --git a/tools/release.sh b/tools/release.sh index e7fbc6c..c464c49 100755 --- a/tools/release.sh +++ b/tools/release.sh @@ -37,7 +37,6 @@ Build Commands: build Compiles the project; runs configure, if needed. Packaging Commands: - changelog Generate a new ChangeLog using ${SCM}2cl. package Produce new distributable source archives. stage Move archives to staging area for upload. @@ -83,17 +82,8 @@ do_build() { maybe_build() { [ -f "src/openocd" ] || do_build; } do_build_clean() { [ -f Makefile ] && make maintainer-clean >/dev/null; } -do_changelog() { - echo "Creating ChangeLog..." - local CMD=tools/git2cl/git2cl - eval ${CMD} ${OPTS} > ChangeLog -} -do_changelog_clean() { - git checkout ChangeLog -} do_package() { - do_changelog maybe_build echo "Building distribution packages..." make ${MAKE_OPTS} distcheck 2>&1 | perl tools/logger.pl > "release-pkg.log" @@ -120,14 +110,12 @@ do_stage() { mv -v "${FILE}" archives/ done cp -a NEWS archives/ - cp -a ChangeLog archives/ } do_stage_clean() { rm -v -f -r archives; } do_clean() { do_build_clean do_package_clean - do_changelog_clean rm -v -f release-*.log } do_clean_all() { @@ -195,12 +183,13 @@ do_release_step_news() { git mv "NEWS" "NEWS-${RELEASE_VERSION}" cat >NEWS <<NEWS -This file should include items worth mentioning in the -OpenOCD ${NEXT_RELEASE_VERSION} source archive release. - -The following areas of OpenOCD functionality changed in this release: +This file includes highlights of the changes made in the +OpenOCD ${NEXT_RELEASE_VERSION} source archive release. See the +repository history for details about what changed, including +bugfixes and other issues not mentioned here. JTAG Layer: +Boundary Scan: Target Layer: Flash Layer: Board, Target, and Interface Configuration Scripts: @@ -208,8 +197,11 @@ Documentation: Build and Release: For more details about what has changed since the last release, -see the ChangeLog associated with this source archive. For older NEWS, -see the NEWS files associated with each release (i.e. NEWS-<version>). +see the git repository history. With gitweb, you can browse that +in various levels of detail. + +For older NEWS, see the NEWS files associated with each release +(i.e. NEWS-<version>). For more information about contributing test reports, bug fixes, or new features and device support, please read the new Developer Manual (or @@ -353,9 +345,9 @@ CMD=$1 [ "${CMD}" ] || usage shift -ACTION_CMDS="bootstrap|configure|build|changelog|package|stage|clean" +ACTION_CMDS="bootstrap|configure|build|package|stage|clean" MISC_CMDS="all|info|release|branch|reset|help|usage" -CLEAN_CMDS="build_clean|changelog_clean|package_clean|stage_clean|clean_all" +CLEAN_CMDS="build_clean|package_clean|stage_clean|clean_all" CMDS="|${ACTION_CMDS}|${CLEAN_CMDS}|${MISC_CMDS}|" is_command() { echo "${CMDS}" | grep "|$1|" >/dev/null; } ----------------------------------------------------------------------- Summary of changes: doc/manual/release.txt | 4 +--- tools/release.sh | 32 ++++++++++++-------------------- 2 files changed, 13 insertions(+), 23 deletions(-) hooks/post-receive -- Main OpenOCD repository |
From: David B. <dbr...@us...> - 2009-11-05 00:55:14
|
This is an automated email from the git hooks/post-receive script. It was generated because a ref change was pushed to the repository containing the project "Main OpenOCD repository". The branch, master has been updated via 0e37ea6499fd493a32ebdfd3a27c6a01426b3a19 (commit) from 1c51f342d7f6da760ddd4e46eae91b6d6c06f579 (commit) Those revisions listed above that are new to this repository have not appeared on any other notification email; so we list those revisions in full, below. - Log ----------------------------------------------------------------- commit 0e37ea6499fd493a32ebdfd3a27c6a01426b3a19 Author: David Brownell <dbr...@us...> Date: Wed Nov 4 15:54:33 2009 -0800 NEWS refs repository history, not ChangeLog Signed-off-by: David Brownell <dbr...@us...> diff --git a/NEWS b/NEWS index 2cf5d9f..9d8bfde 100644 --- a/NEWS +++ b/NEWS @@ -70,8 +70,11 @@ Build and Release: Clean builds on 64-bit MinGW For more details about what has changed since the last release, -see the ChangeLog associated with this source archive. For older NEWS, -see the NEWS files associated with each release (i.e. NEWS-<version>). +see the git repository history. With gitweb, you can browse that +in various levels of detail. + +For older NEWS, see the NEWS files associated with each release +(i.e. NEWS-<version>). For more information about contributing test reports, bug fixes, or new features and device support, please read the new Developer Manual (or ----------------------------------------------------------------------- Summary of changes: NEWS | 7 +++++-- 1 files changed, 5 insertions(+), 2 deletions(-) hooks/post-receive -- Main OpenOCD repository |