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[OpenOCD-commit] Main OpenOCD repository branch, master, updated. v0.12.0-1312-gaa9ff8dc5

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- Log -----------------------------------------------------------------
commit aa9ff8dc5ec60c46134f57a2f858149bb083036e
Author: Tomas Vanek <va...@fb...>
Date:   Mon Oct 13 18:35:37 2025 +0200

    target/esirisc_trace: drop macro BIT_MASK() conflicting with bits.h
    
    The esirisc_trace.c uses macro BIT_MASK(), same name as a macro
    from helper/bits.h
    Drop the macro definition and use GENMASK() instead.
    
    Change-Id: I0cc6a58e5aff3f48fa9a79a99bd28124f334c4e2
    Signed-off-by: Tomas Vanek <va...@fb...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/9168
    Tested-by: jenkins
    Reviewed-by: Evgeniy Naydanov <eu...@gm...>
    Reviewed-by: Antonio Borneo <bor...@gm...>

diff --git a/src/target/esirisc_trace.c b/src/target/esirisc_trace.c
index 2dc08e5d2..42bc37d30 100644
--- a/src/target/esirisc_trace.c
+++ b/src/target/esirisc_trace.c
@@ -10,6 +10,7 @@
 #endif
 
 #include <helper/binarybuffer.h>
+#include <helper/bits.h>
 #include <helper/command.h>
 #include <helper/fileio.h>
 #include <helper/log.h>
@@ -18,8 +19,6 @@
 
 #include "esirisc.h"
 
-#define BIT_MASK(x)			((1 << (x)) - 1)
-
 /* Control Fields */
 #define CONTROL_ST			(1<<0)					/* Start */
 #define CONTROL_SP			(1<<1)					/* Stop */
@@ -483,7 +482,7 @@ static int esirisc_trace_analyze_simple(struct command_invocation *cmd, uint8_t
 	struct target *target = get_current_target(cmd->ctx);
 	struct esirisc_common *esirisc = target_to_esirisc(target);
 	struct esirisc_trace *trace_info = &esirisc->trace_info;
-	const uint32_t end_of_trace = BIT_MASK(trace_info->pc_bits) << 1;
+	const uint32_t end_of_trace = GENMASK(trace_info->pc_bits, 1);
 	const uint32_t num_bits = size * 8;
 	int retval;
 

-----------------------------------------------------------------------

Summary of changes:
 src/target/esirisc_trace.c | 5 ++---
 1 file changed, 2 insertions(+), 3 deletions(-)


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- Log -----------------------------------------------------------------
commit ac6972ba16b471cb46a2d862fb24d54b98b4bb61
Author: Marc Schink <de...@za...>
Date:   Tue Nov 11 17:39:23 2025 +0100

    adapter/gpio: Use command_print() instead of LOG_ERROR()
    
    Use command_print() in order to provide an error message to the caller.
    While at it, fix the return values.
    
    Change-Id: I0f8d3466ab2729d8cca6cf4c1cff51d67982c373
    Signed-off-by: Marc Schink <de...@za...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/9267
    Tested-by: jenkins
    Reviewed-by: Antonio Borneo <bor...@gm...>

diff --git a/src/jtag/adapter.c b/src/jtag/adapter.c
index c30a26c87..3f94ffec7 100644
--- a/src/jtag/adapter.c
+++ b/src/jtag/adapter.c
@@ -957,8 +957,8 @@ COMMAND_HANDLER(adapter_gpio_config_handler)
 
 	int gpio_idx = get_gpio_index(CMD_ARGV[0]);
 	if (gpio_idx == -1) {
-		LOG_ERROR("adapter has no gpio named %s", CMD_ARGV[0]);
-		return ERROR_COMMAND_SYNTAX_ERROR;
+		command_print(CMD, "adapter has no gpio named %s", CMD_ARGV[0]);
+		return ERROR_COMMAND_ARGUMENT_INVALID;
 	}
 
 	if (CMD_ARGC == 1) {
@@ -1077,9 +1077,9 @@ COMMAND_HANDLER(adapter_gpio_config_handler)
 			}
 		}
 
-		LOG_ERROR("illegal option for adapter %s %s: %s",
+		command_print(CMD, "illegal option for adapter %s %s: %s",
 				CMD_NAME, gpio_map[gpio_idx].name, CMD_ARGV[i]);
-		return ERROR_COMMAND_SYNTAX_ERROR;
+		return ERROR_COMMAND_ARGUMENT_INVALID;
 	}
 
 	/* Force swdio_dir init state to be compatible with swdio init state */

-----------------------------------------------------------------------

Summary of changes:
 src/jtag/adapter.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)


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- Log -----------------------------------------------------------------
commit 171454fffad3573bdf0870769ae7d82bf07bb8dc
Author: Antonio Borneo <bor...@gm...>
Date:   Sat Nov 22 22:03:10 2025 +0100

    server: fix a new double free()
    
    By reorganizing the free() of the service and its subfields, the
    patch reported in 'fixes' exposes a new double free().
    Issue detected by 'scan-build'.
    
    Fix it.
    
    Fixes: 5ff384be086a ("semihosting: fix memory leak and double free")
    Change-Id: Ief4262e98c9ecdca39d4e2d77e7a0ea87cfa198c
    Signed-off-by: Antonio Borneo <bor...@gm...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/9266
    Tested-by: jenkins
    Reviewed-by: Tomas Vanek <va...@fb...>

diff --git a/src/server/server.c b/src/server/server.c
index 494fd9da3..81d79d41b 100644
--- a/src/server/server.c
+++ b/src/server/server.c
@@ -378,7 +378,6 @@ int remove_service(const char *name, const char *port)
 			if (tmp->type != CONNECTION_STDINOUT)
 				close_socket(tmp->fd);
 
-			free(tmp->priv);
 			free_service(tmp);
 
 			return ERROR_OK;

-----------------------------------------------------------------------

Summary of changes:
 src/server/server.c | 1 -
 1 file changed, 1 deletion(-)


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- Log -----------------------------------------------------------------
commit fc8f939d95e0b02e5d5dc70023a0ca48fde7aa5d
Author: Antonio Borneo <bor...@gm...>
Date:   Sat Jul 26 12:17:46 2025 +0200

    Support two-wire cJTAG OSCAN1 and JScan3 using FTDI adapters
    
    cJTAG OSCAN1, in lieu of 4-wire JTAG, is starting to be a configuration
    option for some SiFive hardware. An FTDI-based adapter that can be
    configured to drive the bidirectional pin TMSC is assumed for this
    topology. Specifically, the Olimex ARM-USB-TINY-H with the ARM-JTAG-SWD
    adapter, connected to a SiFive cJTAG-enabled target board is the only
    known concrete topology, currently. But in theory, other FTDI based
    devices that can drive a two-wire bidirectional signaling pattern could
    be made to work in this scheme in the future.
    
    These code changes are offered as a way to drive that topology. It's
    translating IR/DR and JTAG traversal commands to the two-wire clocking
    and signaling.
    
    See:
    - https://github.com/riscv-collab/riscv-openocd/pull/320
    - https://github.com/riscv-collab/riscv-openocd/pull/736
    
    Signed-off-by: Greg Savin <gre...@si...>
    Signed-off-by: mrv96 <mr...@us...>
    Signed-off-by: Tim Newsome <ti...@si...>
    Signed-off-by: Antonio Borneo <bor...@gm...>
    Change-Id: Ia1daa2c01227c4b0005be947b2bb0de81a800874
    Reviewed-on: https://review.openocd.org/c/openocd/+/6981
    Tested-by: jenkins

diff --git a/configure.ac b/configure.ac
index 6efcf24f2..d563f2b66 100644
--- a/configure.ac
+++ b/configure.ac
@@ -130,6 +130,7 @@ m4_define([ADAPTER_OPT], [m4_translit(ADAPTER_ARG($1), [_], [-])])
 
 m4_define([USB1_ADAPTERS],
 	[[[ftdi], [MPSSE mode of FTDI based devices], [FTDI]],
+	[[ftdi_cjtag], [cJTAG (OScan1, JScan3) tunneled thru MPSSE], [FTDI_CJTAG]],
 	[[ch347], [CH347 based devices], [CH347]],
 	[[stlink], [ST-Link Programmer], [HLADAPTER_STLINK]],
 	[[ti_icdi], [TI ICDI JTAG Programmer], [HLADAPTER_ICDI]],
diff --git a/doc/openocd.texi b/doc/openocd.texi
index 09bbd3dd9..82d2a9416 100644
--- a/doc/openocd.texi
+++ b/doc/openocd.texi
@@ -2781,6 +2781,35 @@ minimal impact on the target system. Avoid floating inputs, conflicting outputs
 and initially asserted reset signals.
 @end deffn
 
+@deffn {Command} {ftdi oscan1_mode} on|off
+Enable or disable OScan1 mode. This mode is intended for use with an adapter,
+such as the ARM-JTAG-SWD by Olimex, that sits in between the FTDI chip and the
+target. The cJTAG prococol is composed of two wires: TCKC (clock) and TMSC (data).
+TMSC is a bidirectional signal which is time-multiplexed alternating TDI, TMS and
+TDO. The multiplexing is achieved by a tri-state buffer which puts TMSC in Hi-Z
+when the device is supposed to take the control of the line (TDO phase).
+
+The ARM-JTAG-SWD adapter uses standard TRST and TMS signals to control TMSC
+direction. TRST is used by the adapter as selector for the multiplexers which set
+the JTAG probe in 2-wire mode. Whatever signal is used for this purpose, it must
+be defined with the name JTAG_SEL using @command{ftdi layout_signal}. JTAG_SEL is
+set to 0 during OScan1 initialization.
+
+Some JTAG probes like the Digilent JTAG-HS2, support cJTAG by using a
+separate pin to control when TMS is driven onto TMSC. You can use such
+probes by defining the signal TMSC_EN using
+@command{ftdi layout_signal TMSC_EN -data <mask>}.
+@end deffn
+
+@deffn {Command} {ftdi jscan3_mode} on|off
+Enable or disable JScan3 mode. This mode uses the classic 4-wire JTAG protocol
+in chips whose JTAG port is only compliant with the cJTAG standard (IEEE 1149.7).
+
+Since cJTAG needs a 2-wire escape sequence to select the operating mode,
+a cJTAG adapter like ARM-JTAG-SWD by Olimex is still required. This means
+that a cJTAG probe configuration script must be used too.
+@end deffn
+
 @deffn {Command} {ftdi layout_signal} name [@option{-data}|@option{-ndata} data_mask] [@option{-input}|@option{-ninput} input_mask] [@option{-oe}|@option{-noe} oe_mask] [@option{-alias}|@option{-nalias} name]
 Creates a signal with the specified @var{name}, controlled by one or more FTDI
 GPIO pins via a range of possible buffer connections. The masks are FTDI GPIO
diff --git a/src/jtag/drivers/ftdi.c b/src/jtag/drivers/ftdi.c
index 00b3d198b..c57972cce 100644
--- a/src/jtag/drivers/ftdi.c
+++ b/src/jtag/drivers/ftdi.c
@@ -75,6 +75,16 @@
 /* FTDI access library includes */
 #include "mpsse.h"
 
+#if BUILD_FTDI_CJTAG == 1
+#define DO_CLOCK_DATA clock_data
+#define DO_CLOCK_TMS_CS clock_tms_cs
+#define DO_CLOCK_TMS_CS_OUT clock_tms_cs_out
+#else
+#define DO_CLOCK_DATA mpsse_clock_data
+#define DO_CLOCK_TMS_CS mpsse_clock_tms_cs
+#define DO_CLOCK_TMS_CS_OUT mpsse_clock_tms_cs_out
+#endif
+
 #define JTAG_MODE (LSB_FIRST | POS_EDGE_IN | NEG_EDGE_OUT)
 #define JTAG_MODE_ALT (LSB_FIRST | NEG_EDGE_IN | NEG_EDGE_OUT)
 #define SWD_MODE (LSB_FIRST | POS_EDGE_IN | NEG_EDGE_OUT)
@@ -85,6 +95,39 @@ static uint8_t ftdi_jtag_mode = JTAG_MODE;
 
 static bool swd_mode;
 
+#if BUILD_FTDI_CJTAG == 1
+#define ESCAPE_SEQ_OAC_BIT2 28
+
+static void cjtag_reset_online_activate(void);
+
+/*
+  The cJTAG 2-wire OScan1 protocol, in lieu of 4-wire JTAG, is a configuration option
+  for some SoCs. An FTDI-based adapter that can be configured to appropriately drive
+  the bidirectional pin TMSC is able to drive OScan1 protocol.  For example, an Olimex
+  ARM-USB-TINY-H with the ARM-JTAG-SWD adapter, connected to a cJTAG-enabled
+  target board is such a topology.  A TCK cycle with TMS=1/TDI=N translates to a TMSC
+  output of N, and a TCK cycle with TMS=0 translates to a TMSC input from the target back
+  to the adapter/probe.  The OScan1 protocol uses 3 TCK cycles to generate the data flow
+  that is equivalent to that of a single TCK cycle in 4-wire JTAG. The OScan1-related
+  code in this module translates IR/DR scan commanads and JTAG state traversal commands
+  to the two-wire clocking and signaling of OScan1 protocol, if placed into OScan1 mode
+  during initialization.
+*/
+static void oscan1_mpsse_clock_data(struct mpsse_ctx *ctx, const uint8_t *out, unsigned int out_offset, uint8_t *in,
+				    unsigned int in_offset, unsigned int length, uint8_t mode);
+static void oscan1_mpsse_clock_tms_cs(struct mpsse_ctx *ctx, const uint8_t *out, unsigned int out_offset, uint8_t *in,
+				      unsigned int in_offset, unsigned int length, bool tdi, uint8_t mode);
+static void oscan1_mpsse_clock_tms_cs_out(struct mpsse_ctx *ctx, const uint8_t *out, unsigned int out_offset,
+					  unsigned int length, bool tdi, uint8_t mode);
+
+static bool oscan1_mode;
+
+/*
+  The cJTAG 4-wire JScan3 allows to use standard JTAG protocol with cJTAG hardware
+*/
+static bool jscan3_mode;
+#endif
+
 #define MAX_USB_IDS 8
 /* vid = pid = 0 marks the end of the list */
 static uint16_t ftdi_vid[MAX_USB_IDS + 1] = { 0 };
@@ -230,6 +273,35 @@ static int ftdi_get_signal(const struct signal *s, uint16_t *value_out)
 	return ERROR_OK;
 }
 
+#if BUILD_FTDI_CJTAG == 1
+static void clock_data(struct mpsse_ctx *ctx, const uint8_t *out, unsigned int out_offset, uint8_t *in,
+		     unsigned int in_offset, unsigned int length, uint8_t mode)
+{
+	if (oscan1_mode)
+		oscan1_mpsse_clock_data(ctx, out, out_offset, in, in_offset, length, mode);
+	else
+		mpsse_clock_data(ctx, out, out_offset, in, in_offset, length, mode);
+}
+
+static void clock_tms_cs(struct mpsse_ctx *ctx, const uint8_t *out, unsigned int out_offset, uint8_t *in,
+		       unsigned int in_offset, unsigned int length, bool tdi, uint8_t mode)
+{
+	if (oscan1_mode)
+		oscan1_mpsse_clock_tms_cs(ctx, out, out_offset, in, in_offset, length, tdi, mode);
+	else
+		mpsse_clock_tms_cs(ctx, out, out_offset, in, in_offset, length, tdi, mode);
+}
+
+static void clock_tms_cs_out(struct mpsse_ctx *ctx, const uint8_t *out, unsigned int out_offset,
+			   unsigned int length, bool tdi, uint8_t mode)
+{
+	if (oscan1_mode)
+		oscan1_mpsse_clock_tms_cs_out(ctx, out, out_offset, length, tdi, mode);
+	else
+		mpsse_clock_tms_cs_out(ctx, out, out_offset, length, tdi, mode);
+}
+#endif
+
 /**
  * Function move_to_state
  * moves the TAP controller from the current state to a
@@ -258,7 +330,7 @@ static void move_to_state(enum tap_state goal_state)
 	for (int i = 0; i < tms_count; i++)
 		tap_set_state(tap_state_transition(tap_get_state(), (tms_bits >> i) & 1));
 
-	mpsse_clock_tms_cs_out(mpsse_ctx,
+	DO_CLOCK_TMS_CS_OUT(mpsse_ctx,
 		&tms_bits,
 		0,
 		tms_count,
@@ -325,7 +397,7 @@ static void ftdi_execute_runtest(struct jtag_command *cmd)
 	while (i > 0) {
 		/* there are no state transitions in this code, so omit state tracking */
 		unsigned int this_len = i > 7 ? 7 : i;
-		mpsse_clock_tms_cs_out(mpsse_ctx, &zero, 0, this_len, false, ftdi_jtag_mode);
+		DO_CLOCK_TMS_CS_OUT(mpsse_ctx, &zero, 0, this_len, false, ftdi_jtag_mode);
 		i -= this_len;
 	}
 
@@ -360,7 +432,7 @@ static void ftdi_execute_tms(struct jtag_command *cmd)
 	LOG_DEBUG_IO("TMS: %u bits", cmd->cmd.tms->num_bits);
 
 	/* TODO: Missing tap state tracking, also missing from ft2232.c! */
-	mpsse_clock_tms_cs_out(mpsse_ctx,
+	DO_CLOCK_TMS_CS_OUT(mpsse_ctx,
 		cmd->cmd.tms->bits,
 		0,
 		cmd->cmd.tms->num_bits,
@@ -407,7 +479,7 @@ static void ftdi_execute_pathmove(struct jtag_command *cmd)
 		state_count++;
 
 		if (bit_count == 7 || num_states == 0) {
-			mpsse_clock_tms_cs_out(mpsse_ctx,
+			DO_CLOCK_TMS_CS_OUT(mpsse_ctx,
 					&tms_byte,
 					0,
 					bit_count,
@@ -461,7 +533,7 @@ static void ftdi_execute_scan(struct jtag_command *cmd)
 		if (i == cmd->cmd.scan->num_fields - 1 && tap_get_state() != tap_get_end_state()) {
 			/* Last field, and we're leaving IRSHIFT/DRSHIFT. Clock last bit during tap
 			 * movement. This last field can't have length zero, it was checked above. */
-			mpsse_clock_data(mpsse_ctx,
+			DO_CLOCK_DATA(mpsse_ctx,
 				field->out_value,
 				0,
 				field->in_value,
@@ -476,7 +548,7 @@ static void ftdi_execute_scan(struct jtag_command *cmd)
 			 * Otherwise, clock out 1-0 (->EXIT1 ->PAUSE)
 			 */
 			uint8_t tms_bits = 0x03;
-			mpsse_clock_tms_cs(mpsse_ctx,
+			DO_CLOCK_TMS_CS(mpsse_ctx,
 					&tms_bits,
 					0,
 					field->in_value,
@@ -486,7 +558,7 @@ static void ftdi_execute_scan(struct jtag_command *cmd)
 					ftdi_jtag_mode);
 			tap_set_state(tap_state_transition(tap_get_state(), 1));
 			if (tap_get_end_state() == TAP_IDLE) {
-				mpsse_clock_tms_cs_out(mpsse_ctx,
+				DO_CLOCK_TMS_CS_OUT(mpsse_ctx,
 						&tms_bits,
 						1,
 						2,
@@ -495,7 +567,7 @@ static void ftdi_execute_scan(struct jtag_command *cmd)
 				tap_set_state(tap_state_transition(tap_get_state(), 1));
 				tap_set_state(tap_state_transition(tap_get_state(), 0));
 			} else {
-				mpsse_clock_tms_cs_out(mpsse_ctx,
+				DO_CLOCK_TMS_CS_OUT(mpsse_ctx,
 						&tms_bits,
 						2,
 						1,
@@ -504,7 +576,7 @@ static void ftdi_execute_scan(struct jtag_command *cmd)
 				tap_set_state(tap_state_transition(tap_get_state(), 0));
 			}
 		} else
-			mpsse_clock_data(mpsse_ctx,
+			DO_CLOCK_DATA(mpsse_ctx,
 				field->out_value,
 				0,
 				field->in_value,
@@ -585,7 +657,7 @@ static void ftdi_execute_stableclocks(struct jtag_command *cmd)
 	while (num_cycles > 0) {
 		/* there are no state transitions in this code, so omit state tracking */
 		unsigned int this_len = num_cycles > 7 ? 7 : num_cycles;
-		mpsse_clock_tms_cs_out(mpsse_ctx, &tms, 0, this_len, false, ftdi_jtag_mode);
+		DO_CLOCK_TMS_CS_OUT(mpsse_ctx, &tms, 0, this_len, false, ftdi_jtag_mode);
 		num_cycles -= this_len;
 	}
 
@@ -597,10 +669,19 @@ static void ftdi_execute_stableclocks(struct jtag_command *cmd)
 static void ftdi_execute_command(struct jtag_command *cmd)
 {
 	switch (cmd->type) {
+#if BUILD_FTDI_CJTAG == 1
+	case JTAG_RESET:
+		if (cmd->cmd.reset->trst)
+			cjtag_reset_online_activate(); /* put the target (back) into selected cJTAG mode */
+		break;
+#endif
 	case JTAG_RUNTEST:
 		ftdi_execute_runtest(cmd);
 		break;
 	case JTAG_TLR_RESET:
+#if BUILD_FTDI_CJTAG == 1
+		cjtag_reset_online_activate(); /* put the target (back) into selected cJTAG mode */
+#endif
 		ftdi_execute_statemove(cmd);
 		break;
 	case JTAG_PATHMOVE:
@@ -675,6 +756,21 @@ static int ftdi_initialize(void)
 		/* A dummy SWD_EN would have zero mask */
 		if (sig->data_mask)
 			ftdi_set_signal(sig, '1');
+#if BUILD_FTDI_CJTAG == 1
+	} else if (oscan1_mode || jscan3_mode) {
+		struct signal *sig = find_signal_by_name("JTAG_SEL");
+		if (!sig) {
+			LOG_ERROR("A cJTAG mode is active but JTAG_SEL signal is not defined");
+			return ERROR_JTAG_INIT_FAILED;
+		}
+		/* A dummy JTAG_SEL would have zero mask */
+		if (sig->data_mask) {
+			ftdi_set_signal(sig, '0');
+		} else if (jscan3_mode) {
+			LOG_ERROR("In JScan3 mode JTAG_SEL signal cannot be dummy, data mask needed");
+			return ERROR_JTAG_INIT_FAILED;
+		}
+#endif
 	}
 
 	mpsse_set_data_bits_low_byte(mpsse_ctx, output & 0xff, direction & 0xff);
@@ -706,6 +802,286 @@ static int ftdi_quit(void)
 	return ERROR_OK;
 }
 
+#if BUILD_FTDI_CJTAG == 1
+static void oscan1_mpsse_clock_data(struct mpsse_ctx *ctx, const uint8_t *out, unsigned int out_offset, uint8_t *in,
+		     unsigned int in_offset, unsigned int length, uint8_t mode)
+{
+	static const uint8_t zero;
+	static const uint8_t one = 1;
+
+	struct signal *tmsc_en = find_signal_by_name("TMSC_EN");
+
+	LOG_DEBUG_IO("%sout %d bits", in ? "in" : "", length);
+
+	for (unsigned int i = 0; i < length; i++) {
+		int bitnum;
+		uint8_t bit;
+
+		/* OScan1 uses 3 separate clocks */
+
+		/* drive TMSC to the *negation* of the desired TDI value */
+		bitnum = out_offset + i;
+		bit = out ? ((out[bitnum / 8] >> (bitnum % 8)) & 0x1) : 0;
+
+		/* Try optimized case first: if desired TDI bit is 1, then we
+		   can fuse what would otherwise be the first two MPSSE commands */
+		if (bit) {
+			const uint8_t tmsbits = 0x3;  /* 1, 1 */
+			mpsse_clock_tms_cs_out(mpsse_ctx, &tmsbits, 0, 2, false, mode);
+		} else {
+			/* Can't fuse because TDI varies; less efficient */
+			mpsse_clock_tms_cs_out(mpsse_ctx, &one, 0, 1, bit ? 0 : 1, mode);
+
+			/* drive TMSC to desired TMS value (always zero in this context) */
+			mpsse_clock_tms_cs_out(mpsse_ctx, &one, 0, 1, false, mode);
+		}
+
+		if (tmsc_en)
+			ftdi_set_signal(tmsc_en, '0'); /* put TMSC in high impedance */
+
+		/* drive another TCK without driving TMSC (TDO cycle) */
+		mpsse_clock_tms_cs(mpsse_ctx, &zero, 0, in, in_offset + i, 1, false, mode);
+
+		if (tmsc_en)
+			ftdi_set_signal(tmsc_en, '1'); /* drive again TMSC */
+	}
+}
+
+static void oscan1_mpsse_clock_tms_cs(struct mpsse_ctx *ctx, const uint8_t *out, unsigned int out_offset, uint8_t *in,
+		       unsigned int in_offset, unsigned int length, bool tdi, uint8_t mode)
+{
+	static const uint8_t zero;
+	static const uint8_t one = 1;
+
+	struct signal *tmsc_en = find_signal_by_name("TMSC_EN");
+
+	LOG_DEBUG_IO("%sout %d bits, tdi=%d", in ? "in" : "", length, tdi);
+
+	for (unsigned int i = 0; i < length; i++) {
+		int bitnum;
+		uint8_t tmsbit;
+		uint8_t tdibit;
+
+		/* OScan1 uses 3 separate clocks */
+
+		/* drive TMSC to the *negation* of the desired TDI value */
+		tdibit = tdi ? 0 : 1;
+
+		/* drive TMSC to desired TMS value */
+		bitnum = out_offset + i;
+		tmsbit = ((out[bitnum / 8] >> (bitnum % 8)) & 0x1);
+
+		if (tdibit == tmsbit) {
+			/* Can squash into a single MPSSE command */
+			const uint8_t tmsbits = 0x3;
+			mpsse_clock_tms_cs_out(mpsse_ctx, &tmsbits, 0, 2, tdibit, mode);
+		} else {
+			/* Unoptimized case, can't formulate with a single command */
+			mpsse_clock_tms_cs_out(mpsse_ctx, &one, 0, 1, tdibit, mode);
+			mpsse_clock_tms_cs_out(mpsse_ctx, &one, 0, 1, (tmsbit != 0), mode);
+		}
+
+		if (tmsc_en)
+			ftdi_set_signal(tmsc_en, '0'); /* put TMSC in high impedance */
+
+		/* drive another TCK without driving TMSC (TDO cycle) */
+		mpsse_clock_tms_cs(mpsse_ctx, &zero, 0, in, in_offset + i, 1, false, mode);
+
+		if (tmsc_en)
+			ftdi_set_signal(tmsc_en, '1'); /* drive again TMSC */
+	}
+}
+
+static void oscan1_mpsse_clock_tms_cs_out(struct mpsse_ctx *ctx, const uint8_t *out, unsigned int out_offset,
+			   unsigned int length, bool tdi, uint8_t mode)
+{
+	oscan1_mpsse_clock_tms_cs(ctx, out, out_offset, 0, 0, length, tdi, mode);
+}
+
+static void cjtag_set_tck_tms_tdi(struct signal *tck, char tckvalue, struct signal *tms,
+				   char tmsvalue, struct signal *tdi, char tdivalue)
+{
+	ftdi_set_signal(tms, tmsvalue);
+	ftdi_set_signal(tdi, tdivalue);
+	ftdi_set_signal(tck, tckvalue);
+}
+
+static void cjtag_reset_online_activate(void)
+{
+	/* After TAP reset, the cJTAG-to-JTAG adapter is in offline and
+	non-activated state. Escape sequences are needed to bring the
+	TAP online and activated into the desired working mode. */
+
+	struct signal *tck = find_signal_by_name("TCK");
+	struct signal *tdi = find_signal_by_name("TDI");
+	struct signal *tms = find_signal_by_name("TMS");
+	struct signal *tdo = find_signal_by_name("TDO");
+	struct signal *tmsc_en = find_signal_by_name("TMSC_EN");
+	uint16_t tdovalue;
+
+	static struct {
+		int8_t tck;
+		int8_t tms;
+		int8_t tdi;
+	} sequence[] = {
+		/* TCK=0, TMS=1, TDI=0 (drive TMSC to 0 baseline) */
+		{'0', '1', '0'},
+
+		/* Drive cJTAG escape sequence for TAP reset - 8 TMSC edges */
+		/* TCK=1, TMS=1, TDI=0 (rising edge of TCK with TMSC still 0) */
+		{'1', '1', '0'},
+		/* TCK=1, TMS=1, TDI=1 (drive rising TMSC edge) */
+		{'1', '1', '1'},
+		/* TCK=1, TMS=1, TDI=0 (drive falling TMSC edge) */
+		{'1', '1', '0'},
+		/* TCK=1, TMS=1, TDI=1 (drive rising TMSC edge) */
+		{'1', '1', '1'},
+		/* TCK=1, TMS=1, TDI=0 (drive falling TMSC edge) */
+		{'1', '1', '0'},
+		/* TCK=1, TMS=1, TDI=1 (drive rising TMSC edge) */
+		{'1', '1', '1'},
+		/* TCK=1, TMS=1, TDI=0 (drive falling TMSC edge) */
+		{'1', '1', '0'},
+		/* TCK=1, TMS=1, TDI=1 (drive rising TMSC edge) */
+		{'1', '1', '1'},
+		/* TCK=1, TMS=1, TDI=0 (drive falling TMSC edge) */
+		{'1', '1', '0'},
+		/* TCK=0, TMS=1, TDI=0 (falling edge TCK with TMSC still 0) */
+		{'0', '1', '0'},
+
+		/* 3 TCK pulses for padding */
+		/* TCK=1, TMS=1, TDI=0 (drive rising TCK edge) */
+		{'1', '1', '0'},
+		/* TCK=0, TMS=1, TDI=0 (drive falling TCK edge) */
+		{'0', '1', '0'},
+		/* TCK=1, TMS=1, TDI=0 (drive rising TCK edge) */
+		{'1', '1', '0'},
+		/* TCK=0, TMS=1, TDI=0 (drive falling TCK edge) */
+		{'0', '1', '0'},
+		/* TCK=1, TMS=1, TDI=0 (drive rising TCK edge) */
+		{'1', '1', '0'},
+		/* TCK=0, TMS=1, TDI=0 (drive falling TCK edge) */
+		{'0', '1', '0'},
+
+		/* Drive cJTAG escape sequence for SELECT */
+		/* TCK=1, TMS=1, TDI=0 (rising edge of TCK with TMSC still 0, TAP reset that was just setup occurs here too) */
+		{'1', '1', '0'},
+		/* TCK=1, TMS=1, TDI=1 (drive rising TMSC edge) */
+		{'1', '1', '1'},
+		/* TCK=1, TMS=1, TDI=0 (drive falling TMSC edge) */
+		{'1', '1', '0'},
+		/* TCK=1, TMS=1, TDI=1 (drive rising TMSC edge) */
+		{'1', '1', '1'},
+		/* TCK=1, TMS=1, TDI=0 (drive falling TMSC edge) */
+		{'1', '1', '0'},
+		/* TCK=1, TMS=1, TDI=1 (drive rising TMSC edge) */
+		{'1', '1', '1'},
+		/* TCK=1, TMS=1, TDI=0 (drive falling TMSC edge) */
+		{'1', '1', '0'},
+		/* TCK=0, TMS=1, TDI=0 (falling edge TCK with TMSC still 0) */
+		{'0', '1', '0'},
+
+		/* Drive cJTAG escape sequence for OScan1 activation -- OAC = 1100 -> 2 wires -- */
+		/* TCK=1, TMS=1, TDI=0 (rising edge TCK with TMSC still 0... online mode activated... also OAC bit0==0) */
+		{'1', '1', '0'},
+		/* TCK=0, TMS=1, TDI=0 (falling edge TCK) */
+		{'0', '1', '0'},
+		/* TCK=1, TMS=1, TDI=0 (rising edge TCK... OAC bit1==0) */
+		{'1', '1', '0'},
+		/* TCK=0, TMS=1, TDI=1 (falling edge TCK) */
+		{'0', '1', '1'},
+		/* TCK=1, TMS=1, TDI=1 (rising edge TCK... OAC bit2==1) */
+		{'1', '1', '1'},
+		/* TCK=0, TMS=1, TDI=1 (falling edge TCK, TMSC stays high) */
+		{'0', '1', '1'},
+		/* TCK=1, TMS=1, TDI=1 (rising edge TCK... OAC bit3==1) */
+		{'1', '1', '1'},
+		/* TCK=0, TMS=1, TDI=0 (falling edge TCK) */
+		{'0', '1', '0'},
+		/* TCK=1, TMS=1, TDI=0 (rising edge TCK... EC bit0==0) */
+		{'1', '1', '0'},
+		/* TCK=0, TMS=1, TDI=0 (falling edge TCK) */
+		{'0', '1', '0'},
+		/* TCK=1, TMS=1, TDI=0 (rising edge TCK... EC bit1==0) */
+		{'1', '1', '0'},
+		/* TCK=0, TMS=1, TDI=0 (falling edge TCK) */
+		{'0', '1', '0'},
+		/* TCK=1, TMS=1, TDI=0 (rising edge TCK... EC bit2==0) */
+		{'1', '1', '0'},
+		/* TCK=0, TMS=1, TDI=1 (falling edge TCK) */
+		{'0', '1', '1'},
+		/* TCK=1, TMS=1, TDI=1 (rising edge TCK... EC bit3==1) */
+		{'1', '1', '1'},
+		/* TCK=0, TMS=1, TDI=0 (falling edge TCK) */
+		{'0', '1', '0'},
+		/* TCK=1, TMS=1, TDI=0 (rising edge TCK... CP bit0==0) */
+		{'1', '1', '0'},
+		/* TCK=0, TMS=1, TDI=0 (falling edge TCK) */
+		{'0', '1', '0'},
+		/* TCK=1, TMS=1, TDI=0 (rising edge TCK... CP bit1==0) */
+		{'1', '1', '0'},
+		/* TCK=0, TMS=1, TDI=0 (falling edge TCK) */
+		{'0', '1', '0'},
+		/* TCK=1, TMS=1, TDI=0 (rising edge TCK... CP bit2==0) */
+		{'1', '1', '0'},
+		/* TCK=0, TMS=1, TDI=0 (falling edge TCK) */
+		{'0', '1', '0'},
+		/* TCK=1, TMS=1, TDI=0 (rising edge TCK... CP bit3==0) */
+		{'1', '1', '0'},
+		/* TCK=0, TMS=1, TDI=0 (falling edge TCK) */
+		{'0', '1', '0'},
+	};
+
+	if (!oscan1_mode && !jscan3_mode)
+		return; /* Nothing to do */
+
+	if (oscan1_mode && jscan3_mode) {
+		LOG_ERROR("Both oscan1_mode and jscan3_mode are \"on\". At most one of them can be enabled.");
+		return;
+	}
+
+	if (!tck) {
+		LOG_ERROR("Can't run cJTAG online/activate escape sequences: TCK signal is not defined");
+		return;
+	}
+
+	if (!tdi) {
+		LOG_ERROR("Can't run cJTAG online/activate escape sequences: TDI signal is not defined");
+		return;
+	}
+
+	if (!tms) {
+		LOG_ERROR("Can't run cJTAG online/activate escape sequences: TMS signal is not defined");
+		return;
+	}
+
+	if (!tdo) {
+		LOG_ERROR("Can't run cJTAG online/activate escape sequences: TDO signal is not defined");
+		return;
+	}
+
+	if (jscan3_mode) {
+		/* Update the sequence above to enable JScan3 instead of OScan1 */
+		sequence[ESCAPE_SEQ_OAC_BIT2].tdi = '0';
+		sequence[ESCAPE_SEQ_OAC_BIT2 + 1].tdi = '0';
+	}
+
+	/* if defined TMSC_EN, replace tms with it */
+	if (tmsc_en)
+		tms = tmsc_en;
+
+	/* Send the sequence to the adapter */
+	for (size_t i = 0; i < ARRAY_SIZE(sequence); i++)
+		cjtag_set_tck_tms_tdi(tck, sequence[i].tck, tms, sequence[i].tms, tdi, sequence[i].tdi);
+
+	/* If JScan3 mode, configure cJTAG adapter to 4-wire */
+	if (jscan3_mode)
+		ftdi_set_signal(find_signal_by_name("JTAG_SEL"), '1');
+
+	ftdi_get_signal(tdo, &tdovalue);  /* Just to force a flush */
+}
+#endif /* #if BUILD_FTDI_CJTAG == 1 */
+
 COMMAND_HANDLER(ftdi_handle_device_desc_command)
 {
 	if (CMD_ARGC == 1) {
@@ -917,6 +1293,32 @@ COMMAND_HANDLER(ftdi_handle_tdo_sample_edge_command)
 	return ERROR_OK;
 }
 
+#if BUILD_FTDI_CJTAG == 1
+COMMAND_HANDLER(ftdi_handle_oscan1_mode_command)
+{
+	if (CMD_ARGC > 1)
+		return ERROR_COMMAND_SYNTAX_ERROR;
+
+	if (CMD_ARGC == 1)
+		COMMAND_PARSE_ON_OFF(CMD_ARGV[0], oscan1_mode);
+
+	command_print(CMD, "oscan1 mode: %s.", oscan1_mode ? "on" : "off");
+	return ERROR_OK;
+}
+
+COMMAND_HANDLER(ftdi_handle_jscan3_mode_command)
+{
+	if (CMD_ARGC > 1)
+		return ERROR_COMMAND_SYNTAX_ERROR;
+
+	if (CMD_ARGC == 1)
+		COMMAND_PARSE_ON_OFF(CMD_ARGV[0], jscan3_mode);
+
+	command_print(CMD, "jscan3 mode: %s.", jscan3_mode ? "on" : "off");
+	return ERROR_OK;
+}
+#endif
+
 static const struct command_registration ftdi_subcommand_handlers[] = {
 	{
 		.name = "device_desc",
@@ -978,6 +1380,22 @@ static const struct command_registration ftdi_subcommand_handlers[] = {
 			"allow signalling speed increase)",
 		.usage = "(rising|falling)",
 	},
+#if BUILD_FTDI_CJTAG == 1
+	{
+		.name = "oscan1_mode",
+		.handler = &ftdi_handle_oscan1_mode_command,
+		.mode = COMMAND_ANY,
+		.help = "set to 'on' to use OScan1 mode for signaling, otherwise 'off' (default is 'off')",
+		.usage = "(on|off)",
+	},
+	{
+		.name = "jscan3_mode",
+		.handler = &ftdi_handle_jscan3_mode_command,
+		.mode = COMMAND_ANY,
+		.help = "set to 'on' to use JScan3 mode for signaling, otherwise 'off' (default is 'off')",
+		.usage = "(on|off)",
+	},
+#endif
 	COMMAND_REGISTRATION_DONE
 };
 
diff --git a/tcl/interface/ftdi/olimex-arm-jtag-cjtag.cfg b/tcl/interface/ftdi/olimex-arm-jtag-cjtag.cfg
new file mode 100644
index 000000000..25addb0ca
--- /dev/null
+++ b/tcl/interface/ftdi/olimex-arm-jtag-cjtag.cfg
@@ -0,0 +1,29 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
+#
+# Olimex ARM JTAG SWD adapter
+# https://www.olimex.com/Products/ARM/JTAG/ARM-JTAG-SWD/
+#
+
+#
+# Olimex ARM-USB-TINY-H
+#
+# http://www.olimex.com/dev/arm-usb-tiny-h.html
+#
+
+interface ftdi
+ftdi oscan1_mode on
+ftdi device_desc "Olimex OpenOCD JTAG ARM-USB-TINY-H"
+ftdi vid_pid 0x15ba 0x002a
+
+ftdi layout_init 0x0808 0x0a1b
+ftdi layout_signal nSRST -oe 0x0200
+# oscan1_ftdi_layout_signal nTRST -data 0x0100 -oe 0x0100
+ftdi layout_signal LED -data 0x0800
+
+# These signals are used for cJTAG escape sequence on initialization only
+ftdi layout_signal TCK -data 0x0001
+ftdi layout_signal TDI -data 0x0002
+ftdi layout_signal TDO -input 0x0004
+ftdi layout_signal TMS -data 0x0008
+ftdi layout_signal JTAG_SEL -data 0x0100 -oe 0x0100
diff --git a/tcl/interface/ftdi/olimex-arm-usb-ocd-h-cjtag.cfg b/tcl/interface/ftdi/olimex-arm-usb-ocd-h-cjtag.cfg
new file mode 100644
index 000000000..85d66ef01
--- /dev/null
+++ b/tcl/interface/ftdi/olimex-arm-usb-ocd-h-cjtag.cfg
@@ -0,0 +1,24 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
+#
+# Olimex ARM-USB-OCD-H (using cJTAG)
+#
+# http://www.olimex.com/dev/arm-usb-ocd-h.html
+#
+
+interface ftdi
+ftdi oscan1_mode on
+ftdi device_desc "Olimex OpenOCD JTAG ARM-USB-OCD-H"
+ftdi vid_pid 0x15ba 0x002b
+
+ftdi layout_init 0x0808 0x0a1b
+ftdi layout_signal nSRST -oe 0x0200
+# oscan1_ftdi_layout_signal nTRST -data 0x0100 -oe 0x0100
+ftdi layout_signal LED -data 0x0800
+
+# These signals are used for cJTAG escape sequence on initialization only
+ftdi layout_signal TCK -data 0x0001
+ftdi layout_signal TDI -data 0x0002
+ftdi layout_signal TDO -input 0x0004
+ftdi layout_signal TMS -data 0x0008
+ftdi layout_signal JTAG_SEL -data 0x0100 -oe 0x0100
diff --git a/tcl/interface/ftdi/olimex-arm-usb-tiny-h-cjtag.cfg b/tcl/interface/ftdi/olimex-arm-usb-tiny-h-cjtag.cfg
new file mode 100644
index 000000000..ee09e81e2
--- /dev/null
+++ b/tcl/interface/ftdi/olimex-arm-usb-tiny-h-cjtag.cfg
@@ -0,0 +1,29 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
+#
+# Olimex ARM JTAG SWD adapter
+# https://www.olimex.com/Products/ARM/JTAG/ARM-JTAG-SWD/
+#
+
+#
+# Olimex ARM-USB-TINY-H (using cJTAG)
+#
+# http://www.olimex.com/dev/arm-usb-tiny-h.html
+#
+
+interface ftdi
+ftdi oscan1_mode on
+ftdi device_desc "Olimex OpenOCD JTAG ARM-USB-TINY-H"
+ftdi vid_pid 0x15ba 0x002a
+
+ftdi layout_init 0x0808 0x0a1b
+ftdi layout_signal nSRST -oe 0x0200
+# oscan1_ftdi_layout_signal nTRST -data 0x0100 -oe 0x0100
+ftdi layout_signal LED -data 0x0800
+
+# These signals are used for cJTAG escape sequence on initialization only
+ftdi layout_signal TCK -data 0x0001
+ftdi layout_signal TDI -data 0x0002
+ftdi layout_signal TDO -input 0x0004
+ftdi layout_signal TMS -data 0x0008
+ftdi layout_signal JTAG_SEL -data 0x0100 -oe 0x0100

-----------------------------------------------------------------------

Summary of changes:
 configure.ac                                       |   1 +
 doc/openocd.texi                                   |  29 ++
 src/jtag/drivers/ftdi.c                            | 438 ++++++++++++++++++++-
 tcl/interface/ftdi/olimex-arm-jtag-cjtag.cfg       |  29 ++
 tcl/interface/ftdi/olimex-arm-usb-ocd-h-cjtag.cfg  |  24 ++
 tcl/interface/ftdi/olimex-arm-usb-tiny-h-cjtag.cfg |  29 ++
 6 files changed, 540 insertions(+), 10 deletions(-)
 create mode 100644 tcl/interface/ftdi/olimex-arm-jtag-cjtag.cfg
 create mode 100644 tcl/interface/ftdi/olimex-arm-usb-ocd-h-cjtag.cfg
 create mode 100644 tcl/interface/ftdi/olimex-arm-usb-tiny-h-cjtag.cfg


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       via  181547327f11ea56d24b1d15989df81355b2b7d0 (commit)
      from  eef37df3aaeab98ac8df4ad6447680228d2a9772 (commit)

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- Log -----------------------------------------------------------------
commit 181547327f11ea56d24b1d15989df81355b2b7d0
Author: Kulyatskaya Alexandra <a.k...@sy...>
Date:   Tue Jun 24 15:37:48 2025 +0300

    target/breakpoints.c: add breakpoint intersection detection
    
    Modify the breakpoint insertion logic to include intersection detection
    between breakpoints.
    
    Change-Id: I294bea83b18335c2f304ddd99361872eadaaa684
    Signed-off-by: Kulyatskaya Alexandra <a.k...@sy...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/9146
    Tested-by: jenkins
    Reviewed-by: Antonio Borneo <bor...@gm...>

diff --git a/src/helper/util.c b/src/helper/util.c
index 2e9f6155e..1ced8bd5f 100644
--- a/src/helper/util.c
+++ b/src/helper/util.c
@@ -40,3 +40,26 @@ int util_init(struct command_context *cmd_ctx)
 {
 	return register_commands(cmd_ctx, NULL, util_command_handlers);
 }
+
+bool is_memory_regions_overlap(target_addr_t start1,
+	unsigned int size1,
+	target_addr_t start2,
+	unsigned int  size2)
+{
+	/* Two memory regions: [S1,E1] and [S2,E2] where:
+	 * E1 = S1 + size1 - 1, E2 = S2 + size2 - 1
+	 *
+	 * After normalization:
+	 *  Region 1: [0, size1 - 1]
+	 *  Region 2: [start2 - start1, (start2 - start1) + size2 - 1]
+	 *
+	 * Intersection cases:
+	 *  1. Normalized region 2 wraps around 0 (unsigned overflow)
+	 *  2. Start of normalized region 2 is within region 1
+	 */
+	start2 -= start1;
+	target_addr_t end1 = size1 - 1;
+	target_addr_t end2 = start2 + size2 - 1;
+
+	return start2 > end2 || start2 <= end1;
+}
diff --git a/src/helper/util.h b/src/helper/util.h
index 3ccdc4fdf..c10135678 100644
--- a/src/helper/util.h
+++ b/src/helper/util.h
@@ -10,5 +10,7 @@
 struct command_context;
 
 int util_init(struct command_context *cmd_ctx);
+bool is_memory_regions_overlap(target_addr_t start1, unsigned int size1,
+		target_addr_t start2, unsigned int size2);
 
 #endif /* OPENOCD_HELPER_UTIL_H */
diff --git a/src/target/breakpoints.c b/src/target/breakpoints.c
index 753c343c5..d260009f5 100644
--- a/src/target/breakpoints.c
+++ b/src/target/breakpoints.c
@@ -16,6 +16,7 @@
 #include <helper/log.h>
 #include "breakpoints.h"
 #include "smp.h"
+#include "helper/util.h"
 
 enum breakpoint_watchpoint {
 	BREAKPOINT,
@@ -56,6 +57,13 @@ static int breakpoint_add_internal(struct target *target,
 				address, breakpoint->unique_id);
 			return ERROR_TARGET_DUPLICATE_BREAKPOINT;
 		}
+		if (type == BKPT_SOFT &&
+				is_memory_regions_overlap(address, length, breakpoint->address, breakpoint->length)) {
+			LOG_TARGET_ERROR(target, "Breakpoint intersects with another one at " TARGET_ADDR_FMT
+				" of length %u (BP %" PRIu32 ")", breakpoint->address,
+				breakpoint->length, breakpoint->unique_id);
+			return ERROR_TARGET_INTERSECT_BREAKPOINT;
+		}
 		breakpoint_p = &breakpoint->next;
 		breakpoint = breakpoint->next;
 	}
diff --git a/src/target/target.h b/src/target/target.h
index 94e6aa335..3e202ffa6 100644
--- a/src/target/target.h
+++ b/src/target/target.h
@@ -796,6 +796,7 @@ int target_profiling_default(struct target *target, uint32_t *samples, uint32_t
 #define ERROR_TARGET_SIZE_NOT_SUPPORTED  (-314)
 #define ERROR_TARGET_PACKING_NOT_SUPPORTED  (-315)
 #define ERROR_TARGET_HALTED_DO_RESUME  (-316)	/* used to workaround incorrect debug halt */
+#define ERROR_TARGET_INTERSECT_BREAKPOINT (-317)
 
 extern bool get_target_reset_nag(void);
 

-----------------------------------------------------------------------

Summary of changes:
 src/helper/util.c        | 23 +++++++++++++++++++++++
 src/helper/util.h        |  2 ++
 src/target/breakpoints.c |  8 ++++++++
 src/target/target.h      |  1 +
 4 files changed, 34 insertions(+)


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commit eef37df3aaeab98ac8df4ad6447680228d2a9772
Author: Antonio Borneo <bor...@gm...>
Date:   Wed Nov 5 14:45:29 2025 +0100

    target: cortex-m: defer cache identification on Cortex-M7 under reset
    
    On Cortex-M7 only, several registers in System Control Space (SCS)
    are not accessible when the CPU is under reset, generating a bus
    error.
    This causes OpenOCD to fail examining the CPU when the board reset
    button is pressed or when the flag 'connect_assert_srst' is used
    on 'reset_config' command.
    
    Introduce a deferred identification of the cache and run it during
    polling and at target halted (just in case of polling disabled).
    
    Change-Id: Ia5c582ae95f825c5fb8c2dcfb320142f7ac04a9f
    Signed-off-by: Antonio Borneo <bor...@gm...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/9232
    Reviewed-by: Tomas Vanek <va...@fb...>
    Tested-by: jenkins

diff --git a/src/target/armv7m_cache.c b/src/target/armv7m_cache.c
index cc0c9d140..f07ac142f 100644
--- a/src/target/armv7m_cache.c
+++ b/src/target/armv7m_cache.c
@@ -68,7 +68,7 @@ static struct armv7m_cache_size decode_ccsidr(uint32_t ccsidr)
 	return size;
 }
 
-int armv7m_identify_cache(struct target *target)
+static int armv7m_identify_cache_internal(struct target *target)
 {
 	struct armv7m_common *armv7m = target_to_armv7m(target);
 	struct armv7m_cache_common *cache = &armv7m->armv7m_cache;
@@ -191,6 +191,54 @@ int armv7m_identify_cache(struct target *target)
 	return ERROR_OK;
 }
 
+/*
+ * On Cortex-M7 only, when the CPU is kept in reset, several registers of the
+ * System Control Space (SCS) are not accessible and return bus error.
+ * The list of accessible registers is:
+ * - 0xE000ED00
+ * - 0xE000ED30
+ * - 0xE000EDF0 ... 0xE000EEFC
+ * - 0xE000EF40 ... 0xE000EF48
+ * - 0xE000EFD0 ... 0xE000EFFC
+ * This makes impossible detecting the cache during the reset.
+ * Use a deferred mechanism to detect the cache during polling or when the
+ * Cortex-M7 halts.
+ */
+int armv7m_identify_cache(struct target *target)
+{
+	struct cortex_m_common *cortex_m = target_to_cm(target);
+	struct armv7m_common *armv7m = target_to_armv7m(target);
+	struct armv7m_cache_common *cache = &armv7m->armv7m_cache;
+
+	if (cache->info_valid)
+		return ERROR_OK;
+
+	if (cortex_m->core_info->impl_part == CORTEX_M7_PARTNO
+			&& cortex_m->dcb_dhcsr & S_RESET_ST) {
+		cache->defer_identification = true;
+		return ERROR_OK;
+	}
+
+	return armv7m_identify_cache_internal(target);
+}
+
+int armv7m_deferred_identify_cache(struct target *target)
+{
+	struct armv7m_common *armv7m = target_to_armv7m(target);
+	struct armv7m_cache_common *cache = &armv7m->armv7m_cache;
+
+	if (cache->info_valid || !cache->defer_identification)
+		return ERROR_OK;
+
+	int retval = armv7m_identify_cache_internal(target);
+	if (retval != ERROR_OK)
+		return retval;
+
+	cache->defer_identification = false;
+
+	return ERROR_OK;
+}
+
 int armv7m_d_cache_flush(struct target *target, uint32_t address,
 	unsigned int length)
 {
@@ -250,6 +298,11 @@ int armv7m_handle_cache_info_command(struct command_invocation *cmd,
 		return ERROR_FAIL;
 	}
 
+	if (cache->defer_identification) {
+		command_print(cmd, "Cache not detected yet");
+		return ERROR_OK;
+	}
+
 	if (!cache->info_valid) {
 		command_print(cmd, "No cache detected");
 		return ERROR_OK;
diff --git a/src/target/armv7m_cache.h b/src/target/armv7m_cache.h
index 576bff8d6..e6d943209 100644
--- a/src/target/armv7m_cache.h
+++ b/src/target/armv7m_cache.h
@@ -38,6 +38,7 @@ struct armv7m_arch_cache {
 // common cache information
 struct armv7m_cache_common {
 	bool info_valid;
+	bool defer_identification;
 	bool has_i_cache;
 	bool has_d_u_cache;
 	unsigned int loc;					// level of coherency
@@ -47,6 +48,7 @@ struct armv7m_cache_common {
 };
 
 int armv7m_identify_cache(struct target *target);
+int armv7m_deferred_identify_cache(struct target *target);
 int armv7m_d_cache_flush(struct target *target, uint32_t address,
 	unsigned int length);
 int armv7m_i_cache_inval(struct target *target, uint32_t address,
diff --git a/src/target/cortex_m.c b/src/target/cortex_m.c
index d15575bd7..ea94f1242 100644
--- a/src/target/cortex_m.c
+++ b/src/target/cortex_m.c
@@ -876,6 +876,10 @@ static int cortex_m_debug_entry(struct target *target)
 	}
 
 	// read caches state
+	retval = armv7m_deferred_identify_cache(target);
+	if (retval != ERROR_OK)
+		return retval;
+
 	uint32_t ccr = 0;
 	if (armv7m->armv7m_cache.info_valid) {
 		retval = mem_ap_read_u32(armv7m->debug_ap, CCR, &ccr);
@@ -1018,6 +1022,10 @@ static int cortex_m_poll_one(struct target *target)
 
 		/* S_RESET_ST was expected (in a reset command). Continue processing
 		 * to quickly get out of TARGET_RESET state */
+	} else {
+		retval = armv7m_deferred_identify_cache(target);
+		if (retval != ERROR_OK)
+			return retval;
 	}
 
 	if (target->state == TARGET_RESET) {
@@ -2952,6 +2960,18 @@ int cortex_m_examine(struct target *target)
 		if (retval != ERROR_OK)
 			return retval;
 
+		/*
+		 * Use a safe value of sticky S_RESET_ST for cache detection, before
+		 * clearing it below.
+		 */
+		if (!armv7m->is_hla_target) {
+			retval = armv7m_identify_cache(target);
+			if (retval != ERROR_OK) {
+				LOG_ERROR("Cannot detect cache");
+				return retval;
+			}
+		}
+
 		/*  Don't cumulate sticky S_RESET_ST at the very first read of DHCSR
 		 *  as S_RESET_ST may indicate a reset that happened long time ago
 		 *  (most probably the power-on reset before OpenOCD was started).
@@ -3021,14 +3041,6 @@ int cortex_m_examine(struct target *target)
 		LOG_TARGET_INFO(target, "target has %d breakpoints, %d watchpoints",
 			cortex_m->fp_num_code,
 			cortex_m->dwt_num_comp);
-
-		if (!armv7m->is_hla_target) {
-			retval = armv7m_identify_cache(target);
-			if (retval != ERROR_OK) {
-				LOG_ERROR("Cannot detect cache");
-				return retval;
-			}
-		}
 	}
 
 	return ERROR_OK;

-----------------------------------------------------------------------

Summary of changes:
 src/target/armv7m_cache.c | 55 ++++++++++++++++++++++++++++++++++++++++++++++-
 src/target/armv7m_cache.h |  2 ++
 src/target/cortex_m.c     | 28 +++++++++++++++++-------
 3 files changed, 76 insertions(+), 9 deletions(-)


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- Log -----------------------------------------------------------------
commit 37dcf4359bd22025aaa809a8559b129ed6607195
Author: Tomas Vanek <va...@fb...>
Date:   Fri Nov 21 09:27:20 2025 +0100

    target/cortex_a: emit 'resumed' event for all SMP cores
    
    In a SMP configuration 'resumed' event was emitted only for
    the active core, in contradiction to 'halted' event, which
    gets emitted for all cores from the SMP group:
    
    > resume
    target event 3 (resume-start) for core stm32mp15x.cpu0
    target event 2 (resumed) for core stm32mp15x.cpu0
    target event 4 (resume-end) for core stm32mp15x.cpu0
    target event 7 (gdb-start) for core stm32mp15x.cpu0
    
    > halt
    target event 0 (gdb-halt) for core stm32mp15x.cpu1
    target event 1 (halted) for core stm32mp15x.cpu1
    target event 0 (gdb-halt) for core stm32mp15x.cpu0
    target event 1 (halted) for core stm32mp15x.cpu0
    target event 8 (gdb-end) for core stm32mp15x.cpu0
    
    Emit 'resumed' event in cortex_a_restore_smp().
    While on it replace adding the returned errors together
    with the proper error handling.
    
    Change-Id: I9debef0884519cde767707f78f163b136ecc7aa5
    Signed-off-by: Tomas Vanek <va...@fb...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/9244
    Reviewed-by: Antonio Borneo <bor...@gm...>
    Tested-by: jenkins

diff --git a/src/target/cortex_a.c b/src/target/cortex_a.c
index a9c034b55..3d8603a4b 100644
--- a/src/target/cortex_a.c
+++ b/src/target/cortex_a.c
@@ -968,7 +968,7 @@ static int cortex_a_internal_restart(struct target *target)
 
 static int cortex_a_restore_smp(struct target *target, bool handle_breakpoints)
 {
-	int retval = 0;
+	int retval = ERROR_OK;
 	struct target_list *head;
 	target_addr_t address;
 
@@ -977,9 +977,17 @@ static int cortex_a_restore_smp(struct target *target, bool handle_breakpoints)
 		if ((curr != target) && (curr->state != TARGET_RUNNING)
 			&& target_was_examined(curr)) {
 			/*  resume current address , not in step mode */
-			retval += cortex_a_internal_restore(curr, true, &address,
+			int retval2 = cortex_a_internal_restore(curr, true, &address,
 					handle_breakpoints, false);
-			retval += cortex_a_internal_restart(curr);
+
+			if (retval2 == ERROR_OK)
+				retval2 = cortex_a_internal_restart(curr);
+
+			if (retval2 == ERROR_OK)
+				target_call_event_callbacks(curr, TARGET_EVENT_RESUMED);
+
+			if (retval == ERROR_OK)
+				retval = retval2;	// save the first error
 		}
 	}
 	return retval;

-----------------------------------------------------------------------

Summary of changes:
 src/target/cortex_a.c | 14 +++++++++++---
 1 file changed, 11 insertions(+), 3 deletions(-)


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commit a1c7cd4fef95ef85dc87c6ebd66e3e3cc5dcda9d
Author: Marc Schink <de...@za...>
Date:   Mon Jul 14 07:01:58 2025 +0000

    flash/nor/stm32lx: Add 'option_load' command
    
    Add command to re-load option bytes.
    
    Tested with STM32L072CZ and STM32L152RCT6.
    
    Change-Id: I5653f2222a48af1fe0332d4bdc3552e481e375d0
    Signed-off-by: Marc Schink <de...@za...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/8998
    Tested-by: jenkins
    Reviewed-by: Tomas Vanek <va...@fb...>

diff --git a/doc/openocd.texi b/doc/openocd.texi
index 57f8703ad..09bbd3dd9 100644
--- a/doc/openocd.texi
+++ b/doc/openocd.texi
@@ -8422,6 +8422,12 @@ data). This is the only way to unlock a protected flash (unless RDP
 Level is 2 which can't be unlocked at all).
 The @var{num} parameter is a value shown by @command{flash banks}.
 @end deffn
+
+@deffn {Command} {stm32lx option_load} num
+Forces a re-load of the option byte registers.
+This command will cause a system reset of the device.
+The @var{num} parameter is a value shown by @command{flash banks}.
+@end deffn
 @end deffn
 
 @deffn {Flash Driver} {stm32l4x}
diff --git a/src/flash/nor/stm32lx.c b/src/flash/nor/stm32lx.c
index 2c7563e95..f0e8db5ba 100644
--- a/src/flash/nor/stm32lx.c
+++ b/src/flash/nor/stm32lx.c
@@ -90,6 +90,7 @@ static int stm32lx_lock_program_memory(struct flash_bank *bank);
 static int stm32lx_enable_write_half_page(struct flash_bank *bank);
 static int stm32lx_erase_sector(struct flash_bank *bank, int sector);
 static int stm32lx_wait_until_bsy_clear(struct flash_bank *bank);
+static int stm32lx_obl_launch(struct flash_bank *bank);
 static int stm32lx_lock(struct flash_bank *bank);
 static int stm32lx_unlock(struct flash_bank *bank);
 static int stm32lx_mass_erase(struct flash_bank *bank);
@@ -354,6 +355,26 @@ COMMAND_HANDLER(stm32lx_handle_unlock_command)
 	return retval;
 }
 
+COMMAND_HANDLER(stm32lx_handle_option_load_command)
+{
+	if (CMD_ARGC != 1)
+		return ERROR_COMMAND_SYNTAX_ERROR;
+
+	struct flash_bank *bank;
+	int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
+
+	if (retval != ERROR_OK)
+		return retval;
+
+	retval = stm32lx_obl_launch(bank);
+	if (retval != ERROR_OK) {
+		command_print(CMD, "failed to load option bytes");
+		return retval;
+	}
+
+	return ERROR_OK;
+}
+
 static int stm32lx_protect_check(struct flash_bank *bank)
 {
 	int retval;
@@ -921,6 +942,13 @@ static const struct command_registration stm32lx_exec_command_handlers[] = {
 		.usage = "bank_id",
 		.help = "Lower the readout protection from Level 1 to 0.",
 	},
+	{
+		.name = "option_load",
+		.handler = stm32lx_handle_option_load_command,
+		.mode = COMMAND_EXEC,
+		.usage = "bank_id",
+		.help = "Force re-load of device options (will cause device reset).",
+	},
 	COMMAND_REGISTRATION_DONE
 };
 
@@ -1238,7 +1266,10 @@ static int stm32lx_obl_launch(struct flash_bank *bank)
 {
 	struct target *target = bank->target;
 	struct stm32lx_flash_bank *stm32lx_info = bank->driver_priv;
-	int retval;
+
+	int retval = stm32lx_unlock_options_bytes(bank);
+	if (retval != ERROR_OK)
+		return retval;
 
 	/* This will fail as the target gets immediately rebooted */
 	target_write_u32(target, stm32lx_info->flash_base + FLASH_PECR,

-----------------------------------------------------------------------

Summary of changes:
 doc/openocd.texi        |  6 ++++++
 src/flash/nor/stm32lx.c | 33 ++++++++++++++++++++++++++++++++-
 2 files changed, 38 insertions(+), 1 deletion(-)


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- Log -----------------------------------------------------------------
commit 1ea763d23c2337374909170687e16d1c5b9d9e89
Author: Greg Savin <gre...@si...>
Date:   Mon Feb 7 09:28:31 2022 -0800

    rtos: server/gdb_server: fix missing thread ID in stop reply
    
    Cherry-picked from [1].
    
    To replicate the issue that this fixes:
    
    1. Connect to a multi-hart RISC-V target configured as an SMP group.
    2. Start a GDB instance against the running OpenOCD.
    3. Observe that GDB might display "warning: multi-threaded target
       stopped without sending a thread-id, using first non-exited thread."
    4. Set a breakpoint in code that any non-hart-0 hart is expected to
       reach (but hart 0 is not expected to reach).
    5. Allow a non-hart-0 hart to reach the breakpoint.
    6. Remove the breakpoint.
    7. Do a few sequential `stepi` commands in GDB.
    8. Observe that GDB displays "Switching to Thread 1" even though the
       thread that was just single stepped was not Thread 1 in GDB. Also
       observe that the register values in GDB correspond to the thread that
       was single-stepped, not Thread 1. Basically GDB erroneously starts to
       consider thread 1 to be current, when in fact the thread that was
       single-stepped is still current.
    
    The changes in this pull request are intended to avoid the erroneous
    "Switching to Thread 1" described in (8) above.
    
    What was happening was that, in a couple areas of code, non-hart-0 harts
    weren't seen as belonging to an RTOS module, and this had the effect of
    (1) bypassing `hwthread_update_threads()` being called after a halt; (2)
    omitting a thread ID in a stop reply over GDB remote protocol connection
    (requiring GDB to take an arbitrary guess of current thread id, a guess
    that is wrong unless the current thread happens to be hart 0).
    
    Link: https://github.com/riscv-collab/riscv-openocd/pull/675 [1]
    Change-Id: I9872062dfa0e3f1ca531d282d52a1b04c527546a
    Signed-off-by: Greg Savin <gre...@si...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/9183
    Tested-by: jenkins
    Reviewed-by: Tomas Vanek <va...@fb...>

diff --git a/src/rtos/rtos.c b/src/rtos/rtos.c
index 547314c0a..cc0e92edf 100644
--- a/src/rtos/rtos.c
+++ b/src/rtos/rtos.c
@@ -11,6 +11,7 @@
 
 #include "rtos.h"
 #include "target/target.h"
+#include "target/smp.h"
 #include "helper/log.h"
 #include "helper/binarybuffer.h"
 #include "helper/types.h"
@@ -715,10 +716,24 @@ int rtos_generic_stack_read(struct target *target,
 	return ERROR_OK;
 }
 
+struct rtos *rtos_from_target(struct target *target)
+{
+	if (target->rtos && target->rtos->type)
+		return target->rtos;
+
+	struct target_list *pos;
+	foreach_smp_target(pos, target->smp_targets)
+		if (pos->target->rtos && pos->target->rtos->type)
+			return pos->target->rtos;
+
+	return NULL;
+}
+
 int rtos_update_threads(struct target *target)
 {
-	if ((target->rtos) && (target->rtos->type))
-		target->rtos->type->update_threads(target->rtos);
+	struct rtos *rtos = rtos_from_target(target);
+	if (rtos)
+		rtos->type->update_threads(rtos);
 	return ERROR_OK;
 }
 
diff --git a/src/rtos/rtos.h b/src/rtos/rtos.h
index 2084739cf..17efccf0e 100644
--- a/src/rtos/rtos.h
+++ b/src/rtos/rtos.h
@@ -154,6 +154,11 @@ int rtos_write_buffer(struct target *target, target_addr_t address,
 bool rtos_needs_fake_step(struct target *target, int64_t thread_id);
 struct target *rtos_swbp_target(struct target *target, target_addr_t address,
 				uint32_t length, enum breakpoint_type type);
+/**
+ * Get the RTOS from the target itself, or from one of the targets in
+ * the same SMP node, or NULL when no RTOS is set.
+ */
+struct rtos *rtos_from_target(struct target *target);
 
 // Keep in alphabetic order this list of rtos
 extern const struct rtos_type chibios_rtos;
diff --git a/src/server/gdb_server.c b/src/server/gdb_server.c
index f09e4807e..a989bda57 100644
--- a/src/server/gdb_server.c
+++ b/src/server/gdb_server.c
@@ -813,9 +813,12 @@ static void gdb_signal_reply(struct target *target, struct connection *connectio
 		sig_reply_len = snprintf(sig_reply, sizeof(sig_reply), "W00");
 	} else {
 		struct target *ct;
-		if (target->rtos) {
-			target->rtos->current_threadid = target->rtos->current_thread;
-			target->rtos->gdb_target_for_threadid(connection, target->rtos->current_threadid, &ct);
+		struct rtos *rtos;
+
+		rtos = rtos_from_target(target);
+		if (rtos) {
+			rtos->current_threadid = rtos->current_thread;
+			rtos->gdb_target_for_threadid(connection, rtos->current_threadid, &ct);
 		} else {
 			ct = target;
 		}
@@ -853,9 +856,9 @@ static void gdb_signal_reply(struct target *target, struct connection *connectio
 		}
 
 		current_thread[0] = '\0';
-		if (target->rtos)
+		if (rtos)
 			snprintf(current_thread, sizeof(current_thread), "thread:%" PRIx64 ";",
-					target->rtos->current_thread);
+					rtos->current_thread);
 
 		sig_reply_len = snprintf(sig_reply, sizeof(sig_reply), "T%2.2x%s%s",
 				signal_var, stop_reason, current_thread);

-----------------------------------------------------------------------

Summary of changes:
 src/rtos/rtos.c         | 19 +++++++++++++++++--
 src/rtos/rtos.h         |  5 +++++
 src/server/gdb_server.c | 13 ++++++++-----
 3 files changed, 30 insertions(+), 7 deletions(-)


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- Log -----------------------------------------------------------------
commit 7b6496db7e1c41d62be944021f46543bbbfba4ae
Author: Tim Newsome <ti...@si...>
Date:   Mon Jan 31 09:23:38 2022 -0800

    rtos: server: target: ask the RTOS which target to set swbp on.
    
    This is the result of squashing two commits from RISC-V OpenOCD:
    - [1] ("Ask the RTOS which target to set swbp on. (#673)")
    - [2] ("Fix breackpoint_add for rtos swbp (#734)")
    
    The resulting change lets the RTOS pick the "current" target for setting
    the software breakpoint on, which matters if address translation differs
    between threads.
    
    Link: https://github.com/riscv-collab/riscv-openocd/commit/52ca5d198e3b [1]
    Link: https://github.com/riscv-collab/riscv-openocd/commit/8ae41e86e15d [2]
    Change-Id: I67ce24d6aa0ca9225436b380065d1e265424e70f
    Signed-off-by: Tim Newsome <ti...@si...>
    Signed-off-by: Evgeniy Naydanov <evg...@sy...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/9176
    Tested-by: jenkins
    Reviewed-by: Tomas Vanek <va...@fb...>

diff --git a/src/rtos/hwthread.c b/src/rtos/hwthread.c
index d4fc880f6..d422fac53 100644
--- a/src/rtos/hwthread.c
+++ b/src/rtos/hwthread.c
@@ -29,6 +29,8 @@ static int hwthread_read_buffer(struct rtos *rtos, target_addr_t address,
 static int hwthread_write_buffer(struct rtos *rtos, target_addr_t address,
 		uint32_t size, const uint8_t *buffer);
 static bool hwthread_needs_fake_step(struct target *target, int64_t thread_id);
+struct target *hwthread_swbp_target(struct rtos *rtos, target_addr_t address,
+				    uint32_t length, enum breakpoint_type type);
 
 #define HW_THREAD_NAME_STR_SIZE (32)
 
@@ -60,7 +62,8 @@ const struct rtos_type hwthread_rtos = {
 	.set_reg = hwthread_set_reg,
 	.read_buffer = hwthread_read_buffer,
 	.write_buffer = hwthread_write_buffer,
-	.needs_fake_step = hwthread_needs_fake_step
+	.needs_fake_step = hwthread_needs_fake_step,
+	.swbp_target = hwthread_swbp_target,
 };
 
 struct hwthread_params {
@@ -456,3 +459,9 @@ bool hwthread_needs_fake_step(struct target *target, int64_t thread_id)
 {
 	return false;
 }
+
+struct target *hwthread_swbp_target(struct rtos *rtos, target_addr_t address,
+				    uint32_t length, enum breakpoint_type type)
+{
+	return hwthread_find_thread(rtos->target, rtos->current_thread);
+}
diff --git a/src/rtos/rtos.c b/src/rtos/rtos.c
index 7957a5b6b..547314c0a 100644
--- a/src/rtos/rtos.c
+++ b/src/rtos/rtos.c
@@ -762,3 +762,11 @@ bool rtos_needs_fake_step(struct target *target, int64_t thread_id)
 		return target->rtos->type->needs_fake_step(target, thread_id);
 	return target->rtos->current_thread != thread_id;
 }
+
+struct target *rtos_swbp_target(struct target *target, target_addr_t address,
+				uint32_t length, enum breakpoint_type type)
+{
+	if (target->rtos->type->swbp_target)
+		return target->rtos->type->swbp_target(target->rtos, address, length, type);
+	return target;
+}
diff --git a/src/rtos/rtos.h b/src/rtos/rtos.h
index bbd1d1a1d..2084739cf 100644
--- a/src/rtos/rtos.h
+++ b/src/rtos/rtos.h
@@ -9,6 +9,7 @@
 #define OPENOCD_RTOS_RTOS_H
 
 #include "server/server.h"
+#include "target/breakpoints.h"
 #include "target/target.h"
 
 typedef int64_t threadid_t;
@@ -86,6 +87,12 @@ struct rtos_type {
 	 * target running a multi-threading OS. If an RTOS can do this, override
 	 * needs_fake_step(). */
 	bool (*needs_fake_step)(struct target *target, int64_t thread_id);
+	/* When a software breakpoint is set, it is set on only one target,
+	 * because we assume memory is shared across them. By default this is the
+	 * first target in the SMP group. Override this function to have
+	 * breakpoint_add() use a different target. */
+	struct target * (*swbp_target)(struct rtos *rtos, target_addr_t address,
+				     uint32_t length, enum breakpoint_type type);
 };
 
 struct stack_register_offset {
@@ -145,6 +152,8 @@ int rtos_read_buffer(struct target *target, target_addr_t address,
 int rtos_write_buffer(struct target *target, target_addr_t address,
 		uint32_t size, const uint8_t *buffer);
 bool rtos_needs_fake_step(struct target *target, int64_t thread_id);
+struct target *rtos_swbp_target(struct target *target, target_addr_t address,
+				uint32_t length, enum breakpoint_type type);
 
 // Keep in alphabetic order this list of rtos
 extern const struct rtos_type chibios_rtos;
diff --git a/src/server/gdb_server.c b/src/server/gdb_server.c
index 486080bbd..f09e4807e 100644
--- a/src/server/gdb_server.c
+++ b/src/server/gdb_server.c
@@ -1814,7 +1814,15 @@ static int gdb_breakpoint_watchpoint_packet(struct connection *connection,
 		case 0:
 		case 1:
 			if (packet[0] == 'Z') {
-				retval = breakpoint_add(target, address, size, bp_type);
+				struct target *bp_target = target;
+				if (target->rtos && bp_type == BKPT_SOFT) {
+					bp_target = rtos_swbp_target(target, address, size, bp_type);
+					if (!bp_target) {
+						retval = ERROR_FAIL;
+						break;
+					}
+				}
+				retval = breakpoint_add(bp_target, address, size, bp_type);
 			} else {
 				assert(packet[0] == 'z');
 				retval = breakpoint_remove(target, address);
diff --git a/src/target/breakpoints.c b/src/target/breakpoints.c
index fa6b635f0..753c343c5 100644
--- a/src/target/breakpoints.c
+++ b/src/target/breakpoints.c
@@ -210,16 +210,10 @@ int breakpoint_add(struct target *target,
 	unsigned int length,
 	enum breakpoint_type type)
 {
-	if (target->smp) {
-		struct target_list *head;
-
-		if (type == BKPT_SOFT) {
-			head = list_first_entry(target->smp_targets, struct target_list, lh);
-			return breakpoint_add_internal(head->target, address, length, type);
-		}
-
-		foreach_smp_target(head, target->smp_targets) {
-			struct target *curr = head->target;
+	if (target->smp && type == BKPT_HARD) {
+		struct target_list *list_node;
+		foreach_smp_target(list_node, target->smp_targets) {
+			struct target *curr = list_node->target;
 			int retval = breakpoint_add_internal(curr, address, length, type);
 			if (retval != ERROR_OK)
 				return retval;

-----------------------------------------------------------------------

Summary of changes:
 src/rtos/hwthread.c      | 11 ++++++++++-
 src/rtos/rtos.c          |  8 ++++++++
 src/rtos/rtos.h          |  9 +++++++++
 src/server/gdb_server.c  | 10 +++++++++-
 src/target/breakpoints.c | 14 ++++----------
 5 files changed, 40 insertions(+), 12 deletions(-)


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commit 7487fade751a70fe58f5ba106abc4ed5ecda8a8e
Author: NikLeberg <nik...@gm...>
Date:   Mon Aug 11 13:19:08 2025 +0200

    jtag/drivers/jtag_dpi: fix wraparound bug in runtest
    
    Commit 0847a4d7fb98 ("jtag/commands: Use 'unsigned int' data type")
    introduced bug when changing loop variable from `int` to `unsigned int`.
    Instead of getting negative and terminating the loop, the value wraps
    around to `INT_MAX` and the loop never finishes.
    
    Change-Id: I055025a1f8eb4abe50955607b3e89530dfd92af4
    Signed-off-by: NikLeberg <nik...@gm...>
    Fixes: 0847a4d7fb98 ("jtag/commands: Use 'unsigned int' data type")
    Reviewed-on: https://review.openocd.org/c/openocd/+/9078
    Reviewed-by: Evgeniy Naydanov <eu...@gm...>
    Reviewed-by: zapb <de...@za...>
    Tested-by: jenkins
    Reviewed-by: Antonio Borneo <bor...@gm...>

diff --git a/src/jtag/drivers/jtag_dpi.c b/src/jtag/drivers/jtag_dpi.c
index d6418d39c..35dd24507 100644
--- a/src/jtag/drivers/jtag_dpi.c
+++ b/src/jtag/drivers/jtag_dpi.c
@@ -189,7 +189,7 @@ static int jtag_dpi_runtest(unsigned int num_cycles)
 		return ERROR_FAIL;
 	}
 	snprintf(buf, sizeof(buf), "ib %d\n", num_bits);
-	while (num_cycles > 0) {
+	for (unsigned int cycle = 0; cycle < num_cycles; cycle += num_bits + 6) {
 		ret = write_sock(buf, strlen(buf));
 		if (ret != ERROR_OK) {
 			LOG_ERROR("write_sock() fail, file %s, line %d",
@@ -208,8 +208,6 @@ static int jtag_dpi_runtest(unsigned int num_cycles)
 				__FILE__, __LINE__);
 			goto out;
 		}
-
-		num_cycles -= num_bits + 6;
 	}
 
 out:

-----------------------------------------------------------------------

Summary of changes:
 src/jtag/drivers/jtag_dpi.c | 4 +---
 1 file changed, 1 insertion(+), 3 deletions(-)


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- Log -----------------------------------------------------------------
commit 461af9b3abd1aeb94f047f990074b7e5d954fbea
Author: Erhan Kurubas <erh...@es...>
Date:   Mon Oct 24 18:08:35 2022 +0200

    rtt/tcl: fix format specifiers
    
    Format specifier in the LOG_XXX calls replaced as below;
    type      old  new
    uint32_t  %u   %PRIu32
    
    Signed-off-by: Erhan Kurubas <erh...@es...>
    Change-Id: Ie351a63088c63f33467ad3c854167870bc1b4843
    Reviewed-on: https://review.openocd.org/c/openocd/+/7286
    Tested-by: jenkins
    Reviewed-by: Antonio Borneo <bor...@gm...>

diff --git a/src/rtt/tcl.c b/src/rtt/tcl.c
index bae71b6ce..beb12d90d 100644
--- a/src/rtt/tcl.c
+++ b/src/rtt/tcl.c
@@ -117,7 +117,7 @@ COMMAND_HANDLER(handle_rtt_channels_command)
 
 	ctrl = rtt_get_control();
 
-	command_print(CMD, "Channels: up=%u, down=%u", ctrl->num_up_channels,
+	command_print(CMD, "Channels: up=%" PRIu32 ", down=%" PRIu32, ctrl->num_up_channels,
 		ctrl->num_down_channels);
 
 	command_print(CMD, "Up-channels:");
@@ -134,7 +134,7 @@ COMMAND_HANDLER(handle_rtt_channels_command)
 		if (!info.size)
 			continue;
 
-		command_print(CMD, "%u: %s %u %u", i, info.name, info.size,
+		command_print(CMD, "%u: %s %" PRIu32 " %" PRIu32, i, info.name, info.size,
 			info.flags);
 	}
 
@@ -149,7 +149,7 @@ COMMAND_HANDLER(handle_rtt_channels_command)
 		if (!info.size)
 			continue;
 
-		command_print(CMD, "%u: %s %u %u", i, info.name, info.size,
+		command_print(CMD, "%u: %s %" PRIu32 " %" PRIu32, i, info.name, info.size,
 			info.flags);
 	}
 

-----------------------------------------------------------------------

Summary of changes:
 src/rtt/tcl.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)


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- Log -----------------------------------------------------------------
commit aa6a07108643acc1762efa34ea39c6421389b66b
Author: Mark Zhuang <mar...@sp...>
Date:   Fri Oct 25 14:45:06 2024 +0800

    doc:style: do not use multiple empty lines
    
    Enable LINE_SPACING but only check multiple blank lines now
    
    Change-Id: I332d4d414a04eec8fc54b49d416a954d30592219
    Signed-off-by: Mark Zhuang <mar...@sp...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/8365
    Reviewed-by: zapb <de...@za...>
    Reviewed-by: Jan Matyas <jan...@co...>
    Tested-by: jenkins
    Reviewed-by: Antonio Borneo <bor...@gm...>

diff --git a/.checkpatch.conf b/.checkpatch.conf
index 01be7a909..b95dbe271 100644
--- a/.checkpatch.conf
+++ b/.checkpatch.conf
@@ -14,7 +14,6 @@
 --ignore ENOSYS
 --ignore FILE_PATH_CHANGES
 --ignore GERRIT_CHANGE_ID
---ignore LINE_SPACING
 --ignore LOGICAL_CONTINUATIONS
 --ignore MACRO_WITH_FLOW_CONTROL
 --ignore PARENTHESIS_ALIGNMENT
diff --git a/doc/manual/style.txt b/doc/manual/style.txt
index fa08f4de9..e8a375cdd 100644
--- a/doc/manual/style.txt
+++ b/doc/manual/style.txt
@@ -45,7 +45,7 @@ OpenOCD project.
 - use TAB characters for indentation; do NOT use spaces.
 - displayed TAB width is 4 characters.
 - use Unix line endings ('\\n'); do NOT use DOS endings ('\\r\\n')
-- limit adjacent empty lines to at most two (2).
+- do NOT use multiple empty lines.
 - remove any trailing empty lines at the end of source files
 - do not "comment out" code from the tree nor put it within a block
   @code
diff --git a/tools/scripts/checkpatch.pl b/tools/scripts/checkpatch.pl
index 1011b3305..89f0a2178 100755
--- a/tools/scripts/checkpatch.pl
+++ b/tools/scripts/checkpatch.pl
@@ -4040,6 +4040,7 @@ sub process {
 			}
 		}
 
+if (!$OpenOCD) {
 # check for missing blank lines after struct/union declarations
 # with exceptions for various attributes and macros
 		if ($prevline =~ /^[\+ ]};?\s*$/ &&
@@ -4059,6 +4060,7 @@ sub process {
 				fix_insert_line($fixlinenr, "\+");
 			}
 		}
+} # !$OpenOCD
 
 # check for multiple consecutive blank lines
 		if ($prevline =~ /^[\+ ]\s*$/ &&
@@ -4073,6 +4075,7 @@ sub process {
 			$last_blank_line = $linenr;
 		}
 
+if (!$OpenOCD) {
 # check for missing blank lines after declarations
 # (declarations must have the same indentation and not be at the start of line)
 		if (($prevline =~ /\+(\s+)\S/) && $sline =~ /^\+$1\S/) {
@@ -4118,6 +4121,7 @@ sub process {
 				}
 			}
 		}
+} # !$OpenOCD
 
 # check for spaces at the beginning of a line.
 # Exceptions:

-----------------------------------------------------------------------

Summary of changes:
 .checkpatch.conf            | 1 -
 doc/manual/style.txt        | 2 +-
 tools/scripts/checkpatch.pl | 4 ++++
 3 files changed, 5 insertions(+), 2 deletions(-)


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- Log -----------------------------------------------------------------
commit cd41947febbeb908e2c0dbf6c3c0e74d799da6c0
Author: Tomas Vanek <va...@fb...>
Date:   Mon Nov 3 17:33:12 2025 +0100

    target/cortex_a: fix HW breakpoint length for gdb kind 3
    
    Gdb uses length 3 to set breakpoint on a 4 byte Thumb-2
    instruction. Without this patch a breakpoint on down aligned word
    address was set. If the requested address was not word aligned,
    the breakpoint triggered at previous instruction and was not
    recognised properly by gdb.
    
    Set breakpoint on whole word if aligns with requested address,
    otherwise use length 2 and set byte mask.
    
    Change-Id: I12d1c57b7154e64abdf23dd7cd31714f9d8ec6f0
    Signed-off-by: Tomas Vanek <va...@fb...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/9211
    Tested-by: jenkins
    Reviewed-by: Antonio Borneo <bor...@gm...>

diff --git a/src/target/cortex_a.c b/src/target/cortex_a.c
index 016ea175c..a9c034b55 100644
--- a/src/target/cortex_a.c
+++ b/src/target/cortex_a.c
@@ -54,6 +54,7 @@
 #include <helper/bits.h>
 #include <helper/nvp.h>
 #include <helper/time_support.h>
+#include <helper/align.h>
 
 static int cortex_a_poll(struct target *target);
 static int cortex_a_debug_entry(struct target *target);
@@ -1341,6 +1342,14 @@ static int cortex_a_set_breakpoint(struct target *target,
 			return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
 		}
 		breakpoint_hw_set(breakpoint, brp_i);
+		if (breakpoint->length == 3) {
+			/* Thumb-2 breakpoint: fixup to length 4 if word aligned,
+			 * set byte mask for length 2 if unaligned */
+			if (IS_ALIGNED(breakpoint->address, 4))
+				breakpoint->length = 4;
+			else
+				breakpoint->length = 2;
+		}
 		if (breakpoint->length == 2)
 			byte_addr_select = (3 << (breakpoint->address & 0x02));
 		control = ((matchmode & 0x7) << 20)

-----------------------------------------------------------------------

Summary of changes:
 src/target/cortex_a.c | 9 +++++++++
 1 file changed, 9 insertions(+)


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- Log -----------------------------------------------------------------
commit a247ff122380a6a6e14878b462785fc209f875b0
Author: Tomas Vanek <va...@fb...>
Date:   Mon Nov 3 11:07:31 2025 +0100

    target, breakpoints: report hit watchpoint in trivial case
    
    Some targets have no means to find out which watchpoint triggered
    the debug halt. Resolve properly the trivial and most used case
    when only one watchpoint is set.
    
    Change-Id: I683933ec43e6ca0fed84a08a2aa222ed8a6e277f
    Signed-off-by: Tomas Vanek <va...@fb...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/9210
    Reviewed-by: Antonio Borneo <bor...@gm...>
    Tested-by: jenkins

diff --git a/src/target/breakpoints.c b/src/target/breakpoints.c
index d65e5594f..fa6b635f0 100644
--- a/src/target/breakpoints.c
+++ b/src/target/breakpoints.c
@@ -629,6 +629,20 @@ int watchpoint_hit(struct target *target, enum watchpoint_rw *rw,
 	struct watchpoint *hit_watchpoint;
 
 	retval = target_hit_watchpoint(target, &hit_watchpoint);
+	if (retval == ERROR_NOT_IMPLEMENTED
+			&& target->debug_reason == DBG_REASON_WATCHPOINT) {
+		// Handle the trivial case: only one watchpoint is set
+		unsigned int cnt = 0;
+		struct watchpoint *wp = target->watchpoints;
+		while (wp) {
+			cnt++;
+			wp = wp->next;
+		}
+		if (cnt == 1) {
+			retval = ERROR_OK;
+			hit_watchpoint = target->watchpoints;
+		}
+	}
 	if (retval != ERROR_OK)
 		return ERROR_FAIL;
 
diff --git a/src/target/target.c b/src/target/target.c
index 3d807ba35..ababa57fb 100644
--- a/src/target/target.c
+++ b/src/target/target.c
@@ -1360,9 +1360,9 @@ int target_hit_watchpoint(struct target *target,
 
 	if (!target->type->hit_watchpoint) {
 		/* For backward compatible, if hit_watchpoint is not implemented,
-		 * return ERROR_FAIL such that gdb_server will not take the nonsense
+		 * return error such that gdb_server will not take the nonsense
 		 * information. */
-		return ERROR_FAIL;
+		return ERROR_NOT_IMPLEMENTED;
 	}
 
 	return target->type->hit_watchpoint(target, hit_watchpoint);

-----------------------------------------------------------------------

Summary of changes:
 src/target/breakpoints.c | 14 ++++++++++++++
 src/target/target.c      |  4 ++--
 2 files changed, 16 insertions(+), 2 deletions(-)


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- Log -----------------------------------------------------------------
commit 5ff384be086a82e05901f37e07d16ab2b585c4c8
Author: Kulyatskaya Alexandra <a.k...@sy...>
Date:   Mon Oct 6 23:19:56 2025 +0300

    semihosting: fix memory leak and double free
    
    Resolve two problems that occurred when working with semihosting service
    through multiple connection cycles (connect-disconnect-reconnect):
    
    1) Double free:
        When the same service handles multiple connections sequentially,
        the same memory gets freed repeatedly, because function
        'semihosting_service_connection_closed_handler()' incorrectly frees
        service->priv->name on every connection closure.
    
    2) Memory leak:
        Function 'free_services()' misses service->priv->name cleanup for
        semihosting redirection. Memory remains allocated after service
        destruction.
    
    The solution introduces a new 'dtor()' field in the service structure
    that is called exactly once during free_service() execution.
    
    To reproduce the issue, you can do the following:
        1. openocd -f target.cfg -c init -c 'arm semihosting enable' -c
        'arm semihosting_redirect tcp 4445'
    
        # in another terminal
        2. nc localhost 4445
        3. Ctr+C
        4. nc localhost 4445
        5. Ctr+C
    
    Change-Id: I0dc8021cc3e21c5af619c71a1821a1afe9bffe78
    Signed-off-by: Kulyatskaya Alexandra <a.k...@sy...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/9196
    Tested-by: jenkins
    Reviewed-by: Evgeniy Naydanov <eu...@gm...>
    Reviewed-by: Antonio Borneo <bor...@gm...>

diff --git a/src/server/server.c b/src/server/server.c
index 5f6bb584e..494fd9da3 100644
--- a/src/server/server.c
+++ b/src/server/server.c
@@ -161,7 +161,8 @@ static int remove_connection(struct service *service, struct connection *connect
 	/* find connection */
 	while ((c = *p)) {
 		if (c->fd == connection->fd) {
-			service->connection_closed(c);
+			if (service->connection_closed)
+				service->connection_closed(c);
 			if (service->type == CONNECTION_TCP)
 				close_socket(c->fd);
 			else if (service->type == CONNECTION_PIPE) {
@@ -190,8 +191,13 @@ static int remove_connection(struct service *service, struct connection *connect
 
 static void free_service(struct service *c)
 {
+	if (c->type == CONNECTION_PIPE && c->fd != -1)
+		close(c->fd);
+	if (c->service_dtor)
+		c->service_dtor(c);
 	free(c->name);
 	free(c->port);
+	free(c->priv);
 	free(c);
 }
 
@@ -214,6 +220,7 @@ int add_service(const struct service_driver *driver, const char *port,
 	c->input = driver->input_handler;
 	c->connection_closed = driver->connection_closed_handler;
 	c->keep_client_alive = driver->keep_client_alive_handler;
+	c->service_dtor = driver->service_dtor_handler;
 	c->priv = priv;
 	c->next = NULL;
 	long portnumber;
@@ -390,18 +397,7 @@ static int remove_services(void)
 		struct service *next = c->next;
 
 		remove_connections(c);
-
-		free(c->name);
-
-		if (c->type == CONNECTION_PIPE) {
-			if (c->fd != -1)
-				close(c->fd);
-		}
-		free(c->port);
-		free(c->priv);
-		/* delete service */
-		free(c);
-
+		free_service(c);
 		/* remember the last service for unlinking */
 		c = next;
 	}
diff --git a/src/server/server.h b/src/server/server.h
index ea1e94ec5..393dba769 100644
--- a/src/server/server.h
+++ b/src/server/server.h
@@ -58,6 +58,7 @@ struct service_driver {
 	int (*new_connection_handler)(struct connection *connection);
 	/** callback to handle incoming data */
 	int (*input_handler)(struct connection *connection);
+	void (*service_dtor_handler)(struct service *service);
 	/** callback to tear down the connection */
 	int (*connection_closed_handler)(struct connection *connection);
 	/** called periodically to send keep-alive messages on the connection */
@@ -76,6 +77,7 @@ struct service {
 	int (*new_connection_during_keep_alive)(struct connection *connection);
 	int (*new_connection)(struct connection *connection);
 	int (*input)(struct connection *connection);
+	void (*service_dtor)(struct service *service);
 	int (*connection_closed)(struct connection *connection);
 	void (*keep_client_alive)(struct connection *connection);
 	void *priv;
diff --git a/src/target/semihosting_common.c b/src/target/semihosting_common.c
index ef96f064e..345e542c3 100644
--- a/src/target/semihosting_common.c
+++ b/src/target/semihosting_common.c
@@ -1800,13 +1800,12 @@ static int semihosting_service_input_handler(struct connection *connection)
 	return ERROR_OK;
 }
 
-static int semihosting_service_connection_closed_handler(struct connection *connection)
+static void semihosting_service_dtor_handler(struct service *service)
 {
-	struct semihosting_tcp_service *service = connection->service->priv;
-	if (service)
-		free(service->name);
+	struct semihosting_tcp_service *service_priv = service->priv;
+	if (service_priv)
+		free(service_priv->name);
 
-	return ERROR_OK;
 }
 
 static void semihosting_tcp_close_cnx(struct semihosting *semihosting)
@@ -1825,7 +1824,8 @@ static const struct service_driver semihosting_service_driver = {
 	.new_connection_during_keep_alive_handler = NULL,
 	.new_connection_handler = semihosting_service_new_connection_handler,
 	.input_handler = semihosting_service_input_handler,
-	.connection_closed_handler = semihosting_service_connection_closed_handler,
+	.service_dtor_handler = semihosting_service_dtor_handler,
+	.connection_closed_handler = NULL,
 	.keep_client_alive_handler = NULL,
 };
 

-----------------------------------------------------------------------

Summary of changes:
 src/server/server.c             | 22 +++++++++-------------
 src/server/server.h             |  2 ++
 src/target/semihosting_common.c | 12 ++++++------
 3 files changed, 17 insertions(+), 19 deletions(-)


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- Log -----------------------------------------------------------------
commit 55e916050981af472c1749b8cbb0e4940ba26273
Author: Marc Schink <de...@za...>
Date:   Sun Jul 13 19:56:55 2025 +0000

    flash/nor/stm32h7x: Change 'option_read' output
    
    Remove the verbose command output to enable processing with Tcl.
    
    Change-Id: Ic552747b78e4c095a267275e0affd3b9643657b4
    Signed-off-by: Marc Schink <de...@za...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/9001
    Tested-by: jenkins
    Reviewed-by: Antonio Borneo <bor...@gm...>

diff --git a/src/flash/nor/stm32h7x.c b/src/flash/nor/stm32h7x.c
index e9096a54e..c91ab5160 100644
--- a/src/flash/nor/stm32h7x.c
+++ b/src/flash/nor/stm32h7x.c
@@ -1237,10 +1237,9 @@ COMMAND_HANDLER(stm32h7_handle_option_read_command)
 	if (retval != ERROR_OK)
 		return retval;
 
-	command_print(CMD, "Option Register: <0x%" PRIx32 "> = 0x%" PRIx32,
-			stm32h7_get_flash_reg(bank, reg_offset), value);
+	command_print(CMD, "0x%" PRIx32, value);
 
-	return retval;
+	return ERROR_OK;
 }
 
 COMMAND_HANDLER(stm32h7_handle_option_write_command)

-----------------------------------------------------------------------

Summary of changes:
 src/flash/nor/stm32h7x.c | 5 ++---
 1 file changed, 2 insertions(+), 3 deletions(-)


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commit dc187298ea70a8895f8781833dd9036730d33ce5
Author: Tomas Vanek <va...@fb...>
Date:   Mon Oct 20 16:01:04 2025 +0200

    target/cortex_m: do not expose BASEPRI and FAULTMASK registers
    
    on ARMv6M variants (mainly Cortex-M0 and Cortex-M0+) and
    on ARMv8M baseline (e.g.Cortex-M23). The devices do not have
    BASEPRI and FAULTMASK functionally implemented and the corresponding
    register bits are just read as zero, write ignored.
    
    ARMv6-M Architecture Reference Manual:
    
    Table D3-2 Programmers’ model feature comparison
    
    Reduced exception priority management: PRIMASK
    special-purpose register. No support for changing the
    priority of configurable exceptions when they are active.
    
    Armv8-M Architecture Reference Manual:
    
    B3.32 Special-purpose mask registers, PRIMASK, BASEPRI, FAULTMASK,
          for configurable priority boosting
    
    A PE without the Main Extension implements PRIMASK, but does not
    implement FAULTMASK and BASEPRI.
    
    Change-Id: I332cc79718852c0109148817a214a2657960370b
    Signed-off-by: Tomas Vanek <va...@fb...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/9174
    Tested-by: jenkins
    Reviewed-by: zapb <de...@za...>
    Reviewed-by: Antonio Borneo <bor...@gm...>

diff --git a/src/target/cortex_m.c b/src/target/cortex_m.c
index 9f0b6284b..d15575bd7 100644
--- a/src/target/cortex_m.c
+++ b/src/target/cortex_m.c
@@ -2887,7 +2887,7 @@ int cortex_m_examine(struct target *target)
 		if (armv7m->fp_feature != FPV5_MVE_F && armv7m->fp_feature != FPV5_MVE_I)
 			armv7m->arm.core_cache->reg_list[ARMV8M_VPR].exist = false;
 
-		if (cortex_m->core_info->arch == ARM_ARCH_V8M) {
+		if (armv7m->arm.arch == ARM_ARCH_V8M) {
 			bool cm_has_tz = cortex_m_has_tz(target);
 			bool main_ext = cortex_m_main_extension(target, cpuid);
 			bool baseline = !main_ext;
@@ -2908,6 +2908,11 @@ int cortex_m_examine(struct target *target)
 					armv7m->arm.core_cache->reg_list[ARMV8M_PSPLIM_NS].exist = false;
 					armv7m->arm.core_cache->reg_list[ARMV8M_MSPLIM].exist = false;
 					armv7m->arm.core_cache->reg_list[ARMV8M_PSPLIM].exist = false;
+
+					armv7m->arm.core_cache->reg_list[ARMV8M_BASEPRI_S].exist = false;
+					armv7m->arm.core_cache->reg_list[ARMV8M_FAULTMASK_S].exist = false;
+					armv7m->arm.core_cache->reg_list[ARMV8M_BASEPRI_NS].exist = false;
+					armv7m->arm.core_cache->reg_list[ARMV8M_FAULTMASK_NS].exist = false;
 				} else {
 					/* There is no separate regsel for msplim/psplim of ARMV8M mainline
 					with the security extension that would point to correct alias
@@ -2917,6 +2922,11 @@ int cortex_m_examine(struct target *target)
 					armv7m->arm.core_cache->reg_list[ARMV8M_PSPLIM].exist = false;
 				}
 			}
+
+			if (baseline) {
+				armv7m->arm.core_cache->reg_list[ARMV7M_BASEPRI].exist = false;
+				armv7m->arm.core_cache->reg_list[ARMV7M_FAULTMASK].exist = false;
+			}
 		} else {
 			/* Security extension and stack limit checking introduced in ARMV8M */
 			for (size_t idx = ARMV8M_TZ_FIRST_REG; idx <= ARMV8M_TZ_LAST_REG; idx++)
@@ -2924,6 +2934,11 @@ int cortex_m_examine(struct target *target)
 
 			armv7m->arm.core_cache->reg_list[ARMV8M_MSPLIM].exist = false;
 			armv7m->arm.core_cache->reg_list[ARMV8M_PSPLIM].exist = false;
+
+			if (armv7m->arm.arch == ARM_ARCH_V6M) {
+				armv7m->arm.core_cache->reg_list[ARMV7M_BASEPRI].exist = false;
+				armv7m->arm.core_cache->reg_list[ARMV7M_FAULTMASK].exist = false;
+			}
 		}
 
 		if (!armv7m->is_hla_target) {

-----------------------------------------------------------------------

Summary of changes:
 src/target/cortex_m.c | 17 ++++++++++++++++-
 1 file changed, 16 insertions(+), 1 deletion(-)


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- Log -----------------------------------------------------------------
commit 23fc7e9c960a6e462a21750fb31b99ebe8e11099
Author: Antonio Borneo <bor...@gm...>
Date:   Sat Oct 25 16:15:03 2025 +0200

    target: semihosting: refresh URI to semihosting documentation
    
    Some link if not anymore accessible.
    Replace them with current one and add a backup in case one gets
    not accessible anymore.
    
    Change-Id: Iffca714555e94e5322a5daac1ea756e36bbd3a8f
    Signed-off-by: Antonio Borneo <bor...@gm...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/9188
    Tested-by: jenkins

diff --git a/doc/openocd.texi b/doc/openocd.texi
index 63d07533e..57f8703ad 100644
--- a/doc/openocd.texi
+++ b/doc/openocd.texi
@@ -1193,9 +1193,10 @@ monitor mode debug, only "halt mode" debug.}
 @cindex ARM semihosting
 When linked with a special runtime library provided with many
 toolchains@footnote{See chapter 8 "Semihosting" in
-@uref{http://infocenter.arm.com/help/topic/com.arm.doc.dui0203i/DUI0203I_rvct_developer_guide.pdf,
-ARM DUI 0203I}, the "RealView Compilation Tools Developer Guide".
-The CodeSourcery EABI toolchain also includes a semihosting library.},
+@uref{https://developer.arm.com/documentation/dui0203/latest/semihosting,
+ARM DUI 0203}.
+A semihosting library if available in newlib/libgloss, in U-Boot,
+in the CodeSourcery EABI toolchain, and others.},
 your target code can use I/O facilities on the debug host. That library
 provides a small set of system calls which are handled by OpenOCD.
 It can let the debugger provide your system console and a file system,
diff --git a/src/target/arm_semihosting.c b/src/target/arm_semihosting.c
index a7c47bf41..ea5f756d6 100644
--- a/src/target/arm_semihosting.c
+++ b/src/target/arm_semihosting.c
@@ -22,7 +22,11 @@
  * facilities on the host computer. The target application must be linked
  * against a library that forwards operation requests by using the SVC
  * instruction trapped at the Supervisor Call vector by the debugger.
- * Details can be found in chapter 8 of DUI0203I_rvct_developer_guide.pdf
+ * Details can be found in
+ * "Semihosting for AArch32 and AArch64, 2025Q1"
+ * https://github.com/ARM-software/abi-aa/releases/download/2025Q1/semihosting.pdf
+ * and in
+ * https://developer.arm.com/documentation/dui0203/latest/semihosting
  * from ARM Ltd.
  */
 
diff --git a/src/target/semihosting_common.c b/src/target/semihosting_common.c
index 5f8ab1082..ef96f064e 100644
--- a/src/target/semihosting_common.c
+++ b/src/target/semihosting_common.c
@@ -24,8 +24,10 @@
  * instruction trapped by the debugger.
  *
  * Details can be found in
- * "Semihosting for AArch32 and AArch64, Release 2.0"
- * https://static.docs.arm.com/100863/0200/semihosting.pdf
+ * "Semihosting for AArch32 and AArch64, 2025Q1"
+ * https://github.com/ARM-software/abi-aa/releases/download/2025Q1/semihosting.pdf
+ * and in
+ * https://developer.arm.com/documentation/dui0203/latest/semihosting
  * from ARM Ltd.
  */
 
diff --git a/src/target/semihosting_common.h b/src/target/semihosting_common.h
index 1821ca4e2..ecf38d62a 100644
--- a/src/target/semihosting_common.h
+++ b/src/target/semihosting_common.h
@@ -19,8 +19,10 @@
 
 /*
  * According to:
- * "Semihosting for AArch32 and AArch64, Release 2.0"
- * https://static.docs.arm.com/100863/0200/semihosting.pdf
+ * "Semihosting for AArch32 and AArch64, 2025Q1"
+ * https://github.com/ARM-software/abi-aa/releases/download/2025Q1/semihosting.pdf
+ * and to:
+ * https://developer.arm.com/documentation/dui0203/latest/semihosting/about-semihosting/the-semihosting-interface
  * from ARM Ltd.
  *
  * The available semihosting operation numbers passed in R0 are allocated

-----------------------------------------------------------------------

Summary of changes:
 doc/openocd.texi                | 7 ++++---
 src/target/arm_semihosting.c    | 6 +++++-
 src/target/semihosting_common.c | 6 ++++--
 src/target/semihosting_common.h | 6 ++++--
 4 files changed, 17 insertions(+), 8 deletions(-)


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- Log -----------------------------------------------------------------
commit 709e635b39235de2b97b03616003b3d845be36f4
Author: Antonio Borneo <bor...@gm...>
Date:   Sun Nov 16 19:00:54 2025 +0100

    helper: command: use COMMAND_HELPER for converted functions
    
    Use COMMAND_HELPER for command_help_show_indent() and
    command_help_show_wrap().
    
    Change-Id: Ied0d5d3e1b702524dad0274cc12d146c6032a036
    Signed-off-by: Antonio Borneo <bor...@gm...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/9238
    Tested-by: jenkins
    Reviewed-by: Evgeniy Naydanov <eu...@gm...>

diff --git a/src/helper/command.c b/src/helper/command.c
index 867a84013..6b5337f42 100644
--- a/src/helper/command.c
+++ b/src/helper/command.c
@@ -679,12 +679,15 @@ static COMMAND_HELPER(command_help_show_list, bool show_help, const char *cmd_ma
 
 #define HELP_LINE_WIDTH(_n) (int)(76 - (2 * _n))
 
-static void command_help_show_indent(struct command_invocation *cmd, unsigned int n)
+static COMMAND_HELPER(command_help_show_indent, unsigned int n)
 {
 	for (unsigned int i = 0; i < n; i++)
-		command_print_sameline(cmd, "  ");
+		command_print_sameline(CMD, "  ");
+
+	return ERROR_OK;
 }
-static void command_help_show_wrap(struct command_invocation *cmd,
+
+static COMMAND_HELPER(command_help_show_wrap,
 	const char *str, unsigned int n, unsigned int n2)
 {
 	const char *cp = str, *last = str;
@@ -698,11 +701,13 @@ static void command_help_show_wrap(struct command_invocation *cmd,
 		} while ((next - last < HELP_LINE_WIDTH(n)) && *next != '\0');
 		if (next - last < HELP_LINE_WIDTH(n))
 			cp = next;
-		command_help_show_indent(cmd, n);
-		command_print(cmd, "%.*s", (int)(cp - last), last);
+		CALL_COMMAND_HANDLER(command_help_show_indent, n);
+		command_print(CMD, "%.*s", (int)(cp - last), last);
 		last = cp + 1;
 		n = n2;
 	}
+
+	return ERROR_OK;
 }
 
 static COMMAND_HELPER(command_help_show, struct help_entry *c,
@@ -721,10 +726,10 @@ static COMMAND_HELPER(command_help_show, struct help_entry *c,
 	if (is_match) {
 		if (c->usage && strlen(c->usage) > 0) {
 			char *msg = alloc_printf("%s %s", c->cmd_name, c->usage);
-			command_help_show_wrap(CMD, msg, n, n + 5);
+			CALL_COMMAND_HANDLER(command_help_show_wrap, msg, n, n + 5);
 			free(msg);
 		} else {
-			command_help_show_wrap(CMD, c->cmd_name, n, n + 5);
+			CALL_COMMAND_HANDLER(command_help_show_wrap, c->cmd_name, n, n + 5);
 		}
 	}
 
@@ -758,7 +763,7 @@ static COMMAND_HELPER(command_help_show, struct help_entry *c,
 			return ERROR_FAIL;
 		}
 
-		command_help_show_wrap(CMD, msg, n + 3, n + 3);
+		CALL_COMMAND_HANDLER(command_help_show_wrap, msg, n + 3, n + 3);
 		free(msg);
 	}
 

-----------------------------------------------------------------------

Summary of changes:
 src/helper/command.c | 21 +++++++++++++--------
 1 file changed, 13 insertions(+), 8 deletions(-)


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commit d2aeb5fcc9eb1445684306441ea2524c4e196196
Author: Antonio Borneo <bor...@gm...>
Date:   Fri Oct 24 10:12:30 2025 +0200

    command: return OpenOCD error code as Tcl 'errorCode'
    
    Commit 93f16eed4d4d ("command: fix OpenOCD commands return value
    for next jimtcl") aligns the return of OpenOCD Tcl commands to the
    standard Tcl error codes.
    
    This has the side effect to hide the internal OpenOCD error codes
    (e.g. ERROR_FAIL = -4) from the Tcl environment. These codes are
    for internal use, can change during OpenOCD development and should
    not be exposed to the user.
    Nevertheless, some ACI test has been instrumented to check such
    values and there is a requirement to make them available, possibly
    without breaking the Tcl language rules.
    
    Tcl allows procedures to return, through the 'return' command [1]:
    - the result text;
    - a return code like 'ok' or 'error';
    - an optional 'errorcode';
    - ...
    
    The optional 'errorcode' can be exploited to propagate the OpenOCD
    error code to the Tcl script for ACI test purpose.
    It would be equivalent of considering the OpenOCD commands as Tcl
    procedures that either returns as:
            return -code ok 'command output text'
    or return an error as:
            return -code error -errorcode {OpenOCD -4} 'error text'
    where '-4' is the OpenOCD value for ERROR_FAIL.
    
    Tcl stores the errorcode in the global variable 'errorCode' that
    can be easily accessed within a Tcl script [2].
    The variable 'errorCode' is by default set to 'NONE' and has to be
    set to a Tcl list. The first element of the list identifies the
    general class of errors and determines the format of the rest of
    the list. This allows the required flexibility to propagate the
    OpenOCD error codes in a format unique that does not impact other
    Tcl functionality.
    
    Propagates the OpenOCD error code in the Tcl global variable
    'errorCode' as a Tcl list formatted as {OpenOCD %s}.
    Modify the test script to check for OpenOCD error code.
    
    Link: https://www.tcl-lang.org/man/tcl8.6/TclCmd/return.htm [1]
    Link: https://www.tcl-lang.org/man/tcl8.6/TclCmd/tclvars.htm [2]
    Change-Id: Ia5007e04b3c061a0f7a74387b51ab2a57c658088
    Signed-off-by: Antonio Borneo <bor...@gm...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/9186
    Reviewed-by: zapb <de...@za...>
    Tested-by: jenkins
    Reviewed-by: Evgeniy Naydanov <eu...@gm...>

diff --git a/src/helper/command.c b/src/helper/command.c
index d2a031478..867a84013 100644
--- a/src/helper/command.c
+++ b/src/helper/command.c
@@ -474,6 +474,11 @@ static int jim_exec_command(Jim_Interp *interp, struct command_context *context,
 	if (retval == ERROR_COMMAND_CLOSE_CONNECTION)
 		return JIM_EXIT;
 
+	Jim_Obj *error_code = Jim_NewListObj(context->interp, NULL, 0);
+	Jim_ListAppendElement(context->interp, error_code, Jim_NewStringObj(context->interp, "OpenOCD", -1));
+	Jim_ListAppendElement(context->interp, error_code, Jim_NewIntObj(context->interp, retval));
+	Jim_SetGlobalVariableStr(context->interp, "errorCode", error_code);
+
 	return JIM_ERR;
 }
 
diff --git a/testing/tcl_commands/utils.tcl b/testing/tcl_commands/utils.tcl
index 65e52d2fe..087bf0437 100644
--- a/testing/tcl_commands/utils.tcl
+++ b/testing/tcl_commands/utils.tcl
@@ -8,17 +8,22 @@ namespace eval testing_helpers {
 	}
 
 	proc check_for_error {expctd_code msg_ptrn script} {
+		set ::errorCode NONE
 		set code [catch {uplevel $script} msg]
 		set expanded_script [uplevel subst \"$script\"]
-		if {!$code} {
+		if {$code == 0} {
 			test_failure \
 				"'$expanded_script' finished successfully. \
 				Was expecting an error."
 		}
-		if {$expctd_code ne "" && $code != $expctd_code} {
+		if {$code != 1} {
 			test_failure \
-				"'$expanded_script' returned unexpected error code $code. \
-				Was expecting $expctd_code. Error message: '$msg'"
+				"'$expanded_script' returned unexpected error code $code"
+		}
+		if {$expctd_code ne "" && ([lindex $::errorCode 0] ne "OpenOCD" || [lindex $::errorCode 1] != $expctd_code)} {
+			test_failure \
+				"'$expanded_script' returned unexpected error code '$::errorCode'. \
+				Was expecting 'OpenOCD $expctd_code'. Error message: '$msg'"
 		}
 		if {$msg_ptrn ne "" && ![regexp -- $msg_ptrn $msg]} {
 			test_failure \
@@ -32,7 +37,7 @@ namespace eval testing_helpers {
 	}
 
 	proc check_syntax_err script {
-		tailcall check_for_error 1 {} $script
+		tailcall check_for_error -601 {} $script
 	}
 
 	proc check_matches {pattern script} {
diff --git a/tools/scripts/camelcase.txt b/tools/scripts/camelcase.txt
index 1c782ee35..95ef4af55 100644
--- a/tools/scripts/camelcase.txt
+++ b/tools/scripts/camelcase.txt
@@ -113,17 +113,20 @@ Jim_GetWide
 Jim_IncrRefCount
 Jim_InitStaticExtensions
 Jim_Interp
+Jim_ListAppendElement
 Jim_ListGetIndex
 Jim_ListLength
 Jim_MakeErrorMessage
 Jim_NewEmptyStringObj
 Jim_NewIntObj
+Jim_NewListObj
 Jim_NewStringObj
 Jim_Obj
 Jim_ProcessEvents
 Jim_RegisterCoreCommands
 Jim_SetAssocData
 Jim_SetEmptyResult
+Jim_SetGlobalVariableStr
 Jim_SetResult
 Jim_SetResultFormatted
 Jim_SetResultString

-----------------------------------------------------------------------

Summary of changes:
 src/helper/command.c           |  5 +++++
 testing/tcl_commands/utils.tcl | 15 ++++++++++-----
 tools/scripts/camelcase.txt    |  3 +++
 3 files changed, 18 insertions(+), 5 deletions(-)


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- Log -----------------------------------------------------------------
commit fcce5d52d9afd6c7fa04da72534486a3a96cc178
Author: Antonio Borneo <bor...@gm...>
Date:   Fri Oct 24 10:07:10 2025 +0200

    command: on syntax error, run 'usage' inside the same cmd_ctx
    
    We want the output of the 'usage' command to become the output of
    the current command that has triggered the syntax error.
    
    Don't use command_run_linef(), as it will first print the message,
    then pass it to the current command that will use it again.
    Replace command_run_linef() with Jim_Eval..().
    
    Change-Id: Icefa87746156e6e8758026c0fdc5e02b440b3aaa
    Signed-off-by: Antonio Borneo <bor...@gm...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/9185
    Tested-by: jenkins
    Reviewed-by: Evgeniy Naydanov <eu...@gm...>

diff --git a/src/helper/command.c b/src/helper/command.c
index cc660b8b6..d2a031478 100644
--- a/src/helper/command.c
+++ b/src/helper/command.c
@@ -444,8 +444,8 @@ static int jim_exec_command(Jim_Interp *interp, struct command_context *context,
 
 	int retval = c->handler(&cmd);
 	if (retval == ERROR_COMMAND_SYNTAX_ERROR) {
-		/* Print help for command */
-		command_run_linef(context, "usage %s", words[0]);
+		// Print command syntax
+		Jim_EvalObjPrefix(context->interp, Jim_NewStringObj(context->interp, "usage", -1), 1, argv);
 	} else if (retval == ERROR_COMMAND_CLOSE_CONNECTION) {
 		/* just fall through for a shutdown request */
 	} else {

commit 586c8981b15f4bd4f1248a8b44f611d6fca177a6
Author: Antonio Borneo <bor...@gm...>
Date:   Thu Oct 23 23:27:45 2025 +0200

    command: let 'help' and 'usage' to use command_print()
    
    The commands 'help' and 'usage' still rely on LOG_USER_N() and
    LOG_USER() for the output.
    
    Convert them to command_print().
    
    Change-Id: I6e77dd761b61344ff797f661456896388bba89aa
    Signed-off-by: Antonio Borneo <bor...@gm...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/9184
    Reviewed-by: Evgeniy Naydanov <eu...@gm...>
    Tested-by: jenkins

diff --git a/src/helper/command.c b/src/helper/command.c
index 4cce57f75..cc660b8b6 100644
--- a/src/helper/command.c
+++ b/src/helper/command.c
@@ -674,12 +674,13 @@ static COMMAND_HELPER(command_help_show_list, bool show_help, const char *cmd_ma
 
 #define HELP_LINE_WIDTH(_n) (int)(76 - (2 * _n))
 
-static void command_help_show_indent(unsigned int n)
+static void command_help_show_indent(struct command_invocation *cmd, unsigned int n)
 {
 	for (unsigned int i = 0; i < n; i++)
-		LOG_USER_N("  ");
+		command_print_sameline(cmd, "  ");
 }
-static void command_help_show_wrap(const char *str, unsigned int n, unsigned int n2)
+static void command_help_show_wrap(struct command_invocation *cmd,
+	const char *str, unsigned int n, unsigned int n2)
 {
 	const char *cp = str, *last = str;
 	while (*cp) {
@@ -692,8 +693,8 @@ static void command_help_show_wrap(const char *str, unsigned int n, unsigned int
 		} while ((next - last < HELP_LINE_WIDTH(n)) && *next != '\0');
 		if (next - last < HELP_LINE_WIDTH(n))
 			cp = next;
-		command_help_show_indent(n);
-		LOG_USER("%.*s", (int)(cp - last), last);
+		command_help_show_indent(cmd, n);
+		command_print(cmd, "%.*s", (int)(cp - last), last);
 		last = cp + 1;
 		n = n2;
 	}
@@ -715,10 +716,10 @@ static COMMAND_HELPER(command_help_show, struct help_entry *c,
 	if (is_match) {
 		if (c->usage && strlen(c->usage) > 0) {
 			char *msg = alloc_printf("%s %s", c->cmd_name, c->usage);
-			command_help_show_wrap(msg, n, n + 5);
+			command_help_show_wrap(CMD, msg, n, n + 5);
 			free(msg);
 		} else {
-			command_help_show_wrap(c->cmd_name, n, n + 5);
+			command_help_show_wrap(CMD, c->cmd_name, n, n + 5);
 		}
 	}
 
@@ -752,7 +753,7 @@ static COMMAND_HELPER(command_help_show, struct help_entry *c,
 			return ERROR_FAIL;
 		}
 
-		command_help_show_wrap(msg, n + 3, n + 3);
+		command_help_show_wrap(CMD, msg, n + 3, n + 3);
 		free(msg);
 	}
 

-----------------------------------------------------------------------

Summary of changes:
 src/helper/command.c | 21 +++++++++++----------
 1 file changed, 11 insertions(+), 10 deletions(-)


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commit 3e7a7092d47ceca874166839d6e88439c911f452
Author: Tomas Vanek <va...@fb...>
Date:   Sun Nov 2 07:52:02 2025 +0100

    target/arm_dpm: report vector catch as breakpoint
    
    Commit 4afa32ece148 ("aarch64: unify armv7-a and armv8
    debug entry decoding")
    probably unintentionally removed DSCR_ENTRY_VECT_CATCH from
    reported debug entry reasons. Note the discrepancy between
    'case DSCR_ENTRY_BKPT_INSTR:' and its comment.
    
    Hitting vector catch was reported as DBG_REASON_UNDEFINED.
    DBG_REASON_UNDEFINED disturbed hwthread/gdb cooperation and
    gdb reported the wrong thread as stopped by SIGTRAP.
    
    Revert to the original functionality and report vector
    catch as a breakpoint.
    
    Change-Id: I12e938182cff8f633decba340000cfbb7b112ae3
    Signed-off-by: Tomas Vanek <va...@fb...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/9209
    Tested-by: jenkins
    Reviewed-by: Antonio Borneo <bor...@gm...>

diff --git a/src/target/arm_dpm.c b/src/target/arm_dpm.c
index 26e32591a..63c41c583 100644
--- a/src/target/arm_dpm.c
+++ b/src/target/arm_dpm.c
@@ -1064,7 +1064,8 @@ void arm_dpm_report_dscr(struct arm_dpm *dpm, uint32_t dscr)
 		target->debug_reason = DBG_REASON_DBGRQ;
 		break;
 	case DSCR_ENTRY_BREAKPOINT:	/* HW breakpoint */
-	case DSCR_ENTRY_BKPT_INSTR:	/* vector catch */
+	case DSCR_ENTRY_BKPT_INSTR: /* SW BKPT */
+	case DSCR_ENTRY_VECT_CATCH:	/* vector catch */
 		target->debug_reason = DBG_REASON_BREAKPOINT;
 		break;
 	case DSCR_ENTRY_IMPRECISE_WATCHPT:	/* asynch watchpoint */

-----------------------------------------------------------------------

Summary of changes:
 src/target/arm_dpm.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)


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- Log -----------------------------------------------------------------
commit 5d8a142703e9c6871e5fe6ab3bdf348561d215a5
Author: Tomas Vanek <va...@fb...>
Date:   Mon Nov 3 08:50:32 2025 +0100

    target/armv4_5: mark registers as 'save-restore'
    
    gdb uses this mark when creating a dummy frame for
    manual call of a function by gdb command.
    With the original setting all registers as caller_save = false
    call command in gdb always clobbers r0, r1 and pc
    and some other registers depending on the called function.
    
    Set 'save-restore' for all registers but banked ones.
    
    Change-Id: I16c49e4bf8001e38d18ce8861ca65988b08ccc88
    Signed-off-by: Tomas Vanek <va...@fb...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/9208
    Reviewed-by: Antonio Borneo <bor...@gm...>
    Tested-by: jenkins

diff --git a/src/target/armv4_5.c b/src/target/armv4_5.c
index e1a46bad3..1b3ca0cdb 100644
--- a/src/target/armv4_5.c
+++ b/src/target/armv4_5.c
@@ -691,8 +691,6 @@ struct reg_cache *arm_build_reg_cache(struct target *target, struct arm *arm)
 			&& arm->core_type != ARM_CORE_TYPE_VIRT_EXT)
 			continue;
 
-		/* REVISIT handle Cortex-M, which only shadows R13/SP */
-
 		reg_arch_info[i].num = arm_core_regs[i].cookie;
 		reg_arch_info[i].mode = arm_core_regs[i].mode;
 		reg_arch_info[i].target = target;
@@ -706,9 +704,6 @@ struct reg_cache *arm_build_reg_cache(struct target *target, struct arm *arm)
 		reg_list[i].arch_info = &reg_arch_info[i];
 		reg_list[i].exist = true;
 
-		/* This really depends on the calling convention in use */
-		reg_list[i].caller_save = false;
-
 		/* Registers data type, as used by GDB target description */
 		reg_list[i].reg_data_type = malloc(sizeof(struct reg_data_type));
 		switch (arm_core_regs[i].cookie) {
@@ -729,9 +724,16 @@ struct reg_cache *arm_build_reg_cache(struct target *target, struct arm *arm)
 		if (reg_list[i].number <= 15 || reg_list[i].number == 25) {
 			reg_list[i].feature->name = "org.gnu.gdb.arm.core";
 			reg_list[i].group = "general";
+			/* Registers which should be preserved across GDB inferior function calls.
+			 * Avoid saving banked registers as GDB (version 16.2 in time of writing)
+			 * does not take the current mode into account and messes the value
+			 * by restoring both the not banked register and the banked alias of it
+			 * in the current mode. */
+			reg_list[i].caller_save = true;
 		} else {
 			reg_list[i].feature->name = "net.sourceforge.openocd.banked";
 			reg_list[i].group = "banked";
+			reg_list[i].caller_save = false;
 		}
 
 		cache->num_regs++;
@@ -751,7 +753,8 @@ struct reg_cache *arm_build_reg_cache(struct target *target, struct arm *arm)
 		reg_list[i].arch_info = &reg_arch_info[i];
 		reg_list[i].exist = true;
 
-		reg_list[i].caller_save = false;
+		/* Mark d0 - d31 and fpscr as save-restore for GDB */
+		reg_list[i].caller_save = true;
 
 		reg_list[i].reg_data_type = malloc(sizeof(struct reg_data_type));
 		reg_list[i].reg_data_type->type = arm_vfp_v3_regs[j].type;

commit d044affba5b0f6c0f5d866f7f2022663ba32a596
Author: Tomas Vanek <va...@fb...>
Date:   Mon Nov 10 19:30:44 2025 +0100

    target/armv4_5: fix register numbering overlap
    
    Commit b5d2b1224fed ("target/cortex_a: add hypervisor mode")
    added sp_hyp, spsr_hyp registers with gdb_index 51 and 52
    but did not moved FP regs enum base starting from 51.
    
    Move FP registers indices to make room for added registers.
    
    Change-Id: I4338777545918fdf62016e06764308dacea61e98
    Signed-off-by: Tomas Vanek <va...@fb...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/9235
    Tested-by: jenkins
    Reviewed-by: Antonio Borneo <bor...@gm...>

diff --git a/src/target/arm.h b/src/target/arm.h
index 79ec99d11..54a25731c 100644
--- a/src/target/arm.h
+++ b/src/target/arm.h
@@ -108,7 +108,8 @@ enum arm_mode {
 
 /* VFPv3 internal register numbers mapping to d0:31 */
 enum {
-	ARM_VFP_V3_D0 = 51,
+	ARM_VFP_V3_D0 = 53,
+	// numbering should not overlap with e.g. armv4_5.c arm_core_regs .gdb_index
 	ARM_VFP_V3_D1,
 	ARM_VFP_V3_D2,
 	ARM_VFP_V3_D3,
diff --git a/src/target/armv4_5.c b/src/target/armv4_5.c
index d1a81614e..e1a46bad3 100644
--- a/src/target/armv4_5.c
+++ b/src/target/armv4_5.c
@@ -355,6 +355,7 @@ static const struct {
 	/* These exist only when the Virtualization Extensions is present */
 	[42] = { .name = "sp_hyp", .cookie = 13, .mode = ARM_MODE_HYP, .gdb_index = 51, },
 	[43] = { .name = "spsr_hyp", .cookie = 16, .mode = ARM_MODE_HYP, .gdb_index = 52, },
+	// .gdb_index numbering continues by ARM_VFP_V3_D0
 };
 
 static const struct {

-----------------------------------------------------------------------

Summary of changes:
 src/target/arm.h     |  3 ++-
 src/target/armv4_5.c | 16 ++++++++++------
 2 files changed, 12 insertions(+), 7 deletions(-)


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- Log -----------------------------------------------------------------
commit 83052c86e9f593a9951135182f54730f792531d0
Author: Tomas Vanek <va...@fb...>
Date:   Sun Nov 2 08:02:40 2025 +0100

    target/cortex_a: report target in some LOG_xx calls
    
    Switch to LOG_TARGET_DEBUG() and LOG_TARGET_ERROR()
    to make analyzing logs of multicore system easier.
    
    Not changed completely in the whole file, the changes were focused
    to halt and resume.
    
    Change-Id: I055ad682d3098d5c301a111605d57e504f877b4c
    Signed-off-by: Tomas Vanek <va...@fb...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/9207
    Tested-by: jenkins
    Reviewed-by: Antonio Borneo <bor...@gm...>

diff --git a/src/target/cortex_a.c b/src/target/cortex_a.c
index bc7550509..016ea175c 100644
--- a/src/target/cortex_a.c
+++ b/src/target/cortex_a.c
@@ -760,7 +760,7 @@ static int cortex_a_poll(struct target *target)
 	if (DSCR_RUN_MODE(dscr) == (DSCR_CORE_HALTED | DSCR_CORE_RESTARTED)) {
 		if (prev_target_state != TARGET_HALTED) {
 			/* We have a halting debug event */
-			LOG_DEBUG("Target halted");
+			LOG_TARGET_DEBUG(target, "Target halted");
 			target->state = TARGET_HALTED;
 
 			retval = cortex_a_debug_entry(target);
@@ -808,7 +808,7 @@ static int cortex_a_halt(struct target *target)
 	retval = cortex_a_wait_dscr_bits(target, DSCR_CORE_HALTED,
 			DSCR_CORE_HALTED, &dscr);
 	if (retval != ERROR_OK) {
-		LOG_ERROR("Error waiting for halt");
+		LOG_TARGET_ERROR(target, "Error waiting for halt");
 		return retval;
 	}
 
@@ -871,13 +871,13 @@ static int cortex_a_internal_restore(struct target *target, bool current,
 		resume_pc |= 0x1;
 		break;
 	case ARM_STATE_JAZELLE:
-		LOG_ERROR("How do I resume into Jazelle state??");
+		LOG_TARGET_ERROR(target, "How do I resume into Jazelle state??");
 		return ERROR_FAIL;
 	case ARM_STATE_AARCH64:
-		LOG_ERROR("Shouldn't be in AARCH64 state");
+		LOG_TARGET_ERROR(target, "Shouldn't be in AARCH64 state");
 		return ERROR_FAIL;
 	}
-	LOG_DEBUG("resume pc = 0x%08" PRIx32, resume_pc);
+	LOG_TARGET_DEBUG(target, "resume pc = 0x%08" PRIx32, resume_pc);
 	buf_set_u32(arm->pc->value, 0, 32, resume_pc);
 	arm->pc->dirty = true;
 	arm->pc->valid = true;
@@ -935,7 +935,7 @@ static int cortex_a_internal_restart(struct target *target)
 		return retval;
 
 	if ((dscr & DSCR_INSTR_COMP) == 0)
-		LOG_ERROR("DSCR InstrCompl must be set before leaving debug!");
+		LOG_TARGET_ERROR(target, "DSCR InstrCompl must be set before leaving debug!");
 
 	retval = mem_ap_write_atomic_u32(armv7a->debug_ap,
 			armv7a->debug_base + CPUDBG_DSCR, dscr & ~DSCR_ITR_EN);
@@ -952,7 +952,7 @@ static int cortex_a_internal_restart(struct target *target)
 	retval = cortex_a_wait_dscr_bits(target, DSCR_CORE_RESTARTED,
 			DSCR_CORE_RESTARTED, &dscr);
 	if (retval != ERROR_OK) {
-		LOG_ERROR("Error waiting for resume");
+		LOG_TARGET_ERROR(target, "Error waiting for resume");
 		return retval;
 	}
 
@@ -1010,11 +1010,11 @@ static int cortex_a_resume(struct target *target, bool current,
 	if (!debug_execution) {
 		target->state = TARGET_RUNNING;
 		target_call_event_callbacks(target, TARGET_EVENT_RESUMED);
-		LOG_DEBUG("target resumed at " TARGET_ADDR_FMT, address);
+		LOG_TARGET_DEBUG(target, "target resumed at " TARGET_ADDR_FMT, address);
 	} else {
 		target->state = TARGET_DEBUG_RUNNING;
 		target_call_event_callbacks(target, TARGET_EVENT_DEBUG_RESUMED);
-		LOG_DEBUG("target debug resumed at " TARGET_ADDR_FMT, address);
+		LOG_TARGET_DEBUG(target, "target debug resumed at " TARGET_ADDR_FMT, address);
 	}
 
 	return ERROR_OK;
@@ -1028,7 +1028,7 @@ static int cortex_a_debug_entry(struct target *target)
 	struct armv7a_common *armv7a = target_to_armv7a(target);
 	struct arm *arm = &armv7a->arm;
 
-	LOG_DEBUG("dscr = 0x%08" PRIx32, cortex_a->cpudbg_dscr);
+	LOG_TARGET_DEBUG(target, "dscr = 0x%08" PRIx32, cortex_a->cpudbg_dscr);
 
 	/* REVISIT surely we should not re-read DSCR !! */
 	retval = mem_ap_read_atomic_u32(armv7a->debug_ap,
@@ -1112,7 +1112,8 @@ static int cortex_a_post_debug_entry(struct target *target)
 			&cortex_a->cp15_control_reg);
 	if (retval != ERROR_OK)
 		return retval;
-	LOG_DEBUG("cp15_control_reg: %8.8" PRIx32, cortex_a->cp15_control_reg);
+	LOG_TARGET_DEBUG(target, "cp15_control_reg: %8.8" PRIx32,
+					 cortex_a->cp15_control_reg);
 	cortex_a->cp15_control_reg_curr = cortex_a->cp15_control_reg;
 
 	if (!armv7a->is_armv7r)
@@ -1303,7 +1304,7 @@ static int cortex_a_restore_context(struct target *target, bool bpwp)
 {
 	struct armv7a_common *armv7a = target_to_armv7a(target);
 
-	LOG_DEBUG(" ");
+	LOG_TARGET_DEBUG(target, " ");
 
 	if (armv7a->pre_restore_context)
 		armv7a->pre_restore_context(target);

-----------------------------------------------------------------------

Summary of changes:
 src/target/cortex_a.c | 25 +++++++++++++------------
 1 file changed, 13 insertions(+), 12 deletions(-)


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