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From: openocd-gerrit <ope...@us...> - 2026-07-25 10:45:46
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- Log -----------------------------------------------------------------
commit 13d93bf6d1ef5542cc5e742f8010529c814b4aaa
Author: Felipe Moura Oliveira <mou...@gm...>
Date: Mon May 18 17:35:04 2026 -0300
tcl: add Holtek HT32F4 (Artery AT32F423-compatible) configs
The Holtek HT32F4 series uses a flash memory controller that is
register-compatible with the Artery AT32F423. Its device IDs are
already present in the artery flash driver, so these parts are
programmed and debugged by the existing driver without code changes.
Add manufacturer config files under the holtek/ subdirectories:
- interface/holtek/e-link32.cfg (e-Link32 Pro/Lite adapter)
- target/holtek/ht32f4x.cfg (HT32F4 series target)
- board/holtek/esk32-31401.cfg (ESK32-31401 starter kit)
Add the e-Link32 USB IDs to contrib/60-openocd.rules and a note to
the artery driver documentation.
Verified on a Holtek HT32F49163 (100LQFP, DID 0x700a3240) on an
ESK32-31401 board with an e-Link32 Pro: flash probe, sector erase,
program, verify and SWD debug via the in-tree artery driver.
Signed-off-by: Felipe Moura Oliveira <mou...@gm...>
Change-Id: Ica51123f555e97765d6ea444c7ea1389da8d0abe
Reviewed-on: https://review.openocd.org/c/openocd/+/9662
Tested-by: jenkins
Reviewed-by: Antonio Borneo <bor...@gm...>
diff --git a/contrib/60-openocd.rules b/contrib/60-openocd.rules
index 775a25f24..247ec71e9 100644
--- a/contrib/60-openocd.rules
+++ b/contrib/60-openocd.rules
@@ -132,6 +132,10 @@ ATTRS{idVendor}=="04b4", ATTRS{idProduct}=="f139", MODE="660", GROUP="plugdev",
# Cypress KitProg in CMSIS-DAP mode
ATTRS{idVendor}=="04b4", ATTRS{idProduct}=="f138", MODE="660", GROUP="plugdev", TAG+="uaccess"
+# Holtek e-Link32 Pro/Lite
+ATTRS{idVendor}=="04d9", ATTRS{idProduct}=="802f", MODE="660", GROUP="plugdev", TAG+="uaccess"
+ATTRS{idVendor}=="04d9", ATTRS{idProduct}=="8052", MODE="660", GROUP="plugdev", TAG+="uaccess"
+
# Infineon DAP miniWiggler v3
ATTRS{idVendor}=="058b", ATTRS{idProduct}=="0043", MODE="660", GROUP="plugdev", TAG+="uaccess"
diff --git a/doc/openocd.texi b/doc/openocd.texi
index df0e18d78..a4ffafa10 100644
--- a/doc/openocd.texi
+++ b/doc/openocd.texi
@@ -6803,6 +6803,10 @@ This driver supports Artery Technology devices from the following series:
@item AT32WB415
@end itemize
+Some Holtek HT32F4 devices (e.g. the HT32F49153 and HT32F49163) use a
+flash memory controller that is register-compatible with the Artery AT32F423
+and are therefore programmed by this driver.
+
Devices with dual-bank flash memory are currently not supported.
Also, access to user data in the user system data (USD) area is not supported.
diff --git a/tcl/board/holtek/esk32-31401.cfg b/tcl/board/holtek/esk32-31401.cfg
new file mode 100644
index 000000000..2519e841b
--- /dev/null
+++ b/tcl/board/holtek/esk32-31401.cfg
@@ -0,0 +1,17 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
+# Holtek ESK32-31401 starter kit
+#
+# HT32F49163 (100LQFP) with an on-board Holtek e-Link32 debugger.
+
+source [find interface/holtek/e-link32.cfg]
+
+# The on-board e-Link32 debugger is wired to the SWD pins of the target.
+transport select swd
+
+source [find target/holtek/ht32f4x.cfg]
+
+# Connection-related settings (depend on the board wiring between the
+# adapter and the chip):
+adapter speed 1000
+reset_config srst_only
diff --git a/tcl/interface/holtek/e-link32.cfg b/tcl/interface/holtek/e-link32.cfg
new file mode 100644
index 000000000..2ea687ad9
--- /dev/null
+++ b/tcl/interface/holtek/e-link32.cfg
@@ -0,0 +1,10 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
+# Holtek e-Link32 Pro/Lite in-circuit debugger/programmer
+#
+# CMSIS-DAP class adapter. Known USB VID:PID pairs:
+# 0x04d9:0x802f e-Link32 Pro
+# 0x04d9:0x8052 e-Link32 Lite
+
+source [find interface/cmsis-dap.cfg]
+adapter usb vid_pid 0x04d9 0x802f 0x04d9 0x8052
diff --git a/tcl/target/holtek/ht32f4x.cfg b/tcl/target/holtek/ht32f4x.cfg
new file mode 100644
index 000000000..4a1cd2102
--- /dev/null
+++ b/tcl/target/holtek/ht32f4x.cfg
@@ -0,0 +1,45 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
+# Holtek HT32F4 series (Cortex-M4)
+#
+# The HT32F4 flash memory controller is register-compatible with the Artery
+# AT32 flash memory controller, so the in-tree "artery" flash driver handles
+# these parts. The Holtek device IDs (read from DBG_IDCODE 0xE0042000) are
+# shared with the Artery AT32F423 / AT32F425 series.
+
+source [find target/swj-dp.tcl]
+
+if { [info exists CHIPNAME] } {
+ set _CHIPNAME $CHIPNAME
+} else {
+ set _CHIPNAME ht32f4x
+}
+
+if { [info exists CPUTAPID] } {
+ set _CPUTAPID $CPUTAPID
+} else {
+ set _CPUTAPID 0x2ba01477
+}
+
+if { [info exists WORKAREASIZE] } {
+ set _WORKAREASIZE $WORKAREASIZE
+} else {
+ set _WORKAREASIZE 0x2000
+}
+
+swj_newdap $_CHIPNAME cpu -irlen 4 -expected-id $_CPUTAPID
+dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu
+
+set _TARGETNAME $_CHIPNAME.cpu
+target create $_TARGETNAME cortex_m -dap $_CHIPNAME.dap
+
+$_TARGETNAME configure -work-area-phys 0x20000000 \
+ -work-area-size $_WORKAREASIZE -work-area-backup 0
+
+# Flash size is auto-detected from the device ID by the artery driver.
+flash bank $_CHIPNAME.flash artery 0x08000000 0 0 0 $_TARGETNAME
+
+# The SRST line does not gate the debug logic on these parts. This is the
+# cortex_m default; the rest of the reset configuration (e.g. srst_only)
+# depends on the board wiring and is set by the board file.
+reset_config srst_nogate
-----------------------------------------------------------------------
Summary of changes:
contrib/60-openocd.rules | 4 ++++
doc/openocd.texi | 4 ++++
tcl/board/holtek/esk32-31401.cfg | 17 +++++++++++++++
tcl/interface/holtek/e-link32.cfg | 10 +++++++++
tcl/target/holtek/ht32f4x.cfg | 45 +++++++++++++++++++++++++++++++++++++++
5 files changed, 80 insertions(+)
create mode 100644 tcl/board/holtek/esk32-31401.cfg
create mode 100644 tcl/interface/holtek/e-link32.cfg
create mode 100644 tcl/target/holtek/ht32f4x.cfg
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