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[OpenOCD-commit] Main OpenOCD repository branch, master, updated. v0.12.0-1588-g065edc1e2
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From: openocd-gerrit <ope...@us...> - 2026-07-11 09:05:28
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- Log -----------------------------------------------------------------
commit 065edc1e2e5ea3a4719bb2cdfb766d7d825fd6a9
Author: HAOUES Ahmed <ahm...@st...>
Date: Wed May 6 17:04:51 2026 +0100
tcl/stm32wba5x: fix clock config used at 'reset init'
Use HSI 16 MHz
Change-Id: Ie23043274de1c6aae90763ba6e5ff5b6dd0410d2
Signed-off-by: HAOUES Ahmed <ahm...@st...>
Reviewed-on: https://review.openocd.org/c/openocd/+/9614
Reviewed-by: Antonio Borneo <bor...@gm...>
Tested-by: jenkins
diff --git a/tcl/target/stm32wba5x.cfg b/tcl/target/stm32wba5x.cfg
index 704174db4..9eadd2403 100644
--- a/tcl/target/stm32wba5x.cfg
+++ b/tcl/target/stm32wba5x.cfg
@@ -76,7 +76,7 @@ $_TARGETNAME configure -event reset-init {
# 1 WS compliant with VOS == 2 and 16 MHz.
mmw 0x40022000 0x00000001 0x0000000E ;# FLASH_ACR: Latency = 1
mmw 0x56020C00 0x00000100 0x00000000 ;# RCC_CR |= HSION
- mmw 0x56020C1C 0x00000000 0x00000002 ;# RCC_CFGR1: SW=HSI16
+ mmw 0x56020C1C 0x00000000 0x00000003 ;# RCC_CFGR1: SW=HSI16
# Boost JTAG frequency
adapter speed 4000
}
commit 3a16d2a9b7b451bee1f1fc7adf8f1da97f4ac666
Author: HAOUES Ahmed <ahm...@st...>
Date: Tue Jul 15 11:12:06 2025 +0100
flash/stm32l4x: Support STM32WBA2x devices
This device is similar to STM32WBA5x devices but with flash size
equal to 512Kb and with default programming word size (double-word)
Change-Id: I3c4023f58df7de980ccbd56c71f9c41d380a208f
Signed-off-by: HAOUES Ahmed <ahm...@st...>
Reviewed-on: https://review.openocd.org/c/openocd/+/9613
Tested-by: jenkins
Reviewed-by: Antonio Borneo <bor...@gm...>
diff --git a/src/flash/nor/stm32l4x.c b/src/flash/nor/stm32l4x.c
index 20d7842ee..34676659b 100644
--- a/src/flash/nor/stm32l4x.c
+++ b/src/flash/nor/stm32l4x.c
@@ -408,6 +408,10 @@ static const struct stm32l4_rev stm32wba6x_revs[] = {
{ 0x1000, "A" }, { 0x1001, "Z" },
};
+static const struct stm32l4_rev stm32wba2x_revs[] = {
+ { 0x1000, "A" },
+};
+
static const struct stm32l4_rev stm32wb1xx_revs[] = {
{ 0x1000, "A" }, { 0x2000, "B" },
};
@@ -791,6 +795,18 @@ static const struct stm32l4_part_info stm32l4_parts[] = {
.otp_base = 0x0BFA0000,
.otp_size = 512,
},
+ {
+ .id = DEVID_STM32WBA2X,
+ .revs = stm32wba2x_revs,
+ .num_revs = ARRAY_SIZE(stm32wba2x_revs),
+ .device_str = "STM32WBA2x",
+ .max_flash_size_kb = 512,
+ .flags = F_HAS_TZ | F_HAS_L5_FLASH_REGS | F_WRP_HAS_LOCK,
+ .flash_regs_base = 0x40022000,
+ .fsize_addr = 0x0BF8D7A0,
+ .otp_base = 0x0BF8D000,
+ .otp_size = 512,
+ },
{
.id = DEVID_STM32WB1XX,
.revs = stm32wb1xx_revs,
@@ -2262,6 +2278,7 @@ static int stm32l4_probe(struct flash_bank *bank)
break;
case DEVID_STM32WB5XX:
case DEVID_STM32WB3XX:
+ case DEVID_STM32WBA2X:
/* single bank flash */
page_size_kb = 4;
num_pages = flash_size_kb / page_size_kb;
diff --git a/src/flash/nor/stm32l4x.h b/src/flash/nor/stm32l4x.h
index 990504336..7ee62d663 100644
--- a/src/flash/nor/stm32l4x.h
+++ b/src/flash/nor/stm32l4x.h
@@ -121,7 +121,8 @@
#define DEVID_STM32WB5XX 0x495
#define DEVID_STM32WB3XX 0x496
#define DEVID_STM32WLE_WL5XX 0x497
-#define DEVID_STM32WBA6X 0x4B0
+#define DEVID_STM32WBA6X 0x4B0
+#define DEVID_STM32WBA2X 0x4B2
/* known Flash base addresses */
#define STM32_FLASH_BANK_BASE 0x08000000
diff --git a/tcl/target/stm32wba2x.cfg b/tcl/target/stm32wba2x.cfg
new file mode 100644
index 000000000..88349bafb
--- /dev/null
+++ b/tcl/target/stm32wba2x.cfg
@@ -0,0 +1,106 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
+# script for stm32wba2x family
+
+#
+# stm32wba2x devices support both JTAG and SWD transports.
+#
+source [find target/swj-dp.tcl]
+source [find mem_helper.tcl]
+
+if { [info exists CHIPNAME] } {
+ set _CHIPNAME $CHIPNAME
+} else {
+ set _CHIPNAME stm32wba2x
+}
+
+# Work-area is a space in RAM used for flash programming
+# By default use 64kB
+if { [info exists WORKAREASIZE] } {
+ set _WORKAREASIZE $WORKAREASIZE
+} else {
+ set _WORKAREASIZE 0x10000
+}
+
+# jtag scan chain
+if { [info exists CPUTAPID] } {
+ set _CPUTAPID $CPUTAPID
+} else {
+ if { [using_jtag] } {
+ set _CPUTAPID 0x0be11477
+ } else {
+ # SWD IDCODE (single drop, arm)
+ set _CPUTAPID 0x0be12477
+ }
+}
+
+swj_newdap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
+dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu
+
+if {[using_jtag]} {
+ jtag newtap $_CHIPNAME bs -irlen 5
+}
+
+set _TARGETNAME $_CHIPNAME.cpu
+target create $_TARGETNAME cortex_m -endian little -dap $_CHIPNAME.dap -ap-num 1
+
+$_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0
+
+flash bank $_CHIPNAME.flash stm32l4x 0x08000000 0 0 0 $_TARGETNAME
+flash bank $_CHIPNAME.otp stm32l4x 0x0bf8d000 0 0 0 $_TARGETNAME
+
+# Common knowledges tells JTAG speed should be <= F_CPU/6.
+# F_CPU after reset is MSI 4MHz, so use F_JTAG = 500 kHz to stay on
+# the safe side.
+#
+# Note that there is a pretty wide band where things are
+# more or less stable, see http://openocd.zylin.com/#/c/3366/
+adapter speed 500
+
+adapter srst delay 100
+if {[using_jtag]} {
+ jtag_ntrst_delay 100
+}
+
+reset_config srst_nogate
+
+if {![using_hla]} {
+ # if srst is not fitted use SYSRESETREQ to
+ # perform a soft reset
+ cortex_m reset_config sysresetreq
+}
+
+$_TARGETNAME configure -event reset-init {
+ # CPU comes out of reset with HSION | HSIRDY.
+ # Use HSI 16 MHz clock, compliant even with VOS == 2.
+ # 1 WS compliant with VOS == 2 and 16 MHz.
+ mmw 0x40022000 0x00000001 0x0000000E ;# FLASH_ACR: Latency = 1
+ mmw 0x46020C00 0x00000100 0x00000000 ;# RCC_CR |= HSION
+ mmw 0x46020C1C 0x00000000 0x00000003 ;# RCC_CFGR1: SW=HSI16
+ # Boost JTAG frequency
+ adapter speed 4000
+}
+
+$_TARGETNAME configure -event reset-start {
+ # Reset clock is HSI (16 MHz)
+ adapter speed 2000
+}
+
+$_TARGETNAME configure -event examine-end {
+ # Enable debug during low power modes (uses more power)
+ # DBGMCU_SCR |= DBG_STANDBY | DBG_STOP | DBG_SLEEP
+ mmw 0xE0044004 0x00000007 0
+
+ # Stop watchdog counters during halt
+ # DBGMCU_APB1LFZR |= DBG_IWDG_STOP
+ mmw 0xE0044008 0x00001000 0
+}
+
+tpiu create $_CHIPNAME.tpiu -dap $_CHIPNAME.dap -ap-num 0 -baseaddr 0xE0040000
+
+lappend _telnet_autocomplete_skip _proc_pre_enable_$_CHIPNAME.tpiu
+proc _proc_pre_enable_$_CHIPNAME.tpiu {_targetname} {
+ targets $_targetname
+}
+
+$_CHIPNAME.tpiu configure -event pre-enable "_proc_pre_enable_$_CHIPNAME.tpiu $_TARGETNAME"
-----------------------------------------------------------------------
Summary of changes:
src/flash/nor/stm32l4x.c | 17 +++++++++++++++++
src/flash/nor/stm32l4x.h | 3 ++-
tcl/target/{stm32wba5x.cfg => stm32wba2x.cfg} | 24 ++++++++++++------------
tcl/target/stm32wba5x.cfg | 2 +-
4 files changed, 32 insertions(+), 14 deletions(-)
copy tcl/target/{stm32wba5x.cfg => stm32wba2x.cfg} (82%)
hooks/post-receive
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Main OpenOCD repository
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