[OpenOCD-commit] Main OpenOCD repository branch, master, updated. v0.12.0-1586-g2ae1981ab

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       via  73b102deabf0f04220d1c2b46c81c36b9a995b64 (commit)
      from  eff5f00e518438fdb767fd3edc0b9be1fda8723d (commit)

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commit 2ae1981ab5077c30ad617c35cfaacb63e048ba30
Author: HAOUES Ahmed <ahm...@st...>
Date:   Wed May 6 09:34:43 2026 +0100

    flash/stm32l4x: Reorder DBGMCU_IDCODE registers
    
    To avoid read errors on some targets (for example STM32WBA5 and STM32WBA6),
    read the possible IDCODE registers in the specified order.
    
    Change-Id: I0ae4290dbf5899f03accaf81fa90eb165b5745e6
    Signed-off-by: HAOUES Ahmed <ahm...@st...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/9612
    Tested-by: jenkins
    Reviewed-by: Tomas Vanek <va...@fb...>

diff --git a/src/flash/nor/stm32l4x.c b/src/flash/nor/stm32l4x.c
index d46bfbeb5..20d7842ee 100644
--- a/src/flash/nor/stm32l4x.c
+++ b/src/flash/nor/stm32l4x.c
@@ -1884,7 +1884,7 @@ static int stm32l4_read_idcode(struct flash_bank *bank, uint32_t *id)
 	struct target *target = bank->target;
 
 	/* try reading possible IDCODE registers, in the following order */
-	uint32_t dbgmcu_idcode[] = {DBGMCU_IDCODE_L4_G4, DBGMCU_IDCODE_G0, DBGMCU_IDCODE_L5};
+	uint32_t dbgmcu_idcode[] = {DBGMCU_IDCODE_L4_G4, DBGMCU_IDCODE_L5, DBGMCU_IDCODE_G0};
 
 	for (unsigned int i = 0; i < ARRAY_SIZE(dbgmcu_idcode); i++) {
 		retval = target_read_u32(target, dbgmcu_idcode[i], id);

commit 73b102deabf0f04220d1c2b46c81c36b9a995b64
Author: HAOUES Ahmed <ahm...@st...>
Date:   Thu Jul 17 09:12:41 2025 +0100

    flash/bluenrg-x: support SPIRIT3R
    
    The SPIRIT3R is similar to the SPIRIT3, with 16KB of SRAM
    
    Change-Id: Id74104265b3f438f2c2e604e3c773edf657e13b9
    Signed-off-by: HAOUES Ahmed <ahm...@st...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/9531
    Tested-by: jenkins
    Reviewed-by: Antonio Borneo <bor...@gm...>

diff --git a/src/flash/nor/bluenrg-x.c b/src/flash/nor/bluenrg-x.c
index 651daa98d..7bc8ce35c 100644
--- a/src/flash/nor/bluenrg-x.c
+++ b/src/flash/nor/bluenrg-x.c
@@ -95,7 +95,7 @@ static const struct flash_ctrl_priv_data flash_priv_data_spirit3 = {
 	.flash_regs_base = 0x40001000,
 	.flash_page_size = 2048,
 	.jtag_idcode = 0x02027041,
-	.part_name = "STM32WL33 (SPIRIT3)",
+	.part_name = "STM32WL33/WL3R (SPIRIT3/3R)",
 };
 
 struct bluenrgx_flash_bank {
diff --git a/tcl/target/bluenrg-x.cfg b/tcl/target/bluenrg-x.cfg
index afa1b513b..ad6f1c43f 100644
--- a/tcl/target/bluenrg-x.cfg
+++ b/tcl/target/bluenrg-x.cfg
@@ -20,7 +20,7 @@ set _ENDIAN little
 if { [info exists WORKAREASIZE] } {
    set _WORKAREASIZE $WORKAREASIZE
 } else {
-   set _WORKAREASIZE 0x5F00
+   set _WORKAREASIZE 0x3C00
 }
 
 adapter speed 4000

-----------------------------------------------------------------------

Summary of changes:
 src/flash/nor/bluenrg-x.c | 2 +-
 src/flash/nor/stm32l4x.c  | 2 +-
 tcl/target/bluenrg-x.cfg  | 2 +-
 3 files changed, 3 insertions(+), 3 deletions(-)


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