Menu
▾
▴
[OpenOCD-commit] Main OpenOCD repository branch, master, updated. v0.12.0-1532-g469bc084e
|
From: openocd-gerrit <ope...@us...> - 2026-05-30 18:14:48
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 469bc084efb2694c5ce47bee4199b5294fe54728 (commit)
from fcfbbe98b2280ddd78da5cca207a8674adf11e85 (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit 469bc084efb2694c5ce47bee4199b5294fe54728
Author: Antonio Borneo <bor...@gm...>
Date: Fri May 15 12:21:11 2026 +0200
target: riscv: drop use of type time_t
This is the only code in OpenOCD that directly uses time_t.
This type assumes different size and sign depending on the host OS
and should not be used directly.
Replace it by using the OpenOCD helper timeval_ms().
Change-Id: I667f5361d8da5fdda96fef295e706136066ea1f8
Signed-off-by: Antonio Borneo <bor...@gm...>
Reviewed-on: https://review.openocd.org/c/openocd/+/9658
Tested-by: jenkins
Reviewed-by: Tomas Vanek <va...@fb...>
Reviewed-by: zapb <de...@za...>
Reviewed-by: Evgeniy Naydanov <eu...@gm...>
diff --git a/src/target/riscv/riscv-011.c b/src/target/riscv/riscv-011.c
index 8fd3792bf..717a9cb57 100644
--- a/src/target/riscv/riscv-011.c
+++ b/src/target/riscv/riscv-011.c
@@ -7,7 +7,6 @@
#include <assert.h>
#include <stdlib.h>
-#include <time.h>
#ifdef HAVE_CONFIG_H
#include "config.h"
@@ -724,7 +723,7 @@ static int read_bits(struct target *target, bits_t *result)
static int wait_for_debugint_clear(struct target *target, bool ignore_first)
{
- time_t start = time(NULL);
+ int64_t then = timeval_ms() + 1000 * riscv_get_command_timeout_sec();
if (ignore_first) {
/* Throw away the results of the first read, since they'll contain the
* result of the read that happened just before debugint was set.
@@ -742,7 +741,7 @@ static int wait_for_debugint_clear(struct target *target, bool ignore_first)
if (!bits.interrupt)
return ERROR_OK;
- if (time(NULL) - start > riscv_get_command_timeout_sec()) {
+ if (timeval_ms() > then) {
LOG_ERROR("Timed out waiting for debug int to clear."
"Increase timeout with riscv set_command_timeout_sec.");
return ERROR_FAIL;
@@ -1022,14 +1021,14 @@ static void dram_write_jump(struct target *target, unsigned int index,
static int wait_for_state(struct target *target, enum target_state state)
{
- time_t start = time(NULL);
+ int64_t then = timeval_ms() + 1000 * riscv_get_command_timeout_sec();
while (1) {
int result = riscv011_poll(target);
if (result != ERROR_OK)
return result;
if (target->state == state)
return ERROR_OK;
- if (time(NULL) - start > riscv_get_command_timeout_sec()) {
+ if (timeval_ms() > then) {
LOG_ERROR("Timed out waiting for state %d. "
"Increase timeout with riscv set_command_timeout_sec.", state);
return ERROR_FAIL;
@@ -1189,14 +1188,14 @@ static int full_step(struct target *target, bool announce)
int result = execute_resume(target, true);
if (result != ERROR_OK)
return result;
- time_t start = time(NULL);
+ int64_t then = timeval_ms() + 1000 * riscv_get_command_timeout_sec();
while (1) {
result = poll_target(target, announce);
if (result != ERROR_OK)
return result;
if (target->state != TARGET_DEBUG_RUNNING)
break;
- if (time(NULL) - start > riscv_get_command_timeout_sec()) {
+ if (timeval_ms() > then) {
LOG_ERROR("Timed out waiting for step to complete."
"Increase timeout with riscv set_command_timeout_sec");
return ERROR_FAIL;
@@ -2369,12 +2368,12 @@ static COMMAND_HELPER(riscv011_print_info, struct target *target)
static int wait_for_authbusy(struct target *target)
{
- time_t start = time(NULL);
+ int64_t then = timeval_ms() + 1000 * riscv_get_command_timeout_sec();
while (1) {
uint32_t dminfo = dbus_read(target, DMINFO);
if (!get_field(dminfo, DMINFO_AUTHBUSY))
break;
- if (time(NULL) - start > riscv_get_command_timeout_sec()) {
+ if (timeval_ms() > then) {
LOG_ERROR("Timed out after %ds waiting for authbusy to go low (dminfo=0x%x). "
"Increase the timeout with riscv set_command_timeout_sec.",
riscv_get_command_timeout_sec(),
diff --git a/src/target/riscv/riscv-013.c b/src/target/riscv/riscv-013.c
index 1b47d5e77..318a66ffe 100644
--- a/src/target/riscv/riscv-013.c
+++ b/src/target/riscv/riscv-013.c
@@ -8,7 +8,6 @@
#include <assert.h>
#include <stdint.h>
#include <stdlib.h>
-#include <time.h>
#ifdef HAVE_CONFIG_H
#include "config.h"
@@ -622,7 +621,7 @@ static int wait_for_idle(struct target *target, uint32_t *abstractcs)
return ERROR_FAIL;
}
- time_t start = time(NULL);
+ int64_t then = timeval_ms() + 1000 * riscv_get_command_timeout_sec();
do {
if (dm_read(target, abstractcs, DM_ABSTRACTCS) != ERROR_OK) {
/* We couldn't read abstractcs. For safety, overwrite the output value to
@@ -637,7 +636,7 @@ static int wait_for_idle(struct target *target, uint32_t *abstractcs)
dm->abstract_cmd_maybe_busy = false;
return ERROR_OK;
}
- } while ((time(NULL) - start) < riscv_get_command_timeout_sec());
+ } while (timeval_ms() < then);
LOG_TARGET_ERROR(target,
"Timed out after %ds waiting for busy to go low (abstractcs=0x%" PRIx32 "). "
@@ -1658,7 +1657,7 @@ static int register_read_direct(struct target *target, riscv_reg_t *value,
static int wait_for_authbusy(struct target *target, uint32_t *dmstatus)
{
- time_t start = time(NULL);
+ int64_t then = timeval_ms() + 1000 * riscv_get_command_timeout_sec();
while (1) {
uint32_t value;
if (dmstatus_read(target, &value, false) != ERROR_OK)
@@ -1667,7 +1666,7 @@ static int wait_for_authbusy(struct target *target, uint32_t *dmstatus)
*dmstatus = value;
if (!get_field(value, DM_DMSTATUS_AUTHBUSY))
break;
- if (time(NULL) - start > riscv_get_command_timeout_sec()) {
+ if (timeval_ms() > then) {
LOG_TARGET_ERROR(target, "Timed out after %ds waiting for authbusy to go low (dmstatus=0x%x). "
"Increase the timeout with riscv set_command_timeout_sec.",
riscv_get_command_timeout_sec(),
@@ -1857,14 +1856,14 @@ static int reset_dm(struct target *target)
if (result != ERROR_OK)
return result;
- const time_t start = time(NULL);
+ int64_t then = timeval_ms() + 1000 * riscv_get_command_timeout_sec();
LOG_TARGET_DEBUG(target, "Waiting for the DM to acknowledge reset.");
do {
result = dm_read(target, &dmcontrol, DM_DMCONTROL);
if (result != ERROR_OK)
return result;
- if (time(NULL) - start > riscv_get_command_timeout_sec()) {
+ if (timeval_ms() > then) {
LOG_TARGET_ERROR(target, "DM didn't acknowledge reset in %d s. "
"Increase the timeout with 'riscv set_command_timeout_sec'.",
riscv_get_command_timeout_sec());
@@ -1879,14 +1878,14 @@ static int reset_dm(struct target *target)
if (result != ERROR_OK)
return result;
- const time_t start = time(NULL);
+ int64_t then = timeval_ms() + 1000 * riscv_get_command_timeout_sec();
LOG_TARGET_DEBUG(target, "Waiting for the DM to come out of reset.");
do {
result = dm_read(target, &dmcontrol, DM_DMCONTROL);
if (result != ERROR_OK)
return result;
- if (time(NULL) - start > riscv_get_command_timeout_sec()) {
+ if (timeval_ms() > then) {
LOG_TARGET_ERROR(target, "Debug Module did not become active in %d s. "
"Increase the timeout with 'riscv set_command_timeout_sec'.",
riscv_get_command_timeout_sec());
@@ -2540,7 +2539,7 @@ static int batch_run_timeout(struct target *target, struct riscv_batch *batch)
riscv_batch_add_nop(batch);
size_t finished_scans = 0;
- const time_t start = time(NULL);
+ int64_t then = timeval_ms() + 1000 * riscv_get_command_timeout_sec();
const unsigned int old_base_delay = riscv_scan_get_delay(&info->learned_delays,
RISCV_DELAY_BASE);
int result;
@@ -2563,7 +2562,7 @@ static int batch_run_timeout(struct target *target, struct riscv_batch *batch)
result = increase_dmi_busy_delay(target);
if (result != ERROR_OK)
return result;
- } while (time(NULL) - start < riscv_get_command_timeout_sec());
+ } while (timeval_ms() < then);
assert(result == ERROR_OK);
assert(riscv_batch_was_batch_busy(batch));
@@ -2983,14 +2982,14 @@ static int deassert_reset(struct target *target)
uint32_t dmstatus;
const unsigned int orig_base_delay = riscv_scan_get_delay(&info->learned_delays,
RISCV_DELAY_BASE);
- time_t start = time(NULL);
+ int64_t then = timeval_ms() + 1000 * riscv_get_command_timeout_sec();
LOG_TARGET_DEBUG(target, "Waiting for hart to come out of reset.");
do {
result = dmstatus_read(target, &dmstatus, true);
if (result != ERROR_OK)
return result;
- if (time(NULL) - start > riscv_get_command_timeout_sec()) {
+ if (timeval_ms() > then) {
LOG_TARGET_ERROR(target, "Hart didn't leave reset in %ds; "
"dmstatus=0x%x (allunavail=%s, allhavereset=%s); "
"Increase the timeout with riscv set_command_timeout_sec.",
@@ -3176,13 +3175,13 @@ static target_addr_t sb_read_address(struct target *target)
static int read_sbcs_nonbusy(struct target *target, uint32_t *sbcs)
{
- time_t start = time(NULL);
+ int64_t then = timeval_ms() + 1000 * riscv_get_command_timeout_sec();
while (1) {
if (dm_read(target, sbcs, DM_SBCS) != ERROR_OK)
return ERROR_FAIL;
if (!get_field(*sbcs, DM_SBCS_SBBUSY))
return ERROR_OK;
- if (time(NULL) - start > riscv_get_command_timeout_sec()) {
+ if (timeval_ms() > then) {
LOG_TARGET_ERROR(target, "Timed out after %ds waiting for sbbusy to go low (sbcs=0x%x). "
"Increase the timeout with riscv set_command_timeout_sec.",
riscv_get_command_timeout_sec(), *sbcs);
-----------------------------------------------------------------------
Summary of changes:
src/target/riscv/riscv-011.c | 17 ++++++++---------
src/target/riscv/riscv-013.c | 29 ++++++++++++++---------------
2 files changed, 22 insertions(+), 24 deletions(-)
hooks/post-receive
--
Main OpenOCD repository
|
