[PATCH]: bcb5cbfb0 target: cortex_m: Fix a typo VECTRESET

[<ge...@op...>]

This is an automated email from Gerrit.

"Yasushi SHOJI <yas...@gm...>" just uploaded a new patch set to Gerrit, which you can find at https://review.openocd.org/c/openocd/+/6508

-- gerrit

commit bcb5cbfb073b1e84c267d751ad3c47b7349f7d18
Author: Yasushi SHOJI <ya...@sp...>
Date:   Sun Aug 29 18:27:52 2021 +0900

    target: cortex_m: Fix a typo VECTRESET
    
    According to ARM Cortex M3 technical reference manual, it's
    "VECTRESET" instead of "VECRESET".
    
    Change-Id: Iff5534beac2b313cee6da3252d76d4d44a61eeed
    Signed-off-by: Yasushi SHOJI <ya...@sp...>

diff --git a/src/target/cortex_m.c b/src/target/cortex_m.c
index f3c8527cf..08f2eb911 100644
--- a/src/target/cortex_m.c
+++ b/src/target/cortex_m.c
@@ -1243,7 +1243,7 @@ static int cortex_m_assert_reset(struct target *target)
 		retval = ERROR_OK;
 	} else {
 		/* Use a standard Cortex-M3 software reset mechanism.
-		 * We default to using VECRESET as it is supported on all current cores
+		 * We default to using VECTRESET as it is supported on all current cores
 		 * (except Cortex-M0, M0+ and M1 which support SYSRESETREQ only!)
 		 * This has the disadvantage of not resetting the peripherals, so a
 		 * reset-init event handler is needed to perform any peripheral resets.

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