[OpenOCD-devel] [openocd:tickets] #231 STM32L07x dual bank fails flashing

[Tom <to...@us...>]

The debug log shows that CPU waits for the end of half page write with stalled AHB and the adapter polling suffers from long waits. It seems just question of probability if and when the adapter exceeds MAX_WAIT_RETRIES (8).
The write algo in contrib/loaders/flash/stm32/stm32lx.S should check FLASH_SR BSY bit at the end of half page to wait without blocking AHB.


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** [tickets:#231] STM32L07x dual bank fails flashing**

**Status:** new
**Milestone:** 0.9.0
**Created:** Sun Mar 31, 2019 09:57 AM UTC by Martin Jäger
**Last Updated:** Fri Apr 05, 2019 12:44 PM UTC
**Owner:** nobody


I'm not able to flash my STM32L073 with the settings stated in https://sourceforge.net/p/openocd/code/ci/master/tree/tcl/board/st_nucleo_l073rz.cfg

If I change the WORKAREASIZE to 0x1000, everything works fine.

Do you agree to change the setting?


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