[OpenOCD-devel] [PATCH]: 6d21bd5 cfg: common for targets that allows ath79 spi driver to use

[<ge...@op...>]

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Dmytro (dio...@ho...) just uploaded a new patch set to Gerrit, which you can find at http://openocd.zylin.com/3421

-- gerrit

commit 6d21bd5c6f4cec2cc433ee184b6c4ee8011958b7
Author: Dmytro <dio...@ho...>
Date:   Wed Apr 20 14:50:41 2016 +0300

    cfg: common for targets that allows ath79 spi driver to use
    
    This config can be use as common config for any
    Atheros and Qualcomm SoCs (ath79 family), like
    AR71xx, AR91xx, AR724x, AR93xx, QCA95xx.
    
    This config contains necessary register that makes
    up to 16 MBytes of flash accessible also configure
    ath79 driver for the target and flash bank.
    
    So this config file can be used manually/separately
    and after this we can use flash utils like flash probe
    and read/write/erase flash without finding/and
    use PLL and DDR registers fot the SoC's.
    
    Change-Id: Ib49fd2c2732587f09b154e602e249664cbafbfc9
    Signed-off-by: Dmytro <dio...@ho...>

diff --git a/tcl/target/ath79-spi.cfg b/tcl/target/ath79-spi.cfg
new file mode 100644
index 0000000..41ac131
--- /dev/null
+++ b/tcl/target/ath79-spi.cfg
@@ -0,0 +1,51 @@
+# Atheros ATH79 MIPS SoC.
+# tested on AP83 and AP99 reference board
+# use flash probe and other flash utils with this config
+# source: https://forum.openwrt.org/viewtopic.php?pid=297299#p297299
+#
+
+if { [info exists CHIPNAME] } {
+   set _CHIPNAME $CHIPNAME
+} elseif { [info exists _CHIPNAME] } {
+   echo "Skip set CHIPNAME, already exist."
+} else {
+   set _CHIPNAME ath79
+}
+
+if { [info exists ENDIAN] } {
+   set _ENDIAN $ENDIAN
+} elseif { [info exists _ENDIAN] } {
+   echo "Skip set ENDIAN, already exist."
+} else {
+   set _ENDIAN big
+}
+
+if { [info exists CPUTAPID] } {
+   set _CPUTAPID $CPUTAPID
+} elseif { [info exists _CPUTAPID] } {
+   echo "Skip set CPUTAPID, already exist."
+} else {
+   set _CPUTAPID 0x00000001
+}
+
+if { [info exists TARGETNAME] | [info exists _TARGETNAME] } {
+   echo "Skip creating new tap and target name, already exist."
+} else {
+jtag newtap $_CHIPNAME cpu -irlen 5 -ircapture 0x1 -irmask 0x1f -expected-id $_CPUTAPID
+
+set _TARGETNAME $_CHIPNAME.cpu
+target create $_TARGETNAME mips_m4k -endian $_ENDIAN -chain-position $_TARGETNAME
+}
+
+$_TARGETNAME configure -event gdb-attach {
+	echo "Halting Target"
+	halt
+	# in the SPI_CONTROL register bit 6 (REMAP_DISABLE) is set to 1
+	# makes up to 16 MBytes of flash space accessible
+	mww 0xbf000004 0x43
+}
+
+# serial SPI capable flash
+# flash bank <driver> <base> <size> <chip_width> <bus_width>
+set _FLASHNAME $_CHIPNAME.flash
+flash bank $_FLASHNAME ath79 0xbf000000 0x01000000 0 0 $_TARGETNAME

--