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From: Franzi Edo. <edo...@uk...> - 2015-11-15 16:20:01
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Hi Paul Thanks for your suggestions > On 15 Nov 2015, at 16:01, Paul Fertser <fer...@gm...> wrote: > > Hi, > > On Sun, Nov 15, 2015 at 03:16:49PM +0100, Franzi Edo. wrote: >> stm32F4xx). With the latest openocd I cannont program the flash of the stm32F7xx >> . Again, for hardware reason I cannot use J-Link. > >> From OpenOCD's POV it doesn't matter whether you use FTDI or J-Link, > they're both treated as low-level debug adapters. OK > >> 1. I have patched openocd-0.9.0 with some proposed improvements for supporting >> the stm32F7xx flash > > What patches specifically do you have applied? This was an old try. Now I use the latest GIT Head version > >> init >> reset halt >> sleep 1000 >> stm32f2x mass_erase 0 >> flash write_image ./EPROM.elf >> reset run >> shutdown > Instead of all this it's usually recommended to use: > > program EPROM.elf verify reset exit OK, I will try again > >> Info : clock speed 2000 kHz >> Info : JTAG tap: stm32f7x.cpu tap/device found: 0x5ba00477 (mfg: 0x23b, part: >> 0xba00, ver: 0x5) >> Info : JTAG tap: stm32f7x.bs tap/device found: 0x06449041 (mfg: 0x020, part: >> 0x6449, ver: 0x0) >> Warn : JTAG tap: stm32f7x.bs UNEXPECTED: 0x06449041 (mfg: 0x020, part: >> 0x6449, ver: 0x0) >> Error: JTAG tap: stm32f7x.bs expected 1 of 1: 0x06449071 (mfg: 0x038, part: >> 0x6449, ver: 0x0) > > This is already weird, and needs to be sorted out before you proceed > with everything else. Looks like hw issue to me. Probably bad > grounding or target Vcc doesn't match ftdi's or some other, more > subtle issue. From my oscilloscope the signals seems to be OK > >> Error: Can't assert SRST: nSRST signal is not defined > > This means you shouldn't use reset_config srst_only (or trst_and_srst) > if your debug adapter config doesn't actually have srst and you do not > define it in the adapter config. How to proceed for not use those signals? > > -- > Be free, use free (http://www.gnu.org/philosophy/free-sw.html) software! > mailto:fer...@gm... |