From: <rob...@co...> - 2013-10-22 06:54:00
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Hi, I'm using OpenOcd 0.5.0 to debug and programming a fujitsu cortex m3 microcontroller and all work. Now, i tried to upgrade to version 0.6.1 or 0.7.0, but i have following problems. The flash erase seems to work fine, but at the flash program i have following problems: Info : Fujitsu MB9[AB]xxx: Chip Erase ... (may take several seconds) fm3 chip erase complete Info : JTAG tap: mb9bfxx6.cpu tap/device found: 0x4ba00477 (mfg: 0x23b, part: 0xba00, ver: 0x4) Error: mb9bfxx6.cpu -- clearing lockup after double fault target state: halted target halted due to debug-request, current mode: Handler HardFault xPSR: 0x01000003 pc: 0xfffffffe msp: 0xffffffd8 Polling target failed, GDB will be halted. Polling again in 100ms Info : Fujitsu MB9B500: FLASH Write ... Error: timed out while waiting for target halted Error: Error executing fm3 Flash programming algorithm Error: error writing to flash at address 0x00000000 at offset 0x00000000 in procedure 'flash' make: *** [program] Error 1 To perform erase & flash command i'm using this commands list: I comandi che utilizzamo verso openocd sono: # specify OpenOCD configuration file (pick the one for your device) OPENOCD_CFG = -f ./sk-fm3-176pmc-ethernet.cfg #OPENOCD_CFG = -f ./openocd.cfg # specify OpenOCD flash programing commandos for FM3 OPENOCD_C += -c init OPENOCD_C += -c jtag_khz 1000 OPENOCD_C += -c reset init OPENOCD_C += -c verify_ircapture disable OPENOCD_C += -c halt OPENOCD_C += -c poll OPENOCD_C += -c 'fm3 chip_erase 0' OPENOCD_C += -c reset halt OPENOCD_C += -c 'flash write_image $(PROJECT)_rom.bin 0x0 bin' OPENOCD_C += -c reset run OPENOCD_C += -c shutdown # program the FM3 internal flash memory with OpenOCD program: @echo "Flash Programming with OpenOCD ..." $(OPENOCD) $(OPENOCD_CFG) $(OPENOCD_C) @echo "Flash Programming Finished." and the .cfg file used is: # MB9BF618T interface ft2232 ft2232_vid_pid 0x0403 0x6010 ft2232_device_desc "Dual RS232" ft2232_layout "oocdlink" ft2232_latency 2 gdb_memory_map disable if { [info exists CHIPNAME] } { set _CHIPNAME $CHIPNAME } else { set _CHIPNAME mb9bfxx6 } if { [info exists ENDIAN] } { set _ENDIAN $ENDIAN } else { set _ENDIAN little } if { [info exists CPUTAPID ] } { set _CPUTAPID $CPUTAPID } else { set _CPUTAPID 0x4ba00477 } # delays on reset lines jtag_ntrst_delay 500 # Fujitsu cortex-M3 reset configuration reset_config trst_and_srst jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID set _TARGETNAME $_CHIPNAME.cpu target create $_TARGETNAME cortex_m3 -endian $_ENDIAN -chain-position $_TARGETNAME # Reset & Halt MCU, after debugger was connected $_TARGETNAME configure -event gdb-attach { reset halt } $_TARGETNAME configure -event gdb-detach { reset halt } # MB9BF618 has 128kB of SRAM on its main system bus $_TARGETNAME configure -work-area-phys 0x1FFF0000 -work-area-size 0x20000 -work-area-backup 0 # MB9BF618 has 1MB internal FLASH set _FLASHNAME $_CHIPNAME.flash flash bank $_FLASHNAME fm3 0 0 0 0 $_TARGETNAME # 4MHz / 6 = 666kHz, so use 500 #adapter_khz 500 adapter_khz 1000 # if srst is not fitted use SYSRESETREQ to # perform a soft reset cortex_m3 reset_config sysresetreq What's changed in new version?...I need to send different commands to perform that programmin? Best regards. Roberto Cozzi |