Re: [OpenOCD-devel] [PATCH]: febf50c cfg: add basic support of Freescale i.MX6 series targets

[Vladimir Z. <vz...@ml...>]

Hello,

still there is no review or response on the patch, wouldn't it be good to
have support of one more target in OpenOCD?

If any problems are found with the change, please let me know.

With best wishes,
Vladimir

On 08.02.2013 02:50, ge...@op... wrote:
> This is an automated email from Gerrit.
>
> Vladimir Zapolskiy (vz...@ml...) just uploaded a new patch set to Gerrit, which you can find at http://openocd.zylin.com/1135
>
> -- gerrit
>
> commit febf50c8096c7de237f5e2e7236d80e97be13c94
> Author: Vladimir Zapolskiy<vz...@ml...>
> Date:   Fri Feb 8 02:12:49 2013 +0200
>
>      cfg: add basic support of Freescale i.MX6 series targets
>
>      This change adds a simple target configuration for Freescale
>      single/dual/quad core i.MX6 SoCs, only one core is configured by default.
>
>      Change-Id: I853dd27f4c6765b7f731be2ddea82e85d496c6a4
>      Signed-off-by: Vladimir Zapolskiy<vz...@ml...>
>
> diff --git a/tcl/target/imx6.cfg b/tcl/target/imx6.cfg
> new file mode 100644
> index 0000000..707bab8
> --- /dev/null
> +++ b/tcl/target/imx6.cfg
> @@ -0,0 +1,56 @@
> +# Freescale i.MX6 series single/dual/quad core processor
> +
> +if { [info exists CHIPNAME] } {
> +   set  _CHIPNAME $CHIPNAME
> +} else {
> +   set  _CHIPNAME imx6
> +}
> +
> +# CoreSight Debug Access Port
> +if { [info exists DAP_TAPID] } {
> +        set _DAP_TAPID $DAP_TAPID
> +} else {
> +        set _DAP_TAPID 0x4ba00477
> +}
> +
> +jtag newtap $_CHIPNAME dap -irlen 4 -ircapture 0x01 -irmask 0x0f \
> +        -expected-id $_DAP_TAPID
> +
> +# SDMA / no IDCODE
> +jtag newtap $_CHIPNAME sdma -irlen 4 -ircapture 0x00 -irmask 0x0f
> +
> +# System JTAG Controller
> +if { [info exists SJC_TAPID] } {
> +        set _SJC_TAPID SJC_TAPID
> +} else {
> +        set _SJC_TAPID 0x0191c01d
> +}
> +set _SJC_TAPID2 0x2191c01d
> +
> +jtag newtap $_CHIPNAME sjc -irlen 5 -ircapture 0x01 -irmask 0x1f \
> +        -expected-id $_SJC_TAPID -expected-id $_SJC_TAPID2
> +
> +# GDB target: Cortex-A9, using DAP, configuring only one core
> +# Base addresses of cores:
> +# core 0  -  0x82150000
> +# core 1  -  0x82152000
> +# core 2  -  0x82154000
> +# core 3  -  0x82156000
> +set _TARGETNAME $_CHIPNAME.cpu.0
> +target create $_TARGETNAME cortex_a8 -chain-position $_CHIPNAME.dap \
> +        -coreid 0 -dbgbase 0x82150000
> +
> +# some TCK cycles are required to activate the DEBUG power domain
> +jtag configure $_CHIPNAME.sjc -event post-reset "runtest 100"
> +
> +proc imx6_dbginit {target} {
> +        # General Cortex A8/A9 debug initialisation
> +        cortex_a8 dbginit
> +}
> +
> +# Slow speed to be sure it will work
> +jtag_rclk 1000
> +$_TARGETNAME configure -event reset-start { jtag_rclk 1000 }
> +
> +$_TARGETNAME configure -event reset-assert-post "imx6_dbginit $_TARGETNAME"
> +$_TARGETNAME configure -event gdb-attach { halt }
>