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From: Michael B. <mb...@di...> - 2009-11-17 15:08:36
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On Mon, Nov 16, 2009 at 20:59, David Brownell <da...@pa...> wrote: > On Monday 16 November 2009, Øyvind Harboe wrote: >> Does anyone thing this should not be committed? Sounds like >> a *neat* feature.... > > I'm wondering what an interface would look like that allowed > other ARM cores -- not just ARM11 -- to do this. And whether > there shouldn't be a followon patch to make watchpoints use > the same hardware mechanism... > > > ARM11 seems to have this mechanism built into the core, while > (if I didn't miss something important while skimming) older > cores may not have this mechanism at all. > > But starting with ETMv2 (which includes ARM11!) the ETM may > have up to three "context ID" comparators. Combine one of > those with an address comparator and use that to trigger > entry to debug state, and you've just built a breakpoint > that's *also* a "context aware breakpoint". (I think that > with a richly-enough featured ETM, it could implement two > such break-or-watch-points.) > > Can you clarify ... coprocessor #15 register 13 access > can give either the "Fast Context Switch Extension PID" > or a "Context ID". The context you're exposing here is > the low byte of the "Context ID", right? > > Meaning there are *two* ways to implement this specific > breakpoint functionality ... yes? One of which is > specific to ARM11, another of which is more generic. > > > If that's true ... I suggest refactoring this just a bit, > based on some patches I'm about to send: > > - Have it be an "arm asid [N]" command, not "arm11 asid", > and update a field in the "struct arm". Do something > sane for cores that don't support this mechanism, > like a clean failure. > > - The ARM11 breakpoint code would presumably still work > like in your patch, but it'd collect state from a > different place (so the same command could work for > other cores with this functionality). > > Eventually the current notion of breakpoint/watchpoint > may need to evolve, but doing it like I sketched above > seems like it would help us get to that point sooner > by allowing e.g. Cortex-A8, or possibly very modern ARM9 > cores, to implement this same mechanism. > > - Dave > > p.s. One thing that needs fixing in this patch: it > shares "arm11_asid" between all ARM11 cores. > This should be a core-specific value. This is the same issue with vcr and other global variables that should be target specific. IMO it makes more sense to add this Context ID functionality now and fix the variable scope in a separate patch that addresses all cases. A good opportunity for the latter would be when Tcl objects are added and these functions become methods of target objects. Michael |