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From: Dominic <Dom...@gm...> - 2008-09-05 18:01:06
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On Friday 05 September 2008 11:17:15 Øyvind Harboe wrote:
> 2008/9/5 dswei <ds...@si...>:
> > Thank you, vind_Harboe.
> > I don't exactly know what is "srst_pulls_trst" 's mean, but I can disable
> > MMU now, that is enough for my urgent task now.
>
> Would you care to check the datasheets?
>
> Basically some CPUs have, internally, srst tied to trst. This makes it
> impossible
> to reset the CPU without also resetting the embedded ice registers, making
> reset directly into the halted mode impossible.
>
> > I run the openocd command "arm920t cp15 2 0", "step", "poll", then the
> > MMU is diabled. But now I have another question:
> > 1. The "help cp15" is:
> > arm920t cp15i display/modify cp15 (interpreted access) <opcode>
> > [value] [address]
> > arm920t cp15 display/modify cp15 register <num> [value]
> >
> > 2. the format of ARM instruction mcr and mrc are:
> >
> > MCR/MRC{cond} P15,opcode_1,Rd,CRn,CRm,opcode_2
> >
> > 31 28 27 26 25 24 23 21 20 19 16 15 12 11 10 9 8 7
> > 5 4 3 0
> >
> > | Cond | 1 1 1 0 | opcode1 | L | CRn | Rd | 1 1 1 1 |
> > | opcode2 | 1 | CRm |
> >
> > What is the relation beteen "arm920t cp15" and ARM instruction mcr and
> > mrc? I try "arm920t cp15 0", "arm920t cp15 1", "arm920t cp15 2", and so
> > on, to read the cp15; and then know that "arm920t cp15 2" is for MMU. Are
> > there some exact relations between "MCR/MRC{cond}
> > P15,opcode_1,Rd,CRn,CRm,opcode_2" and "arm920t cp15", ""arm920t cp15i"?
>
> Could you investigate and post an explanation?
Check the ARM920t TRM - only certain combinations are possible, and they're
all listed in the TRM.
Regards,
Dominic
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