Re: [Openocd-development] Problems with erase (Re: Segfault because ofconfiguration or hardware?)

[Michael S. <rin...@di...>]

Christian Jaeger wrote:
> The other thing I'm wondering about is the reset lines: the wiggler2 (I 
> hope so) clone that I've built does feed the parallel port pin 6 (data4) 
> through the voltage converter directly to JTRSTn of the ARM, and only 
> the parallel port pin 2 (data0) is going through a transistor (open 
> collector, pulled up with 50k) to nSRST; so the latter is being 
> inverted, while the former is not. Now I've seen in the diploma thesis 
> from Dominic, in Figure 1.1, that he is actually inverting *both* nTRST 
> and nSRST. Should I do like him or did that change?
>   
There were some problems with the schematic - IIRC, the schematic in the 
thesis is for the "oldwiggler" cable.

A schematic that matches the wiggler/wiggler2 definitions is here:

http://www.ccac.rwth-aachen.de/~michaels/index.php/hardware/armjtag

cu
Michael