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Direction of MOS current reversed for LEVEL=1 devices

2017-06-23
2017-06-23
  • marcel hendrix

    marcel hendrix - 2017-06-23

    [ moved here from the mailing list because it is such a nice double entendre. ]

    Hi,

    There appears to be a reversal of MOS current for LEVEL=1 devices.
    I have the following netlist:

    * Schematics Netlist *
    .include "gen_proc.lib"
    MP1 D G 0 0 CMOSN W=0.64u L=0.13u
    vgs G 0   DC  1.2
    vds D 0   DC  0.5
    *VVS3 s 0   DC  2.5
    
    .dc vds 2.5 0 -0.05
    .save v(D)
    .save vds#branch
    .save @MP1[vdsat]
    .save @MP1[vds]
    .save @MP1[vth]
    .save @MP1[gds]
    .save @MP1[id]
    
    .control
      run
      display
    .endc
    
    .end
    

    The content of the file gen_proc.lib is as shown below :

    *Model parameters taken from Design of Analog Integrated Circuits*
    .MODEL CMOSN NMOS (LEVEL=1 VTO= 0.7 GAMMA = 0.45 PHI = 0.9 NSUB=9e+14 LD=0.08e-6 UO=350 LAMBDA=0.1 TOX=9e-9 PB=0.9 CJ=0.56e-3 CJSW=0.35e-11 MJ=0.45 MJSW=0.2 CGDO=0.4e-9 JS=1.0e-8)
    .MODEL CMOSP PMOS (LEVEL=1 VTO=-0.8 GAMMA = 0.4  PHI = 0.8 NSUB=5e+14 LD=0.09e-6 UO=100 LAMBDA=0.2 TOX=9e-9 PB=0.9 CJ=0.94e-3 CJSW=0.32e-11 MJ=0.5  MJSW=0.3 CGDO=0.3e-9 JS=0.5e-8)
    

    After the simulation when I do a 'plot i(vds)', it gives the currents as
    negative which means that the current is flowing in the opposite direction.
    I have observed the same in a PMOS device where the current is once again reversed.
    However, when I used Level 49 models, the currents were fine.
    Am I missing anything?

    Thanks and Regards,
    Vivek Roy

    There is a warning that the channel length is negative.
    Apparently this leads to an unphysical current direction.
    With "CMOSN W=0.64u L=0.2u" the current direction
    is OK here.

    You plot from high vds to low instead of low to high
    (it makes no difference to ngspice, but LTspice takes
    this literally as shown below). Maybe that confused
    your plot software?

    With LEVEL=49 the effective channel length maybe
    OK for your L=0.13u specification.

    -marcel

     

    Last edit: marcel hendrix 2017-06-24
  • Robert Larice

    Robert Larice - 2017-06-24

    Hello Marcel,

    I don't know whether this has someting to do with you posting, but,

    we have in "dctrcurv.c" the stepping for a

       dc ... start stop step
    

    coded as:

         for ...
             value += step
    

    Recently looking at some example from somewhere (bsim6 ?),
    i did have the impression another spice (hspice ?)
    might have done something more like that:

          for ...
              value += fabs(step) * sgn(stop - start)
    

    To me this second variant feels considerably wanna be clever,
    but if other spices indeed work like that, then we should consider this.

    Do you, or someody else know, whether this is more more "widespread" or "common" ?
    We should not change that light heartily, because this might break ngspice users scripts
    (in most perhaps all cases it wouldn't harm, but I'm not 100% sure)

    Regards,
    Robert

     
    • Holger Vogt

      Holger Vogt - 2017-06-24

      The MOS model level 1 is definitely not suited to simulate submicron MOS. It stems from 1971, when 10µm NMOS was state of the art. Its simplified equation set will only describe long channel devices adequately (definitely L should be larger than 5µm or so). Its capacitance model has discontinuities and may lead to non-convergence during transient simulation.

      Similarily MOS models at levels 2,3,6,9 are not recommended because they are kept for backwards compatibility only.

      For model selection you might have a look at https://people.rit.edu/lffeee/SPICE_MOSFET_Model_Intro.pdf .

      For L < 5µm and submicron simulation I recommend to use BSIM3. An example model parameter set is available from the Berkeley web pages at http://bsim.berkeley.edu/BSIM4/BSIM3/ftpv330.zip . Check for /test/modelcard.nmos and modelcard.pmos.

      If sub-0.1µm simulation is required, even for 0.13µm, use BSIM4. Sample model parameters are available in (http://bsim.berkeley.edu/BSIM4/BSIM4_4.8.1_20170215.tar.gz) /benchmark_test.

      Holger

       
    • marcel hendrix

      marcel hendrix - 2017-06-24

      Hi Robert,

      With

      .dc vds 2.5 0 -0.05
      plot -i(vds)
      

      ngspice computes points from 2.5 downwards to 0, but plots them with an
      x-axis with 0 left and 2.5 on the right.

      In this case LTspice computes (I don't know in what order) then plots with an
      x-axis with 2.5 left and 0 on the right.

      In order to emulate the plot direction of LTspice we can do:

      .dc vds 2.5 0 -0.05
      plot -i(vds) vs 2.5-"v-sweep"
      

      Your specification of HSPICE's algorithm is too vague for my
      understanding, but in general I think the setup of .dc does not
      say how the result is to be plotted. I think we should not
      change anything as an NGSPICE user has full flexibility already.

      -marcel

       

      Last edit: marcel hendrix 2017-06-24

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