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#351 ngspice hangs in transient analysis

v1.0 (example)
closed-fixed
.tran hang (1)
5
2018-03-16
2017-12-04
No

Hello.
Hope this is the right place to post this query.
This problem shows up in v26 running in linux (command “uname –a” returns “Linux AGD-ADEETC-Ubuntu16 4.4.0-101-generic #124-Ubuntu SMP Fri Nov 10 18:29:59 UTC 2017 x86_64 x86_64 x86_64 GNU/Linux”), both in interactive mode and when used as a shared library.
Executing a transient analysis over any of the attached circuits leads to ngspice hanging: in interactive mode it becomes unresponsive to ctrl-c; and when using as a shared library it becomes unresponsive to command “bg_halt”. To see this happening in interactive mode, just do the following:
1) ngspice <any attached="" file="">
2) run
Although the attached circuits are somewhat peculiar, in the sense that it is not obvious what the purpose of those meshes of mosfets is, they seem to be formally/syntactically correct (there are no singular nodes, no ill-defined components or analysis, and so on). So, it is not obvious to me why ngspice hangs when simulating those circuits. Does anyone have any hint about what is happening?
Thanks a lot.
Miguel</any>

1 Attachments

Discussion

  • marcel hendrix

    marcel hendrix - 2017-12-05

    Executing a transient analysis over any of the attached circuits
    leads to ngspice hanging: in interactive mode it becomes unresponsive
    to ctrl-c;

    With ngspice-27, in console mode, three Ctrl-Cs break the .OP pass (this
    is a new feature). I only tried problematic_circuit_after_unsuccessful_bg_halt_0.cir .

    ...
    Trying gmin =   9.7119E-12 Note: One successful gmin step
    Trying gmin =   9.7119E-12 Note: One successful gmin step
    Trying gmin =   9.7119E-12
    Interrupted again (ouch)
    
    Killing, since 3 interrupts have been requested
    
    
    ERROR: fatal error in ngspice, exit(1)
    Note: One successful gmin step
    

    As shown, the .OP makes no progress, which might be
    a logical / algorithmic bug for a corner case.

    -marcel

     
    • marcel hendrix

      marcel hendrix - 2017-12-05

      Converges (still difficult) when putting a 10 Ohms resistance
      in series with the PWL sources:

      Va      a1  0   DC 0 PWL (0 0  .999999 0 1 5    2.999999 5 3 0)
      Ra1     a1      1       10
      Vb      a2  0   DC 0 PWL (0 0 1.999999 0 2 5)
      Ra2     a2      2       10
      Vtgt    a3  0   DC 0 PWL (0 0  .999999 0 1 5    1.999999 5 2 0  2.999999  0 3 5)
      Ra3     a3    200       10
      

      Made minor adjustment here ".tran 1ms 4 0 1ms" and
      here ".option method=gear reltol=1m minbreak=200ps",
      but it also worked without these changes.
      The problem seems to be bad convergence on node 4 (or 5).

      Output:

      D:\spice\mhx\bug_problematic>spice64w problematic_circuit_after_unsuccessful_bg_halt_0_MOD.cir
      Using d:/spice64/bin/spinit
      ******
      ** ngspice-27 : Circuit level simulation program
      ** The U. C. Berkeley CAD Group
      ** Copyright 1985-1994, Regents of the University of California.
      ** Please get your ngspice manual from http://ngspice.sourceforge.net/docs.html
      ** Please file your bug-reports at http://ngspice.sourceforge.net/bugrep.html
      ** Creation Date: Dec  2 2017   16:41:31
      ******
      Warning: no graphics interface!
       You may use command 'gnuplot'
       if GnuPlot is installed.
      
      Circuit: xor gate with mosfets
      
              xor gate with mosfets
      
           1 : xor gate with mosfets
           4 : vdd 7 0 5v
           5 : rload1 7 3 10k
           6 : rload2 3 0 10k
           8 : mp1 2 3 5 7 my_pmos w=40u l=0.8u
           9 : mp2 4 1 2 7 my_pmos w=40u l=0.8u
          10 : mp3 3 2 1 7 my_pmos w=40u l=0.8u
          11 : mp4 6 10 13 7 my_pmos w=40u l=0.8u
          12 : mp5 3 4 15 7 my_pmos w=40u l=0.8u
          13 : mp6 13 15 2 7 my_pmos w=40u l=0.8u
          14 : mp7 11 3 5 7 my_pmos w=40u l=0.8u
          15 : mp8 2 2 2 7 my_pmos w=40u l=0.8u
          16 : mp9 5 15 1 7 my_pmos w=40u l=0.8u
          17 : mp10 10 7 1 7 my_pmos w=40u l=0.8u
          18 : mp11 4 10 15 7 my_pmos w=40u l=0.8u
          19 : mp12 15 4 4 7 my_pmos w=40u l=0.8u
          21 : mn1 5 9 4 0 my_nmos w=40u l=0.8u
          22 : mn2 10 8 9 0 my_nmos w=40u l=0.8u
          23 : mn3 6 10 11 0 my_nmos w=40u l=0.8u
          24 : mn4 6 4 9 0 my_nmos w=40u l=0.8u
          25 : mn5 12 3 4 0 my_nmos w=40u l=0.8u
          26 : mn6 10 1 8 0 my_nmos w=40u l=0.8u
          27 : mn7 0 4 8 0 my_nmos w=40u l=0.8u
          28 : mn8 2 12 12 0 my_nmos w=40u l=0.8u
          29 : mn9 12 15 0 0 my_nmos w=40u l=0.8u
          30 : mn10 1 1 6 0 my_nmos w=40u l=0.8u
          31 : mn11 5 12 5 0 my_nmos w=40u l=0.8u
          32 : mn12 0 4 12 0 my_nmos w=40u l=0.8u
          33 : va a1 0 dc 0 pwl (0 0 .999999 0 1 5 2.999999 5 3 0)
          34 : ra1 a1 1 10
          35 : vb a2 0 dc 0 pwl (0 0 1.999999 0 2 5)
          36 : ra2 a2 2 10
          37 : vtgt a3 0 dc 0 pwl (0 0 .999999 0 1 5 1.999999 5 2 0 2.999999 0 3 5)
          38 : ra3 a3 200 10
          39 : rtgt 200 0 1k
          40 : .model my_pmos pmos
          41 : .model my_nmos nmos
          42 : .tran 1ms 4 0 1ms
          43 : .option method=gear reltol=1m minbreak=200ps
        1618 : .end
      Doing analysis at TEMP = 27.000000 and TNOM = 27.000000
      
      Note: Starting dynamic gmin stepping
      Trying gmin =   1.0000E-03 Note: One successful gmin step
      Trying gmin =   1.0000E-04 Note: One successful gmin step
      Trying gmin =   1.0000E-05 Note: One successful gmin step
      Trying gmin =   1.0000E-06 Note: One successful gmin step
      Trying gmin =   1.0000E-07 Note: One successful gmin step
      Trying gmin =   1.0000E-08 Note: One successful gmin step
      Trying gmin =   1.0000E-09 Note: One successful gmin step
      Trying gmin =   1.0000E-10 Note: One successful gmin step
      Trying gmin =   1.0000E-11 Note: One successful gmin step
      Trying gmin =   3.1623E-12 Warning: Further gmin increment
      Trying gmin =   7.4989E-12 Note: One successful gmin step
      Trying gmin =   4.8697E-12 Note: One successful gmin step
      Trying gmin =   3.9242E-12 Note: One successful gmin step
      Trying gmin =   2.8387E-12 Note: One successful gmin step
      Trying gmin =   1.7466E-12 Note: One successful gmin step
      Trying gmin =   1.0000E-12 Note: One successful gmin step
      Note: Dynamic gmin stepping completed
      
      Initial Transient Solution
      --------------------------
      
      Node                                   Voltage
      ----                                   -------
      7                                            5
      3                                     0.721468
      2                                   0.00032893
      5                                     0.448363
      4                                     0.234683
      1                                   0.00260018
      6                                     0.448339
      10                                 1.94886e-06
      13                                    0.448339
      15                                    0.448185
      11                                    0.721553
      9                                     0.234651
      8                                   2.1348e-08
      12                                    0.109525
      a1                                           0
      a2                                           0
      a3                                           0
      200                                          0
      vtgt#branch                                  0
      vb#branch                           3.2893e-05
      va#branch                          0.000260018
      vdd#branch                        -0.000427853
      
      
      
      No. of Data Rows : 4059
      Total elapsed time: 0.281 seconds.
      Total DRAM available = 32702.824219 MB.
      DRAM currently available = 28108.609375 MB.
      Total ngspice program size = 5.843750 MB.
      
      Number of lines in the deck = 1618
      Netlist loading time = 0
      Netlist parsing time = 0
      
      Nominal temperature = 27
      Operating temperature = 27
      Total iterations = 28923
      Transient iterations = 28552
      Circuit Equations = 23
      Circuit original non-zeroes = 136
      Circuit fill-in non-zeroes = 16
      Circuit total non-zeroes = 152
      Transient timepoints = 4059
      Accepted timepoints = 4059
      Rejected timepoints = 0
      Total analysis time = 0.203
      Matrix load time = 0.093
      Matrix synchronize time = 0
      Matrix reorder time = 0
      Matrix factor time = 0.062
      Matrix solve time = 0
      Transient analysis time = 0.187
      Transient load time = 0.093
      Transient sync time = 0
      Transient factor time = 0.062
      Transient solve time = 0
      Transient trunc time = 0.016
      Transient iters per point = 0
      AC analysis time = 0
      AC load time = 0
      AC sync time = 0
      AC factor time = 0
      AC solve time = 0
      
       

      Last edit: marcel hendrix 2017-12-05
  • Holger Vogt

    Holger Vogt - 2017-12-05
    • status: open --> open-accepted
    • assigned_to: Holger Vogt
     
  • Holger Vogt

    Holger Vogt - 2017-12-05

    The bug is that ngspice enters a loop and does not leave it anymore. This occurs in function dynamic_gmin() in cktop.c.

    This should not happen, despite of what customer input we have. If there is no convergence, ngspice should simply stop with an error message. I will look into it.

    Holger

     
    • Holger Vogt

      Holger Vogt - 2017-12-05

      cktop.c:186 should read
      factor = max(sqrt(factor), 1.00005); /* has to be larger than 1 */

      Holger

       
      • Miguel Gomes

        Miguel Gomes - 2017-12-05

        Hi.
        Thank you all for your feedback on this topic.
        Holger, I’ll try recompiling ngspice (still in v26) with your suggestion: updating cktop.c so that line 186 reads
        factor = max(sqrt(factor), 1.00005); /* has to be larger than 1 */
        The thing is that in my machine, line 186 of cktop.c is empty (and I’m pretty sure I never edit this file before) but it may just be a matter of different file’s version. In my version of cktop.c, some lines around line 190 read like this:

        (...)
        182     for (n = ckt->CKTnodes; n; n = n->next) {
        183         OldRhsOld[i] = ckt->CKTrhsOld[n->number];
        184         i++;
        185     }
        186
        187     for (i = 0; i < ckt->CKTnumStates; i++) {
        188         OldCKTstate0[i] = ckt->CKTstate0[i];
        189     }
        190
        191     if (iters <= (ckt->CKTdcTrcvMaxIter / 4)) {
        192         factor *= sqrt (factor);
        193         if (factor > ckt->CKTgminFactor)
        194             factor = ckt->CKTgminFactor;
        195     }
        196
        197     if (iters > (3 * ckt->CKTdcTrcvMaxIter / 4))
        198         factor = sqrt (factor);
        199
        200     OldGmin = ckt->CKTdiagGmin;
        (...)
        

        So, I’ll assume that, according to this file extract, it is line 198 that, instead of reading
        factor = sqrt (factor);
        should read
        factor = max(sqrt(factor), 1.00005); /* has to be larger than 1 */
        Am I right?

        Again, thanks very much.
        Miguel

         
        • Holger Vogt

          Holger Vogt - 2017-12-05

          That's right.

          Holger

           
        • marcel hendrix

          marcel hendrix - 2017-12-05

          Dear Miguel,

          Holger is 100% right that you have found a nasty ng-spice
          bug that should be killed forthwith.

          However, you may try your circuit with the BSIM4 and a (then)
          more appropriate Vdd = 1.8V and drive level of 1.2V. (Search the
          manual for examples on BSIM4, e.g. 17.9 p337.)
          I found it instructive to experiment with levels 1 - 54
          and try different supply voltages -- your circuit clearly
          shows how important it is to have a good model with good
          parameters.

          -marcel

          PS: Shortened the simulation time from 4s to 4 us.

          XOR GATE with MOSFETs
          VDD     7   0   1.8V
          Rload1  7   3   10k
          Rload2  3   0   10k
          
          * PMOS Transistors
          Mp1     2   3   5   7   MY_PMOS W=40u L=0.8u
          Mp2     4   1   2   7   MY_PMOS W=40u L=0.8u
          Mp3     3   2   1   7   MY_PMOS W=40u L=0.8u
          Mp4     6   10  13  7   MY_PMOS W=40u L=0.8u
          Mp5     3   4   15  7   MY_PMOS W=40u L=0.8u
          Mp6     13  15  2   7   MY_PMOS W=40u L=0.8u
          Mp7     11  3   5   7   MY_PMOS W=40u L=0.8u
          Mp8     2   2   2   7   MY_PMOS W=40u L=0.8u
          Mp9     5   15  1   7   MY_PMOS W=40u L=0.8u
          Mp10    10  7   1   7   MY_PMOS W=40u L=0.8u
          Mp11    4   10  15  7   MY_PMOS W=40u L=0.8u
          Mp12    15  4   4   7   MY_PMOS W=40u L=0.8u
          * NMOS Transistors
          Mn1     5   9   4   0   MY_NMOS W=40u L=0.8u
          Mn2     10  8   9   0   MY_NMOS W=40u L=0.8u
          Mn3     6   10  11  0   MY_NMOS W=40u L=0.8u
          Mn4     6   4   9   0   MY_NMOS W=40u L=0.8u
          Mn5     12  3   4   0   MY_NMOS W=40u L=0.8u
          Mn6     10  1   8   0   MY_NMOS W=40u L=0.8u
          Mn7     0   4   8   0   MY_NMOS W=40u L=0.8u
          Mn8     2   12  12  0   MY_NMOS W=40u L=0.8u
          Mn9     12  15  0   0   MY_NMOS W=40u L=0.8u
          Mn10    1   1   6   0   MY_NMOS W=40u L=0.8u
          Mn11    5   12  5   0   MY_NMOS W=40u L=0.8u
          Mn12    0   4   12  0   MY_NMOS W=40u L=0.8u
          Va      1   0   DC 0 PWL (0 0  0.9u 0  1u 1.2                    2.9u 1.2  3u 0)
          Vb      2   0   DC 0 PWL (0 0                  1.9u 0    2u 1.2)
          Vtgt    3   0   DC 0 PWL (0 0  0.9u 0  1u 1.2  1.9u 1.2  2u 0    2.9u 0    3u 1.2)
          Rtgt    200 0   1k
          .model MY_PMOS PMOS(level=8)
          .model MY_NMOS NMOS(level=8)
          
          .options method=gear reltol=1m
          .tran 0 4u
          
          .end
          
           

          Last edit: marcel hendrix 2017-12-05
  • Francesco Lannutti

    Hi Holger,
    it should exit from dynamic_gmin at a certain point, if I remember correctly.
    The problem is that it may take a very long time, depending on the circuit.

    I will wait for your findings.

    Fra

     
  • Miguel Gomes

    Miguel Gomes - 2017-12-11

    Hi.
    I tried Holger’s suggestion and it worked (ngspice stopped hanging when simulating those circuits).
    Thank you all.

     
  • Holger Vogt

    Holger Vogt - 2018-03-16
    • status: open-accepted --> closed-fixed
     

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