#38 Mixed sized operands

[Christopher L. Felton]

It was reported that expression like the following fail VHDL conversion:

a = Signal(intbv(0, min=0, max=8))
b = Signal(intbv(0, min=0, max=8))
c = Signal(intbv(0, min=0, max=4))
d = Signal(intbv(0, min=0, max=4))
...
out.next = a+b+(c+d)

The VHDL conversion will resize the above incorrectly and the converted VHDL will fail VHDL analyze (e.g. ghdl -a <converted.vhd>

Tests can be found here:
https://bitbucket.org/cfelton/myhdl_tests/src/tip/test_math.py?at=default
(main file attached by needs support files from the repo above)
https://bitbucket.org/cfelton/myhdl_tests/overview

mailing-list conversation:
http://comments.gmane.org/gmane.comp.python.myhdl/3005

[Christopher L. Felton]

[Jan Decaluwe]

That example does analyze Ok.

I assume this refers to the resizing bugs as discussed on the mailing list, with the wrong behavior in VHDL simulation.

When providing an attached test case, please make it standalone without dependencies.

[Christopher L. Felton]

Correct, the error does not occur during analysis, while
trying to test this I inadvertently reported the incorrect
issue. The bug does exist (see second reply post with
modified-converted VHDL testbench).

I was trying to verify this error with the testbench
conversion, but the initial values for the signals in the
testbench conversion are of the wrong type, this is what
causes the analysis error but this error is, possibly,
for another bug ticket.

Attached is the non-dependent test example.

[Christopher L. Felton]

Here is an example of the failing generated VHDL.

The attached VHDL file is a slightly modified
version of the converted testbench + module.

Update: The above non-dependent test should work. Simply run:

python myhdl_bug_3603073.py

You have to actually review the output because the last stage
will throw and assert even when the simulation succeeds, this is
because an assertion is used to finish the VHDL simulation.

All this might be a moot point, after posting this and the
previous I noticed there were some posts on the mailing-list
that might make most of this irrelevant.

[Christopher L. Felton]

I am unable to close this ticket. There is no "edit"
in the upper right hand corner? I would assume the
creator of a ticket should be able to modify it?

[Jan Decaluwe]

Chris, I notice it seems to work now. I recently upgrade the bug tracker (and the project) to SF's new system. There are some permission associated to roles. I gave the Developer role permission to update bug and feature tickets, and added you as a Developer.

[Christopher L. Felton]

• Description has changed:

Diff:

--- old
+++ new
@@ -1,4 +1,3 @@
-
 It was reported that expression like the following fail VHDL conversion:

 a = Signal\(intbv\(0, min=0, max=8\)\)

• status: pending-invalid --> closed-fixed