Given the existence of 'downrange' it's probably not worthwhile to support negative steps. So I propose to flag an error instead. Moreover, for VHDL, steps other than 1 can't be supported anyway (because for-loops are done differently in VHDL). So steps other than 1 are flagged as error by the VHDL convertor.
Implemented in 0.6dev7.
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Given the existence of 'downrange' it's probably not worthwhile to support negative steps. So I propose to flag an error instead. Moreover, for VHDL, steps other than 1 can't be supported anyway (because for-loops are done differently in VHDL). So steps other than 1 are flagged as error by the VHDL convertor.
Implemented in 0.6dev7.
Logged In: YES
user_id=1312539
Originator: NO
This Tracker item was closed automatically by the system. It was
previously set to a Pending status, and the original submitter
did not respond within 30 days (the time period specified by
the administrator of this Tracker).