I've just started taking a look at makepp and thus far I like what I
very much! It seems like a great tool.
Experimenting around, I was wondering if it would be possible
to use wildcards to locate and include lower-level makefiles.
Something along the lines of:
include_makefile **/makefile
I realize this may be a bad idea, but I was just curious. Ideally, the above would work with repositories as well (i.e., recursively
follow both the local and the repository directory structures, looking for makefiles).
Finally, I was wondering what the status of makepp is. Is any active development on-going or has it pretty much stabilized?
Many thanks!
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Experimenting further, I realize my request may not be necessary.
Having a top-level makefile that contains nothing but
$(.phony default): **/*.sl
looks like it does what I want. Namely, the above appears to recursively include all lower-level makefiles, then build whatever .sl targets it can find.
On a somewhat related note, I do have another question...
Due to the directory structure of my project, I would very much like to have a production rule along the lines of:
libmylib.sl: **/*.o
...stuff...
...except, I don't want the ** recursion to continue to leaf directories in all cases. There might be a lower-level directory
that contains its *own* makefile; the .c and .o files therein get dropped into a different shared library.
So, the ** recursion needs to stop when it encounters a level with another makefile. At least, that's one way to think of it.
This behavior could be coded in a small Perl function, I realize,
but would such a function work with respositories?
Is there any hope of being able to implement this behavior, or should I instead push to have the directory structure re-organized?
Thanks,
Matt
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What you have will automatically include all Makefiles if the target that you want to build is contained in the same directory as the Makefile (which is frequently the way people write Makefiles). Usually the only reason you need an explicit load_makefile statement is when a makefile has a target that isn't in the same directory.
By the way, I think you wanted
$(phony default): **/*.sl
(i.e., remove the . in front of phony).
In response to your second question, there might be several things you could do. If you have a bunch of directories, but they are all at the same level, you could do something like this:
libmylib.sl: */*/*.o
which will go down only two directory levels, and won't use .o files three levels down.
Alternatively, if the non-leaf directories all share some common pattern which can be captured in a unix wildcard (e.g., they all match "lib*"), then you could do something like this:
libmylib.sl: **/lib*/*.o
Otherwise, I don't think you can really do what you're asking for the way it's currently set up. You could do some perl code, or it might be easier (though maybe a bit slower) to do something like this:
MYLIB_DIRS := $(shell find . -name '*' -a -type d -other find options)
libmylib.sl: $(MYLIB_DIRS)/*.o
Just make sure you put the directory list in a variable instead of specifying it directly on the dependency list, like this:
libmylib.sl: $(shell shellcmd)/*.o
because then it will get executed more than once, which could be slow. Also note that I used the := syntax rather than just ordinary assignment; again, this is to prevent it from being executed more than once.
Without knowing more about your specific situation, I don't think I can give any more useful suggestions.
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(1) Including all makefiles using the "include **/makefile" will probably not do what you want because it will process each makefile's rules using the current directory as the working directory. Maybe what you meant was
load_makefile **/Makefile
which as far as I know should work just fine and cause no problems, other than it might be a little slow to start up if you have a huge directory hierarchy.
(2) Makepp has been stable for the last several years. I've made a few bug-fixes, but no new features. I have some plans for future development, and I'm definitely open to new feature requests, but I'm not putting a lot of work into it right now. Some of the internals of the code need to be cleaned up, and the API modularized, but I don't anticipate any changes that should break existing Makeppfiles.
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a try in a test tree, I end up seeing the following behavior:
Loading makefile /home/lovell/programs/**/makefile
makepp: No rule to make /home/lovell/programs/**/makefile
I've seen instances where several makefiles do get loaded, but there always seems to be an explicit "**/makefile" at the end, which causes the error above.
Thanks for the quick response!
Matt
If you would like to refer to this comment somewhere else in this project, copy and paste the following link:
Hello,
I've just started taking a look at makepp and thus far I like what I
very much! It seems like a great tool.
Experimenting around, I was wondering if it would be possible
to use wildcards to locate and include lower-level makefiles.
Something along the lines of:
include_makefile **/makefile
I realize this may be a bad idea, but I was just curious. Ideally, the above would work with repositories as well (i.e., recursively
follow both the local and the repository directory structures, looking for makefiles).
Finally, I was wondering what the status of makepp is. Is any active development on-going or has it pretty much stabilized?
Many thanks!
Experimenting further, I realize my request may not be necessary.
Having a top-level makefile that contains nothing but
$(.phony default): **/*.sl
looks like it does what I want. Namely, the above appears to recursively include all lower-level makefiles, then build whatever .sl targets it can find.
On a somewhat related note, I do have another question...
Due to the directory structure of my project, I would very much like to have a production rule along the lines of:
libmylib.sl: **/*.o
...stuff...
...except, I don't want the ** recursion to continue to leaf directories in all cases. There might be a lower-level directory
that contains its *own* makefile; the .c and .o files therein get dropped into a different shared library.
So, the ** recursion needs to stop when it encounters a level with another makefile. At least, that's one way to think of it.
This behavior could be coded in a small Perl function, I realize,
but would such a function work with respositories?
Is there any hope of being able to implement this behavior, or should I instead push to have the directory structure re-organized?
Thanks,
Matt
What you have will automatically include all Makefiles if the target that you want to build is contained in the same directory as the Makefile (which is frequently the way people write Makefiles). Usually the only reason you need an explicit load_makefile statement is when a makefile has a target that isn't in the same directory.
By the way, I think you wanted
$(phony default): **/*.sl
(i.e., remove the . in front of phony).
In response to your second question, there might be several things you could do. If you have a bunch of directories, but they are all at the same level, you could do something like this:
libmylib.sl: */*/*.o
which will go down only two directory levels, and won't use .o files three levels down.
Alternatively, if the non-leaf directories all share some common pattern which can be captured in a unix wildcard (e.g., they all match "lib*"), then you could do something like this:
libmylib.sl: **/lib*/*.o
Otherwise, I don't think you can really do what you're asking for the way it's currently set up. You could do some perl code, or it might be easier (though maybe a bit slower) to do something like this:
MYLIB_DIRS := $(shell find . -name '*' -a -type d -other find options)
libmylib.sl: $(MYLIB_DIRS)/*.o
Just make sure you put the directory list in a variable instead of specifying it directly on the dependency list, like this:
libmylib.sl: $(shell shellcmd)/*.o
because then it will get executed more than once, which could be slow. Also note that I used the := syntax rather than just ordinary assignment; again, this is to prevent it from being executed more than once.
Without knowing more about your specific situation, I don't think I can give any more useful suggestions.
(1) Including all makefiles using the "include **/makefile" will probably not do what you want because it will process each makefile's rules using the current directory as the working directory. Maybe what you meant was
load_makefile **/Makefile
which as far as I know should work just fine and cause no problems, other than it might be a little slow to start up if you have a huge directory hierarchy.
(2) Makepp has been stable for the last several years. I've made a few bug-fixes, but no new features. I have some plans for future development, and I'm definitely open to new feature requests, but I'm not putting a lot of work into it right now. Some of the internals of the code need to be cleaned up, and the API modularized, but I don't anticipate any changes that should break existing Makeppfiles.
Hmm...if I give
load_makefile **/Makefile
a try in a test tree, I end up seeing the following behavior:
Loading makefile /home/lovell/programs/**/makefile
makepp: No rule to make /home/lovell/programs/**/makefile
I've seen instances where several makefiles do get loaded, but there always seems to be an explicit "**/makefile" at the end, which causes the error above.
Thanks for the quick response!
Matt