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From: James S. <jsi...@us...> - 2001-09-04 16:15:54
|
Update of /cvsroot/linux-mips/linux/include/asm-mips64
In directory usw-pr-cvs1:/tmp/cvs-serv13786
Modified Files:
io.h
Log Message:
Synced up.
Index: io.h
===================================================================
RCS file: /cvsroot/linux-mips/linux/include/asm-mips64/io.h,v
retrieving revision 1.3
retrieving revision 1.4
diff -C2 -d -r1.3 -r1.4
*** io.h 2001/07/24 16:56:41 1.3
--- io.h 2001/09/04 16:15:50 1.4
***************
*** 37,41 ****
* the drivers to handle caching properly.
*/
! extern inline void *
ioremap(unsigned long offset, unsigned long size)
{
--- 37,41 ----
* the drivers to handle caching properly.
*/
! static inline void *
ioremap(unsigned long offset, unsigned long size)
{
***************
*** 47,51 ****
* combining or read caching is not desirable.
*/
! extern inline void *
ioremap_nocache (unsigned long offset, unsigned long size)
{
--- 47,51 ----
* combining or read caching is not desirable.
*/
! static inline void *
ioremap_nocache (unsigned long offset, unsigned long size)
{
***************
*** 53,57 ****
}
! extern inline void iounmap(void *addr)
{
}
--- 53,57 ----
}
! static inline void iounmap(void *addr)
{
}
***************
*** 103,112 ****
* These are trivial on the 1:1 Linux/MIPS mapping
*/
! extern inline unsigned long virt_to_phys(volatile void * address)
{
return (unsigned long)address - PAGE_OFFSET;
}
! extern inline void * phys_to_virt(unsigned long address)
{
return (void *)(address + PAGE_OFFSET);
--- 103,112 ----
* These are trivial on the 1:1 Linux/MIPS mapping
*/
! static inline unsigned long virt_to_phys(volatile void * address)
{
return (unsigned long)address - PAGE_OFFSET;
}
! static inline void * phys_to_virt(unsigned long address)
{
return (void *)(address + PAGE_OFFSET);
***************
*** 162,166 ****
#define __IN1(t,s) \
! extern __inline__ t __in##s(unsigned long port) { t _v;
/*
--- 162,166 ----
#define __IN1(t,s) \
! extern inline t __in##s(unsigned long port) { t _v;
/*
***************
*** 361,373 ****
/* This is for example for IP27. */
! extern inline void dma_cache_wback_inv(unsigned long start, unsigned long size)
{
}
! extern inline void dma_cache_wback(unsigned long start, unsigned long size)
{
}
! extern inline void dma_cache_inv(unsigned long start, unsigned long size)
{
}
--- 361,373 ----
/* This is for example for IP27. */
! static inline void dma_cache_wback_inv(unsigned long start, unsigned long size)
{
}
! static inline void dma_cache_wback(unsigned long start, unsigned long size)
{
}
! static inline void dma_cache_inv(unsigned long start, unsigned long size)
{
}
|
|
From: James S. <jsi...@us...> - 2001-09-04 16:15:31
|
Update of /cvsroot/linux-mips/linux/include/asm-mips64
In directory usw-pr-cvs1:/tmp/cvs-serv13690
Modified Files:
bitops.h
Log Message:
Synced up.
Index: bitops.h
===================================================================
RCS file: /cvsroot/linux-mips/linux/include/asm-mips64/bitops.h,v
retrieving revision 1.2
retrieving revision 1.3
diff -C2 -d -r1.2 -r1.3
*** bitops.h 2001/07/09 19:28:48 1.2
--- bitops.h 2001/09/04 16:15:28 1.3
***************
*** 31,36 ****
* restricted to acting on a single-word quantity.
*/
! extern __inline__ void
! set_bit(unsigned long nr, volatile void *addr)
{
unsigned long *m = ((unsigned long *) addr) + (nr >> 6);
--- 31,35 ----
* restricted to acting on a single-word quantity.
*/
! static inline void set_bit(unsigned long nr, volatile void *addr)
{
unsigned long *m = ((unsigned long *) addr) + (nr >> 6);
***************
*** 56,60 ****
* may be that only one operation succeeds.
*/
! extern __inline__ void __set_bit(int nr, volatile void * addr)
{
unsigned long * m = ((unsigned long *) addr) + (nr >> 6);
--- 55,59 ----
* may be that only one operation succeeds.
*/
! static inline void __set_bit(int nr, volatile void * addr)
{
unsigned long * m = ((unsigned long *) addr) + (nr >> 6);
***************
*** 73,78 ****
* in order to ensure changes are visible on other processors.
*/
! extern __inline__ void
! clear_bit(unsigned long nr, volatile void *addr)
{
unsigned long *m = ((unsigned long *) addr) + (nr >> 6);
--- 72,76 ----
* in order to ensure changes are visible on other processors.
*/
! static inline void clear_bit(unsigned long nr, volatile void *addr)
{
unsigned long *m = ((unsigned long *) addr) + (nr >> 6);
***************
*** 100,105 ****
* restricted to acting on a single-word quantity.
*/
! extern __inline__ void
! change_bit(unsigned long nr, volatile void *addr)
{
unsigned long *m = ((unsigned long *) addr) + (nr >> 6);
--- 98,102 ----
* restricted to acting on a single-word quantity.
*/
! static inline void change_bit(unsigned long nr, volatile void *addr)
{
unsigned long *m = ((unsigned long *) addr) + (nr >> 6);
***************
*** 124,128 ****
* may be that only one operation succeeds.
*/
! extern __inline__ void __change_bit(int nr, volatile void * addr)
{
unsigned long * m = ((unsigned long *) addr) + (nr >> 6);
--- 121,125 ----
* may be that only one operation succeeds.
*/
! static inline void __change_bit(int nr, volatile void * addr)
{
unsigned long * m = ((unsigned long *) addr) + (nr >> 6);
***************
*** 139,144 ****
* It also implies a memory barrier.
*/
! extern __inline__ unsigned long
! test_and_set_bit(unsigned long nr, volatile void *addr)
{
unsigned long *m = ((unsigned long *) addr) + (nr >> 6);
--- 136,141 ----
* It also implies a memory barrier.
*/
! static inline unsigned long test_and_set_bit(unsigned long nr,
! volatile void *addr)
{
unsigned long *m = ((unsigned long *) addr) + (nr >> 6);
***************
*** 169,174 ****
* but actually fail. You must protect multiple accesses with a lock.
*/
! extern __inline__ int
! __test_and_set_bit(int nr, volatile void * addr)
{
unsigned long mask, retval;
--- 166,170 ----
* but actually fail. You must protect multiple accesses with a lock.
*/
! static inline int __test_and_set_bit(int nr, volatile void *addr)
{
unsigned long mask, retval;
***************
*** 191,196 ****
* It also implies a memory barrier.
*/
! extern __inline__ unsigned long
! test_and_clear_bit(unsigned long nr, volatile void *addr)
{
unsigned long *m = ((unsigned long *) addr) + (nr >> 6);
--- 187,192 ----
* It also implies a memory barrier.
*/
! static inline unsigned long test_and_clear_bit(unsigned long nr,
! volatile void *addr)
{
unsigned long *m = ((unsigned long *) addr) + (nr >> 6);
***************
*** 222,227 ****
* but actually fail. You must protect multiple accesses with a lock.
*/
! extern __inline__ int
! __test_and_clear_bit(int nr, volatile void * addr)
{
unsigned long mask, retval;
--- 218,222 ----
* but actually fail. You must protect multiple accesses with a lock.
*/
! static inline int __test_and_clear_bit(int nr, volatile void * addr)
{
unsigned long mask, retval;
***************
*** 244,249 ****
* It also implies a memory barrier.
*/
! extern __inline__ unsigned long
! test_and_change_bit(unsigned long nr, volatile void *addr)
{
unsigned long *m = ((unsigned long *) addr) + (nr >> 6);
--- 239,244 ----
* It also implies a memory barrier.
*/
! static inline unsigned long test_and_change_bit(unsigned long nr,
! volatile void *addr)
{
unsigned long *m = ((unsigned long *) addr) + (nr >> 6);
***************
*** 274,279 ****
* but actually fail. You must protect multiple accesses with a lock.
*/
! extern __inline__ int
! __test_and_change_bit(int nr, volatile void * addr)
{
unsigned long mask, retval;
--- 269,273 ----
* but actually fail. You must protect multiple accesses with a lock.
*/
! static inline int __test_and_change_bit(int nr, volatile void *addr)
{
unsigned long mask, retval;
***************
*** 292,297 ****
* @addr: Address to start counting from
*/
! extern __inline__ unsigned long
! test_bit(int nr, volatile void * addr)
{
return 1UL & (((volatile unsigned long *) addr)[nr >> 6] >> (nr & 0x3f));
--- 286,290 ----
* @addr: Address to start counting from
*/
! static inline unsigned long test_bit(int nr, volatile void * addr)
{
return 1UL & (((volatile unsigned long *) addr)[nr >> 6] >> (nr & 0x3f));
***************
*** 310,315 ****
* containing a bit.
*/
! extern __inline__ int
! find_first_zero_bit (void *addr, unsigned size)
{
unsigned long dummy;
--- 303,307 ----
* containing a bit.
*/
! static inline int find_first_zero_bit (void *addr, unsigned size)
{
unsigned long dummy;
***************
*** 359,364 ****
* @size: The maximum size to search
*/
! extern __inline__ int
! find_next_zero_bit (void * addr, int size, int offset)
{
unsigned int *p = ((unsigned int *) addr) + (offset >> 5);
--- 351,355 ----
* @size: The maximum size to search
*/
! static inline int find_next_zero_bit (void * addr, int size, int offset)
{
unsigned int *p = ((unsigned int *) addr) + (offset >> 5);
***************
*** 403,407 ****
* Undefined if no zero exists, so code should check against ~0UL first.
*/
! extern __inline__ unsigned long ffz(unsigned long word)
{
unsigned long k;
--- 394,398 ----
* Undefined if no zero exists, so code should check against ~0UL first.
*/
! static inline unsigned long ffz(unsigned long word)
{
unsigned long k;
***************
*** 454,459 ****
* @size: The maximum size to search
*/
! extern __inline__ unsigned long
! find_next_zero_bit(void *addr, unsigned long size, unsigned long offset)
{
unsigned long *p = ((unsigned long *) addr) + (offset >> 6);
--- 445,450 ----
* @size: The maximum size to search
*/
! static inline unsigned long find_next_zero_bit(void *addr, unsigned long size,
! unsigned long offset)
{
unsigned long *p = ((unsigned long *) addr) + (offset >> 6);
***************
*** 502,507 ****
#ifdef __MIPSEB__
! extern inline int
! ext2_set_bit(int nr,void * addr)
{
int mask, retval, flags;
--- 493,497 ----
#ifdef __MIPSEB__
! static inline int ext2_set_bit(int nr,void * addr)
{
int mask, retval, flags;
***************
*** 517,522 ****
}
! extern inline int
! ext2_clear_bit(int nr, void * addr)
{
int mask, retval, flags;
--- 507,511 ----
}
! static inline int ext2_clear_bit(int nr, void * addr)
{
int mask, retval, flags;
***************
*** 532,537 ****
}
! extern inline int
! ext2_test_bit(int nr, const void * addr)
{
int mask;
--- 521,525 ----
}
! static inline int ext2_test_bit(int nr, const void * addr)
{
int mask;
***************
*** 546,551 ****
ext2_find_next_zero_bit((addr), (size), 0)
! extern inline unsigned int
! ext2_find_next_zero_bit(void *addr, unsigned long size, unsigned long offset)
{
unsigned int *p = ((unsigned int *) addr) + (offset >> 5);
--- 534,540 ----
ext2_find_next_zero_bit((addr), (size), 0)
! static inline unsigned int ext2_find_next_zero_bit(void *addr,
! unsigned long size,
! unsigned long offset)
{
unsigned int *p = ((unsigned int *) addr) + (offset >> 5);
|
|
From: James S. <jsi...@us...> - 2001-09-04 16:15:17
|
Update of /cvsroot/linux-mips/linux/include/asm-mips64 In directory usw-pr-cvs1:/tmp/cvs-serv13615 Modified Files: asm.h Log Message: Synced up. Index: asm.h =================================================================== RCS file: /cvsroot/linux-mips/linux/include/asm-mips64/asm.h,v retrieving revision 1.4 retrieving revision 1.5 diff -C2 -d -r1.4 -r1.5 *** asm.h 2001/09/04 11:25:25 1.4 --- asm.h 2001/09/04 16:15:14 1.5 *************** *** 135,140 **** prefx hint,addr #else ! #define PREF(hint,addr) ! #define PREFX(hint,addr) #endif --- 135,140 ---- prefx hint,addr #else ! #define PREF ! #define PREFX #endif |
|
From: James S. <jsi...@us...> - 2001-09-04 16:14:45
|
Update of /cvsroot/linux-mips/linux/include/asm-mips In directory usw-pr-cvs1:/tmp/cvs-serv13409 Modified Files: time.h Log Message: Synced up. Index: time.h =================================================================== RCS file: /cvsroot/linux-mips/linux/include/asm-mips/time.h,v retrieving revision 1.4 retrieving revision 1.5 diff -C2 -d -r1.4 -r1.5 *** time.h 2001/08/25 06:24:46 1.4 --- time.h 2001/09/04 16:14:43 1.5 *************** *** 22,26 **** #include <linux/ptrace.h> /* for struct pt_regs */ #include <linux/linkage.h> /* for asmlinkage */ ! #include <linux/rtc.h> /* for struct rtc_time */ /* --- 22,26 ---- #include <linux/ptrace.h> /* for struct pt_regs */ #include <linux/linkage.h> /* for asmlinkage */ ! #include <linux/rtc.h> /* for struct rtc_time */ /* *************** *** 34,38 **** /* * to_tm() converts system time back to (year, mon, day, hour, min, sec). ! * It is intended to help implement rtc_set_time() functions. * Copied from PPC implementation. */ --- 34,38 ---- /* * to_tm() converts system time back to (year, mon, day, hour, min, sec). ! * It is intended to help implement rtc_set_time() functions. * Copied from PPC implementation. */ |
|
From: James S. <jsi...@us...> - 2001-09-04 16:14:13
|
Update of /cvsroot/linux-mips/linux/include/asm-mips In directory usw-pr-cvs1:/tmp/cvs-serv13268 Modified Files: mipsregs.h Log Message: Synced up. Index: mipsregs.h =================================================================== RCS file: /cvsroot/linux-mips/linux/include/asm-mips/mipsregs.h,v retrieving revision 1.6 retrieving revision 1.7 diff -C2 -d -r1.6 -r1.7 *** mipsregs.h 2001/08/16 17:24:22 1.6 --- mipsregs.h 2001/09/04 16:14:10 1.7 *************** *** 536,548 **** #define CEB_EXL 1 /* Count events with EXL = 1, ERL = 0 */ - #ifndef _LANGUAGE_ASSEMBLY - /* - * Functions to access the performance counter and control registers - */ - extern asmlinkage unsigned int read_perf_cntr(unsigned int counter); - extern asmlinkage void write_perf_cntr(unsigned int counter, unsigned int val); - extern asmlinkage unsigned int read_perf_cntl(unsigned int counter); - extern asmlinkage void write_perf_cntl(unsigned int counter, unsigned int val); - #endif - #endif /* _ASM_MIPSREGS_H */ --- 536,538 ---- |
|
From: James S. <jsi...@us...> - 2001-09-04 16:12:56
|
Update of /cvsroot/linux-mips/linux/include/asm-mips In directory usw-pr-cvs1:/tmp/cvs-serv12962 Modified Files: asm.h Log Message: Synced up. Index: asm.h =================================================================== RCS file: /cvsroot/linux-mips/linux/include/asm-mips/asm.h,v retrieving revision 1.1 retrieving revision 1.2 diff -C2 -d -r1.1 -r1.2 *** asm.h 2001/09/04 11:25:25 1.1 --- asm.h 2001/09/04 16:12:54 1.2 *************** *** 85,93 **** * EXPORT - export definition of symbol */ ! #define EXPORT(symbol) \ .globl symbol; \ symbol: /* * ABS - export absolute symbol */ --- 85,101 ---- * EXPORT - export definition of symbol */ ! #define EXPORT(symbol) \ .globl symbol; \ symbol: /* + * FEXPORT - export definition of a function symbol + */ + #define FEXPORT(symbol) \ + .globl symbol; \ + .type symbol,@function; \ + symbol: + + /* * ABS - export absolute symbol */ *************** *** 106,110 **** /* ! * Print formated string */ #define PRINT(string) \ --- 114,118 ---- /* ! * Print formatted string */ #define PRINT(string) \ *************** *** 139,143 **** * is one of them. So we should have an option not to use this instruction. */ ! #if (_MIPS_ISA == _MIPS_ISA_MIPS4) || (_MIPS_ISA == _MIPS_ISA_MIPS5) #define PREF(hint,addr) \ pref hint,addr --- 147,152 ---- * is one of them. So we should have an option not to use this instruction. */ ! #if (_MIPS_ISA == _MIPS_ISA_MIPS4 ) || (_MIPS_ISA == _MIPS_ISA_MIPS5) || \ ! (_MIPS_ISA == _MIPS_ISA_MIPS64) #define PREF(hint,addr) \ pref hint,addr *************** *** 145,150 **** prefx hint,addr #else ! #define PREF(hint,addr) ! #define PREFX(hint,addr) #endif --- 154,159 ---- prefx hint,addr #else ! #define PREF ! #define PREFX #endif *************** *** 184,203 **** 9: #endif /* (_MIPS_ISA == _MIPS_ISA_MIPS2) || (_MIPS_ISA == _MIPS_ISA_MIPS3) */ ! #if (_MIPS_ISA == _MIPS_ISA_MIPS4) || (_MIPS_ISA == _MIPS_ISA_MIPS5) #define MOVN(rd,rs,rt) \ movn rd,rs,rt #define MOVZ(rd,rs,rt) \ movz rd,rs,rt ! #endif /* (_MIPS_ISA == _MIPS_ISA_MIPS4) || (_MIPS_ISA == _MIPS_ISA_MIPS5) */ /* * Stack alignment */ ! #if (_MIPS_ISA == _MIPS_ISA_MIPS1) || (_MIPS_ISA == _MIPS_ISA_MIPS2) #define ALSZ 7 #define ALMASK ~7 #endif #if (_MIPS_ISA == _MIPS_ISA_MIPS3) || (_MIPS_ISA == _MIPS_ISA_MIPS4) || \ ! (_MIPS_ISA == _MIPS_ISA_MIPS5) #define ALSZ 15 #define ALMASK ~15 --- 193,214 ---- 9: #endif /* (_MIPS_ISA == _MIPS_ISA_MIPS2) || (_MIPS_ISA == _MIPS_ISA_MIPS3) */ ! #if (_MIPS_ISA == _MIPS_ISA_MIPS4 ) || (_MIPS_ISA == _MIPS_ISA_MIPS5) || \ ! (_MIPS_ISA == _MIPS_ISA_MIPS64) #define MOVN(rd,rs,rt) \ movn rd,rs,rt #define MOVZ(rd,rs,rt) \ movz rd,rs,rt ! #endif /* MIPS IV, MIPS V or MIPS64 */ /* * Stack alignment */ ! #if (_MIPS_ISA == _MIPS_ISA_MIPS1) || (_MIPS_ISA == _MIPS_ISA_MIPS2) || \ ! (_MIPS_ISA == _MIPS_ISA_MIPS32) #define ALSZ 7 #define ALMASK ~7 #endif #if (_MIPS_ISA == _MIPS_ISA_MIPS3) || (_MIPS_ISA == _MIPS_ISA_MIPS4) || \ ! (_MIPS_ISA == _MIPS_ISA_MIPS5) || (_MIPS_ISA == _MIPS_ISA_MIPS64) #define ALSZ 15 #define ALMASK ~15 *************** *** 217,221 **** * pointers etc. */ ! #if (_MIPS_ISA == _MIPS_ISA_MIPS1) || (_MIPS_ISA == _MIPS_ISA_MIPS2) #define REG_S sw #define REG_L lw --- 228,233 ---- * pointers etc. */ ! #if (_MIPS_ISA == _MIPS_ISA_MIPS1) || (_MIPS_ISA == _MIPS_ISA_MIPS2) || \ ! (_MIPS_ISA == _MIPS_ISA_MIPS32) #define REG_S sw #define REG_L lw *************** *** 224,228 **** #endif #if (_MIPS_ISA == _MIPS_ISA_MIPS3) || (_MIPS_ISA == _MIPS_ISA_MIPS4) || \ ! (_MIPS_ISA == _MIPS_ISA_MIPS5) #define REG_S sd #define REG_L ld --- 236,240 ---- #endif #if (_MIPS_ISA == _MIPS_ISA_MIPS3) || (_MIPS_ISA == _MIPS_ISA_MIPS4) || \ ! (_MIPS_ISA == _MIPS_ISA_MIPS5) || (_MIPS_ISA == _MIPS_ISA_MIPS64) #define REG_S sd #define REG_L ld *************** *** 362,371 **** * Some cp0 registers were extended to 64bit for MIPS III. */ ! #if (_MIPS_ISA == _MIPS_ISA_MIPS1) || (_MIPS_ISA == _MIPS_ISA_MIPS2) #define MFC0 mfc0 #define MTC0 mtc0 #endif #if (_MIPS_ISA == _MIPS_ISA_MIPS3) || (_MIPS_ISA == _MIPS_ISA_MIPS4) || \ ! (_MIPS_ISA == _MIPS_ISA_MIPS5) #define MFC0 dmfc0 #define MTC0 dmtc0 --- 374,384 ---- * Some cp0 registers were extended to 64bit for MIPS III. */ ! #if (_MIPS_ISA == _MIPS_ISA_MIPS1) || (_MIPS_ISA == _MIPS_ISA_MIPS2) || \ ! (_MIPS_ISA == _MIPS_ISA_MIPS32) #define MFC0 mfc0 #define MTC0 mtc0 #endif #if (_MIPS_ISA == _MIPS_ISA_MIPS3) || (_MIPS_ISA == _MIPS_ISA_MIPS4) || \ ! (_MIPS_ISA == _MIPS_ISA_MIPS5) || (_MIPS_ISA == _MIPS_ISA_MIPS64) #define MFC0 dmfc0 #define MTC0 dmtc0 |
|
From: James S. <jsi...@us...> - 2001-09-04 16:10:52
|
Update of /cvsroot/linux-mips/linux/fs/nfsd In directory usw-pr-cvs1:/tmp/cvs-serv12449 Removed Files: nfssvc.c Log Message: Synced up now. --- nfssvc.c DELETED --- |
|
From: James S. <jsi...@us...> - 2001-09-04 16:07:14
|
Update of /cvsroot/linux-mips/linux/drivers/pci In directory usw-pr-cvs1:/tmp/cvs-serv11173 Modified Files: pci.ids Log Message: Syncing. Index: pci.ids =================================================================== RCS file: /cvsroot/linux-mips/linux/drivers/pci/pci.ids,v retrieving revision 1.1 retrieving revision 1.2 diff -C2 -d -r1.1 -r1.2 *** pci.ids 2001/08/10 20:26:07 1.1 --- pci.ids 2001/09/04 16:07:11 1.2 *************** *** 724,729 **** 1033 8014 RCV56ACF 56k Voice Modem 009b Vrc5476 - 00a5 BCU - 00a6 AC97 Sound Card 1034 Framatome Connectors USA Inc. 1035 Comp. & Comm. Research Lab --- 724,727 ---- |
|
From: James S. <jsi...@us...> - 2001-09-04 16:05:19
|
Update of /cvsroot/linux-mips/linux/drivers/char
In directory usw-pr-cvs1:/tmp/cvs-serv10364
Modified Files:
dz.c
Log Message:
Syncing.
Index: dz.c
===================================================================
RCS file: /cvsroot/linux-mips/linux/drivers/char/dz.c,v
retrieving revision 1.3
retrieving revision 1.4
diff -C2 -d -r1.3 -r1.4
*** dz.c 2001/08/25 02:19:27 1.3
--- dz.c 2001/09/04 16:05:17 1.4
***************
*** 15,19 ****
* [09-JAN-99] triemer minor fix for schedule - due to removal of timeout
* field from "current" - somewhere between 2.1.121 and 2.1.131
! Qua Jun 27 15:02:26 BRT 2001
* [27-JUN-2001] Arnaldo Carvalho de Melo <ac...@co...> - cleanups
*
--- 15,19 ----
* [09-JAN-99] triemer minor fix for schedule - due to removal of timeout
* field from "current" - somewhere between 2.1.121 and 2.1.131
! Qua Jun 27 15:02:26 BRT 2001
* [27-JUN-2001] Arnaldo Carvalho de Melo <ac...@co...> - cleanups
[...2211 lines suppressed...]
if (!(tmp & mask)) {
! tmp |= mask; /* set the TX flag */
! dz_out(dz_console, DZ_TCR, tmp);
}
return 0;
}
! static struct console dz_sercons =
! {
name: "ttyS",
write: dz_console_print,
***************
*** 1631,1633 ****
}
! #endif /* ifdef CONFIG_SERIAL_CONSOLE */
--- 1614,1616 ----
}
! #endif /* CONFIG_SERIAL_CONSOLE */
|
|
From: James S. <jsi...@us...> - 2001-09-04 16:04:18
|
Update of /cvsroot/linux-mips/linux/arch/mips64/sgi-ip32
In directory usw-pr-cvs1:/tmp/cvs-serv10073
Modified Files:
ip32-pci-dma.c
Log Message:
Syncing.
Index: ip32-pci-dma.c
===================================================================
RCS file: /cvsroot/linux-mips/linux/arch/mips64/sgi-ip32/ip32-pci-dma.c,v
retrieving revision 1.1
retrieving revision 1.2
diff -C2 -d -r1.1 -r1.2
*** ip32-pci-dma.c 2001/08/24 19:01:26 1.1
--- ip32-pci-dma.c 2001/09/04 16:04:16 1.2
***************
*** 17,22 ****
#include <asm/ip32/mace.h>
- unsigned long bus_to_baddr[256] = { MACEPCI_SWAPPED_VIEW, 0, };
-
void *pci_alloc_consistent(struct pci_dev *hwdev, size_t size,
dma_addr_t * dma_handle)
--- 17,20 ----
***************
*** 32,36 ****
memset(ret, 0, size);
dma_cache_wback_inv((unsigned long) ret, size);
! *dma_handle = (bus_to_baddr[0] | __pa (ret));
}
return ret;
--- 30,34 ----
memset(ret, 0, size);
dma_cache_wback_inv((unsigned long) ret, size);
! *dma_handle = virt_to_bus(ret);
}
return ret;
|
|
From: James S. <jsi...@us...> - 2001-09-04 16:03:41
|
Update of /cvsroot/linux-mips/linux/arch/mips64/sgi-ip22 In directory usw-pr-cvs1:/tmp/cvs-serv9828 Modified Files: ip22-setup.c Log Message: Syncing. Index: ip22-setup.c =================================================================== RCS file: /cvsroot/linux-mips/linux/arch/mips64/sgi-ip22/ip22-setup.c,v retrieving revision 1.3 retrieving revision 1.4 diff -C2 -d -r1.3 -r1.4 *** ip22-setup.c 2001/09/04 11:25:24 1.3 --- ip22-setup.c 2001/09/04 16:03:38 1.4 *************** *** 37,44 **** extern void ip22_volume_set(unsigned char); - #if defined(CONFIG_SERIAL_CONSOLE) || defined(CONFIG_ARC_CONSOLE) - extern void console_setup(char *); - #endif - #define sgi_kh ((struct hpc_keyb *) (KSEG1 + 0x1fbd9800 + 64)) --- 37,40 ---- |
|
From: James S. <jsi...@us...> - 2001-09-04 16:03:26
|
Update of /cvsroot/linux-mips/linux/arch/mips64/sgi-ip22 In directory usw-pr-cvs1:/tmp/cvs-serv9777 Modified Files: ip22-berr.c Log Message: Syncing. Index: ip22-berr.c =================================================================== RCS file: /cvsroot/linux-mips/linux/arch/mips64/sgi-ip22/ip22-berr.c,v retrieving revision 1.2 retrieving revision 1.3 diff -C2 -d -r1.2 -r1.3 *** ip22-berr.c 2001/09/04 11:25:24 1.2 --- ip22-berr.c 2001/09/04 16:03:24 1.3 *************** *** 23,29 **** extern const struct exception_table_entry __stop___dbe_table[]; - extern void dump_tlb_addr(unsigned long addr); - extern void dump_tlb_all(void); - static inline unsigned long search_one_table(const struct exception_table_entry *first, --- 23,26 ---- *************** *** 70,74 **** !mp->archdata_start) continue; ! ap = (struct archdata *)(mp->archdata_start); if (ap->dbe_table_start == NULL || --- 67,71 ---- !mp->archdata_start) continue; ! ap = (struct archdata *)(mod->archdata_start); if (ap->dbe_table_start == NULL || |
|
From: James S. <jsi...@us...> - 2001-09-04 16:02:49
|
Update of /cvsroot/linux-mips/linux/arch/mips64/mips-boards/generic
In directory usw-pr-cvs1:/tmp/cvs-serv9568
Modified Files:
init.c
Log Message:
Syncing.
Index: init.c
===================================================================
RCS file: /cvsroot/linux-mips/linux/arch/mips64/mips-boards/generic/init.c,v
retrieving revision 1.1.1.1
retrieving revision 1.2
diff -C2 -d -r1.1.1.1 -r1.2
*** init.c 2001/06/22 02:29:32 1.1.1.1
--- init.c 2001/09/04 16:02:46 1.2
***************
*** 51,56 ****
int init_debug = 0;
- unsigned long bus_to_baddr[256];
-
char *prom_getenv(char *envname)
{
--- 51,54 ----
***************
*** 145,149 ****
mips_io_port_base = KSEG1;
#endif
- bus_to_baddr[0] = 0UL;
setup_prom_printf(0);
--- 143,146 ----
|
|
From: James S. <jsi...@us...> - 2001-09-04 16:02:09
|
Update of /cvsroot/linux-mips/linux/arch/mips64/kernel In directory usw-pr-cvs1:/tmp/cvs-serv9267 Modified Files: scall_o32.S Log Message: Syncing. Index: scall_o32.S =================================================================== RCS file: /cvsroot/linux-mips/linux/arch/mips64/kernel/scall_o32.S,v retrieving revision 1.6 retrieving revision 1.7 diff -C2 -d -r1.6 -r1.7 *** scall_o32.S 2001/09/04 11:25:24 1.6 --- scall_o32.S 2001/09/04 16:02:05 1.7 *************** *** 228,233 **** END(mips_atomic_set) beq a0, MIPS_ATOMIC_SET, mips_atomic_set ! j sys_sysmips .macro syscalltable --- 228,235 ---- END(mips_atomic_set) + LEAF(sys_sysmips) beq a0, MIPS_ATOMIC_SET, mips_atomic_set ! j _sys_sysmips ! END(sys_sysmips) .macro syscalltable |
|
From: James S. <jsi...@us...> - 2001-09-04 16:01:42
|
Update of /cvsroot/linux-mips/linux/arch/mips64 In directory usw-pr-cvs1:/tmp/cvs-serv8998 Modified Files: defconfig Log Message: Syncing. Index: defconfig =================================================================== RCS file: /cvsroot/linux-mips/linux/arch/mips64/defconfig,v retrieving revision 1.5 retrieving revision 1.6 diff -C2 -d -r1.5 -r1.6 *** defconfig 2001/08/25 06:24:45 1.5 --- defconfig 2001/09/04 16:01:40 1.6 *************** *** 25,28 **** --- 25,29 ---- CONFIG_ARC64=y CONFIG_COHERENT_IO=y + CONFIG_MAPPED_PCI_IO=y CONFIG_PCI=y CONFIG_QL_ISP_A64=y |
|
From: James S. <jsi...@us...> - 2001-09-04 16:01:16
|
Update of /cvsroot/linux-mips/linux/arch/mips64
In directory usw-pr-cvs1:/tmp/cvs-serv8785
Modified Files:
config.in
Log Message:
Syncing.
Index: config.in
===================================================================
RCS file: /cvsroot/linux-mips/linux/arch/mips64/config.in,v
retrieving revision 1.2
retrieving revision 1.3
diff -C2 -d -r1.2 -r1.3
*** config.in 2001/08/24 18:59:54 1.2
--- config.in 2001/09/04 16:01:13 1.3
***************
*** 42,45 ****
--- 42,46 ----
unset CONFIG_COHERENT_IO
unset CONFIG_ISA
+ unset CONFIG_MAPPED_PCI_IO
unset CONFIG_PCI
***************
*** 57,60 ****
--- 58,62 ----
define_bool CONFIG_ARC64 y
define_bool CONFIG_COHERENT_IO y
+ define_bool CONFIG_MAPPED_PCI_IO y
define_bool CONFIG_PCI y
define_bool CONFIG_QL_ISP_A64 y
|
|
From: James S. <jsi...@us...> - 2001-09-04 16:00:54
|
Update of /cvsroot/linux-mips/linux/arch/mips64 In directory usw-pr-cvs1:/tmp/cvs-serv8575 Modified Files: Makefile Log Message: Syncing. Index: Makefile =================================================================== RCS file: /cvsroot/linux-mips/linux/arch/mips64/Makefile,v retrieving revision 1.2 retrieving revision 1.3 diff -C2 -d -r1.2 -r1.3 *** Makefile 2001/08/24 18:59:54 1.2 --- Makefile 2001/09/04 16:00:51 1.3 *************** *** 101,104 **** --- 101,115 ---- endif + ifdef CONFIG_SGI_IP32 + LIBS += arch/mips64/sgi-ip32/ip32-kern.a arch/mips64/arc/arclib.a + SUBDIRS += arch/mips64/sgi-ip32 arch/mips64/arc + # + # Set LOADADDR to >= 0x????????? if you want to leave space for symmon, + # 0x80002000 for production kernels. Note that the value must be + # 16kb aligned or the handling of the current variable will break. + # + LOADADDR += 0x80002000 + endif + # # Some machines like the Indy need 32-bit ELF binaries for booting purposes. |
|
From: James S. <jsi...@us...> - 2001-09-04 15:58:43
|
Update of /cvsroot/linux-mips/linux/arch/mips/philips/nino In directory usw-pr-cvs1:/tmp/cvs-serv7715 Modified Files: irq.c Log Message: malloc to slab change. Index: irq.c =================================================================== RCS file: /cvsroot/linux-mips/linux/arch/mips/philips/nino/irq.c,v retrieving revision 1.1.1.1 retrieving revision 1.2 diff -C2 -d -r1.1.1.1 -r1.2 *** irq.c 2001/06/22 02:29:32 1.1.1.1 --- irq.c 2001/09/04 15:58:40 1.2 *************** *** 22,26 **** #include <linux/ioport.h> #include <linux/timex.h> ! #include <linux/malloc.h> #include <linux/random.h> --- 22,26 ---- #include <linux/ioport.h> #include <linux/timex.h> ! #include <linux/slab.h> #include <linux/random.h> |
|
From: James S. <jsi...@us...> - 2001-09-04 15:54:33
|
Update of /cvsroot/linux-mips/linux/arch/mips/galileo-boards/ev96100
In directory usw-pr-cvs1:/tmp/cvs-serv6108
Modified Files:
pci_fixups.c
Log Message:
Added pcibios_assign_all_busses functionality.
Index: pci_fixups.c
===================================================================
RCS file: /cvsroot/linux-mips/linux/arch/mips/galileo-boards/ev96100/pci_fixups.c,v
retrieving revision 1.1
retrieving revision 1.2
diff -C2 -d -r1.1 -r1.2
*** pci_fixups.c 2001/07/06 01:25:33 1.1
--- pci_fixups.c 2001/09/04 15:54:30 1.2
***************
*** 109,111 ****
--- 109,115 ----
}
}
+ unsigned int pcibios_assign_all_busses(void)
+ {
+ return 0;
+ }
#endif
|
|
From: James S. <jsi...@us...> - 2001-09-04 15:52:51
|
Update of /cvsroot/linux-mips/linux/arch/mips
In directory usw-pr-cvs1:/tmp/cvs-serv5550
Modified Files:
config.in
Log Message:
Small changes to sync with Ralph.
Index: config.in
===================================================================
RCS file: /cvsroot/linux-mips/linux/arch/mips/config.in,v
retrieving revision 1.19
retrieving revision 1.20
diff -C2 -d -r1.19 -r1.20
*** config.in 2001/08/28 23:12:15 1.19
--- config.in 2001/09/04 15:52:48 1.20
***************
*** 234,239 ****
define_bool CONFIG_PCI y
define_bool CONFIG_PC_KEYB y
- define_bool CONFIG_NEW_PCI y
define_bool CONFIG_PCI_AUTO y
fi
if [ "$CONFIG_COBALT_MICRO_SERVER" = "y" ]; then
--- 234,239 ----
define_bool CONFIG_PCI y
define_bool CONFIG_PC_KEYB y
define_bool CONFIG_PCI_AUTO y
+ define_bool CONFIG_NEW_PCI y
fi
if [ "$CONFIG_COBALT_MICRO_SERVER" = "y" ]; then
***************
*** 285,289 ****
"R3000 CONFIG_CPU_R3000 \
R6000 CONFIG_CPU_R6000 \
! VR41xx CONFIG_CPU_VR41XX \
R4300 CONFIG_CPU_R4300 \
R4x00 CONFIG_CPU_R4X00 \
--- 285,289 ----
"R3000 CONFIG_CPU_R3000 \
R6000 CONFIG_CPU_R6000 \
! R41xx CONFIG_CPU_VR41XX \
R4300 CONFIG_CPU_R4300 \
R4x00 CONFIG_CPU_R4X00 \
***************
*** 305,310 ****
bool ' Writeback Buffer available' CONFIG_CPU_HAS_WB
else
! if [ "$CONFIG_CPU_R3000" = "y" -o \
! "$CONFIG_CPU_VR41XX" = "y" ]; then
if [ "$CONFIG_DECSTATION" = "y" ]; then
define_bool CONFIG_CPU_HAS_LLSC n
--- 305,309 ----
bool ' Writeback Buffer available' CONFIG_CPU_HAS_WB
else
! if [ "$CONFIG_CPU_R3000" = "y" -o "$CONFIG_CPU_VR41XX" = "y" ]; then
if [ "$CONFIG_DECSTATION" = "y" ]; then
define_bool CONFIG_CPU_HAS_LLSC n
|
|
From: Paul M. <le...@us...> - 2001-09-04 11:25:29
|
Update of /cvsroot/linux-mips/linux/kernel In directory usw-pr-cvs1:/tmp/cvs-serv26152/kernel Added Files: printk.c Log Message: mips64 cleanups. necessary for building a functional image for the i2. |
|
From: Paul M. <le...@us...> - 2001-09-04 11:25:29
|
Update of /cvsroot/linux-mips/linux/include/asm-mips64 In directory usw-pr-cvs1:/tmp/cvs-serv26152/include/asm-mips64 Modified Files: asm.h Log Message: mips64 cleanups. necessary for building a functional image for the i2. Index: asm.h =================================================================== RCS file: /cvsroot/linux-mips/linux/include/asm-mips64/asm.h,v retrieving revision 1.3 retrieving revision 1.4 diff -C2 -d -r1.3 -r1.4 *** asm.h 2001/07/16 18:36:26 1.3 --- asm.h 2001/09/04 11:25:25 1.4 *************** *** 135,140 **** prefx hint,addr #else ! #define PREF ! #define PREFX #endif --- 135,140 ---- prefx hint,addr #else ! #define PREF(hint,addr) ! #define PREFX(hint,addr) #endif |
|
From: Paul M. <le...@us...> - 2001-09-04 11:25:29
|
Update of /cvsroot/linux-mips/linux/arch/mips64/sgi-ip22 In directory usw-pr-cvs1:/tmp/cvs-serv26152/arch/mips64/sgi-ip22 Modified Files: ip22-berr.c ip22-setup.c Log Message: mips64 cleanups. necessary for building a functional image for the i2. Index: ip22-berr.c =================================================================== RCS file: /cvsroot/linux-mips/linux/arch/mips64/sgi-ip22/ip22-berr.c,v retrieving revision 1.1 retrieving revision 1.2 diff -C2 -d -r1.1 -r1.2 *** ip22-berr.c 2001/08/21 17:26:53 1.1 --- ip22-berr.c 2001/09/04 11:25:24 1.2 *************** *** 23,26 **** --- 23,29 ---- extern const struct exception_table_entry __stop___dbe_table[]; + extern void dump_tlb_addr(unsigned long addr); + extern void dump_tlb_all(void); + static inline unsigned long search_one_table(const struct exception_table_entry *first, *************** *** 67,71 **** !mp->archdata_start) continue; ! ap = (struct archdata *)(mod->archdata_start); if (ap->dbe_table_start == NULL || --- 70,74 ---- !mp->archdata_start) continue; ! ap = (struct archdata *)(mp->archdata_start); if (ap->dbe_table_start == NULL || Index: ip22-setup.c =================================================================== RCS file: /cvsroot/linux-mips/linux/arch/mips64/sgi-ip22/ip22-setup.c,v retrieving revision 1.2 retrieving revision 1.3 diff -C2 -d -r1.2 -r1.3 *** ip22-setup.c 2001/07/09 19:28:47 1.2 --- ip22-setup.c 2001/09/04 11:25:24 1.3 *************** *** 37,40 **** --- 37,44 ---- extern void ip22_volume_set(unsigned char); + #if defined(CONFIG_SERIAL_CONSOLE) || defined(CONFIG_ARC_CONSOLE) + extern void console_setup(char *); + #endif + #define sgi_kh ((struct hpc_keyb *) (KSEG1 + 0x1fbd9800 + 64)) |
|
From: Paul M. <le...@us...> - 2001-09-04 11:25:29
|
Update of /cvsroot/linux-mips/linux/arch/mips64/kernel In directory usw-pr-cvs1:/tmp/cvs-serv26152/arch/mips64/kernel Modified Files: scall_o32.S Log Message: mips64 cleanups. necessary for building a functional image for the i2. Index: scall_o32.S =================================================================== RCS file: /cvsroot/linux-mips/linux/arch/mips64/kernel/scall_o32.S,v retrieving revision 1.5 retrieving revision 1.6 diff -C2 -d -r1.5 -r1.6 *** scall_o32.S 2001/08/22 18:18:14 1.5 --- scall_o32.S 2001/09/04 11:25:24 1.6 *************** *** 228,235 **** END(mips_atomic_set) - LEAF(sys_sysmips) beq a0, MIPS_ATOMIC_SET, mips_atomic_set ! j _sys_sysmips ! END(sys_sysmips) .macro syscalltable --- 228,233 ---- END(mips_atomic_set) beq a0, MIPS_ATOMIC_SET, mips_atomic_set ! j sys_sysmips .macro syscalltable |
|
From: Paul M. <le...@us...> - 2001-09-04 11:25:28
|
Update of /cvsroot/linux-mips/linux/include/asm-mips
In directory usw-pr-cvs1:/tmp/cvs-serv26152/include/asm-mips
Added Files:
asm.h
Log Message:
mips64 cleanups. necessary for building a functional image for the i2.
--- NEW FILE: asm.h ---
/*
* include/asm-mips/asm.h
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
* Copyright (C) 1995, 1996, 1997 by Ralf Baechle
*
* Some useful macros for MIPS assembler code
*
* Some of the routines below contain useless nops that will be optimized
* away by gas in -O mode. These nops are however required to fill delay
* slots in noreorder mode.
*/
#ifndef __ASM_ASM_H
#define __ASM_ASM_H
#include <asm/sgidefs.h>
#ifndef CAT
#ifdef __STDC__
#define __CAT(str1,str2) str1##str2
#else
#define __CAT(str1,str2) str1/**/str2
#endif
#define CAT(str1,str2) __CAT(str1,str2)
#endif
/*
* Macros to handle different pointer/register sizes for 32/64-bit code
*
* 64 bit address space isn't used yet, so we may use the R3000 32 bit
* defines for now.
*/
#define PTR .word
#define PTRSIZE 4
#define PTRLOG 2
/*
* PIC specific declarations
* Not used for the kernel but here seems to be the right place.
*/
#ifdef __PIC__
#define CPRESTORE(register) \
.cprestore register
#define CPADD(register) \
.cpadd register
#define CPLOAD(register) \
.cpload register
#else
#define CPRESTORE(register)
#define CPADD(register)
#define CPLOAD(register)
#endif
/*
* LEAF - declare leaf routine
*/
#define LEAF(symbol) \
.globl symbol; \
.align 2; \
.type symbol,@function; \
.ent symbol,0; \
symbol: .frame sp,0,ra
/*
* NESTED - declare nested routine entry point
*/
#define NESTED(symbol, framesize, rpc) \
.globl symbol; \
.align 2; \
.type symbol,@function; \
.ent symbol,0; \
symbol: .frame sp, framesize, rpc
/*
* END - mark end of function
*/
#define END(function) \
.end function; \
.size function,.-function
/*
* EXPORT - export definition of symbol
*/
#define EXPORT(symbol) \
.globl symbol; \
symbol:
/*
* ABS - export absolute symbol
*/
#define ABS(symbol,value) \
.globl symbol; \
symbol = value
#define PANIC(msg) \
.set push; \
.set reorder; \
la a0,8f; \
jal panic; \
9: b 9b; \
.set pop; \
TEXT(msg)
/*
* Print formated string
*/
#define PRINT(string) \
.set push; \
.set reorder; \
la a0,8f; \
jal printk; \
.set pop; \
TEXT(string)
#define TEXT(msg) \
.data; \
8: .asciiz msg; \
.previous;
/*
* Build text tables
*/
#define TTABLE(string) \
.text; \
.word 1f; \
.previous; \
.data; \
1: .asciz string; \
.previous
/*
* MIPS IV pref instruction.
* Use with .set noreorder only!
*
* MIPS IV implementations are free to treat this as a nop. The R5000
* is one of them. So we should have an option not to use this instruction.
*/
#if (_MIPS_ISA == _MIPS_ISA_MIPS4) || (_MIPS_ISA == _MIPS_ISA_MIPS5)
#define PREF(hint,addr) \
pref hint,addr
#define PREFX(hint,addr) \
prefx hint,addr
#else
#define PREF(hint,addr)
#define PREFX(hint,addr)
#endif
/*
* MIPS ISA IV/V movn/movz instructions and equivalents for older CPUs.
*/
#if (_MIPS_ISA == _MIPS_ISA_MIPS1)
#define MOVN(rd,rs,rt) \
.set push; \
.set noreorder; \
beqz rt,9f; \
move rd,rs; \
.set pop; \
9:
#define MOVZ(rd,rs,rt) \
.set push; \
.set noreorder; \
bnez rt,9f; \
move rd,rt; \
.set pop; \
9:
#endif /* _MIPS_ISA == _MIPS_ISA_MIPS1 */
#if (_MIPS_ISA == _MIPS_ISA_MIPS2) || (_MIPS_ISA == _MIPS_ISA_MIPS3)
#define MOVN(rd,rs,rt) \
.set push; \
.set noreorder; \
bnezl rt,9f; \
move rd,rs; \
.set pop; \
9:
#define MOVZ(rd,rs,rt) \
.set push; \
.set noreorder; \
beqzl rt,9f; \
movz rd,rs; \
.set pop; \
9:
#endif /* (_MIPS_ISA == _MIPS_ISA_MIPS2) || (_MIPS_ISA == _MIPS_ISA_MIPS3) */
#if (_MIPS_ISA == _MIPS_ISA_MIPS4) || (_MIPS_ISA == _MIPS_ISA_MIPS5)
#define MOVN(rd,rs,rt) \
movn rd,rs,rt
#define MOVZ(rd,rs,rt) \
movz rd,rs,rt
#endif /* (_MIPS_ISA == _MIPS_ISA_MIPS4) || (_MIPS_ISA == _MIPS_ISA_MIPS5) */
/*
* Stack alignment
*/
#if (_MIPS_ISA == _MIPS_ISA_MIPS1) || (_MIPS_ISA == _MIPS_ISA_MIPS2)
#define ALSZ 7
#define ALMASK ~7
#endif
#if (_MIPS_ISA == _MIPS_ISA_MIPS3) || (_MIPS_ISA == _MIPS_ISA_MIPS4) || \
(_MIPS_ISA == _MIPS_ISA_MIPS5)
#define ALSZ 15
#define ALMASK ~15
#endif
/*
* Size of a register
*/
#ifdef __mips64
#define SZREG 8
#else
#define SZREG 4
#endif
/*
* Use the following macros in assemblercode to load/store registers,
* pointers etc.
*/
#if (_MIPS_ISA == _MIPS_ISA_MIPS1) || (_MIPS_ISA == _MIPS_ISA_MIPS2)
#define REG_S sw
#define REG_L lw
#define PTR_SUBU subu
#define PTR_ADDU addu
#endif
#if (_MIPS_ISA == _MIPS_ISA_MIPS3) || (_MIPS_ISA == _MIPS_ISA_MIPS4) || \
(_MIPS_ISA == _MIPS_ISA_MIPS5)
#define REG_S sd
#define REG_L ld
/* We still live in a 32 bit address space ... */
#define PTR_SUBU subu
#define PTR_ADDU addu
#endif
/*
* How to add/sub/load/store/shift C int variables.
*/
#if (_MIPS_SZINT == 32)
#define INT_ADD add
#define INT_ADDI addi
#define INT_ADDU addu
#define INT_ADDIU addiu
#define INT_SUB add
#define INT_SUBI subi
#define INT_SUBU subu
#define INT_SUBIU subu
#define INT_L lw
#define INT_S sw
#define LONG_SLL sll
#define LONG_SLLV sllv
#define LONG_SRL srl
#define LONG_SRLV srlv
#define LONG_SRA sra
#define LONG_SRAV srav
#endif
#if (_MIPS_SZINT == 64)
#define INT_ADD dadd
#define INT_ADDI daddi
#define INT_ADDU daddu
#define INT_ADDIU daddiu
#define INT_SUB dadd
#define INT_SUBI dsubi
#define INT_SUBU dsubu
#define INT_SUBIU dsubu
#define INT_L ld
#define INT_S sd
#define LONG_SLL dsll
#define LONG_SLLV dsllv
#define LONG_SRL dsrl
#define LONG_SRLV dsrlv
#define LONG_SRA dsra
#define LONG_SRAV dsrav
#endif
/*
* How to add/sub/load/store/shift C long variables.
*/
#if (_MIPS_SZLONG == 32)
#define LONG_ADD add
#define LONG_ADDI addi
#define LONG_ADDU addu
#define LONG_ADDIU addiu
#define LONG_SUB add
#define LONG_SUBI subi
#define LONG_SUBU subu
#define LONG_SUBIU subu
#define LONG_L lw
#define LONG_S sw
#define LONG_SLL sll
#define LONG_SLLV sllv
#define LONG_SRL srl
#define LONG_SRLV srlv
#define LONG_SRA sra
#define LONG_SRAV srav
#endif
#if (_MIPS_SZLONG == 64)
#define LONG_ADD dadd
#define LONG_ADDI daddi
#define LONG_ADDU daddu
#define LONG_ADDIU daddiu
#define LONG_SUB dadd
#define LONG_SUBI dsubi
#define LONG_SUBU dsubu
#define LONG_SUBIU dsubu
#define LONG_L ld
#define LONG_S sd
#define LONG_SLL dsll
#define LONG_SLLV dsllv
#define LONG_SRL dsrl
#define LONG_SRLV dsrlv
#define LONG_SRA dsra
#define LONG_SRAV dsrav
#endif
/*
* How to add/sub/load/store/shift pointers.
*/
#if (_MIPS_SZLONG == 32)
#define PTR_ADD add
#define PTR_ADDI addi
#define PTR_ADDU addu
#define PTR_ADDIU addiu
#define PTR_SUB add
#define PTR_SUBI subi
#define PTR_SUBU subu
#define PTR_SUBIU subu
#define PTR_L lw
#define PTR_S sw
#define PTR_SLL sll
#define PTR_SLLV sllv
#define PTR_SRL srl
#define PTR_SRLV srlv
#define PTR_SRA sra
#define PTR_SRAV srav
#define PTR_SCALESHIFT 2
#endif
#if (_MIPS_SZLONG == 64)
#define PTR_ADD dadd
#define PTR_ADDI daddi
#define PTR_ADDU daddu
#define PTR_ADDIU daddiu
#define PTR_SUB dadd
#define PTR_SUBI dsubi
#define PTR_SUBU dsubu
#define PTR_SUBIU dsubu
#define PTR_L ld
#define PTR_S sd
#define PTR_SLL dsll
#define PTR_SLLV dsllv
#define PTR_SRL dsrl
#define PTR_SRLV dsrlv
#define PTR_SRA dsra
#define PTR_SRAV dsrav
#define PTR_SCALESHIFT 3
#endif
/*
* Some cp0 registers were extended to 64bit for MIPS III.
*/
#if (_MIPS_ISA == _MIPS_ISA_MIPS1) || (_MIPS_ISA == _MIPS_ISA_MIPS2)
#define MFC0 mfc0
#define MTC0 mtc0
#endif
#if (_MIPS_ISA == _MIPS_ISA_MIPS3) || (_MIPS_ISA == _MIPS_ISA_MIPS4) || \
(_MIPS_ISA == _MIPS_ISA_MIPS5)
#define MFC0 dmfc0
#define MTC0 dmtc0
#endif
#endif /* __ASM_ASM_H */
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