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From: James S. <jsi...@us...> - 2001-09-06 16:13:02
|
Update of /cvsroot/linux-mips/linux/arch/mips/kernel In directory usw-pr-cvs1:/tmp/cvs-serv6748 Added Files: r4k_misc.S Log Message: Return from exceptions calling do_page_fault via ret_from_exception. |
|
From: James S. <jsi...@us...> - 2001-09-06 16:12:04
|
Update of /cvsroot/linux-mips/linux/arch/mips/kernel
In directory usw-pr-cvs1:/tmp/cvs-serv6454
Added Files:
r2300_misc.S
Log Message:
Return from exceptions calling do_page_fault via ret_from_exception.
--- NEW FILE: r2300_misc.S ---
/*
* misc.S: Misc. exception handling code for R3000/R2000.
*
* Copyright (C) 1994, 1995, 1996 by Ralf Baechle and Andreas Busse
*
* Multi-CPU abstraction reworking:
* Copyright (C) 1996 David S. Miller (dm...@en...)
*
* Further modifications to make this work:
* Copyright (c) 1998 Harald Koerfgen
* Copyright (c) 1998, 1999 Gleb Raiko & Vladimir Roganov
* Copyright (c) 2001 Ralf Baechle
* Copyright (c) 2001 MIPS Technologies, Inc.
*/
#include <asm/asm.h>
#include <asm/current.h>
#include <asm/bootinfo.h>
#include <asm/cachectl.h>
#include <asm/fpregdef.h>
#include <asm/mipsregs.h>
#include <asm/page.h>
#include <asm/pgtable.h>
#include <asm/processor.h>
#include <asm/regdef.h>
#include <asm/segment.h>
#include <asm/stackframe.h>
.text
.set mips1
.set noreorder
#undef NOTLB_OPTIMIZE /* If you are paranoid, define this. */
/* ABUSE of CPP macros 101. */
/* After this macro runs, the pte faulted on is
* in register PTE, a ptr into the table in which
* the pte belongs is in PTR.
*/
#define LOAD_PTE(pte, ptr) \
mfc0 pte, CP0_BADVADDR; \
lw ptr, current_pgd; \
srl pte, pte, 22; \
sll pte, pte, 2; \
addu ptr, ptr, pte; \
mfc0 pte, CP0_CONTEXT; \
lw ptr, (ptr); \
andi pte, pte, 0xffc; \
addu ptr, ptr, pte; \
lw pte, (ptr); \
nop;
/* This places the even/odd pte pair in the page
* table at PTR into ENTRYLO0 and ENTRYLO1 using
* TMP as a scratch register.
*/
#define PTE_RELOAD(ptr) \
lw ptr, (ptr) ; \
nop ; \
mtc0 ptr, CP0_ENTRYLO0; \
nop;
#define DO_FAULT(write) \
.set noat; \
.set macro; \
SAVE_ALL; \
mfc0 a2, CP0_BADVADDR; \
STI; \
.set at; \
move a0, sp; \
jal do_page_fault; \
li a1, write; \
j ret_from_exception; \
nop; \
.set noat; \
.set nomacro;
/* Check is PTE is present, if not then jump to LABEL.
* PTR points to the page table where this PTE is located,
* when the macro is done executing PTE will be restored
* with it's original value.
*/
#define PTE_PRESENT(pte, ptr, label) \
andi pte, pte, (_PAGE_PRESENT | _PAGE_READ); \
xori pte, pte, (_PAGE_PRESENT | _PAGE_READ); \
bnez pte, label; \
.set push; \
.set reorder; \
lw pte, (ptr); \
.set pop;
/* Make PTE valid, store result in PTR. */
#define PTE_MAKEVALID(pte, ptr) \
ori pte, pte, (_PAGE_VALID | _PAGE_ACCESSED); \
sw pte, (ptr);
/* Check if PTE can be written to, if not branch to LABEL.
* Regardless restore PTE with value from PTR when done.
*/
#define PTE_WRITABLE(pte, ptr, label) \
andi pte, pte, (_PAGE_PRESENT | _PAGE_WRITE); \
xori pte, pte, (_PAGE_PRESENT | _PAGE_WRITE); \
bnez pte, label; \
.set push; \
.set reorder; \
lw pte, (ptr); \
.set pop;
/* Make PTE writable, update software status bits as well,
* then store at PTR.
*/
#define PTE_MAKEWRITE(pte, ptr) \
ori pte, pte, (_PAGE_ACCESSED | _PAGE_MODIFIED | \
_PAGE_VALID | _PAGE_DIRTY); \
sw pte, (ptr);
/*
* The index register may have the probe fail bit set,
* because we would trap on access kseg2, i.e. without refill.
*/
#define TLB_WRITE(reg) \
mfc0 reg, CP0_INDEX; \
nop; \
bltz reg, 1f; \
nop; \
tlbwi; \
j 2f; \
nop; \
1: tlbwr; \
2:
#define RET(reg) \
mfc0 reg, CP0_EPC; \
nop; \
jr reg; \
rfe
.set noreorder
.align 5
NESTED(handle_tlbl, PT_SIZE, sp)
.set noat
#ifndef NOTLB_OPTIMIZE
/* Test present bit in entry. */
LOAD_PTE(k0, k1)
tlbp
PTE_PRESENT(k0, k1, nopage_tlbl)
PTE_MAKEVALID(k0, k1)
PTE_RELOAD(k1)
TLB_WRITE(k0)
RET(k0)
nopage_tlbl:
#endif
DO_FAULT(0)
END(handle_tlbl)
NESTED(handle_tlbs, PT_SIZE, sp)
.set noat
#ifndef NOTLB_OPTIMIZE
LOAD_PTE(k0, k1)
tlbp # find faulting entry
PTE_WRITABLE(k0, k1, nopage_tlbs)
PTE_MAKEWRITE(k0, k1)
PTE_RELOAD(k1)
TLB_WRITE(k0)
RET(k0)
nopage_tlbs:
#endif
DO_FAULT(1)
END(handle_tlbs)
.align 5
NESTED(handle_mod, PT_SIZE, sp)
.set noat
#ifndef NOTLB_OPTIMIZE
LOAD_PTE(k0, k1)
tlbp # find faulting entry
andi k0, k0, _PAGE_WRITE
beqz k0, nowrite_mod
.set push
.set reorder
lw k0, (k1)
.set pop
/* Present and writable bits set, set accessed and dirty bits. */
PTE_MAKEWRITE(k0, k1)
/* Now reload the entry into the tlb. */
PTE_RELOAD(k1)
tlbwi
RET(k0)
#endif
nowrite_mod:
DO_FAULT(1)
END(handle_mod)
|
|
From: Pete P. <pp...@us...> - 2001-09-06 00:00:04
|
Update of /cvsroot/linux-mips/linux/include/pcmcia In directory usw-pr-cvs1:/tmp/cvs-serv14415/include/pcmcia Added Files: ss.h Log Message: Added new files from the stock kernel in order to be able to apply the Au1000 pcmcia patch. --- NEW FILE: ss.h --- /* * ss.h 1.28 2000/06/12 21:55:40 * * The contents of this file are subject to the Mozilla Public License * Version 1.1 (the "License"); you may not use this file except in * compliance with the License. You may obtain a copy of the License * at http://www.mozilla.org/MPL/ * * Software distributed under the License is distributed on an "AS IS" * basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See * the License for the specific language governing rights and * limitations under the License. * * The initial developer of the original code is David A. Hinds * <da...@us...>. Portions created by David A. Hinds * are Copyright (C) 1999 David A. Hinds. All Rights Reserved. * * Alternatively, the contents of this file may be used under the * terms of the GNU General Public License version 2 (the "GPL"), in which * case the provisions of the GPL are applicable instead of the * above. If you wish to allow the use of your version of this file * only under the terms of the GPL and not to allow others to use * your version of this file under the MPL, indicate your decision by * deleting the provisions above and replace them with the notice and * other provisions required by the GPL. If you do not delete the * provisions above, a recipient may use your version of this file * under either the MPL or the GPL. */ #ifndef _LINUX_SS_H #define _LINUX_SS_H /* Definitions for card status flags for GetStatus */ #define SS_WRPROT 0x0001 #define SS_CARDLOCK 0x0002 #define SS_EJECTION 0x0004 #define SS_INSERTION 0x0008 #define SS_BATDEAD 0x0010 #define SS_BATWARN 0x0020 #define SS_READY 0x0040 #define SS_DETECT 0x0080 #define SS_POWERON 0x0100 #define SS_GPI 0x0200 #define SS_STSCHG 0x0400 #define SS_CARDBUS 0x0800 #define SS_3VCARD 0x1000 #define SS_XVCARD 0x2000 #define SS_PENDING 0x4000 /* for InquireSocket */ typedef struct socket_cap_t { u_int features; u_int irq_mask; u_int map_size; ioaddr_t io_offset; u_char pci_irq; struct pci_dev *cb_dev; struct bus_operations *bus; } socket_cap_t; /* InquireSocket capabilities */ #define SS_CAP_PAGE_REGS 0x0001 #define SS_CAP_VIRTUAL_BUS 0x0002 #define SS_CAP_MEM_ALIGN 0x0004 #define SS_CAP_STATIC_MAP 0x0008 #define SS_CAP_PCCARD 0x4000 #define SS_CAP_CARDBUS 0x8000 /* for GetSocket, SetSocket */ typedef struct socket_state_t { u_int flags; u_int csc_mask; u_char Vcc, Vpp; u_char io_irq; } socket_state_t; extern socket_state_t dead_socket; /* Socket configuration flags */ #define SS_PWR_AUTO 0x0010 #define SS_IOCARD 0x0020 #define SS_RESET 0x0040 #define SS_DMA_MODE 0x0080 #define SS_SPKR_ENA 0x0100 #define SS_OUTPUT_ENA 0x0200 #define SS_DEBOUNCED 0x0400 /* Tell driver that the debounce delay has ended */ /* Flags for I/O port and memory windows */ #define MAP_ACTIVE 0x01 #define MAP_16BIT 0x02 #define MAP_AUTOSZ 0x04 #define MAP_0WS 0x08 #define MAP_WRPROT 0x10 #define MAP_ATTRIB 0x20 #define MAP_USE_WAIT 0x40 #define MAP_PREFETCH 0x80 /* Use this just for bridge windows */ #define MAP_IOSPACE 0x20 typedef struct pccard_io_map { u_char map; u_char flags; u_short speed; u_short start, stop; } pccard_io_map; typedef struct pccard_mem_map { u_char map; u_char flags; u_short speed; u_long sys_start, sys_stop; u_int card_start; } pccard_mem_map; typedef struct cb_bridge_map { u_char map; u_char flags; u_int start, stop; } cb_bridge_map; /* * Socket operations. */ struct pccard_operations { int (*init)(unsigned int sock); int (*suspend)(unsigned int sock); int (*register_callback)(unsigned int sock, void (*handler)(void *, unsigned int), void * info); int (*inquire_socket)(unsigned int sock, socket_cap_t *cap); int (*get_status)(unsigned int sock, u_int *value); int (*get_socket)(unsigned int sock, socket_state_t *state); int (*set_socket)(unsigned int sock, socket_state_t *state); int (*get_io_map)(unsigned int sock, struct pccard_io_map *io); int (*set_io_map)(unsigned int sock, struct pccard_io_map *io); int (*get_mem_map)(unsigned int sock, struct pccard_mem_map *mem); int (*set_mem_map)(unsigned int sock, struct pccard_mem_map *mem); void (*proc_setup)(unsigned int sock, struct proc_dir_entry *base); }; /* * Calls to set up low-level "Socket Services" drivers */ extern int register_ss_entry(int nsock, struct pccard_operations *ops); extern void unregister_ss_entry(struct pccard_operations *ops); #endif /* _LINUX_SS_H */ |
|
From: Pete P. <pp...@us...> - 2001-09-06 00:00:03
|
Update of /cvsroot/linux-mips/linux/drivers/pcmcia
In directory usw-pr-cvs1:/tmp/cvs-serv14415/drivers/pcmcia
Added Files:
cs.c
Log Message:
Added new files from the stock kernel in order to
be able to apply the Au1000 pcmcia patch.
--- NEW FILE: cs.c ---
/*======================================================================
Kernel Card Services -- core services
cs.c 1.271 2000/10/02 20:27:49
The contents of this file are subject to the Mozilla Public
License Version 1.1 (the "License"); you may not use this file
except in compliance with the License. You may obtain a copy of
the License at http://www.mozilla.org/MPL/
Software distributed under the License is distributed on an "AS
IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
implied. See the License for the specific language governing
rights and limitations under the License.
The initial developer of the original code is David A. Hinds
<da...@us...>. Portions created by David A. Hinds
are Copyright (C) 1999 David A. Hinds. All Rights Reserved.
[...2399 lines suppressed...]
}
static void __exit exit_pcmcia_cs(void)
{
printk(KERN_INFO "unloading Kernel Card Services\n");
#ifdef CONFIG_PROC_FS
if (proc_pccard) {
remove_proc_entry("pccard", proc_bus);
}
#endif
if (do_apm)
pm_unregister_all(handle_pm_event);
release_resource_db();
}
module_init(init_pcmcia_cs);
module_exit(exit_pcmcia_cs);
/*====================================================================*/
|
|
From: Pete P. <pp...@us...> - 2001-09-05 23:58:42
|
Update of /cvsroot/linux-mips/linux/include/pcmcia In directory usw-pr-cvs1:/tmp/cvs-serv14149/include/pcmcia Log Message: Directory /cvsroot/linux-mips/linux/include/pcmcia added to the repository |
|
From: Pete P. <pp...@us...> - 2001-09-05 19:51:57
|
Update of /cvsroot/linux-mips/linux/drivers/pcmcia In directory usw-pr-cvs1:/tmp/cvs-serv27627/drivers/pcmcia Modified Files: au1000_generic.c Log Message: Reindented some code since it was incorrectly split up by 'indent'. Index: au1000_generic.c =================================================================== RCS file: /cvsroot/linux-mips/linux/drivers/pcmcia/au1000_generic.c,v retrieving revision 1.1 retrieving revision 1.2 diff -C2 -d -r1.1 -r1.2 *** au1000_generic.c 2001/09/05 18:30:03 1.1 --- au1000_generic.c 2001/09/05 19:51:47 1.2 *************** *** 682,694 **** p += sprintf(p, "status : %s%s%s%s%s%s%s%s%s\n", ! pcmcia_socket[sock]. ! k_state.detect ? "SS_DETECT " : "", pcmcia_socket[sock].k_state.ready ? "SS_READY " : "", pcmcia_socket[sock].cs_state.Vcc ? "SS_POWERON " : "", ! pcmcia_socket[sock]. ! cs_state.flags & SS_IOCARD ? \"SS_IOCARD " : "", (pcmcia_socket[sock].cs_state.flags & SS_IOCARD ! && pcmcia_socket[sock]. ! k_state.bvd1) ? "SS_STSCHG " : "", ((pcmcia_socket[sock].cs_state.flags & SS_IOCARD) == 0 && (pcmcia_socket[sock].k_state.bvd1 == --- 682,692 ---- p += sprintf(p, "status : %s%s%s%s%s%s%s%s%s\n", ! pcmcia_socket[sock].k_state.detect ? "SS_DETECT " : "", pcmcia_socket[sock].k_state.ready ? "SS_READY " : "", pcmcia_socket[sock].cs_state.Vcc ? "SS_POWERON " : "", ! pcmcia_socket[sock].cs_state.flags & SS_IOCARD ? ! "SS_IOCARD " : "", (pcmcia_socket[sock].cs_state.flags & SS_IOCARD ! && pcmcia_socket[sock].k_state.bvd1) ? "SS_STSCHG " : "", ((pcmcia_socket[sock].cs_state.flags & SS_IOCARD) == 0 && (pcmcia_socket[sock].k_state.bvd1 == *************** *** 698,740 **** 0)) ? "SS_BATWARN " : "", pcmcia_socket[sock].k_state.vs_3v ? "SS_3VCARD " : "", ! pcmcia_socket[sock]. ! k_state.vs_Xv ? "SS_XVCARD " : ""); p += sprintf(p, "mask : %s%s%s%s%s\n", ! pcmcia_socket[sock]. ! cs_state.csc_mask & SS_DETECT ? \"SS_DETECT " : "", ! pcmcia_socket[sock]. ! cs_state.csc_mask & SS_READY ? \"SS_READY " : "", ! pcmcia_socket[sock]. ! cs_state.csc_mask & SS_BATDEAD ? \"SS_BATDEAD " : "", ! pcmcia_socket[sock]. ! cs_state.csc_mask & SS_BATWARN ? \"SS_BATWARN " : "", ! pcmcia_socket[sock]. ! cs_state.csc_mask & SS_STSCHG ? \"SS_STSCHG " : ""); p += sprintf(p, "cs_flags : %s%s%s%s%s\n", ! pcmcia_socket[sock]. ! cs_state.flags & SS_PWR_AUTO ? \"SS_PWR_AUTO " : "", ! pcmcia_socket[sock]. ! cs_state.flags & SS_IOCARD ? \"SS_IOCARD " : "", ! pcmcia_socket[sock]. ! cs_state.flags & SS_RESET ? \"SS_RESET " : "", ! pcmcia_socket[sock]. ! cs_state.flags & SS_SPKR_ENA ? \"SS_SPKR_ENA " : "", ! pcmcia_socket[sock]. ! cs_state.flags & SS_OUTPUT_ENA ? \"SS_OUTPUT_ENA " : ""); ! p += ! sprintf(p, "Vcc : %d\n", ! pcmcia_socket[sock].cs_state.Vcc); ! p += ! sprintf(p, "Vpp : %d\n", ! pcmcia_socket[sock].cs_state.Vpp); ! p += ! sprintf(p, "irq : %d\n", ! pcmcia_socket[sock].cs_state.io_irq); p += sprintf(p, "I/O : %u\n", pcmcia_socket[sock].speed_io); --- 696,734 ---- 0)) ? "SS_BATWARN " : "", pcmcia_socket[sock].k_state.vs_3v ? "SS_3VCARD " : "", ! pcmcia_socket[sock].k_state.vs_Xv ? "SS_XVCARD " : ""); p += sprintf(p, "mask : %s%s%s%s%s\n", ! pcmcia_socket[sock].cs_state.csc_mask & SS_DETECT ? \ ! "SS_DETECT " : "", ! pcmcia_socket[sock].cs_state.csc_mask & SS_READY ? \ ! "SS_READY " : "", ! pcmcia_socket[sock].cs_state.csc_mask & SS_BATDEAD ? \ ! "SS_BATDEAD " : "", ! pcmcia_socket[sock].cs_state.csc_mask & SS_BATWARN ? \ ! "SS_BATWARN " : "", ! pcmcia_socket[sock].cs_state.csc_mask & SS_STSCHG ? \ ! "SS_STSCHG " : ""); p += sprintf(p, "cs_flags : %s%s%s%s%s\n", ! pcmcia_socket[sock].cs_state.flags & SS_PWR_AUTO ? \ ! "SS_PWR_AUTO " : "", ! pcmcia_socket[sock].cs_state.flags & SS_IOCARD ? \ ! "SS_IOCARD " : "", ! pcmcia_socket[sock].cs_state.flags & SS_RESET ? \ ! "SS_RESET " : "", ! pcmcia_socket[sock].cs_state.flags & SS_SPKR_ENA ? \ ! "SS_SPKR_ENA " : "", ! pcmcia_socket[sock].cs_state.flags & SS_OUTPUT_ENA ? \ ! "SS_OUTPUT_ENA " : ""); ! p += sprintf(p, "Vcc : %d\n", ! pcmcia_socket[sock].cs_state.Vcc); ! p += sprintf(p, "Vpp : %d\n", ! pcmcia_socket[sock].cs_state.Vpp); ! p += sprintf(p, "irq : %d\n", ! pcmcia_socket[sock].cs_state.io_irq); p += sprintf(p, "I/O : %u\n", pcmcia_socket[sock].speed_io); |
|
From: James S. <jsi...@us...> - 2001-09-05 18:30:06
|
Update of /cvsroot/linux-mips/linux/drivers/pcmcia
In directory usw-pr-cvs1:/tmp/cvs-serv7925
Added Files:
Config.in Makefile au1000_generic.c au1000_pb1000.c
Log Message:
Added PCMICA support for au1000 boards
--- NEW FILE: Config.in ---
#
# PCMCIA bus subsystem configuration
#
# Right now the non-CardBus choices are not supported
# by the integrated kernel driver.
#
mainmenu_option next_comment
comment 'PCMCIA/CardBus support'
#dep_tristate 'CardBus support' CONFIG_PCMCIA $CONFIG_PCI
#if [ "$CONFIG_PCMCIA" != "n" ]; then
# define_bool CONFIG_CARDBUS y
#fi
tristate 'PCMCIA/CardBus support' CONFIG_PCMCIA
if [ "$CONFIG_PCMCIA" != "n" ]; then
if [ "$CONFIG_PCI" != "n" ]; then
bool ' CardBus support' CONFIG_CARDBUS
fi
bool ' i82365 compatible bridge support' CONFIG_I82365
bool ' Databook TCIC host bridge support' CONFIG_TCIC
if [ "$CONFIG_HD64465" = "y" ]; then
dep_tristate ' HD64465 host bridge support' CONFIG_HD64465_PCMCIA $CONFIG_PCMCIA
fi
if [ "$CONFIG_MIPS_AU1000" = "y" ]; then
dep_tristate ' AU1000 support' CONFIG_PCMCIA_AU1000 $CONFIG_PCMCIA
fi
fi
endmenu
--- NEW FILE: Makefile ---
#
# Makefile for the kernel pcmcia subsystem (c/o David Hinds)
#
# Note! Dependencies are done automagically by 'make dep', which also
# removes any old dependencies. DON'T put your own dependencies here
# unless it's something special (ie not a .c file).
#
# Note 2! The CFLAGS definitions are now inherited from the
# parent makes..
O_TARGET := pcmcia.o
export-objs := ds.o cs.o cb_enabler.o yenta.o pci_socket.o
list-multi := pcmcia_core.o yenta_socket.o
yenta_socket-objs := pci_socket.o yenta.o
pcmcia_core-objs := cistpl.o rsrc_mgr.o bulkmem.o cs.o
ifeq ($(CONFIG_CARDBUS),y)
pcmcia_core-objs += cardbus.o
endif
ifeq ($(CONFIG_PCMCIA),y)
obj-y := cistpl.o rsrc_mgr.o bulkmem.o ds.o cs.o
ifeq ($(CONFIG_CARDBUS),y)
obj-y += cardbus.o cb_enabler.o yenta.o pci_socket.o
endif
ifeq ($(CONFIG_I82365),y)
obj-y += i82365.o
endif
ifeq ($(CONFIG_TCIC),y)
obj-y += tcic.o
endif
ifeq ($(CONFIG_HD64465_PCMCIA),y)
obj-y += hd64465_ss.o
endif
else
ifeq ($(CONFIG_PCMCIA),m)
obj-m := pcmcia_core.o ds.o
ifeq ($(CONFIG_I82365),y)
obj-m += i82365.o
endif
ifeq ($(CONFIG_TCIC),y)
obj-m += tcic.o
endif
ifeq ($(CONFIG_HD64465_PCMCIA),m)
obj-m += hd64465_ss.o
endif
ifeq ($(CONFIG_CARDBUS),y)
obj-m += yenta_socket.o cb_enabler.o
endif
endif
endif
obj-$(CONFIG_PCMCIA_AU1000) += au1000_ss.o
au1000_ss-objs-y := au1000_generic.o
au1000_ss-objs-$(CONFIG_MIPS_PB1000) += au1000_pb1000.o
include $(TOPDIR)/Rules.make
pcmcia_core.o: $(pcmcia_core-objs)
$(LD) $(LD_RFLAG) -r -o $@ $(pcmcia_core-objs)
au1000_ss.o: $(au1000_ss-objs-y)
$(LD) -r -o $@ $(au1000_ss-objs-y)
yenta_socket.o: $(yenta_socket-objs)
$(LD) $(LD_RFLAG) -r -o $@ $(yenta_socket-objs)
--- NEW FILE: au1000_generic.c ---
/*
* Alchemy Semi Au1000 pcmcia driver
*
* Copyright 2001 MontaVista Software Inc.
* Author: MontaVista Software, Inc.
* pp...@mv... or so...@mv...
*
* ########################################################################
*
* This program is free software; you can distribute it and/or modify it
* under the terms of the GNU General Public License (Version 2) as
* published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
* for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
*
* ########################################################################
*
*
*/
#include <linux/module.h>
#include <linux/init.h>
#include <linux/config.h>
#include <linux/delay.h>
#include <linux/ioport.h>
#include <linux/kernel.h>
#include <linux/tqueue.h>
#include <linux/timer.h>
#include <linux/mm.h>
#include <linux/proc_fs.h>
#include <linux/version.h>
#include <linux/types.h>
#include <linux/vmalloc.h>
#include <pcmcia/version.h>
#include <pcmcia/cs_types.h>
#include <pcmcia/cs.h>
#include <pcmcia/ss.h>
#include <pcmcia/bulkmem.h>
#include <pcmcia/cistpl.h>
#include <pcmcia/bus_ops.h>
#include "cs_internal.h"
#include <asm/io.h>
#include <asm/irq.h>
#include <asm/system.h>
#include <asm/au1000.h>
#include <asm/au1000_pcmcia.h>
#ifdef PCMCIA_DEBUG
static int pc_debug;
#endif
MODULE_AUTHOR("Pete Popov, MontaVista Software <pp...@mv...>");
MODULE_DESCRIPTION("Linux PCMCIA Card Services: Au1000 Socket Controller");
#define MAP_SIZE 0x1000000
/* This structure maintains housekeeping state for each socket, such
* as the last known values of the card detect pins, or the Card Services
* callback value associated with the socket:
*/
static struct au1000_pcmcia_socket *pcmcia_socket;
static int socket_count;
/* Returned by the low-level PCMCIA interface: */
static struct pcmcia_low_level *pcmcia_low_level;
/* Event poll timer structure */
static struct timer_list poll_timer;
/* Prototypes for routines which are used internally: */
static int au1000_pcmcia_driver_init(void);
static void au1000_pcmcia_driver_shutdown(void);
static void au1000_pcmcia_task_handler(void *data);
static void au1000_pcmcia_poll_event(unsigned long data);
static void au1000_pcmcia_interrupt(int irq, void *dev,
struct pt_regs *regs);
static struct tq_struct au1000_pcmcia_task;
#ifdef CONFIG_PROC_FS
static int au1000_pcmcia_proc_status(char *buf, char **start,
off_t pos, int count, int *eof,
void *data);
#endif
/* Prototypes for operations which are exported to the
* new-and-impr^H^H^H^H^H^H^H^H^H^H in-kernel PCMCIA core:
*/
static int au1000_pcmcia_init(unsigned int sock);
static int au1000_pcmcia_suspend(unsigned int sock);
static int au1000_pcmcia_register_callback(unsigned int sock,
void (*handler) (void *,
unsigned int),
void *info);
static int au1000_pcmcia_inquire_socket(unsigned int sock,
socket_cap_t * cap);
static int au1000_pcmcia_get_status(unsigned int sock, u_int * value);
static int au1000_pcmcia_get_socket(unsigned int sock,
socket_state_t * state);
static int au1000_pcmcia_set_socket(unsigned int sock,
socket_state_t * state);
static int au1000_pcmcia_get_io_map(unsigned int sock,
struct pccard_io_map *io);
static int au1000_pcmcia_set_io_map(unsigned int sock,
struct pccard_io_map *io);
static int au1000_pcmcia_get_mem_map(unsigned int sock,
struct pccard_mem_map *mem);
static int au1000_pcmcia_set_mem_map(unsigned int sock,
struct pccard_mem_map *mem);
#ifdef CONFIG_PROC_FS
static void au1000_pcmcia_proc_setup(unsigned int sock,
struct proc_dir_entry *base);
#endif
static struct pccard_operations au1000_pcmcia_operations = {
au1000_pcmcia_init,
au1000_pcmcia_suspend,
au1000_pcmcia_register_callback,
au1000_pcmcia_inquire_socket,
au1000_pcmcia_get_status,
au1000_pcmcia_get_socket,
au1000_pcmcia_set_socket,
au1000_pcmcia_get_io_map,
au1000_pcmcia_set_io_map,
au1000_pcmcia_get_mem_map,
au1000_pcmcia_set_mem_map,
#ifdef CONFIG_PROC_FS
au1000_pcmcia_proc_setup
#endif
};
static int __init au1000_pcmcia_driver_init(void)
{
servinfo_t info;
struct pcmcia_init pcmcia_init;
struct pcmcia_state state;
unsigned int i;
unsigned long timing3;
printk("\nAU1000 PCMCIA (CS release %s)\n", CS_RELEASE);
CardServices(GetCardServicesInfo, &info);
if (info.Revision != CS_RELEASE_CODE) {
printk(KERN_ERR
"Card Services release codes do not match\n");
return -1;
}
#ifdef CONFIG_MIPS_PB1000
pcmcia_low_level = &pb1000_pcmcia_ops;
#else
#error Unsupported AU1000 board.
#endif
pcmcia_init.handler = au1000_pcmcia_interrupt;
if ((socket_count = pcmcia_low_level->init(&pcmcia_init)) < 0) {
printk(KERN_ERR
"Unable to initialize kernel PCMCIA service.\n");
return -EIO;
}
/* setup the static bus controller */
timing3 = 0x100e3a07;
writel(0x00000002, STATIC_CONFIG_3); /* type = PCMCIA */
writel(timing3, STATIC_TIMING_3);
writel(0x10000000, STATIC_ADDRESS_3); /* any PCMCIA select */
pcmcia_socket =
kmalloc(sizeof(struct au1000_pcmcia_socket) * socket_count,
GFP_KERNEL);
memset(pcmcia_socket, 0,
sizeof(struct au1000_pcmcia_socket) * socket_count);
if (!pcmcia_socket) {
printk(KERN_ERR "Card Services can't get memory \n");
return -1;
}
for (i = 0; i < socket_count; i++) {
if (pcmcia_low_level->socket_state(i, &state) < 0) {
printk(KERN_ERR
"Unable to get PCMCIA status from kernel.\n");
return -EIO;
}
pcmcia_socket[i].k_state = state;
pcmcia_socket[i].cs_state.csc_mask = SS_DETECT;
if (i == 0) {
pcmcia_socket[i].virt_io =
(u32) ioremap(0xC0000000, 0x1000);
pcmcia_socket[i].phys_attr = 0xC4000000;
pcmcia_socket[i].phys_mem = 0xC8000000;
} else {
printk(KERN_ERR
"au1000: pcmcia socket 1 not supported\n");
return 1;
}
}
/* Only advertise as many sockets as we can detect: */
if (register_ss_entry(socket_count, &au1000_pcmcia_operations) < 0) {
printk(KERN_ERR
"Unable to register socket service routine\n");
return -ENXIO;
}
/* Start the event poll timer. It will reschedule by itself afterwards. */
au1000_pcmcia_poll_event(0);
DEBUG(1, "au1000: initialization complete\n");
return 0;
} /* au1000_pcmcia_driver_init() */
module_init(au1000_pcmcia_driver_init);
static void __exit au1000_pcmcia_driver_shutdown(void)
{
int i;
del_timer_sync(&poll_timer);
unregister_ss_entry(&au1000_pcmcia_operations);
pcmcia_low_level->shutdown();
flush_scheduled_tasks();
for (i = 0; i < socket_count; i++) {
if (pcmcia_socket[i].virt_io)
iounmap((void *) pcmcia_socket[i].virt_io);
}
DEBUG(1, "au1000: shutdown complete\n");
}
module_exit(au1000_pcmcia_driver_shutdown);
static int au1000_pcmcia_init(unsigned int sock)
{
return 0;
}
static int au1000_pcmcia_suspend(unsigned int sock)
{
return 0;
}
static inline unsigned au1000_pcmcia_events(struct pcmcia_state *state, struct pcmcia_state
*prev_state, unsigned int mask,
unsigned int flags)
{
unsigned int events = 0;
if (state->detect != prev_state->detect) {
DEBUG(2, "%s(): card detect value %u\n", __FUNCTION__,
state->detect);
events |= mask & SS_DETECT;
}
if (state->ready != prev_state->ready) {
DEBUG(2, "%s(): card ready value %u\n", __FUNCTION__,
state->ready);
events |= mask & ((flags & SS_IOCARD) ? 0 : SS_READY);
}
if (state->bvd1 != prev_state->bvd1) {
DEBUG(2, "%s(): card BVD1 value %u\n", __FUNCTION__,
state->bvd1);
events |=
mask & (flags & SS_IOCARD) ? SS_STSCHG : SS_BATDEAD;
}
if (state->bvd2 != prev_state->bvd2) {
DEBUG(2, "%s(): card BVD2 value %u\n", __FUNCTION__,
state->bvd2);
events |= mask & (flags & SS_IOCARD) ? 0 : SS_BATWARN;
}
*prev_state = *state;
return events;
} /* au1000_pcmcia_events() */
/*
* Au1000_pcmcia_task_handler()
* Processes socket events.
*/
static void au1000_pcmcia_task_handler(void *data)
{
struct pcmcia_state state;
int i, events, irq_status;
for (i = 0; i < socket_count; i++) {
if (
(irq_status =
pcmcia_low_level->socket_state(i, &state)) < 0)
printk(KERN_ERR
"Error in kernel low-level PCMCIA service.\n");
events = au1000_pcmcia_events(&state,
&pcmcia_socket[i].k_state,
pcmcia_socket[i].
cs_state.csc_mask,
pcmcia_socket[i].
cs_state.flags);
if (pcmcia_socket[i].handler != NULL) {
pcmcia_socket[i].
handler(pcmcia_socket[i].handler_info, events);
}
}
} /* au1000_pcmcia_task_handler() */
static struct tq_struct au1000_pcmcia_task = {
routine:au1000_pcmcia_task_handler
};
static void au1000_pcmcia_poll_event(unsigned long dummy)
{
poll_timer.function = au1000_pcmcia_poll_event;
poll_timer.expires = jiffies + AU1000_PCMCIA_POLL_PERIOD;
add_timer(&poll_timer);
schedule_task(&au1000_pcmcia_task);
//au1000_pcmcia_task_handler(0);
}
/*
* au1000_pcmcia_interrupt()
* The actual interrupt work is performed by au1000_pcmcia_task(),
* because the Card Services event handling code performs scheduling
* operations which cannot be executed from within an interrupt context.
*/
static void au1000_pcmcia_interrupt(int irq, void *dev,
struct pt_regs *regs)
{
schedule_task(&au1000_pcmcia_task);
}
static int
au1000_pcmcia_register_callback(unsigned int sock,
void (*handler) (void *, unsigned int),
void *info)
{
if (handler == NULL) {
pcmcia_socket[sock].handler = NULL;
MOD_DEC_USE_COUNT;
} else {
MOD_INC_USE_COUNT;
pcmcia_socket[sock].handler = handler;
pcmcia_socket[sock].handler_info = info;
}
return 0;
}
/* au1000_pcmcia_inquire_socket()
*
* From the sa1100 socket driver :
*
* Implements the inquire_socket() operation for the in-kernel PCMCIA
* service (formerly SS_InquireSocket in Card Services). We set
* SS_CAP_STATIC_MAP, which disables the memory resource database check.
* (Mapped memory is set up within the socket driver itself.)
*
* In conjunction with the STATIC_MAP capability is a new field,
* `io_offset', recommended by David Hinds. Rather than go through
* the SetIOMap interface (which is not quite suited for communicating
* window locations up from the socket driver), we just pass up
* an offset which is applied to client-requested base I/O addresses
* in alloc_io_space().
*
* Returns: 0 on success, -1 if no pin has been configured for `sock'
*/
static int au1000_pcmcia_inquire_socket(unsigned int sock,
socket_cap_t * cap)
{
struct pcmcia_irq_info irq_info;
if (sock > socket_count) {
printk(KERN_ERR "au1000: socket %u not configured\n",
sock);
return -1;
}
/* from the sa1100_generic driver: */
/* SS_CAP_PAGE_REGS: used by setup_cis_mem() in cistpl.c to set the
* force_low argument to validate_mem() in rsrc_mgr.c -- since in
* general, the mapped * addresses of the PCMCIA memory regions
* will not be within 0xffff, setting force_low would be
* undesirable.
*
* SS_CAP_STATIC_MAP: don't bother with the (user-configured) memory
* resource database; we instead pass up physical address ranges
* and allow other parts of Card Services to deal with remapping.
*
* SS_CAP_PCCARD: we can deal with 16-bit PCMCIA & CF cards, but
* not 32-bit CardBus devices.
*/
cap->features =
(SS_CAP_PAGE_REGS | SS_CAP_STATIC_MAP | SS_CAP_PCCARD);
irq_info.sock = sock;
irq_info.irq = -1;
if (pcmcia_low_level->get_irq_info(&irq_info) < 0) {
printk(KERN_ERR
"Error obtaining IRQ info from kernel for socket %u\n",
sock);
return -1;
}
cap->irq_mask = 0;
cap->map_size = MAP_SIZE;
cap->pci_irq = irq_info.irq;
cap->io_offset = pcmcia_socket[sock].virt_io;
return 0;
} /* au1000_pcmcia_inquire_socket() */
static int
au1000_pcmcia_get_status(unsigned int sock, unsigned int *status)
{
struct pcmcia_state state;
if ((pcmcia_low_level->socket_state(sock, &state)) < 0) {
printk(KERN_ERR
"Unable to get PCMCIA status from kernel.\n");
return -1;
}
pcmcia_socket[sock].k_state = state;
*status = state.detect ? SS_DETECT : 0;
*status |= state.ready ? SS_READY : 0;
*status |= pcmcia_socket[sock].cs_state.Vcc ? SS_POWERON : 0;
if (pcmcia_socket[sock].cs_state.flags & SS_IOCARD)
*status |= state.bvd1 ? SS_STSCHG : 0;
else {
if (state.bvd1 == 0)
*status |= SS_BATDEAD;
else if (state.bvd2 == 0)
*status |= SS_BATWARN;
}
*status |= state.vs_3v ? SS_3VCARD : 0;
*status |= state.vs_Xv ? SS_XVCARD : 0;
DEBUG(2, "\tstatus: %s%s%s%s%s%s%s%s\n",
(*status & SS_DETECT) ? "DETECT " : "",
(*status & SS_READY) ? "READY " : "",
(*status & SS_BATDEAD) ? "BATDEAD " : "",
(*status & SS_BATWARN) ? "BATWARN " : "",
(*status & SS_POWERON) ? "POWERON " : "",
(*status & SS_STSCHG) ? "STSCHG " : "",
(*status & SS_3VCARD) ? "3VCARD " : "",
(*status & SS_XVCARD) ? "XVCARD " : "");
return 0;
} /* au1000_pcmcia_get_status() */
static int
au1000_pcmcia_get_socket(unsigned int sock, socket_state_t * state)
{
*state = pcmcia_socket[sock].cs_state;
return 0;
}
static int
au1000_pcmcia_set_socket(unsigned int sock, socket_state_t * state)
{
struct pcmcia_configure configure;
DEBUG(2, "\tmask: %s%s%s%s%s%s\n\tflags: %s%s%s%s%s%s\n"
"\tVcc %d Vpp %d irq %d\n",
(state->csc_mask == 0) ? "<NONE>" : "",
(state->csc_mask & SS_DETECT) ? "DETECT " : "",
(state->csc_mask & SS_READY) ? "READY " : "",
(state->csc_mask & SS_BATDEAD) ? "BATDEAD " : "",
(state->csc_mask & SS_BATWARN) ? "BATWARN " : "",
(state->csc_mask & SS_STSCHG) ? "STSCHG " : "",
(state->flags == 0) ? "<NONE>" : "",
(state->flags & SS_PWR_AUTO) ? "PWR_AUTO " : "",
(state->flags & SS_IOCARD) ? "IOCARD " : "",
(state->flags & SS_RESET) ? "RESET " : "",
(state->flags & SS_SPKR_ENA) ? "SPKR_ENA " : "",
(state->flags & SS_OUTPUT_ENA) ? "OUTPUT_ENA " : "",
state->Vcc, state->Vpp, state->io_irq);
configure.sock = sock;
configure.vcc = state->Vcc;
configure.vpp = state->Vpp;
configure.output = (state->flags & SS_OUTPUT_ENA) ? 1 : 0;
configure.speaker = (state->flags & SS_SPKR_ENA) ? 1 : 0;
configure.reset = (state->flags & SS_RESET) ? 1 : 0;
if (pcmcia_low_level->configure_socket(&configure) < 0) {
printk(KERN_ERR "Unable to configure socket %u\n", sock);
return -1;
}
pcmcia_socket[sock].cs_state = *state;
return 0;
} /* au1000_pcmcia_set_socket() */
static int
au1000_pcmcia_get_io_map(unsigned int sock, struct pccard_io_map *map)
{
DEBUG(1, "au1000_pcmcia_get_io_map: sock %d\n", sock);
if (map->map >= MAX_IO_WIN) {
printk(KERN_ERR "%s(): map (%d) out of range\n",
__FUNCTION__, map->map);
return -1;
}
*map = pcmcia_socket[sock].io_map[map->map];
return 0;
}
int au1000_pcmcia_set_io_map(unsigned int sock, struct pccard_io_map *map)
{
unsigned int speed;
unsigned long start;
if (map->map >= MAX_IO_WIN) {
printk(KERN_ERR "%s(): map (%d) out of range\n",
__FUNCTION__, map->map);
return -1;
}
if (map->flags & MAP_ACTIVE) {
speed =
(map->speed > 0) ? map->speed : AU1000_PCMCIA_IO_SPEED;
pcmcia_socket[sock].speed_io = speed;
}
start = map->start;
if (map->stop == 1) {
map->stop = PAGE_SIZE - 1;
}
map->start = pcmcia_socket[sock].virt_io;
map->stop = map->start + (map->stop - start);
pcmcia_socket[sock].io_map[map->map] = *map;
DEBUG(3, "set_io_map %d start %x stop %x\n", map->map, map->start,
map->stop);
return 0;
}
static int
au1000_pcmcia_get_mem_map(unsigned int sock, struct pccard_mem_map *map)
{
if (map->map >= MAX_WIN) {
printk(KERN_ERR "%s(): map (%d) out of range\n",
__FUNCTION__, map->map);
return -1;
}
*map = pcmcia_socket[sock].mem_map[map->map];
return 0;
}
static int
au1000_pcmcia_set_mem_map(unsigned int sock, struct pccard_mem_map *map)
{
unsigned int speed;
unsigned long start;
u_long flags;
if (map->map >= MAX_WIN) {
printk(KERN_ERR "%s(): map (%d) out of range\n",
__FUNCTION__, map->map);
return -1;
}
if (map->flags & MAP_ACTIVE) {
speed =
(map->speed >
0) ? map->speed : AU1000_PCMCIA_MEM_SPEED;
/* TBD */
if (map->flags & MAP_ATTRIB) {
pcmcia_socket[sock].speed_attr = speed;
} else {
pcmcia_socket[sock].speed_mem = speed;
}
}
save_flags(flags);
cli();
start = map->sys_start;
if (map->sys_stop == 0)
map->sys_stop = MAP_SIZE - 1;
if (map->flags & MAP_ATTRIB) {
map->sys_start =
pcmcia_socket[sock].phys_attr + map->card_start;
} else {
map->sys_start =
pcmcia_socket[sock].phys_mem + map->card_start;
}
map->sys_stop = map->sys_start + (map->sys_stop - start);
pcmcia_socket[sock].mem_map[map->map] = *map;
restore_flags(flags);
DEBUG(3, "set_mem_map %d start %x stop %x card_start %x\n",
map->map, map->sys_start, map->sys_stop, map->card_start);
return 0;
}
#if defined(CONFIG_PROC_FS)
static void
au1000_pcmcia_proc_setup(unsigned int sock, struct proc_dir_entry *base)
{
struct proc_dir_entry *entry;
if ((entry = create_proc_entry("status", 0, base)) == NULL) {
printk(KERN_ERR
"Unable to install \"status\" procfs entry\n");
return;
}
entry->read_proc = au1000_pcmcia_proc_status;
entry->data = (void *) sock;
}
/* au1000_pcmcia_proc_status()
* Implements the /proc/bus/pccard/??/status file.
*
* Returns: the number of characters added to the buffer
*/
static int
au1000_pcmcia_proc_status(char *buf, char **start, off_t pos,
int count, int *eof, void *data)
{
char *p = buf;
unsigned int sock = (unsigned int) data;
p += sprintf(p, "k_flags : %s%s%s%s%s%s%s\n",
pcmcia_socket[sock].k_state.detect ? "detect " : "",
pcmcia_socket[sock].k_state.ready ? "ready " : "",
pcmcia_socket[sock].k_state.bvd1 ? "bvd1 " : "",
pcmcia_socket[sock].k_state.bvd2 ? "bvd2 " : "",
pcmcia_socket[sock].k_state.wrprot ? "wrprot " : "",
pcmcia_socket[sock].k_state.vs_3v ? "vs_3v " : "",
pcmcia_socket[sock].k_state.vs_Xv ? "vs_Xv " : "");
p += sprintf(p, "status : %s%s%s%s%s%s%s%s%s\n",
pcmcia_socket[sock].
k_state.detect ? "SS_DETECT " : "",
pcmcia_socket[sock].k_state.ready ? "SS_READY " : "",
pcmcia_socket[sock].cs_state.Vcc ? "SS_POWERON " : "",
pcmcia_socket[sock].
cs_state.flags & SS_IOCARD ? \"SS_IOCARD " : "",
(pcmcia_socket[sock].cs_state.flags & SS_IOCARD
&& pcmcia_socket[sock].
k_state.bvd1) ? "SS_STSCHG " : "",
((pcmcia_socket[sock].cs_state.flags & SS_IOCARD) == 0
&& (pcmcia_socket[sock].k_state.bvd1 ==
0)) ? "SS_BATDEAD " : "",
((pcmcia_socket[sock].cs_state.flags & SS_IOCARD) == 0
&& (pcmcia_socket[sock].k_state.bvd2 ==
0)) ? "SS_BATWARN " : "",
pcmcia_socket[sock].k_state.vs_3v ? "SS_3VCARD " : "",
pcmcia_socket[sock].
k_state.vs_Xv ? "SS_XVCARD " : "");
p += sprintf(p, "mask : %s%s%s%s%s\n",
pcmcia_socket[sock].
cs_state.csc_mask & SS_DETECT ? \"SS_DETECT " : "",
pcmcia_socket[sock].
cs_state.csc_mask & SS_READY ? \"SS_READY " : "",
pcmcia_socket[sock].
cs_state.csc_mask & SS_BATDEAD ? \"SS_BATDEAD " : "",
pcmcia_socket[sock].
cs_state.csc_mask & SS_BATWARN ? \"SS_BATWARN " : "",
pcmcia_socket[sock].
cs_state.csc_mask & SS_STSCHG ? \"SS_STSCHG " : "");
p += sprintf(p, "cs_flags : %s%s%s%s%s\n",
pcmcia_socket[sock].
cs_state.flags & SS_PWR_AUTO ? \"SS_PWR_AUTO " : "",
pcmcia_socket[sock].
cs_state.flags & SS_IOCARD ? \"SS_IOCARD " : "",
pcmcia_socket[sock].
cs_state.flags & SS_RESET ? \"SS_RESET " : "",
pcmcia_socket[sock].
cs_state.flags & SS_SPKR_ENA ? \"SS_SPKR_ENA " : "",
pcmcia_socket[sock].
cs_state.flags & SS_OUTPUT_ENA ? \"SS_OUTPUT_ENA " :
"");
p +=
sprintf(p, "Vcc : %d\n",
pcmcia_socket[sock].cs_state.Vcc);
p +=
sprintf(p, "Vpp : %d\n",
pcmcia_socket[sock].cs_state.Vpp);
p +=
sprintf(p, "irq : %d\n",
pcmcia_socket[sock].cs_state.io_irq);
p += sprintf(p, "I/O : %u\n", pcmcia_socket[sock].speed_io);
p += sprintf(p, "attribute: %u\n", pcmcia_socket[sock].speed_attr);
p += sprintf(p, "common : %u\n", pcmcia_socket[sock].speed_mem);
return p - buf;
}
#endif /* defined(CONFIG_PROC_FS) */
--- NEW FILE: au1000_pb1000.c ---
/*
* Alchemy Semi PB1000 board specific pcmcia routines.
*
* Copyright 2001 MontaVista Software Inc.
* Author: MontaVista Software, Inc.
* pp...@mv... or so...@mv...
*
* ########################################################################
*
* This program is free software; you can distribute it and/or modify it
* under the terms of the GNU General Public License (Version 2) as
* published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
* for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
*
* ########################################################################
*
*
*/
#include <linux/module.h>
#include <linux/init.h>
#include <linux/config.h>
#include <linux/delay.h>
#include <linux/ioport.h>
#include <linux/kernel.h>
#include <linux/tqueue.h>
#include <linux/timer.h>
#include <linux/mm.h>
#include <linux/proc_fs.h>
#include <linux/version.h>
#include <linux/types.h>
#include <pcmcia/version.h>
#include <pcmcia/cs_types.h>
#include <pcmcia/cs.h>
#include <pcmcia/ss.h>
#include <pcmcia/bulkmem.h>
#include <pcmcia/cistpl.h>
#include <pcmcia/bus_ops.h>
#include "cs_internal.h"
#include <asm/io.h>
#include <asm/irq.h>
#include <asm/system.h>
#include <asm/au1000.h>
#include <asm/au1000_pcmcia.h>
#include <asm/pb1000.h>
extern struct pcmcia_x_table x_table;
static int pb1000_pcmcia_init(struct pcmcia_init *init)
{
u32 pcr;
pcr = PCR_SLOT_0_RST | PCR_SLOT_1_RST;
//writel(readl(PIN_FUNCTION) & ~(1<<8), PIN_FUNCTION); /* pin15 is gpio */
writel(0, PIN_FUNCTION); /* pin15 is gpio */
writel(readl(TSTATE_STATE_SET) | (1 << 15), TSTATE_STATE_SET); /* tristate gpio15 */
au_sync();
writel(0x8000, AU1000_MDR); /* clear pcmcia interrupt */
writel(0x4000, AU1000_MDR); /* enable pcmcia interrupt */
au_sync();
/* There's two sockets, but only the first one, 0, is used and tested */
return 1;
}
static int pb1000_pcmcia_shutdown(void)
{
u16 pcr;
pcr = 0;
writew(pcr, AU1000_PCR);
mdelay(20);
return 0;
}
static int
pb1000_pcmcia_socket_state(unsigned sock, struct pcmcia_state *state)
{
u16 levels, pcr;
unsigned char vs;
levels = readw(AU1000_ACR1);
pcr = readw(AU1000_PCR);
state->ready = 0;
state->vs_Xv = 0;
state->vs_3v = 0;
state->detect = 0;
/*
* CD1/2 are active low; so are the VSS pins; Ready is active high
*/
if (sock == 0) {
if ((levels & ACR1_SLOT_0_READY))
state->ready = 1;
if (!(levels & (ACR1_SLOT_0_CD1 | ACR1_SLOT_0_CD2))) {
state->detect = 1;
vs = (levels >> 4) & 0x3;
switch (vs) {
case 0:
case 1:
DEBUG(1, "%d: vs_3v\n", sock);
state->vs_3v = 1;
break;
case 2:
state->vs_Xv = 1;
DEBUG(1, "%d: vs_Xv\n", sock);
break;
case 3:
default:
break;
}
}
} else if (sock == 1) {
if ((levels & ACR1_SLOT_1_READY))
state->ready = 1;
if (!(levels & (ACR1_SLOT_1_CD1 | ACR1_SLOT_1_CD2))) {
state->detect = 1;
vs = (levels >> 12) & 0x3;
switch (vs) {
case 0:
case 1:
state->vs_3v = 1;
DEBUG(1, "%d: vs_3v\n", sock);
break;
case 2:
state->vs_Xv = 1;
DEBUG(1, "%d: vs_Xv\n", sock);
break;
case 3:
default:
break;
}
}
} else {
printk(KERN_ERR "pb1000 socket_state bad sock %d\n", sock);
}
state->bvd1 = 1;
state->bvd2 = 1;
state->wrprot = 0;
return 1;
}
static int pb1000_pcmcia_get_irq_info(struct pcmcia_irq_info *info)
{
if (info->sock > PCMCIA_MAX_SOCK)
return -1;
if (info->sock == 0)
info->irq = AU1000_GPIO_15;
else
info->irq = -1;
return 0;
}
static int
pb1000_pcmcia_configure_socket(const struct pcmcia_configure *configure)
{
u16 pcr;
if (configure->sock > PCMCIA_MAX_SOCK)
return -1;
pcr = readw(AU1000_PCR);
if (configure->sock == 0)
pcr &= ~(PCR_SLOT_0_VCC0 | PCR_SLOT_0_VCC1);
else
pcr &= ~(PCR_SLOT_1_VCC0 | PCR_SLOT_1_VCC1);
pcr &= ~PCR_SLOT_0_RST;
writew(pcr, AU1000_PCR);
mdelay(20);
switch (configure->vcc) {
case 0: /* Vcc 0 */
switch (configure->vpp) {
case 0:
pcr |=
SET_VCC_VPP(VCC_HIZ, VPP_GND, configure->sock);
DEBUG(3, "Vcc 0V Vpp 0V, pcr %x\n", pcr);
break;
case 12:
pcr |=
SET_VCC_VPP(VCC_HIZ, VPP_12V, configure->sock);
DEBUG(3, "Vcc 0V Vpp 12V, pcr %x\n", pcr);
break;
case 50:
pcr |=
SET_VCC_VPP(VCC_HIZ, VPP_5V, configure->sock);
DEBUG(3, "Vcc 0V Vpp 5V, pcr %x\n", pcr);
break;
case 33:
default:
pcr |=
SET_VCC_VPP(VCC_HIZ, VPP_HIZ, configure->sock);
printk(KERN_ERR "%s: bad Vcc/Vpp combo (%d:%d)\n",
__FUNCTION__, configure->vcc,
configure->vpp);
break;
}
break;
case 50: /* Vcc 5V */
switch (configure->vpp) {
case 0:
pcr |=
SET_VCC_VPP(VCC_5V, VPP_GND, configure->sock);
DEBUG(3, "Vcc 5V Vpp 0V, pcr %x\n", pcr);
break;
case 50:
pcr |=
SET_VCC_VPP(VCC_5V, VPP_5V, configure->sock);
DEBUG(3, "Vcc 5V Vpp 5V, pcr %x\n", pcr);
break;
case 12:
pcr |=
SET_VCC_VPP(VCC_5V, VPP_12V, configure->sock);
DEBUG(3, "Vcc 5V Vpp 12V, pcr %x\n", pcr);
break;
case 33:
default:
pcr |=
SET_VCC_VPP(VCC_HIZ, VPP_HIZ, configure->sock);
printk(KERN_ERR "%s: bad Vcc/Vpp combo (%d:%d)\n",
__FUNCTION__, configure->vcc,
configure->vpp);
break;
}
break;
case 33: /* Vcc 3.3V */
switch (configure->vpp) {
case 0:
pcr |=
SET_VCC_VPP(VCC_3V, VPP_GND, configure->sock);
DEBUG(3, "Vcc 3V Vpp 0V, pcr %x\n", pcr);
break;
case 50:
pcr |=
SET_VCC_VPP(VCC_3V, VPP_5V, configure->sock);
DEBUG(3, "Vcc 3V Vpp 5V, pcr %x\n", pcr);
break;
case 12:
pcr |=
SET_VCC_VPP(VCC_3V, VPP_12V, configure->sock);
DEBUG(3, "Vcc 3V Vpp 12V, pcr %x\n", pcr);
break;
case 33:
default:
pcr |=
SET_VCC_VPP(VCC_HIZ, VPP_HIZ, configure->sock);
printk(KERN_ERR "%s: bad Vcc/Vpp combo (%d:%d)\n",
__FUNCTION__, configure->vcc,
configure->vpp);
break;
}
break;
default: /* what's this ? */
pcr |= SET_VCC_VPP(VCC_HIZ, VPP_HIZ, configure->sock);
printk(KERN_ERR "%s: bad Vcc %d\n", __FUNCTION__,
configure->vcc);
break;
}
writew(pcr, AU1000_PCR);
mdelay(400);
pcr &= ~PCR_SLOT_0_RST;
if (configure->reset) {
pcr |= PCR_SLOT_0_RST;
}
writew(pcr, AU1000_PCR);
mdelay(200);
return 0;
}
struct pcmcia_low_level pb1000_pcmcia_ops = {
pb1000_pcmcia_init,
pb1000_pcmcia_shutdown,
pb1000_pcmcia_socket_state,
pb1000_pcmcia_get_irq_info,
pb1000_pcmcia_configure_socket
};
|
|
From: James S. <jsi...@us...> - 2001-09-05 18:28:08
|
Update of /cvsroot/linux-mips/linux/drivers/pcmcia In directory usw-pr-cvs1:/tmp/cvs-serv7555/pcmcia Log Message: Directory /cvsroot/linux-mips/linux/drivers/pcmcia added to the repository |
|
From: James S. <jsi...@us...> - 2001-09-05 16:30:00
|
Update of /cvsroot/linux-mips/linux/arch/mips64/sgi-ip27 In directory usw-pr-cvs1:/tmp/cvs-serv10622 Added Files: Makefile Log Message: Synced up. --- NEW FILE: Makefile --- # # Makefile for the IP27 specific kernel interface routines under Linux. # .S.s: $(CPP) $(CFLAGS) $< -o $*.s .S.o: $(CC) $(CFLAGS) -c $< -o $*.o O_TARGET = ip27.o obj-y := ip27-berr.o ip27-console.o ip27-irq.o ip27-init.o ip27-irq-glue.o \ ip27-klconfig.o ip27-klnuma.o ip27-memory.o ip27-nmi.o ip27-pci.o \ ip27-pci-dma.o ip27-reset.o ip27-setup.o ip27-timer.o include $(TOPDIR)/Rules.make |
|
From: Pete P. <pp...@us...> - 2001-09-05 05:40:32
|
Update of /cvsroot/linux-mips/linux/include/asm-mips In directory usw-pr-cvs1:/tmp/cvs-serv8533/include/asm-mips Modified Files: cpu.h Log Message: Changed the Alchemy Au1000 cpu defines and added a second define for the revision 2 part. Moved the au1000 case statement under the MIPS32 ifdef. Index: cpu.h =================================================================== RCS file: /cvsroot/linux-mips/linux/include/asm-mips/cpu.h,v retrieving revision 1.8 retrieving revision 1.9 diff -C2 -d -r1.8 -r1.9 *** cpu.h 2001/08/25 11:20:20 1.8 --- cpu.h 2001/09/05 05:40:30 1.9 *************** *** 39,43 **** */ #define PRID_IMP_R2000 0x0100 ! #define PRID_IMP_AU1000 0x0100 #define PRID_IMP_R3000 0x0200 /* Same as R2000A */ #define PRID_IMP_R6000 0x0300 /* Same as R3000A */ --- 39,44 ---- */ #define PRID_IMP_R2000 0x0100 ! #define PRID_IMP_AU1_REV1 0x0100 ! #define PRID_IMP_AU1_REV2 0x0200 #define PRID_IMP_R3000 0x0200 /* Same as R2000A */ #define PRID_IMP_R6000 0x0300 /* Same as R3000A */ |
|
From: Pete P. <pp...@us...> - 2001-09-05 05:40:32
|
Update of /cvsroot/linux-mips/linux/arch/mips/kernel
In directory usw-pr-cvs1:/tmp/cvs-serv8533/arch/mips/kernel
Modified Files:
setup.c
Log Message:
Changed the Alchemy Au1000 cpu defines and added a second
define for the revision 2 part. Moved the au1000 case
statement under the MIPS32 ifdef.
Index: setup.c
===================================================================
RCS file: /cvsroot/linux-mips/linux/arch/mips/kernel/setup.c,v
retrieving revision 1.11
retrieving revision 1.12
diff -C2 -d -r1.11 -r1.12
*** setup.c 2001/08/25 11:20:20 1.11
--- setup.c 2001/09/05 05:40:29 1.12
***************
*** 356,364 ****
}
break;
- #endif
case PRID_COMP_ALCHEMY:
switch (mips_cpu.processor_id & 0xff00) {
! #ifdef CONFIG_CPU_MIPS32
! case PRID_IMP_AU1000:
mips_cpu.cputype = CPU_AU1000;
mips_cpu.isa_level = MIPS_CPU_ISA_M32;
--- 356,363 ----
}
break;
case PRID_COMP_ALCHEMY:
switch (mips_cpu.processor_id & 0xff00) {
! case PRID_IMP_AU1_REV1:
! case PRID_IMP_AU1_REV2:
mips_cpu.cputype = CPU_AU1000;
mips_cpu.isa_level = MIPS_CPU_ISA_M32;
|
|
From: James S. <jsi...@us...> - 2001-09-04 22:41:04
|
Update of /cvsroot/linux-mips/linux/include/asm-mips64/ip32
In directory usw-pr-cvs1:/tmp/cvs-serv18698
Added Files:
crime.h io.h ip32_ints.h mace.h machine.h
Log Message:
O2 header files.
--- NEW FILE: crime.h ---
/*
* Definitions for the SGI O2 Crime chip.
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
* Copyright (C) 2000 Harald Koerfgen
*/
#ifndef __ASM_CRIME_H__
#define __ASM_CRIME_H__
#include <asm/addrspace.h>
/*
* Address map
*/
#ifndef _LANGUAGE_ASSEMBLY
#define CRIME_BASE KSEG1ADDR(0x14000000)
#else
#define CRIME_BASE 0xffffffffb4000000
#endif
#ifndef _LANGUAGE_ASSEMBLY
extern inline u64 crime_read_64 (unsigned long __offset) {
return *((volatile u64 *) (CRIME_BASE + __offset));
}
extern inline void crime_write_64 (unsigned long __offset, u64 __val) {
*((volatile u64 *) (CRIME_BASE + __offset)) = __val;
}
#endif
#undef BIT
#define BIT(x) (1UL << (x))
/* All CRIME registers are 64 bits */
#define CRIME_ID 0
#define CRIME_ID_MASK 0xff
#define CRIME_ID_IDBITS 0xf0
#define CRIME_ID_IDVALUE 0xa0
#define CRIME_ID_REV 0x0f
#define CRIME_REV_PETTY 0x00
#define CRIME_REV_11 0x11
#define CRIME_REV_13 0x13
#define CRIME_REV_14 0x14
#define CRIME_CONTROL (0x00000008)
#define CRIME_CONTROL_MASK 0x3fff /* 14-bit registers */
/* CRIME_CONTROL register bits */
#define CRIME_CONTROL_TRITON_SYSADC 0x2000
#define CRIME_CONTROL_CRIME_SYSADC 0x1000
#define CRIME_CONTROL_HARD_RESET 0x0800
#define CRIME_CONTROL_SOFT_RESET 0x0400
#define CRIME_CONTROL_DOG_ENA 0x0200
#define CRIME_CONTROL_ENDIANESS 0x0100
#define CRIME_CONTROL_ENDIAN_BIG 0x0100
#define CRIME_CONTROL_ENDIAN_LITTLE 0x0000
#define CRIME_CONTROL_CQUEUE_HWM 0x000f
#define CRIME_CONTROL_CQUEUE_SHFT 0
#define CRIME_CONTROL_WBUF_HWM 0x00f0
#define CRIME_CONTROL_WBUF_SHFT 8
#define CRIME_INT_STAT (0x00000010)
#define CRIME_INT_MASK (0x00000018)
#define CRIME_SOFT_INT (0x00000020)
#define CRIME_HARD_INT (0x00000028)
/* Bits in CRIME_INT_XXX and CRIME_HARD_INT */
#define MACE_VID_IN1_INT BIT (0)
#define MACE_VID_IN2_INT BIT (1)
#define MACE_VID_OUT_INT BIT (2)
#define MACE_ETHERNET_INT BIT (3)
#define MACE_SUPERIO_INT BIT (4)
#define MACE_MISC_INT BIT (5)
#define MACE_AUDIO_INT BIT (6)
#define MACE_PCI_BRIDGE_INT BIT (7)
#define MACEPCI_SCSI0_INT BIT (8)
#define MACEPCI_SCSI1_INT BIT (9)
#define MACEPCI_SLOT0_INT BIT (10)
#define MACEPCI_SLOT1_INT BIT (11)
#define MACEPCI_SLOT2_INT BIT (12)
#define MACEPCI_SHARED0_INT BIT (13)
#define MACEPCI_SHARED1_INT BIT (14)
#define MACEPCI_SHARED2_INT BIT (15)
#define CRIME_GBE0_INT BIT (16)
#define CRIME_GBE1_INT BIT (17)
#define CRIME_GBE2_INT BIT (18)
#define CRIME_GBE3_INT BIT (19)
#define CRIME_CPUERR_INT BIT (20)
#define CRIME_MEMERR_INT BIT (21)
#define CRIME_RE_EMPTY_E_INT BIT (22)
#define CRIME_RE_FULL_E_INT BIT (23)
#define CRIME_RE_IDLE_E_INT BIT (24)
#define CRIME_RE_EMPTY_L_INT BIT (25)
#define CRIME_RE_FULL_L_INT BIT (26)
#define CRIME_RE_IDLE_L_INT BIT (27)
#define CRIME_SOFT0_INT BIT (28)
#define CRIME_SOFT1_INT BIT (29)
#define CRIME_SOFT2_INT BIT (30)
#define CRIME_SYSCORERR_INT CRIME_SOFT2_INT
#define CRIME_VICE_INT BIT (31)
/* Masks for deciding who handles the interrupt */
#define CRIME_MACE_INT_MASK 0x8f
#define CRIME_MACEISA_INT_MASK 0x70
#define CRIME_MACEPCI_INT_MASK 0xff00
#define CRIME_CRIME_INT_MASK 0xffff0000
/*
* XXX Todo
*/
#define CRIME_DOG (0x00000030)
/* We are word-play compatible but not misspelling compatible */
#define MC_GRUFF CRIME_DOG
#define CRIME_DOG_MASK (0x001fffff)
/* CRIME_DOG register bits */
#define CRIME_DOG_POWER_ON_RESET (0x00010000)
#define CRIME_DOG_WARM_RESET (0x00080000)
#define CRIME_DOG_TIMEOUT (CRIME_DOG_POWER_ON_RESET|CRIME_DOG_WARM_RESET)
#define CRIME_DOG_VALUE (0x00007fff) /* ??? */
#define CRIME_TIME (0x00000038)
#define CRIME_TIME_MASK (0x0000ffffffffffff)
#ifdef MASTER_FREQ
#undef MASTER_FREQ
#endif
#define CRIME_MASTER_FREQ 66666500 /* Crime upcounter frequency */
#define CRIME_NS_PER_TICK 15 /* for delay_calibrate */
#define CRIME_CPU_ERROR_ADDR (0x00000040)
#define CRIME_CPU_ERROR_ADDR_MASK (0x3ffffffff)
#define CRIME_CPU_ERROR_STAT (0x00000048)
/* REV_PETTY only! */
#define CRIME_CPU_ERROR_ENA (0x00000050)
/*
* bit definitions for CRIME/VICE error status and enable registers
*/
#define CRIME_CPU_ERROR_MASK 0x7UL /* cpu error stat is 3 bits */
#define CRIME_CPU_ERROR_CPU_ILL_ADDR 0x4
#define CRIME_CPU_ERROR_VICE_WRT_PRTY 0x2
#define CRIME_CPU_ERROR_CPU_WRT_PRTY 0x1
/*
* these are the definitions for the error status/enable register in
* petty crime. Note that the enable register does not exist in crime
* rev 1 and above.
*/
#define CRIME_CPU_ERROR_MASK_REV0 0x3ff /* cpu error stat is 9 bits */
#define CRIME_CPU_ERROR_CPU_INV_ADDR_RD 0x200
#define CRIME_CPU_ERROR_VICE_II 0x100
#define CRIME_CPU_ERROR_VICE_SYSAD 0x80
#define CRIME_CPU_ERROR_VICE_SYSCMD 0x40
#define CRIME_CPU_ERROR_VICE_INV_ADDR 0x20
#define CRIME_CPU_ERROR_CPU_II 0x10
#define CRIME_CPU_ERROR_CPU_SYSAD 0x8
#define CRIME_CPU_ERROR_CPU_SYSCMD 0x4
#define CRIME_CPU_ERROR_CPU_INV_ADDR_WR 0x2
#define CRIME_CPU_ERROR_CPU_INV_REG_ADDR 0x1
#define CRIME_VICE_ERROR_ADDR (0x00000058)
#define CRIME_VICE_ERROR_ADDR_MASK (0x3fffffff)
#define CRIME_MEM_CONTROL (0x00000200)
#define CRIME_MEM_CONTROL_MASK 0x3 /* 25 cent register */
#define CRIME_MEM_CONTROL_ECC_ENA 0x1
#define CRIME_MEM_CONTROL_USE_ECC_REPL 0x2
/*
* macros for CRIME memory bank control registers.
*/
#define CRIME_MEM_BANK_CONTROL(__bank) (0x00000208 + ((__bank) << 3))
#define CRIME_MEM_BANK_CONTROL_MSK 0x11f /* 9 bits 7:5 reserved */
#define CRIME_MEM_BANK_CONTROL_ADDR 0x01f
#define CRIME_MEM_BANK_CONTROL_SDRAM_SIZE 0x100
#define CRIME_MEM_BANK_CONTROL_BANK_TO_ADDR(__bank) \
(((__bank) & CRIME_MEM_BANK_CONTROL_ADDR) << 25)
#define CRIME_MEM_REFRESH_COUNTER (0x00000248)
#define CRIME_MEM_REFRESH_COUNTER_MASK 0x7ff /* 11-bit register */
#define CRIME_MAXBANKS 8
/*
* CRIME Memory error status register bit definitions
*/
#define CRIME_MEM_ERROR_STAT (0x00000250)
#define CRIME_MEM_ERROR_STAT_MASK 0x0ff7ffff /* 28-bit register */
#define CRIME_MEM_ERROR_MACE_ID 0x0000007f
#define CRIME_MEM_ERROR_MACE_ACCESS 0x00000080
#define CRIME_MEM_ERROR_RE_ID 0x00007f00
#define CRIME_MEM_ERROR_RE_ACCESS 0x00008000
#define CRIME_MEM_ERROR_GBE_ACCESS 0x00010000
#define CRIME_MEM_ERROR_VICE_ACCESS 0x00020000
#define CRIME_MEM_ERROR_CPU_ACCESS 0x00040000
#define CRIME_MEM_ERROR_RESERVED 0x00080000
#define CRIME_MEM_ERROR_SOFT_ERR 0x00100000
#define CRIME_MEM_ERROR_HARD_ERR 0x00200000
#define CRIME_MEM_ERROR_MULTIPLE 0x00400000
#define CRIME_MEM_ERROR_MEM_ECC_RD 0x00800000
#define CRIME_MEM_ERROR_MEM_ECC_RMW 0x01000000
#define CRIME_MEM_ERROR_INV_MEM_ADDR_RD 0x02000000
#define CRIME_MEM_ERROR_INV_MEM_ADDR_WR 0x04000000
#define CRIME_MEM_ERROR_INV_MEM_ADDR_RMW 0x08000000
#define CRIME_MEM_ERROR_ADDR (0x00000258)
#define CRIME_MEM_ERROR_ADDR_MASK 0x3fffffff
#define CRIME_MEM_ERROR_ECC_SYN (0x00000260)
#define CRIME_MEM_ERROR_ECC_SYN_MASK 0xffffffff
#define CRIME_MEM_ERROR_ECC_CHK (0x00000268)
#define CRIME_MEM_ERROR_ECC_CHK_MASK 0xffffffff
#define CRIME_MEM_ERROR_ECC_REPL (0x00000270)
#define CRIME_MEM_ERROR_ECC_REPL_MASK 0xffffffff
#endif /* __ASM_CRIME_H__ */
--- NEW FILE: io.h ---
#ifndef __ASM_IP32_IO_H__
#define __ASM_IP32_IO_H__
#include <asm/ip32/mace.h>
#define UNCACHEDADDR(x) (0x9000000000000000UL | (x))
#define IO_SPACE_BASE UNCACHEDADDR (MACEPCI_HI_MEMORY)
#define IO_SPACE_LIMIT 0xffffffffUL
#endif
--- NEW FILE: ip32_ints.h ---
/*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
* Copyright (C) 2000 Harald Koerfgen
*/
#ifndef __ASM_IP32_INTS_H
#define __ASM_IP32_INTS_H
/*
* This list reflects the assignment of interrupt numbers to
* interrupting events. Order is fairly irrelevant to handling
* priority. This differs from irix.
*/
/* CPU */
#define CLOCK_IRQ 0
/* MACE */
#define MACE_VID_IN1_IRQ 1
#define MACE_VID_IN2_IRQ 2
#define MACE_VID_OUT_IRQ 3
#define MACE_ETHERNET_IRQ 4
/* SUPERIO, MISC, and AUDIO are MACEISA */
#define MACE_PCI_BRIDGE_IRQ 8
/* MACEPCI */
#define MACEPCI_SCSI0_IRQ 9
#define MACEPCI_SCSI1_IRQ 10
#define MACEPCI_SLOT0_IRQ 11
#define MACEPCI_SLOT1_IRQ 12
#define MACEPCI_SLOT2_IRQ 13
#define MACEPCI_SHARED0_IRQ 14
#define MACEPCI_SHARED1_IRQ 15
#define MACEPCI_SHARED2_IRQ 16
/* CRIME */
#define CRIME_GBE0_IRQ 17
#define CRIME_GBE1_IRQ 18
#define CRIME_GBE2_IRQ 19
#define CRIME_GBE3_IRQ 20
#define CRIME_CPUERR_IRQ 21
#define CRIME_MEMERR_IRQ 22
#define CRIME_RE_EMPTY_E_IRQ 23
#define CRIME_RE_FULL_E_IRQ 24
#define CRIME_RE_IDLE_E_IRQ 25
#define CRIME_RE_EMPTY_L_IRQ 26
#define CRIME_RE_FULL_L_IRQ 27
#define CRIME_RE_IDLE_L_IRQ 28
#define CRIME_SOFT0_IRQ 29
#define CRIME_SOFT1_IRQ 30
#define CRIME_SOFT2_IRQ 31
#define CRIME_SYSCORERR_IRQ CRIME_SOFT2_IRQ
#define CRIME_VICE_IRQ 32
/* MACEISA */
#define MACEISA_AUDIO_SW_IRQ 33
#define MACEISA_AUDIO_SC_IRQ 34
#define MACEISA_AUDIO1_DMAT_IRQ 35
#define MACEISA_AUDIO1_OF_IRQ 36
#define MACEISA_AUDIO2_DMAT_IRQ 37
#define MACEISA_AUDIO2_MERR_IRQ 38
#define MACEISA_AUDIO3_DMAT_IRQ 39
#define MACEISA_AUDIO3_MERR_IRQ 40
#define MACEISA_RTC_IRQ 41
#define MACEISA_KEYB_IRQ 42
/* MACEISA_KEYB_POLL is not an IRQ */
#define MACEISA_MOUSE_IRQ 44
/* MACEISA_MOUSE_POLL is not an IRQ */
#define MACEISA_TIMER0_IRQ 46
#define MACEISA_TIMER1_IRQ 47
#define MACEISA_TIMER2_IRQ 48
#define MACEISA_PARALLEL_IRQ 49
#define MACEISA_PAR_CTXA_IRQ 50
#define MACEISA_PAR_CTXB_IRQ 51
#define MACEISA_PAR_MERR_IRQ 52
#define MACEISA_SERIAL1_IRQ 53
#define MACEISA_SERIAL1_TDMAT_IRQ 54
#define MACEISA_SERIAL1_TDMAPR_IRQ 55
#define MACEISA_SERIAL1_TDMAME_IRQ 56
#define MACEISA_SERIAL1_RDMAT_IRQ 57
#define MACEISA_SERIAL1_RDMAOR_IRQ 58
#define MACEISA_SERIAL2_IRQ 59
#define MACEISA_SERIAL2_TDMAT_IRQ 60
#define MACEISA_SERIAL2_TDMAPR_IRQ 61
#define MACEISA_SERIAL2_TDMAME_IRQ 62
#define MACEISA_SERIAL2_RDMAT_IRQ 63
#define MACEISA_SERIAL2_RDMAOR_IRQ 64
#define IP32_IRQ_MAX MACEISA_SERIAL2_RDMAOR_IRQ
#endif /* __ASM_IP32_INTS_H */
--- NEW FILE: mace.h ---
/*
* Definitions for the SGI O2 Mace chip.
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
* Copyright (C) 2000 Harald Koerfgen
*/
#ifndef __ASM_MACE_H__
#define __ASM_MACE_H__
#include <asm/addrspace.h>
/*
* Address map
*/
#define MACE_BASE KSEG1ADDR(0x1f000000)
#define MACE_PCI (0x00080000)
#define MACE_VIN1 (0x00100000)
#define MACE_VIN2 (0x00180000)
#define MACE_VOUT (0x00200000)
#define MACE_ENET (0x00280000)
#define MACE_PERIF (0x00300000)
#define MACE_ISA_EXT (0x00380000)
#define MACE_AUDIO_BASE (MACE_PERIF )
#define MACE_ISA_BASE (MACE_PERIF + 0x00010000)
#define MACE_KBDMS_BASE (MACE_PERIF + 0x00020000)
#define MACE_I2C_BASE (MACE_PERIF + 0x00030000)
#define MACE_UST_BASE (MACE_PERIF + 0x00040000)
#ifndef _LANGUAGE_ASSEMBLY
#include <asm/types.h>
/*
* XXX Some of these are probably not needed (or even legal?)
*/
extern inline u8 mace_read_8 (unsigned long __offset) {
return *((volatile u8 *) (MACE_BASE + __offset));
}
extern inline u16 mace_read_16 (unsigned long __offset) {
return *((volatile u16 *) (MACE_BASE + __offset));
}
extern inline u32 mace_read_32 (unsigned long __offset) {
return *((volatile u32 *) (MACE_BASE + __offset));
}
extern inline u64 mace_read_64 (unsigned long __offset) {
return *((volatile u64 *) (MACE_BASE + __offset));
}
extern inline void mace_write_8 (unsigned long __offset, u8 __val) {
*((volatile u8 *) (MACE_BASE + __offset)) = __val;
}
extern inline void mace_write_16 (unsigned long __offset, u16 __val) {
*((volatile u16 *) (MACE_BASE + __offset)) = __val;
}
extern inline void mace_write_32 (unsigned long __offset, u32 __val) {
*((volatile u32 *) (MACE_BASE + __offset)) = __val;
}
extern inline void mace_write_64 (unsigned long __offset, u64 __val) {
*((volatile u64 *) (MACE_BASE + __offset)) = __val;
}
#endif
#undef BIT
#define BIT(__bit_offset) (1UL << (__bit_offset))
/*
* Mace MACEPCI interface, 32 bit regs
*/
#define MACEPCI_ERROR_ADDR (MACE_PCI )
#define MACEPCI_ERROR_FLAGS (MACE_PCI + 0x00000004)
#define MACEPCI_CONTROL (MACE_PCI + 0x00000008)
#define MACEPCI_REV (MACE_PCI + 0x0000000c)
#define MACEPCI_WFLUSH (MACE_PCI + 0x0000000c) /* ??? */
#define MACEPCI_CONFIG_ADDR (MACE_PCI + 0x00000cf8)
#define MACEPCI_CONFIG_DATA (MACE_PCI + 0x00000cfc)
#define MACEPCI_LOW_MEMORY 0x1a000000
#define MACEPCI_LOW_IO 0x18000000
#define MACEPCI_SWAPPED_VIEW 0
#define MACEPCI_NATIVE_VIEW 0x40000000
#define MACEPCI_IO 0x80000000
#define MACEPCI_HI_MEMORY 0x0000000280000000UL
#define MACEPCI_HI_IO 0x0000000100000000UL
/*
* Bits in the MACEPCI_CONTROL register
*/
#define MACEPCI_CONTROL_INT(x) BIT(x)
#define MACEPCI_CONTROL_INT_MASK 0xff
#define MACEPCI_CONTROL_SERR_ENA BIT(8)
#define MACEPCI_CONTROL_ARB_N6 BIT(9)
#define MACEPCI_CONTROL_PARITY_ERR BIT(10)
#define MACEPCI_CONTROL_MRMRA_ENA BIT(11)
#define MACEPCI_CONTROL_ARB_N3 BIT(12)
#define MACEPCI_CONTROL_ARB_N4 BIT(13)
#define MACEPCI_CONTROL_ARB_N5 BIT(14)
#define MACEPCI_CONTROL_PARK_LIU BIT(15)
#define MACEPCI_CONTROL_INV_INT(x) BIT(16+x)
#define MACEPCI_CONTROL_INV_INT_MASK 0x00ff0000
#define MACEPCI_CONTROL_OVERRUN_INT BIT(24)
#define MACEPCI_CONTROL_PARITY_INT BIT(25)
#define MACEPCI_CONTROL_SERR_INT BIT(26)
#define MACEPCI_CONTROL_IT_INT BIT(27)
#define MACEPCI_CONTROL_RE_INT BIT(28)
#define MACEPCI_CONTROL_DPED_INT BIT(29)
#define MACEPCI_CONTROL_TAR_INT BIT(30)
#define MACEPCI_CONTROL_MAR_INT BIT(31)
/*
* Bits in the MACE_PCI error register
*/
#define MACEPCI_ERROR_MASTER_ABORT BIT(31)
#define MACEPCI_ERROR_TARGET_ABORT BIT(30)
#define MACEPCI_ERROR_DATA_PARITY_ERR BIT(29)
#define MACEPCI_ERROR_RETRY_ERR BIT(28)
#define MACEPCI_ERROR_ILLEGAL_CMD BIT(27)
#define MACEPCI_ERROR_SYSTEM_ERR BIT(26)
#define MACEPCI_ERROR_INTERRUPT_TEST BIT(25)
#define MACEPCI_ERROR_PARITY_ERR BIT(24)
#define MACEPCI_ERROR_OVERRUN BIT(23)
#define MACEPCI_ERROR_RSVD BIT(22)
#define MACEPCI_ERROR_MEMORY_ADDR BIT(21)
#define MACEPCI_ERROR_CONFIG_ADDR BIT(20)
#define MACEPCI_ERROR_MASTER_ABORT_ADDR_VALID BIT(19)
#define MACEPCI_ERROR_TARGET_ABORT_ADDR_VALID BIT(18)
#define MACEPCI_ERROR_DATA_PARITY_ADDR_VALID BIT(17)
#define MACEPCI_ERROR_RETRY_ADDR_VALID BIT(16)
#define MACEPCI_ERROR_SIG_TABORT BIT(4)
#define MACEPCI_ERROR_DEVSEL_MASK 0xc0
#define MACEPCI_ERROR_DEVSEL_FAST 0
#define MACEPCI_ERROR_DEVSEL_MED 0x40
#define MACEPCI_ERROR_DEVSEL_SLOW 0x80
#define MACEPCI_ERROR_FBB BIT(1)
#define MACEPCI_ERROR_66MHZ BIT(0)
/*
* Mace timer registers - 64 bit regs (63:32 are UST, 31:0 are MSC)
*/
#define MSC_PART(__reg) ((__reg) & 0x00000000ffffffff)
#define UST_PART(__reg) (((__reg) & 0xffffffff00000000) >> 32)
#define MACE_UST_UST (MACE_UST_BASE ) /* Universial system time */
#define MACE_UST_COMPARE1 (MACE_UST_BASE + 0x00000008) /* Interrupt compare reg 1 */
#define MACE_UST_COMPARE2 (MACE_UST_BASE + 0x00000010) /* Interrupt compare reg 2 */
#define MACE_UST_COMPARE3 (MACE_UST_BASE + 0x00000018) /* Interrupt compare reg 3 */
#define MACE_UST_PERIOD_NS 960 /* UST Period in ns */
#define MACE_UST_AIN_MSC (MACE_UST_BASE + 0x00000020) /* Audio in MSC/UST pair */
#define MACE_UST_AOUT1_MSC (MACE_UST_BASE + 0x00000028) /* Audio out 1 MSC/UST pair */
#define MACE_UST_AOUT2_MSC (MACE_UST_BASE + 0x00000030) /* Audio out 2 MSC/UST pair */
#define MACE_VIN1_MSC_UST (MACE_UST_BASE + 0x00000038) /* Video In 1 MSC/UST pair */
#define MACE_VIN2_MSC_UST (MACE_UST_BASE + 0x00000040) /* Video In 2 MSC/UST pair */
#define MACE_VOUT_MSC_UST (MACE_UST_BASE + 0x00000048) /* Video out MSC/UST pair */
/*
* Mace "ISA" peripherals
*/
#define MACEISA_EPP_BASE (MACE_ISA_EXT )
#define MACEISA_ECP_BASE (MACE_ISA_EXT + 0x00008000)
#define MACEISA_SER1_BASE (MACE_ISA_EXT + 0x00010000)
#define MACEISA_SER2_BASE (MACE_ISA_EXT + 0x00018000)
#define MACEISA_RTC_BASE (MACE_ISA_EXT + 0x00020000)
#define MACEISA_GAME_BASE (MACE_ISA_EXT + 0x00030000)
/*
* Ringbase address and reset register - 64 bits
*/
#define MACEISA_RINGBASE MACE_ISA_BASE
/*
* Flash-ROM/LED/DP-RAM/NIC Controller Register - 64 bits (?)
*/
#define MACEISA_FLASH_NIC_REG (MACE_ISA_BASE + 0x00000008)
/*
* Bit definitions for that
*/
#define MACEISA_FLASH_WE BIT(0) /* 1=> Enable FLASH writes */
#define MACEISA_PWD_CLEAR BIT(1) /* 1=> PWD CLEAR jumper detected */
#define MACEISA_NIC_DEASSERT BIT(2)
#define MACEISA_NIC_DATA BIT(3)
#define MACEISA_LED_RED BIT(4) /* 1=> Illuminate RED LED */
#define MACEISA_LED_GREEN BIT(5) /* 1=> Illuminate GREEN LED */
#define MACEISA_DP_RAM_ENABLE BIT(6)
/*
* ISA interrupt and status registers - 32 bit
*/
#define MACEISA_INT_STAT (MACE_ISA_BASE + 0x00000014)
#define MACEISA_INT_MASK (MACE_ISA_BASE + 0x0000001c)
/*
* Bits in the status/mask registers
*/
#define MACEISA_AUDIO_SW_INT BIT (0)
#define MACEISA_AUDIO_SC_INT BIT (1)
#define MACEISA_AUDIO1_DMAT_INT BIT (2)
#define MACEISA_AUDIO1_OF_INT BIT (3)
#define MACEISA_AUDIO2_DMAT_INT BIT (4)
#define MACEISA_AUDIO2_MERR_INT BIT (5)
#define MACEISA_AUDIO3_DMAT_INT BIT (6)
#define MACEISA_AUDIO3_MERR_INT BIT (7)
#define MACEISA_RTC_INT BIT (8)
#define MACEISA_KEYB_INT BIT (9)
#define MACEISA_KEYB_POLL_INT BIT (10)
#define MACEISA_MOUSE_INT BIT (11)
#define MACEISA_MOUSE_POLL_INT BIT (12)
#define MACEISA_TIMER0_INT BIT (13)
#define MACEISA_TIMER1_INT BIT (14)
#define MACEISA_TIMER2_INT BIT (15)
#define MACEISA_PARALLEL_INT BIT (16)
#define MACEISA_PAR_CTXA_INT BIT (17)
#define MACEISA_PAR_CTXB_INT BIT (18)
#define MACEISA_PAR_MERR_INT BIT (19)
#define MACEISA_SERIAL1_INT BIT (20)
#define MACEISA_SERIAL1_TDMAT_INT BIT (21)
#define MACEISA_SERIAL1_TDMAPR_INT BIT (22)
#define MACEISA_SERIAL1_TDMAME_INT BIT (23)
#define MACEISA_SERIAL1_RDMAT_INT BIT (24)
#define MACEISA_SERIAL1_RDMAOR_INT BIT (25)
#define MACEISA_SERIAL2_INT BIT (26)
#define MACEISA_SERIAL2_TDMAT_INT BIT (27)
#define MACEISA_SERIAL2_TDMAPR_INT BIT (28)
#define MACEISA_SERIAL2_TDMAME_INT BIT (29)
#define MACEISA_SERIAL2_RDMAT_INT BIT (30)
#define MACEISA_SERIAL2_RDMAOR_INT BIT (31)
#endif /* __ASM_MACE_H__ */
--- NEW FILE: machine.h ---
/*
* machine.h -- Machine/group probing for ip32
*
* Copyright (C) 2001 Keith M Wesolowski
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file COPYING in the main directory of this archive
* for more details.
*/
#ifndef _ASM_IP32_MACHINE_H
#define _ASM_IP32_MACHINE_H
#ifdef CONFIG_SGI_IP32
#define SGI_MACH_O2 0x3201
#endif /* CONFIG_SGI_IP32 */
#endif /* _ASM_SGI_MACHINE_H */
|
|
From: James S. <jsi...@us...> - 2001-09-04 22:38:44
|
Update of /cvsroot/linux-mips/linux/include/asm-mips64/ip32 In directory usw-pr-cvs1:/tmp/cvs-serv18176/ip32 Log Message: Directory /cvsroot/linux-mips/linux/include/asm-mips64/ip32 added to the repository |
|
From: James S. <jsi...@us...> - 2001-09-04 21:21:04
|
Update of /cvsroot/linux-mips/linux/arch/mips/cobalt In directory usw-pr-cvs1:/tmp/cvs-serv394 Removed Files: hw_access.c Log Message: Say good bye old time. --- hw_access.c DELETED --- |
|
From: James S. <jsi...@us...> - 2001-09-04 21:20:31
|
Update of /cvsroot/linux-mips/linux/arch/mips/cobalt
In directory usw-pr-cvs1:/tmp/cvs-serv32711
Added Files:
rtc_qube.c
Log Message:
Renamed to work toward new time support.
--- NEW FILE: rtc_qube.c ---
/*
* Low-level hardware access stuff for Cobalt Microserver 27 board.
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
* Copyright (C) 1995, 1996, 1997 by Ralf Baechle
*/
#include <linux/delay.h>
#include <linux/kernel.h>
#include <linux/linkage.h>
#include <linux/types.h>
#include <linux/sched.h>
#include <linux/mc146818rtc.h>
#include <asm/cachectl.h>
#include <asm/cobalt/cobalt.h>
#include <asm/segment.h>
void
dummy(void)
{
}
static unsigned char cobalt_read_cmos(unsigned long reg)
{
unsigned char retval;
VIA_PORT_WRITE(0x70, reg);
retval = VIA_PORT_READ(0x71);
VIA_DELAY();
return retval;
}
static void cobalt_write_cmos(unsigned char val, unsigned long reg)
{
VIA_PORT_WRITE(0x70, reg);
VIA_PORT_WRITE(0x71, val);
}
struct rtc_ops cobalt_rtc_ops = {
/*
* How to access the RTC functions
*/
&cobalt_read_cmos,
&cobalt_write_cmos,
(void *)dummy /* rtc_bcd_mode */
};
|
|
From: James S. <jsi...@us...> - 2001-09-04 20:28:16
|
Update of /cvsroot/linux-mips/linux/arch/mips/cobalt In directory usw-pr-cvs1:/tmp/cvs-serv19153 Modified Files: setup.c Log Message: It compiles now. I really need to convert it over to the new time stuff. Index: setup.c =================================================================== RCS file: /cvsroot/linux-mips/linux/arch/mips/cobalt/setup.c,v retrieving revision 1.3 retrieving revision 1.4 diff -C2 -d -r1.3 -r1.4 *** setup.c 2001/09/04 20:10:01 1.3 --- setup.c 2001/09/04 20:28:13 1.4 *************** *** 87,90 **** --- 87,92 ---- } + void (*board_time_init)(struct irqaction *irq); + #define GALILEO_T0_VAL 0xb4000850 #define GALILEO_TIMER_CTRL 0xb4000864 |
|
From: James S. <jsi...@us...> - 2001-09-04 20:12:12
|
Update of /cvsroot/linux-mips/linux/arch/mips/cobalt
In directory usw-pr-cvs1:/tmp/cvs-serv15457
Modified Files:
pci.c
Log Message:
Added pcibios_assign_all_busses for cobalt.
Index: pci.c
===================================================================
RCS file: /cvsroot/linux-mips/linux/arch/mips/cobalt/pci.c,v
retrieving revision 1.2
retrieving revision 1.3
diff -C2 -d -r1.2 -r1.3
*** pci.c 2001/07/09 21:50:55 1.2
--- pci.c 2001/09/04 20:12:09 1.3
***************
*** 443,445 ****
--- 443,450 ----
/* We don't appear to have sub-busses to fixup here */
}
+
+ unsigned __init int pcibios_assign_all_busses(void)
+ {
+ return 1;
+ }
#endif /* CONFIG_PCI */
|
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From: James S. <jsi...@us...> - 2001-09-04 20:10:03
|
Update of /cvsroot/linux-mips/linux/arch/mips/cobalt In directory usw-pr-cvs1:/tmp/cvs-serv14800 Modified Files: setup.c Log Message: Removed board_time_init since it is now in kernel/time.c. Index: setup.c =================================================================== RCS file: /cvsroot/linux-mips/linux/arch/mips/cobalt/setup.c,v retrieving revision 1.2 retrieving revision 1.3 diff -C2 -d -r1.2 -r1.3 *** setup.c 2001/07/09 21:50:55 1.2 --- setup.c 2001/09/04 20:10:01 1.3 *************** *** 87,92 **** } - void (*board_time_init)(struct irqaction *irq); - #define GALILEO_T0_VAL 0xb4000850 #define GALILEO_TIMER_CTRL 0xb4000864 --- 87,90 ---- |
|
From: James S. <jsi...@us...> - 2001-09-04 20:05:43
|
Update of /cvsroot/linux-mips/linux/arch/mips/lib
In directory usw-pr-cvs1:/tmp/cvs-serv13207
Modified Files:
ide-std.c
Log Message:
Dumb dumb mistake with #endif
Index: ide-std.c
===================================================================
RCS file: /cvsroot/linux-mips/linux/arch/mips/lib/ide-std.c,v
retrieving revision 1.4
retrieving revision 1.5
diff -C2 -d -r1.4 -r1.5
*** ide-std.c 2001/08/28 02:31:38 1.4
--- ide-std.c 2001/09/04 20:05:41 1.5
***************
*** 21,24 ****
--- 21,25 ----
#else
switch (base) {
+ #endif
case 0x1f0: return 14;
case 0x170: return 15;
***************
*** 30,34 ****
return 0;
}
- #endif
}
--- 31,34 ----
|
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From: James S. <jsi...@us...> - 2001-09-04 16:43:49
|
Update of /cvsroot/linux-mips/linux/arch/mips/kernel In directory usw-pr-cvs1:/tmp/cvs-serv22842 Modified Files: scall_o32.S Log Message: More syncing. Index: scall_o32.S =================================================================== RCS file: /cvsroot/linux-mips/linux/arch/mips/kernel/scall_o32.S,v retrieving revision 1.4 retrieving revision 1.5 diff -C2 -d -r1.4 -r1.5 *** scall_o32.S 2001/08/22 18:18:14 1.4 --- scall_o32.S 2001/09/04 16:43:46 1.5 *************** *** 87,90 **** --- 87,91 ---- mtc0 t0, CP0_STATUS + SAVE_STATIC move a0, zero move a1, sp *************** *** 93,97 **** o32_reschedule: - SAVE_STATIC jal schedule b o32_ret_from_sys_call --- 94,97 ---- |
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From: James S. <jsi...@us...> - 2001-09-04 16:19:13
|
Update of /cvsroot/linux-mips/linux/arch/mips/ite-boards/generic In directory usw-pr-cvs1:/tmp/cvs-serv14884 Modified Files: irq.c Log Message: Use slab instead of malloc.h Index: irq.c =================================================================== RCS file: /cvsroot/linux-mips/linux/arch/mips/ite-boards/generic/irq.c,v retrieving revision 1.2 retrieving revision 1.3 diff -C2 -d -r1.2 -r1.3 *** irq.c 2001/08/25 02:19:27 1.2 --- irq.c 2001/09/04 16:19:10 1.3 *************** *** 44,48 **** #include <linux/ioport.h> #include <linux/timex.h> ! #include <linux/malloc.h> #include <linux/random.h> #include <linux/serial_reg.h> --- 44,48 ---- #include <linux/ioport.h> #include <linux/timex.h> ! #include <linux/slab.h> #include <linux/random.h> #include <linux/serial_reg.h> |
|
From: James S. <jsi...@us...> - 2001-09-04 16:17:24
|
Update of /cvsroot/linux-mips/linux/include/asm-mips64
In directory usw-pr-cvs1:/tmp/cvs-serv14345
Modified Files:
uaccess.h
Log Message:
Synced up.
Index: uaccess.h
===================================================================
RCS file: /cvsroot/linux-mips/linux/include/asm-mips64/uaccess.h,v
retrieving revision 1.2
retrieving revision 1.3
diff -C2 -d -r1.2 -r1.3
*** uaccess.h 2001/07/20 17:49:15 1.2
--- uaccess.h 2001/09/04 16:17:22 1.3
***************
*** 57,61 ****
__access_ok(((unsigned long)(addr)),(size),__access_mask)
! extern inline int verify_area(int type, const void * addr, unsigned long size)
{
return access_ok(type,addr,size) ? 0 : -EFAULT;
--- 57,61 ----
__access_ok(((unsigned long)(addr)),(size),__access_mask)
! static inline int verify_area(int type, const void * addr, unsigned long size)
{
return access_ok(type,addr,size) ? 0 : -EFAULT;
***************
*** 352,356 ****
* buffer filled, else strlen.
*/
! extern inline long
__strncpy_from_user(char *__to, const char *__from, long __len)
{
--- 352,356 ----
* buffer filled, else strlen.
*/
! static inline long
__strncpy_from_user(char *__to, const char *__from, long __len)
{
***************
*** 370,374 ****
}
! extern inline long
strncpy_from_user(char *__to, const char *__from, long __len)
{
--- 370,374 ----
}
! static inline long
strncpy_from_user(char *__to, const char *__from, long __len)
{
***************
*** 389,393 ****
/* Returns: 0 if bad, string length+1 (memory size) of string if ok */
! extern inline long __strlen_user(const char *s)
{
long res;
--- 389,393 ----
/* Returns: 0 if bad, string length+1 (memory size) of string if ok */
! static inline long __strlen_user(const char *s)
{
long res;
***************
*** 404,408 ****
}
! extern inline long strlen_user(const char *s)
{
long res;
--- 404,408 ----
}
! static inline long strlen_user(const char *s)
{
long res;
***************
*** 420,424 ****
/* Returns: 0 if bad, string length+1 (memory size) of string if ok */
! extern inline long __strnlen_user(const char *s, long n)
{
long res;
--- 420,424 ----
/* Returns: 0 if bad, string length+1 (memory size) of string if ok */
! static inline long __strnlen_user(const char *s, long n)
{
long res;
***************
*** 436,440 ****
}
! extern inline long strnlen_user(const char *s, long n)
{
long res;
--- 436,440 ----
}
! static inline long strnlen_user(const char *s, long n)
{
long res;
|
|
From: James S. <jsi...@us...> - 2001-09-04 16:17:13
|
Update of /cvsroot/linux-mips/linux/include/asm-mips64
In directory usw-pr-cvs1:/tmp/cvs-serv14272
Modified Files:
system.h
Log Message:
Synced up.
Index: system.h
===================================================================
RCS file: /cvsroot/linux-mips/linux/include/asm-mips64/system.h,v
retrieving revision 1.1.1.1
retrieving revision 1.2
diff -C2 -d -r1.1.1.1 -r1.2
*** system.h 2001/06/22 02:29:33 1.1.1.1
--- system.h 2001/09/04 16:17:11 1.2
***************
*** 14,21 ****
#include <asm/sgidefs.h>
#include <linux/kernel.h>
! extern __inline__ void
! __sti(void)
{
__asm__ __volatile__(
--- 14,22 ----
#include <asm/sgidefs.h>
+ #include <asm/ptrace.h>
+
#include <linux/kernel.h>
! static inline void __sti(void)
{
__asm__ __volatile__(
***************
*** 40,45 ****
* no nops at all.
*/
! extern __inline__ void
! __cli(void)
{
__asm__ __volatile__(
--- 41,45 ----
* no nops at all.
*/
! static inline void __cli(void)
{
__asm__ __volatile__(
***************
*** 197,201 ****
} while(0)
! extern __inline__ unsigned long xchg_u32(volatile int * m, unsigned long val)
{
unsigned long dummy;
--- 197,201 ----
} while(0)
! static inline unsigned long xchg_u32(volatile int * m, unsigned long val)
{
unsigned long dummy;
***************
*** 218,222 ****
}
! extern __inline__ unsigned long xchg_u64(volatile long * m, unsigned long val)
{
unsigned long dummy;
--- 218,222 ----
}
! static inline unsigned long xchg_u64(volatile long * m, unsigned long val)
{
unsigned long dummy;
***************
*** 243,248 ****
! static __inline__ unsigned long
! __xchg(unsigned long x, volatile void * ptr, int size)
{
switch (size) {
--- 243,248 ----
! static inline unsigned long __xchg(unsigned long x, volatile void * ptr,
! int size)
{
switch (size) {
|
|
From: James S. <jsi...@us...> - 2001-09-04 16:16:37
|
Update of /cvsroot/linux-mips/linux/include/asm-mips64
In directory usw-pr-cvs1:/tmp/cvs-serv13986
Modified Files:
pgtable.h
Log Message:
Synced up.
Index: pgtable.h
===================================================================
RCS file: /cvsroot/linux-mips/linux/include/asm-mips64/pgtable.h,v
retrieving revision 1.2
retrieving revision 1.3
diff -C2 -d -r1.2 -r1.3
*** pgtable.h 2001/07/20 17:47:49 1.2
--- pgtable.h 2001/09/04 16:16:34 1.3
***************
*** 269,298 ****
* and a page entry and page directory to the page they refer to.
*/
! extern inline unsigned long pmd_page(pmd_t pmd)
{
return pmd_val(pmd);
}
! extern inline unsigned long pgd_page(pgd_t pgd)
{
return pgd_val(pgd);
}
! extern inline void pmd_set(pmd_t * pmdp, pte_t * ptep)
{
pmd_val(*pmdp) = (((unsigned long) ptep) & PAGE_MASK);
}
! extern inline void pgd_set(pgd_t * pgdp, pmd_t * pmdp)
{
pgd_val(*pgdp) = (((unsigned long) pmdp) & PAGE_MASK);
}
! extern inline int pte_none(pte_t pte)
{
return !pte_val(pte);
}
! extern inline int pte_present(pte_t pte)
{
return pte_val(pte) & _PAGE_PRESENT;
--- 269,298 ----
* and a page entry and page directory to the page they refer to.
*/
! static inline unsigned long pmd_page(pmd_t pmd)
{
return pmd_val(pmd);
}
! static inline unsigned long pgd_page(pgd_t pgd)
{
return pgd_val(pgd);
}
! static inline void pmd_set(pmd_t * pmdp, pte_t * ptep)
{
pmd_val(*pmdp) = (((unsigned long) ptep) & PAGE_MASK);
}
! static inline void pgd_set(pgd_t * pgdp, pmd_t * pmdp)
{
pgd_val(*pgdp) = (((unsigned long) pmdp) & PAGE_MASK);
}
! static inline int pte_none(pte_t pte)
{
return !pte_val(pte);
}
! static inline int pte_present(pte_t pte)
{
return pte_val(pte) & _PAGE_PRESENT;
***************
*** 304,313 ****
* hook is made available.
*/
! extern inline void set_pte(pte_t *ptep, pte_t pteval)
{
*ptep = pteval;
}
! extern inline void pte_clear(pte_t *ptep)
{
set_pte(ptep, __pte(0));
--- 304,313 ----
* hook is made available.
*/
! static inline void set_pte(pte_t *ptep, pte_t pteval)
{
*ptep = pteval;
}
! static inline void pte_clear(pte_t *ptep)
{
set_pte(ptep, __pte(0));
***************
*** 324,343 ****
* Empty pmd entries point to the invalid_pte_table.
*/
! extern inline int pmd_none(pmd_t pmd)
{
return pmd_val(pmd) == (unsigned long) invalid_pte_table;
}
! extern inline int pmd_bad(pmd_t pmd)
{
return pmd_val(pmd) &~ PAGE_MASK;
}
! extern inline int pmd_present(pmd_t pmd)
{
return pmd_val(pmd) != (unsigned long) invalid_pte_table;
}
! extern inline void pmd_clear(pmd_t *pmdp)
{
pmd_val(*pmdp) = ((unsigned long) invalid_pte_table);
--- 324,343 ----
* Empty pmd entries point to the invalid_pte_table.
*/
! static inline int pmd_none(pmd_t pmd)
{
return pmd_val(pmd) == (unsigned long) invalid_pte_table;
}
! static inline int pmd_bad(pmd_t pmd)
{
return pmd_val(pmd) &~ PAGE_MASK;
}
! static inline int pmd_present(pmd_t pmd)
{
return pmd_val(pmd) != (unsigned long) invalid_pte_table;
}
! static inline void pmd_clear(pmd_t *pmdp)
{
pmd_val(*pmdp) = ((unsigned long) invalid_pte_table);
***************
*** 347,366 ****
* Empty pgd entries point to the invalid_pmd_table.
*/
! extern inline int pgd_none(pgd_t pgd)
{
return pgd_val(pgd) == (unsigned long) invalid_pmd_table;
}
! extern inline int pgd_bad(pgd_t pgd)
{
return pgd_val(pgd) &~ PAGE_MASK;
}
! extern inline int pgd_present(pgd_t pgd)
{
return pgd_val(pgd) != (unsigned long) invalid_pmd_table;
}
! extern inline void pgd_clear(pgd_t *pgdp)
{
pgd_val(*pgdp) = ((unsigned long) invalid_pmd_table);
--- 347,366 ----
* Empty pgd entries point to the invalid_pmd_table.
*/
! static inline int pgd_none(pgd_t pgd)
{
return pgd_val(pgd) == (unsigned long) invalid_pmd_table;
}
! static inline int pgd_bad(pgd_t pgd)
{
return pgd_val(pgd) &~ PAGE_MASK;
}
! static inline int pgd_present(pgd_t pgd)
{
return pgd_val(pgd) != (unsigned long) invalid_pmd_table;
}
! static inline void pgd_clear(pgd_t *pgdp)
{
pgd_val(*pgdp) = ((unsigned long) invalid_pmd_table);
***************
*** 385,409 ****
* Undefined behaviour if not..
*/
! extern inline int pte_read(pte_t pte)
{
return pte_val(pte) & _PAGE_READ;
}
! extern inline int pte_write(pte_t pte)
{
return pte_val(pte) & _PAGE_WRITE;
}
! extern inline int pte_dirty(pte_t pte)
{
return pte_val(pte) & _PAGE_MODIFIED;
}
! extern inline int pte_young(pte_t pte)
{
return pte_val(pte) & _PAGE_ACCESSED;
}
! extern inline pte_t pte_wrprotect(pte_t pte)
{
pte_val(pte) &= ~(_PAGE_WRITE | _PAGE_SILENT_WRITE);
--- 385,409 ----
* Undefined behaviour if not..
*/
! static inline int pte_read(pte_t pte)
{
return pte_val(pte) & _PAGE_READ;
}
! static inline int pte_write(pte_t pte)
{
return pte_val(pte) & _PAGE_WRITE;
}
! static inline int pte_dirty(pte_t pte)
{
return pte_val(pte) & _PAGE_MODIFIED;
}
! static inline int pte_young(pte_t pte)
{
return pte_val(pte) & _PAGE_ACCESSED;
}
! static inline pte_t pte_wrprotect(pte_t pte)
{
pte_val(pte) &= ~(_PAGE_WRITE | _PAGE_SILENT_WRITE);
***************
*** 411,415 ****
}
! extern inline pte_t pte_rdprotect(pte_t pte)
{
pte_val(pte) &= ~(_PAGE_READ | _PAGE_SILENT_READ);
--- 411,415 ----
}
! static inline pte_t pte_rdprotect(pte_t pte)
{
pte_val(pte) &= ~(_PAGE_READ | _PAGE_SILENT_READ);
***************
*** 417,421 ****
}
! extern inline pte_t pte_mkclean(pte_t pte)
{
pte_val(pte) &= ~(_PAGE_MODIFIED|_PAGE_SILENT_WRITE);
--- 417,421 ----
}
! static inline pte_t pte_mkclean(pte_t pte)
{
pte_val(pte) &= ~(_PAGE_MODIFIED|_PAGE_SILENT_WRITE);
***************
*** 423,427 ****
}
! extern inline pte_t pte_mkold(pte_t pte)
{
pte_val(pte) &= ~(_PAGE_ACCESSED|_PAGE_SILENT_READ);
--- 423,427 ----
}
! static inline pte_t pte_mkold(pte_t pte)
{
pte_val(pte) &= ~(_PAGE_ACCESSED|_PAGE_SILENT_READ);
***************
*** 429,433 ****
}
! extern inline pte_t pte_mkwrite(pte_t pte)
{
pte_val(pte) |= _PAGE_WRITE;
--- 429,433 ----
}
! static inline pte_t pte_mkwrite(pte_t pte)
{
pte_val(pte) |= _PAGE_WRITE;
***************
*** 437,441 ****
}
! extern inline pte_t pte_mkread(pte_t pte)
{
pte_val(pte) |= _PAGE_READ;
--- 437,441 ----
}
! static inline pte_t pte_mkread(pte_t pte)
{
pte_val(pte) |= _PAGE_READ;
***************
*** 445,449 ****
}
! extern inline pte_t pte_mkdirty(pte_t pte)
{
pte_val(pte) |= _PAGE_MODIFIED;
--- 445,449 ----
}
! static inline pte_t pte_mkdirty(pte_t pte)
{
pte_val(pte) |= _PAGE_MODIFIED;
***************
*** 453,457 ****
}
! extern inline pte_t pte_mkyoung(pte_t pte)
{
pte_val(pte) |= _PAGE_ACCESSED;
--- 453,457 ----
}
! static inline pte_t pte_mkyoung(pte_t pte)
{
pte_val(pte) |= _PAGE_ACCESSED;
***************
*** 482,491 ****
})
! extern inline pte_t mk_pte_phys(unsigned long physpage, pgprot_t pgprot)
{
return __pte(physpage | pgprot_val(pgprot));
}
! extern inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
{
return __pte((pte_val(pte) & _PAGE_CHG_MASK) | pgprot_val(newprot));
--- 482,491 ----
})
! static inline pte_t mk_pte_phys(unsigned long physpage, pgprot_t pgprot)
{
return __pte(physpage | pgprot_val(pgprot));
}
! static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
{
return __pte((pte_val(pte) & _PAGE_CHG_MASK) | pgprot_val(newprot));
***************
*** 500,504 ****
/* to find an entry in a page-table-directory */
! extern inline pgd_t *pgd_offset(struct mm_struct *mm, unsigned long address)
{
return mm->pgd + pgd_index(address);
--- 500,504 ----
/* to find an entry in a page-table-directory */
! static inline pgd_t *pgd_offset(struct mm_struct *mm, unsigned long address)
{
return mm->pgd + pgd_index(address);
***************
*** 506,510 ****
/* Find an entry in the second-level page table.. */
! extern inline pmd_t * pmd_offset(pgd_t * dir, unsigned long address)
{
return (pmd_t *) pgd_page(*dir) +
--- 506,510 ----
/* Find an entry in the second-level page table.. */
! static inline pmd_t * pmd_offset(pgd_t * dir, unsigned long address)
{
return (pmd_t *) pgd_page(*dir) +
***************
*** 513,517 ****
/* Find an entry in the third-level page table.. */
! extern inline pte_t *pte_offset(pmd_t * dir, unsigned long address)
{
return (pte_t *) (pmd_page(*dir)) +
--- 513,517 ----
/* Find an entry in the third-level page table.. */
! static inline pte_t *pte_offset(pmd_t * dir, unsigned long address)
{
return (pte_t *) (pmd_page(*dir)) +
***************
*** 535,539 ****
* low 32 bits zero.
*/
! extern inline pte_t mk_swap_pte(unsigned long type, unsigned long offset)
{ pte_t pte; pte_val(pte) = (type << 32) | (offset << 40); return pte; }
--- 535,539 ----
* low 32 bits zero.
*/
! static inline pte_t mk_swap_pte(unsigned long type, unsigned long offset)
{ pte_t pte; pte_val(pte) = (type << 32) | (offset << 40); return pte; }
***************
*** 551,555 ****
/* TLB operations. */
! extern inline void tlb_probe(void)
{
__asm__ __volatile__(
--- 551,555 ----
/* TLB operations. */
! static inline void tlb_probe(void)
{
__asm__ __volatile__(
***************
*** 559,563 ****
}
! extern inline void tlb_read(void)
{
__asm__ __volatile__(
--- 559,563 ----
}
! static inline void tlb_read(void)
{
__asm__ __volatile__(
***************
*** 567,571 ****
}
! extern inline void tlb_write_indexed(void)
{
__asm__ __volatile__(
--- 567,571 ----
}
! static inline void tlb_write_indexed(void)
{
__asm__ __volatile__(
***************
*** 575,579 ****
}
! extern inline void tlb_write_random(void)
{
__asm__ __volatile__(
--- 575,579 ----
}
! static inline void tlb_write_random(void)
{
__asm__ __volatile__(
***************
*** 586,590 ****
/* CP0_PAGEMASK register */
! extern inline unsigned long get_pagemask(void)
{
unsigned long val;
--- 586,590 ----
/* CP0_PAGEMASK register */
! static inline unsigned long get_pagemask(void)
{
unsigned long val;
***************
*** 598,602 ****
}
! extern inline void set_pagemask(unsigned long val)
{
__asm__ __volatile__(
--- 598,602 ----
}
! static inline void set_pagemask(unsigned long val)
{
__asm__ __volatile__(
***************
*** 608,612 ****
/* CP0_ENTRYLO0 and CP0_ENTRYLO1 registers */
! extern inline unsigned long get_entrylo0(void)
{
unsigned long val;
--- 608,612 ----
/* CP0_ENTRYLO0 and CP0_ENTRYLO1 registers */
! static inline unsigned long get_entrylo0(void)
{
unsigned long val;
***************
*** 620,624 ****
}
! extern inline void set_entrylo0(unsigned long val)
{
__asm__ __volatile__(
--- 620,624 ----
}
! static inline void set_entrylo0(unsigned long val)
{
__asm__ __volatile__(
***************
*** 629,633 ****
}
! extern inline unsigned long get_entrylo1(void)
{
unsigned long val;
--- 629,633 ----
}
! static inline unsigned long get_entrylo1(void)
{
unsigned long val;
***************
*** 641,645 ****
}
! extern inline void set_entrylo1(unsigned long val)
{
__asm__ __volatile__(
--- 641,645 ----
}
! static inline void set_entrylo1(unsigned long val)
{
__asm__ __volatile__(
***************
*** 651,655 ****
/* CP0_ENTRYHI register */
! extern inline unsigned long get_entryhi(void)
{
unsigned long val;
--- 651,655 ----
/* CP0_ENTRYHI register */
! static inline unsigned long get_entryhi(void)
{
unsigned long val;
***************
*** 664,668 ****
}
! extern inline void set_entryhi(unsigned long val)
{
__asm__ __volatile__(
--- 664,668 ----
}
! static inline void set_entryhi(unsigned long val)
{
__asm__ __volatile__(
***************
*** 674,678 ****
/* CP0_INDEX register */
! extern inline unsigned int get_index(void)
{
unsigned long val;
--- 674,678 ----
/* CP0_INDEX register */
! static inline unsigned int get_index(void)
{
unsigned long val;
***************
*** 686,690 ****
}
! extern inline void set_index(unsigned int val)
{
__asm__ __volatile__(
--- 686,690 ----
}
! static inline void set_index(unsigned int val)
{
__asm__ __volatile__(
***************
*** 696,700 ****
/* CP0_WIRED register */
! extern inline unsigned long get_wired(void)
{
unsigned long val;
--- 696,700 ----
/* CP0_WIRED register */
! static inline unsigned long get_wired(void)
{
unsigned long val;
***************
*** 708,712 ****
}
! extern inline void set_wired(unsigned long val)
{
__asm__ __volatile__(
--- 708,712 ----
}
! static inline void set_wired(unsigned long val)
{
__asm__ __volatile__(
***************
*** 717,721 ****
}
! extern inline unsigned long get_info(void)
{
unsigned long val;
--- 717,721 ----
}
! static inline unsigned long get_info(void)
{
unsigned long val;
***************
*** 731,735 ****
/* CP0_TAGLO and CP0_TAGHI registers */
! extern inline unsigned long get_taglo(void)
{
unsigned long val;
--- 731,735 ----
/* CP0_TAGLO and CP0_TAGHI registers */
! static inline unsigned long get_taglo(void)
{
unsigned long val;
***************
*** 743,747 ****
}
! extern inline void set_taglo(unsigned long val)
{
__asm__ __volatile__(
--- 743,747 ----
}
! static inline void set_taglo(unsigned long val)
{
__asm__ __volatile__(
***************
*** 752,756 ****
}
! extern inline unsigned long get_taghi(void)
{
unsigned long val;
--- 752,756 ----
}
! static inline unsigned long get_taghi(void)
{
unsigned long val;
***************
*** 764,768 ****
}
! extern inline void set_taghi(unsigned long val)
{
__asm__ __volatile__(
--- 764,768 ----
}
! static inline void set_taghi(unsigned long val)
{
__asm__ __volatile__(
***************
*** 774,778 ****
/* CP0_CONTEXT register */
! extern inline unsigned long get_context(void)
{
unsigned long val;
--- 774,778 ----
/* CP0_CONTEXT register */
! static inline unsigned long get_context(void)
{
unsigned long val;
***************
*** 787,791 ****
}
! extern inline void set_context(unsigned long val)
{
__asm__ __volatile__(
--- 787,791 ----
}
! static inline void set_context(unsigned long val)
{
__asm__ __volatile__(
|
|
From: James S. <jsi...@us...> - 2001-09-04 16:16:21
|
Update of /cvsroot/linux-mips/linux/include/asm-mips64
In directory usw-pr-cvs1:/tmp/cvs-serv13912
Modified Files:
pci.h
Log Message:
Synced up.
Index: pci.h
===================================================================
RCS file: /cvsroot/linux-mips/linux/include/asm-mips64/pci.h,v
retrieving revision 1.2
retrieving revision 1.3
diff -C2 -d -r1.2 -r1.3
*** pci.h 2001/08/22 18:18:14 1.2
--- pci.h 2001/09/04 16:16:15 1.3
***************
*** 71,74 ****
--- 71,92 ----
void *vaddr, dma_addr_t dma_handle);
+
+ #ifdef CONFIG_MAPPED_PCI_IO
+
+ extern dma_addr_t pci_map_single(struct pci_dev *hwdev, void *ptr, size_t size,
+ int direction);
+ extern void pci_unmap_single(struct pci_dev *hwdev, dma_addr_t dma_addr,
+ size_t size, int direction);
+ extern int pci_map_sg(struct pci_dev *hwdev, struct scatterlist *sg, int nents,
+ int direction);
+ extern void pci_unmap_sg(struct pci_dev *hwdev, struct scatterlist *sg,
+ int nents, int direction);
+ extern void pci_dma_sync_single(struct pci_dev *hwdev, dma_addr_t dma_handle,
+ size_t size, int direction);
+ extern void pci_dma_sync_sg(struct pci_dev *hwdev, struct scatterlist *sg,
+ int nelems, int direction);
+
+ #else /* CONFIG_MAPPED_PCI_IO */
+
/*
* Map a single buffer of the indicated size for DMA in streaming mode.
***************
*** 78,82 ****
* until either pci_unmap_single or pci_dma_sync_single is performed.
*/
! extern inline dma_addr_t pci_map_single(struct pci_dev *hwdev, void *ptr,
size_t size, int direction)
{
--- 96,100 ----
* until either pci_unmap_single or pci_dma_sync_single is performed.
*/
! static inline dma_addr_t pci_map_single(struct pci_dev *hwdev, void *ptr,
size_t size, int direction)
{
***************
*** 87,91 ****
dma_cache_wback_inv((unsigned long)ptr, size);
#endif
! return (bus_to_baddr[hwdev->bus->number] | __pa(ptr));
}
--- 105,109 ----
dma_cache_wback_inv((unsigned long)ptr, size);
#endif
! return virt_to_bus(ptr);
}
***************
*** 98,102 ****
* whatever the device wrote there.
*/
! extern inline void pci_unmap_single(struct pci_dev *hwdev, dma_addr_t dma_addr,
size_t size, int direction)
{
--- 116,120 ----
* whatever the device wrote there.
*/
! static inline void pci_unmap_single(struct pci_dev *hwdev, dma_addr_t dma_addr,
size_t size, int direction)
{
***************
*** 123,127 ****
* the same here.
*/
! extern inline int pci_map_sg(struct pci_dev *hwdev, struct scatterlist *sg,
int nents, int direction)
{
--- 141,145 ----
* the same here.
*/
! static inline int pci_map_sg(struct pci_dev *hwdev, struct scatterlist *sg,
int nents, int direction)
{
***************
*** 147,151 ****
* pci_unmap_single() above.
*/
! extern inline void pci_unmap_sg(struct pci_dev *hwdev, struct scatterlist *sg,
int nents, int direction)
{
--- 165,169 ----
* pci_unmap_single() above.
*/
! static inline void pci_unmap_sg(struct pci_dev *hwdev, struct scatterlist *sg,
int nents, int direction)
{
***************
*** 166,170 ****
* device again owns the buffer.
*/
! extern inline void pci_dma_sync_single(struct pci_dev *hwdev,
dma_addr_t dma_handle,
size_t size, int direction)
--- 184,188 ----
* device again owns the buffer.
*/
! static inline void pci_dma_sync_single(struct pci_dev *hwdev,
dma_addr_t dma_handle,
size_t size, int direction)
***************
*** 184,188 ****
* same rules and usage.
*/
! extern inline void pci_dma_sync_sg(struct pci_dev *hwdev,
struct scatterlist *sg,
int nelems, int direction)
--- 202,206 ----
* same rules and usage.
*/
! static inline void pci_dma_sync_sg(struct pci_dev *hwdev,
struct scatterlist *sg,
int nelems, int direction)
***************
*** 201,206 ****
#endif
}
! extern inline int pci_dma_supported(struct pci_dev *hwdev, dma_addr_t mask)
{
/*
--- 219,225 ----
#endif
}
+ #endif /* CONFIG_MAPPED_PCI_IO */
! static inline int pci_dma_supported(struct pci_dev *hwdev, dma_addr_t mask)
{
/*
***************
*** 215,219 ****
}
! /* Return the index of the PCI controller for device. */
#define pci_controller_num(pdev) (0)
--- 234,240 ----
}
! /*
! * Return the index of the PCI controller for device.
! */
#define pci_controller_num(pdev) (0)
|
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