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From: James S. <jsi...@us...> - 2001-11-26 18:09:12
|
Update of /cvsroot/linux-mips/linux/arch/mips64/lib In directory usw-pr-cvs1:/tmp/cvs-serv1660/arch/mips64/lib Added Files: dump_tlb.c Log Message: More syncing to OSS. |
|
From: James S. <jsi...@us...> - 2001-11-26 18:09:12
|
Update of /cvsroot/linux-mips/linux/arch/mips64/kernel In directory usw-pr-cvs1:/tmp/cvs-serv1660/arch/mips64/kernel Added Files: proc.c Log Message: More syncing to OSS. |
|
From: James S. <jsi...@us...> - 2001-11-26 18:06:57
|
Update of /cvsroot/linux-mips/linux/include/asm-mips
In directory usw-pr-cvs1:/tmp/cvs-serv859/include/asm-mips
Modified Files:
bootinfo.h pgtable.h
Log Message:
Replace all references to mips_tlb_entries with mips_cpu.tlbsize. Eleminate remaining references to mips_memory_upper.
Index: bootinfo.h
===================================================================
RCS file: /cvsroot/linux-mips/linux/include/asm-mips/bootinfo.h,v
retrieving revision 1.13
retrieving revision 1.14
diff -u -d -r1.13 -r1.14
--- bootinfo.h 2001/11/19 17:48:27 1.13
+++ bootinfo.h 2001/11/26 18:06:55 1.14
@@ -33,7 +33,8 @@
#define MACH_GROUP_ALCHEMY 18 /* Alchemy Semi Eval Boards*/
#define MACH_GROUP_NEC_VR41XX 19 /* NEC Vr41xx based boards/gadgets */
#define MACH_GROUP_HP_LASERJET 20 /* Hewlett Packard LaserJet */
-#define MACH_GROUP_EE 20 /* Emotion Engine (Sony PlayStation 2) */
+#define MACH_GROUP_EE 21 /* Emotion Engine (Sony PlayStation 2) */
+
#define GROUP_NAMES { "unknown", "Jazz", "Digital", "ARC", "SNI", "ACN", \
"SGI", "Cobalt", "NEC DDB", "Baget", "Cosine", "Galileo", "Momentum", \
"ITE", "Philips", "Globepspan", "SiByte", "Toshiba", "Alchemy", \
@@ -187,7 +188,7 @@
#define MACH_PALLAS 0
#define MACH_TOPAS 1
#define MACH_JMR 2
-#define MACH_TOSHIBA_JMR3927 3 /* JMR-TX3927 CPU/IO board */
+#define MACH_TOSHIBA_JMR3927 3 /* JMR-TX3927 CPU/IO board */
#define GROUP_TOSHIBA_NAMES { "Pallas", "TopasCE", "JMR", "JMR TX3927" }
@@ -312,7 +313,6 @@
*/
extern unsigned long mips_machtype;
extern unsigned long mips_machgroup;
-extern unsigned long mips_tlb_entries;
/*
* A memory map that's built upon what was determined
Index: pgtable.h
===================================================================
RCS file: /cvsroot/linux-mips/linux/include/asm-mips/pgtable.h,v
retrieving revision 1.7
retrieving revision 1.8
diff -u -d -r1.7 -r1.8
--- pgtable.h 2001/10/31 17:28:54 1.7
+++ pgtable.h 2001/11/26 18:06:55 1.8
@@ -26,6 +26,9 @@
* - flush_cache_range(mm, start, end) flushes a range of pages
* - flush_page_to_ram(page) write back kernel page to ram
* - flush_icache_range(start, end) flush a range of instructions
+ *
+ * - flush_cache_sigtramp() flush signal trampoline
+ * - flush_icache_all() flush the entire instruction cache
*/
extern void (*_flush_cache_all)(void);
extern void (*___flush_cache_all)(void);
@@ -33,11 +36,12 @@
extern void (*_flush_cache_range)(struct mm_struct *mm, unsigned long start,
unsigned long end);
extern void (*_flush_cache_page)(struct vm_area_struct *vma, unsigned long page);
-extern void (*_flush_cache_sigtramp)(unsigned long addr);
extern void (*_flush_page_to_ram)(struct page * page);
extern void (*_flush_icache_range)(unsigned long start, unsigned long end);
extern void (*_flush_icache_page)(struct vm_area_struct *vma,
struct page *page);
+extern void (*_flush_cache_sigtramp)(unsigned long addr);
+extern void (*_flush_icache_all)(void);
#define flush_dcache_page(page) do { } while (0)
@@ -46,12 +50,17 @@
#define flush_cache_mm(mm) _flush_cache_mm(mm)
#define flush_cache_range(mm,start,end) _flush_cache_range(mm,start,end)
#define flush_cache_page(vma,page) _flush_cache_page(vma, page)
-#define flush_cache_sigtramp(addr) _flush_cache_sigtramp(addr)
#define flush_page_to_ram(page) _flush_page_to_ram(page)
#define flush_icache_range(start, end) _flush_icache_range(start,end)
#define flush_icache_page(vma, page) _flush_icache_page(vma, page)
+#define flush_cache_sigtramp(addr) _flush_cache_sigtramp(addr)
+#ifdef CONFIG_VTAG_ICACHE
+#define flush_icache_all() _flush_icache_all()
+#else
+#define flush_icache_all() do { } while(0)
+#endif
/*
* - add_wired_entry() add a fixed TLB entry, and move wired register
|
|
From: James S. <jsi...@us...> - 2001-11-26 18:06:57
|
Update of /cvsroot/linux-mips/linux/arch/mips/lib
In directory usw-pr-cvs1:/tmp/cvs-serv859/arch/mips/lib
Modified Files:
dump_tlb.c r3k_dump_tlb.c
Log Message:
Replace all references to mips_tlb_entries with mips_cpu.tlbsize. Eleminate remaining references to mips_memory_upper.
Index: dump_tlb.c
===================================================================
RCS file: /cvsroot/linux-mips/linux/arch/mips/lib/dump_tlb.c,v
retrieving revision 1.1
retrieving revision 1.2
diff -u -d -r1.1 -r1.2
--- dump_tlb.c 2001/11/12 18:00:58 1.1
+++ dump_tlb.c 2001/11/26 18:06:55 1.2
@@ -11,12 +11,11 @@
#include <asm/bootinfo.h>
#include <asm/cachectl.h>
+#include <asm/cpu.h>
#include <asm/mipsregs.h>
#include <asm/page.h>
#include <asm/pgtable.h>
-#define mips_tlb_entries 48
-
void
dump_tlb(int first, int last)
{
@@ -77,7 +76,7 @@
void
dump_tlb_all(void)
{
- dump_tlb(0, mips_tlb_entries - 1);
+ dump_tlb(0, mips_cpu.tlbsize - 1);
}
void
@@ -125,7 +124,7 @@
void
dump_tlb_nonwired(void)
{
- dump_tlb(read_32bit_cp0_register(CP0_WIRED), mips_tlb_entries - 1);
+ dump_tlb(read_32bit_cp0_register(CP0_WIRED), mips_cpu.tlbsize - 1);
}
void
Index: r3k_dump_tlb.c
===================================================================
RCS file: /cvsroot/linux-mips/linux/arch/mips/lib/r3k_dump_tlb.c,v
retrieving revision 1.1
retrieving revision 1.2
diff -u -d -r1.1 -r1.2
--- r3k_dump_tlb.c 2001/11/14 16:17:17 1.1
+++ r3k_dump_tlb.c 2001/11/26 18:06:55 1.2
@@ -17,8 +17,6 @@
#include <asm/page.h>
#include <asm/pgtable.h>
-#define mips_tlb_entries mips_cpu.tlbsize
-
extern int r3k_have_wired_reg; /* defined in tlb-r3k.c */
void
@@ -68,7 +66,7 @@
void
dump_tlb_all(void)
{
- dump_tlb(0, mips_tlb_entries - 1);
+ dump_tlb(0, mips_cpu.tlbsize - 1);
}
void
@@ -107,7 +105,7 @@
dump_tlb_nonwired(void)
{
int wired = r3k_have_wired_reg ? get_wired() : 8;
- dump_tlb(wired, mips_tlb_entries - 1);
+ dump_tlb(wired, mips_cpu.tlbsize - 1);
}
void
|
|
From: James S. <jsi...@us...> - 2001-11-26 17:22:21
|
Update of /cvsroot/linux-mips/linux/drivers/char In directory usw-pr-cvs1:/tmp/cvs-serv19138 Modified Files: dz.c Log Message: Cleanup and make compile again. Index: dz.c =================================================================== RCS file: /cvsroot/linux-mips/linux/drivers/char/dz.c,v retrieving revision 1.6 retrieving revision 1.7 diff -u -d -r1.6 -r1.7 --- dz.c 2001/10/19 21:19:38 1.6 +++ dz.c 2001/11/26 17:22:18 1.7 @@ -23,37 +23,22 @@ #define DEBUG_DZ 1 -#include <linux/version.h> -#ifdef MODULE -#include <linux/module.h> -#else -#define MOD_INC_USE_COUNT -#define MOD_DEC_USE_COUNT -#endif - #include <linux/config.h> +#include <linux/version.h> #include <linux/kernel.h> #include <linux/sched.h> #include <linux/init.h> #include <linux/slab.h> #include <linux/mm.h> #include <linux/major.h> +#include <linux/module.h> #include <linux/param.h> #include <linux/tqueue.h> #include <linux/interrupt.h> #include <asm-mips/wbflush.h> -/* for definition of SERIAL */ #include <asm/dec/interrupts.h> -/* for definition of struct console */ -#ifdef CONFIG_SERIAL_CONSOLE -#define CONSOLE_LINE (3) -#endif /* ifdef CONFIG_SERIAL_CONSOLE */ - -#if defined(CONFIG_SERIAL_CONSOLE) || defined(DEBUG_DZ) #include <linux/console.h> -#endif - #include <linux/tty.h> #include <linux/tty_flip.h> #include <linux/serial.h> @@ -64,13 +49,13 @@ #include <asm/dec/kn01.h> #include <asm/dec/kn02.h> -#ifdef DEBUG_DZ #include <linux/ptrace.h> #include <linux/fs.h> #include <asm/bootinfo.h> +#define CONSOLE_LINE (3) /* for definition of struct console */ + extern int (*prom_printf) (char *,...); -#endif #include "dz.h" |
|
From: James S. <jsi...@us...> - 2001-11-26 17:21:34
|
Update of /cvsroot/linux-mips/linux/include/asm-mips64
In directory usw-pr-cvs1:/tmp/cvs-serv18886
Modified Files:
bootinfo.h cpu.h mipsregs.h pci.h smp.h
Log Message:
Synced mips64 stuff to OSS tree.
Index: bootinfo.h
===================================================================
RCS file: /cvsroot/linux-mips/linux/include/asm-mips64/bootinfo.h,v
retrieving revision 1.4
retrieving revision 1.5
diff -u -d -r1.4 -r1.5
--- bootinfo.h 2001/11/19 17:35:09 1.4
+++ bootinfo.h 2001/11/26 17:21:32 1.5
@@ -178,11 +178,8 @@
char dummy[32];
};
-extern unsigned long mips_memory_upper;
-extern unsigned long mips_cputype;
extern unsigned long mips_machtype;
extern unsigned long mips_machgroup;
-extern unsigned long mips_tlb_entries;
/*
* A memory map that's built upon what was determined
Index: cpu.h
===================================================================
RCS file: /cvsroot/linux-mips/linux/include/asm-mips64/cpu.h,v
retrieving revision 1.3
retrieving revision 1.4
diff -u -d -r1.3 -r1.4
--- cpu.h 2001/11/21 22:11:00 1.3
+++ cpu.h 2001/11/26 17:21:32 1.4
@@ -90,13 +90,24 @@
#define PRID_REV_TX3927C 0x0042
#define PRID_REV_TX39H3TEG 0x0050
+/*
+ * FPU implementation/revision register (CP1 control register 0).
+ *
+ * +---------------------------------+----------------+----------------+
+ * | 0 | Implementation | Revision |
+ * +---------------------------------+----------------+----------------+
+ * 31 16 15 8 7 0
+ */
+
+#define FPIR_IMP_NONE 0x0000
+
#ifndef _LANGUAGE_ASSEMBLY
/*
* Capability and feature descriptor structure for MIPS CPU
*/
struct mips_cpu {
unsigned int processor_id;
- unsigned int cputype; /* Old "mips_cputype" code */
+ unsigned int cputype;
int isa_level;
int options;
int tlbsize;
@@ -137,5 +148,6 @@
#define MIPS_CPU_VCE 0x00000400 /* virt. coherence conflict possible */
#define MIPS_CPU_CACHE_CDEX 0x00000800 /* Create_Dirty_Exclusive CACHE op */
#define MIPS_CPU_MCHECK 0x00001000 /* Machine check exception */
+#define MIPS_CPU_EJTAG 0x00002000 /* EJTAG exception */
#endif /* _ASM_CPU_H */
Index: mipsregs.h
===================================================================
RCS file: /cvsroot/linux-mips/linux/include/asm-mips64/mipsregs.h,v
retrieving revision 1.6
retrieving revision 1.7
diff -u -d -r1.6 -r1.7
--- mipsregs.h 2001/11/19 17:35:09 1.6
+++ mipsregs.h 2001/11/26 17:21:32 1.7
@@ -319,6 +319,19 @@
:"=r" (__res)); \
__res;})
+/*
+ * Macros to access the floating point coprocessor control registers
+ */
+#define read_32bit_cp1_register(source) \
+({ int __res; \
+ __asm__ __volatile__( \
+ ".set\tpush\n\t" \
+ ".set\treorder\n\t" \
+ "cfc1\t%0,"STR(source)"\n\t" \
+ ".set\tpop" \
+ : "=r" (__res)); \
+ __res;})
+
/* TLB operations. */
static inline void tlb_probe(void)
{
Index: pci.h
===================================================================
RCS file: /cvsroot/linux-mips/linux/include/asm-mips64/pci.h,v
retrieving revision 1.7
retrieving revision 1.8
diff -u -d -r1.7 -r1.8
--- pci.h 2001/11/12 18:38:46 1.7
+++ pci.h 2001/11/26 17:21:32 1.8
@@ -103,7 +103,7 @@
if (direction == PCI_DMA_NONE)
BUG();
-#ifndef CONFIG_COHERENT_IO
+#ifdef CONFIG_NONCOHERENT_IO
dma_cache_wback_inv((unsigned long)ptr, size);
#endif
return virt_to_bus(ptr);
@@ -140,7 +140,7 @@
BUG();
addr = (unsigned long) page_address(page) + offset;
-#ifndef CONFIG_COHERENT_IO
+#ifdef CONFIG_NONCOHERENT_IO
dma_cache_wback_inv(addr, size);
#endif
@@ -174,14 +174,16 @@
static inline int pci_map_sg(struct pci_dev *hwdev, struct scatterlist *sg,
int nents, int direction)
{
+#ifdef CONFIG_NONCOHERENT_IO
int i;
+#endif
if (direction == PCI_DMA_NONE)
BUG();
/* Make sure that gcc doesn't leave the empty loop body. */
for (i = 0; i < nents; i++, sg++) {
-#ifndef CONFIG_COHERENT_IO
+#ifdef CONFIG_NONCOHERENT_IO
dma_cache_wback_inv((unsigned long)sg->address, sg->length);
#endif
sg->address = (char *)(bus_to_baddr[hwdev->bus->number] | __pa(sg->address));
@@ -220,7 +222,7 @@
{
if (direction == PCI_DMA_NONE)
BUG();
-#ifndef CONFIG_COHERENT_IO
+#ifdef CONFIG_NONCOHERENT_IO
dma_cache_wback_inv((unsigned long)__va(dma_handle - bus_to_baddr[hwdev->bus->number]), size);
#endif
}
@@ -236,7 +238,7 @@
struct scatterlist *sg,
int nelems, int direction)
{
-#ifndef CONFIG_COHERENT_IO
+#ifdef CONFIG_NONCOHERENT_IO
int i;
#endif
@@ -244,7 +246,7 @@
BUG();
/* Make sure that gcc doesn't leave the empty loop body. */
-#ifndef CONFIG_COHERENT_IO
+#ifdef CONFIG_NONCOHERENT_IO
for (i = 0; i < nelems; i++, sg++)
dma_cache_wback_inv((unsigned long)sg->address, sg->length);
#endif
Index: smp.h
===================================================================
RCS file: /cvsroot/linux-mips/linux/include/asm-mips64/smp.h,v
retrieving revision 1.4
retrieving revision 1.5
diff -u -d -r1.4 -r1.5
--- smp.h 2001/11/06 00:30:47 1.4
+++ smp.h 2001/11/26 17:21:32 1.5
@@ -68,6 +68,16 @@
#error cpumask macros only defined for 128p kernels
#endif
+struct call_data_struct {
+ void (*func)(void *);
+ void *info;
+ atomic_t started;
+ atomic_t finished;
+ int wait;
+};
+
+extern struct call_data_struct *call_data;
+
extern cpumask_t cpu_online_map;
#endif /* __ASM_SMP_H */
|
|
From: James S. <jsi...@us...> - 2001-11-26 17:17:29
|
Update of /cvsroot/linux-mips/linux/arch/mips64/mm
In directory usw-pr-cvs1:/tmp/cvs-serv17597/mm
Modified Files:
init.c loadmmu.c r4xx0.c
Log Message:
Synced mips64 stuff to OSS tree.
Index: init.c
===================================================================
RCS file: /cvsroot/linux-mips/linux/arch/mips64/mm/init.c,v
retrieving revision 1.4
retrieving revision 1.5
diff -u -d -r1.4 -r1.5
--- init.c 2001/11/20 17:57:32 1.4
+++ init.c 2001/11/26 17:17:26 1.5
@@ -34,6 +34,7 @@
#include <asm/pgalloc.h>
#include <asm/mmu_context.h>
#include <asm/tlb.h>
+#include <asm/cpu.h>
mmu_gather_t mmu_gathers[NR_CPUS];
unsigned long totalram_pages;
@@ -131,7 +132,7 @@
unsigned long order, size;
struct page *page;
- switch (mips_cputype) {
+ switch (mips_cpu.cputype) {
case CPU_R4000SC:
case CPU_R4000MC:
case CPU_R4400SC:
Index: loadmmu.c
===================================================================
RCS file: /cvsroot/linux-mips/linux/arch/mips64/mm/loadmmu.c,v
retrieving revision 1.2
retrieving revision 1.3
diff -u -d -r1.2 -r1.3
--- loadmmu.c 2001/11/20 17:53:03 1.2
+++ loadmmu.c 2001/11/26 17:17:26 1.3
@@ -17,6 +17,7 @@
#include <asm/pgtable.h>
#include <asm/system.h>
#include <asm/bootinfo.h>
+#include <asm/cpu.h>
/* memory functions */
void (*_clear_page)(void * page);
@@ -52,7 +53,7 @@
void __init load_mmu(void)
{
- switch(mips_cputype) {
+ switch(mips_cpu.cputype) {
#if defined (CONFIG_CPU_R4300) \
|| defined (CONFIG_CPU_R4X00) \
|| defined (CONFIG_CPU_R5000) \
Index: r4xx0.c
===================================================================
RCS file: /cvsroot/linux-mips/linux/arch/mips64/mm/r4xx0.c,v
retrieving revision 1.9
retrieving revision 1.10
diff -u -d -r1.9 -r1.10
--- r4xx0.c 2001/11/20 17:57:32 1.9
+++ r4xx0.c 2001/11/26 17:17:26 1.10
@@ -21,6 +21,7 @@
#include <asm/system.h>
#include <asm/bootinfo.h>
#include <asm/mmu_context.h>
+#include <asm/cpu.h>
/* CP0 hazard avoidance. */
#define BARRIER __asm__ __volatile__(".set noreorder\n\t" \
@@ -39,6 +40,7 @@
#undef DEBUG_CACHE
+
/*
* Dummy cache handling routines for machines without boardcaches
*/
@@ -2371,7 +2373,7 @@
probe_dcache(config);
setup_scache(config);
- switch(mips_cputype) {
+ switch(mips_cpu.cputype) {
case CPU_R4600: /* QED style two way caches? */
case CPU_R4700:
case CPU_R5000:
|
|
From: James S. <jsi...@us...> - 2001-11-26 17:17:29
|
Update of /cvsroot/linux-mips/linux/arch/mips64/configs In directory usw-pr-cvs1:/tmp/cvs-serv17597/configs Modified Files: defconfig-ip22 defconfig-ip27 defconfig-ip32 defconfig-sb1250-swarm Log Message: Synced mips64 stuff to OSS tree. Index: defconfig-ip22 =================================================================== RCS file: /cvsroot/linux-mips/linux/arch/mips64/configs/defconfig-ip22,v retrieving revision 1.5 retrieving revision 1.6 diff -u -d -r1.5 -r1.6 --- defconfig-ip22 2001/11/20 18:00:58 1.5 +++ defconfig-ip22 2001/11/26 17:17:26 1.6 @@ -22,6 +22,7 @@ CONFIG_BOARD_SCACHE=y CONFIG_PC_KEYB=y CONFIG_BOOT_ELF32=y +CONFIG_NONCOHERENT_IO=y CONFIG_SGI=y CONFIG_L1_CACHE_SHIFT=5 # CONFIG_ISA is not set Index: defconfig-ip27 =================================================================== RCS file: /cvsroot/linux-mips/linux/arch/mips64/configs/defconfig-ip27,v retrieving revision 1.5 retrieving revision 1.6 diff -u -d -r1.5 -r1.6 --- defconfig-ip27 2001/11/20 18:04:22 1.5 +++ defconfig-ip27 2001/11/26 17:17:26 1.6 @@ -23,7 +23,6 @@ # CONFIG_RWSEM_XCHGADD_ALGORITHM is not set CONFIG_BOOT_ELF64=y CONFIG_ARC64=y -CONFIG_COHERENT_IO=y CONFIG_MAPPED_PCI_IO=y CONFIG_PCI=y CONFIG_QL_ISP_A64=y Index: defconfig-ip32 =================================================================== RCS file: /cvsroot/linux-mips/linux/arch/mips64/configs/defconfig-ip32,v retrieving revision 1.3 retrieving revision 1.4 diff -u -d -r1.3 -r1.4 --- defconfig-ip32 2001/11/20 18:04:22 1.3 +++ defconfig-ip32 2001/11/26 17:17:26 1.4 @@ -21,6 +21,7 @@ CONFIG_PC_KEYB=y CONFIG_PCI=y CONFIG_MAPPED_PCI_IO=y +CONFIG_NONCOHERENT_IO=y CONFIG_ARC_MEMORY=y CONFIG_L1_CACHE_SHIFT=5 # CONFIG_ISA is not set Index: defconfig-sb1250-swarm =================================================================== RCS file: /cvsroot/linux-mips/linux/arch/mips64/configs/defconfig-sb1250-swarm,v retrieving revision 1.1 retrieving revision 1.2 diff -u -d -r1.1 -r1.2 --- defconfig-sb1250-swarm 2001/11/20 18:19:28 1.1 +++ defconfig-sb1250-swarm 2001/11/26 17:17:26 1.2 @@ -16,7 +16,6 @@ CONFIG_RWSEM_GENERIC_SPINLOCK=y # CONFIG_RWSEM_XCHGADD_ALGORITHM is not set CONFIG_BOOT_ELF64=y -CONFIG_COHERENT_IO=y CONFIG_SWAP_IO_SPACE=y CONFIG_CFE=y CONFIG_SIBYTE_SB1250=y @@ -252,6 +251,7 @@ # CONFIG_SERIAL_TX3912 is not set # CONFIG_SERIAL_TX3912_CONSOLE is not set # CONFIG_AU1000_UART is not set +# CONFIG_TXX927_SERIAL is not set CONFIG_SIBYTE_SB1250_DUART=y CONFIG_SIBYTE_SB1250_DUART_CONSOLE=y CONFIG_SB1250_DUART_OUTPUT_BUF_SIZE=1024 |
|
From: James S. <jsi...@us...> - 2001-11-26 17:17:29
|
Update of /cvsroot/linux-mips/linux/arch/mips64/kernel
In directory usw-pr-cvs1:/tmp/cvs-serv17597/kernel
Modified Files:
mips64_ksyms.c setup.c traps.c
Log Message:
Synced mips64 stuff to OSS tree.
Index: mips64_ksyms.c
===================================================================
RCS file: /cvsroot/linux-mips/linux/arch/mips64/kernel/mips64_ksyms.c,v
retrieving revision 1.3
retrieving revision 1.4
diff -u -d -r1.3 -r1.4
--- mips64_ksyms.c 2001/10/11 23:00:47 1.3
+++ mips64_ksyms.c 2001/11/26 17:17:26 1.4
@@ -84,7 +84,8 @@
*/
EXPORT_SYMBOL(_flush_page_to_ram);
EXPORT_SYMBOL(_flush_cache_l1);
-#ifndef CONFIG_COHERENT_IO
+
+#ifdef CONFIG_NONCOHERENT_IO
EXPORT_SYMBOL(_dma_cache_wback_inv);
EXPORT_SYMBOL(_dma_cache_inv);
#endif
Index: setup.c
===================================================================
RCS file: /cvsroot/linux-mips/linux/arch/mips64/kernel/setup.c,v
retrieving revision 1.6
retrieving revision 1.7
diff -u -d -r1.6 -r1.7
--- setup.c 2001/11/20 17:41:49 1.6
+++ setup.c 2001/11/26 17:17:26 1.7
@@ -82,7 +82,6 @@
*
* These are initialized so they are in the .data section
*/
-unsigned long mips_cputype = CPU_UNKNOWN;
unsigned long mips_machtype = MACH_UNKNOWN;
unsigned long mips_machgroup = MACH_GROUP_UNKNOWN;
@@ -103,7 +102,7 @@
static inline void check_wait(void)
{
printk("Checking for 'wait' instruction... ");
- switch(mips_cputype) {
+ switch(mips_cpu.cputype) {
case CPU_R4200:
case CPU_R4300:
case CPU_R4600:
Index: traps.c
===================================================================
RCS file: /cvsroot/linux-mips/linux/arch/mips64/kernel/traps.c,v
retrieving revision 1.6
retrieving revision 1.7
diff -u -d -r1.6 -r1.7
--- traps.c 2001/11/20 17:35:48 1.6
+++ traps.c 2001/11/26 17:17:26 1.7
@@ -447,7 +447,7 @@
{
extern void except_vec4(void);
- switch(mips_cputype) {
+ switch(mips_cpu.cputype) {
case CPU_NEVADA:
memcpy((void *)(KSEG0 + 0x200), except_vec4, 8);
set_cp0_cause(CAUSEF_IV);
@@ -475,7 +475,7 @@
static inline void mips4_setup(void)
{
- switch (mips_cputype) {
+ switch (mips_cpu.cputype) {
case CPU_R5000:
case CPU_R5000A:
case CPU_NEVADA:
@@ -521,7 +521,7 @@
* Only some CPUs have the watch exceptions or a dedicated
* interrupt vector.
*/
- watch_init(mips_cputype);
+ watch_init(mips_cpu.cputype);
setup_dedicated_int();
mips4_setup();
go_64(); /* In memoriam C128 ;-) */
@@ -532,7 +532,7 @@
/*
* Handling the following exceptions depends mostly of the cpu type
*/
- switch(mips_cputype) {
+ switch(mips_cpu.cputype) {
case CPU_R10000:
/*
* The R10000 is in most aspects similar to the R4400. It
@@ -590,7 +590,7 @@
break;
case CPU_R8000:
- panic("unsupported CPU type %s.\n", cpu_names[mips_cputype]);
+ panic("unsupported CPU type %s.\n", cpu_names[mips_cpu.cputype]);
break;
case CPU_UNKNOWN:
|
|
From: James S. <jsi...@us...> - 2001-11-26 17:17:29
|
Update of /cvsroot/linux-mips/linux/arch/mips64
In directory usw-pr-cvs1:/tmp/cvs-serv17597
Modified Files:
config.in defconfig
Log Message:
Synced mips64 stuff to OSS tree.
Index: config.in
===================================================================
RCS file: /cvsroot/linux-mips/linux/arch/mips64/config.in,v
retrieving revision 1.7
retrieving revision 1.8
diff -u -d -r1.7 -r1.8
--- config.in 2001/11/20 18:00:58 1.7
+++ config.in 2001/11/26 17:17:26 1.8
@@ -45,7 +45,6 @@
unset CONFIG_BOARD_SCACHE
unset CONFIG_BOOT_ELF32
unset CONFIG_BOOT_ELF64
-unset CONFIG_COHERENT_IO
unset CONFIG_ISA
unset CONFIG_MAPPED_PCI_IO
unset CONFIG_PCI
@@ -57,6 +56,7 @@
define_bool CONFIG_BOARD_SCACHE y
define_bool CONFIG_PC_KEYB y
define_bool CONFIG_BOOT_ELF32 y
+ define_bool CONFIG_NONCOHERENT_IO y
define_bool CONFIG_SGI y
define_int CONFIG_L1_CACHE_SHIFT 5
fi
@@ -64,7 +64,6 @@
if [ "$CONFIG_SGI_IP27" = "y" ]; then
define_bool CONFIG_BOOT_ELF64 y
define_bool CONFIG_ARC64 y
- define_bool CONFIG_COHERENT_IO y
define_bool CONFIG_MAPPED_PCI_IO y
define_bool CONFIG_PCI y
define_bool CONFIG_QL_ISP_A64 y
@@ -78,13 +77,13 @@
define_bool CONFIG_PCI y
#define_bool CONFIG_BOARD_SCACHE y
define_bool CONFIG_MAPPED_PCI_IO y
+ define_bool CONFIG_NONCOHERENT_IO y
define_bool CONFIG_ARC_MEMORY y
define_int CONFIG_L1_CACHE_SHIFT 5
fi
if [ "$CONFIG_SIBYTE_SWARM" = "y" ]; then
define_bool CONFIG_BOOT_ELF64 y
- define_bool CONFIG_COHERENT_IO y
define_bool CONFIG_SWAP_IO_SPACE y
define_bool CONFIG_CFE y
define_bool CONFIG_SIBYTE_SB1250 y
Index: defconfig
===================================================================
RCS file: /cvsroot/linux-mips/linux/arch/mips64/defconfig,v
retrieving revision 1.10
retrieving revision 1.11
diff -u -d -r1.10 -r1.11
--- defconfig 2001/11/20 18:04:22 1.10
+++ defconfig 2001/11/26 17:17:26 1.11
@@ -23,7 +23,6 @@
# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set
CONFIG_BOOT_ELF64=y
CONFIG_ARC64=y
-CONFIG_COHERENT_IO=y
CONFIG_MAPPED_PCI_IO=y
CONFIG_PCI=y
CONFIG_QL_ISP_A64=y
|
|
From: Jim P. <jim...@us...> - 2001-11-26 02:04:18
|
Update of /cvsroot/linux-mips/linux/include/asm-mips In directory usw-pr-cvs1:/tmp/cvs-serv29458 Modified Files: irq.h Log Message: Minor. VR4111 has 71 IRQs. This change was lost during a recent OSS sync. Index: irq.h =================================================================== RCS file: /cvsroot/linux-mips/linux/include/asm-mips/irq.h,v retrieving revision 1.5 retrieving revision 1.6 diff -u -d -r1.5 -r1.6 --- irq.h 2001/11/06 00:30:47 1.5 +++ irq.h 2001/11/26 02:04:16 1.6 @@ -11,7 +11,7 @@ #include <linux/config.h> -#define NR_IRQS 64 /* Largest number of ints of all machines. */ +#define NR_IRQS 128 /* Largest number of ints of all machines. */ #define TIMER_IRQ 0 |
|
From: Jim P. <jim...@us...> - 2001-11-26 01:39:00
|
Update of /cvsroot/linux-mips/linux/arch/mips/vr4111/common
In directory usw-pr-cvs1:/tmp/cvs-serv24952
Modified Files:
icu.c int-handler.S irq.c
Log Message:
General cleanup, various fixups for IRQ code.
Index: icu.c
===================================================================
RCS file: /cvsroot/linux-mips/linux/arch/mips/vr4111/common/icu.c,v
retrieving revision 1.1
retrieving revision 1.2
diff -u -d -r1.1 -r1.2
--- icu.c 2001/10/28 23:04:19 1.1
+++ icu.c 2001/11/26 01:38:57 1.2
@@ -13,20 +13,6 @@
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*
- * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
- * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
- * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
- * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#include <linux/config.h>
#include <asm/io.h>
@@ -40,7 +26,7 @@
* binary search to find which actual IRQ occurred.
*/
-asmlinkage void int0_icu_irqdispatch(struct pt_regs *regs)
+asmlinkage int icu_handle_int(struct pt_regs *regs)
{
u16 pend1, pend2;
int irq;
@@ -50,8 +36,8 @@
pend2 = *VR41XX_SYSINT2REG & *VR41XX_MSYSINT2REG;
if (pend1) {
+ /* If highest priority interrupt is a GIU cascade, handle it */
if ((pend1 & 0x01ff) == 0x0100) {
- /* Handle the GIU interrupt */
pend1 = *VR41XX_GIUINTLREG & *VR41XX_MGIUINTLREG;
pend2 = *VR41XX_GIUINTHREG & *VR41XX_MGIUINTHREG;
if (pend1) {
@@ -63,7 +49,7 @@
search = pend2;
/* ... fall through to search */
} else {
- return;
+ return 0;
}
}
else {
@@ -77,29 +63,33 @@
search = pend2;
/* ... fall through to search */
} else {
- return;
+ return 0;
}
- if(search & 0xFF00) {
+ /* Search for interrupts, giving priority to bits towards the LSB */
+
+ if(!(search & 0x00FF)) {
search >>= 8;
irq += 8;
}
- if(search & 0xF0) {
+ if(!(search & 0x0F)) {
search >>= 4;
irq += 4;
}
- if(search & 0xC) {
+ if(!(search & 0x3)) {
search >>= 2;
irq += 2;
}
- if(search & 2) {
+ if(!(search & 1)) {
irq += 1;
}
do_IRQ(irq, regs);
+
+ return 1;
}
Index: int-handler.S
===================================================================
RCS file: /cvsroot/linux-mips/linux/arch/mips/vr4111/common/int-handler.S,v
retrieving revision 1.1
retrieving revision 1.2
diff -u -d -r1.1 -r1.2
--- int-handler.S 2001/10/28 23:04:19 1.1
+++ int-handler.S 2001/11/26 01:38:57 1.2
@@ -1,112 +1,76 @@
/*
- * BRIEF MODULE DESCRIPTION
- * Interrupt dispatcher for NEC Vr4111 CPU core.
- *
- * Copyright 2001 MontaVista Software Inc.
- * Author Yoichi Yuasa
- * yy...@mv... or so...@mv...
- *
- * Adapted for VR4111 from arch/mips/vr4122/common/int-handler.S
- * by Jim Paris <ji...@jt...>
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- *
- * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
- * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
- * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
- * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * VR4111 interrupt dispatcher for CPU core interrupts
+ * Copyright (c) 2001 Jim Paris <ji...@jt...>
*
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 675 Mass Ave, Cambridge, MA 02139, USA.
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
*/
#include <linux/config.h>
+
#include <asm/asm.h>
-#include <asm/regdef.h>
#include <asm/mipsregs.h>
+#include <asm/addrspace.h>
+#include <asm/regdef.h>
#include <asm/stackframe.h>
-
#include <asm/vr41xx.h>
-
- .text
- .set noreorder
- .align 5
- NESTED(vr4111_handle_int, PT_SIZE, ra)
- .set noat
+ .align 5
+ NESTED(vr4111_handle_int, PT_SIZE, sp)
SAVE_ALL
CLI
.set at
.set noreorder
-
- /* Get a list of pending interrupts that are not disabled */
+
+ nop # possible CP0 hazard from a mtc0 in CLI
mfc0 t0, CP0_CAUSE
- mfc0 t1, CP0_STATUS
- and t0, t0, t1
-
- andi t1, t0, CAUSEF_IP7 # timer interrupt
- beqz t1, 1f
- li a0, 7
- jal ll_timer_interrupt
- move a1, sp
- j ret_from_irq
+ mfc0 t2, CP0_STATUS
+ and t0, t2
-1:
- andi t1, t0, 0x7800 # check for IP3-6
- beqz t1, 2f
+#define check_ip(x) \
+ andi t1, t0, CAUSEF_IP##x; \
+ bnez t1, handle_ip##x
- andi t1, t0, CAUSEF_IP3 # check for IP3 (rtc_long1)
- bnez t1, handle_it
- li a0, 3
+ check_ip(7) # timer interrupt
+ check_ip(3) # RTC interrupt 1
+ check_ip(4) # RTC interrupt 2
+ check_ip(5) # HSP modem interrupt
+ check_ip(2) # cascade to ICU
+ check_ip(0) # software interrupt 0
+ check_ip(1) # software interrupt 1
+#undef check_ip
- andi t1, t0, CAUSEF_IP4 # check for IP4 (rtc_long2)
- bnez t1, handle_it
- li a0, 4
+ .set reorder
+ j spurious_interrupt
+ nop
+ END(vr4111_handle_int)
- andi t1, t0, CAUSEF_IP5 # check for IP5 (hsp)
- bnez t1, handle_it
- li a0, 5
+ .align 5
+
+/* Build an appropriate label and code to handle non-cascaded interrupts */
+#define handle_ip(x) \
+handle_ip##x: \
+ li a0, x; \
+ move a1, sp; \
+ jal do_IRQ; \
+ j ret_from_irq
-/* Int4 will never occur on the VR4111 (user manual, 7.3.6)
- * andi t1, t0, CAUSEF_IP6 # check for IP6 (Int4)
- * bnez t1, handle_it
- * li a0, 6
- */
+ handle_ip(7)
+ handle_ip(3)
+ handle_ip(4)
+ handle_ip(5)
+ handle_ip(0)
+ handle_ip(1)
+#undef handle_ip
-2:
- andi t1, t0, CAUSEF_IP2 # check for IP2 (all other interrupts)
- beqz t1, 3f
+/* This is the special handler for the cascaded interrupt */
+handle_ip2:
move a0, sp
- jal int0_icu_irqdispatch # in C for implementation ease
- nop
+ jal icu_handle_int
+ beqz v0, icu_spurious
j ret_from_irq
- nop
-
-3:
- andi t1, t0, CAUSEF_IP0 # check for IP0 (software 0)
- bnez t1, handle_it
- li a0, 0
- andi t1, t0, CAUSEF_IP1 # check for IP1 (software 1)
- bnez t1, handle_it
- li a0, 1
-
+icu_spurious:
j spurious_interrupt
- nop
-
-handle_it:
- jal do_IRQ
- move a1, sp
- j ret_from_irq
-
- END(vr4111_handle_int)
Index: irq.c
===================================================================
RCS file: /cvsroot/linux-mips/linux/arch/mips/vr4111/common/irq.c,v
retrieving revision 1.1
retrieving revision 1.2
diff -u -d -r1.1 -r1.2
--- irq.c 2001/10/28 23:04:19 1.1
+++ irq.c 2001/11/26 01:38:57 1.2
@@ -23,6 +23,7 @@
#include <linux/malloc.h>
#include <linux/random.h>
+#include <asm/system.h>
#include <asm/irq.h>
#include <asm/mipsregs.h>
#include <asm/gdb-stub.h>
@@ -47,30 +48,25 @@
static void
sys_irq_enable(unsigned int irq)
{
- if(irq==VR41XX_IRQ_DSIU)
- *VR41XX_MDSIUINTREG |= 0x0800;
irq -= sys_irq_base;
if (irq < 16) {
- *VR41XX_MSYSINT1REG |= (u16)(1 << irq);
+ *VR41XX_MSYSINT1REG |= (u16)1 << irq;
} else {
irq -= 16;
- *VR41XX_MSYSINT2REG |= (u16)(1 << irq);
+ *VR41XX_MSYSINT2REG |= (u16)1 << irq;
}
}
static void
sys_irq_disable(unsigned int irq)
{
- if(irq==VR41XX_IRQ_DSIU)
- *VR41XX_MDSIUINTREG = 0;
irq -= sys_irq_base;
if (irq < 16) {
- *VR41XX_MSYSINT1REG &= ~((u16)(1 << irq));
+ *VR41XX_MSYSINT1REG &= ~((u16)1 << irq);
} else {
irq -= 16;
- *VR41XX_MSYSINT2REG &= ~((u16)(1 << irq));
+ *VR41XX_MSYSINT2REG &= ~((u16)1 << irq);
}
-
}
static unsigned int
@@ -82,7 +78,13 @@
#define sys_irq_shutdown sys_irq_disable
#define sys_irq_ack sys_irq_disable
-#define sys_irq_end sys_irq_enable
+
+static void
+sys_irq_end(unsigned int irq)
+{
+ if(!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS)))
+ sys_irq_enable(irq);
+}
static hw_irq_controller sys_irq_controller = {
"vr4111_sys_irq",
@@ -99,15 +101,14 @@
static void
gpio_irq_clear(unsigned int irq)
{
- /* clear interrupt if edge triggered; write a 1 to clear */
irq -= gpio_irq_base;
if (irq < 16) {
- if(*VR41XX_GIUINTTYPL & ((u16)1 << irq))
- *VR41XX_GIUINTSTATL = ((u16)1 << irq);
+ if(*VR41XX_GIUINTHTSELL & ((u16)1 << irq))
+ *VR41XX_GIUINTSTATL = (u16)1 << irq;
} else {
irq -= 16;
- if(*VR41XX_GIUINTTYPH & ((u16)1 << irq))
- *VR41XX_GIUINTSTATH = ((u16)1 << irq);
+ if(*VR41XX_GIUINTHTSELH & ((u16)1 << irq))
+ *VR41XX_GIUINTSTATH = (u16)1 << irq;
}
}
@@ -115,13 +116,12 @@
gpio_irq_enable(unsigned int irq)
{
gpio_irq_clear(irq);
-
irq -= gpio_irq_base;
if (irq < 16) {
- *VR41XX_MGIUINTLREG |= (u16)(1 << irq);
+ *VR41XX_MGIUINTLREG |= (u16)1 << irq;
} else {
irq -= 16;
- *VR41XX_MGIUINTHREG |= (u16)(1 << irq);
+ *VR41XX_MGIUINTHREG |= (u16)1 << irq;
}
}
@@ -130,10 +130,10 @@
{
irq -= gpio_irq_base;
if (irq < 16) {
- *VR41XX_MGIUINTLREG &= ~((u16)(1 << irq));
+ *VR41XX_MGIUINTLREG &= ~((u16)1 << irq);
} else {
irq -= 16;
- *VR41XX_MGIUINTHREG &= ~((u16)(1 << irq));
+ *VR41XX_MGIUINTHREG &= ~((u16)1 << irq);
}
}
@@ -141,31 +141,10 @@
gpio_irq_startup(unsigned int irq)
{
gpio_irq_enable(irq);
-
- irq -= gpio_irq_base;
- if (irq < 16) {
- *VR41XX_GIUINTENL |= (u16)(1 << irq);
- } else {
- irq -= 16;
- *VR41XX_GIUINTENH |= (u16)(1 << irq);
- }
-
return 0;
}
-static void
-gpio_irq_shutdown(unsigned int irq)
-{
- gpio_irq_disable(irq);
-
- irq -= gpio_irq_base;
- if (irq < 16) {
- *VR41XX_GIUINTENL &= ~((u16)(1 << irq));
- } else {
- irq -= 16;
- *VR41XX_GIUINTENH &= ~((u16)(1 << irq));
- }
-}
+#define gpio_irq_shutdown gpio_irq_disable
static void
gpio_irq_ack(unsigned int irq)
@@ -174,7 +153,12 @@
gpio_irq_clear(irq);
}
-#define gpio_irq_end gpio_irq_enable
+static void
+gpio_irq_end(unsigned int irq)
+{
+ if(!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS)))
+ gpio_irq_enable(irq);
+}
static hw_irq_controller gpio_irq_controller = {
"vr4111_gpio_irq",
@@ -190,20 +174,26 @@
/* --------------------- IRQ init stuff ---------------------- */
extern asmlinkage void vr4111_handle_int(void);
+extern void init_generic_irq(void);
extern void breakpoint(void);
extern int setup_irq(unsigned int irq, struct irqaction *irqaction);
extern void mips_cpu_irq_init(u32 irq_base);
static struct irqaction cascade =
{ no_action, SA_INTERRUPT, 0, "cascade", NULL, NULL };
-static struct irqaction reserved =
- { no_action, SA_INTERRUPT, 0, "reserved", NULL, NULL };
void __init init_IRQ(void)
{
int i;
extern irq_desc_t irq_desc[];
+#if (NR_IRQS < (VR41XX_SYS_IRQ_BASE + VR41XX_NUM_SYS_IRQ))
+#error -- NR_IRQS (in include/asm/irq.h) is too low for SYS IRQs!
+#endif
+#if (NR_IRQS < (VR41XX_GPIO_IRQ_BASE + VR41XX_NUM_GPIO_IRQ))
+#error -- NR_IRQS (in include/asm/irq.h) is too low for GPIO IRQs!
+#endif
+
init_generic_irq();
mips_cpu_irq_init(VR41XX_CPU_IRQ_BASE);
@@ -228,8 +218,15 @@
/* Default all ICU IRQs to off ... */
*VR41XX_MSYSINT1REG = 0;
*VR41XX_MSYSINT2REG = 0;
+
+ /* Make sure the RTC unit is disabled; clear RTC interrupts */
+ *VR41XX_RTCL1LREG = 0;
+ *VR41XX_RTCL1HREG = 0;
+ *VR41XX_RTCL2LREG = 0;
+ *VR41XX_RTCL2HREG = 0;
+ *VR41XX_RTCINTREG = 6; /* 0110b */
- /* We initialize the level 2 ICU registers to all bits disabled. */
+ /* Disable all level 2 ICU interrupts */
*VR41XX_MPIUINTREG = 0;
*VR41XX_MAIUINTREG = 0;
*VR41XX_MKIUINTREG = 0;
@@ -238,16 +235,16 @@
*VR41XX_MGIUINTLREG = 0;
*VR41XX_MGIUINTHREG = 0;
- /* Disable and clear all GPIO interrupts */
- *VR41XX_GIUINTENL = 0;
- *VR41XX_GIUINTENH = 0;
+ /* Only allow GPIO interrupts on lines configured as input */
+ *VR41XX_GIUINTENL = ~*VR41XX_GIUIOSELL;
+ *VR41XX_GIUINTENH = ~*VR41XX_GIUIOSELH;
+
+ /* Clear all GPIO interrupts */
*VR41XX_GIUINTSTATL = 0xffff;
*VR41XX_GIUINTSTATH = 0xffff;
setup_irq(VR41XX_IRQ_INT0, &cascade);
setup_irq(VR41XX_IRQ_GIU, &cascade);
- setup_irq(VR41XX_IRQ_RTCL1, &reserved);
- setup_irq(VR41XX_IRQ_RTCL2, &reserved);
set_except_vector(0, vr4111_handle_int);
|
|
From: Paul M. <le...@us...> - 2001-11-23 01:16:52
|
Update of /cvsroot/linux-mips/linux/arch/mips/ps2 In directory usw-pr-cvs1:/tmp/cvs-serv15549/ps2 Modified Files: Makefile Log Message: Oops.. typo fix. Index: Makefile =================================================================== RCS file: /cvsroot/linux-mips/linux/arch/mips/ps2/Makefile,v retrieving revision 1.3 retrieving revision 1.4 diff -u -d -r1.3 -r1.4 --- Makefile 2001/10/28 09:19:07 1.3 +++ Makefile 2001/11/23 01:16:46 1.4 @@ -13,7 +13,7 @@ O_TARGET := ps2.o -obj-y := setup.o reset.o prom.o time.o +obj-y += setup.o reset.o prom.o time.o include $(TOPDIR)/Rules.make |
|
From: Pete P. <pp...@us...> - 2001-11-22 01:19:30
|
Update of /cvsroot/linux-mips/linux/arch/mips/configs In directory usw-pr-cvs1:/tmp/cvs-serv1360/arch/mips/configs Added Files: defconfig-ivr Log Message: ITE8172 and Globespan IVR boards: * added support for new time.c and irq.c; bonnie++ passes consistently over nfs and hard drive. * added Globespan IVR default config file * updated IDE and Sound drivers --- NEW FILE: defconfig-ivr --- # # Automatically generated make config: don't edit # CONFIG_MIPS=y # # Code maturity level options # CONFIG_EXPERIMENTAL=y # # Machine selection # # CONFIG_ACER_PICA_61 is not set # CONFIG_ALGOR_P4032 is not set # CONFIG_BAGET_MIPS is not set # CONFIG_COBALT_MICRO_SERVER is not set # CONFIG_DECSTATION is not set # CONFIG_DDB5074 is not set # CONFIG_NEC_EAGLE is not set # CONFIG_NEC_KORVA is not set # CONFIG_MIPS_EV96100 is not set # CONFIG_MIPS_EV64120 is not set # CONFIG_MIPS_ATLAS is not set # CONFIG_MIPS_MALTA is not set # CONFIG_NINO is not set # CONFIG_SIBYTE_SB1250 is not set # CONFIG_PS2 is not set # CONFIG_CASIO_BE300 is not set # CONFIG_VADEM_CLIO_1000 is not set # CONFIG_MIPS_MAGNUM_4000 is not set # CONFIG_MOMENCO_OCELOT is not set # CONFIG_DDB5476 is not set # CONFIG_DDB5477 is not set # CONFIG_NEC_OSPREY is not set # CONFIG_OLIVETTI_M700 is not set # CONFIG_SGI_IP22 is not set # CONFIG_SNI_RM200_PCI is not set # CONFIG_MIPS_ITE8172 is not set CONFIG_MIPS_IVR=y # CONFIG_MIPS_PB1000 is not set # CONFIG_HP_LASERJET is not set # CONFIG_TOSHIBA_JMR3927 is not set CONFIG_RWSEM_GENERIC_SPINLOCK=y # CONFIG_RWSEM_XCHGADD_ALGORITHM is not set # CONFIG_MCA is not set # CONFIG_SBUS is not set CONFIG_PCI=y CONFIG_PC_KEYB=y CONFIG_NEW_PCI=y CONFIG_PCI_AUTO=y CONFIG_IT8172_CIR=y CONFIG_NEW_IRQ=y CONFIG_NEW_TIME_C=y # CONFIG_ISA is not set # CONFIG_EISA is not set # CONFIG_I8259 is not set # # Loadable module support # CONFIG_MODULES=y # CONFIG_MODVERSIONS is not set CONFIG_KMOD=y # # CPU selection # # CONFIG_CPU_R3000 is not set # CONFIG_CPU_TX39XX is not set # CONFIG_CPU_R6000 is not set # CONFIG_CPU_VR41XX is not set # CONFIG_CPU_R4300 is not set # CONFIG_CPU_R4X00 is not set # CONFIG_CPU_TX49XX is not set # CONFIG_CPU_R5000 is not set # CONFIG_CPU_R5432 is not set # CONFIG_CPU_R5900 is not set # CONFIG_CPU_RM7000 is not set CONFIG_CPU_NEVADA=y # CONFIG_CPU_R10000 is not set # CONFIG_CPU_SB1 is not set # CONFIG_CPU_MIPS32 is not set # CONFIG_CPU_MIPS64 is not set # CONFIG_CPU_ADVANCED is not set CONFIG_CPU_HAS_LLSC=y CONFIG_CPU_HAS_LLDSCD=y # CONFIG_CPU_HAS_WB is not set # # General setup # CONFIG_CPU_LITTLE_ENDIAN=y CONFIG_KCORE_ELF=y CONFIG_ELF_KERNEL=y # CONFIG_BINFMT_AOUT is not set CONFIG_BINFMT_ELF=y # CONFIG_BINFMT_MISC is not set CONFIG_NET=y CONFIG_PCI_NAMES=y # CONFIG_HOTPLUG is not set # CONFIG_PCMCIA is not set CONFIG_SYSVIPC=y CONFIG_BSD_PROCESS_ACCT=y CONFIG_SYSCTL=y # # Memory Technology Devices (MTD) # # CONFIG_MTD is not set # # Parallel port support # # CONFIG_PARPORT is not set # # Block devices # # CONFIG_BLK_DEV_FD is not set # CONFIG_BLK_DEV_XD is not set # CONFIG_PARIDE is not set # CONFIG_BLK_CPQ_DA is not set # CONFIG_BLK_CPQ_CISS_DA is not set # CONFIG_BLK_DEV_DAC960 is not set # CONFIG_BLK_DEV_LOOP is not set # CONFIG_BLK_DEV_NBD is not set # CONFIG_BLK_DEV_RAM is not set # CONFIG_BLK_DEV_INITRD is not set # # Multi-device support (RAID and LVM) # # CONFIG_MD is not set # CONFIG_BLK_DEV_MD is not set # CONFIG_MD_LINEAR is not set # CONFIG_MD_RAID0 is not set # CONFIG_MD_RAID1 is not set # CONFIG_MD_RAID5 is not set # CONFIG_MD_MULTIPATH is not set # CONFIG_BLK_DEV_LVM is not set # # Networking options # CONFIG_PACKET=y CONFIG_PACKET_MMAP=y # CONFIG_NETLINK is not set # CONFIG_NETFILTER is not set CONFIG_FILTER=y CONFIG_UNIX=y CONFIG_INET=y # CONFIG_IP_MULTICAST is not set # CONFIG_IP_ADVANCED_ROUTER is not set CONFIG_IP_PNP=y # CONFIG_IP_PNP_DHCP is not set CONFIG_IP_PNP_BOOTP=y # CONFIG_IP_PNP_RARP is not set # CONFIG_NET_IPIP is not set # CONFIG_NET_IPGRE is not set # CONFIG_INET_ECN is not set # CONFIG_SYN_COOKIES is not set # CONFIG_IPV6 is not set # CONFIG_KHTTPD is not set # CONFIG_ATM is not set # CONFIG_VLAN_8021Q is not set # # # # CONFIG_IPX is not set # CONFIG_ATALK is not set # CONFIG_DECNET is not set # CONFIG_BRIDGE is not set # CONFIG_X25 is not set # CONFIG_LAPB is not set # CONFIG_LLC is not set # CONFIG_NET_DIVERT is not set # CONFIG_ECONET is not set # CONFIG_WAN_ROUTER is not set # CONFIG_NET_FASTROUTE is not set # CONFIG_NET_HW_FLOWCONTROL is not set # # QoS and/or fair queueing # # CONFIG_NET_SCHED is not set # # Telephony Support # # CONFIG_PHONE is not set # CONFIG_PHONE_IXJ is not set # CONFIG_PHONE_IXJ_PCMCIA is not set # # ATA/IDE/MFM/RLL support # CONFIG_IDE=y # # IDE, ATA and ATAPI Block devices # CONFIG_BLK_DEV_IDE=y # # Please see Documentation/ide.txt for help/info on IDE drives # # CONFIG_BLK_DEV_HD_IDE is not set # CONFIG_BLK_DEV_HD is not set CONFIG_BLK_DEV_IDEDISK=y # CONFIG_IDEDISK_MULTI_MODE is not set # CONFIG_BLK_DEV_IDEDISK_VENDOR is not set # CONFIG_BLK_DEV_IDEDISK_FUJITSU is not set # CONFIG_BLK_DEV_IDEDISK_IBM is not set # CONFIG_BLK_DEV_IDEDISK_MAXTOR is not set # CONFIG_BLK_DEV_IDEDISK_QUANTUM is not set # CONFIG_BLK_DEV_IDEDISK_SEAGATE is not set # CONFIG_BLK_DEV_IDEDISK_WD is not set # CONFIG_BLK_DEV_COMMERIAL is not set # CONFIG_BLK_DEV_TIVO is not set # CONFIG_BLK_DEV_IDECS is not set # CONFIG_BLK_DEV_IDECD is not set # CONFIG_BLK_DEV_IDETAPE is not set # CONFIG_BLK_DEV_IDEFLOPPY is not set # CONFIG_BLK_DEV_IDESCSI is not set # # IDE chipset support/bugfixes # # CONFIG_BLK_DEV_CMD640 is not set # CONFIG_BLK_DEV_CMD640_ENHANCED is not set # CONFIG_BLK_DEV_ISAPNP is not set # CONFIG_BLK_DEV_RZ1000 is not set CONFIG_BLK_DEV_IDEPCI=y # CONFIG_IDEPCI_SHARE_IRQ is not set CONFIG_BLK_DEV_IDEDMA_PCI=y CONFIG_BLK_DEV_ADMA=y # CONFIG_BLK_DEV_OFFBOARD is not set CONFIG_IDEDMA_PCI_AUTO=y CONFIG_BLK_DEV_IDEDMA=y # CONFIG_IDEDMA_PCI_WIP is not set # CONFIG_IDEDMA_NEW_DRIVE_LISTINGS is not set # CONFIG_BLK_DEV_AEC62XX is not set # CONFIG_AEC62XX_TUNING is not set # CONFIG_BLK_DEV_ALI15X3 is not set # CONFIG_WDC_ALI15X3 is not set # CONFIG_BLK_DEV_AMD74XX is not set # CONFIG_AMD74XX_OVERRIDE is not set # CONFIG_BLK_DEV_CMD64X is not set # CONFIG_BLK_DEV_CY82C693 is not set # CONFIG_BLK_DEV_CS5530 is not set # CONFIG_BLK_DEV_HPT34X is not set # CONFIG_HPT34X_AUTODMA is not set # CONFIG_BLK_DEV_HPT366 is not set CONFIG_BLK_DEV_IT8172=y CONFIG_IT8172_TUNING=y # CONFIG_BLK_DEV_NS87415 is not set # CONFIG_BLK_DEV_OPTI621 is not set # CONFIG_BLK_DEV_PDC202XX is not set # CONFIG_PDC202XX_BURST is not set # CONFIG_PDC202XX_FORCE is not set # CONFIG_BLK_DEV_SVWKS is not set # CONFIG_BLK_DEV_SIS5513 is not set # CONFIG_BLK_DEV_SLC90E66 is not set # CONFIG_BLK_DEV_TRM290 is not set # CONFIG_BLK_DEV_VIA82CXXX is not set # CONFIG_IDE_CHIPSETS is not set CONFIG_IDEDMA_AUTO=y # CONFIG_IDEDMA_IVB is not set # CONFIG_DMA_NONPCI is not set CONFIG_BLK_DEV_IDE_MODES=y # CONFIG_BLK_DEV_ATARAID is not set # CONFIG_BLK_DEV_ATARAID_PDC is not set # CONFIG_BLK_DEV_ATARAID_HPT is not set # # SCSI support # # CONFIG_SCSI is not set # # I2O device support # # CONFIG_I2O is not set # CONFIG_I2O_PCI is not set # CONFIG_I2O_BLOCK is not set # CONFIG_I2O_LAN is not set # CONFIG_I2O_SCSI is not set # CONFIG_I2O_PROC is not set # # Network device support # CONFIG_NETDEVICES=y # # ARCnet devices # # CONFIG_ARCNET is not set # CONFIG_DUMMY is not set # CONFIG_BONDING is not set # CONFIG_EQUALIZER is not set # CONFIG_TUN is not set # # Ethernet (10 or 100Mbit) # CONFIG_NET_ETHERNET=y # CONFIG_SUNLANCE is not set # CONFIG_HAPPYMEAL is not set # CONFIG_SUNBMAC is not set # CONFIG_SUNQE is not set # CONFIG_SUNLANCE is not set # CONFIG_SUNGEM is not set # CONFIG_NET_VENDOR_3COM is not set # CONFIG_LANCE is not set # CONFIG_NET_VENDOR_SMC is not set # CONFIG_NET_VENDOR_RACAL is not set # CONFIG_HP100 is not set # CONFIG_NET_ISA is not set CONFIG_NET_PCI=y # CONFIG_PCNET32 is not set # CONFIG_ADAPTEC_STARFIRE is not set # CONFIG_APRICOT is not set # CONFIG_CS89x0 is not set CONFIG_TULIP=y # CONFIG_TULIP_MWI is not set # CONFIG_TULIP_MMIO is not set # CONFIG_DE4X5 is not set # CONFIG_DGRS is not set # CONFIG_TC35815 is not set # CONFIG_DM9102 is not set # CONFIG_EEPRO100 is not set # CONFIG_LNE390 is not set # CONFIG_FEALNX is not set # CONFIG_NATSEMI is not set # CONFIG_NE2K_PCI is not set # CONFIG_NE3210 is not set # CONFIG_ES3210 is not set # CONFIG_8139CP is not set CONFIG_8139TOO=y # CONFIG_8139TOO_PIO is not set # CONFIG_8139TOO_TUNE_TWISTER is not set # CONFIG_8139TOO_8129 is not set # CONFIG_SIS900 is not set # CONFIG_EPIC100 is not set # CONFIG_SUNDANCE is not set # CONFIG_TLAN is not set # CONFIG_VIA_RHINE is not set # CONFIG_WINBOND_840 is not set # CONFIG_LAN_SAA9730 is not set # CONFIG_NET_POCKET is not set # # Ethernet (1000 Mbit) # # CONFIG_ACENIC is not set # CONFIG_DL2K is not set # CONFIG_MYRI_SBUS is not set # CONFIG_NS83820 is not set # CONFIG_HAMACHI is not set # CONFIG_YELLOWFIN is not set # CONFIG_SK98LIN is not set # CONFIG_FDDI is not set # CONFIG_HIPPI is not set # CONFIG_PLIP is not set # CONFIG_PPP is not set # CONFIG_SLIP is not set # # Wireless LAN (non-hamradio) # # CONFIG_NET_RADIO is not set # # Token Ring devices # # CONFIG_TR is not set # CONFIG_NET_FC is not set # CONFIG_RCPCI is not set # CONFIG_SHAPER is not set # # Wan interfaces # # CONFIG_WAN is not set # # Amateur Radio support # # CONFIG_HAMRADIO is not set # # IrDA (infrared) support # # CONFIG_IRDA is not set # # ISDN subsystem # # CONFIG_ISDN is not set # # Old CD-ROM drivers (not SCSI, not IDE) # # CONFIG_CD_NO_IDESCSI is not set # # Character devices # CONFIG_VT=y CONFIG_VT_CONSOLE=y CONFIG_SERIAL=y CONFIG_SERIAL_CONSOLE=y # CONFIG_SERIAL_EXTENDED is not set # CONFIG_SERIAL_NONSTANDARD is not set CONFIG_QTRONIX_KEYBOARD=y CONFIG_IT8172_CIR=y # CONFIG_IT8172_SCR0 is not set CONFIG_UNIX98_PTYS=y CONFIG_UNIX98_PTY_COUNT=256 # # I2C support # # CONFIG_I2C is not set # # Mice # # CONFIG_BUSMOUSE is not set # CONFIG_MOUSE is not set # # Joysticks # # CONFIG_INPUT_GAMEPORT is not set # CONFIG_INPUT_NS558 is not set # CONFIG_INPUT_LIGHTNING is not set # CONFIG_INPUT_PCIGAME is not set # CONFIG_INPUT_CS461X is not set # CONFIG_INPUT_EMU10K1 is not set # CONFIG_INPUT_SERIO is not set # CONFIG_INPUT_SERPORT is not set # # Joysticks # # CONFIG_INPUT_ANALOG is not set # CONFIG_INPUT_A3D is not set # CONFIG_INPUT_ADI is not set # CONFIG_INPUT_COBRA is not set # CONFIG_INPUT_GF2K is not set # CONFIG_INPUT_GRIP is not set # CONFIG_INPUT_INTERACT is not set # CONFIG_INPUT_TMDC is not set # CONFIG_INPUT_SIDEWINDER is not set # CONFIG_INPUT_IFORCE_USB is not set # CONFIG_INPUT_IFORCE_232 is not set # CONFIG_INPUT_WARRIOR is not set # CONFIG_INPUT_MAGELLAN is not set # CONFIG_INPUT_SPACEORB is not set # CONFIG_INPUT_SPACEBALL is not set # CONFIG_INPUT_STINGER is not set # CONFIG_INPUT_DB9 is not set # CONFIG_INPUT_GAMECON is not set # CONFIG_INPUT_TURBOGRAFX is not set # CONFIG_QIC02_TAPE is not set # # Watchdog Cards # # CONFIG_WATCHDOG is not set # CONFIG_INTEL_RNG is not set # CONFIG_NVRAM is not set CONFIG_RTC=y # CONFIG_DALLAS_RTC is not set # CONFIG_DTLK is not set # CONFIG_R3964 is not set # CONFIG_APPLICOM is not set # # Ftape, the floppy tape device driver # # CONFIG_FTAPE is not set # CONFIG_AGP is not set # CONFIG_DRM is not set # # Multimedia devices # # CONFIG_VIDEO_DEV is not set # # File systems # # CONFIG_QUOTA is not set # CONFIG_AUTOFS_FS is not set # CONFIG_AUTOFS4_FS is not set # CONFIG_REISERFS_FS is not set # CONFIG_REISERFS_CHECK is not set # CONFIG_ADFS_FS is not set # CONFIG_ADFS_FS_RW is not set # CONFIG_AFFS_FS is not set # CONFIG_HFS_FS is not set # CONFIG_BFS_FS is not set # CONFIG_FAT_FS is not set # CONFIG_MSDOS_FS is not set # CONFIG_UMSDOS_FS is not set # CONFIG_VFAT_FS is not set # CONFIG_EFS_FS is not set # CONFIG_JFFS_FS is not set # CONFIG_JFFS2_FS is not set # CONFIG_CRAMFS is not set # CONFIG_TMPFS is not set # CONFIG_RAMFS is not set # CONFIG_ISO9660_FS is not set # CONFIG_JOLIET is not set # CONFIG_ZISOFS is not set # CONFIG_MINIX_FS is not set # CONFIG_VXFS_FS is not set # CONFIG_NTFS_FS is not set # CONFIG_NTFS_RW is not set # CONFIG_HPFS_FS is not set CONFIG_PROC_FS=y # CONFIG_DEVFS_FS is not set # CONFIG_DEVFS_MOUNT is not set # CONFIG_DEVFS_DEBUG is not set CONFIG_DEVPTS_FS=y # CONFIG_QNX4FS_FS is not set # CONFIG_QNX4FS_RW is not set # CONFIG_ROMFS_FS is not set CONFIG_EXT2_FS=y # CONFIG_SYSV_FS is not set # CONFIG_UDF_FS is not set # CONFIG_UDF_RW is not set # CONFIG_UFS_FS is not set # CONFIG_UFS_FS_WRITE is not set # # Network File Systems # # CONFIG_CODA_FS is not set CONFIG_NFS_FS=y # CONFIG_NFS_V3 is not set CONFIG_ROOT_NFS=y # CONFIG_NFSD is not set # CONFIG_NFSD_V3 is not set CONFIG_SUNRPC=y CONFIG_LOCKD=y # CONFIG_SMB_FS is not set # CONFIG_NCP_FS is not set # CONFIG_NCPFS_PACKET_SIGNING is not set # CONFIG_NCPFS_IOCTL_LOCKING is not set # CONFIG_NCPFS_STRONG is not set # CONFIG_NCPFS_NFS_NS is not set # CONFIG_NCPFS_OS2_NS is not set # CONFIG_NCPFS_SMALLDOS is not set # CONFIG_NCPFS_NLS is not set # CONFIG_NCPFS_EXTRAS is not set # CONFIG_ZISOFS_FS is not set # CONFIG_ZLIB_FS_INFLATE is not set # # Partition Types # # CONFIG_PARTITION_ADVANCED is not set CONFIG_MSDOS_PARTITION=y # CONFIG_SMB_NLS is not set # CONFIG_NLS is not set # # Console drivers # # CONFIG_VGA_CONSOLE is not set # CONFIG_MDA_CONSOLE is not set # # Frame-buffer support # # CONFIG_FB is not set # # Sound # # CONFIG_SOUND is not set # # USB support # CONFIG_USB=y # CONFIG_USB_DEBUG is not set # # Miscellaneous USB options # # CONFIG_USB_DEVICEFS is not set # CONFIG_USB_BANDWIDTH is not set # CONFIG_USB_LONG_TIMEOUT is not set # # USB Controllers # # CONFIG_USB_UHCI is not set # CONFIG_USB_UHCI_ALT is not set CONFIG_USB_OHCI=y # # USB Device Class drivers # # CONFIG_USB_AUDIO is not set # CONFIG_USB_BLUETOOTH is not set # CONFIG_USB_STORAGE is not set # CONFIG_USB_STORAGE_DEBUG is not set # CONFIG_USB_STORAGE_DATAFAB is not set # CONFIG_USB_STORAGE_FREECOM is not set # CONFIG_USB_STORAGE_ISD200 is not set # CONFIG_USB_STORAGE_DPCM is not set # CONFIG_USB_STORAGE_HP8200e is not set # CONFIG_USB_STORAGE_SDDR09 is not set # CONFIG_USB_STORAGE_JUMPSHOT is not set # CONFIG_USB_ACM is not set # CONFIG_USB_PRINTER is not set # # USB Human Interface Devices (HID) # CONFIG_USB_HID=y # CONFIG_USB_HIDDEV is not set # CONFIG_USB_WACOM is not set # # USB Imaging devices # # CONFIG_USB_DC2XX is not set # CONFIG_USB_MDC800 is not set # CONFIG_USB_SCANNER is not set # CONFIG_USB_MICROTEK is not set # CONFIG_USB_HPUSBSCSI is not set # # USB Multimedia devices # # # Video4Linux support is needed for USB Multimedia device support # # # USB Network adaptors # # CONFIG_USB_PEGASUS is not set # CONFIG_USB_KAWETH is not set # CONFIG_USB_CATC is not set # CONFIG_USB_CDCETHER is not set # CONFIG_USB_USBNET is not set # # USB port drivers # # CONFIG_USB_USS720 is not set # # USB Serial Converter support # # CONFIG_USB_SERIAL is not set # CONFIG_USB_SERIAL_GENERIC is not set # CONFIG_USB_SERIAL_BELKIN is not set # CONFIG_USB_SERIAL_WHITEHEAT is not set # CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set # CONFIG_USB_SERIAL_EMPEG is not set # CONFIG_USB_SERIAL_FTDI_SIO is not set # CONFIG_USB_SERIAL_VISOR is not set # CONFIG_USB_SERIAL_IR is not set # CONFIG_USB_SERIAL_EDGEPORT is not set # CONFIG_USB_SERIAL_KEYSPAN_PDA is not set # CONFIG_USB_SERIAL_KEYSPAN is not set # CONFIG_USB_SERIAL_KEYSPAN_USA28 is not set # CONFIG_USB_SERIAL_KEYSPAN_USA28X is not set # CONFIG_USB_SERIAL_KEYSPAN_USA28XA is not set # CONFIG_USB_SERIAL_KEYSPAN_USA28XB is not set # CONFIG_USB_SERIAL_KEYSPAN_USA19 is not set # CONFIG_USB_SERIAL_KEYSPAN_USA18X is not set # CONFIG_USB_SERIAL_KEYSPAN_USA19W is not set # CONFIG_USB_SERIAL_KEYSPAN_USA49W is not set # CONFIG_USB_SERIAL_MCT_U232 is not set # CONFIG_USB_SERIAL_PL2303 is not set # CONFIG_USB_SERIAL_CYBERJACK is not set # CONFIG_USB_SERIAL_XIRCOM is not set # CONFIG_USB_SERIAL_OMNINET is not set # # USB Miscellaneous drivers # # CONFIG_USB_RIO500 is not set # # Input core support # CONFIG_INPUT=y CONFIG_INPUT_KEYBDEV=y CONFIG_INPUT_MOUSEDEV=y CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 # CONFIG_INPUT_JOYDEV is not set # CONFIG_INPUT_EVDEV is not set # # Kernel hacking # CONFIG_CROSSCOMPILE=y # CONFIG_REMOTE_DEBUG is not set # CONFIG_GDB_CONSOLE is not set # CONFIG_DEBUG is not set # CONFIG_MAGIC_SYSRQ is not set # CONFIG_MIPS_UNCACHED is not set |
|
From: Pete P. <pp...@us...> - 2001-11-22 01:19:30
|
Update of /cvsroot/linux-mips/linux/arch/mips
In directory usw-pr-cvs1:/tmp/cvs-serv1360/arch/mips
Modified Files:
config.in
Log Message:
ITE8172 and Globespan IVR boards:
* added support for new time.c and irq.c; bonnie++ passes consistently
over nfs and hard drive.
* added Globespan IVR default config file
* updated IDE and Sound drivers
Index: config.in
===================================================================
RCS file: /cvsroot/linux-mips/linux/arch/mips/config.in,v
retrieving revision 1.52
retrieving revision 1.53
diff -u -d -r1.52 -r1.53
--- config.in 2001/11/20 17:24:21 1.52
+++ config.in 2001/11/22 01:19:24 1.53
@@ -264,6 +264,8 @@
define_bool CONFIG_NEW_PCI y
define_bool CONFIG_PCI_AUTO y
define_bool CONFIG_IT8172_CIR y
+ define_bool CONFIG_NEW_IRQ y
+ define_bool CONFIG_NEW_TIME_C y
fi
if [ "$CONFIG_MIPS_IVR" = "y" ]; then
define_bool CONFIG_PCI y
@@ -271,6 +273,8 @@
define_bool CONFIG_NEW_PCI y
define_bool CONFIG_PCI_AUTO y
define_bool CONFIG_IT8172_CIR y
+ define_bool CONFIG_NEW_IRQ y
+ define_bool CONFIG_NEW_TIME_C y
fi
if [ "$CONFIG_MIPS_PB1000" = "y" ]; then
define_bool CONFIG_MIPS_AU1000 y
|
|
From: Pete P. <pp...@us...> - 2001-11-22 01:19:28
|
Update of /cvsroot/linux-mips/linux/include/asm-mips/it8172 In directory usw-pr-cvs1:/tmp/cvs-serv1360/include/asm-mips/it8172 Added Files: it8172_int.h Log Message: ITE8172 and Globespan IVR boards: * added support for new time.c and irq.c; bonnie++ passes consistently over nfs and hard drive. * added Globespan IVR default config file * updated IDE and Sound drivers |
|
From: Pete P. <pp...@us...> - 2001-11-22 01:19:28
|
Update of /cvsroot/linux-mips/linux/drivers/sound In directory usw-pr-cvs1:/tmp/cvs-serv1360/drivers/sound Added Files: ite8172.c Log Message: ITE8172 and Globespan IVR boards: * added support for new time.c and irq.c; bonnie++ passes consistently over nfs and hard drive. * added Globespan IVR default config file * updated IDE and Sound drivers |
|
From: Pete P. <pp...@us...> - 2001-11-22 01:19:27
|
Update of /cvsroot/linux-mips/linux/drivers/ide In directory usw-pr-cvs1:/tmp/cvs-serv1360/drivers/ide Added Files: it8172.c Log Message: ITE8172 and Globespan IVR boards: * added support for new time.c and irq.c; bonnie++ passes consistently over nfs and hard drive. * added Globespan IVR default config file * updated IDE and Sound drivers |
|
From: Pete P. <pp...@us...> - 2001-11-22 01:19:27
|
Update of /cvsroot/linux-mips/linux/drivers/char
In directory usw-pr-cvs1:/tmp/cvs-serv1360/drivers/char
Modified Files:
Config.in
Log Message:
ITE8172 and Globespan IVR boards:
* added support for new time.c and irq.c; bonnie++ passes consistently
over nfs and hard drive.
* added Globespan IVR default config file
* updated IDE and Sound drivers
Index: Config.in
===================================================================
RCS file: /cvsroot/linux-mips/linux/drivers/char/Config.in,v
retrieving revision 1.25
retrieving revision 1.26
diff -u -d -r1.25 -r1.26
--- Config.in 2001/11/20 17:51:14 1.25
+++ Config.in 2001/11/22 01:19:24 1.26
@@ -100,6 +100,13 @@
bool 'Enable Smart Card Reader 0 Support ' CONFIG_IT8172_SCR0
bool 'Enable Smart Card Reader 1 Support ' CONFIG_IT8172_SCR1
fi
+if [ "$CONFIG_MIPS_IVR" = "y" ]; then
+ bool 'Enable Qtronix 990P Keyboard Support' CONFIG_QTRONIX_KEYBOARD
+ if [ "$CONFIG_QTRONIX_KEYBOARD" = "y" ]; then
+ define_bool CONFIG_IT8172_CIR y
+ fi
+ bool 'Enable Smart Card Reader 0 Support ' CONFIG_IT8172_SCR0
+fi
bool 'Unix98 PTY support' CONFIG_UNIX98_PTYS
if [ "$CONFIG_UNIX98_PTYS" = "y" ]; then
int 'Maximum number of Unix98 PTYs in use (0-2048)' CONFIG_UNIX98_PTY_COUNT 256
|
|
From: Pete P. <pp...@us...> - 2001-11-22 01:19:27
|
Update of /cvsroot/linux-mips/linux/arch/mips/ite-boards/ivr
In directory usw-pr-cvs1:/tmp/cvs-serv1360/arch/mips/ite-boards/ivr
Modified Files:
pci_fixup.c
Log Message:
ITE8172 and Globespan IVR boards:
* added support for new time.c and irq.c; bonnie++ passes consistently
over nfs and hard drive.
* added Globespan IVR default config file
* updated IDE and Sound drivers
Index: pci_fixup.c
===================================================================
RCS file: /cvsroot/linux-mips/linux/arch/mips/ite-boards/ivr/pci_fixup.c,v
retrieving revision 1.4
retrieving revision 1.5
diff -u -d -r1.4 -r1.5
--- pci_fixup.c 2001/11/06 20:23:53 1.4
+++ pci_fixup.c 2001/11/22 01:19:24 1.5
@@ -74,13 +74,14 @@
switch (slot) {
case 0x01:
/*
- * Internal device 1 is actually 7 different internal
- * devices on the IT8172G (a multi-function device).
+ * Internal device 1 is actually 7 different
+ * internal devices on the IT8172G (multi-function
+ * device).
*/
if (func < 7)
dev->irq = internal_func_irqs[func];
break;
- case 0x11:
+ case 0x11: // Realtek RTL-8139
switch (pin) {
case 0: /* pin A, hardware bug */
case 1: /* pin A */
@@ -101,7 +102,28 @@
}
break;
- case 0x13:
+ case 0x12: // ivr slot
+ switch (pin) {
+ case 0: /* pin A, hardware bug */
+ case 1: /* pin A */
+ dev->irq = IT8172_PCI_INTB_IRQ;
+ break;
+ case 2: /* pin B */
+ dev->irq = IT8172_PCI_INTB_IRQ;
+ break;
+ case 3: /* pin C */
+ dev->irq = IT8172_PCI_INTC_IRQ;
+ break;
+ case 4: /* pin D */
+ dev->irq = IT8172_PCI_INTD_IRQ;
+ break;
+ default:
+ dev->irq = 0xff;
+ break;
+
+ }
+ break;
+ case 0x13: // expansion slot
switch (pin) {
case 0: /* pin A, hardware bug */
case 1: /* pin A */
@@ -123,7 +145,7 @@
}
break;
default:
- return;
+ break;
}
#ifdef DEBUG
printk("irq fixup: slot %d, int line %d, int number %d\n",
|
|
From: Pete P. <pp...@us...> - 2001-11-22 01:19:27
|
Update of /cvsroot/linux-mips/linux/arch/mips/kernel In directory usw-pr-cvs1:/tmp/cvs-serv1360/arch/mips/kernel Modified Files: setup.c Log Message: ITE8172 and Globespan IVR boards: * added support for new time.c and irq.c; bonnie++ passes consistently over nfs and hard drive. * added Globespan IVR default config file * updated IDE and Sound drivers Index: setup.c =================================================================== RCS file: /cvsroot/linux-mips/linux/arch/mips/kernel/setup.c,v retrieving revision 1.30 retrieving revision 1.31 diff -u -d -r1.30 -r1.31 --- setup.c 2001/11/20 17:41:49 1.30 +++ setup.c 2001/11/22 01:19:24 1.31 @@ -647,6 +647,7 @@ void ps2_setup(void); void clio_1000_setup(void); void jmr3927_setup(void); + void it8172_setup(void); unsigned long bootmap_size; unsigned long start_pfn, max_pfn, first_usable_pfn; |
|
From: Pete P. <pp...@us...> - 2001-11-22 01:19:27
|
Update of /cvsroot/linux-mips/linux/arch/mips/ite-boards/generic
In directory usw-pr-cvs1:/tmp/cvs-serv1360/arch/mips/ite-boards/generic
Modified Files:
time.c
Added Files:
int-handler.S irq.c it8172_setup.c
Log Message:
ITE8172 and Globespan IVR boards:
* added support for new time.c and irq.c; bonnie++ passes consistently
over nfs and hard drive.
* added Globespan IVR default config file
* updated IDE and Sound drivers
Index: time.c
===================================================================
RCS file: /cvsroot/linux-mips/linux/arch/mips/ite-boards/generic/time.c,v
retrieving revision 1.4
retrieving revision 1.5
diff -u -d -r1.4 -r1.5
--- time.c 2001/10/05 17:07:14 1.4
+++ time.c 2001/11/22 01:19:24 1.5
@@ -28,135 +28,20 @@
#include <linux/kernel_stat.h>
#include <linux/sched.h>
#include <linux/spinlock.h>
+#include <linux/irq.h>
#include <asm/mipsregs.h>
#include <asm/ptrace.h>
#include <asm/it8172/it8172_int.h>
+#include <asm/debug.h>
#include <linux/mc146818rtc.h>
#include <linux/timex.h>
-extern void enable_cpu_timer(void);
-extern volatile unsigned long wall_jiffies;
-extern rwlock_t xtime_lock;
-
-unsigned long missed_heart_beats = 0;
-static long last_rtc_update = 0;
static unsigned long r4k_offset; /* Amount to increment compare reg each time */
static unsigned long r4k_cur; /* What counter should be at next timer irq */
-static unsigned int timer_tick_count=0;
-
-static inline void ack_r4ktimer(unsigned long newval)
-{
- write_32bit_cp0_register(CP0_COMPARE, newval);
-}
-
-
-/*
- * In order to set the CMOS clock precisely, set_rtc_mmss has to be
- * called 500 ms after the second nowtime has started, because when
- * nowtime is written into the registers of the CMOS clock, it will
- * jump to the next second precisely 500 ms later. Check the Motorola
- * MC146818A or Dallas DS12887 data sheet for details.
- *
- * BUG: This routine does not handle hour overflow properly; it just
- * sets the minutes. Usually you won't notice until after reboot!
- */
-static int set_rtc_mmss(unsigned long nowtime)
-{
- int retval = 0;
- int real_seconds, real_minutes, cmos_minutes;
- unsigned char save_control, save_freq_select;
-
- save_control = CMOS_READ(RTC_CONTROL); /* tell the clock it's being set */
- CMOS_WRITE((save_control|RTC_SET), RTC_CONTROL);
-
- save_freq_select = CMOS_READ(RTC_FREQ_SELECT); /* stop and reset prescaler */
- CMOS_WRITE((save_freq_select|RTC_DIV_RESET2), RTC_FREQ_SELECT);
-
- cmos_minutes = CMOS_READ(RTC_MINUTES);
-
- /*
- * since we're only adjusting minutes and seconds,
- * don't interfere with hour overflow. This avoids
- * messing with unknown time zones but requires your
- * RTC not to be off by more than 15 minutes
- */
- real_seconds = nowtime % 60;
- real_minutes = nowtime / 60;
- if (((abs(real_minutes - cmos_minutes) + 15)/30) & 1)
- real_minutes += 30; /* correct for half hour time zone */
- real_minutes %= 60;
-
- if (abs(real_minutes - cmos_minutes) < 30) {
- CMOS_WRITE(real_seconds,RTC_SECONDS);
- CMOS_WRITE(real_minutes,RTC_MINUTES);
- } else {
- printk(KERN_WARNING
- "set_rtc_mmss: can't update from %d to %d\n",
- cmos_minutes, real_minutes);
- retval = -1;
- }
-
- /* The following flags have to be released exactly in this order,
- * otherwise the DS12887 (popular MC146818A clone with integrated
- * battery and quartz) will not reset the oscillator and will not
- * update precisely 500 ms later. You won't find this mentioned in
- * the Dallas Semiconductor data sheets, but who believes data
- * sheets anyway ... -- Markus Kuhn
- */
- CMOS_WRITE(save_control, RTC_CONTROL);
- CMOS_WRITE(save_freq_select, RTC_FREQ_SELECT);
-
- return retval;
-}
-
-
-/*
- * There are a lot of conceptually broken versions of the MIPS timer interrupt
- * handler floating around. This one is rather different, but the algorithm
- * is provably more robust.
- */
-void mips_timer_interrupt(struct pt_regs *regs)
-{
- if (r4k_offset == 0)
- goto null;
-
- do {
- kstat.irqs[0][MIPS_CPU_TIMER_IRQ]++;
- do_timer(regs);
-
- /* Historical comment/code:
- * RTC time of day s updated approx. every 11
- * minutes. Because of how the numbers work out
- * we need to make absolutely sure we do this update
- * within 500ms before the * next second starts,
- * thus the following code.
- */
- read_lock(&xtime_lock);
- if ((time_status & STA_UNSYNC) == 0
- && xtime.tv_sec > last_rtc_update + 660
- && xtime.tv_usec >= 500000 - (tick >> 1)
- && xtime.tv_usec <= 500000 + (tick >> 1))
- if (set_rtc_mmss(xtime.tv_sec) == 0)
- last_rtc_update = xtime.tv_sec;
- else {
- /* do it again in 60 s */
- last_rtc_update = xtime.tv_sec - 600;
- }
- read_unlock(&xtime_lock);
-
- r4k_cur += r4k_offset;
- ack_r4ktimer(r4k_cur);
-
- } while (((unsigned long)read_32bit_cp0_register(CP0_COUNT)
- - r4k_cur) < 0x7fffffff);
-
- return;
-
-null:
- ack_r4ktimer(0);
-}
+extern unsigned int mips_counter_frequency;
+extern asmlinkage unsigned int do_IRQ(int irq, struct pt_regs *regs);
/*
* Figure out the r4k offset, the amount to increment the compare
@@ -165,7 +50,6 @@
*/
static unsigned long __init cal_r4koff(void)
{
- unsigned long count;
unsigned int flags;
__save_and_cli(flags);
@@ -181,15 +65,15 @@
while (CMOS_READ(RTC_REG_A) & RTC_UIP);
while (!(CMOS_READ(RTC_REG_A) & RTC_UIP));
- count = read_32bit_cp0_register(CP0_COUNT);
+ mips_counter_frequency = read_32bit_cp0_register(CP0_COUNT);
/* restore interrupts */
__restore_flags(flags);
- return (count / HZ);
+ return (mips_counter_frequency / HZ);
}
-static unsigned long __init get_mips_time(void)
+unsigned long it8172_rtc_get_time(void)
{
unsigned int year, mon, day, hour, min, sec;
unsigned char save_control;
@@ -224,10 +108,11 @@
return mktime(year, mon, day, hour, min, sec);
}
-void __init time_init(void)
+void __init it8172_time_init(void)
{
unsigned int est_freq, flags;
+ __save_and_cli(flags);
/* Set Data mode - binary. */
CMOS_WRITE(CMOS_READ(RTC_CONTROL) | RTC_DM_BINARY, RTC_CONTROL);
@@ -240,139 +125,28 @@
est_freq -= est_freq%10000;
printk("CPU frequency %d.%02d MHz\n", est_freq/1000000,
(est_freq%1000000)*100/1000000);
- r4k_cur = (read_32bit_cp0_register(CP0_COUNT) + r4k_offset);
-
- write_32bit_cp0_register(CP0_COMPARE, r4k_cur);
-
- enable_cpu_timer();
-
- /* Read time from the RTC chipset. */
- write_lock_irqsave (&xtime_lock, flags);
- xtime.tv_sec = get_mips_time();
- xtime.tv_usec = 0;
- write_unlock_irqrestore(&xtime_lock, flags);
-}
-
-/* This is for machines which generate the exact clock. */
-#define USECS_PER_JIFFY (1000000/HZ)
-
-/* Cycle counter value at the previous timer interrupt.. */
-
-static unsigned int timerhi = 0, timerlo = 0;
-
-/*
- * FIXME: Does playing with the RP bit in c0_status interfere with this code?
- */
-static unsigned long do_fast_gettimeoffset(void)
-{
- u32 count;
- unsigned long res, tmp;
-
- /* Last jiffy when do_fast_gettimeoffset() was called. */
- static unsigned long last_jiffies=0;
- unsigned long quotient;
-
- /*
- * Cached "1/(clocks per usec)*2^32" value.
- * It has to be recalculated once each jiffy.
- */
- static unsigned long cached_quotient=0;
-
- tmp = jiffies;
-
- quotient = cached_quotient;
-
- if (tmp && last_jiffies != tmp) {
- last_jiffies = tmp;
- __asm__(".set\tnoreorder\n\t"
- ".set\tnoat\n\t"
- ".set\tmips3\n\t"
- "lwu\t%0,%2\n\t"
- "dsll32\t$1,%1,0\n\t"
- "or\t$1,$1,%0\n\t"
- "ddivu\t$0,$1,%3\n\t"
- "mflo\t$1\n\t"
- "dsll32\t%0,%4,0\n\t"
- "nop\n\t"
- "ddivu\t$0,%0,$1\n\t"
- "mflo\t%0\n\t"
- ".set\tmips0\n\t"
- ".set\tat\n\t"
- ".set\treorder"
- :"=&r" (quotient)
- :"r" (timerhi),
- "m" (timerlo),
- "r" (tmp),
- "r" (USECS_PER_JIFFY));
- cached_quotient = quotient;
- }
-
- /* Get last timer tick in absolute kernel time */
- count = read_32bit_cp0_register(CP0_COUNT);
-
- /* .. relative to previous jiffy (32 bits is enough) */
- count -= timerlo;
-
- __asm__("multu\t%1,%2\n\t"
- "mfhi\t%0"
- :"=r" (res)
- :"r" (count),
- "r" (quotient));
-
- /*
- * Due to possible jiffies inconsistencies, we need to check
- * the result so that we'll get a timer that is monotonic.
- */
- if (res >= USECS_PER_JIFFY)
- res = USECS_PER_JIFFY-1;
-
- return res;
+ __restore_flags(flags);
}
-void do_gettimeofday(struct timeval *tv)
+#define ALLINTS (IE_IRQ0 | IE_IRQ1 | IE_IRQ2 | IE_IRQ3 | IE_IRQ4 | IE_IRQ5)
+void __init it8172_timer_setup(struct irqaction *irq)
{
- unsigned int flags;
-
- read_lock_irqsave (&xtime_lock, flags);
- *tv = xtime;
- tv->tv_usec += do_fast_gettimeoffset();
-
- /*
- * xtime is atomically updated in timer_bh. jiffies - wall_jiffies
- * is nonzero if the timer bottom half hasnt executed yet.
- */
- if (jiffies - wall_jiffies)
- tv->tv_usec += USECS_PER_JIFFY;
+ puts("timer_setup\n");
+ put32(NR_IRQS);
+ puts("");
+ /* we are using the cpu counter for timer interrupts */
+ setup_irq(MIPS_CPU_TIMER_IRQ, irq);
- read_unlock_irqrestore (&xtime_lock, flags);
+ /* to generate the first timer interrupt */
+ r4k_cur = (read_32bit_cp0_register(CP0_COUNT) + r4k_offset);
+ write_32bit_cp0_register(CP0_COMPARE, r4k_cur);
+ set_cp0_status(ALLINTS);
- if (tv->tv_usec >= 1000000) {
- tv->tv_usec -= 1000000;
- tv->tv_sec++;
- }
+ /* this is the last board dependent code */
+ db_run(board_init_done_flag = 1);
}
-void do_settimeofday(struct timeval *tv)
+void local_timer_interrupt(struct pt_regs *regs)
{
- write_lock_irq (&xtime_lock);
-
- /* This is revolting. We need to set the xtime.tv_usec correctly.
- * However, the value in this location is is value at the last tick.
- * Discover what correction gettimeofday would have done, and then
- * undo it!
- */
- tv->tv_usec -= do_fast_gettimeoffset();
-
- if (tv->tv_usec < 0) {
- tv->tv_usec += 1000000;
- tv->tv_sec--;
- }
-
- xtime = *tv;
- time_adjust = 0; /* stop active adjtime() */
- time_status |= STA_UNSYNC;
- time_maxerror = NTP_PHASE_LIMIT;
- time_esterror = NTP_PHASE_LIMIT;
-
- write_unlock_irq (&xtime_lock);
+ do_IRQ(MIPS_CPU_TIMER_IRQ, regs);
}
|
|
From: James S. <jsi...@us...> - 2001-11-21 22:15:30
|
Update of /cvsroot/linux-mips/linux/arch/mips/math-emu
In directory usw-pr-cvs1:/tmp/cvs-serv7922
Modified Files:
dp_tlong.c ieee754dp.c ieee754sp.c
Log Message:
More math emulation fixes.
Index: dp_tlong.c
===================================================================
RCS file: /cvsroot/linux-mips/linux/arch/mips/math-emu/dp_tlong.c,v
retrieving revision 1.1
retrieving revision 1.2
diff -u -d -r1.1 -r1.2
--- dp_tlong.c 2001/10/11 21:59:07 1.1
+++ dp_tlong.c 2001/11/21 22:15:28 1.2
@@ -95,7 +95,7 @@
if ((xm >> 63) != 0) {
/* This can happen after rounding */
SETCX(IEEE754_INVALID_OPERATION);
- return ieee754si_xcpt(ieee754di_indef(), "dp_tlong", x);
+ return ieee754di_xcpt(ieee754di_indef(), "dp_tlong", x);
}
if (round || sticky)
SETCX(IEEE754_INEXACT);
Index: ieee754dp.c
===================================================================
RCS file: /cvsroot/linux-mips/linux/arch/mips/math-emu/ieee754dp.c,v
retrieving revision 1.1
retrieving revision 1.2
diff -u -d -r1.1 -r1.2
--- ieee754dp.c 2001/10/04 16:22:33 1.1
+++ ieee754dp.c 2001/11/21 22:15:28 1.2
@@ -98,6 +98,32 @@
}
+static unsigned long long get_rounding(int sn, unsigned long long xm)
+{
+ /* inexact must round of 3 bits
+ */
+ if (xm & (DP_MBIT(3) - 1)) {
+ switch (ieee754_csr.rm) {
+ case IEEE754_RZ:
+ break;
+ case IEEE754_RN:
+ xm += 0x3 + ((xm >> 3) & 1);
+ /* xm += (xm&0x8)?0x4:0x3 */
+ break;
+ case IEEE754_RU: /* toward +Infinity */
+ if (!sn) /* ?? */
+ xm += 0x8;
+ break;
+ case IEEE754_RD: /* toward -Infinity */
+ if (sn) /* ?? */
+ xm += 0x8;
+ break;
+ }
+ }
+ return xm;
+}
+
+
/* generate a normal/denormal number with over,under handeling
* sn is sign
* xe is an unbiased exponent
@@ -136,37 +162,37 @@
}
}
- /* sticky right shift es bits
- */
- xm = XDPSRS(xm, es);
- xe += es;
-
- assert((xm & (DP_HIDDEN_BIT << 3)) == 0);
- assert(xe == DP_EMIN);
+ if (get_rounding(sn, xm) >> (DP_MBITS + 1 + 3)) {
+ /* Not tiny after rounding */
+ SETCX(IEEE754_INEXACT);
+ xm = get_rounding(sn, xm);
+ xm >>= 1;
+ /* Clear grs bits */
+ xm &= ~(DP_MBIT(3) - 1);
+ xe++;
+ }
+ else {
+ /* sticky right shift es bits
+ */
+ xm = XDPSRS(xm, es);
+ xe += es;
+ assert((xm & (DP_HIDDEN_BIT << 3)) == 0);
+ assert(xe == DP_EMIN);
+ }
}
if (xm & (DP_MBIT(3) - 1)) {
SETCX(IEEE754_INEXACT);
+ if ((xm & (DP_HIDDEN_BIT << 3)) == 0) {
+ SETCX(IEEE754_UNDERFLOW);
+ }
+
/* inexact must round of 3 bits
*/
- switch (ieee754_csr.rm) {
- case IEEE754_RZ:
- break;
- case IEEE754_RN:
- xm += 0x3 + ((xm >> 3) & 1);
- /* xm += (xm&0x8)?0x4:0x3 */
- break;
- case IEEE754_RU: /* toward +Infinity */
- if (!sn) /* ?? */
- xm += 0x8;
- break;
- case IEEE754_RD: /* toward -Infinity */
- if (sn) /* ?? */
- xm += 0x8;
- break;
- }
+ xm = get_rounding(sn, xm);
/* adjust exponent for rounding add overflowing
*/
- if (xm >> (DP_MBITS + 3 + 1)) { /* add causes mantissa overflow */
+ if (xm >> (DP_MBITS + 3 + 1)) {
+ /* add causes mantissa overflow */
xm >>= 1;
xe++;
}
@@ -203,7 +229,8 @@
if ((xm & DP_HIDDEN_BIT) == 0) {
/* we underflow (tiny/zero) */
assert(xe == DP_EMIN);
- SETCX(IEEE754_UNDERFLOW);
+ if (ieee754_csr.mx & IEEE754_UNDERFLOW)
+ SETCX(IEEE754_UNDERFLOW);
return builddp(sn, DP_EMIN - 1 + DP_EBIAS, xm);
} else {
assert((xm >> (DP_MBITS + 1)) == 0); /* no execess */
Index: ieee754sp.c
===================================================================
RCS file: /cvsroot/linux-mips/linux/arch/mips/math-emu/ieee754sp.c,v
retrieving revision 1.2
retrieving revision 1.3
diff -u -d -r1.2 -r1.3
--- ieee754sp.c 2001/10/11 21:57:54 1.2
+++ ieee754sp.c 2001/11/21 22:15:28 1.3
@@ -99,6 +99,32 @@
}
+static unsigned get_rounding(int sn, unsigned xm)
+{
+ /* inexact must round of 3 bits
+ */
+ if (xm & (SP_MBIT(3) - 1)) {
+ switch (ieee754_csr.rm) {
+ case IEEE754_RZ:
+ break;
+ case IEEE754_RN:
+ xm += 0x3 + ((xm >> 3) & 1);
+ /* xm += (xm&0x8)?0x4:0x3 */
+ break;
+ case IEEE754_RU: /* toward +Infinity */
+ if (!sn) /* ?? */
+ xm += 0x8;
+ break;
+ case IEEE754_RD: /* toward -Infinity */
+ if (sn) /* ?? */
+ xm += 0x8;
+ break;
+ }
+ }
+ return xm;
+}
+
+
/* generate a normal/denormal number with over,under handeling
* sn is sign
* xe is an unbiased exponent
@@ -116,57 +142,57 @@
int es = SP_EMIN - xe;
if (ieee754_csr.nod) {
- SETCX(IEEE754_UNDERFLOW);
- SETCX(IEEE754_INEXACT);
+ SETCX(IEEE754_UNDERFLOW);
+ SETCX(IEEE754_INEXACT);
- switch(ieee754_csr.rm) {
+ switch(ieee754_csr.rm) {
case IEEE754_RN:
- return ieee754sp_zero(sn);
+ return ieee754sp_zero(sn);
case IEEE754_RZ:
- return ieee754sp_zero(sn);
+ return ieee754sp_zero(sn);
case IEEE754_RU: /* toward +Infinity */
- if(sn == 0)
- return ieee754sp_min(0);
- else
- return ieee754sp_zero(1);
+ if(sn == 0)
+ return ieee754sp_min(0);
+ else
+ return ieee754sp_zero(1);
case IEEE754_RD: /* toward -Infinity */
- if(sn == 0)
- return ieee754sp_zero(0);
- else
- return ieee754sp_min(1);
- }
+ if(sn == 0)
+ return ieee754sp_zero(0);
+ else
+ return ieee754sp_min(1);
+ }
}
- /* sticky right shift es bits
- */
- SPXSRSXn(es);
-
- assert((xm & (SP_HIDDEN_BIT << 3)) == 0);
- assert(xe == SP_EMIN);
+ if (get_rounding(sn, xm) >> (SP_MBITS + 1 + 3)) {
+ /* Not tiny after rounding */
+ SETCX(IEEE754_INEXACT);
+ xm = get_rounding(sn, xm);
+ xm >>= 1;
+ /* Clear grs bits */
+ xm &= ~(SP_MBIT(3) - 1);
+ xe++;
+ }
+ else {
+ /* sticky right shift es bits
+ */
+ SPXSRSXn(es);
+ assert((xm & (SP_HIDDEN_BIT << 3)) == 0);
+ assert(xe == SP_EMIN);
+ }
}
if (xm & (SP_MBIT(3) - 1)) {
SETCX(IEEE754_INEXACT);
+ if ((xm & (SP_HIDDEN_BIT << 3)) == 0) {
+ SETCX(IEEE754_UNDERFLOW);
+ }
+
/* inexact must round of 3 bits
*/
- switch (ieee754_csr.rm) {
- case IEEE754_RZ:
- break;
- case IEEE754_RN:
- xm += 0x3 + ((xm >> 3) & 1);
- /* xm += (xm&0x8)?0x4:0x3 */
- break;
- case IEEE754_RU: /* toward +Infinity */
- if (!sn) /* ?? */
- xm += 0x8;
- break;
- case IEEE754_RD: /* toward -Infinity */
- if (sn) /* ?? */
- xm += 0x8;
- break;
- }
+ xm = get_rounding(sn, xm);
/* adjust exponent for rounding add overflowing
*/
- if (xm >> (SP_MBITS + 1 + 3)) { /* add causes mantissa overflow */
+ if (xm >> (SP_MBITS + 1 + 3)) {
+ /* add causes mantissa overflow */
xm >>= 1;
xe++;
}
@@ -203,25 +229,8 @@
if ((xm & SP_HIDDEN_BIT) == 0) {
/* we underflow (tiny/zero) */
assert(xe == SP_EMIN);
- SETCX(IEEE754_UNDERFLOW);
- if (!xm) {
- switch(ieee754_csr.rm) {
- case IEEE754_RN:
- return ieee754sp_zero(sn);
- case IEEE754_RZ:
- return ieee754sp_zero(sn);
- case IEEE754_RU: /* toward +Infinity */
- if(sn == 0)
- return ieee754sp_mind(0);
- else
- return ieee754sp_zero(1);
- case IEEE754_RD: /* toward -Infinity */
- if(sn == 0)
- return ieee754sp_zero(0);
- else
- return ieee754sp_mind(1);
- }
- }
+ if (ieee754_csr.mx & IEEE754_UNDERFLOW)
+ SETCX(IEEE754_UNDERFLOW);
return buildsp(sn, SP_EMIN - 1 + SP_EBIAS, xm);
} else {
assert((xm >> (SP_MBITS + 1)) == 0); /* no execess */
|
|
From: James S. <jsi...@us...> - 2001-11-21 22:12:45
|
Update of /cvsroot/linux-mips/linux/arch/mips/mm
In directory usw-pr-cvs1:/tmp/cvs-serv7001
Modified Files:
c-sb1.c
Log Message:
Remove SMP braindamage without replacement.
Index: c-sb1.c
===================================================================
RCS file: /cvsroot/linux-mips/linux/arch/mips/mm/c-sb1.c,v
retrieving revision 1.3
retrieving revision 1.4
diff -u -d -r1.3 -r1.4
--- c-sb1.c 2001/11/19 17:59:43 1.3
+++ c-sb1.c 2001/11/21 22:12:42 1.4
@@ -39,9 +39,6 @@
static unsigned int dcache_sets;
static unsigned int tlb_entries;
-/* Define this to be insanely conservative (e.g. flush everything, lots) */
-#undef SB1_TLB_CONSERVATIVE
-#undef SB1_CACHE_CONSERVATIVE
void pgd_init(unsigned long page)
{
unsigned long *p = (unsigned long *) page;
@@ -72,7 +69,7 @@
* to flush it
*/
-static void _sb1_flush_cache_all(void)
+static void sb1_flush_cache_all(void)
{
/*
@@ -83,7 +80,7 @@
* $1 - moving cache index
* $2 - set count
*/
- if (icache_sets) {
+ if (icache_sets) {
if (dcache_sets) {
__asm__ __volatile__ (
".set push \n"
@@ -96,10 +93,12 @@
" bnez %1, 1b \n" /* loop test */
" addu $1, $1, %0 \n" /* Next address */
".set pop \n"
- ::"r" (dcache_line_size),
- "r" (dcache_sets * dcache_assoc),
- "r" (KSEG0)
- :"$1");
+ :
+ : "r" (dcache_line_size),
+ "r" (dcache_sets * dcache_assoc),
+ "r" (KSEG0)
+ "i" (Index_Writeback_Inv_D));
+
__asm__ __volatile__ (
".set push \n"
".set noreorder \n"
@@ -116,31 +115,20 @@
".set noat \n"
".set mips4 \n"
" move $1, %2 \n" /* Start at index 0 */
- "1: cache 0, 0($1) \n" /* Invalidate this index */
+ "1: cache %3, 0($1) \n" /* Invalidate this index */
" addiu %1, %1, -1 \n" /* Decrement loop count */
" bnez %1, 1b \n" /* loop test */
" addu $1, $1, %0 \n" /* Next address */
".set pop \n"
- ::"r" (icache_line_size),
- "r" (icache_sets * icache_assoc),
- "r" (KSEG0)
+ :
+ : "r" (icache_line_size),
+ "r" (icache_sets * icache_assoc),
+ "r" (KSEG0),
+ "i" (Index_Invalidate_I)
:"$1");
}
}
-#ifdef CONFIG_SMP
-static void sb1_flush_cache_all_ipi(void *ignored)
-{
- _sb1_flush_cache_all();
-}
-#endif
-
-static void sb1_flush_cache_all(void)
-{
- smp_call_function(sb1_flush_cache_all_ipi, 0, 1, 1);
- _sb1_flush_cache_all();
-}
-
/*
* When flushing a range in the icache, we have to first writeback
* the dcache for the same range, so new ifetches will see any
@@ -155,7 +143,7 @@
*
*/
-static void _sb1_flush_icache_range(unsigned long start, unsigned long end)
+static void sb1_flush_icache_range(unsigned long start, unsigned long end)
{
if (icache_sets) {
if (dcache_sets) {
@@ -232,40 +220,6 @@
}
}
-/* XXXKW how should I pass these instead? */
-unsigned long flush_range_start;
-unsigned long flush_range_end;
-
-#if defined(CONFIG_SMP) && !defined(SB1_CACHE_CONSERVATIVE)
-
-static void sb1_flush_icache_range_ipi(void *ignored)
-{
- _sb1_flush_icache_range(flush_range_start, flush_range_end);
-}
-#endif
-
-static void sb1_flush_icache_range(unsigned long start, unsigned long end)
-{
-#ifdef SB1_CACHE_CONSERVATIVE
- sb1_flush_cache_all();
-#else
- if (start == end) {
- return;
- }
- start &= ~((long)(dcache_line_size - 1));
- end = (end - 1) & ~((long)(dcache_line_size - 1));
-
- if ((end-start) >= (16*1024*1024)) {
- sb1_flush_cache_all();
- } else {
- _sb1_flush_icache_range(start, end);
- flush_range_start = start;
- flush_range_end = end;
- smp_call_function(sb1_flush_icache_range_ipi, 0, 1, 1);
- }
-#endif
-}
-
/*
* If there's no context yet, or the page isn't executable, no icache flush
* is needed
@@ -279,11 +233,12 @@
}
addr = (unsigned long)page_address(page);
- /* XXXKW addr is a Kseg0 address, whereas hidden higher up the
- call stack, we may really need to flush a Useg address.
- Our Icache is virtually tagged, which means we have to be
- super conservative. See comments in
- _sb1_flush_icache_rage. */
+ /*
+ * XXXKW addr is a Kseg0 address, whereas hidden higher up the call
+ * stack, we may really need to flush a Useg address. Our Icache is
+ * virtually tagged, which means we have to be super conservative.
+ * See comments in sb1_flush_icache_rage.
+ */
sb1_flush_icache_range(addr, addr + PAGE_SIZE);
}
|
|
From: James S. <jsi...@us...> - 2001-11-21 22:11:57
|
Update of /cvsroot/linux-mips/linux/include/asm-mips In directory usw-pr-cvs1:/tmp/cvs-serv6743 Modified Files: checksum.h Log Message: Fix the fix. Index: checksum.h =================================================================== RCS file: /cvsroot/linux-mips/linux/include/asm-mips/checksum.h,v retrieving revision 1.6 retrieving revision 1.7 diff -u -d -r1.6 -r1.7 --- checksum.h 2001/11/20 18:11:19 1.6 +++ checksum.h 2001/11/21 22:11:55 1.7 @@ -80,7 +80,7 @@ "xori\t%0,0xffff\n\t" ".set\tat" : "=r" (sum) - : "r" (sum)); + : "0" (sum)); return sum; } |
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