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From: James S. <jsi...@us...> - 2001-11-26 19:57:44
|
Update of /cvsroot/linux-mips/linux/arch/mips/sni In directory usw-pr-cvs1:/tmp/cvs-serv3172/arch/mips/sni Modified Files: setup.c Log Message: Cleanup of include/asm-mips/io.h. Now looks neat and harmless. Index: setup.c =================================================================== RCS file: /cvsroot/linux-mips/linux/arch/mips/sni/setup.c,v retrieving revision 1.2 retrieving revision 1.3 diff -u -d -r1.2 -r1.3 --- setup.c 2001/10/02 17:18:31 1.2 +++ setup.c 2001/11/26 19:57:39 1.3 @@ -78,7 +78,7 @@ sni_pcimt_detect(); sni_pcimt_sc_init(); - mips_io_port_base = SNI_PORT_BASE; + set_io_port_base(SNI_PORT_BASE); /* * Setup (E)ISA I/O memory access stuff |
From: James S. <jsi...@us...> - 2001-11-26 19:57:44
|
Update of /cvsroot/linux-mips/linux/arch/mips/vr4111/clio-1000 In directory usw-pr-cvs1:/tmp/cvs-serv3172/arch/mips/vr4111/clio-1000 Modified Files: setup.c Log Message: Cleanup of include/asm-mips/io.h. Now looks neat and harmless. Index: setup.c =================================================================== RCS file: /cvsroot/linux-mips/linux/arch/mips/vr4111/clio-1000/setup.c,v retrieving revision 1.1 retrieving revision 1.2 diff -u -d -r1.1 -r1.2 --- setup.c 2001/10/28 23:04:19 1.1 +++ setup.c 2001/11/26 19:57:39 1.2 @@ -45,8 +45,8 @@ void __init clio_1000_setup(void) { unsigned short val; - - mips_io_port_base = VR41XX_PORT_BASE; + + set_io_port_base(VR41XX_PORT_BASE); isa_slot_offset = VR41XX_ISAMEM_BASE; board_time_init = vr4111_time_init; |
From: James S. <jsi...@us...> - 2001-11-26 19:57:44
|
Update of /cvsroot/linux-mips/linux/arch/mips/vr4181/osprey In directory usw-pr-cvs1:/tmp/cvs-serv3172/arch/mips/vr4181/osprey Modified Files: setup.c Log Message: Cleanup of include/asm-mips/io.h. Now looks neat and harmless. Index: setup.c =================================================================== RCS file: /cvsroot/linux-mips/linux/arch/mips/vr4181/osprey/setup.c,v retrieving revision 1.4 retrieving revision 1.5 diff -u -d -r1.4 -r1.5 --- setup.c 2001/10/07 16:57:20 1.4 +++ setup.c 2001/11/26 19:57:39 1.5 @@ -34,7 +34,7 @@ void __init nec_osprey_setup(void) { - mips_io_port_base = VR4181_PORT_BASE; + set_io_port_base(VR4181_PORT_BASE); isa_slot_offset = VR4181_ISAMEM_BASE; vr4181_init_serial(); |
From: James S. <jsi...@us...> - 2001-11-26 19:57:44
|
Update of /cvsroot/linux-mips/linux/arch/mips/vr4122/eagle In directory usw-pr-cvs1:/tmp/cvs-serv3172/arch/mips/vr4122/eagle Modified Files: setup.c Log Message: Cleanup of include/asm-mips/io.h. Now looks neat and harmless. Index: setup.c =================================================================== RCS file: /cvsroot/linux-mips/linux/arch/mips/vr4122/eagle/setup.c,v retrieving revision 1.1 retrieving revision 1.2 diff -u -d -r1.1 -r1.2 --- setup.c 2001/09/22 04:27:15 1.1 +++ setup.c 2001/11/26 19:57:39 1.2 @@ -61,7 +61,7 @@ mips_counter_frequency = clock / 4; - mips_io_port_base = VR4122_IO_PORT_BASE; + set_io_port_base(VR4122_IO_PORT_BASE); _machine_restart = vr4122_restart; _machine_halt = vr4122_halt; |
From: James S. <jsi...@us...> - 2001-11-26 19:57:43
|
Update of /cvsroot/linux-mips/linux/arch/mips/ddb5xxx/ddb5476 In directory usw-pr-cvs1:/tmp/cvs-serv3172/arch/mips/ddb5xxx/ddb5476 Modified Files: setup.c Log Message: Cleanup of include/asm-mips/io.h. Now looks neat and harmless. Index: setup.c =================================================================== RCS file: /cvsroot/linux-mips/linux/arch/mips/ddb5xxx/ddb5476/setup.c,v retrieving revision 1.2 retrieving revision 1.3 diff -u -d -r1.2 -r1.3 --- setup.c 2001/10/11 20:45:26 1.2 +++ setup.c 2001/11/26 19:57:38 1.3 @@ -136,7 +136,7 @@ extern int panic_timeout; irq_setup = ddb5476_irq_setup; - mips_io_port_base = KSEG1ADDR(DDB_PCI_IO_BASE); + set_io_port_base(KSEG1ADDR(DDB_PCI_IO_BASE)); board_time_init = ddb_time_init; board_timer_setup = ddb_timer_setup; |
From: James S. <jsi...@us...> - 2001-11-26 19:57:43
|
Update of /cvsroot/linux-mips/linux/arch/mips/ite-boards/generic In directory usw-pr-cvs1:/tmp/cvs-serv3172/arch/mips/ite-boards/generic Modified Files: it8172_setup.c Log Message: Cleanup of include/asm-mips/io.h. Now looks neat and harmless. Index: it8172_setup.c =================================================================== RCS file: /cvsroot/linux-mips/linux/arch/mips/ite-boards/generic/it8172_setup.c,v retrieving revision 1.7 retrieving revision 1.8 diff -u -d -r1.7 -r1.8 --- it8172_setup.c 2001/11/22 01:19:24 1.7 +++ it8172_setup.c 2001/11/26 19:57:39 1.8 @@ -53,7 +53,6 @@ extern struct rtc_ops it8172_rtc_ops; extern struct resource ioport_resource; -extern unsigned long mips_io_port_base; #ifdef CONFIG_BLK_DEV_IDE extern struct ide_ops std_ide_ops; extern struct ide_ops *ide_ops; @@ -151,7 +150,7 @@ * * revisit this area. */ - mips_io_port_base = KSEG1; + set_io_port_base(KSEG1); ioport_resource.start = it8172_resources.pci_io.start; ioport_resource.end = it8172_resources.pci_io.end; #ifdef CONFIG_IT8172_REVC |
From: James S. <jsi...@us...> - 2001-11-26 19:57:43
|
Update of /cvsroot/linux-mips/linux/arch/mips/jmr3927/rbhma3100 In directory usw-pr-cvs1:/tmp/cvs-serv3172/arch/mips/jmr3927/rbhma3100 Modified Files: setup.c Log Message: Cleanup of include/asm-mips/io.h. Now looks neat and harmless. Index: setup.c =================================================================== RCS file: /cvsroot/linux-mips/linux/arch/mips/jmr3927/rbhma3100/setup.c,v retrieving revision 1.1 retrieving revision 1.2 diff -u -d -r1.1 -r1.2 --- setup.c 2001/11/10 03:56:05 1.1 +++ setup.c 2001/11/26 19:57:39 1.2 @@ -201,7 +201,8 @@ char *argptr; irq_setup = jmr3927_irq_setup; - mips_io_port_base = JMR3927_PORT_BASE + JMR3927_PCIIO; + + set_io_port_base(JMR3927_PORT_BASE + JMR3927_PCIIO); board_time_init = jmr3927_time_init; board_timer_setup = jmr3927_timer_setup; |
From: James S. <jsi...@us...> - 2001-11-26 19:57:43
|
Update of /cvsroot/linux-mips/linux/arch/mips/ddb5074 In directory usw-pr-cvs1:/tmp/cvs-serv3172/arch/mips/ddb5074 Added Files: setup.c Log Message: Cleanup of include/asm-mips/io.h. Now looks neat and harmless. |
From: James S. <jsi...@us...> - 2001-11-26 19:57:43
|
Update of /cvsroot/linux-mips/linux/arch/mips/gt64120/momenco_ocelot In directory usw-pr-cvs1:/tmp/cvs-serv3172/arch/mips/gt64120/momenco_ocelot Added Files: setup.c Log Message: Cleanup of include/asm-mips/io.h. Now looks neat and harmless. |
From: James S. <jsi...@us...> - 2001-11-26 19:57:43
|
Update of /cvsroot/linux-mips/linux/arch/mips/galileo-boards/ev64120 In directory usw-pr-cvs1:/tmp/cvs-serv3172/arch/mips/galileo-boards/ev64120 Modified Files: setup.c Log Message: Cleanup of include/asm-mips/io.h. Now looks neat and harmless. Index: setup.c =================================================================== RCS file: /cvsroot/linux-mips/linux/arch/mips/galileo-boards/ev64120/setup.c,v retrieving revision 1.2 retrieving revision 1.3 diff -u -d -r1.2 -r1.3 --- setup.c 2001/08/25 02:19:27 1.2 +++ setup.c 2001/11/26 19:57:39 1.3 @@ -131,7 +131,7 @@ rtc_ops = &galileo_rtc_ops; board_time_init = galileo_time_init; - mips_io_port_base = KSEG1; + set_io_port_base(KSEG1); #ifdef CONFIG_L2_L3_CACHE #error "external cache not implemented yet" |
From: James S. <jsi...@us...> - 2001-11-26 19:57:42
|
Update of /cvsroot/linux-mips/linux/arch/mips/ddb5xxx/ddb5477 In directory usw-pr-cvs1:/tmp/cvs-serv3172/arch/mips/ddb5xxx/ddb5477 Modified Files: setup.c Log Message: Cleanup of include/asm-mips/io.h. Now looks neat and harmless. Index: setup.c =================================================================== RCS file: /cvsroot/linux-mips/linux/arch/mips/ddb5xxx/ddb5477/setup.c,v retrieving revision 1.2 retrieving revision 1.3 diff -u -d -r1.2 -r1.3 --- setup.c 2001/10/11 20:45:26 1.2 +++ setup.c 2001/11/26 19:57:39 1.3 @@ -10,10 +10,7 @@ * under the terms of the GNU General Public License as published by the * Free Software Foundation; either version 2 of the License, or (at your * option) any later version. - * - *********************************************************************** */ - #include <linux/config.h> #include <linux/init.h> #include <linux/kernel.h> @@ -133,7 +130,7 @@ extern int panic_timeout; irq_setup = ddb5477_irq_setup; - mips_io_port_base = KSEG1ADDR(DDB_PCI_IO_BASE); + set_io_port_base(KSEG1ADDR(DDB_PCI_IO_BASE)); board_time_init = ddb_time_init; board_timer_setup = ddb_timer_setup; |
From: James S. <jsi...@us...> - 2001-11-26 19:57:42
|
Update of /cvsroot/linux-mips/linux/arch/mips/galileo-boards/ev96100 In directory usw-pr-cvs1:/tmp/cvs-serv3172/arch/mips/galileo-boards/ev96100 Modified Files: setup.c Log Message: Cleanup of include/asm-mips/io.h. Now looks neat and harmless. Index: setup.c =================================================================== RCS file: /cvsroot/linux-mips/linux/arch/mips/galileo-boards/ev96100/setup.c,v retrieving revision 1.4 retrieving revision 1.5 diff -u -d -r1.4 -r1.5 --- setup.c 2001/11/11 00:24:38 1.4 +++ setup.c 2001/11/26 19:57:39 1.5 @@ -148,7 +148,7 @@ rtc_ops = &no_rtc_ops; mips_reboot_setup(); - mips_io_port_base = KSEG1; + set_io_port_base(KSEG1); ioport_resource.start = GT_PCI_IO_BASE; ioport_resource.end = GT_PCI_IO_BASE + 0x01ffffff; |
From: James S. <jsi...@us...> - 2001-11-26 19:57:42
|
Update of /cvsroot/linux-mips/linux/arch/mips In directory usw-pr-cvs1:/tmp/cvs-serv3172/arch/mips Modified Files: Makefile Log Message: Cleanup of include/asm-mips/io.h. Now looks neat and harmless. Index: Makefile =================================================================== RCS file: /cvsroot/linux-mips/linux/arch/mips/Makefile,v retrieving revision 1.30 retrieving revision 1.31 diff -u -d -r1.30 -r1.31 --- Makefile 2001/11/20 01:44:46 1.30 +++ Makefile 2001/11/26 19:57:38 1.31 @@ -116,7 +116,7 @@ # You need a compressed ramdisk image, named ramdisk.gz in # arch/mips/ramdisk # -ifdef CONFIG_BLK_DEV_INITRD +ifdef CONFIG_EMBEDDED_RAMDISK CORE_FILES += arch/mips/ramdisk/ramdisk.o SUBDIRS += arch/mips/ramdisk endif |
From: James S. <jsi...@us...> - 2001-11-26 19:57:42
|
Update of /cvsroot/linux-mips/linux/arch/mips/au1000/pb1000 In directory usw-pr-cvs1:/tmp/cvs-serv3172/arch/mips/au1000/pb1000 Modified Files: setup.c Log Message: Cleanup of include/asm-mips/io.h. Now looks neat and harmless. Index: setup.c =================================================================== RCS file: /cvsroot/linux-mips/linux/arch/mips/au1000/pb1000/setup.c,v retrieving revision 1.13 retrieving revision 1.14 diff -u -d -r1.13 -r1.14 --- setup.c 2001/11/13 23:37:00 1.13 +++ setup.c 2001/11/26 19:57:38 1.14 @@ -97,7 +97,7 @@ _machine_power_off = au1000_power_off; // IO/MEM resources. - mips_io_port_base = 0; + set_io_port_base(0); ioport_resource.start = 0; ioport_resource.end = 0xffffffff; iomem_resource.start = 0; |
From: James S. <jsi...@us...> - 2001-11-26 19:57:42
|
Update of /cvsroot/linux-mips/linux/arch/mips/cobalt In directory usw-pr-cvs1:/tmp/cvs-serv3172/arch/mips/cobalt Modified Files: setup.c Log Message: Cleanup of include/asm-mips/io.h. Now looks neat and harmless. Index: setup.c =================================================================== RCS file: /cvsroot/linux-mips/linux/arch/mips/cobalt/setup.c,v retrieving revision 1.12 retrieving revision 1.13 diff -u -d -r1.12 -r1.13 --- setup.c 2001/11/09 22:52:17 1.12 +++ setup.c 2001/11/26 19:57:38 1.13 @@ -144,7 +144,7 @@ /* * IO/MEM resources. */ - mips_io_port_base = COBALT_LOCAL_IO_SPACE; + set_io_port_base(COBALT_LOCAL_IO_SPACE); #ifdef CONFIG_NEW_PCI ioport_resource.start = 0x10000000; |
From: James S. <jsi...@us...> - 2001-11-26 19:35:24
|
Update of /cvsroot/linux-mips/linux/drivers/char In directory usw-pr-cvs1:/tmp/cvs-serv29412 Modified Files: sb1250_duart.c Log Message: Don't include <asm/sibyte/sbmips.h>. Index: sb1250_duart.c =================================================================== RCS file: /cvsroot/linux-mips/linux/drivers/char/sb1250_duart.c,v retrieving revision 1.1 retrieving revision 1.2 diff -u -d -r1.1 -r1.2 --- sb1250_duart.c 2001/11/20 17:51:14 1.1 +++ sb1250_duart.c 2001/11/26 19:35:21 1.2 @@ -47,7 +47,6 @@ #include <asm/uaccess.h> #include <asm/sibyte/swarm.h> #include <asm/sibyte/sb1250.h> -#include <asm/sibyte/sbmips.h> #include <asm/sibyte/sb1250_regs.h> #include <asm/sibyte/sb1250_uart.h> #include <asm/sibyte/sb1250_int.h> |
From: James S. <jsi...@us...> - 2001-11-26 19:34:33
|
Update of /cvsroot/linux-mips/linux/drivers/sound In directory usw-pr-cvs1:/tmp/cvs-serv29205 Modified Files: Makefile swarm_cs4297a.c Log Message: Hack to compile. Index: Makefile =================================================================== RCS file: /cvsroot/linux-mips/linux/drivers/sound/Makefile,v retrieving revision 1.10 retrieving revision 1.11 diff -u -d -r1.10 -r1.11 --- Makefile 2001/11/12 22:58:48 1.10 +++ Makefile 2001/11/26 19:34:31 1.11 @@ -72,6 +72,7 @@ obj-$(CONFIG_SOUND_MAESTRO3) += maestro3.o ac97_codec.o obj-$(CONFIG_SOUND_TRIDENT) += trident.o ac97_codec.o obj-$(CONFIG_SOUND_EMU10K1) += ac97_codec.o +obj-$(CONFIG_SOUND_BCM_CS4297A) += swarm_cs4297a.o obj-$(CONFIG_SOUND_RME96XX) += rme96xx.o obj-$(CONFIG_SOUND_BT878) += btaudio.o obj-$(CONFIG_SOUND_EMU10K1) += ac97_codec.o Index: swarm_cs4297a.c =================================================================== RCS file: /cvsroot/linux-mips/linux/drivers/sound/swarm_cs4297a.c,v retrieving revision 1.1 retrieving revision 1.2 diff -u -d -r1.1 -r1.2 --- swarm_cs4297a.c 2001/11/08 17:09:41 1.1 +++ swarm_cs4297a.c 2001/11/26 19:34:31 1.2 @@ -88,7 +88,6 @@ #include <asm/sibyte/sb1250_mac.h> #include <asm/sibyte/sb1250.h> #include <asm/sibyte/64bit.h> -#include <asm/sibyte/sbmips.h> struct cs4297a_state; EXPORT_NO_SYMBOLS; @@ -625,7 +624,8 @@ } memset(dma->descrtab, 0, dma->ringsz * sizeof(serdma_descr_t)); dma->descrtab_end = dma->descrtab + dma->ringsz; - dma->descrtab_phys = K0_TO_PHYS((int)dma->descrtab); + /* XXX bloddy mess, use proper DMA API here ... */ + dma->descrtab_phys = PHYSADDR((int)dma->descrtab); dma->descr_add = dma->descr_rem = dma->descrtab; /* Frame buffer area */ @@ -636,7 +636,7 @@ return -1; } memset(dma->dma_buf, 0, DMA_BUF_SIZE); - dma->dma_buf_phys = K0_TO_PHYS((int)dma->dma_buf); + dma->dma_buf_phys = PHYSADDR((int)dma->dma_buf); /* Samples buffer area */ dma->sbufsz = SAMPLE_BUF_SIZE; @@ -954,7 +954,7 @@ u16 left, right; descr_a = descr->descr_a; descr->descr_a &= ~M_DMA_SERRX_SOP; - if ((descr_a & M_DMA_DSCRA_A_ADDR) != K0_TO_PHYS((int)s_ptr)) { + if ((descr_a & M_DMA_DSCRA_A_ADDR) != PHYSADDR((int)s_ptr)) { printk(KERN_ERR "cs4297a: RX Bad address (read)\n"); } if (((data & 0x9800000000000000) != 0x9800000000000000) || @@ -1025,10 +1025,10 @@ be a buffer to process. */ do { data = *data_p; - if ((descr->descr_a & M_DMA_DSCRA_A_ADDR) != K0_TO_PHYS((int)data_p)) { + if ((descr->descr_a & M_DMA_DSCRA_A_ADDR) != PHYSADDR((int)data_p)) { printk(KERN_ERR "cs4297a: RX Bad address %d (%x %x)\n", d->swptr, (int)(descr->descr_a & M_DMA_DSCRA_A_ADDR), - (int)K0_TO_PHYS((int)data_p)); + (int)PHYSADDR((int)data_p)); } if (!(data & (1LL << 63)) || !(descr->descr_a & M_DMA_SERRX_SOP) || |
From: James S. <jsi...@us...> - 2001-11-26 19:31:50
|
Update of /cvsroot/linux-mips/linux/include/asm-mips/dec In directory usw-pr-cvs1:/tmp/cvs-serv28264/include/asm-mips/dec Added Files: interrupts.h Log Message: FP emulation for R3010-style fpus. |
From: James S. <jsi...@us...> - 2001-11-26 19:31:50
|
Update of /cvsroot/linux-mips/linux/drivers/video In directory usw-pr-cvs1:/tmp/cvs-serv28264/drivers/video Modified Files: tx3912fb.c tx3912fb.h Log Message: FP emulation for R3010-style fpus. Index: tx3912fb.c =================================================================== RCS file: /cvsroot/linux-mips/linux/drivers/video/tx3912fb.c,v retrieving revision 1.3 retrieving revision 1.4 diff -u -d -r1.3 -r1.4 --- tx3912fb.c 2001/11/13 17:10:09 1.3 +++ tx3912fb.c 2001/11/26 19:31:47 1.4 @@ -1,14 +1,14 @@ /* - * linux/drivers/video/tx3912fb.c + * drivers/video/tx3912fb.c * - * Copyright (C) 1999 Harald Koerfgen - * Copyright (C) 2001 Steven Hill (sj...@re...) + * Copyright (C) 1999 Harald Koerfgen + * Copyright (C) 2001 Steven Hill (sj...@re...) * * This file is subject to the terms and conditions of the GNU General Public * License. See the file COPYING in the main directory of this archive for * more details. * - * Framebuffer for LCD controller in TMPR3912/05 and PR31700 processors + * Framebuffer for LCD controller in TMPR3912/05 and PR31700 processors */ #include <linux/module.h> #include <linux/kernel.h> @@ -20,13 +20,15 @@ #include <linux/init.h> #include <linux/pm.h> #include <linux/fb.h> -#include <asm/bootinfo.h> -#include <asm/uaccess.h> #include <video/fbcon.h> #include <video/fbcon-mfb.h> #include <video/fbcon-cfb2.h> #include <video/fbcon-cfb4.h> #include <video/fbcon-cfb8.h> +#include <asm/io.h> +#include <asm/bootinfo.h> +#include <asm/uaccess.h> +#include <asm/tx3912.h> #include "tx3912fb.h" /* @@ -34,6 +36,9 @@ */ static struct fb_info fb_info; static struct { u_char red, green, blue, pad; } palette[256]; +#ifdef FBCON_HAS_CFB8 +static union { u16 cfb8[16]; } fbcon_cmap; +#endif static struct display global_disp; static int currcon = 0; @@ -343,49 +348,60 @@ */ int __init tx3912fb_init(void) { - /* Stop the video logic when frame completes */ - VidCtrl1 |= ENFREEZEFRAME; - IntClear1 |= INT1_LCDINT; - while (!(IntStatus1 & INT1_LCDINT)); - /* Disable the video logic */ - VidCtrl1 &= ~(ENVID | DISPON); + outl(inl(TX3912_VIDEO_CTRL1) & + ~(TX3912_VIDEO_CTRL1_ENVID | TX3912_VIDEO_CTRL1_DISPON), + TX3912_VIDEO_CTRL1); udelay(200); /* Set start address for DMA transfer */ - VidCtrl3 = tx3912fb_paddr & - (TX3912_VIDCTRL3_VIDBANK_MASK | TX3912_VIDCTRL3_VIDBASEHI_MASK); + outl(tx3912fb_paddr, TX3912_VIDEO_CTRL3); /* Set end address for DMA transfer */ - VidCtrl4 = (tx3912fb_paddr + tx3912fb_size + 1) & - TX3912_VIDCTRL4_VIDBASELO_MASK; + outl((tx3912fb_paddr + tx3912fb_size + 1), TX3912_VIDEO_CTRL4); /* Set the pixel depth */ switch (tx3912fb_info.bits_per_pixel) { case 1: /* Monochrome */ - VidCtrl1 &= ~TX3912_VIDCTRL1_BITSEL_MASK; + outl(inl(TX3912_VIDEO_CTRL1) & ~TX3912_VIDEO_CTRL1_BITSEL_MASK, + TX3912_VIDEO_CTRL1); break; case 4: /* 4-bit gray */ - VidCtrl1 &= ~TX3912_VIDCTRL1_BITSEL_MASK; - VidCtrl1 |= TX3912_VIDCTRL1_4BIT_GRAY; + outl(inl(TX3912_VIDEO_CTRL1) & ~TX3912_VIDEO_CTRL1_BITSEL_MASK, + TX3912_VIDEO_CTRL1); + outl(inl(TX3912_VIDEO_CTRL1) | + TX3912_VIDEO_CTRL1_BITSEL_4BIT_GRAY, + TX3912_VIDEO_CTRL1); break; case 8: /* 8-bit color */ - VidCtrl1 &= ~TX3912_VIDCTRL1_BITSEL_MASK; - VidCtrl1 |= TX3912_VIDCTRL1_8BIT_COLOR; + outl(inl(TX3912_VIDEO_CTRL1) & ~TX3912_VIDEO_CTRL1_BITSEL_MASK, + TX3912_VIDEO_CTRL1); + outl(inl(TX3912_VIDEO_CTRL1) | + TX3912_VIDEO_CTRL1_BITSEL_8BIT_COLOR, + TX3912_VIDEO_CTRL1); break; case 2: default: /* 2-bit gray */ - VidCtrl1 &= ~TX3912_VIDCTRL1_BITSEL_MASK; - VidCtrl1 |= TX3912_VIDCTRL1_2BIT_GRAY; + outl(inl(TX3912_VIDEO_CTRL1) & ~TX3912_VIDEO_CTRL1_BITSEL_MASK, + TX3912_VIDEO_CTRL1); + outl(inl(TX3912_VIDEO_CTRL1) | + TX3912_VIDEO_CTRL1_BITSEL_2BIT_GRAY, + TX3912_VIDEO_CTRL1); break; } + /* Enable the video clock */ + outl(inl(TX3912_CLK_CTRL) | TX3912_CLK_CTRL_ENVIDCLK, + TX3912_CLK_CTRL); + /* Unfreeze video logic and enable DF toggle */ - VidCtrl1 &= ~(ENFREEZEFRAME | DFMODE); + outl(inl(TX3912_VIDEO_CTRL1) & + ~(TX3912_VIDEO_CTRL1_ENFREEZEFRAME | TX3912_VIDEO_CTRL1_DFMODE), + TX3912_VIDEO_CTRL1); udelay(200); /* Clear the framebuffer */ @@ -393,7 +409,9 @@ udelay(200); /* Enable the video logic */ - VidCtrl1 |= (DISPON | ENVID); + outl(inl(TX3912_VIDEO_CTRL1) | + (TX3912_VIDEO_CTRL1_ENVID | TX3912_VIDEO_CTRL1_DISPON), + TX3912_VIDEO_CTRL1); strcpy(fb_info.modename, TX3912FB_NAME); fb_info.changevar = NULL; Index: tx3912fb.h =================================================================== RCS file: /cvsroot/linux-mips/linux/drivers/video/tx3912fb.h,v retrieving revision 1.3 retrieving revision 1.4 diff -u -d -r1.3 -r1.4 --- tx3912fb.h 2001/11/13 17:10:09 1.3 +++ tx3912fb.h 2001/11/26 19:31:47 1.4 @@ -1,66 +1,14 @@ /* - * linux/drivers/video/tx3912fb.h + * drivers/video/tx3912fb.h * - * Copyright (C) 2001 Steven Hill (sj...@re...) + * Copyright (C) 2001 Steven Hill (sj...@re...) * * This file is subject to the terms and conditions of the GNU General Public * License. See the file COPYING in the main directory of this archive for * more details. * - * Includes for TMPR3912/05 and PR31700 LCD controller registers + * Includes for TMPR3912/05 and PR31700 LCD controller registers */ -#include <asm/tx3912.h> - -#define VidCtrl1 REG_AT(0x028) -#define VidCtrl2 REG_AT(0x02C) -#define VidCtrl3 REG_AT(0x030) -#define VidCtrl4 REG_AT(0x034) -#define VidCtrl5 REG_AT(0x038) -#define VidCtrl6 REG_AT(0x03C) -#define VidCtrl7 REG_AT(0x040) -#define VidCtrl8 REG_AT(0x044) -#define VidCtrl9 REG_AT(0x048) -#define VidCtrl10 REG_AT(0x04C) -#define VidCtrl11 REG_AT(0x050) -#define VidCtrl12 REG_AT(0x054) -#define VidCtrl13 REG_AT(0x058) -#define VidCtrl14 REG_AT(0x05C) - -/* Video Control 1 Register */ -#define LINECNT 0xffc00000 -#define LINECNT_SHIFT 22 -#define LOADDLY BIT(21) -#define BAUDVAL (BIT(20) | BIT(19) | BIT(18) | BIT(17) | BIT(16)) -#define BAUDVAL_SHIFT 16 -#define VIDDONEVAL (BIT(15) | BIT(14) | BIT(13) | BIT(12) | BIT(11) | BIT(10) | BIT(9)) -#define VIDDONEVAL_SHIFT 9 -#define ENFREEZEFRAME BIT(8) -#define TX3912_VIDCTRL1_BITSEL_MASK 0x000000c0 -#define TX3912_VIDCTRL1_2BIT_GRAY 0x00000040 -#define TX3912_VIDCTRL1_4BIT_GRAY 0x00000080 -#define TX3912_VIDCTRL1_8BIT_COLOR 0x000000c0 -#define BITSEL_SHIFT 6 -#define DISPSPLIT BIT(5) -#define DISP8 BIT(4) -#define DFMODE BIT(3) -#define INVVID BIT(2) -#define DISPON BIT(1) -#define ENVID BIT(0) - -/* Video Control 2 Register */ -#define VIDRATE_MASK 0xffc00000 -#define VIDRATE_SHIFT 22 -#define HORZVAL_MASK 0x001ff000 -#define HORZVAL_SHIFT 12 -#define LINEVAL_MASK 0x000001ff - -/* Video Control 3 Register */ -#define TX3912_VIDCTRL3_VIDBANK_MASK 0xfff00000 -#define TX3912_VIDCTRL3_VIDBASEHI_MASK 0x000ffff0 - -/* Video Control 4 Register */ -#define TX3912_VIDCTRL4_VIDBASELO_MASK 0x000ffff0 - /* * Begin platform specific configurations |
From: James S. <jsi...@us...> - 2001-11-26 19:31:50
|
Update of /cvsroot/linux-mips/linux/drivers/char In directory usw-pr-cvs1:/tmp/cvs-serv28264/drivers/char Modified Files: Config.in serial_tx3912.c Log Message: FP emulation for R3010-style fpus. Index: Config.in =================================================================== RCS file: /cvsroot/linux-mips/linux/drivers/char/Config.in,v retrieving revision 1.26 retrieving revision 1.27 diff -u -d -r1.26 -r1.27 --- Config.in 2001/11/22 01:19:24 1.26 +++ Config.in 2001/11/26 19:31:47 1.27 @@ -59,24 +59,24 @@ tristate ' Stallion EasyIO or EC8/32 support' CONFIG_STALLION tristate ' Stallion EC8/64, ONboard, Brumby support' CONFIG_ISTALLION fi - bool ' TMPTX3912/PR31700 serial port support' CONFIG_SERIAL_TX3912 - dep_bool ' Console on TMPTX3912/PR31700 serial port' CONFIG_SERIAL_TX3912_CONSOLE $CONFIG_SERIAL_TX3912 + bool ' TX3912/PR31700 serial port support' CONFIG_SERIAL_TX3912 + dep_bool ' Console on TX3912/PR31700 serial port' CONFIG_SERIAL_TX3912_CONSOLE $CONFIG_SERIAL_TX3912 bool ' Enable Au1000 UART Support' CONFIG_AU1000_UART if [ "$CONFIG_AU1000_UART" = "y" ]; then bool ' Enable Au1000 serial console' CONFIG_AU1000_SERIAL_CONSOLE fi + bool 'TXx927 SIO support' CONFIG_TXX927_SERIAL + if [ "$CONFIG_TXX927_SERIAL" = "y" ]; then + bool 'TXx927 SIO Console support' CONFIG_TXX927_SERIAL_CONSOLE + fi if [ "$CONFIG_SIBYTE_SB1250" = "y" ]; then bool ' Support for sb1250 onchip DUART' CONFIG_SIBYTE_SB1250_DUART if [ "$CONFIG_SIBYTE_SB1250_DUART" = "y" ]; then - bool ' Console on SB1250 DUART' CONFIG_SIBYTE_SB1250_DUART_CONSOLE - int ' Output buffers size (in bytes)' CONFIG_SB1250_DUART_OUTPUT_BUF_SIZE 1024 - bool ' Leave port 1 alone (for kgdb or audio)' CONFIG_SIBYTE_SB1250_DUART_NO_PORT_1 + bool ' Console on SB1250 DUART' CONFIG_SIBYTE_SB1250_DUART_CONSOLE + int ' Output buffers size (in bytes)' CONFIG_SB1250_DUART_OUTPUT_BUF_SIZE 1024 + bool ' Leave port 1 alone (for kgdb or audio)' CONFIG_SIBYTE_SB1250_DUART_NO_PORT_1 fi fi - bool 'TXx927 SIO support' CONFIG_TXX927_SERIAL - if [ "$CONFIG_TXX927_SERIAL" = "y" ]; then - bool 'TXx927 SIO Console support' CONFIG_TXX927_SERIAL_CONSOLE - fi fi if [ "$CONFIG_EXPERIMENTAL" = "y" -a "$CONFIG_ZORRO" = "y" ]; then tristate 'Commodore A2232 serial support (EXPERIMENTAL)' CONFIG_A2232 @@ -200,9 +200,9 @@ dep_tristate 'Intel i8x0 Random Number Generator support' CONFIG_INTEL_RNG $CONFIG_PCI tristate '/dev/nvram support' CONFIG_NVRAM tristate 'Enhanced Real Time Clock Support' CONFIG_RTC -if [ "$CONFIG_RTC" = "y" -a "$CONFIG_NEW_TIME_C" = "y" ]; then - bool 'Generic Dallas PC style RTC chip support' CONFIG_DALLAS_RTC -fi +#if [ "$CONFIG_RTC" = "y" -a "$CONFIG_NEW_TIME_C" = "y" ]; then +# bool 'Generic Dallas PC style RTC chip support' CONFIG_DALLAS_RTC +#fi if [ "$CONFIG_IA64" = "y" ]; then bool 'EFI Real Time Clock Services' CONFIG_EFI_RTC fi Index: serial_tx3912.c =================================================================== RCS file: /cvsroot/linux-mips/linux/drivers/char/serial_tx3912.c,v retrieving revision 1.7 retrieving revision 1.8 diff -u -d -r1.7 -r1.8 --- serial_tx3912.c 2001/11/13 17:10:09 1.7 +++ serial_tx3912.c 2001/11/26 19:31:47 1.8 @@ -13,20 +13,13 @@ #include <linux/config.h> #include <linux/tty.h> #include <linux/major.h> -#include <linux/ptrace.h> -#include <linux/init.h> #include <linux/console.h> -#include <linux/fs.h> -#include <linux/mm.h> #include <linux/malloc.h> #include <linux/module.h> -#include <linux/delay.h> [...1339 lines suppressed...] + } + + /* Write the control registers */ + outl(ctrl2, TX3912_UARTA_CTRL2); + outl(0x00000000, TX3912_UARTA_DMA_CTRL1); + outl(0x00000000, TX3912_UARTA_DMA_CTRL2); + outl((ctrl1 | TX3912_UART_CTRL1_ENUART), TX3912_UARTA_CTRL1); + + /* Loop until the UART is on */ + while(~inl(TX3912_UARTA_CTRL1) & TX3912_UART_CTRL1_UARTON); + return 0; } @@ -1078,5 +876,4 @@ { register_console(&sercons); } - #endif |
From: James S. <jsi...@us...> - 2001-11-26 19:31:50
|
Update of /cvsroot/linux-mips/linux/arch/mips/kernel In directory usw-pr-cvs1:/tmp/cvs-serv28264/arch/mips/kernel Modified Files: entry.S Log Message: FP emulation for R3010-style fpus. Index: entry.S =================================================================== RCS file: /cvsroot/linux-mips/linux/arch/mips/kernel/entry.S,v retrieving revision 1.10 retrieving revision 1.11 diff -u -d -r1.10 -r1.11 --- entry.S 2001/11/20 17:31:04 1.10 +++ entry.S 2001/11/26 19:31:47 1.11 @@ -106,16 +106,16 @@ __INIT - /* - * General exception vector. Used for all CPUs except R4000 - * and R4400 SC and MC versions. - */ .set reorder NESTED(except_vec1_generic, 0, sp) PANIC("Exception vector 1 called") END(except_vec1_generic) + /* + * General exception vector. Used for all CPUs except R4000 + * and R4400 SC and MC versions. + */ NESTED(except_vec3_generic, 0, sp) mfc0 k1, CP0_CAUSE la k0, exception_handlers @@ -225,6 +225,7 @@ NESTED(handle_##exception, PT_SIZE, sp); \ .set noat; \ SAVE_ALL; \ + FEXPORT(handle_##exception##_int); \ __BUILD_clear_##clear(exception); \ .set at; \ __BUILD_##verbose(exception); \ |
From: James S. <jsi...@us...> - 2001-11-26 19:29:59
|
Update of /cvsroot/linux-mips/linux/include/asm-mips In directory usw-pr-cvs1:/tmp/cvs-serv27653 Modified Files: mipsregs.h Log Message: Define read_32bit_cp1_register() to access FPU control register. Index: mipsregs.h =================================================================== RCS file: /cvsroot/linux-mips/linux/include/asm-mips/mipsregs.h,v retrieving revision 1.11 retrieving revision 1.12 diff -u -d -r1.11 -r1.12 --- mipsregs.h 2001/11/19 18:00:47 1.11 +++ mipsregs.h 2001/11/26 19:29:56 1.12 @@ -508,6 +508,19 @@ :"=r" (__res)); \ __res;}) +/* + * Macros to access the floating point coprocessor control registers + */ +#define read_32bit_cp1_register(source) \ +({ int __res; \ + __asm__ __volatile__( \ + ".set\tpush\n\t" \ + ".set\treorder\n\t" \ + "cfc1\t%0,"STR(source)"\n\t" \ + ".set\tpop" \ + : "=r" (__res)); \ + __res;}) + /* TLB operations. */ static inline void tlb_probe(void) { |
From: James S. <jsi...@us...> - 2001-11-26 19:28:48
|
Update of /cvsroot/linux-mips/linux/include/asm-mips In directory usw-pr-cvs1:/tmp/cvs-serv27313 Modified Files: cpu.h Log Message: Add new pseudo FPU type FPIR_IMP_NONE standing for no fpu. Index: cpu.h =================================================================== RCS file: /cvsroot/linux-mips/linux/include/asm-mips/cpu.h,v retrieving revision 1.15 retrieving revision 1.16 diff -u -d -r1.15 -r1.16 --- cpu.h 2001/11/21 22:10:14 1.15 +++ cpu.h 2001/11/26 19:28:45 1.16 @@ -91,13 +91,24 @@ #define PRID_REV_TX3927C 0x0042 #define PRID_REV_TX39H3TEG 0x0050 +/* + * FPU implementation/revision register (CP1 control register 0). + * + * +---------------------------------+----------------+----------------+ + * | 0 | Implementation | Revision | + * +---------------------------------+----------------+----------------+ + * 31 16 15 8 7 0 + */ + +#define FPIR_IMP_NONE 0x0000 + #ifndef _LANGUAGE_ASSEMBLY /* * Capability and feature descriptor structure for MIPS CPU */ struct mips_cpu { unsigned int processor_id; - unsigned int cputype; /* Old "mips_cputype" code */ + unsigned int cputype; int isa_level; int options; int tlbsize; @@ -138,5 +149,6 @@ #define MIPS_CPU_VCE 0x00000400 /* virt. coherence conflict possible */ #define MIPS_CPU_CACHE_CDEX 0x00000800 /* Create_Dirty_Exclusive CACHE op */ #define MIPS_CPU_MCHECK 0x00001000 /* Machine check exception */ +#define MIPS_CPU_EJTAG 0x00002000 /* EJTAG exception */ #endif /* _ASM_CPU_H */ |
From: James S. <jsi...@us...> - 2001-11-26 19:27:17
|
Update of /cvsroot/linux-mips/linux/arch/mips/sibyte/swarm In directory usw-pr-cvs1:/tmp/cvs-serv26928/swarm Modified Files: setup.c Log Message: Rewrite to work without sbmips.h & co. Index: setup.c =================================================================== RCS file: /cvsroot/linux-mips/linux/arch/mips/sibyte/swarm/setup.c,v retrieving revision 1.1 retrieving revision 1.2 diff -u -d -r1.1 -r1.2 --- setup.c 2001/11/08 17:42:08 1.1 +++ setup.c 2001/11/26 19:27:14 1.2 @@ -26,6 +26,7 @@ #include <linux/bootmem.h> #include <linux/blk.h> #include <asm/irq.h> +#include <asm/io.h> #include <asm/bootinfo.h> #include <asm/addrspace.h> #include <asm/sibyte/swarm.h> @@ -34,6 +35,7 @@ #include <asm/sibyte/sb1250_regs.h> #include <asm/reboot.h> #include <linux/ide.h> + #include "cfe_xiocb.h" #include "cfe_api.h" #include "cfe_error.h" @@ -173,9 +175,6 @@ while(1); } } - - -extern unsigned long mips_io_port_base; void __init swarm_setup(void) { |
From: James S. <jsi...@us...> - 2001-11-26 19:27:17
|
Update of /cvsroot/linux-mips/linux/arch/mips/sibyte/sb1250 In directory usw-pr-cvs1:/tmp/cvs-serv26928/sb1250 Modified Files: lib_hssubr.S pci.c Log Message: Rewrite to work without sbmips.h & co. Index: lib_hssubr.S =================================================================== RCS file: /cvsroot/linux-mips/linux/arch/mips/sibyte/sb1250/lib_hssubr.S,v retrieving revision 1.2 retrieving revision 1.3 diff -u -d -r1.2 -r1.3 --- lib_hssubr.S 2001/11/19 17:58:52 1.2 +++ lib_hssubr.S 2001/11/26 19:27:14 1.3 @@ -15,10 +15,10 @@ * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ - -#include <asm/sibyte/sb1250_defs.h> -#include <asm/sibyte/sbmips.h> #include <asm/asm.h> +#include <asm/addrspace.h> +#include <asm/mipsregs.h> +#include <asm/regdef.h> .set mips64 @@ -31,19 +31,19 @@ LEAF(hs_read8) - mfc0 t2,C0_SR - or t1,t2,M_SR_KX - mtc0 t1,C0_SR + mfc0 t2, CP0_STATUS + or t1, t2, ST0_KX + mtc0 t1, CP0_STATUS HAZARD - dli v0,PHYS_TO_XKSEG_UNCACHED(0) - dsll a0,a0,32 - dsrl a0,a0,32 - or a0,a0,v0 - lb v0,(a0) - and v0,0xFF + dli v0, PHYS_TO_XKSEG_UNCACHED(0) + dsll a0, a0, 32 + dsrl a0, a0, 32 + or a0, a0,v0 + lb v0, (a0) + and v0, 0xFF - mtc0 t2,C0_SR + mtc0 t2, CP0_STATUS HAZARD j ra END(hs_read8) @@ -53,19 +53,19 @@ ********************************************************************* */ LEAF(hs_read16) - mfc0 t2,C0_SR - or t1,t2,M_SR_KX - mtc0 t1,C0_SR + mfc0 t2, CP0_STATUS + or t1, t2, ST0_KX + mtc0 t1, CP0_STATUS HAZARD - dli v0,PHYS_TO_XKSEG_UNCACHED(0) - dsll a0,a0,32 - dsrl a0,a0,32 - or a0,a0,v0 - lh v0,(a0) - and v0,0xFFFF + dli v0, PHYS_TO_XKSEG_UNCACHED(0) + dsll a0, a0, 32 + dsrl a0, a0, 32 + or a0, a0, v0 + lh v0, (a0) + and v0, 0xFFFF - mtc0 t2,C0_SR + mtc0 t2, CP0_STATUS HAZARD j ra END(hs_read16) @@ -75,19 +75,19 @@ ********************************************************************* */ LEAF(hs_read32) - mfc0 t2,C0_SR - or t1,t2,M_SR_KX - mtc0 t1,C0_SR + mfc0 t2, CP0_STATUS + or t1, t2, ST0_KX + mtc0 t1, CP0_STATUS HAZARD - dli v0,PHYS_TO_XKSEG_UNCACHED(0) - dsll a0,a0,32 - dsrl a0,a0,32 - or a0,a0,v0 - lw v0,(a0) - and v0,0xFFFFFFFF + dli v0, PHYS_TO_XKSEG_UNCACHED(0) + dsll a0, a0, 32 + dsrl a0, a0, 32 + or a0, a0, v0 + lw v0, (a0) + and v0, 0xFFFFFFFF - mtc0 t2,C0_SR + mtc0 t2, CP0_STATUS HAZARD j ra END(hs_read32) @@ -97,18 +97,18 @@ ********************************************************************* */ LEAF(hs_read64) - mfc0 t2,C0_SR - or t1,t2,M_SR_KX - mtc0 t1,C0_SR + mfc0 t2, CP0_STATUS + or t1, t2, ST0_KX + mtc0 t1, CP0_STATUS HAZARD - dli v0,PHYS_TO_XKSEG_UNCACHED(0) - dsll a0,a0,32 - dsrl a0,a0,32 - or a0,a0,v0 - ld v0,(a0) + dli v0, PHYS_TO_XKSEG_UNCACHED(0) + dsll a0, a0, 32 + dsrl a0, a0, 32 + or a0, a0, v0 + ld v0, (a0) - mtc0 t2,C0_SR + mtc0 t2, CP0_STATUS HAZARD j ra END(hs_read64) @@ -118,18 +118,18 @@ ********************************************************************* */ LEAF(hs_write8) - mfc0 t2,C0_SR - or t1,t2,M_SR_KX - mtc0 t1,C0_SR + mfc0 t2, CP0_STATUS + or t1, t2, ST0_KX + mtc0 t1, CP0_STATUS HAZARD - dli v0,PHYS_TO_XKSEG_UNCACHED(0) - dsll a0,a0,32 - dsrl a0,a0,32 - or a0,a0,v0 - sb a1,(a0) + dli v0, PHYS_TO_XKSEG_UNCACHED(0) + dsll a0, a0, 32 + dsrl a0, a0, 32 + or a0, a0, v0 + sb a1, (a0) - mtc0 t2,C0_SR + mtc0 t2, CP0_STATUS HAZARD j ra END(hs_write8) @@ -139,18 +139,18 @@ ********************************************************************* */ LEAF(hs_write16) - mfc0 t2,C0_SR - or t1,t2,M_SR_KX - mtc0 t1,C0_SR + mfc0 t2, CP0_STATUS + or t1, t2, ST0_KX + mtc0 t1, CP0_STATUS HAZARD - dli v0,PHYS_TO_XKSEG_UNCACHED(0) - dsll a0,a0,32 - dsrl a0,a0,32 - or a0,a0,v0 - sh a1,(a0) + dli v0, PHYS_TO_XKSEG_UNCACHED(0) + dsll a0, a0, 32 + dsrl a0, a0, 32 + or a0, a0, v0 + sh a1, (a0) - mtc0 t2,C0_SR + mtc0 t2, CP0_STATUS HAZARD j ra END(hs_write16) @@ -160,18 +160,18 @@ ********************************************************************* */ LEAF(hs_write32) - mfc0 t2,C0_SR - or t1,t2,M_SR_KX - mtc0 t1,C0_SR + mfc0 t2, CP0_STATUS + or t1, t2, ST0_KX + mtc0 t1, CP0_STATUS HAZARD - dli v0,PHYS_TO_XKSEG_UNCACHED(0) - dsll a0,a0,32 - dsrl a0,a0,32 - or a0,a0,v0 - sw a1,(a0) + dli v0, PHYS_TO_XKSEG_UNCACHED(0) + dsll a0, a0, 32 + dsrl a0, a0, 32 + or a0, a0, v0 + sw a1, (a0) - mtc0 t2,C0_SR + mtc0 t2, CP0_STATUS HAZARD j ra END(hs_write32) @@ -181,18 +181,18 @@ ********************************************************************* */ LEAF(hs_write64) - mfc0 t2,C0_SR - or t1,t2,M_SR_KX - mtc0 t1,C0_SR + mfc0 t2, CP0_STATUS + or t1, t2, ST0_KX + mtc0 t1, CP0_STATUS HAZARD - dli v0,PHYS_TO_XKSEG_UNCACHED(0) - dsll a0,a0,32 - dsrl a0,a0,32 - or a0,a0,v0 - sd a1,(a0) + dli v0, PHYS_TO_XKSEG_UNCACHED(0) + dsll a0, a0, 32 + dsrl a0, a0, 32 + or a0, a0, v0 + sd a1, (a0) - mtc0 t2,C0_SR + mtc0 t2, CP0_STATUS HAZARD j ra END(hs_write64) Index: pci.c =================================================================== RCS file: /cvsroot/linux-mips/linux/arch/mips/sibyte/sb1250/pci.c,v retrieving revision 1.2 retrieving revision 1.3 diff -u -d -r1.2 -r1.3 --- pci.c 2001/11/21 22:07:56 1.2 +++ pci.c 2001/11/26 19:27:14 1.3 @@ -45,6 +45,8 @@ #include <asm/sibyte/sb1250_defs.h> #include <asm/sibyte/sb1250_regs.h> #include <asm/sibyte/sb1250_pci.h> +#include <asm/io.h> + #include "lib_hssubr.h" /* @@ -80,8 +82,6 @@ * combination that works correctly with most of Linux's drivers. */ -extern unsigned long mips_io_port_base; - #define PCI_BUS_ENABLED 1 #define LDT_BUS_ENABLED 2 @@ -255,8 +255,7 @@ * big-endian Linuxes will have CONFIG_SWAP_IO_SPACE set. */ - mips_io_port_base = - (unsigned long) ioremap(A_PHYS_LDTPCI_IO_MATCH_BYTES, 65536); + set_io_port_base(ioremap(A_PHYS_LDTPCI_IO_MATCH_BYTES, 65536)); /* * Also check the LDT bridge's enable, just in case we didn't |