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[rvm-commits] SF.net SVN: jikesrvm:[15269] rvmroot/branches/RVM-PureNativeThread/ workingMergeUp/rvm/src
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From: <cap...@us...> - 2009-01-09 18:06:32
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Revision: 15269
http://jikesrvm.svn.sourceforge.net/jikesrvm/?rev=15269&view=rev
Author: captain5050
Date: 2009-01-09 18:06:22 +0000 (Fri, 09 Jan 2009)
Log Message:
-----------
Start of merge with trunk at r15258
Modified Paths:
--------------
rvmroot/branches/RVM-PureNativeThread/workingMergeUp/rvm/src/org/jikesrvm/compilers/common/RuntimeCompiler.java
rvmroot/branches/RVM-PureNativeThread/workingMergeUp/rvm/src/org/jikesrvm/osr/OSRProfiler.java
rvmroot/branches/RVM-PureNativeThread/workingMergeUp/rvm/src/org/jikesrvm/osr/ia32/BaselineExecutionStateExtractor.java
rvmroot/branches/RVM-PureNativeThread/workingMergeUp/rvm/src/org/jikesrvm/osr/ia32/CodeInstaller.java
rvmroot/branches/RVM-PureNativeThread/workingMergeUp/rvm/src/org/jikesrvm/osr/ppc/CodeInstaller.java
rvmroot/branches/RVM-PureNativeThread/workingMergeUp/rvm/src-generated/ia32-assembler/Assembler.in
rvmroot/branches/RVM-PureNativeThread/workingMergeUp/rvm/src-generated/ia32-assembler/genAssembler.sh
rvmroot/branches/RVM-PureNativeThread/workingMergeUp/rvm/src-generated/ia32-assembler-opt/VM.fake
rvmroot/branches/RVM-PureNativeThread/workingMergeUp/rvm/src-generated/opt-burs/ia32/IA32.rules
rvmroot/branches/RVM-PureNativeThread/workingMergeUp/rvm/src-generated/opt-burs/ia32/IA32_SSE2.rules
rvmroot/branches/RVM-PureNativeThread/workingMergeUp/rvm/src-generated/opt-burs/ppc/PPC_Common.rules
rvmroot/branches/RVM-PureNativeThread/workingMergeUp/rvm/src-generated/opt-ir/ia32/OperatorList.dat
rvmroot/branches/RVM-PureNativeThread/workingMergeUp/rvm/src-generated/options/BooleanOptions.opt.dat
rvmroot/branches/RVM-PureNativeThread/workingMergeUp/rvm/src-generated/options/MasterOptions.template
rvmroot/branches/RVM-PureNativeThread/workingMergeUp/rvm/src-generated/options/OptOptions.template
rvmroot/branches/RVM-PureNativeThread/workingMergeUp/rvm/src-generated/options/ValueOptions.aos.dat
rvmroot/branches/RVM-PureNativeThread/workingMergeUp/rvm/src-generated/options/ValueOptions.opt.dat
Modified: rvmroot/branches/RVM-PureNativeThread/workingMergeUp/rvm/src/org/jikesrvm/compilers/common/RuntimeCompiler.java
===================================================================
--- rvmroot/branches/RVM-PureNativeThread/workingMergeUp/rvm/src/org/jikesrvm/compilers/common/RuntimeCompiler.java 2009-01-09 18:04:16 UTC (rev 15268)
+++ rvmroot/branches/RVM-PureNativeThread/workingMergeUp/rvm/src/org/jikesrvm/compilers/common/RuntimeCompiler.java 2009-01-09 18:06:22 UTC (rev 15269)
@@ -141,8 +141,8 @@
compiledMethod.getCompilationTime());
if (VM.BuildForAdaptiveSystem) {
- if (AOSLogging.booted()) {
- AOSLogging.recordUpdatedCompilationRates(compiler,
+ if (AOSLogging.logger.booted()) {
+ AOSLogging.logger.recordUpdatedCompilationRates(compiler,
method,
method.getBytecodeLength(),
totalBCLength[compiler],
@@ -699,7 +699,7 @@
CompilerAdviceAttribute attr = CompilerAdviceAttribute.getCompilerAdviceInfo(method);
if (attr.getCompiler() != CompiledMethod.OPT) {
cm = fallback(method);
- AOSLogging.recordCompileTime(cm, 0.0);
+ AOSLogging.logger.recordCompileTime(cm, 0.0);
return cm;
}
int newCMID = -2;
@@ -712,13 +712,13 @@
// we don't have to use: if (Controller.options.sampling())
compPlan = Controller.recompilationStrategy.createCompilationPlan(method, attr.getOptLevel(), null);
}
- AOSLogging.recompilationStarted(compPlan);
+ AOSLogging.logger.recompilationStarted(compPlan);
newCMID = recompileWithOpt(compPlan);
cm = newCMID == -1 ? null : CompiledMethods.getCompiledMethod(newCMID);
if (newCMID == -1) {
- AOSLogging.recompilationAborted(compPlan);
+ AOSLogging.logger.recompilationAborted(compPlan);
} else if (newCMID > 0) {
- AOSLogging.recompilationCompleted(compPlan);
+ AOSLogging.logger.recompilationCompleted(compPlan);
}
if (cm == null) { // if recompilation is aborted
cm = baselineCompile(method);
@@ -748,7 +748,7 @@
.enabled) {
AOSGenerator.baseCompilationCompleted(cm);
}
- AOSLogging.recordCompileTime(cm, 0.0);
+ AOSLogging.logger.recordCompileTime(cm, 0.0);
return cm;
} else {
return baselineCompile(method);
Modified: rvmroot/branches/RVM-PureNativeThread/workingMergeUp/rvm/src/org/jikesrvm/osr/OSRProfiler.java
===================================================================
--- rvmroot/branches/RVM-PureNativeThread/workingMergeUp/rvm/src/org/jikesrvm/osr/OSRProfiler.java 2009-01-09 18:04:16 UTC (rev 15268)
+++ rvmroot/branches/RVM-PureNativeThread/workingMergeUp/rvm/src/org/jikesrvm/osr/OSRProfiler.java 2009-01-09 18:06:22 UTC (rev 15269)
@@ -131,8 +131,8 @@
cmplplan.options.OSR_GUARDED_INLINING = savedOsr;
if (newcmid != -1) {
- AOSLogging.debug("recompiling state with opt succeeded " + state.cmid);
- AOSLogging.debug("new cmid " + newcmid);
+ AOSLogging.logger.debug("recompiling state with opt succeeded " + state.cmid);
+ AOSLogging.logger.debug("new cmid " + newcmid);
// transfer hotness to the new cmid
double oldSamples = Controller.methodSamples.getData(state.cmid);
Modified: rvmroot/branches/RVM-PureNativeThread/workingMergeUp/rvm/src/org/jikesrvm/osr/ia32/BaselineExecutionStateExtractor.java
===================================================================
--- rvmroot/branches/RVM-PureNativeThread/workingMergeUp/rvm/src/org/jikesrvm/osr/ia32/BaselineExecutionStateExtractor.java 2009-01-09 18:04:16 UTC (rev 15268)
+++ rvmroot/branches/RVM-PureNativeThread/workingMergeUp/rvm/src/org/jikesrvm/osr/ia32/BaselineExecutionStateExtractor.java 2009-01-09 18:06:22 UTC (rev 15269)
@@ -197,6 +197,11 @@
Word content = Magic.getWordAtOffset(stack, vOffset.minus(BYTES_IN_ADDRESS));
VM.sysWrite("0x", vOffset.minus(BYTES_IN_ADDRESS), " 0x");
VM.sysWriteln(content);
+ if ((types[i] == LongTypeCode) || (types[i] == DoubleTypeCode)) {
+ content = Magic.getWordAtOffset(stack, vOffset.minus(2 * BYTES_IN_ADDRESS));
+ VM.sysWrite("0x", vOffset.minus(2 * BYTES_IN_ADDRESS), " 0x");
+ VM.sysWriteln(content);
+ }
}
switch (types[i]) {
Modified: rvmroot/branches/RVM-PureNativeThread/workingMergeUp/rvm/src/org/jikesrvm/osr/ia32/CodeInstaller.java
===================================================================
--- rvmroot/branches/RVM-PureNativeThread/workingMergeUp/rvm/src/org/jikesrvm/osr/ia32/CodeInstaller.java 2009-01-09 18:04:16 UTC (rev 15268)
+++ rvmroot/branches/RVM-PureNativeThread/workingMergeUp/rvm/src/org/jikesrvm/osr/ia32/CodeInstaller.java 2009-01-09 18:06:22 UTC (rev 15269)
@@ -135,7 +135,7 @@
Memory.sync(bridgeaddr, thread.bridgeInstructions.length() << LG_INSTRUCTION_WIDTH);
- AOSLogging.logOsrEvent("OSR code installation succeeded");
+ AOSLogging.logger.logOsrEvent("OSR code installation succeeded");
return true;
}
Modified: rvmroot/branches/RVM-PureNativeThread/workingMergeUp/rvm/src/org/jikesrvm/osr/ppc/CodeInstaller.java
===================================================================
--- rvmroot/branches/RVM-PureNativeThread/workingMergeUp/rvm/src/org/jikesrvm/osr/ppc/CodeInstaller.java 2009-01-09 18:04:16 UTC (rev 15268)
+++ rvmroot/branches/RVM-PureNativeThread/workingMergeUp/rvm/src/org/jikesrvm/osr/ppc/CodeInstaller.java 2009-01-09 18:06:22 UTC (rev 15269)
@@ -129,7 +129,7 @@
Memory.sync(bridgeaddr, thread.bridgeInstructions.length() << LG_INSTRUCTION_WIDTH);
- AOSLogging.logOsrEvent("OSR code installation succeeded");
+ AOSLogging.logger.logOsrEvent("OSR code installation succeeded");
return true;
}
Modified: rvmroot/branches/RVM-PureNativeThread/workingMergeUp/rvm/src-generated/ia32-assembler/Assembler.in
===================================================================
--- rvmroot/branches/RVM-PureNativeThread/workingMergeUp/rvm/src-generated/ia32-assembler/Assembler.in 2009-01-09 18:04:16 UTC (rev 15268)
+++ rvmroot/branches/RVM-PureNativeThread/workingMergeUp/rvm/src-generated/ia32-assembler/Assembler.in 2009-01-09 18:06:22 UTC (rev 15269)
@@ -2085,39 +2085,6 @@
////////////////////////////////////////////
/**
- * XOR XMM register with other XMM register treating sub-words as floats
- * <PRE>
- * dstReg ^= srcReg
- * </PRE>
- */
- @Inline(value=Inline.When.ArgumentsAreConstant, arguments={1,2})
- public final void emitXORPS_Reg_Reg(XMM dstReg, XMM srcReg) {
- int miStart = mi;
- generateREXprefix(false, srcReg, null, dstReg);
- setMachineCodes(mi++, (byte) 0x0F);
- setMachineCodes(mi++, (byte) 0x57);
- emitRegRegOperands(dstReg, srcReg);
- if (lister != null) lister.RR(miStart, "XORPS", dstReg, srcReg);
- }
-
- /**
- * XOR XMM register with other XMM register treating sub-words as doubles
- * <PRE>
- * dstReg ^= srcReg
- * </PRE>
- */
- @Inline(value=Inline.When.ArgumentsAreConstant, arguments={1,2})
- public final void emitXORPD_Reg_Reg(XMM dstReg, XMM srcReg) {
- int miStart = mi;
- generateREXprefix(false, srcReg, null, dstReg);
- setMachineCodes(mi++, (byte) 0x66);
- setMachineCodes(mi++, (byte) 0x0F);
- setMachineCodes(mi++, (byte) 0x57);
- emitRegRegOperands(dstReg, srcReg);
- if (lister != null) lister.RR(miStart, "XORPD", dstReg, srcReg);
- }
-
- /**
* Empty MMX technology state
* <PRE>
* emms
Modified: rvmroot/branches/RVM-PureNativeThread/workingMergeUp/rvm/src-generated/ia32-assembler/genAssembler.sh
===================================================================
--- rvmroot/branches/RVM-PureNativeThread/workingMergeUp/rvm/src-generated/ia32-assembler/genAssembler.sh 2009-01-09 18:04:16 UTC (rev 15268)
+++ rvmroot/branches/RVM-PureNativeThread/workingMergeUp/rvm/src-generated/ia32-assembler/genAssembler.sh 2009-01-09 18:06:22 UTC (rev 15269)
@@ -2440,7 +2440,7 @@
public final void emit${acronym}_Reg (GPR reg) {
int miStart = mi;
generateREXprefix(false, null, null, reg);
- setMachineCodes(mi++, (byte) ($regCode + reg.value()));
+ setMachineCodes(mi++, (byte) ($regCode + reg.valueForOpcode()));
if (lister != null) lister.R(miStart, "${acronym}", reg);
}
@@ -2948,6 +2948,14 @@
emitSSE2Op none none PSRLQ 0xD3 none none MM MM
emitSSE2Op 0x66 none PSLLQ 0xF3 none
emitSSE2Op 0x66 none PSRLQ 0xD3 none
+emitSSE2Op none none ANDPS 0x54 none
+emitSSE2Op 0x66 none ANDPD 0x54 none
+emitSSE2Op none none ANDNPS 0x55 none
+emitSSE2Op 0x66 none ANDNPD 0x55 none
+emitSSE2Op none none ORPS 0x56 none
+emitSSE2Op 0x66 none ORPD 0x56 none
+emitSSE2Op none none XORPS 0x57 none
+emitSSE2Op 0x66 none XORPD 0x57 none
emitFloatMemAcc() {
local acronym=$1
Modified: rvmroot/branches/RVM-PureNativeThread/workingMergeUp/rvm/src-generated/ia32-assembler-opt/VM.fake
===================================================================
--- rvmroot/branches/RVM-PureNativeThread/workingMergeUp/rvm/src-generated/ia32-assembler-opt/VM.fake 2009-01-09 18:04:16 UTC (rev 15268)
+++ rvmroot/branches/RVM-PureNativeThread/workingMergeUp/rvm/src-generated/ia32-assembler-opt/VM.fake 2009-01-09 18:06:22 UTC (rev 15269)
@@ -29,4 +29,6 @@
public static void sysWrite(String s) { }
public static boolean buildFor32Addr() { return true; }
+
+ public static boolean buildForSSE2() { return true; }
}
Modified: rvmroot/branches/RVM-PureNativeThread/workingMergeUp/rvm/src-generated/opt-burs/ia32/IA32.rules
===================================================================
--- rvmroot/branches/RVM-PureNativeThread/workingMergeUp/rvm/src-generated/opt-burs/ia32/IA32.rules 2009-01-09 18:04:16 UTC (rev 15268)
+++ rvmroot/branches/RVM-PureNativeThread/workingMergeUp/rvm/src-generated/opt-burs/ia32/IA32.rules 2009-01-09 18:06:22 UTC (rev 15269)
@@ -1579,6 +1579,19 @@
EMIT(CPOS(P(p), MIR_Move.create(IA32_MOV, new RegisterOperand(lr, TypeReference.Int), IC(0))));
#####
+# ADDR_2LONG
+#####
+r: ADDR_2LONG(r)
+33
+EMIT_INSTRUCTION
+INT_2LONG(P(p), Unary.getResult(P(p)), Unary.getVal(P(p)), false);
+
+r: ADDR_2LONG(load32)
+38
+EMIT_INSTRUCTION
+INT_2LONG(P(p), Unary.getResult(P(p)), consumeMO(), false);
+
+#####
# LONG_2INT
#####
r: LONG_2INT(r)
Modified: rvmroot/branches/RVM-PureNativeThread/workingMergeUp/rvm/src-generated/opt-burs/ia32/IA32_SSE2.rules
===================================================================
--- rvmroot/branches/RVM-PureNativeThread/workingMergeUp/rvm/src-generated/opt-burs/ia32/IA32_SSE2.rules 2009-01-09 18:04:16 UTC (rev 15268)
+++ rvmroot/branches/RVM-PureNativeThread/workingMergeUp/rvm/src-generated/opt-burs/ia32/IA32_SSE2.rules 2009-01-09 18:06:22 UTC (rev 15269)
@@ -28,15 +28,10 @@
# ADD
#####
r: FLOAT_ADD(r, r)
-p.child1.isREGISTERNode() ? 11 : 13
+13
EMIT_INSTRUCTION
SSE2_COP(IA32_ADDSS, P(p), Binary.getResult(P(p)), Binary.getVal1(P(p)), Binary.getVal2(P(p)));
-r: FLOAT_ADD(r, r)
-p.child2.isREGISTERNode() ? 11 : 13
-EMIT_INSTRUCTION
-SSE2_COP(IA32_ADDSS, P(p), Binary.getResult(P(p)), Binary.getVal2(P(p)), Binary.getVal1(P(p)));
-
r: FLOAT_ADD(r, float_load)
15
EMIT_INSTRUCTION
@@ -48,13 +43,8 @@
SSE2_COP(IA32_ADDSS, P(p), Binary.getResult(P(p)), Binary.getVal2(P(p)), consumeMO());
r: DOUBLE_ADD(r, r)
-p.child1.isREGISTERNode() ? 11 : 13
+13
EMIT_INSTRUCTION
-SSE2_COP(IA32_ADDSD, P(p), Binary.getResult(P(p)), Binary.getVal1(P(p)), Binary.getVal2(P(p)));
-
-r: DOUBLE_ADD(r, r)
-p.child2.isREGISTERNode() ? 11 : 13
-EMIT_INSTRUCTION
SSE2_COP(IA32_ADDSD, P(p), Binary.getResult(P(p)), Binary.getVal2(P(p)), Binary.getVal1(P(p)));
r: DOUBLE_ADD(r, double_load)
@@ -94,15 +84,10 @@
# MUL
#####
r: FLOAT_MUL(r, r)
-p.child1.isREGISTERNode() ? 11 : 13
+13
EMIT_INSTRUCTION
SSE2_COP(IA32_MULSS, P(p), Binary.getResult(P(p)), Binary.getVal1(P(p)), Binary.getVal2(P(p)));
-r: FLOAT_MUL(r, r)
-p.child2.isREGISTERNode() ? 11 : 13
-EMIT_INSTRUCTION
-SSE2_COP(IA32_MULSS, P(p), Binary.getResult(P(p)), Binary.getVal2(P(p)), Binary.getVal1(P(p)));
-
r: FLOAT_MUL(r, float_load)
15
EMIT_INSTRUCTION
@@ -114,15 +99,10 @@
SSE2_COP(IA32_MULSS, P(p), Binary.getResult(P(p)), Binary.getVal2(P(p)), consumeMO());
r: DOUBLE_MUL(r, r)
-p.child1.isREGISTERNode() ? 11 : 13
+13
EMIT_INSTRUCTION
SSE2_COP(IA32_MULSD, P(p), Binary.getResult(P(p)), Binary.getVal1(P(p)), Binary.getVal2(P(p)));
-r: DOUBLE_MUL(r, r)
-p.child2.isREGISTERNode() ? 11 : 13
-EMIT_INSTRUCTION
-SSE2_COP(IA32_MULSD, P(p), Binary.getResult(P(p)), Binary.getVal2(P(p)), Binary.getVal1(P(p)));
-
r: DOUBLE_MUL(r, double_load)
15
EMIT_INSTRUCTION
@@ -162,12 +142,12 @@
r: FLOAT_NEG(r)
26
EMIT_INSTRUCTION
-SSE2_NEG(IA32_XORPS, IA32_SUBSS, P(p), Unary.getResult(P(p)), Unary.getVal(P(p)));
+SSE2_NEG(true, P(p), Unary.getResult(P(p)), Unary.getVal(P(p)));
r: DOUBLE_NEG(r)
26
EMIT_INSTRUCTION
-SSE2_NEG(IA32_XORPD, IA32_SUBSD, P(p), Unary.getResult(P(p)), Unary.getVal(P(p)));
+SSE2_NEG(false, P(p), Unary.getResult(P(p)), Unary.getVal(P(p)));
#####
# SQRT
@@ -457,6 +437,151 @@
IfCmp.getCond(P(p)).flipOperands(); \
SSE2_IFCMP(IA32_UCOMISD, P(p), IfCmp.getClearVal2(P(p)), consumeMO());
+#####
+# FCMP_CMOV
+#####
+r: FCMP_CMOV(r, OTHER_OPERAND(r, any))
+13*2
+EMIT_INSTRUCTION
+EMIT(CPOS(P(p), MIR_Compare.create(CondMove.getVal1(P(p)).isFloat() ? IA32_UCOMISS : IA32_UCOMISD, \
+ CondMove.getVal1(P(p)), CondMove.getVal2(P(p))))); \
+CMOV_MOV(P(p), CondMove.getResult(P(p)), CondMove.getCond(P(p)).translateUNSIGNED(), \
+ CondMove.getTrueValue(P(p)), CondMove.getFalseValue(P(p)));
+
+r: FCMP_CMOV(r, OTHER_OPERAND(float_load, any))
+13+15
+EMIT_INSTRUCTION
+EMIT(CPOS(P(p), MIR_Compare.create(IA32_UCOMISS, CondMove.getVal1(P(p)), consumeMO()))); \
+CMOV_MOV(P(p), CondMove.getResult(P(p)), CondMove.getCond(P(p)).translateUNSIGNED(), \
+ CondMove.getTrueValue(P(p)), CondMove.getFalseValue(P(p)));
+
+r: FCMP_CMOV(r, OTHER_OPERAND(double_load, any))
+13+15
+EMIT_INSTRUCTION
+EMIT(CPOS(P(p), MIR_Compare.create(IA32_UCOMISD, CondMove.getVal1(P(p)), consumeMO()))); \
+CMOV_MOV(P(p), CondMove.getResult(P(p)), CondMove.getCond(P(p)).translateUNSIGNED(), \
+ CondMove.getTrueValue(P(p)), CondMove.getFalseValue(P(p)));
+
+r: FCMP_CMOV(float_load, OTHER_OPERAND(r, any))
+13+15
+EMIT_INSTRUCTION
+CondMove.getCond(P(p)).flipOperands(); \
+EMIT(CPOS(P(p), MIR_Compare.create(IA32_UCOMISS, CondMove.getVal1(P(p)), consumeMO()))); \
+CMOV_MOV(P(p), CondMove.getResult(P(p)), CondMove.getCond(P(p)).translateUNSIGNED(), \
+ CondMove.getTrueValue(P(p)), CondMove.getFalseValue(P(p)));
+
+r: FCMP_CMOV(double_load, OTHER_OPERAND(r, any))
+13+15
+EMIT_INSTRUCTION
+CondMove.getCond(P(p)).flipOperands(); \
+EMIT(CPOS(P(p), MIR_Compare.create(IA32_UCOMISD, CondMove.getVal1(P(p)), consumeMO()))); \
+CMOV_MOV(P(p), CondMove.getResult(P(p)), CondMove.getCond(P(p)).translateUNSIGNED(), \
+ CondMove.getTrueValue(P(p)), CondMove.getFalseValue(P(p)));
+
+#####
+# FCMP_FCMOV
+#####
+r: FCMP_FCMOV(r, OTHER_OPERAND(r, any))
+13*4
+EMIT_INSTRUCTION
+SSE2_FCMP_FCMOV(P(p), CondMove.getResult(P(p)), CondMove.getVal1(P(p)), CondMove.getVal2(P(p)), \
+ CondMove.getCond(P(p)), CondMove.getTrueValue(P(p)), CondMove.getFalseValue(P(p)));
+
+r: FCMP_FCMOV(r, OTHER_OPERAND(r, OTHER_OPERAND(r, float_load)))
+15+13*3
+EMIT_INSTRUCTION
+SSE2_FCMP_FCMOV(P(p), CondMove.getResult(P(p)), CondMove.getVal1(P(p)), CondMove.getVal2(P(p)), \
+ CondMove.getCond(P(p)), CondMove.getTrueValue(P(p)), consumeMO());
+
+r: FCMP_FCMOV(r, OTHER_OPERAND(r, OTHER_OPERAND(r, double_load)))
+15+13*3
+EMIT_INSTRUCTION
+SSE2_FCMP_FCMOV(P(p), CondMove.getResult(P(p)), CondMove.getVal1(P(p)), CondMove.getVal2(P(p)), \
+ CondMove.getCond(P(p)), CondMove.getTrueValue(P(p)), consumeMO());
+
+r: FCMP_FCMOV(r, OTHER_OPERAND(r, OTHER_OPERAND(float_load, r)))
+15+13*3
+EMIT_INSTRUCTION
+SSE2_FCMP_FCMOV(P(p), CondMove.getResult(P(p)), CondMove.getVal1(P(p)), CondMove.getVal2(P(p)), \
+ CondMove.getCond(P(p)), consumeMO(), CondMove.getFalseValue(P(p)));
+
+r: FCMP_FCMOV(r, OTHER_OPERAND(r, OTHER_OPERAND(double_load, r)))
+15+13*3
+EMIT_INSTRUCTION
+SSE2_FCMP_FCMOV(P(p), CondMove.getResult(P(p)), CondMove.getVal1(P(p)), CondMove.getVal2(P(p)), \
+ CondMove.getCond(P(p)), consumeMO(), CondMove.getFalseValue(P(p)));
+
+r: FCMP_FCMOV(r, OTHER_OPERAND(float_load, any))
+SSE2_CMP_OP(CondMove.getCond(P(p)), true) != null ? 15+13*3 : INFINITE
+EMIT_INSTRUCTION
+SSE2_FCMP_FCMOV(P(p), CondMove.getResult(P(p)), CondMove.getVal1(P(p)), consumeMO(), \
+ CondMove.getCond(P(p)), CondMove.getFalseValue(P(p)), CondMove.getTrueValue(P(p)));
+
+r: FCMP_FCMOV(r, OTHER_OPERAND(double_load, any))
+SSE2_CMP_OP(CondMove.getCond(P(p)), false) != null ? 15+13*3 : INFINITE
+EMIT_INSTRUCTION
+SSE2_FCMP_FCMOV(P(p), CondMove.getResult(P(p)), CondMove.getVal1(P(p)), consumeMO(), \
+ CondMove.getCond(P(p)), CondMove.getFalseValue(P(p)), CondMove.getTrueValue(P(p)));
+
+#####
+# Absolute
+#####
+# x > 0 ? x : -x
+r: FCMP_FCMOV(r, OTHER_OPERAND(MATERIALIZE_FP_CONSTANT(INT_CONSTANT), OTHER_OPERAND(r, FLOAT_NEG(r))))
+IS_MATERIALIZE_ZERO(PRL(p)) && SSE2_IS_GT_OR_GE(CondMove.getCond(P(p))) && \
+SIMILAR_REGISTERS(CondMove.getVal1(P(p)), CondMove.getTrueValue(P(p)), Unary.getVal(PRRR(p))) ? 11 : INFINITE
+EMIT_INSTRUCTION
+SSE2_ABS(true, P(p), CondMove.getResult(P(p)), CondMove.getVal1(P(p)));
+
+# x < 0 ? -x : x
+r: FCMP_FCMOV(r, OTHER_OPERAND(MATERIALIZE_FP_CONSTANT(INT_CONSTANT), OTHER_OPERAND(FLOAT_NEG(r), r)))
+IS_MATERIALIZE_ZERO(PRL(p)) && SSE2_IS_LT_OR_LE(CondMove.getCond(P(p))) && \
+SIMILAR_REGISTERS(CondMove.getVal1(P(p)), CondMove.getFalseValue(P(p)), Unary.getVal(PRRL(p))) ? 11 : INFINITE
+EMIT_INSTRUCTION
+SSE2_ABS(true, P(p), CondMove.getResult(P(p)), CondMove.getVal1(P(p)));
+
+# 0 > x ? -x : x
+r: FCMP_FCMOV(MATERIALIZE_FP_CONSTANT(INT_CONSTANT), OTHER_OPERAND(r, OTHER_OPERAND(FLOAT_NEG(r), r)))
+IS_MATERIALIZE_ZERO(PRL(p)) && SSE2_IS_GT_OR_GE(CondMove.getCond(P(p))) && \
+SIMILAR_REGISTERS(CondMove.getVal2(P(p)), CondMove.getFalseValue(P(p)), Unary.getVal(PRRL(p))) ? 11 : INFINITE
+EMIT_INSTRUCTION
+SSE2_ABS(true, P(p), CondMove.getResult(P(p)), CondMove.getVal2(P(p)));
+
+# 0 < x ? x : -x
+r: FCMP_FCMOV(MATERIALIZE_FP_CONSTANT(INT_CONSTANT), OTHER_OPERAND(r, OTHER_OPERAND(r, FLOAT_NEG(r))))
+IS_MATERIALIZE_ZERO(PRL(p)) && SSE2_IS_LT_OR_LE(CondMove.getCond(P(p))) && \
+SIMILAR_REGISTERS(CondMove.getVal2(P(p)), CondMove.getTrueValue(P(p)), Unary.getVal(PRRR(p))) ? 11 : INFINITE
+EMIT_INSTRUCTION
+SSE2_ABS(true, P(p), CondMove.getResult(P(p)), CondMove.getVal2(P(p)));
+
+# x > 0 ? x : -x
+r: FCMP_FCMOV(r, OTHER_OPERAND(MATERIALIZE_FP_CONSTANT(INT_CONSTANT), OTHER_OPERAND(r, DOUBLE_NEG(r))))
+IS_MATERIALIZE_ZERO(PRL(p)) && SSE2_IS_GT_OR_GE(CondMove.getCond(P(p))) && \
+SIMILAR_REGISTERS(CondMove.getVal1(P(p)), CondMove.getTrueValue(P(p)), Unary.getVal(PRRR(p))) ? 11 : INFINITE
+EMIT_INSTRUCTION
+SSE2_ABS(false, P(p), CondMove.getResult(P(p)), CondMove.getVal1(P(p)));
+
+# x < 0 ? -x : x
+r: FCMP_FCMOV(r, OTHER_OPERAND(MATERIALIZE_FP_CONSTANT(INT_CONSTANT), OTHER_OPERAND(DOUBLE_NEG(r), r)))
+IS_MATERIALIZE_ZERO(PRL(p)) && SSE2_IS_LT_OR_LE(CondMove.getCond(P(p))) && \
+SIMILAR_REGISTERS(CondMove.getVal1(P(p)), CondMove.getFalseValue(P(p)), Unary.getVal(PRRL(p))) ? 11 : INFINITE
+EMIT_INSTRUCTION
+SSE2_ABS(false, P(p), CondMove.getResult(P(p)), CondMove.getVal1(P(p)));
+
+# 0 > x ? -x : x
+r: FCMP_FCMOV(MATERIALIZE_FP_CONSTANT(INT_CONSTANT), OTHER_OPERAND(r, OTHER_OPERAND(DOUBLE_NEG(r), r)))
+IS_MATERIALIZE_ZERO(PRL(p)) && SSE2_IS_GT_OR_GE(CondMove.getCond(P(p))) && \
+SIMILAR_REGISTERS(CondMove.getVal2(P(p)), CondMove.getFalseValue(P(p)), Unary.getVal(PRRL(p))) ? 11 : INFINITE
+EMIT_INSTRUCTION
+SSE2_ABS(false, P(p), CondMove.getResult(P(p)), CondMove.getVal2(P(p)));
+
+# 0 < x ? x : -x
+r: FCMP_FCMOV(MATERIALIZE_FP_CONSTANT(INT_CONSTANT), OTHER_OPERAND(r, OTHER_OPERAND(r, DOUBLE_NEG(r))))
+IS_MATERIALIZE_ZERO(PRL(p)) && SSE2_IS_LT_OR_LE(CondMove.getCond(P(p))) && \
+SIMILAR_REGISTERS(CondMove.getVal2(P(p)), CondMove.getTrueValue(P(p)), Unary.getVal(PRRR(p))) ? 11 : INFINITE
+EMIT_INSTRUCTION
+SSE2_ABS(false, P(p), CondMove.getResult(P(p)), CondMove.getVal2(P(p)));
+
######
# Long operations that can use wider registers
#####
Modified: rvmroot/branches/RVM-PureNativeThread/workingMergeUp/rvm/src-generated/opt-burs/ppc/PPC_Common.rules
===================================================================
--- rvmroot/branches/RVM-PureNativeThread/workingMergeUp/rvm/src-generated/opt-burs/ppc/PPC_Common.rules 2009-01-09 18:04:16 UTC (rev 15268)
+++ rvmroot/branches/RVM-PureNativeThread/workingMergeUp/rvm/src-generated/opt-burs/ppc/PPC_Common.rules 2009-01-09 18:06:22 UTC (rev 15269)
@@ -815,84 +815,84 @@
# FMA and friends
#####
r: FLOAT_ADD(FLOAT_MUL(r, r), r)
-burs.ir.options.strictFP()?INFINITE:10
+burs.ir.strictFP(P(p),PL(p))?INFINITE:10
EMIT_INSTRUCTION
EMIT(MIR_Ternary.mutate(P(p), PPC_FMADDS, Binary.getResult(P(p)), \
R(Binary.getVal1(PL(p))), R(Binary.getVal2(PL(p))), \
R(Binary.getVal2(P(p)))));
r: DOUBLE_ADD(DOUBLE_MUL(r, r), r)
-burs.ir.options.strictFP()?INFINITE:10
+burs.ir.strictFP(P(p),PL(p))?INFINITE:10
EMIT_INSTRUCTION
EMIT(MIR_Ternary.mutate(P(p), PPC_FMADD, Binary.getResult(P(p)), \
R(Binary.getVal1(PL(p))), R(Binary.getVal2(PL(p))), \
R(Binary.getVal2(P(p)))));
r: FLOAT_ADD(r, FLOAT_MUL(r,r))
-burs.ir.options.strictFP()?INFINITE:10
+burs.ir.strictFP(P(p),PR(p))?INFINITE:10
EMIT_INSTRUCTION
EMIT(MIR_Ternary.mutate(P(p), PPC_FMADDS, Binary.getResult(P(p)), \
R(Binary.getVal1(PR(p))), R(Binary.getVal2(PR(p))), \
R(Binary.getVal1(P(p)))));
r: DOUBLE_ADD(r, DOUBLE_MUL(r,r))
-burs.ir.options.strictFP()?INFINITE:10
+burs.ir.strictFP(P(p),PR(p))?INFINITE:10
EMIT_INSTRUCTION
EMIT(MIR_Ternary.mutate(P(p), PPC_FMADD, Binary.getResult(P(p)), \
R(Binary.getVal1(PR(p))), R(Binary.getVal2(PR(p))), \
R(Binary.getVal1(P(p)))));
r: FLOAT_SUB(FLOAT_MUL(r, r), r)
-burs.ir.options.strictFP()?INFINITE:10
+burs.ir.strictFP(P(p),PL(p))?INFINITE:10
EMIT_INSTRUCTION
EMIT(MIR_Ternary.mutate(P(p), PPC_FMSUBS, Binary.getResult(P(p)), \
R(Binary.getVal1(PL(p))), R(Binary.getVal2(PL(p))), \
R(Binary.getVal2(P(p)))));
r: DOUBLE_SUB(DOUBLE_MUL(r, r), r)
-burs.ir.options.strictFP()?INFINITE:10
+burs.ir.strictFP(P(p),PL(p))?INFINITE:10
EMIT_INSTRUCTION
EMIT(MIR_Ternary.mutate(P(p), PPC_FMSUB, Binary.getResult(P(p)), \
R(Binary.getVal1(PL(p))), R(Binary.getVal2(PL(p))), \
R(Binary.getVal2(P(p)))));
r: FLOAT_NEG(FLOAT_ADD(FLOAT_MUL(r, r), r))
-burs.ir.options.strictFP()?INFINITE:10
+burs.ir.strictFP(P(p),PL(p),PLL(p))?INFINITE:10
EMIT_INSTRUCTION
EMIT(MIR_Ternary.mutate(P(p), PPC_FNMADDS, Binary.getResult(P(p)), \
R(Binary.getVal1(PLL(p))), R(Binary.getVal2(PLL(p))), \
R(Binary.getVal2(PL(p)))));
r: DOUBLE_NEG(DOUBLE_ADD(DOUBLE_MUL(r, r), r))
-burs.ir.options.strictFP()?INFINITE:10
+burs.ir.strictFP(P(p),PL(p),PLL(p))?INFINITE:10
EMIT_INSTRUCTION
EMIT(MIR_Ternary.mutate(P(p), PPC_FNMADD, Binary.getResult(P(p)), \
R(Binary.getVal1(PLL(p))), R(Binary.getVal2(PLL(p))), \
R(Binary.getVal2(PL(p)))));
r: FLOAT_NEG(FLOAT_ADD(r, FLOAT_MUL(r,r)))
-burs.ir.options.strictFP()?INFINITE:10
+burs.ir.strictFP(P(p),PL(p),PLR(p))?INFINITE:10
EMIT_INSTRUCTION
EMIT(MIR_Ternary.mutate(P(p), PPC_FNMADDS, Binary.getResult(P(p)), \
R(Binary.getVal1(PLR(p))), R(Binary.getVal2(PLR(p))), \
R(Binary.getVal1(PL(p)))));
r: DOUBLE_NEG(DOUBLE_ADD(r, DOUBLE_MUL(r,r)))
-burs.ir.options.strictFP()?INFINITE:10
+burs.ir.strictFP(P(p),PL(p),PLR(p))?INFINITE:10
EMIT_INSTRUCTION
EMIT(MIR_Ternary.mutate(P(p), PPC_FNMADD, Binary.getResult(P(p)), \
R(Binary.getVal1(PLR(p))), R(Binary.getVal2(PLR(p))),\
R(Binary.getVal1(PL(p)))));
r: FLOAT_NEG(FLOAT_SUB(FLOAT_MUL(r, r), r))
-burs.ir.options.strictFP()?INFINITE:10
+burs.ir.strictFP(P(p),PL(p),PLL(p))?INFINITE:10
EMIT_INSTRUCTION
EMIT(MIR_Ternary.mutate(P(p), PPC_FNMSUBS, Binary.getResult(P(p)), \
R(Binary.getVal1(PLL(p))), R(Binary.getVal2(PLL(p))), \
R(Binary.getVal2(PL(p)))));
r: DOUBLE_NEG(DOUBLE_SUB(DOUBLE_MUL(r, r), r))
-burs.ir.options.strictFP()?INFINITE:10
+burs.ir.strictFP(P(p),PL(p),PLL(p))?INFINITE:10
EMIT_INSTRUCTION
EMIT(MIR_Ternary.mutate(P(p), PPC_FNMSUB, Binary.getResult(P(p)), \
R(Binary.getVal1(PLL(p))), R(Binary.getVal2(PLL(p))), \
Modified: rvmroot/branches/RVM-PureNativeThread/workingMergeUp/rvm/src-generated/opt-ir/ia32/OperatorList.dat
===================================================================
--- rvmroot/branches/RVM-PureNativeThread/workingMergeUp/rvm/src-generated/opt-ir/ia32/OperatorList.dat 2009-01-09 18:04:16 UTC (rev 15268)
+++ rvmroot/branches/RVM-PureNativeThread/workingMergeUp/rvm/src-generated/opt-ir/ia32/OperatorList.dat 2009-01-09 18:06:22 UTC (rev 15269)
@@ -1189,6 +1189,48 @@
####################
+IA32_ANDPS
+MIR_BinaryAcc
+none
+
+
+
+####################
+IA32_ANDPD
+MIR_BinaryAcc
+none
+
+
+
+####################
+IA32_ANDNPS
+MIR_BinaryAcc
+none
+
+
+
+####################
+IA32_ANDNPD
+MIR_BinaryAcc
+none
+
+
+
+####################
+IA32_ORPS
+MIR_BinaryAcc
+none
+
+
+
+####################
+IA32_ORPD
+MIR_BinaryAcc
+none
+
+
+
+####################
IA32_XORPS
MIR_BinaryAcc
none
Modified: rvmroot/branches/RVM-PureNativeThread/workingMergeUp/rvm/src-generated/options/BooleanOptions.opt.dat
===================================================================
--- rvmroot/branches/RVM-PureNativeThread/workingMergeUp/rvm/src-generated/options/BooleanOptions.opt.dat 2009-01-09 18:04:16 UTC (rev 15268)
+++ rvmroot/branches/RVM-PureNativeThread/workingMergeUp/rvm/src-generated/options/BooleanOptions.opt.dat 2009-01-09 18:06:22 UTC (rev 15269)
@@ -15,165 +15,225 @@
DESCRIP
##########
-# First all the non-printing, non-debugging options
-# Should not start with PRINT_ or DEBUG_ prefix
+# Cross cutting optimization options
##########
-LOCAL_CONSTANT_PROP 0 true
-Perform local constant propagation
+FREQ_FOCUS_EFFORT -1 false focus_effort
+Focus compilation effort based on frequency profile data
-LOCAL_COPY_PROP 0 true
-Perform local copy propagation
+READS_KILL -1 false
+Should we constrain optimizations by enforcing reads-kill?
-LOCAL_CSE 0 true
-Perform local common subexpression elimination
+##########
+# Analysis of fields to help determine their type options
+##########
+FIELD_ANALYSIS 0 true
+Eagerly compute method summaries for flow-insensitive field analysis
-# ABCD is currently incomplete; it doesn't check lower bounds
-GLOBAL_BOUNDS_CHECK -1 false global_bounds
-Perform global Array Bound Check elimination on Demand
+##########
+# Inlining optimizations
+##########
+INLINE 0 true
+Inline statically resolvable calls
-MONITOR_REMOVAL 1 true
-Try to remove unnecessary monitor operations
+INLINE_GUARDED 0 true
+Guarded inlining of non-final virtual calls
-INVOKEE_THREAD_LOCAL -1 false
-Compile the method assuming the invokee is thread-local
+INLINE_GUARDED_INTERFACES 0 true
+Speculatively inline non-final interface calls
-NO_CALLEE_EXCEPTIONS -1 false
-Assert that any callee of this compiled method will not throw exceptions?
+INLINE_PREEX 0 true
+Pre-existence based inlining
-SIMPLE_ESCAPE_IPA -1 false
-Eagerly compute method summaries for simple escape analysis
+##########
+# Simplifier, single instruction optimizations
+# NB: these operations may create more literal values that may consume space
+# in the JTOC.
+# NB: The convention is that constant folding is controlled based on the type
+# of the result of the operator, not the type of its inputs.
+##########
+SIMPLIFY_INTEGER_OPS -1 true
+Simplify operations on integers
-FIELD_ANALYSIS 0 true
-Eagerly compute method summaries for flow-insensitive field analysis
+SIMPLIFY_LONG_OPS -1 true
+Simplify operations on longs
-SCALAR_REPLACE_AGGREGATES 1 true
-Perform scalar replacement of aggregates
+SIMPLIFY_FLOAT_OPS -1 true
+Simplify operations on floats
-REORDER_CODE 0 true
-Reorder basic blocks for improved locality and branch prediction
+SIMPLIFY_DOUBLE_OPS -1 true
+Simplify operations on floats
-REORDER_CODE_PH 1 true
-Reorder basic blocks using Pettis and Hansen Algo2
+SIMPLIFY_REF_OPS -1 true
+Simplify operations on references
-INLINE_NEW 0 true
-Inline allocation of scalars and arrays
+SIMPLIFY_TIB_OPS -1 true
+Simplify operations on TIBs
-INLINE_WRITE_BARRIER 1 true
-Inline write barriers for generational collectors
+SIMPLIFY_FIELD_OPS -1 true
+Simplify operations on fields
-INLINE 0 true
-Inline statically resolvable calls
+SIMPLIFY_CHASE_FINAL_FIELDS -1 true
+Chase final fields avoiding loads at runtime
-GUARDED_INLINE 0 true
-Guarded inlining of non-final virtual calls
+##########
+# Local (within a basic block) optimizations
+##########
+LOCAL_CONSTANT_PROP 0 true
+Perform local constant propagation
-GUARDED_INLINE_INTERFACE 0 true
-Speculatively inline non-final interface calls
+LOCAL_COPY_PROP 0 true
+Perform local copy propagation
-STATIC_SPLITTING 1 true
+LOCAL_CSE 0 true
+Perform local common subexpression elimination
+
+LOCAL_EXPRESSION_FOLDING 3 false
+Should we try to fold expressions with constants locally?
+
+##########
+# Control-flow optimization options
+##########
+CONTROL_STATIC_SPLITTING 1 true
CFG splitting to create hot traces based on static heuristics
-REDUNDANT_BRANCH_ELIMINATION 3 true
-Eliminate redundant conditional branches
+CONTROL_TURN_WHILES_INTO_UNTILS 3 false control_unwhile
+Turn whiles into untils
-PREEX_INLINE 0 true
-Pre-existence based inlining
+##########
+# Simple escape optimization options
+##########
+ESCAPE_SIMPLE_IPA -1 false
+Eagerly compute method summaries for simple escape analysis
+ESCAPE_SCALAR_REPLACE_AGGREGATES 1 true
+If possible turn aggregates (objects) into variable definition/uses
+
+ESCAPE_MONITOR_REMOVAL 1 true
+Try to remove unnecessary monitor operations
+
+ESCAPE_INVOKEE_THREAD_LOCAL -1 false
+Compile the method assuming the invokee is thread-local. Cannot be properly set on command line.
+
+##########
+# SSA optimizations
+##########
SSA 3 false
Should SSA form be constructed on the HIR?
-LOAD_ELIMINATION 3 false
+SSA_EXPRESSION_FOLDING 3 false
+Should we try to fold expressions with constants in SSA form?
+
+SSA_REDUNDANT_BRANCH_ELIMINATION 3 true
+Eliminate redundant conditional branches
+
+# This options looks unsound, remove?
+SSA_LICM_IGNORE_PEI -1 false
+Assume PEIs do not throw or state is not observable
+
+SSA_LOAD_ELIMINATION 3 false
Should we perform redundant load elimination during SSA pass?
-COALESCE_AFTER_SSA 3 false
+SSA_COALESCE_AFTER 3 false
Should we coalesce move instructions after leaving SSA?
-EXPRESSION_FOLDING 3 false
-Should we try to fold expressions with constants in SSA form?
+SSA_LOOP_VERSIONING -1 false
+Create copies of loops where runtime exceptions are checked prior to entry
-LIVE_RANGE_SPLITTING -1 false
+SSA_LIVE_RANGE_SPLITTING -1 false
Split live ranges using LIR SSA pass?
-GCP 3 false gcp
+SSA_GCP 3 false
Perform global code placement
-GCSE 3 false gcse
+SSA_GCSE 3 false
Perform global code placement
-VERBOSE_GCP -1 false verbose_gcp
-Perform noisy global code placement
+# ABCD is currently incomplete; it doesn't check lower bounds
+SSA_GLOBAL_BOUNDS_CHECK -1 false ssa_global_bounds
+Perform (incomplete/unsafe) global Array Bound Check elimination on Demand
-LICM_IGNORE_PEI -1 false licm_ignore_pei
-Asume PEIs do not throw or state is not observable
+SSA_SPLITBLOCK_TO_AVOID_RENAME -1 false
+When leaving SSA create blocks to avoid renaming variables
-TURN_WHILES_INTO_UNTILS 3 false unwhile
-Turn whiles into untils
+SSA_SPLITBLOCK_FOR_LOCAL_LIVE -1 true
+When leaving SSA create blocks for local liveness
-LOOP_VERSIONING -1 false loop_versioning
-Loop versioning
+SSA_SPLITBLOCK_INTO_INFREQUENT -1 true
+When leaving SSA create blocks to avoid adding code to frequently executed blocks
-HANDLER_LIVENESS 2 false
-Store liveness for handlers to improve dependence graph at PEIs
+##########
+# Code reordering for icache performance options
+##########
+REORDER_CODE 0 true
+Reorder basic blocks for improved locality and branch prediction
-SCHEDULE_PREPASS -1 false
-Perform prepass instruction scheduling
+REORDER_CODE_PH 1 true
+Reorder basic blocks using Pettis and Hansen Algo2
-NO_CHECKCAST -1 false
-Should all checkcast operations be (unsafely) eliminated?
+##########
+# Options during conversion from HIR to LIR
+##########
+H2L_INLINE_NEW 0 true
+Inline allocation of scalars and arrays
-NO_CHECKSTORE -1 false
-Should all checkstore operations be (unsafely) eliminated?
+H2L_INLINE_WRITE_BARRIER 1 true
+Inline write barriers for generational collectors
-NO_BOUNDS_CHECK -1 false
-Should all bounds check operations be (unsafely) eliminated?
+H2L_NO_CALLEE_EXCEPTIONS -1 false
+Assert that any callee of this compiled method will not throw exceptions. Cannot be properly set on command line.
-NO_NULL_CHECK -1 false
-Should all null check operations be (unsafely) eliminated?
+H2L_CALL_VIA_JTOC -1 false
+Plant virtual calls via the JTOC rather than from the tib of anobject when possible
-NO_SYNCHRO -1 false
-Should all synchronization operations be (unsafely) eliminated?
+##########
+# Options during conversion from LIR to MIR
+##########
+L2M_HANDLER_LIVENESS 2 false
+Store liveness for handlers to improve dependence graph at PEIs
-NO_THREADS -1 false
-Should all yield points be (unsafely) eliminated?
+L2M_SCHEDULE_PREPASS -1 false
+Perform prepass instruction scheduling
-NO_CACHE_FLUSH -1 VM.BuildForIA32
-Should cache flush instructions (PowerPC SYNC/ISYNC) be omitted? NOTE: Cannot be correctly changed via the command line!
+##########
+# Options during register allocation
+##########
+REGALLOC_COALESCE_MOVES 0 true
+Attempt to coalesce to eliminate register moves?
-READS_KILL -1 false
-Should we constrain optimizations by enforcing reads-kill?
+REGALLOC_COALESCE_SPILLS 0 true
+Attempt to coalesce stack locations?
-MONITOR_NOP -1 false
-Should we treat all monitorenter/monitorexit bytecodes as nops?
-
-STATIC_STATS -1 false
-Should we dump out compile-time statistics for basic blocks?
-
-CODE_PATCH_NOP -1 false
-Should all patch point be (unsafely) eliminated (at initial HIR)?
-
-INSTRUMENTATION_SAMPLING -1 false
+##########
+# Options for adaptive compilation
+##########
+ADAPTIVE_INSTRUMENTATION_SAMPLING -1 false
Perform code transformation to sample instrumentation code.
-NO_DUPLICATION -1 false
+ADAPTIVE_NO_DUPLICATION -1 false
When performing inst. sampling, should it be done without duplicating code?
-PROCESSOR_SPECIFIC_COUNTER -1 true
+ADAPTIVE_PROCESSOR_SPECIFIC_COUNTER -1 true
Should there be one CBS counter per processor for SMP performance?
-REMOVE_YP_FROM_CHECKING -1 false
+ADAPTIVE_REMOVE_YP_FROM_CHECKING -1 false
Should yieldpoints be removed from the checking code (requires finite sample interval)
+###########
+# OnStackReplacement options
+###########
+OSR_GUARDED_INLINING 1 true
+Insert OSR point at off branch of guarded inlining?
+
+OSR_INLINE_POLICY 1 true
+Use OSR knowledge to drive more aggressive inlining?
+
##########
-# Options for feedback-directed optimizations
-#
-FREQ_FOCUS_EFFORT -1 false focusEffort
-Focus compilation effort based on frequency profile data
+# Printing options
+##########
+PRINT_STATIC_STATS -1 false
+Print out compile-time statistics for basic blocks?
-##########
-# Next, declare all the printing options
-# MUST start with PRINT_
-#
-PRINT_PHASES -1 false phases
+PRINT_PHASES -1 false
Print short message for each compilation phase
PRINT_ALL_IR -1 false
@@ -185,10 +245,10 @@
PRINT_INLINE_REPORT -1 false
Print detailed report of compile-time inlining decisions
-PRINT_DOMINATORS -1 false dom
+PRINT_DOMINATORS -1 false print_dom
Print dominators
-PRINT_POST_DOMINATORS -1 false pdom
+PRINT_POST_DOMINATORS -1 false print_pdom
Print post-dominators
PRINT_SSA -1 false
@@ -203,29 +263,29 @@
PRINT_DG_SCHED_POST -1 false
Print dependence graph before postpass scheduling
-PRINT_COALESCING -1 false pcoal
+PRINT_COALESCING -1 false print_coal
Print coalescing output
## Options for IR printing at various points in compilation
-PRINT_HIGH -1 false high
+PRINT_HIGH -1 false
Print IR after initial generation
-PRINT_FINAL_HIR -1 false final_hir
+PRINT_FINAL_HIR -1 false
Print IR just before conversion to LIR
-PRINT_LOW -1 false low
+PRINT_LOW -1 false
Print IR after conversion to LIR
-PRINT_FINAL_LIR -1 false final_lir
+PRINT_FINAL_LIR -1 false
Print IR just before conversion to MIR
-PRINT_MIR -1 false mir
+PRINT_MIR -1 false
Print IR after conversion to MIR
-PRINT_FINAL_MIR -1 false final_mir
+PRINT_FINAL_MIR -1 false
Print IR just before conversion to machine code
-PRINT_CFG -1 false cfg
+PRINT_CFG -1 false
Print control flow graph too when IR is printed
PRINT_SCHEDULE_PRE -1 false
@@ -234,7 +294,7 @@
PRINT_SCHEDULE_POST -1 false
Print IR after postpass scheduling
-PRINT_REGALLOC -1 false regalloc
+PRINT_REGALLOC -1 false
Print IR before and after register allocation
PRINT_CALLING_CONVENTIONS -1 false
@@ -244,10 +304,9 @@
Print the garbage collection maps
##########
-# Finally, the debugging flags
-# MUST start with DEBUG_ prefix
-#
-DEBUG_CODEGEN -1 false cgd
+# Debugging flags
+##########
+DEBUG_CODEGEN -1 false debug_cgd
Enable debugging support for final assembly
DEBUG_INSTRU_SAMPLING -1 false
@@ -256,13 +315,6 @@
DEBUG_INSTRU_SAMPLING_DETAIL -1 false
Enable detailed debugging statements for instrumentation sampling
-###########
-# OnStackReplacement options, use this when guarded_inlining
-# is enabled
-###########
-OSR_GUARDED_INLINING 1 true
-Insert OSR point at off branch of guarded inlining?
+DEBUG_GCP -1 false
+Perform noisy global code placement
-OSR_INLINE_POLICY 1 true
-Use OSR knowledge to drive more aggressive inlining?
-
Modified: rvmroot/branches/RVM-PureNativeThread/workingMergeUp/rvm/src-generated/options/MasterOptions.template
===================================================================
--- rvmroot/branches/RVM-PureNativeThread/workingMergeUp/rvm/src-generated/options/MasterOptions.template 2009-01-09 18:04:16 UTC (rev 15268)
+++ rvmroot/branches/RVM-PureNativeThread/workingMergeUp/rvm/src-generated/options/MasterOptions.template 2009-01-09 18:06:22 UTC (rev 15269)
@@ -15,7 +15,8 @@
$$$$ FOREACH OPTION BDATFILE
$$$$ SPLIT "OPTION.DECL" " " FULL_NAME OPT_LEVEL DEFAULT_VALUE SHORT_NAME
$$$$ LET PRETTY_NAME @PAD(FULL_NAME,30," ")
- public boolean PRETTY_NAME= DEFAULT_VALUE; // OPTION.DESCRIP
+ /** OPTION.DESCRIP */
+ public boolean PRETTY_NAME= DEFAULT_VALUE;
$$$$ END LET PRETTY_NAME
$$$$ END SPLIT
$$$$ END FOREACH
@@ -25,11 +26,13 @@
$$$$ SPLIT "OPTION.DECL" " " TAG FULL_NAME TYPE DEFAULT_VALUE SHORT_NAME
$$$$ IF TAG == S
$$$$ LET PRETTY_NAME @PAD(FULL_NAME,23-@LENGTH("TYPE")," ")
- private java.util.HashSet<String> PRETTY_NAME= null; // OPTION.DESCRIP
+ /** OPTION.DESCRIP */
+ private java.util.HashSet<TYPE> PRETTY_NAME= null;
$$$$ END LET PRETTY_NAME
$$$$ ELSE
$$$$ LET PRETTY_NAME @PAD(FULL_NAME,37-@LENGTH("TYPE")," ")
- public TYPE PRETTY_NAME= DEFAULT_VALUE; // OPTION.DESCRIP
+ /** OPTION.DESCRIP */
+ public TYPE PRETTY_NAME= DEFAULT_VALUE;
$$$$ END LET PRETTY_NAME
$$$$ END IF
$$$$ END SPLIT
@@ -46,7 +49,12 @@
$$$$ LOOP CONSTNAME OPTION.ENUMS
$$$$ SPLIT "CONSTNAME" " " ITEM_NAME QUERRY_NAME CMD_NAME
public static final TYPE ITEM_NAME = CONSTNAME.INDEX;
- public final boolean QUERRY_NAME() { return FULL_NAME == ITEM_NAME; }
+ /**
+ * Is FULL_NAME set to ITEM_NAME?
+ */
+ public final boolean QUERRY_NAME() {
+ return FULL_NAME == ITEM_NAME;
+ }
$$$$ END SPLIT CONSTNAME
$$$$ END LOOP
@@ -62,22 +70,38 @@
$$$$ SPLIT "OPTION.DECL" " " TAG FULL_NAME TYPE DEFAULT_VALUE SHORT_NAME
$$$$ IF TAG == S
// FULL_NAME
- public boolean isFULL_NAME(TYPE q) { return FULL_NAME != null && FULL_NAME.contains(q); }
+ /**
+ * Has the given parameter been added to FULL_NAME set of options?
+ */
+ public boolean isFULL_NAME(TYPE q) {
+ return FULL_NAME != null && FULL_NAME.contains(q);
+ }
+ $$$$ IF TYPE == String
+ /**
+ * Does the given parameter appear within a set the String of one of the options?
+ */
public boolean fuzzyMatchFULL_NAME(TYPE q) {
- if (FULL_NAME == null) return false;
- for (final String s : FULL_NAME) {
- if (q.indexOf(s) > -1) return true;
+ if (FULL_NAME != null) {
+ for (final String s : FULL_NAME) {
+ if (q.indexOf(s) > -1)
+ return true;
+ }
}
return false;
}
- public boolean hasFULL_NAME() { return !(FULL_NAME == null || FULL_NAME.isEmpty()); }
- public java.util.Iterator<String> getFULL_NAMEs() {
+ $$$$ END IF TYPE == String
+ /**
+ * Have any items been placed in the set FULL_NAME?
+ */
+ public boolean hasFULL_NAME() {
+ return FULL_NAME != null && !FULL_NAME.isEmpty();
+ }
+ /**
+ * Return an iterator over the items in FULL_NAME
+ */
+ public java.util.Iterator<TYPE> getFULL_NAMEs() {
if (FULL_NAME == null) {
- return new java.util.Iterator<String>() {
- public boolean hasNext() { return false; }
- public String next() { return null; }
- public void remove() {}
- };
+ return new org.jikesrvm.util.EmptyIterator<TYPE>();
} else {
return FULL_NAME.iterator();
}
@@ -97,7 +121,7 @@
$$$$ SPLIT "OPTION.DECL" " " TAG FULL_NAME TYPE DEFAULT_VALUE SHORT_NAME
$$$$ IF TAG == S
if (FULL_NAME != null) {
- clone.FULL_NAME = (java.util.HashSet)this.FULL_NAME.clone();
+ clone.FULL_NAME = (java.util.HashSet<TYPE>)this.FULL_NAME.clone();
}
$$$$ END IF
$$$$ END SPLIT
@@ -117,7 +141,6 @@
}
}
-
/**
* Take a string (most likely a command-line argument) and try to proccess it
* as an option command. Return true if the string was understood, false
@@ -174,7 +197,7 @@
FULL_NAME = true;
return true;
} else if (value.equals("false")) {
- FULL_NAME = false;
+ FULL_NAME = false;
return true;
} else
return false;
@@ -199,10 +222,10 @@
FULL_NAME = (byte)CommandLineArgs.primitiveParseInt(value);
$$$$ ELSE
$$$$ IF TYPE == double
- FULL_NAME = CommandLineArgs.primitiveParseFloat(value);
+ FULL_NAME = CommandLineArgs.primitiveParseFloat(value);
$$$$ ELSE
$$$$ IF TYPE == float
- FULL_NAME = CommandLineArgs.primitiveParseFloat(value);
+ FULL_NAME = CommandLineArgs.primitiveParseFloat(value);
$$$$ ELSE
Hey! You tried to declare a value option of unrecoginized type...fix it!
$$$$ END IF
@@ -226,16 +249,12 @@
}
$$$$ ELSE
$$$$ IF TAG == S
- $$$$ IF TYPE == String
if (FULL_NAME == null) {
- FULL_NAME = new java.util.HashSet<String>();
+ FULL_NAME = new java.util.HashSet<TYPE>();
}
FULL_NAME.add(value);
return true;
}
- $$$$ ELSE
- Hey! You tried to declare a Set option of unsupported type...fix it!
- $$$$ END IF TYPE == String
$$$$ ELSE
Whoops! Unimplemented tag: TAG...go nag Dave and he'll finish it.
$$$$ END IF TAG == S
@@ -251,7 +270,7 @@
return false;
}
- // Print a short description of every option
+ /** Print a short description of every option */
public static void printHelp(String prefix) {
instancePrintHelpHeader(prefix);
@@ -325,7 +344,7 @@
VM.sysExit(VM.EXIT_STATUS_PRINTED_HELP_MESSAGE);
}
- // print the options values
+ /** @return a String representing the options values */
@org.vmmagic.pragma.NoOptCompile
public String toString() {
StringBuilder result = new StringBuilder();
@@ -384,7 +403,8 @@
return result.toString();
//End generated toString()
}
- // return a String value of this options object
+
+ /** print a String value of this options object */
@org.vmmagic.pragma.NoOptCompile
public void printOptions() {
printOptionsHeader();
Modified: rvmroot/branches/RVM-PureNativeThread/workingMergeUp/rvm/src-generated/options/OptOptions.template
===================================================================
--- rvmroot/branches/RVM-PureNativeThread/workingMergeUp/rvm/src-generated/options/OptOptions.template 2009-01-09 18:04:16 UTC (rev 15268)
+++ rvmroot/branches/RVM-PureNativeThread/workingMergeUp/rvm/src-generated/options/OptOptions.template 2009-01-09 18:06:22 UTC (rev 15269)
@@ -71,13 +71,15 @@
}
- // accessor to get OPT level
+ /** accessor to get OPT level */
public int getOptLevel() {
return OPTIMIZATION_LEVEL;
}
- // Set the options to encode the optimizations enabled at the given opt label
- // and disabled all optimizations that are not enabled at the given opt label
+ /**
+ * Set the options to encode the optimizations enabled at the given opt label
+ * and disabled all optimizations that are not enabled at the given opt label
+ */
public void setOptLevel(int level) {
OPTIMIZATION_LEVEL = level;
// Begin generated opt-level logic
Modified: rvmroot/branches/RVM-PureNativeThread/workingMergeUp/rvm/src-generated/options/ValueOptions.aos.dat
===================================================================
--- rvmroot/branches/RVM-PureNativeThread/workingMergeUp/rvm/src-generated/options/ValueOptions.aos.dat 2009-01-09 18:04:16 UTC (rev 15268)
+++ rvmroot/branches/RVM-PureNativeThread/workingMergeUp/rvm/src-generated/options/ValueOptions.aos.dat 2009-01-09 18:06:22 UTC (rev 15269)
@@ -86,10 +86,14 @@
After how many timer interrupts do we update the weights in the dynamic call graph?
-V AI_SEED_MULTIPLIER double 3
+V INLINE_AI_SEED_MULTIPLIER double 3
Initial edge weight of call graph is set to AI_SEED_MULTIPLER * (1/AI_CONTROL_POINT)
+V INLINE_AI_HOT_CALLSITE_THRESHOLD double 0.01
+What percentage of the total weight of the dcg demarcates warm/hot edges
+
+
V OFFLINE_INLINE_PLAN_NAME String \"AI_plan\" offlinePlan
Name of offline inline plan to be read and used for inlining
@@ -110,10 +114,6 @@
What is the sample interval for counter-based sampling
-V AI_HOT_CALLSITE_THRESHOLD double 0.01
-What percentage of the total weight of the dcg demarcates warm/hot edges
-
-
V MAX_OPT_LEVEL int 2
The maximum optimization level to enable.
Modified: rvmroot/branches/RVM-PureNativeThread/workingMergeUp/rvm/src-generated/options/ValueOptions.opt.dat
===================================================================
--- rvmroot/branches/RVM-PureNativeThread/workingMergeUp/rvm/src-generated/options/ValueOptions.opt.dat 2009-01-09 18:04:16 UTC (rev 15268)
+++ rvmroot/branches/RVM-PureNativeThread/workingMergeUp/rvm/src-generated/options/ValueOptions.opt.dat 2009-01-09 18:06:22 UTC (rev 15269)
@@ -18,88 +18,151 @@
ENUMS
#Structure of ENUMS "ITEM_NAME QUERY_NAME CMD_NAME"
-V IC_MAX_TARGET_SIZE int (4*org.jikesrvm.classloader.NormalMethod.CALL_COST-org.jikesrvm.classloader.NormalMethod.SIMPLE_OPERATION_COST)
-Static inlining heuristic: Upper bound on callee size
+S DRIVER_EXCLUDE String
+Exclude methods from being opt compiled
-V IC_MAX_INLINE_DEPTH int 5
-Static inlining heuristic: Upper bound on depth of inlining
+V PRINT_IR_LEVEL int 0
+Only print IR compiled above this level
-V IC_MAX_ALWAYS_INLINE_TARGET_SIZE int (2*org.jikesrvm.classloader.NormalMethod.CALL_COST-org.jikesrvm.classloader.NormalMethod.SIMPLE_OPERATION_COST)
-Static inlining heuristic: Always inline callees of this size or smaller
+V PROFILE_EDGE_COUNT_INPUT_FILE String null
+Input file of edge counter profile data
-V IC_MASSIVE_METHOD_SIZE int 2048
-Static inlining heuristic: If root method is already this big, then only inline trivial methods
+E PROFILE_FREQUENCY_STRATEGY byte PROFILE_COUNTERS_FREQ
+How to compute block and edge frequencies?
+"PROFILE_COUNTERS_FREQ frequencyCounters counters" \
+"PROFILE_STATIC_FREQ staticFrequencyEstimates static" \
+"PROFILE_DUMB_FREQ dumbFrequency dumb" \
+"PROFILE_INVERSE_COUNTERS_FREQ inverseFrequencyCounters inverse"
+V PROFILE_INFREQUENT_THRESHOLD float 0.01f
+Cumulative threshold which defines the set of infrequent basic blocks
-V AI_MAX_TARGET_SIZE int (20*org.jikesrvm.classloader.NormalMethod.CALL_COST-org.jikesrvm.classloader.NormalMethod.SIMPLE_OPERATION_COST)
-Adaptive inlining heuristic: Upper bound on callee size
+V PROFILE_CBS_HOTNESS double 0.98
+Threshold at which a conditional branch is considered to be skewed
-V AI_MIN_CALLSITE_FRACTION double 0.4
-Adaptive inlining heuristc: Minimum fraction of callsite distribution for guarded inlining of a callee
+V ESCAPE_MAX_ARRAY_SIZE int 5
+Maximum size of array to replaced with registers by simple escape analysis
-V EDGE_COUNT_INPUT_FILE String null
-Input file of edge counter profile data
+V SSA_LOAD_ELIMINATION_ROUNDS int 3
+How many rounds of redundant load elimination will we attempt?
-E INLINING_GUARD byte IG_CODE_PATCH
-Selection of guard mechanism for inlined virtual calls that cannot be statically bound
-"IG_METHOD_TEST guardWithMethodTest ig_method_test" \
-"IG_CLASS_TEST guardWithClassTest ig_class_test" \
-"IG_CODE_PATCH guardWithCodePatch ig_code_patch"
-E FP_MODE byte FP_STRICT
-Selection of strictness level for floating point computations
-"FP_STRICT strictFP strict" \
-"FP_ALLOW_FMA allowFMA allow_fma" \
-"FP_LOOSE allowAssocFP allow_assoc"
+V L2M_MAX_BLOCK_SIZE int 300
+Maximum size of block for BURS, larger blocks are split
-S EXCLUDE String
-Exclude methods from being opt compiled
+E REGALLOC_SPILL_COST_ESTIMATE byte REGALLOC_BLOCK_COUNT_SPILL_COST
+Selection of spilling heuristic
+"REGALLOC_SIMPLE_SPILL_COST simpleSpillCost simple" \
+"REGALLOC_BRAINDEAD_SPILL_COST brainDeadSpillCost brainDead" \
+"REGALLOC_BLOCK_COUNT_SPILL_COST blockCountSpillCost blockCount"
-V UNROLL_LOG int 2
-Unroll loops. Duplicates the loop body 2^n times.
+V REGALLOC_SIMPLE_SPILL_COST_MOVE_FACTOR double 1.0
+spill penalty for move instructions
-V COND_MOVE_CUTOFF int 5
+# registers used in memory operands may hurt more than 'normal', since they
+# will definitely use a scratch register. rationale for 5: 5 instructions
+# affected when using a scratch register. (2 to save physical register, 1 to
+# load scratch, 1 to dump scratch, and the original)
+V REGALLOC_SIMPLE_SPILL_COST_MEMORY_OPERAND_FACTOR double 5.0
+spill penalty for registers used in memory operands
+
+
+V CONTROL_TABLESWITCH_CUTOFF int 8
+If a tableswitch comprises this many or fewer comparisons convert it into multiple if-then-else style branches
+
+
+V CONTROL_COND_MOVE_CUTOFF int 5
How many extra instructions will we insert in order to remove a conditional branch?
-V LOAD_ELIMINATION_ROUNDS int 3
-How many rounds of redundant load elimination will we attempt?
+V CONTROL_UNROLL_LOG int 2
+Unroll loops. Duplicates the loop body 2^n times.
-V ALLOC_ADVICE_SITES String null
-Read allocation advice attributes for all classes from this file
+V CONTROL_STATIC_SPLITTING_MAX_COST int 10
+Upper bound on the number of instructions duplicated per block when trying to create hot traces with static splitting
-E FREQUENCY_STRATEGY byte COUNTERS_FREQ
-How to compute block and edge frequencies?
-"COUNTERS_FREQ frequencyCounters counters" \
-"STATIC_FREQ staticFrequencyEstimates static" \
-"DUMB_FREQ dumbFrequency dumb" \
-"INVERSE_COUNTERS_FREQ inverseFrequencyCounters inverse"
+V CONTROL_WELL_PREDICTED_CUTOFF double 1/6
+Don't replace branches with conditional moves if they are outside of the range of 0.5 +- this value
-E SPILL_COST_ESTIMATE byte BLOCK_COUNT_SPILL_COST
-Selection of spilling heuristic
-"SIMPLE_SPILL_COST simpleSpillCost simple" \
-"BRAINDEAD_SPILL_COST brainDeadSpillCost brainDead" \
-"BLOCK_COUNT_SPILL_COST blockCountSpillCost blockCount"
-V INFREQUENT_THRESHOLD float 0.01f
-Cumulative threshold which defines the set of infrequent basic blocks
+V INLINE_MAX_TARGET_SIZE int (4*org.jikesrvm.classloader.NormalMethod.CALL_COST-org.jikesrvm.classloader.NormalMethod.SIMPLE_OPERATION_COST)
+Static inlining heuristic: Upper bound on callee size
-V CBS_HOTNESS double 0.98
-Threshold at which a conditional branch is considered to be skewed
+V INLINE_MAX_INLINE_DEPTH int 5
+Static inlining heuristic: Upper bound on depth of inlining
-V IR_PRINT_LEVEL int 0
-Only print IR compiled above this level
+V INLINE_MAX_ALWAYS_INLINE_TARGET_SIZE int (2*org.jikesrvm.classloader.NormalMethod.CALL_COST-org.jikesrvm.classloader.NormalMethod.SIMPLE_OPERATION_COST)
+Static inlining heuristic: Always inline callees of this size or smaller
+V INLINE_MASSIVE_METHOD_SIZE int 2048
+Static inlining heuristic: If root method is already this big, then only inline trivial methods
+
+
+# bound credits at 40% off; we don't want to be too optimistic about code space reductions.
+V INLINE_MAX_ARG_BONUS double 0.40
+Maximum bonus for reducing the perceived size of a method during inlining.
+
+
+# Reductions only come from optimization of dynamic type checks; all virtual methods on arrays are defined on Object.
+V INLINE_PRECISE_REG_ARRAY_ARG_BONUS double 0.05
+Bonus given to inlining methods that are passed a register of a known precise type.
+
+
+V INLINE_DECLARED_AASTORED_ARRAY_ARG_BONUS double 0.02
+Bonus given when there's potential to optimize checkstore portion of aastore bytecode on parameter
+
+
+# Reductions come from optimization of dynamic type checks and improved inlining of virtual/interface calls
+V INLINE_PRECISE_REG_CLASS_ARG_BONUS double 0.15
+Bonus given to inlining methods that are passed a register of a known precise type.
+
+
+V INLINE_EXTANT_REG_CLASS_ARG_BONUS double 0.05
+Bonus given to inlining methods that are passed a register that's known not to be null.
+
+
+# 5% credit for being an int constant; mainly in the hopes of control flow simplifications
+V INLINE_INT_CONST_ARG_BONUS double 0.05
+Bonus given to inlining methods that are passed an int constant argument
+
+
+# 10% credit for being 'null' as this enables a number of simplifications
+V INLINE_NULL_CONST_ARG_BONUS double 0.10
+Bonus given to inlining methods that are passed a null constant argument
+
+
+# 10% credit for being a string/class/object constant: inlining, constant folding, and Pure method opportunities
+V INLINE_OBJECT_CONST_ARG_BONUS double 0.10
+Bonus given to inlining methods that are passed an object constant argument
+
+
+V INLINE_CALL_DEPTH_COST double 0.00
+As we inline deeper nested methods what cost (or bonus) do we wish to give to deter (or encourage) nesting of deeper methods?
+
+
+V INLINE_AI_MAX_TARGET_SIZE int (20*org.jikesrvm.classloader.NormalMethod.CALL_COST-org.jikesrvm.classloader.NormalMethod.SIMPLE_OPERATION_COST)
+Adaptive inlining heuristic: Upper bound on callee size
+
+
+V INLINE_AI_MIN_CALLSITE_FRACTION double 0.4
+Adaptive inlining heuristc: Minimum fraction of callsite distribution for guarded inlining of a callee
+
+
+E INLINE_GUARD_KIND byte INLINE_GUARD_CODE_PATCH
+Selection of guard mechanism for inlined virtual calls that cannot be statically bound
+"INLINE_GUARD_METHOD_TEST guardWithMethodTest inline_guard_method_test" \
+"INLINE_GUARD_CLASS_TEST guardWithClassTest inline_guard_class_test" \
+"INLINE_GUARD_CODE_PATCH guardWithCodePatch inline_guard_code_patch"
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