From: Cary R. <cy...@ya...> - 2013-09-10 17:41:46
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I have been thinking about this a bit and I believe the current Icarus functionality is incorrect. The issue is that if you are using seed variables to create independent random streams these streams clobber the default random stream every time they are called. To me this seems wrong so I think calling $random(seed) should not set the internal seed variable. If we need a $srandom(seed) or $ivl_srandom(seed) to set the internal seed I have no problem adding this system task. I will wait a few days for comments before making and pushing this change. I'm assuming this change should go into both development and V0.9. Cary ________________________________ From: Stephen Williams <st...@ic...> To: ive...@li... Sent: Friday, September 6, 2013 5:50 PM Subject: Re: [Iverilog-devel] $random(seed)/some code to test -----BEGIN PGP SIGNED MESSAGE----- Hash: SHA1 It appears that the standard is silent on how the default seed is handled, and it appears that the $random(seed) implementation is changing the default seed to match the explicit seed. That can be argued to be a good thing because it is the only way to force the $random; sequence to repeat. But the standard does not say that is a capability, and it may be OK to just assume that there is no control over the $random; sequence--if you want repeatability you need to use $random(seed);. I do see some theoretical value to completely decoupling the $random; and $random(seed); variants. That decouples the repeatable ransom streams from the one "I don't care" random stream, and I can imagine rational folks having both. On 09/06/2013 12:02 PM, Stephan Boettcher wrote: > > Thank you. > > VCS and Icarus save the updated seed as the new default seed. > > NC and Modelsim either use a seperate default seed, or maybe do > something else to prevent repeated numbers. Question: Are the > numbers returned by $random without explicit seed affected by the > call to $random(seed) or not at all? > > Stephan > > (I have several streams of randomness, the inputs to the ADCs, and > single event upsets in the SRAM. I want to change the rate of the > SEU without affecting the random inputs. I want to see the effect > of EDAC errors highlighted in the diff of the sim output. I think > I found a way to do that now, but while looking for the solution I > was puzzled by the repeated numbers.) > > > Jared Casper <jar...@gm...> writes: > >> VCS Compiler version G-2012.09-3_Full64; Runtime version >> G-2012.09-3_Full64; Sep 6 10:38 2013 1 2 => >> -2147345408 2 138139 -> -1196295055 3 138139 -> >> -363270956 4 138139 -> 416079665 1a 138139 => >> -1196295055 2a 951188000 -> -363270956 3a 951188000 -> >> 416079665 4a 951188000 -> 540214080 >> >> >> ncverilog: 08.20-s006: (c) Copyright 1995-2009 Cadence Design >> Systems, Inc. 1 2 => -2147345408 2 138139 -> >> 303379748 3 138139 -> -1064739199 4 138139 -> >> -2071669239 1a 138139 => -1196295055 2a 951188000 -> >> -1309649309 3a 951188000 -> 112818957 4a 951188000 -> >> 1189058957 >> >> # // ModelSim SE 10.0a Feb 21 2011 Linux >> 2.6.32-279.14.1.el6.x86_64 # 1 2 => -2147345408 # 2 >> 138139 -> 303379748 # 3 138139 -> -1064739199 # 4 >> 138139 -> -2071669239 # 1a 138139 => -1196295055 # 2a >> 951188000 -> -1309649309 # 3a 951188000 -> 112818957 # 4a >> 951188000 -> 1189058957 (ISim from Xilinx ISE 14.6 gives the >> same as above) >> >> For completeness, I get this from Icarus, which matches VCS 1 >> 2 => -2147345408 2 138139 -> -1196295055 3 138139 -> >> -363270956 4 138139 -> 416079665 1a 138139 => >> -1196295055 2a 951188000 -> -363270956 3a 951188000 -> >> 416079665 4a 951188000 -> 540214080 >> >> It seems VCS does what Icarus does while NC and ModelSim don't >> repeat. >> >> Jared >> >> On Fri, Sep 6, 2013 at 10:23 AM, Cary R. <cy...@ya...> >> wrote: >>> Hi Stephan, >>> >>> My first inclination would be yes. I created a simple example >>> and tested it with gplcver, veriwell and Icarus and for the >>> most part all three gave different results for the $random >>> function, but the seed values were the same. I was certainly >>> not expecting this. I am attaching the code so we can see what >>> other name brand simulators report. $random and seeding is >>> further complicated in continuous assignment code, but I think >>> that is part of the reason constrained random variables were >>> introduced in SystemVerilog. Once we have the results from >>> other simulators we can discuss this more. >>> >>> Cary >>> >>> ________________________________ From: Stephan Boettcher >>> <boe...@ph...> To: Discussions concerning >>> Icarus Verilog development >>> <ive...@li...> Sent: Friday, September >>> 6, 2013 2:03 AM Subject: [Iverilog-devel] $random(seed) >>> >>> >>> Hi, >>> >>> I was looking at how $random(seed) is implemented. As I read >>> the code, if there are calls with an explicit seed argument, >>> mixed with calls without an explicit seed, like >>> >>> a = $random(seed), b = $random; c = $random(seed); >>> >>> b and c will be the same. Is that intended behaviour? >>> >>> Stephan >>> >>> >>> static PLI_INT32 sys_random_calltf(ICARUS_VPI_CONST PLI_BYTE8 >>> *name) { vpiHandle callh, argv, seed = 0; s_vpi_value val; >>> static long i_seed = 0; >>> >>> /* Get the argument list and look for a seed. If it is there, >>> get the value and reseed the random number generator. */ callh >>> = vpi_handle(vpiSysTfCall, 0); argv = vpi_iterate(vpiArgument, >>> callh); val.format = vpiIntVal; if (argv) { seed = >>> vpi_scan(argv); vpi_free_object(argv); vpi_get_value(seed, >>> &val); i_seed = val.value.integer; } >>> >>> /* Calculate and return the result. */ val.value.integer = >>> rtl_dist_uniform(&i_seed, INT_MIN, INT_MAX); >>> vpi_put_value(callh, &val, 0, vpiNoDelay); >>> >>> /* If it exists send the updated seed back to seed parameter. >>> */ if (seed) { val.value.integer = i_seed; vpi_put_value(seed, >>> &val, 0, vpiNoDelay); } >>> >>> return 0; } >>> >>> -- Stephan Böttcher Tel: +49-431-880-2508 >>> Extraterrestrische Physik I.f.Exp.u.Angew.Physik Leibnizstr. >>> 11, 24118 Kiel, Germany >>> >>> ------------------------------------------------------------------------------ >>> >>> Learn the latest--Visual Studio 2012, SharePoint 2013, SQL 2012, more! >>> Discover the easy way to master current and previous Microsoft >>> technologies and advance your career. Get an incredible 1,500+ >>> hours of step-by-step tutorial videos with LearnDevNow. >>> Subscribe today and save! >>> http://pubads.g.doubleclick.net/gampad/clk?id=58041391&iu=/4140/ostg.clktrk >>> >>> _______________________________________________ >>> Iverilog-devel mailing list >>> Ive...@li... >>> https://lists.sourceforge.net/lists/listinfo/iverilog-devel >>> >>> >>> >>> ------------------------------------------------------------------------------ >>> >>> Learn the latest--Visual Studio 2012, SharePoint 2013, SQL 2012, more! >>> Discover the easy way to master current and previous Microsoft >>> technologies and advance your career. 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Subscribe >> today and save! >> http://pubads.g.doubleclick.net/gampad/clk?id=58041391&iu=/4140/ostg.clktrk >> >> _______________________________________________ >> Iverilog-devel mailing list Ive...@li... >> https://lists.sourceforge.net/lists/listinfo/iverilog-devel > - -- Steve Williams "The woods are lovely, dark and deep. steve at icarus.com But I have promises to keep, http://www.icarus.com and lines to code before I sleep, http://www.picturel.com And lines to code before I sleep." -----BEGIN PGP SIGNATURE----- Version: GnuPG v2.0.19 (GNU/Linux) Comment: Using GnuPG with Thunderbird - http://www.enigmail.net/ iEYEARECAAYFAlIqeEsACgkQrPt1Sc2b3ikgSwCdGQu4Lf+u9C8VS350cECfM3Ju /kcAnjpCIfP/G15Ey0ToaUpKpsiuyox/ =JSCP -----END PGP SIGNATURE----- ------------------------------------------------------------------------------ Learn the latest--Visual Studio 2012, SharePoint 2013, SQL 2012, more! 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