Re: [Iverilog-devel] A Horrible Idea Multithreaded Verilog

[Cary R. <cy...@ya...>]

--- On Wed, 5/26/10, Alan Manuel Gloria <alm...@gm...> wrot

> CaryR, what have you implemented in the expression
> rework?  From the description it sounds similar to Kenny
> Tilton's Cells.  How does it handle changes in fanout
> caused by %cassign / %deassign?

The expression rework is at the moment at a very low level. It is
based on an observation I made a few years ago regarding how to
efficiently implement four state operations using just simple C
binary operators. This allows vectors to be processed in parallel
in chunks equal to the native machine word size. Assign/deassign
and force/release would be handled at a higher level. For example
using the standard Verilog four state coding a vector invert can
be represented as a_val = ~a_val | b_val and b_val is unchanged.
For vectors larger than the machine word size you need to loop
over the chunks. This when completed will allow all the vector4
operations to be performed efficiently. Some of this has already
been added to the existing vector4 object.

Once this library is finished my plan is to have the expression
represented as a base object that holds the value going out to
the net, etc. along with knowing when it needs to be evaluate.
A continuous assignment would need to be evaluated whenever an
input changed. An expression connected to a system function or
timing check would only be evaluated when needed. From this base
object the expression would be represented as a tree where forks
are operations. The leaves of the tree will be either constants
or variable accesses. Both a variable access and a constant
access should be simply fetching the vector4 value by reference.

Because functions can have a side effect you need to evaluate an
expression even when a cassign or force is in effect.

Adding real (double) to this requires some translation code, but
the fundamental vector operations are the same.

This rework may also work with procedural expressions. Though
the primary focus is on continuous assignments since they run
all the time. I also plan for the library to be stand alone so
it can be used from the VPI if needed. I'll need to figure out
how to deal with different variable types and how to perform or
prohibit function calls.

Cary