Re: [Iverilog-devel] timescale warning too dumb?

[Cary R. <cy...@ya...>]

--- On Mon, 2/23/09, Stephen Williams <st...@ic...> wrote:

> That's a good point, although it may be a little bit
> tricky to
> implement. Hmm...

My thought was some modification of elaborate_delay_expr().
I believe all delays must be processed there so it is a
good single point to look for problems. You certainly need
some static state information and I have only thought about
this conceptually, so there may be other issues lurking in
the shadows.

Cary