Dears, when I run the command:
iverilog -t vhdl -o bank_reg.vhl Bank_reg.v
I get this message:
AACK! ivl_signal_nex() returning NULL
Assertion failed: (net), function ivl_nexus_get_private, file t-dll-api.cc, line 1373.
Abort trap (core dumped)
The files used to do this beatiful is atached...
This file causes a core dump to icarus verilog when I try translate to VHDL>
I running icarus under FreeBSD 7.1 RELEASE.
Can you try this in the latest version from git? I think it should be fixed there.
Yes, it was.
I did the download from git and compile. The bug does not existe more.
Thanks.