Signed arithmetic behavior in Icarus 0.8.1/0.8.2
doesn't match other Verilog simulators.
A test file that demonstrates the issues is attached.
The Icarus output is:
$ vvp a.out
p= 15659 s= -24 d=1
The output from cver is:
$ cver test.v
GPLCVER_2.11a of 07/05/05 (Linux-elf).
p= -725 s= 40 d=0
To find out which was correct, I have posted the test
file earlier on comp.lang.verilog. It was found that
the cver output matches the output from other
simulators such as modelsim, Cadence ncsim, and
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