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hppaqemu-cvs — CVS commits for the HPPA target for QEMU
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From: Stuart B. <zu...@us...> - 2007-03-12 14:41:21
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Update of /cvsroot/hppaqemu/hppaqemu/target-hppa In directory sc8-pr-cvs5.sourceforge.net:/tmp/cvs-serv9529/target-hppa Modified Files: translate.c Log Message: Define DYNAMIC_PC and JUMP_PC, and store iaoq[1] in dc->cs_base a la the SPARC target. Index: translate.c =================================================================== RCS file: /cvsroot/hppaqemu/hppaqemu/target-hppa/translate.c,v retrieving revision 1.16 retrieving revision 1.17 diff -C2 -d -r1.16 -r1.17 *** translate.c 12 Mar 2007 14:27:29 -0000 1.16 --- translate.c 12 Mar 2007 14:41:14 -0000 1.17 *************** *** 38,41 **** --- 38,45 ---- #endif + #define DYNAMIC_PC 1 /* dynamic PC value */ + #define JUMP_PC 2 /* dynamic PC value which takes only two values + according to jump_pc[T2] */ + typedef struct DisasContext { target_ulong iaoq[2]; |
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From: Stuart B. <zu...@us...> - 2007-03-12 14:41:18
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Update of /cvsroot/hppaqemu/hppaqemu In directory sc8-pr-cvs5.sourceforge.net:/tmp/cvs-serv9529 Modified Files: cpu-exec.c Log Message: Define DYNAMIC_PC and JUMP_PC, and store iaoq[1] in dc->cs_base a la the SPARC target. Index: cpu-exec.c =================================================================== RCS file: /cvsroot/hppaqemu/hppaqemu/cpu-exec.c,v retrieving revision 1.5 retrieving revision 1.6 diff -C2 -d -r1.5 -r1.6 *** cpu-exec.c 6 Mar 2007 14:41:50 -0000 1.5 --- cpu-exec.c 12 Mar 2007 14:41:14 -0000 1.6 *************** *** 204,209 **** pc = env->pc; #elif defined(TARGET_HPPA) ! flags = env->psw; ! cs_base = 0; pc = env->iaoq[0]; #else --- 204,209 ---- pc = env->pc; #elif defined(TARGET_HPPA) ! flags = env->psw & PSW_N; /* XXX: use more bits? */ ! cs_base = env->iaoq[1]; pc = env->iaoq[0]; #else |
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From: Stuart B. <zu...@us...> - 2007-03-12 14:27:35
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Update of /cvsroot/hppaqemu/hppaqemu/target-hppa In directory sc8-pr-cvs5.sourceforge.net:/tmp/cvs-serv4875/target-hppa Modified Files: op.c translate.c Log Message: Correct decimal correction. Index: translate.c =================================================================== RCS file: /cvsroot/hppaqemu/hppaqemu/target-hppa/translate.c,v retrieving revision 1.15 retrieving revision 1.16 diff -C2 -d -r1.15 -r1.16 *** translate.c 12 Mar 2007 14:08:32 -0000 1.15 --- translate.c 12 Mar 2007 14:27:29 -0000 1.16 *************** *** 1316,1320 **** gen_op_undef_insn(); else { ! gen_op_movl_T1_T0(); gen_op_dcor_T0(); } --- 1316,1320 ---- gen_op_undef_insn(); else { ! gen_op_copy_T0_T1(); gen_op_dcor_T0(); } *************** *** 1324,1328 **** gen_op_undef_insn(); else { ! gen_op_movl_T1_T0(); gen_op_idcor_T0(); } --- 1324,1328 ---- gen_op_undef_insn(); else { ! gen_op_copy_T0_T1(); gen_op_idcor_T0(); } Index: op.c =================================================================== RCS file: /cvsroot/hppaqemu/hppaqemu/target-hppa/op.c,v retrieving revision 1.13 retrieving revision 1.14 diff -C2 -d -r1.13 -r1.14 *** op.c 12 Mar 2007 14:08:32 -0000 1.13 --- op.c 12 Mar 2007 14:27:29 -0000 1.14 *************** *** 719,742 **** void OPPROTO op_dcor_T0(void) { ! T0 -= (((0x6 * (1 - PSW_CB0)) << 4) | ! (((0x6 * (1 - PSW_CB1)) << 4) | ! (((0x6 * (1 - PSW_CB2)) << 4) | ! (((0x6 * (1 - PSW_CB3)) << 4) | ! (((0x6 * (1 - PSW_CB4)) << 4) | ! (((0x6 * (1 - PSW_CB5)) << 4) | ! (((0x6 * (1 - PSW_CB6)) << 4) | ! (((0x6 * (1 - PSW_CB7))))))))))); } void OPPROTO op_idcor_T0(void) { ! T0 += (((0x6 * PSW_CB0) << 4) | ! (((0x6 * PSW_CB1) << 4) | ! (((0x6 * PSW_CB2) << 4) | ! (((0x6 * PSW_CB3) << 4) | ! (((0x6 * PSW_CB4) << 4) | ! (((0x6 * PSW_CB5) << 4) | ! (((0x6 * PSW_CB6) << 4) | ! (((0x6 * PSW_CB7)))))))))); } --- 719,742 ---- void OPPROTO op_dcor_T0(void) { ! T0 -= (((0x6 * (1 - (env->psw & PSW_CB7))) << 4) | ! (((0x6 * (1 - (env->psw & PSW_CB6))) << 4) | ! (((0x6 * (1 - (env->psw & PSW_CB5))) << 4) | ! (((0x6 * (1 - (env->psw & PSW_CB4))) << 4) | ! (((0x6 * (1 - (env->psw & PSW_CB3))) << 4) | ! (((0x6 * (1 - (env->psw & PSW_CB2))) << 4) | ! (((0x6 * (1 - (env->psw & PSW_CB1))) << 4) | ! (((0x6 * (1 - (env->psw & PSW_CB0)))))))))))); } void OPPROTO op_idcor_T0(void) { ! T0 += (((0x6 * (env->psw & PSW_CB7)) << 4) | ! (((0x6 * (env->psw & PSW_CB6)) << 4) | ! (((0x6 * (env->psw & PSW_CB5)) << 4) | ! (((0x6 * (env->psw & PSW_CB4)) << 4) | ! (((0x6 * (env->psw & PSW_CB3)) << 4) | ! (((0x6 * (env->psw & PSW_CB2)) << 4) | ! (((0x6 * (env->psw & PSW_CB1)) << 4) | ! (((0x6 * (env->psw & PSW_CB0))))))))))); } |
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From: Stuart B. <zu...@us...> - 2007-03-12 14:08:38
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Update of /cvsroot/hppaqemu/hppaqemu/target-hppa In directory sc8-pr-cvs5.sourceforge.net:/tmp/cvs-serv29054 Modified Files: op.c translate.c Log Message: Implement decimal correction operations. Index: translate.c =================================================================== RCS file: /cvsroot/hppaqemu/hppaqemu/target-hppa/translate.c,v retrieving revision 1.14 retrieving revision 1.15 diff -C2 -d -r1.14 -r1.15 *** translate.c 11 Mar 2007 16:11:36 -0000 1.14 --- translate.c 12 Mar 2007 14:08:32 -0000 1.15 *************** *** 1315,1326 **** if (r1 != 0) gen_op_undef_insn(); ! else gen_op_dcor_T0(); break; case 0x2F: /* IDCOR */ if (r1 != 0) gen_op_undef_insn(); ! else gen_op_idcor_T0(); break; default: /* Undefined Instruction */ --- 1315,1330 ---- if (r1 != 0) gen_op_undef_insn(); ! else { ! gen_op_movl_T1_T0(); gen_op_dcor_T0(); + } break; case 0x2F: /* IDCOR */ if (r1 != 0) gen_op_undef_insn(); ! else { ! gen_op_movl_T1_T0(); gen_op_idcor_T0(); + } break; default: /* Undefined Instruction */ Index: op.c =================================================================== RCS file: /cvsroot/hppaqemu/hppaqemu/target-hppa/op.c,v retrieving revision 1.12 retrieving revision 1.13 diff -C2 -d -r1.12 -r1.13 *** op.c 11 Mar 2007 16:11:36 -0000 1.12 --- op.c 12 Mar 2007 14:08:32 -0000 1.13 *************** *** 719,728 **** void OPPROTO op_dcor_T0(void) { ! /* XXX */ } void OPPROTO op_idcor_T0(void) { ! /* XXX */ } --- 719,742 ---- void OPPROTO op_dcor_T0(void) { ! T0 -= (((0x6 * (1 - PSW_CB0)) << 4) | ! (((0x6 * (1 - PSW_CB1)) << 4) | ! (((0x6 * (1 - PSW_CB2)) << 4) | ! (((0x6 * (1 - PSW_CB3)) << 4) | ! (((0x6 * (1 - PSW_CB4)) << 4) | ! (((0x6 * (1 - PSW_CB5)) << 4) | ! (((0x6 * (1 - PSW_CB6)) << 4) | ! (((0x6 * (1 - PSW_CB7))))))))))); } void OPPROTO op_idcor_T0(void) { ! T0 += (((0x6 * PSW_CB0) << 4) | ! (((0x6 * PSW_CB1) << 4) | ! (((0x6 * PSW_CB2) << 4) | ! (((0x6 * PSW_CB3) << 4) | ! (((0x6 * PSW_CB4) << 4) | ! (((0x6 * PSW_CB5) << 4) | ! (((0x6 * PSW_CB6) << 4) | ! (((0x6 * PSW_CB7)))))))))); } |
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From: Randolph C. <ta...@us...> - 2007-03-11 16:11:44
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Update of /cvsroot/hppaqemu/hppaqemu/target-hppa In directory sc8-pr-cvs5.sourceforge.net:/tmp/cvs-serv1156/target-hppa Modified Files: op.c translate.c Log Message: redo the translation loop a bit start implementing some of the extract/deposit insns Index: translate.c =================================================================== RCS file: /cvsroot/hppaqemu/hppaqemu/target-hppa/translate.c,v retrieving revision 1.13 retrieving revision 1.14 diff -C2 -d -r1.13 -r1.14 *** translate.c 11 Mar 2007 13:43:27 -0000 1.13 --- translate.c 11 Mar 2007 16:11:36 -0000 1.14 *************** *** 32,38 **** #define DEBUG_DISAS ! #define DYNAMIC_PC 1 /* dynamic pc value */ ! #define JUMP_PC 2 /* dynamic pc value which takes only two values ! according to jump_pc[T2] */ typedef struct DisasContext { --- 32,40 ---- #define DEBUG_DISAS ! #ifdef USE_DIRECT_JUMP ! #define TBPARAM(x) ! #else ! #define TBPARAM(x) (long)(x) ! #endif typedef struct DisasContext { *************** *** 40,44 **** target_ulong iasq[2]; unsigned int is_br:1; - unsigned int delay_slot_filled:1; struct TranslationBlock *tb; } DisasContext; --- 42,45 ---- *************** *** 476,482 **** }; ! static GenOpFunc1 *gen_op_movl_TN_im[2] = { gen_op_movl_T0_im, gen_op_movl_T1_im, }; --- 477,484 ---- }; ! static GenOpFunc1 *gen_op_movl_TN_im[3] = { gen_op_movl_T0_im, gen_op_movl_T1_im, + gen_op_movl_T2_im, }; *************** *** 496,499 **** --- 498,506 ---- } + static void gen_movl_T2_im(int val) + { + gen_movl_TN_im(2, val); + } + #define gen_op_ldst(name) gen_op_##name##_raw() *************** *** 606,615 **** target_ulong pc, target_ulong npc) { ! dc->is_br = 1; } static void gen_branch(DisasContext *dc, long tb, target_ulong pc, target_ulong npc) { ! gen_goto_tb(dc, 0, pc, npc); } --- 613,641 ---- target_ulong pc, target_ulong npc) { ! TranslationBlock *tb; ! tb = dc->tb; ! if ((tb->pc & TARGET_PAGE_MASK) == (pc & TARGET_PAGE_MASK)) { ! if (tb_num == 0) ! gen_op_goto_tb0(TBPARAM(tb)); ! else ! gen_op_goto_tb1(TBPARAM(tb)); ! gen_op_save_pc(pc, npc); ! gen_movl_T0_im((long)tb + tb_num); ! gen_op_exit_tb(); ! } else { ! gen_op_save_pc(pc, npc); ! gen_movl_T0_im(0); ! gen_op_exit_tb(); ! } } static void gen_branch(DisasContext *dc, long tb, target_ulong pc, target_ulong npc) { ! gen_goto_tb(dc, tb, pc, npc); ! } ! ! static void save_state(DisasContext *dc) ! { ! /* XXX */ } *************** *** 635,649 **** nb_gen_labels = 0; ! do { if (env->nb_breakpoints > 0) { for(j = 0; j < env->nb_breakpoints; j++) { if (env->breakpoints[j] == dc->iaoq[0]) { ! /* ! if (dc->iaoq[0] != pc_start) ! save_state(dc); gen_op_debug(); - gen_op_movl_T0_GR0(); - gen_op_exit_tb(); - */ dc->is_br = 1; goto exit_gen_loop; --- 661,671 ---- nb_gen_labels = 0; ! while (!dc->is_br && gen_opc_ptr < gen_opc_end) ! { if (env->nb_breakpoints > 0) { for(j = 0; j < env->nb_breakpoints; j++) { if (env->breakpoints[j] == dc->iaoq[0]) { ! save_state(dc); gen_op_debug(); dc->is_br = 1; goto exit_gen_loop; *************** *** 668,674 **** if (dc->is_br) break; - /* if the next PC is different, we abort now */ - if (dc->iaoq[0] != (last_pc + 4)) - break; /* if we reach a page boundary, we stop generation so that the PC of a TT_TFAULT exception is always in the right page */ --- 690,693 ---- *************** *** 677,705 **** /* if single step mode, we generate only one instruction and generate an exception */ ! if (env->singlestep_enabled) { ! gen_op_jmp_im(dc->iaoq[0]); ! gen_op_movl_T0_gr0(); ! gen_op_exit_tb(); ! break; ! } ! } while ((gen_opc_ptr < gen_opc_end) && ! (dc->iaoq[0] - pc_start) < (TARGET_PAGE_SIZE - 32)); exit_gen_loop: - if (!dc->is_br) { - if (dc->iaoq[0] != DYNAMIC_PC && - (dc->iaoq[1] != DYNAMIC_PC && dc->iaoq[1] != JUMP_PC)) { - /* static PC and NPC: we can use direct chaining */ - gen_branch(dc, (long)tb, dc->iaoq[0], dc->iaoq[1]); - } else { - if (dc->iaoq[0] != DYNAMIC_PC) - gen_op_jmp_im(dc->iaoq[0]); - /* - save_npc(dc); - gen_op_movl_T0_GR0(); - */ - gen_op_exit_tb(); - } - } *gen_opc_ptr = INDEX_op_end; if (search_pc) { --- 696,716 ---- /* if single step mode, we generate only one instruction and generate an exception */ ! if (env->singlestep_enabled) ! break; ! } ! if (env->singlestep_enabled) ! { ! save_state(dc); ! gen_op_debug(); ! goto exit_gen_loop; ! } ! else if (!dc->is_br) ! { ! save_state(dc); ! gen_goto_tb(dc, 0, dc->iaoq[0], dc->iaoq[1]); ! } ! gen_op_exit_tb(); exit_gen_loop: *gen_opc_ptr = INDEX_op_end; if (search_pc) { *************** *** 889,892 **** --- 900,955 ---- } + + static void gen_shrpw(uint32_t insn) + { + uint32_t r1 = field(insn, 16, 5); + uint32_t r2 = field(insn, 21, 5); + uint32_t t = field(insn, 0, 5); + + gen_movl_T1_reg(r1); + gen_movl_T2_reg(r2); + gen_op_shrpw_cc(); + gen_movl_reg_T0(t); + } + + static void gen_extrw(uint32_t insn) + { + uint32_t r = field(insn, 21, 5); + uint32_t t = field(insn, 16, 5); + uint32_t clen = 32 - field(insn, 0, 5); + int se = field(insn, 10, 1); + + gen_movl_T1_im(clen); + gen_movl_T2_reg(r); + gen_op_extrw_cc(); + gen_movl_reg_T0(t); + } + + static void gen_depw(uint32_t insn) + { + uint32_t t = field(insn, 21, 5); + uint32_t r = field(insn, 16, 5); + uint32_t clen = 32 - field(insn, 0, 5); + int nz = field(insn, 10, 1); + + gen_movl_T1_im(clen); + gen_movl_T2_reg(r); + gen_op_depw_cc(); + gen_movl_reg_T0(t); + } + + static void gen_depwi(uint32_t insn) + { + uint32_t t = field(insn, 21, 5); + uint32_t im5 = field_signext(insn, 16, 5); + uint32_t clen = 32 - field(insn, 0, 5); + int nz = field(insn, 10, 1); + + gen_movl_T1_im(clen); + gen_movl_T2_im(im5); + gen_op_depw_cc(); + gen_movl_reg_T0(t); + } + static void disas_hppa_insn(DisasContext * dc) { *************** *** 1530,1540 **** ext3 = field(insn, 10, 3); switch(ext3) { ! case 0: /* VSHD */ ! case 2: /* SHD */ ! case 4: /* VEXTRU */ ! case 5: /* VEXTRS */ ! case 6: /* EXTRU */ ! case 7: /* EXTRS */ break; } break; --- 1593,1620 ---- ext3 = field(insn, 10, 3); switch(ext3) { ! case 0: /* VSHD = SHRPW with SAR */ ! gen_movl_T0_cr(11); ! gen_shrpw(insn); ! break; ! case 2: /* SHD = SHRPW */ ! { ! uint32_t sa = 31 - field(insn, 5, 5); ! gen_movl_T0_im(sa); ! gen_shrpw(insn); ! break; ! } ! case 4: /* VEXTRU = EXTRW,U with SAR */ ! case 5: /* VEXTRS = EXTRW,S with SAR */ ! gen_movl_T0_cr(11); ! gen_extrw(insn); ! break; ! case 6: /* EXTRU = EXTRW,U */ ! case 7: /* EXTRS = EXTRW,S */ ! { ! uint32_t pos = field(insn, 5, 5); ! gen_movl_T0_im(pos); ! gen_extrw(insn); break; + } } break; *************** *** 1546,1558 **** ext3 = field(insn, 10, 3); switch(ext3) { ! case 0: /* VZDEP */ ! case 1: /* VDEP */ ! case 2: /* ZDEP */ ! case 3: /* DEP */ ! case 4: /* VZDEPI */ ! case 5: /* VDEPI */ ! case 6: /* ZDEPI */ ! case 7: /* DEPI */ ! break; } break; --- 1626,1655 ---- ext3 = field(insn, 10, 3); switch(ext3) { ! case 0: /* VZDEP = DEPW,Z with SAR */ ! case 1: /* VDEP = DEPW with SAR */ ! gen_movl_T0_cr(11); ! gen_depw(insn); ! break; ! case 2: /* ZDEP = DEPW,Z */ ! case 3: /* DEP = DEPW */ ! { ! uint32_t cpos = field(insn, 5, 5); ! gen_movl_T0_im(cpos); ! gen_depw(insn); ! break; ! } ! case 4: /* VZDEPI = DEPW,Z */ ! case 5: /* VDEPI = DEPW,Z */ ! gen_movl_T0_cr(11); ! gen_depwi(insn); ! break; ! case 6: /* ZDEPI = DEPWI,Z */ ! case 7: /* DEPI = DEPWI */ ! { ! uint32_t cpos = field(insn, 5, 5); ! gen_movl_T0_im(cpos); ! gen_depwi(insn); ! break; ! } } break; *************** *** 1590,1593 **** --- 1687,1691 ---- case 0: /* BL */ /* generate (iaoq_next <- iaoq_front + disp + 8) */ + gen_branch(dc, 0, dc->iaoq[0] + disp + 8, dc->iaoq[0] + disp + 12); /* generate (copy iaoq_back + 4 into t) */ /* if (n) generate (psw |= PSW_N); */ Index: op.c =================================================================== RCS file: /cvsroot/hppaqemu/hppaqemu/target-hppa/op.c,v retrieving revision 1.11 retrieving revision 1.12 diff -C2 -d -r1.11 -r1.12 *** op.c 11 Mar 2007 13:43:26 -0000 1.11 --- op.c 11 Mar 2007 16:11:36 -0000 1.12 *************** *** 277,280 **** --- 277,285 ---- } + void OPPROTO op_movl_T2_im(void) + { + T2 = PARAM1; + } + #define OP_COPY(_t1, _t2) \ void OPPROTO op_copy_##_t1##_##_t2(void) \ *************** *** 318,321 **** --- 323,331 ---- } + void OPPROTO op_debug(void) + { + raise_exception(EXCP_DEBUG); + } + /* System operations */ void OPPROTO op_break(void) *************** *** 717,720 **** --- 727,767 ---- } + /* Shift/deposit insns */ + void OPPROTO op_shrpw_cc(void) + { + /* INPUT: T0 = shift amount, T1 and T2 = register pair values */ + /* OUTPUT: T0 */ + T0 &= 0x1f; + T0 = (T1 << (32 - T0)) | (T2 >> T0); + } + + void OPPROTO op_extrw_cc(void) + { + /* INPUT: T0 = shift pos, T1 = shift len, T2 = in value */ + /* OUTPUT: T0 */ + } + + void OPPROTO op_depw_cc(void) + { + /* INPUT: T0 = shift pos, T1 = shift len, T2 = in value */ + /* OUTPUT: T0 */ + } + + void OPPROTO op_save_pc(void) + { + env->iaoq[0] = PARAM1; + env->iaoq[1] = PARAM2; + } + + void OPPROTO op_goto_tb0(void) + { + GOTO_TB(op_goto_tb0, PARAM1, 0); + } + + void OPPROTO op_goto_tb1(void) + { + GOTO_TB(op_goto_tb1, PARAM1, 0); + } + void OPPROTO op_exit_tb(void) { |
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From: Randolph C. <ta...@us...> - 2007-03-11 13:43:43
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Update of /cvsroot/hppaqemu/hppaqemu/target-hppa In directory sc8-pr-cvs5.sourceforge.net:/tmp/cvs-serv3028/target-hppa Modified Files: op.c op_mem.h op_template.h translate.c Log Message: implement indexed and short displacement load and stores Index: translate.c =================================================================== RCS file: /cvsroot/hppaqemu/hppaqemu/target-hppa/translate.c,v retrieving revision 1.12 retrieving revision 1.13 diff -C2 -d -r1.12 -r1.13 *** translate.c 9 Mar 2007 23:46:36 -0000 1.12 --- translate.c 11 Mar 2007 13:43:27 -0000 1.13 *************** *** 39,43 **** target_ulong iaoq[2]; target_ulong iasq[2]; ! int is_br; struct TranslationBlock *tb; } DisasContext; --- 39,44 ---- target_ulong iaoq[2]; target_ulong iasq[2]; ! unsigned int is_br:1; ! unsigned int delay_slot_filled:1; struct TranslationBlock *tb; } DisasContext; *************** *** 79,83 **** } ! static GenOpFunc *gen_op_movl_TN_reg[2][32] = { { --- 80,84 ---- } ! static GenOpFunc *gen_op_movl_TN_reg[3][32] = { { *************** *** 147,154 **** gen_op_movl_gr30_T1, gen_op_movl_gr31_T1, } }; ! static GenOpFunc *gen_op_movl_reg_TN[2][32] = { { --- 148,188 ---- gen_op_movl_gr30_T1, gen_op_movl_gr31_T1, + }, { + gen_op_movl_gr0_T2, + gen_op_movl_gr1_T2, + gen_op_movl_gr2_T2, + gen_op_movl_gr3_T2, + gen_op_movl_gr4_T2, + gen_op_movl_gr5_T2, + gen_op_movl_gr6_T2, + gen_op_movl_gr7_T2, + gen_op_movl_gr8_T2, + gen_op_movl_gr9_T2, + gen_op_movl_gr10_T2, + gen_op_movl_gr11_T2, + gen_op_movl_gr12_T2, + gen_op_movl_gr13_T2, + gen_op_movl_gr14_T2, + gen_op_movl_gr15_T2, + gen_op_movl_gr16_T2, + gen_op_movl_gr17_T2, + gen_op_movl_gr18_T2, + gen_op_movl_gr19_T2, + gen_op_movl_gr20_T2, + gen_op_movl_gr21_T2, + gen_op_movl_gr22_T2, + gen_op_movl_gr23_T2, + gen_op_movl_gr24_T2, + gen_op_movl_gr25_T2, + gen_op_movl_gr26_T2, + gen_op_movl_gr27_T2, + gen_op_movl_gr28_T2, + gen_op_movl_gr29_T2, + gen_op_movl_gr30_T2, + gen_op_movl_gr31_T2, } }; ! static GenOpFunc *gen_op_movl_reg_TN[3][32] = { { *************** *** 218,221 **** --- 252,288 ---- gen_op_movl_T1_gr30, gen_op_movl_T1_gr31, + }, { + gen_op_movl_T2_gr0, + gen_op_movl_T2_gr1, + gen_op_movl_T2_gr2, + gen_op_movl_T2_gr3, + gen_op_movl_T2_gr4, + gen_op_movl_T2_gr5, + gen_op_movl_T2_gr6, + gen_op_movl_T2_gr7, + gen_op_movl_T2_gr8, + gen_op_movl_T2_gr9, + gen_op_movl_T2_gr10, + gen_op_movl_T2_gr11, + gen_op_movl_T2_gr12, + gen_op_movl_T2_gr13, + gen_op_movl_T2_gr14, + gen_op_movl_T2_gr15, + gen_op_movl_T2_gr16, + gen_op_movl_T2_gr17, + gen_op_movl_T2_gr18, + gen_op_movl_T2_gr19, + gen_op_movl_T2_gr20, + gen_op_movl_T2_gr21, + gen_op_movl_T2_gr22, + gen_op_movl_T2_gr23, + gen_op_movl_T2_gr24, + gen_op_movl_T2_gr25, + gen_op_movl_T2_gr26, + gen_op_movl_T2_gr27, + gen_op_movl_T2_gr28, + gen_op_movl_T2_gr29, + gen_op_movl_T2_gr30, + gen_op_movl_T2_gr31, } }; *************** *** 414,434 **** }; ! #define gen_op_ldst(name) gen_op_##name##_raw() ! ! static void gen_movl_imm_TN(int reg, int val) { gen_op_movl_TN_im[reg](val); } ! static void gen_movl_imm_T0(int val) { ! gen_movl_imm_TN(0, val); } ! static void gen_movl_imm_T1(int val) { ! gen_movl_imm_TN(1, val); } /* General registers */ static void gen_movl_reg_TN(int reg, int t) --- 481,501 ---- }; ! static void gen_movl_TN_im(int reg, int val) { gen_op_movl_TN_im[reg](val); } ! static void gen_movl_T0_im(int val) { ! gen_movl_TN_im(0, val); } ! static void gen_movl_T1_im(int val) { ! gen_movl_TN_im(1, val); } + #define gen_op_ldst(name) gen_op_##name##_raw() + /* General registers */ static void gen_movl_reg_TN(int reg, int t) *************** *** 447,450 **** --- 514,522 ---- } + static void gen_movl_reg_T2(int reg) + { + gen_movl_reg_TN(reg, 2); + } + static void gen_movl_TN_reg(int reg, int t) { *************** *** 462,465 **** --- 534,542 ---- } + static void gen_movl_T2_reg(int reg) + { + gen_movl_TN_reg(reg, 2); + } + /* Control registers */ static void gen_movl_cr_T0(int cr) *************** *** 507,510 **** --- 584,606 ---- #define gen_shift_T1(s) gen_op_shift##s##_T1() + static GenOpFunc *gen_op_shift_TN[2][4] = { + { + NULL, + gen_op_shift1_T0, + gen_op_shift2_T0, + gen_op_shift3_T0, + }, { + NULL, + gen_op_shift1_T1, + gen_op_shift2_T1, + gen_op_shift3_T1, + } + }; + + static void gen_shift_TN(int t, int shift) + { + gen_op_shift_TN[t][shift](); + } + static void gen_goto_tb(DisasContext *dc, int tb_num, target_ulong pc, target_ulong npc) *************** *** 543,554 **** for(j = 0; j < env->nb_breakpoints; j++) { if (env->breakpoints[j] == dc->iaoq[0]) { ! /* ! if (dc->iaoq[0] != pc_start) ! save_state(dc); gen_op_debug(); ! gen_op_movl_T0_GR0(); ! gen_op_exit_tb(); ! */ ! dc->is_br = 1; goto exit_gen_loop; } --- 639,650 ---- for(j = 0; j < env->nb_breakpoints; j++) { if (env->breakpoints[j] == dc->iaoq[0]) { ! /* ! if (dc->iaoq[0] != pc_start) ! save_state(dc); gen_op_debug(); ! gen_op_movl_T0_GR0(); ! gen_op_exit_tb(); ! */ ! dc->is_br = 1; goto exit_gen_loop; } *************** *** 567,578 **** } } ! last_pc = dc->iaoq[0]; ! disas_hppa_insn(dc); ! if (dc->is_br) ! break; ! /* if the next PC is different, we abort now */ ! if (dc->iaoq[0] != (last_pc + 4)) ! break; /* if we reach a page boundary, we stop generation so that the PC of a TT_TFAULT exception is always in the right page */ --- 663,674 ---- } } ! last_pc = dc->iaoq[0]; ! disas_hppa_insn(dc); ! if (dc->is_br) ! break; ! /* if the next PC is different, we abort now */ ! if (dc->iaoq[0] != (last_pc + 4)) ! break; /* if we reach a page boundary, we stop generation so that the PC of a TT_TFAULT exception is always in the right page */ *************** *** 588,592 **** } } while ((gen_opc_ptr < gen_opc_end) && ! (dc->iaoq[0] - pc_start) < (TARGET_PAGE_SIZE - 32)); exit_gen_loop: --- 684,688 ---- } } while ((gen_opc_ptr < gen_opc_end) && ! (dc->iaoq[0] - pc_start) < (TARGET_PAGE_SIZE - 32)); exit_gen_loop: *************** *** 599,606 **** if (dc->iaoq[0] != DYNAMIC_PC) gen_op_jmp_im(dc->iaoq[0]); ! /* save_npc(dc); gen_op_movl_T0_GR0(); ! */ gen_op_exit_tb(); } --- 695,702 ---- if (dc->iaoq[0] != DYNAMIC_PC) gen_op_jmp_im(dc->iaoq[0]); ! /* save_npc(dc); gen_op_movl_T0_GR0(); ! */ gen_op_exit_tb(); } *************** *** 627,634 **** #ifdef DEBUG_DISAS if (loglevel & CPU_LOG_TB_IN_ASM) { ! fprintf(logfile, "--------------\n"); ! fprintf(logfile, "IN: %s\n", lookup_symbol(pc_start)); ! target_disas(logfile, pc_start, last_pc + 4 - pc_start, 0); ! fprintf(logfile, "\n"); if (loglevel & CPU_LOG_TB_OP) { fprintf(logfile, "OP:\n"); --- 723,730 ---- #ifdef DEBUG_DISAS if (loglevel & CPU_LOG_TB_IN_ASM) { ! fprintf(logfile, "--------------\n"); ! fprintf(logfile, "IN: %s\n", lookup_symbol(pc_start)); ! target_disas(logfile, pc_start, last_pc + 4 - pc_start, 0); ! fprintf(logfile, "\n"); if (loglevel & CPU_LOG_TB_OP) { fprintf(logfile, "OP:\n"); *************** *** 651,654 **** --- 747,892 ---- } + #define LDST_CMPLT_NONE 0 + #define LDST_CMPLT_S 1 + #define LDST_CMPLT_SM 2 + #define LDST_CMPLT_M 3 + #define LDST_CMPLT_MA 4 + #define LDST_CMPLT_MB 5 + + static int get_ldst_cmplt(uint32_t insn) + { + int indexed_load = (field(insn, 12, 1) == 0); + if (indexed_load) + { + int u = field(insn, 13, 1); + int m = field(insn, 5, 1); + + if (u == 0 && m == 0) + return LDST_CMPLT_NONE; + else if (u == 0 && m == 1) + return LDST_CMPLT_M; + else if (u == 1 && m == 0) + return LDST_CMPLT_S; + else if (u == 1 && m == 1) + return LDST_CMPLT_SM; + } + else + { + int a = field(insn, 13, 1); + int m = field(insn, 5, 1); + uint32_t ext4 = field(insn, 6, 4); + uint32_t im5; + if (ext4 <= 7) /* load */ + im5 = field_signext(insn, 16, 5); + else /* store */ + im5 = field_signext(insn, 0, 5); + + if (m == 0) + return LDST_CMPLT_NONE; + else if (a == 0 && m == 1 && im5 != 0) + return LDST_CMPLT_MA; + else if (a == 1 && m == 1) + return LDST_CMPLT_MB; + } + return LDST_CMPLT_NONE; + } + + static void gen_load(uint32_t insn, int shift, GenOpFunc *op) + { + int indexed_load = (field(insn, 12, 1) == 0); + int cmplt = get_ldst_cmplt(insn); + uint32_t b = field(insn, 21, 5); + uint32_t t = field(insn, 0, 5); + + /* load value at address T0 to T1 */ + + if (indexed_load) + { + uint32_t x = field(insn, 16, 5); + switch (cmplt) + { + case LDST_CMPLT_S: + case LDST_CMPLT_SM: + gen_movl_T0_reg(x); + gen_shift_TN(0, shift); + break; + case LDST_CMPLT_M: + default: + gen_movl_T0_reg(x); + break; + } + } + else + { + uint32_t im5 = field_signext(insn, 16, 5); + gen_movl_T0_im(im5); + } + + switch (cmplt) + { + case LDST_CMPLT_MB: + /* dx in T0 */ + gen_movl_T1_reg(b); + gen_op_copy_T2_T0(); /* copy dx to T2 */ + gen_op_addl_T0_T1(); /* T0 = GR[b] + dx */ + gen_op_addl_T1_T2(); /* GR[b] += dx */ + gen_movl_reg_T1(b); + break; + case LDST_CMPLT_MA: + case LDST_CMPLT_M: + case LDST_CMPLT_SM: + /* dx in T0 */ + gen_movl_T1_reg(b); + gen_op_copy_T2_T1(); + gen_op_addl_T1_T0(); /* GR[b] += dx */ + gen_movl_reg_T1(b); + gen_op_copy_T0_T2(); /* T0 = GR[b] */ + break; + default: + /* dx in T0 */ + gen_movl_T1_reg(b); + gen_op_addl_T0_T1(); /* T0 = GR[b] + dx */ + break; + } + + op(); + gen_movl_reg_T1(t); + } + + static void gen_store(uint32_t insn, GenOpFunc *op) + { + uint32_t im5 = field_signext(insn, 0, 5); + uint32_t r = field(insn, 16, 5); + uint32_t b = field(insn, 21, 5); + int cmplt = get_ldst_cmplt(insn); + + /* store T1 at address T0 */ + + gen_movl_T0_im(im5); + switch (cmplt) + { + case LDST_CMPLT_MB: + gen_movl_T1_reg(b); + gen_op_copy_T2_T0(); /* T2 = dx */ + gen_op_addl_T0_T1(); /* offset = GR[b] + dx */ + gen_op_addl_T1_T2(); /* GR[b] += dx */ + gen_movl_reg_T1(b); + break; + case LDST_CMPLT_MA: + gen_movl_T1_reg(b); + gen_op_copy_T2_T1(); /* T2 = GR[b] */ + gen_op_addl_T1_T0(); /* GR[b] += dx */ + gen_movl_reg_T1(b); + gen_op_copy_T0_T2(); /* offset = GR[b] */ + break; + default: + gen_movl_T1_reg(b); + gen_op_addl_T0_T1(); /* offset = GR[b] + dx */ + break; + } + gen_movl_T1_reg(r); + op(); + } + static void disas_hppa_insn(DisasContext * dc) { *************** *** 688,700 **** switch(ext8) { case 0x00: /* BREAK */ ! gen_op_break(); ! break; case 0x20: /* SYNC, SYNCDMAA */ ! if (field(insn, 20, 1)) ! gen_op_syncdma(); else ! gen_op_sync(); ! break; case 0x60: /* RFI */ --- 926,938 ---- switch(ext8) { case 0x00: /* BREAK */ ! gen_op_break(); ! break; case 0x20: /* SYNC, SYNCDMAA */ ! if (field(insn, 20, 1)) ! gen_op_syncdma(); else ! gen_op_sync(); ! break; case 0x60: /* RFI */ *************** *** 710,713 **** --- 948,952 ---- case 0x6b: /* SSM */ + gen_op_check_priv0(); gen_op_ssm(field(insn, 16, 7)); gen_movl_reg_T0(field(insn, 0, 5)); *************** *** 715,718 **** --- 954,958 ---- case 0x73: /* RSM */ + gen_op_check_priv0(); gen_op_rsm(field(insn, 16, 7)); gen_movl_reg_T0(field(insn, 0, 5)); *************** *** 720,723 **** --- 960,964 ---- case 0xc3: /* MTSM */ + gen_op_check_priv0(); gen_movl_T0_reg(field(insn, 16, 5)); gen_op_mtsm(); *************** *** 745,748 **** --- 986,991 ---- uint32_t sr = field(insn, 13, 3); uint32_t t = field(insn, 0, 5); + if (sr >= 3) + gen_op_check_priv0(); gen_movl_T0_sr(sr); gen_movl_reg_T0(t); *************** *** 750,756 **** --- 993,1081 ---- } case 0xc2: /* MTCTL */ + { + uint32_t t, r; + t = field(insn, 21, 5); + r = field(insn, 16, 5); + if (t >= 1 && t < 7) + break; + if (t != 11) + gen_op_check_priv0(); + switch (t) + { + case 0: /* recovery counter */ + /* TODO: mask 32-bits for 64-bit op */ + case 14: + case 15: + case 16: + case 24: + case 25: + case 26: + case 27: + case 28: + case 29: + case 30: + case 31: + case 8: /* PID0 */ + case 9: /* PID1 */ + case 12: /* PID2 */ + case 13: /* PID3 */ + /* Undefined in PSW[Q] set */ + case 17: + case 18: + case 20: + case 21: + case 22: + gen_movl_T0_reg(r); + gen_movl_cr_T0(0); + break; + + case 23: + gen_movl_T0_cr(23); + gen_movl_T1_reg(r); + gen_op_andcm_T1_T0(); + gen_movl_cr_T0(23); + break; + + case 10: /* CCR/SCR */ + case 11: /* SAR - handled differently on 64-bit */ + gen_movl_T0_reg(r); + gen_op_movl_T1_im(0xffff); + gen_op_and_T1_T0(); + gen_movl_cr_T0(10); + break; + } + break; + } case 0x45: /* MFCTL */ + { + uint32_t r, t; + r = field(insn, 21, 5); + t = field(insn, 0, 5); + if (r >= 1 && r < 7) + break; + if (r != 11 && r != 26 && r != 27) + gen_op_check_priv0(); + if (r == 16) /* interval timer */ + gen_op_check_int_timer_priv(); + + if ((r >= 17 && r <= 22) || (r == 0)) + { + gen_movl_T0_cr(r); + gen_movl_reg_T0(t); + } + else if (r == 11) /* SAR */ + { + /* Check - may need to mask and shift */ + gen_movl_T0_cr(r); + gen_movl_reg_T0(t); + } + else if (r >= 8) + { + gen_movl_T0_cr(r); + gen_movl_reg_T0(t); + } break; + } default: *************** *** 786,790 **** ext8 = field(insn, 6, 8); ! switch (ext8) { case 0x40: /* IDTLBP */ --- 1111,1115 ---- ext8 = field(insn, 6, 8); ! switch (ext8) { case 0x40: /* IDTLBP */ *************** *** 904,908 **** case 0x26: /* UADDCM */ gen_op_com_T1(); ! gen_op_addl_T1_T0(); break; case 0x27: /* UADDCMT */ --- 1229,1233 ---- case 0x26: /* UADDCM */ gen_op_com_T1(); ! gen_op_addl_T0_T1(); break; case 0x27: /* UADDCMT */ *************** *** 910,926 **** break; case 0x28: /* ADDL */ ! gen_op_addl_T1_T0(); break; case 0x29: /* SH1ADDL */ gen_shift_T0(1); ! gen_op_addl_T1_T0(); break; case 0x2A: /* SH2ADDL */ gen_shift_T0(2); ! gen_op_addl_T1_T0(); break; case 0x2B: /* SH3ADDL */ gen_shift_T0(3); ! gen_op_addl_T1_T0(); break; case 0x2E: /* DCOR */ --- 1235,1251 ---- break; case 0x28: /* ADDL */ ! gen_op_addl_T0_T1(); break; case 0x29: /* SH1ADDL */ gen_shift_T0(1); ! gen_op_addl_T0_T1(); break; case 0x2A: /* SH2ADDL */ gen_shift_T0(2); ! gen_op_addl_T0_T1(); break; case 0x2B: /* SH3ADDL */ gen_shift_T0(3); ! gen_op_addl_T0_T1(); break; case 0x2E: /* DCOR */ *************** *** 946,974 **** case 0x03: /* Index_Mem */ { ! uint32_t ext4; ! ext4 = field(insn, 6, 4); ! if(field(insn, 12, 1)) { ! switch(ext4) { ! case 0x00: /* LDBX */ ! case 0x01: /* LDHX */ ! case 0x02: /* LDWX */ ! case 0x06: /* LDWAX */ ! case 0x07: /* LDCWX */ ! break; ! } ! } else { ! switch(ext4) { ! case 0x00: /* LDBS */ ! case 0x01: /* LDHS */ ! case 0x02: /* LDWS */ ! case 0x06: /* LDWAS */ ! case 0x07: /* LDCWS */ ! case 0x08: /* STBS */ ! case 0x09: /* STHS */ ! case 0x0a: /* STWS */ ! case 0x0c: /* STBYS */ ! case 0x0e: /* STWAS */ ! break; ! } } break; --- 1271,1317 ---- case 0x03: /* Index_Mem */ { ! uint32_t ext4 = field(insn, 6, 4); ! switch(ext4) { ! case 0x00: /* LDB */ ! gen_load(insn, 0, gen_op_ldb_raw); ! break; ! case 0x01: /* LDH */ ! gen_load(insn, 1, gen_op_ldh_raw); ! break; ! case 0x02: /* LDW */ ! gen_load(insn, 2, gen_op_ldw_raw); ! break; ! case 0x06: /* LDWA */ ! gen_op_check_priv0(); ! gen_load(insn, 2, gen_op_ldw_phys); ! break; ! case 0x07: /* LDCW */ ! gen_load(insn, 2, gen_op_ldcw_raw); ! break; ! case 0x08: /* STB */ ! gen_store(insn, gen_op_stb_raw); ! break; ! case 0x09: /* STH */ ! gen_store(insn, gen_op_sth_raw); ! break; ! case 0x0A: /* STW */ ! gen_store(insn, gen_op_stw_raw); ! break; ! ! case 0x0C: /* STBY */ ! break; ! ! case 0x0E: /* STWA */ ! gen_store(insn, gen_op_stw_phys); ! break; ! ! case 0x03: /* LDD */ ! case 0x04: /* LDDA */ ! case 0x05: /* LDCD */ ! case 0x0B: /* STD */ ! case 0x0D: /* STDBY */ ! case 0x0F: /* STDA */ ! /* XXX - pa20 */ ! break; } break; *************** *** 988,992 **** if(t) { im21 = field(insn, 0, 21) << (32 - 21); ! gen_movl_imm_T0(im21); gen_movl_reg_T0(t); } --- 1331,1335 ---- if(t) { im21 = field(insn, 0, 21) << (32 - 21); ! gen_movl_T0_im(im21); gen_movl_reg_T0(t); } *************** *** 1013,1017 **** im21 = field(insn, 0, 21) << (32 - 21); gen_movl_T1_reg(r); ! gen_movl_imm_T0(im21); gen_op_addl_T1_T0(); gen_movl_reg_T0(1); --- 1356,1360 ---- im21 = field(insn, 0, 21) << (32 - 21); gen_movl_T1_reg(r); ! gen_movl_T0_im(im21); gen_op_addl_T1_T0(); gen_movl_reg_T0(1); *************** *** 1042,1047 **** im14 = field_signext(insn, 0, 14); gen_movl_reg_T0(b); ! gen_movl_imm_T1(im14); ! gen_op_add_T1_T0(); gen_movl_T0_reg(t); break; --- 1385,1390 ---- im14 = field_signext(insn, 0, 14); gen_movl_reg_T0(b); ! gen_movl_T1_im(im14); ! gen_op_addl_T0_T1(); gen_movl_T0_reg(t); break; *************** *** 1050,1054 **** case 0x0e: /* Float */ case 0x0f: /* Product Specific */ ! break; case 0x10: /* LDB */ --- 1393,1397 ---- case 0x0e: /* Float */ case 0x0f: /* Product Specific */ ! break; case 0x10: /* LDB */ *************** *** 1062,1068 **** im14 = field_signext(insn, 0, 14); gen_movl_reg_T0(b); ! gen_movl_imm_T1(s); /* gen_op_space_sel_T0_T1(); */ ! gen_movl_imm_T1(im14); gen_op_add_T1_T0(); switch(op) { --- 1405,1411 ---- im14 = field_signext(insn, 0, 14); gen_movl_reg_T0(b); ! gen_movl_T1_im(s); /* gen_op_space_sel_T0_T1(); */ ! gen_movl_T1_im(im14); gen_op_add_T1_T0(); switch(op) { *************** *** 1094,1101 **** im14 = field_signext(insn, 0, 14); gen_movl_reg_T0(b); ! gen_movl_imm_T1(s); /* gen_op_space_sel_T0_T1(); */ ! gen_movl_imm_T1(im14); ! gen_op_add_T1_T0(); gen_movl_reg_T1(t); switch(op) { --- 1437,1444 ---- im14 = field_signext(insn, 0, 14); gen_movl_reg_T0(b); ! /* gen_movl_T1_im(s); */ /* gen_op_space_sel_T0_T1(); */ ! gen_movl_T1_im(im14); ! gen_op_addl_T0_T1(); gen_movl_reg_T1(t); switch(op) { *************** *** 1131,1137 **** im11 = field_signext(insn, 0, 11); gen_movl_reg_T0(r); ! gen_movl_imm_T1(im11); gen_op_add_T1_T0(); ! gen_movl_imm_T0(0); gen_movl_T0_reg(t); break; --- 1474,1480 ---- im11 = field_signext(insn, 0, 11); gen_movl_reg_T0(r); ! gen_movl_T1_im(im11); gen_op_add_T1_T0(); ! gen_movl_T0_im(0); gen_movl_T0_reg(t); break; *************** *** 1165,1169 **** im11 = field_signext(insn, 0, 11); gen_movl_reg_T0(r); ! gen_movl_imm_T0(im11); if(!field(insn, 11, 1)) gen_op_addit_T0(); --- 1508,1512 ---- im11 = field_signext(insn, 0, 11); gen_movl_reg_T0(r); ! gen_movl_T0_im(im11); if(!field(insn, 11, 1)) gen_op_addit_T0(); *************** *** 1178,1183 **** case 0x32: /* MOVB */ case 0x33: /* MOVIB */ ! /* FIXME */ ! dc->is_br = 1; break; --- 1521,1526 ---- case 0x32: /* MOVB */ case 0x33: /* MOVIB */ ! /* FIXME */ ! dc->is_br = 1; break; *************** *** 1229,1234 **** /* */ ! /* FIXME */ ! dc->is_br = 1; break; } --- 1572,1577 ---- /* */ ! /* FIXME */ ! dc->is_br = 1; break; } *************** *** 1257,1262 **** } ! /* FIXME */ ! dc->is_br = 1; break; } --- 1600,1605 ---- } ! /* FIXME */ ! dc->is_br = 1; break; } *************** *** 1277,1281 **** env = qemu_mallocz(sizeof(CPUHPPAState)); if (!env) ! return NULL; cpu_exec_init(env); tlb_flush(env, 1); --- 1620,1624 ---- env = qemu_mallocz(sizeof(CPUHPPAState)); if (!env) ! return NULL; cpu_exec_init(env); tlb_flush(env, 1); Index: op_template.h =================================================================== RCS file: /cvsroot/hppaqemu/hppaqemu/target-hppa/op_template.h,v retrieving revision 1.1 retrieving revision 1.2 diff -C2 -d -r1.1 -r1.2 *** op_template.h 27 Feb 2007 23:20:43 -0000 1.1 --- op_template.h 11 Mar 2007 13:43:26 -0000 1.2 *************** *** 30,33 **** --- 30,38 ---- } + void OPPROTO glue(op_movl_T2_, REGNAME)(void) + { + T2 = REG; + } + void OPPROTO glue(glue(op_movl_, REGNAME), _T0)(void) { *************** *** 40,43 **** --- 45,53 ---- } + void OPPROTO glue(glue(op_movl_, REGNAME), _T2)(void) + { + REG = T2; + } + #undef REG #undef REGNAME Index: op.c =================================================================== RCS file: /cvsroot/hppaqemu/hppaqemu/target-hppa/op.c,v retrieving revision 1.10 retrieving revision 1.11 diff -C2 -d -r1.10 -r1.11 *** op.c 10 Mar 2007 00:55:50 -0000 1.10 --- op.c 11 Mar 2007 13:43:26 -0000 1.11 *************** *** 242,251 **** void OPPROTO op_movl_T0_gr0(void) { ! T0 = 0; } void OPPROTO op_movl_T1_gr0(void) { ! T1 = 0; } --- 242,256 ---- void OPPROTO op_movl_T0_gr0(void) { ! T0 = 0; } void OPPROTO op_movl_T1_gr0(void) { ! T1 = 0; ! } ! ! void OPPROTO op_movl_T2_gr0(void) ! { ! T2 = 0; } *************** *** 258,261 **** --- 263,270 ---- } + void OPPROTO op_movl_gr0_T2(void) + { + } + void OPPROTO op_movl_T0_im(void) { *************** *** 268,271 **** --- 277,321 ---- } + #define OP_COPY(_t1, _t2) \ + void OPPROTO op_copy_##_t1##_##_t2(void) \ + { \ + _t1 = _t2; \ + } + OP_COPY(T0, T1) + OP_COPY(T0, T2) + OP_COPY(T1, T0) + OP_COPY(T1, T2) + OP_COPY(T2, T0) + OP_COPY(T2, T1) + + /* Memory operations */ + #define MEMSUFFIX _raw + #include "op_mem.h" + #ifndef CONFIG_USER_ONLY + #define MEMSUFFIX _kernel + #include "op_mem.h" + #define MEMSUFFIX _user + #include "op_mem.h" + #endif + + void OPPROTO op_ldcw_raw(void) + { + /* FIXME - should be atomic */ + T1 = ldl_raw((void *)T0); + stl_raw((void *)T0, 0); + } + + void OPPROTO op_ldw_phys(void) + { + /* FIXME - T0 contains a physical address */ + T1 = ldl_raw((void *)T0); + } + + void OPPROTO op_stw_phys(void) + { + /* FIXME - T0 contains a physical address */ + stl_raw((void *)T0, T1); + } + /* System operations */ void OPPROTO op_break(void) *************** *** 274,277 **** --- 324,340 ---- } + void OPPROTO op_check_priv0(void) + { + if (env->priv_level != 0) + raise_exception(EXCP_PRIVOP); + } + + void OPPROTO op_check_int_timer_priv(void) + { + /* secure interval timer */ + if ((env->psw & PSW_S) && env->priv_level != 0) + raise_exception(EXCP_PRIVOP); + } + void OPPROTO op_sync(void) { *************** *** 284,296 **** void OPPROTO op_rfi(void) { ! if (env->priv_level != 0) ! raise_exception(EXCP_PRIVOP); ! else { ! env->psw = env->cr[22]; /* ipsw */ ! env->iaoq[0] = env->cr[18]; /* iiaoq */ ! env->iaoq[1] = env->iiaoq_back; ! env->iasq[0] = env->cr[17]; /* iiasq */ ! env->iasq[1] = env->iiasq_back; ! } } --- 347,355 ---- void OPPROTO op_rfi(void) { ! env->psw = env->cr[22]; /* ipsw */ ! env->iaoq[0] = env->cr[18]; /* iiaoq */ ! env->iaoq[1] = env->iiaoq_back; ! env->iasq[0] = env->cr[17]; /* iiasq */ ! env->iasq[1] = env->iiasq_back; } *************** *** 309,314 **** void OPPROTO op_ssm(void) { - if (env->priv_level != 0) - raise_exception(EXCP_PRIVOP); T0 = env->psw & (PSW_W | PSW_E | PSW_O | PSW_G | PSW_F | PSW_R | PSW_Q | PSW_P | PSW_D | PSW_I); --- 368,371 ---- *************** *** 335,340 **** void OPPROTO op_rsm(void) { - if (env->priv_level != 0) - raise_exception(EXCP_PRIVOP); T0 = env->psw & (PSW_W | PSW_E | PSW_O | PSW_G | PSW_F | PSW_R | PSW_Q | PSW_P | PSW_D | PSW_I); --- 392,395 ---- *************** *** 361,366 **** void OPPROTO op_mtsm(void) { - if (env->priv_level != 0) - raise_exception(EXCP_PRIVOP); env->psw = env->psw & ~(PSW_W | PSW_E | PSW_O | PSW_G | PSW_F | PSW_R | PSW_Q | PSW_P | PSW_D | PSW_I); env->psw |= T0 & (PSW_W | PSW_E | PSW_O | PSW_G | PSW_F | PSW_R | PSW_Q | PSW_P | PSW_D | PSW_I); --- 416,419 ---- *************** *** 436,440 **** /* add logical */ ! void OPPROTO op_addl_T1_T0(void) { T0 += T1; --- 489,493 ---- /* add logical */ ! void OPPROTO op_addl_T0_T1(void) { T0 += T1; *************** *** 442,448 **** } ! void OPPROTO op_add2_T1_T0(void) { ! T0 += T1; } --- 495,506 ---- } ! void OPPROTO op_addl_T1_T0(void) { ! T1 += T0; ! } ! ! void OPPROTO op_addl_T1_T2(void) ! { ! T1 += T2; } *************** *** 492,501 **** void OPPROTO op_undef_insn(void) { ! /* XXX */ } void OPPROTO op_ill_insn(void) { ! /* XXX */ } --- 550,563 ---- void OPPROTO op_undef_insn(void) { ! /* undefined; let's kill the process so that we can easily identify ! * any incorrect insn decoding ! */ ! int *p = NULL; ! T0 = *p; } void OPPROTO op_ill_insn(void) { ! raise_exception(EXCP_ILLEGAL); } *************** *** 520,523 **** --- 582,590 ---- } + void OPPROTO op_shift1_T1(void) + { + T1 <<= 1; + } + void OPPROTO op_shift2_T0(void) { *************** *** 525,528 **** --- 592,600 ---- } + void OPPROTO op_shift2_T1(void) + { + T1 <<= 2; + } + void OPPROTO op_shift3_T0(void) { *************** *** 530,533 **** --- 602,610 ---- } + void OPPROTO op_shift3_T1(void) + { + T1 <<= 3; + } + void OPPROTO op_sub_T1_T0_cc(void) { *************** *** 650,653 **** env->iaoq[1] = env->iaoq[0] + 4; } - - #include "op_mem.h" --- 727,728 ---- Index: op_mem.h =================================================================== RCS file: /cvsroot/hppaqemu/hppaqemu/target-hppa/op_mem.h,v retrieving revision 1.2 retrieving revision 1.3 diff -C2 -d -r1.2 -r1.3 *** op_mem.h 4 Mar 2007 16:13:20 -0000 1.2 --- op_mem.h 11 Mar 2007 13:43:26 -0000 1.3 *************** *** 1,4 **** #define HPPA_LD_OP(name, qp) \ ! void OPPROTO glue(glue(op_, name), _raw)(void) \ { \ T1 = glue(qp, _raw)((void *)T0); \ --- 1,4 ---- #define HPPA_LD_OP(name, qp) \ ! void OPPROTO glue(glue(op_, name), MEMSUFFIX)(void) \ { \ T1 = glue(qp, _raw)((void *)T0); \ |
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From: Randolph C. <ta...@us...> - 2007-03-11 13:43:30
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Update of /cvsroot/hppaqemu/hppaqemu In directory sc8-pr-cvs5.sourceforge.net:/tmp/cvs-serv3028 Modified Files: dyngen.h Log Message: implement indexed and short displacement load and stores Index: dyngen.h =================================================================== RCS file: /cvsroot/hppaqemu/hppaqemu/dyngen.h,v retrieving revision 1.2 retrieving revision 1.3 diff -C2 -d -r1.2 -r1.3 *** dyngen.h 4 Mar 2007 15:03:22 -0000 1.2 --- dyngen.h 11 Mar 2007 13:43:25 -0000 1.3 *************** *** 390,393 **** --- 390,396 ---- } + /* supplied by libgcc */ + extern void *__canonicalize_funcptr_for_compare(void *); + #endif |
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From: Stuart B. <zu...@us...> - 2007-03-10 00:55:53
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Update of /cvsroot/hppaqemu/hppaqemu/target-hppa In directory sc8-pr-cvs5.sourceforge.net:/tmp/cvs-serv24624 Modified Files: op.c Log Message: Fix op_com_T1 (oops). Index: op.c =================================================================== RCS file: /cvsroot/hppaqemu/hppaqemu/target-hppa/op.c,v retrieving revision 1.9 retrieving revision 1.10 diff -C2 -d -r1.9 -r1.10 *** op.c 10 Mar 2007 00:53:14 -0000 1.9 --- op.c 10 Mar 2007 00:55:50 -0000 1.10 *************** *** 622,626 **** void OPPROTO op_com_T1(void) { ! T0 = ~T0; } --- 622,626 ---- void OPPROTO op_com_T1(void) { ! T1 = ~T1; } |
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From: Stuart B. <zu...@us...> - 2007-03-10 00:53:18
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Update of /cvsroot/hppaqemu/hppaqemu/target-hppa In directory sc8-pr-cvs5.sourceforge.net:/tmp/cvs-serv23046 Modified Files: op.c Log Message: Implement op_shift1_T0, op_shift2_T0, op_shift3_T0 and op_com_T1. Index: op.c =================================================================== RCS file: /cvsroot/hppaqemu/hppaqemu/target-hppa/op.c,v retrieving revision 1.8 retrieving revision 1.9 diff -C2 -d -r1.8 -r1.9 *** op.c 9 Mar 2007 23:46:35 -0000 1.8 --- op.c 10 Mar 2007 00:53:14 -0000 1.9 *************** *** 517,531 **** void OPPROTO op_shift1_T0(void) { ! /* XXX */ } void OPPROTO op_shift2_T0(void) { ! /* XXX */ } void OPPROTO op_shift3_T0(void) { ! /* XXX */ } --- 517,531 ---- void OPPROTO op_shift1_T0(void) { ! T0 <<= 1; } void OPPROTO op_shift2_T0(void) { ! T0 <<= 2; } void OPPROTO op_shift3_T0(void) { ! T0 <<= 3; } *************** *** 622,626 **** void OPPROTO op_com_T1(void) { ! /* XXX */ } --- 622,626 ---- void OPPROTO op_com_T1(void) { ! T0 = ~T0; } |
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From: Stuart B. <zu...@us...> - 2007-03-09 23:46:42
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Update of /cvsroot/hppaqemu/hppaqemu/target-hppa In directory sc8-pr-cvs5.sourceforge.net:/tmp/cvs-serv29576 Modified Files: op.c translate.c Log Message: Rename add/sub ops that modify flags to end in '_cc'. Rename 'subc' op to 'subb' (should be borrow, not carry). Index: translate.c =================================================================== RCS file: /cvsroot/hppaqemu/hppaqemu/target-hppa/translate.c,v retrieving revision 1.11 retrieving revision 1.12 diff -C2 -d -r1.11 -r1.12 *** translate.c 9 Mar 2007 15:57:31 -0000 1.11 --- translate.c 9 Mar 2007 23:46:36 -0000 1.12 *************** *** 824,828 **** switch(ext6) { case 0x18: /* ADD */ ! gen_op_add_T1_T0(); break; case 0x38: /* ADDO */ --- 824,828 ---- switch(ext6) { case 0x18: /* ADD */ ! gen_op_add_T1_T0_cc(); break; case 0x38: /* ADDO */ *************** *** 834,838 **** break; case 0x1C: /* ADDC */ ! gen_op_addc_T1_T0(); break; case 0x3C: /* ADDCO */ --- 834,838 ---- break; case 0x1C: /* ADDC */ ! gen_op_addc_T1_T0_cc(); break; case 0x3C: /* ADDCO */ *************** *** 841,845 **** case 0x19: /* SH1ADD */ gen_shift_T0(1); ! gen_op_add_T1_T0(); break; case 0x39: /* SH1ADDO */ --- 841,845 ---- case 0x19: /* SH1ADD */ gen_shift_T0(1); ! gen_op_add_T1_T0_cc(); break; case 0x39: /* SH1ADDO */ *************** *** 849,853 **** case 0x1a: /* SH2ADD */ gen_shift_T0(2); ! gen_op_add_T1_T0(); break; case 0x3a: /* SH2ADDO */ --- 849,853 ---- case 0x1a: /* SH2ADD */ gen_shift_T0(2); ! gen_op_add_T1_T0_cc(); break; case 0x3a: /* SH2ADDO */ *************** *** 857,861 **** case 0x1b: /* SH3ADD */ gen_shift_T0(3); ! gen_op_add_T1_T0(); break; case 0x3b: /* SH3ADDO */ --- 857,861 ---- case 0x1b: /* SH3ADD */ gen_shift_T0(3); ! gen_op_add_T1_T0_cc(); break; case 0x3b: /* SH3ADDO */ *************** *** 864,868 **** break; case 0x10: /* SUB */ ! gen_op_sub_T1_T0(); break; case 0x30: /* SUBO */ --- 864,868 ---- break; case 0x10: /* SUB */ ! gen_op_sub_T1_T0_cc(); break; case 0x30: /* SUBO */ *************** *** 876,880 **** break; case 0x14: /* SUBB */ ! gen_op_subb_T1_T0(); break; case 0x34: /* SUBBO */ --- 876,880 ---- break; case 0x14: /* SUBB */ ! gen_op_subb_T1_T0_cc(); break; case 0x34: /* SUBBO */ *************** *** 1146,1150 **** im11 = field_signext(insn, 0, 11); gen_movl_reg_T0(r); ! gen_op_sub_T1_T0(); break; } --- 1146,1150 ---- im11 = field_signext(insn, 0, 11); gen_movl_reg_T0(r); ! gen_op_sub_T1_T0_cc(); break; } Index: op.c =================================================================== RCS file: /cvsroot/hppaqemu/hppaqemu/target-hppa/op.c,v retrieving revision 1.7 retrieving revision 1.8 diff -C2 -d -r1.7 -r1.8 *** op.c 9 Mar 2007 15:57:31 -0000 1.7 --- op.c 9 Mar 2007 23:46:35 -0000 1.8 *************** *** 370,374 **** /* TODO: lazy PSW */ ! void OPPROTO op_add_T1_T0(void) { target_ulong carry; --- 370,374 ---- /* TODO: lazy PSW */ ! void OPPROTO op_add_T1_T0_cc(void) { target_ulong carry; *************** *** 395,400 **** } /* TODO: lazy PSW */ ! void OPPROTO op_addc_T1_T0(void) { target_ulong carry; --- 395,405 ---- } + void OPPROTO op_add_T1_T0(void) + { + T0 += T1; + } + /* TODO: lazy PSW */ ! void OPPROTO op_addc_T1_T0_cc(void) { target_ulong carry; *************** *** 468,501 **** } - /* TODO: lazy PSW */ - void OPPROTO op_subc_T1_T0(void) - { - target_ulong borrow; - target_ulong tmp; - - tmp = T0; - T0 -= T1; - - /* subtract the borrow */ - if (!(env->psw & PSW_CB7)) { - T0 -= 1; - } - - /* calculate carry/borrow flags */ - borrow = (~tmp & T1) | (~(tmp ^ T1) & T0); - /* axxxbxxxcxxxdxxxexxxfxxxgxxxhxxx */ - borrow >>= 3; /* 000axxxbxxxcxxxdxxxexxxfxxxgxxxh */ - borrow &= 0x11111111; /* 000a000b000c000d000e000f000g000h */ - borrow |= borrow >> 3; /* 000a00ab00bc00cd00de00ef00fg00gh */ - borrow &= 0x03030303; /* 000000ab000000cd000000ef000000gh */ - borrow |= borrow >> 6; /* 000000ab0000abcd000000ef0000efgh */ - borrow &= 0x000f000f; /* 000000000000abcd000000000000efgh */ - borrow |= borrow >> 12; /* 000000000000abcd00000000abcdefgh */ - borrow &= 0x000000ff; /* 000000000000000000000000abcdefgh */ - - env->psw &= ~PSW_CB; - env->psw |= ~borrow << PSW_CB7_SHIFT; - } - void OPPROTO op_next_insn(void) { --- 473,476 ---- *************** *** 555,561 **** } void OPPROTO op_sub_T1_T0(void) { ! /* XXX */ } --- 530,561 ---- } + void OPPROTO op_sub_T1_T0_cc(void) + { + /* TODO: lazy PSW */ + target_ulong borrow; + target_ulong tmp; + + tmp = T0; + T0 -= T1; + + /* calculate carry/borrow flags */ + borrow = (~tmp & T1) | (~(tmp ^ T1) & T0); + /* axxxbxxxcxxxdxxxexxxfxxxgxxxhxxx */ + borrow >>= 3; /* 000axxxbxxxcxxxdxxxexxxfxxxgxxxh */ + borrow &= 0x11111111; /* 000a000b000c000d000e000f000g000h */ + borrow |= borrow >> 3; /* 000a00ab00bc00cd00de00ef00fg00gh */ + borrow &= 0x03030303; /* 000000ab000000cd000000ef000000gh */ + borrow |= borrow >> 6; /* 000000ab0000abcd000000ef0000efgh */ + borrow &= 0x000f000f; /* 000000000000abcd000000000000efgh */ + borrow |= borrow >> 12; /* 000000000000abcd00000000abcdefgh */ + borrow &= 0x000000ff; /* 000000000000000000000000abcdefgh */ + + env->psw &= ~PSW_CB; + env->psw |= ~borrow << PSW_CB7_SHIFT; + } + void OPPROTO op_sub_T1_T0(void) { ! T0 -= T1; } *************** *** 575,581 **** } ! void OPPROTO op_subb_T1_T0(void) { ! /* XXX */ } --- 575,606 ---- } ! void OPPROTO op_subb_T1_T0_cc(void) { ! /* TODO: lazy PSW */ ! target_ulong borrow; ! target_ulong tmp; ! ! tmp = T0; ! T0 -= T1; ! ! /* subtract the borrow */ ! if (!(env->psw & PSW_CB7)) { ! T0 -= 1; ! } ! ! /* calculate carry/borrow flags */ ! borrow = (~tmp & T1) | (~(tmp ^ T1) & T0); ! /* axxxbxxxcxxxdxxxexxxfxxxgxxxhxxx */ ! borrow >>= 3; /* 000axxxbxxxcxxxdxxxexxxfxxxgxxxh */ ! borrow &= 0x11111111; /* 000a000b000c000d000e000f000g000h */ ! borrow |= borrow >> 3; /* 000a00ab00bc00cd00de00ef00fg00gh */ ! borrow &= 0x03030303; /* 000000ab000000cd000000ef000000gh */ ! borrow |= borrow >> 6; /* 000000ab0000abcd000000ef0000efgh */ ! borrow &= 0x000f000f; /* 000000000000abcd000000000000efgh */ ! borrow |= borrow >> 12; /* 000000000000abcd00000000abcdefgh */ ! borrow &= 0x000000ff; /* 000000000000000000000000abcdefgh */ ! ! env->psw &= ~PSW_CB; ! env->psw |= ~borrow << PSW_CB7_SHIFT; } |
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From: Randolph C. <ta...@us...> - 2007-03-09 15:57:45
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Update of /cvsroot/hppaqemu/hppaqemu/target-hppa In directory sc8-pr-cvs5.sourceforge.net:/tmp/cvs-serv17414/target-hppa Modified Files: cpu.h exec.h helper.c op.c translate.c Log Message: implement some insns Index: translate.c =================================================================== RCS file: /cvsroot/hppaqemu/hppaqemu/target-hppa/translate.c,v retrieving revision 1.10 retrieving revision 1.11 diff -C2 -d -r1.10 -r1.11 *** translate.c 7 Mar 2007 05:27:31 -0000 1.10 --- translate.c 9 Mar 2007 15:57:31 -0000 1.11 *************** *** 221,224 **** --- 221,412 ---- }; + static GenOpFunc *gen_op_movl_TN_cr[2][32] = + { + { + gen_op_movl_cr0_T0, + gen_op_movl_cr1_T0, + gen_op_movl_cr2_T0, + gen_op_movl_cr3_T0, + gen_op_movl_cr4_T0, + gen_op_movl_cr5_T0, + gen_op_movl_cr6_T0, + gen_op_movl_cr7_T0, + gen_op_movl_cr8_T0, + gen_op_movl_cr9_T0, + gen_op_movl_cr10_T0, + gen_op_movl_cr11_T0, + gen_op_movl_cr12_T0, + gen_op_movl_cr13_T0, + gen_op_movl_cr14_T0, + gen_op_movl_cr15_T0, + gen_op_movl_cr16_T0, + gen_op_movl_cr17_T0, + gen_op_movl_cr18_T0, + gen_op_movl_cr19_T0, + gen_op_movl_cr20_T0, + gen_op_movl_cr21_T0, + gen_op_movl_cr22_T0, + gen_op_movl_cr23_T0, + gen_op_movl_cr24_T0, + gen_op_movl_cr25_T0, + gen_op_movl_cr26_T0, + gen_op_movl_cr27_T0, + gen_op_movl_cr28_T0, + gen_op_movl_cr29_T0, + gen_op_movl_cr30_T0, + gen_op_movl_cr31_T0, + }, { + gen_op_movl_cr0_T1, + gen_op_movl_cr1_T1, + gen_op_movl_cr2_T1, + gen_op_movl_cr3_T1, + gen_op_movl_cr4_T1, + gen_op_movl_cr5_T1, + gen_op_movl_cr6_T1, + gen_op_movl_cr7_T1, + gen_op_movl_cr8_T1, + gen_op_movl_cr9_T1, + gen_op_movl_cr10_T1, + gen_op_movl_cr11_T1, + gen_op_movl_cr12_T1, + gen_op_movl_cr13_T1, + gen_op_movl_cr14_T1, + gen_op_movl_cr15_T1, + gen_op_movl_cr16_T1, + gen_op_movl_cr17_T1, + gen_op_movl_cr18_T1, + gen_op_movl_cr19_T1, + gen_op_movl_cr20_T1, + gen_op_movl_cr21_T1, + gen_op_movl_cr22_T1, + gen_op_movl_cr23_T1, + gen_op_movl_cr24_T1, + gen_op_movl_cr25_T1, + gen_op_movl_cr26_T1, + gen_op_movl_cr27_T1, + gen_op_movl_cr28_T1, + gen_op_movl_cr29_T1, + gen_op_movl_cr30_T1, + gen_op_movl_cr31_T1, + } + }; + + static GenOpFunc *gen_op_movl_cr_TN[2][32] = + { + { + gen_op_movl_T0_cr0, + gen_op_movl_T0_cr1, + gen_op_movl_T0_cr2, + gen_op_movl_T0_cr3, + gen_op_movl_T0_cr4, + gen_op_movl_T0_cr5, + gen_op_movl_T0_cr6, + gen_op_movl_T0_cr7, + gen_op_movl_T0_cr8, + gen_op_movl_T0_cr9, + gen_op_movl_T0_cr10, + gen_op_movl_T0_cr11, + gen_op_movl_T0_cr12, + gen_op_movl_T0_cr13, + gen_op_movl_T0_cr14, + gen_op_movl_T0_cr15, + gen_op_movl_T0_cr16, + gen_op_movl_T0_cr17, + gen_op_movl_T0_cr18, + gen_op_movl_T0_cr19, + gen_op_movl_T0_cr20, + gen_op_movl_T0_cr21, + gen_op_movl_T0_cr22, + gen_op_movl_T0_cr23, + gen_op_movl_T0_cr24, + gen_op_movl_T0_cr25, + gen_op_movl_T0_cr26, + gen_op_movl_T0_cr27, + gen_op_movl_T0_cr28, + gen_op_movl_T0_cr29, + gen_op_movl_T0_cr30, + gen_op_movl_T0_cr31, + }, { + gen_op_movl_T1_cr0, + gen_op_movl_T1_cr1, + gen_op_movl_T1_cr2, + gen_op_movl_T1_cr3, + gen_op_movl_T1_cr4, + gen_op_movl_T1_cr5, + gen_op_movl_T1_cr6, + gen_op_movl_T1_cr7, + gen_op_movl_T1_cr8, + gen_op_movl_T1_cr9, + gen_op_movl_T1_cr10, + gen_op_movl_T1_cr11, + gen_op_movl_T1_cr12, + gen_op_movl_T1_cr13, + gen_op_movl_T1_cr14, + gen_op_movl_T1_cr15, + gen_op_movl_T1_cr16, + gen_op_movl_T1_cr17, + gen_op_movl_T1_cr18, + gen_op_movl_T1_cr19, + gen_op_movl_T1_cr20, + gen_op_movl_T1_cr21, + gen_op_movl_T1_cr22, + gen_op_movl_T1_cr23, + gen_op_movl_T1_cr24, + gen_op_movl_T1_cr25, + gen_op_movl_T1_cr26, + gen_op_movl_T1_cr27, + gen_op_movl_T1_cr28, + gen_op_movl_T1_cr29, + gen_op_movl_T1_cr30, + gen_op_movl_T1_cr31, + } + }; + + static GenOpFunc *gen_op_movl_TN_sr[2][8] = + { + { + gen_op_movl_sr0_T0, + gen_op_movl_sr1_T0, + gen_op_movl_sr2_T0, + gen_op_movl_sr3_T0, + gen_op_movl_sr4_T0, + gen_op_movl_sr5_T0, + gen_op_movl_sr6_T0, + gen_op_movl_sr7_T0, + }, { + gen_op_movl_sr0_T1, + gen_op_movl_sr1_T1, + gen_op_movl_sr2_T1, + gen_op_movl_sr3_T1, + gen_op_movl_sr4_T1, + gen_op_movl_sr5_T1, + gen_op_movl_sr6_T1, + gen_op_movl_sr7_T1, + } + }; + + static GenOpFunc *gen_op_movl_sr_TN[2][32] = + { + { + gen_op_movl_T0_sr0, + gen_op_movl_T0_sr1, + gen_op_movl_T0_sr2, + gen_op_movl_T0_sr3, + gen_op_movl_T0_sr4, + gen_op_movl_T0_sr5, + gen_op_movl_T0_sr6, + gen_op_movl_T0_sr7, + }, { + gen_op_movl_T1_sr0, + gen_op_movl_T1_sr1, + gen_op_movl_T1_sr2, + gen_op_movl_T1_sr3, + gen_op_movl_T1_sr4, + gen_op_movl_T1_sr5, + gen_op_movl_T1_sr6, + gen_op_movl_T1_sr7, + } + }; + static GenOpFunc1 *gen_op_movl_TN_im[2] = { gen_op_movl_T0_im, *************** *** 243,252 **** } static void gen_movl_reg_TN(int reg, int t) { ! if (reg) ! gen_op_movl_reg_TN[t][reg] (); ! else ! gen_movl_imm_TN(t, 0); } --- 431,438 ---- } + /* General registers */ static void gen_movl_reg_TN(int reg, int t) { ! gen_op_movl_reg_TN[t][reg] (); } *************** *** 263,268 **** static void gen_movl_TN_reg(int reg, int t) { ! if (reg) ! gen_op_movl_TN_reg[t][reg] (); } --- 449,453 ---- static void gen_movl_TN_reg(int reg, int t) { ! gen_op_movl_TN_reg[t][reg] (); } *************** *** 277,281 **** } ! #define gen_op_shift_T0(s) gen_op_shift##s##_T0() static void gen_goto_tb(DisasContext *dc, int tb_num, --- 462,509 ---- } ! /* Control registers */ ! static void gen_movl_cr_T0(int cr) ! { ! gen_op_movl_cr_TN[0][cr](); ! } ! ! static void gen_movl_cr_T1(int cr) ! { ! gen_op_movl_cr_TN[1][cr](); ! } ! ! static void gen_movl_T0_cr(int cr) ! { ! gen_op_movl_TN_cr[0][cr](); ! } ! ! static void gen_movl_T1_cr(int cr) ! { ! gen_op_movl_TN_cr[1][cr](); ! } ! ! /* Space registers */ ! static void gen_movl_sr_T0(int sr) ! { ! gen_op_movl_sr_TN[0][sr](); ! } ! ! static void gen_movl_sr_T1(int sr) ! { ! gen_op_movl_sr_TN[1][sr](); ! } ! ! static void gen_movl_T0_sr(int sr) ! { ! gen_op_movl_TN_sr[0][sr](); ! } ! ! static void gen_movl_T1_sr(int sr) ! { ! gen_op_movl_TN_sr[1][sr](); ! } ! ! #define gen_shift_T0(s) gen_op_shift##s##_T0() ! #define gen_shift_T1(s) gen_op_shift##s##_T1() static void gen_goto_tb(DisasContext *dc, int tb_num, *************** *** 355,359 **** if (env->singlestep_enabled) { gen_op_jmp_im(dc->iaoq[0]); ! gen_op_movl_T0_GR0(); gen_op_exit_tb(); break; --- 583,587 ---- if (env->singlestep_enabled) { gen_op_jmp_im(dc->iaoq[0]); ! gen_op_movl_T0_gr0(); gen_op_exit_tb(); break; *************** *** 460,473 **** --- 688,754 ---- switch(ext8) { case 0x00: /* BREAK */ + gen_op_break(); + break; + case 0x20: /* SYNC, SYNCDMAA */ + if (field(insn, 20, 1)) + gen_op_syncdma(); + else + gen_op_sync(); + break; + case 0x60: /* RFI */ + gen_op_rfi(); + dc->is_br = 1; + break; + case 0x65: /* RFIR */ + gen_op_rfi(); + gen_op_restore_shadow(); + dc->is_br = 1; + break; + case 0x6b: /* SSM */ + gen_op_ssm(field(insn, 16, 7)); + gen_movl_reg_T0(field(insn, 0, 5)); + break; + case 0x73: /* RSM */ + gen_op_rsm(field(insn, 16, 7)); + gen_movl_reg_T0(field(insn, 0, 5)); + break; + case 0xc3: /* MTSM */ + gen_movl_T0_reg(field(insn, 16, 5)); + gen_op_mtsm(); + break; + case 0x85: /* LDSID */ + { + uint32_t s, b, t; + s = field(insn, 14, 2); + b = field(insn, 21, 5); + t = field(insn, 0, 5); + break; + } + case 0xc1: /* MTSP */ + { + uint32_t sr = field(insn, 13, 3); + uint32_t r = field(insn, 16, 5); + gen_movl_T0_reg(r); + gen_movl_sr_T0(sr); + break; + } case 0x25: /* MFSP */ + { + uint32_t sr = field(insn, 13, 3); + uint32_t t = field(insn, 0, 5); + gen_movl_T0_sr(sr); + gen_movl_reg_T0(t); + break; + } case 0xc2: /* MTCTL */ + case 0x45: /* MFCTL */ break; *************** *** 559,583 **** break; case 0x19: /* SH1ADD */ ! gen_op_shift_T0(1); gen_op_add_T1_T0(); break; case 0x39: /* SH1ADDO */ ! gen_op_shift_T0(1); gen_op_addo_T1_T0(); break; case 0x1a: /* SH2ADD */ ! gen_op_shift_T0(2); gen_op_add_T1_T0(); break; case 0x3a: /* SH2ADDO */ ! gen_op_shift_T0(2); gen_op_addo_T1_T0(); break; case 0x1b: /* SH3ADD */ ! gen_op_shift_T0(3); gen_op_add_T1_T0(); break; case 0x3b: /* SH3ADDO */ ! gen_op_shift_T0(3); gen_op_addo_T1_T0(); break; --- 840,864 ---- break; case 0x19: /* SH1ADD */ ! gen_shift_T0(1); gen_op_add_T1_T0(); break; case 0x39: /* SH1ADDO */ ! gen_shift_T0(1); gen_op_addo_T1_T0(); break; case 0x1a: /* SH2ADD */ ! gen_shift_T0(2); gen_op_add_T1_T0(); break; case 0x3a: /* SH2ADDO */ ! gen_shift_T0(2); gen_op_addo_T1_T0(); break; case 0x1b: /* SH3ADD */ ! gen_shift_T0(3); gen_op_add_T1_T0(); break; case 0x3b: /* SH3ADDO */ ! gen_shift_T0(3); gen_op_addo_T1_T0(); break; *************** *** 632,644 **** break; case 0x29: /* SH1ADDL */ ! gen_op_shift_T0(1); gen_op_addl_T1_T0(); break; case 0x2A: /* SH2ADDL */ ! gen_op_shift_T0(2); gen_op_addl_T1_T0(); break; case 0x2B: /* SH3ADDL */ ! gen_op_shift_T0(3); gen_op_addl_T1_T0(); break; --- 913,925 ---- break; case 0x29: /* SH1ADDL */ ! gen_shift_T0(1); gen_op_addl_T1_T0(); break; case 0x2A: /* SH2ADDL */ ! gen_shift_T0(2); gen_op_addl_T1_T0(); break; case 0x2B: /* SH3ADDL */ ! gen_shift_T0(3); gen_op_addl_T1_T0(); break; Index: helper.c =================================================================== RCS file: /cvsroot/hppaqemu/hppaqemu/target-hppa/helper.c,v retrieving revision 1.2 retrieving revision 1.3 diff -C2 -d -r1.2 -r1.3 *** helper.c 6 Mar 2007 14:41:50 -0000 1.2 --- helper.c 9 Mar 2007 15:57:31 -0000 1.3 *************** *** 1,8 **** ! #include <stdio.h> ! #include <stdlib.h> ! #include <string.h> ! #include "cpu.h" ! #include "exec-all.h" int cpu_hppa_handle_mmu_fault (CPUState *env, target_ulong address, int rw, --- 1,17 ---- ! #include "exec.h" ! void raise_exception(int tt) ! { ! env->cr[18] = env->iaoq[0]; ! env->iiaoq_back = env->iaoq[1]; ! env->cr[17] = env->iasq[0]; ! env->iiasq_back = env->iasq[1]; ! env->cr[19] = ldl_code(env->iaoq[0]); ! env->cr[20] = 0; /* isr */ ! env->cr[21] = 0; /* ior */ ! env->cr[22] = env->psw; ! env->exception_index = tt; ! cpu_loop_exit(); ! } int cpu_hppa_handle_mmu_fault (CPUState *env, target_ulong address, int rw, Index: exec.h =================================================================== RCS file: /cvsroot/hppaqemu/hppaqemu/target-hppa/exec.h,v retrieving revision 1.3 retrieving revision 1.4 diff -C2 -d -r1.3 -r1.4 *** exec.h 4 Mar 2007 15:16:27 -0000 1.3 --- exec.h 9 Mar 2007 15:57:31 -0000 1.4 *************** *** 42,44 **** --- 42,47 ---- } + void raise_exception(int tt); + void cpu_loop_exit(void); + #endif Index: op.c =================================================================== RCS file: /cvsroot/hppaqemu/hppaqemu/target-hppa/op.c,v retrieving revision 1.6 retrieving revision 1.7 diff -C2 -d -r1.6 -r1.7 *** op.c 6 Mar 2007 14:41:50 -0000 1.6 --- op.c 9 Mar 2007 15:57:31 -0000 1.7 *************** *** 21,27 **** #include "exec.h" ! #define REGNAME gr0 ! #define REG (env->gr[0]) ! #include "op_template.h" #define REGNAME gr1 #define REG (env->gr[1]) --- 21,25 ---- #include "exec.h" ! /* General registers */ #define REGNAME gr1 #define REG (env->gr[1]) *************** *** 118,136 **** #include "op_template.h" ! void OPPROTO op_movl_T0_GR0(void) { T0 = 0; } ! void OPPROTO op_movl_T1_GR0(void) { T1 = 0; } ! void OPPROTO op_movl_GR0_T0(void) { } ! void OPPROTO op_movl_GR0_T1(void) { } --- 116,258 ---- #include "op_template.h" ! /* Space registers */ ! #define REGNAME sr0 ! #define REG (env->sr[0]) ! #include "op_template.h" ! #define REGNAME sr1 ! #define REG (env->sr[1]) ! #include "op_template.h" ! #define REGNAME sr2 ! #define REG (env->sr[2]) ! #include "op_template.h" ! #define REGNAME sr3 ! #define REG (env->sr[3]) ! #include "op_template.h" ! #define REGNAME sr4 ! #define REG (env->sr[4]) ! #include "op_template.h" ! #define REGNAME sr5 ! #define REG (env->sr[5]) ! #include "op_template.h" ! #define REGNAME sr6 ! #define REG (env->sr[6]) ! #include "op_template.h" ! #define REGNAME sr7 ! #define REG (env->sr[7]) ! #include "op_template.h" ! ! /* Control registers */ ! #define REGNAME cr0 ! #define REG (env->cr[0]) ! #include "op_template.h" ! #define REGNAME cr1 ! #define REG (env->cr[1]) ! #include "op_template.h" ! #define REGNAME cr2 ! #define REG (env->cr[2]) ! #include "op_template.h" ! #define REGNAME cr3 ! #define REG (env->cr[3]) ! #include "op_template.h" ! #define REGNAME cr4 ! #define REG (env->cr[4]) ! #include "op_template.h" ! #define REGNAME cr5 ! #define REG (env->cr[5]) ! #include "op_template.h" ! #define REGNAME cr6 ! #define REG (env->cr[6]) ! #include "op_template.h" ! #define REGNAME cr7 ! #define REG (env->cr[7]) ! #include "op_template.h" ! #define REGNAME cr8 ! #define REG (env->cr[8]) ! #include "op_template.h" ! #define REGNAME cr9 ! #define REG (env->cr[9]) ! #include "op_template.h" ! #define REGNAME cr10 ! #define REG (env->cr[10]) ! #include "op_template.h" ! #define REGNAME cr11 ! #define REG (env->cr[11]) ! #include "op_template.h" ! #define REGNAME cr12 ! #define REG (env->cr[12]) ! #include "op_template.h" ! #define REGNAME cr13 ! #define REG (env->cr[13]) ! #include "op_template.h" ! #define REGNAME cr14 ! #define REG (env->cr[14]) ! #include "op_template.h" ! #define REGNAME cr15 ! #define REG (env->cr[15]) ! #include "op_template.h" ! #define REGNAME cr16 ! #define REG (env->cr[16]) ! #include "op_template.h" ! #define REGNAME cr17 ! #define REG (env->cr[17]) ! #include "op_template.h" ! #define REGNAME cr18 ! #define REG (env->cr[18]) ! #include "op_template.h" ! #define REGNAME cr19 ! #define REG (env->cr[19]) ! #include "op_template.h" ! #define REGNAME cr20 ! #define REG (env->cr[20]) ! #include "op_template.h" ! #define REGNAME cr21 ! #define REG (env->cr[21]) ! #include "op_template.h" ! #define REGNAME cr22 ! #define REG (env->cr[22]) ! #include "op_template.h" ! #define REGNAME cr23 ! #define REG (env->cr[23]) ! #include "op_template.h" ! #define REGNAME cr24 ! #define REG (env->cr[24]) ! #include "op_template.h" ! #define REGNAME cr25 ! #define REG (env->cr[25]) ! #include "op_template.h" ! #define REGNAME cr26 ! #define REG (env->cr[26]) ! #include "op_template.h" ! #define REGNAME cr27 ! #define REG (env->cr[27]) ! #include "op_template.h" ! #define REGNAME cr28 ! #define REG (env->cr[28]) ! #include "op_template.h" ! #define REGNAME cr29 ! #define REG (env->cr[29]) ! #include "op_template.h" ! #define REGNAME cr30 ! #define REG (env->cr[30]) ! #include "op_template.h" ! #define REGNAME cr31 ! #define REG (env->cr[31]) ! #include "op_template.h" ! ! void OPPROTO op_movl_T0_gr0(void) { T0 = 0; } ! void OPPROTO op_movl_T1_gr0(void) { T1 = 0; } ! void OPPROTO op_movl_gr0_T0(void) { } ! void OPPROTO op_movl_gr0_T1(void) { } *************** *** 146,149 **** --- 268,369 ---- } + /* System operations */ + void OPPROTO op_break(void) + { + raise_exception(EXCP_BREAK); + } + + void OPPROTO op_sync(void) + { + } + + void OPPROTO op_syncdma(void) + { + } + + void OPPROTO op_rfi(void) + { + if (env->priv_level != 0) + raise_exception(EXCP_PRIVOP); + else { + env->psw = env->cr[22]; /* ipsw */ + env->iaoq[0] = env->cr[18]; /* iiaoq */ + env->iaoq[1] = env->iiaoq_back; + env->iasq[0] = env->cr[17]; /* iiasq */ + env->iasq[1] = env->iiasq_back; + } + } + + void OPPROTO op_restore_shadow(void) + { + /* restore shadow registers */ + env->gr[1] = env->shr[0]; + env->gr[8] = env->shr[1]; + env->gr[9] = env->shr[2]; + env->gr[16] = env->shr[3]; + env->gr[17] = env->shr[4]; + env->gr[24] = env->shr[5]; + env->gr[25] = env->shr[6]; + } + + void OPPROTO op_ssm(void) + { + if (env->priv_level != 0) + raise_exception(EXCP_PRIVOP); + T0 = env->psw & (PSW_W | PSW_E | PSW_O | PSW_G | PSW_F | PSW_R | PSW_Q | PSW_P | PSW_D | PSW_I); + + if (PARAM1 & (1 << 0)) + env->psw |= PSW_W; + if (PARAM1 & (1 << 1)) + env->psw |= PSW_E; + if (PARAM1 & (1 << 2)) + env->psw |= PSW_O; + if (PARAM1 & (1 << 3)) + env->psw |= PSW_G; + if (PARAM1 & (1 << 4)) + env->psw |= PSW_F; + if (PARAM1 & (1 << 5)) + env->psw |= PSW_R; + if (PARAM1 & (1 << 7)) + env->psw |= PSW_P; + if (PARAM1 & (1 << 8)) + env->psw |= PSW_D; + if (PARAM1 & (1 << 9)) + env->psw |= PSW_I; + } + + void OPPROTO op_rsm(void) + { + if (env->priv_level != 0) + raise_exception(EXCP_PRIVOP); + T0 = env->psw & (PSW_W | PSW_E | PSW_O | PSW_G | PSW_F | PSW_R | PSW_Q | PSW_P | PSW_D | PSW_I); + + if (PARAM1 & (1 << 0)) + env->psw &= ~PSW_W; + if (PARAM1 & (1 << 1)) + env->psw &= ~PSW_E; + if (PARAM1 & (1 << 2)) + env->psw &= ~PSW_O; + if (PARAM1 & (1 << 3)) + env->psw &= ~PSW_G; + if (PARAM1 & (1 << 4)) + env->psw &= ~PSW_F; + if (PARAM1 & (1 << 5)) + env->psw &= ~PSW_R; + if (PARAM1 & (1 << 7)) + env->psw &= ~PSW_P; + if (PARAM1 & (1 << 8)) + env->psw &= ~PSW_D; + if (PARAM1 & (1 << 9)) + env->psw &= ~PSW_I; + } + + void OPPROTO op_mtsm(void) + { + if (env->priv_level != 0) + raise_exception(EXCP_PRIVOP); + env->psw = env->psw & ~(PSW_W | PSW_E | PSW_O | PSW_G | PSW_F | PSW_R | PSW_Q | PSW_P | PSW_D | PSW_I); + env->psw |= T0 & (PSW_W | PSW_E | PSW_O | PSW_G | PSW_F | PSW_R | PSW_Q | PSW_P | PSW_D | PSW_I); + } /* computation instructions... page 169 PA1.1 specification */ Index: cpu.h =================================================================== RCS file: /cvsroot/hppaqemu/hppaqemu/target-hppa/cpu.h,v retrieving revision 1.4 retrieving revision 1.5 diff -C2 -d -r1.4 -r1.5 *** cpu.h 6 Mar 2007 14:41:50 -0000 1.4 --- cpu.h 9 Mar 2007 15:57:31 -0000 1.5 *************** *** 101,105 **** #define PSW_I 0x80000000 ! #define PSW_CB7_SHIFT 7 /* CHECK */ typedef struct CPUHPPAState { --- 101,105 ---- #define PSW_I 0x80000000 ! #define PSW_CB7_SHIFT 8 /* CHECK */ typedef struct CPUHPPAState { *************** *** 116,119 **** --- 116,123 ---- target_ulong iaoq[2]; /* Instruction Address Offset Queue */ uint32_t iasq[2]; /* Instruction Address Space Queue */ + target_ulong iiaoq_back; + uint32_t iiasq_back; + + uint8_t priv_level; /* gr[0] : permanently 0 |
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From: Randolph C. <ta...@us...> - 2007-03-07 05:27:34
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Update of /cvsroot/hppaqemu/hppaqemu/target-hppa In directory sc8-pr-cvs5.sourceforge.net:/tmp/cvs-serv11060/target-hppa Modified Files: translate.c Log Message: un-inline functions for easier debugging let gen_intermediate_code make forward progress fixed a typo with handling of the store opcode Index: translate.c =================================================================== RCS file: /cvsroot/hppaqemu/hppaqemu/target-hppa/translate.c,v retrieving revision 1.9 retrieving revision 1.10 diff -C2 -d -r1.9 -r1.10 *** translate.c 6 Mar 2007 14:41:50 -0000 1.9 --- translate.c 7 Mar 2007 05:27:31 -0000 1.10 *************** *** 58,62 **** static void disas_hppa_insn(DisasContext * dc); ! static inline uint32_t field(uint32_t val, int start, int length) { val >>= start; val &= ~(~0 << length); --- 58,62 ---- static void disas_hppa_insn(DisasContext * dc); ! static uint32_t field(uint32_t val, int start, int length) { val >>= start; val &= ~(~0 << length); *************** *** 64,68 **** } ! static inline uint32_t field_signext(uint32_t val, int start, int length) { val >>= start; if (val & (1 << (length - 1))) --- 64,68 ---- } ! static uint32_t field_signext(uint32_t val, int start, int length) { val >>= start; if (val & (1 << (length - 1))) *************** *** 73,77 **** } ! static inline uint32_t signext(uint32_t val, int length) { if (val & (1 << (length - 1))) val |= ~0 << length; --- 73,77 ---- } ! static uint32_t signext(uint32_t val, int length) { if (val & (1 << (length - 1))) val |= ~0 << length; *************** *** 228,247 **** #define gen_op_ldst(name) gen_op_##name##_raw() ! static inline void gen_movl_imm_TN(int reg, int val) { gen_op_movl_TN_im[reg](val); } ! static inline void gen_movl_imm_T0(int val) { gen_movl_imm_TN(0, val); } ! static inline void gen_movl_imm_T1(int val) { gen_movl_imm_TN(1, val); } ! static inline void gen_movl_reg_TN(int reg, int t) { if (reg) --- 228,247 ---- #define gen_op_ldst(name) gen_op_##name##_raw() ! static void gen_movl_imm_TN(int reg, int val) { gen_op_movl_TN_im[reg](val); } ! static void gen_movl_imm_T0(int val) { gen_movl_imm_TN(0, val); } ! static void gen_movl_imm_T1(int val) { gen_movl_imm_TN(1, val); } ! static void gen_movl_reg_TN(int reg, int t) { if (reg) *************** *** 251,265 **** } ! static inline void gen_movl_reg_T0(int reg) { gen_movl_reg_TN(reg, 0); } ! static inline void gen_movl_reg_T1(int reg) { gen_movl_reg_TN(reg, 1); } ! static inline void gen_movl_TN_reg(int reg, int t) { if (reg) --- 251,265 ---- } ! static void gen_movl_reg_T0(int reg) { gen_movl_reg_TN(reg, 0); } ! static void gen_movl_reg_T1(int reg) { gen_movl_reg_TN(reg, 1); } ! static void gen_movl_TN_reg(int reg, int t) { if (reg) *************** *** 267,276 **** } ! static inline void gen_movl_T0_reg(int reg) { gen_movl_TN_reg(reg, 0); } ! static inline void gen_movl_T1_reg(int reg) { gen_movl_TN_reg(reg, 1); --- 267,276 ---- } ! static void gen_movl_T0_reg(int reg) { gen_movl_TN_reg(reg, 0); } ! static void gen_movl_T1_reg(int reg) { gen_movl_TN_reg(reg, 1); *************** *** 279,293 **** #define gen_op_shift_T0(s) gen_op_shift##s##_T0() ! static inline void gen_goto_tb(DisasContext *s, int tb_num, target_ulong pc, target_ulong npc) { } ! static inline void gen_branch(DisasContext *dc, long tb, target_ulong pc, target_ulong npc) { gen_goto_tb(dc, 0, pc, npc); } ! static inline int gen_intermediate_code_internal(CPUState *env, TranslationBlock *tb, int search_pc) --- 279,294 ---- #define gen_op_shift_T0(s) gen_op_shift##s##_T0() ! static void gen_goto_tb(DisasContext *dc, int tb_num, target_ulong pc, target_ulong npc) { + dc->is_br = 1; } ! static void gen_branch(DisasContext *dc, long tb, target_ulong pc, target_ulong npc) { gen_goto_tb(dc, 0, pc, npc); } ! static int gen_intermediate_code_internal(CPUState *env, TranslationBlock *tb, int search_pc) *************** *** 302,307 **** pc_start = tb->pc; dc->iaoq[0] = pc_start; last_pc = dc->iaoq[0]; ! dc->iaoq[1] = (target_ulong) tb->cs_base; /* CHECK */ gen_opc_ptr = gen_opc_buf; gen_opc_end = gen_opc_buf + OPC_MAX_SIZE; --- 303,309 ---- pc_start = tb->pc; dc->iaoq[0] = pc_start; + dc->iaoq[1] = pc_start + 4; last_pc = dc->iaoq[0]; ! dc->iasq[0] = dc->iasq[1] = tb->cs_base; gen_opc_ptr = gen_opc_buf; gen_opc_end = gen_opc_buf + OPC_MAX_SIZE; *************** *** 805,809 **** case 0x1a: /* STW */ { ! uint32_t b, t, r, s, im14; b = field(insn, 21, 5); t = field(insn, 16, 5); --- 807,811 ---- case 0x1a: /* STW */ { ! uint32_t b, t, s, im14; b = field(insn, 21, 5); t = field(insn, 16, 5); *************** *** 815,819 **** gen_movl_imm_T1(im14); gen_op_add_T1_T0(); ! gen_movl_reg_T1(r); switch(op) { case 0x18: /* STB */ --- 817,821 ---- gen_movl_imm_T1(im14); gen_op_add_T1_T0(); ! gen_movl_reg_T1(t); switch(op) { case 0x18: /* STB */ *************** *** 895,898 **** --- 897,902 ---- case 0x32: /* MOVB */ case 0x33: /* MOVIB */ + /* FIXME */ + dc->is_br = 1; break; *************** *** 943,946 **** --- 947,953 ---- disp = (((((w1 << 11) | w2) << 1) | w) << 2); /* */ + + /* FIXME */ + dc->is_br = 1; break; } *************** *** 968,971 **** --- 975,981 ---- break; } + + /* FIXME */ + dc->is_br = 1; break; } *************** *** 975,978 **** --- 985,991 ---- break; } + + dc->iaoq[0] = dc->iaoq[1]; + dc->iaoq[1] = dc->iaoq[1] + 4; } |
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From: Randolph C. <ta...@us...> - 2007-03-06 14:41:55
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Update of /cvsroot/hppaqemu/hppaqemu/target-hppa In directory sc8-pr-cvs5.sourceforge.net:/tmp/cvs-serv8436/target-hppa Modified Files: cpu.h helper.c op.c translate.c Log Message: fill in cpu_loop so that it will start running code fill in gen_intermediate_code to fill in translation blocks add link script to link qemu-hppa properly turn on hppa in_asm decoding Index: translate.c =================================================================== RCS file: /cvsroot/hppaqemu/hppaqemu/target-hppa/translate.c,v retrieving revision 1.8 retrieving revision 1.9 diff -C2 -d -r1.8 -r1.9 *** translate.c 5 Mar 2007 14:32:27 -0000 1.8 --- translate.c 6 Mar 2007 14:41:50 -0000 1.9 *************** *** 30,36 **** --- 30,43 ---- #include "disas.h" + #define DEBUG_DISAS + + #define DYNAMIC_PC 1 /* dynamic pc value */ + #define JUMP_PC 2 /* dynamic pc value which takes only two values + according to jump_pc[T2] */ + typedef struct DisasContext { target_ulong iaoq[2]; target_ulong iasq[2]; + int is_br; struct TranslationBlock *tb; } DisasContext; *************** *** 49,52 **** --- 56,61 ---- #include "gen-op.h" + static void disas_hppa_insn(DisasContext * dc); + static inline uint32_t field(uint32_t val, int start, int length) { val >>= start; *************** *** 270,278 **** #define gen_op_shift_T0(s) gen_op_shift##s##_T0() static inline int gen_intermediate_code_internal(CPUState *env, TranslationBlock *tb, int search_pc) { ! return -1; } --- 279,412 ---- #define gen_op_shift_T0(s) gen_op_shift##s##_T0() + static inline void gen_goto_tb(DisasContext *s, int tb_num, + target_ulong pc, target_ulong npc) + { + } + + static inline void gen_branch(DisasContext *dc, long tb, target_ulong pc, target_ulong npc) + { + gen_goto_tb(dc, 0, pc, npc); + } + static inline int gen_intermediate_code_internal(CPUState *env, TranslationBlock *tb, int search_pc) { ! target_ulong pc_start, last_pc; ! uint16_t *gen_opc_end; ! DisasContext dc1, *dc = &dc1; ! int j, lj = -1; ! ! memset(dc, 0, sizeof(DisasContext)); ! dc->tb = tb; ! pc_start = tb->pc; ! dc->iaoq[0] = pc_start; ! last_pc = dc->iaoq[0]; ! dc->iaoq[1] = (target_ulong) tb->cs_base; /* CHECK */ ! gen_opc_ptr = gen_opc_buf; ! gen_opc_end = gen_opc_buf + OPC_MAX_SIZE; ! gen_opparam_ptr = gen_opparam_buf; ! nb_gen_labels = 0; ! ! do { ! if (env->nb_breakpoints > 0) { ! for(j = 0; j < env->nb_breakpoints; j++) { ! if (env->breakpoints[j] == dc->iaoq[0]) { ! /* ! if (dc->iaoq[0] != pc_start) ! save_state(dc); ! gen_op_debug(); ! gen_op_movl_T0_GR0(); ! gen_op_exit_tb(); ! */ ! dc->is_br = 1; ! goto exit_gen_loop; ! } ! } ! } ! if (search_pc) { ! if (loglevel > 0) ! fprintf(logfile, "Search PC...\n"); ! j = gen_opc_ptr - gen_opc_buf; ! if (lj < j) { ! lj++; ! while (lj < j) ! gen_opc_instr_start[lj++] = 0; ! gen_opc_pc[lj] = dc->iaoq[0]; ! gen_opc_instr_start[lj] = 1; ! } ! } ! last_pc = dc->iaoq[0]; ! disas_hppa_insn(dc); ! ! if (dc->is_br) ! break; ! /* if the next PC is different, we abort now */ ! if (dc->iaoq[0] != (last_pc + 4)) ! break; ! /* if we reach a page boundary, we stop generation so that the ! PC of a TT_TFAULT exception is always in the right page */ ! if ((dc->iaoq[0] & (TARGET_PAGE_SIZE - 1)) == 0) ! break; ! /* if single step mode, we generate only one instruction and ! generate an exception */ ! if (env->singlestep_enabled) { ! gen_op_jmp_im(dc->iaoq[0]); ! gen_op_movl_T0_GR0(); ! gen_op_exit_tb(); ! break; ! } ! } while ((gen_opc_ptr < gen_opc_end) && ! (dc->iaoq[0] - pc_start) < (TARGET_PAGE_SIZE - 32)); ! ! exit_gen_loop: ! if (!dc->is_br) { ! if (dc->iaoq[0] != DYNAMIC_PC && ! (dc->iaoq[1] != DYNAMIC_PC && dc->iaoq[1] != JUMP_PC)) { ! /* static PC and NPC: we can use direct chaining */ ! gen_branch(dc, (long)tb, dc->iaoq[0], dc->iaoq[1]); ! } else { ! if (dc->iaoq[0] != DYNAMIC_PC) ! gen_op_jmp_im(dc->iaoq[0]); ! /* ! save_npc(dc); ! gen_op_movl_T0_GR0(); ! */ ! gen_op_exit_tb(); ! } ! } ! *gen_opc_ptr = INDEX_op_end; ! if (search_pc) { ! j = gen_opc_ptr - gen_opc_buf; ! lj++; ! while (lj <= j) ! gen_opc_instr_start[lj++] = 0; ! tb->size = 0; ! #if 0 ! if (loglevel > 0) { ! page_dump(logfile); ! } ! #endif ! /* ! gen_opc_jump_pc[0] = dc->jump_pc[0]; ! gen_opc_jump_pc[1] = dc->jump_pc[1]; ! */ ! } else { ! tb->size = last_pc + 4 - pc_start; ! } ! #ifdef DEBUG_DISAS ! if (loglevel & CPU_LOG_TB_IN_ASM) { ! fprintf(logfile, "--------------\n"); ! fprintf(logfile, "IN: %s\n", lookup_symbol(pc_start)); ! target_disas(logfile, pc_start, last_pc + 4 - pc_start, 0); ! fprintf(logfile, "\n"); ! if (loglevel & CPU_LOG_TB_OP) { ! fprintf(logfile, "OP:\n"); ! dump_ops(gen_opc_buf, gen_opparam_buf); ! fprintf(logfile, "\n"); ! } ! } ! #endif ! return 0; } Index: helper.c =================================================================== RCS file: /cvsroot/hppaqemu/hppaqemu/target-hppa/helper.c,v retrieving revision 1.1 retrieving revision 1.2 diff -C2 -d -r1.1 -r1.2 *** helper.c 4 Mar 2007 23:19:41 -0000 1.1 --- helper.c 6 Mar 2007 14:41:50 -0000 1.2 *************** *** 18,19 **** --- 18,29 ---- + #if defined (CONFIG_USER_ONLY) + void do_interrupt (CPUState *env) + { + env->exception_index = -1; + } + #else + void do_interrupt (CPUState *env) + { + } + #endif /* !CONFIG_USER_ONLY */ Index: op.c =================================================================== RCS file: /cvsroot/hppaqemu/hppaqemu/target-hppa/op.c,v retrieving revision 1.5 retrieving revision 1.6 diff -C2 -d -r1.5 -r1.6 *** op.c 5 Mar 2007 14:32:27 -0000 1.5 --- op.c 6 Mar 2007 14:41:50 -0000 1.6 *************** *** 395,397 **** --- 395,408 ---- } + void OPPROTO op_exit_tb(void) + { + EXIT_TB(); + } + + void OPPROTO op_jmp_im(void) + { + env->iaoq[0] = (uint32_t)PARAM1; + env->iaoq[1] = env->iaoq[0] + 4; + } + #include "op_mem.h" Index: cpu.h =================================================================== RCS file: /cvsroot/hppaqemu/hppaqemu/target-hppa/cpu.h,v retrieving revision 1.3 retrieving revision 1.4 diff -C2 -d -r1.3 -r1.4 *** cpu.h 4 Mar 2007 15:16:27 -0000 1.3 --- cpu.h 6 Mar 2007 14:41:50 -0000 1.4 *************** *** 33,36 **** --- 33,69 ---- #define ELF_MACHINE EM_PARISC + /* Group 1 interruptions */ + #define EXCP_HPMC 1 /* High-priority machine check */ + /* Group 2 interruptions */ + #define EXCP_POWERFAIL 2 + #define EXCP_RCVRCTR 3 + #define EXCP_EXTINT 4 + #define EXCP_LPMC 5 + #define EXCP_PERFMON 29 + /* Group 3 interruptions */ + #define EXCP_ITLBMISS 6 + #define EXCP_IMEMTRAP 7 + #define EXCP_ILLEGAL 8 + #define EXCP_BREAK 9 + #define EXCP_PRIVOP 10 + #define EXCP_PRIVREG 11 + #define EXCP_OVERFLOW 12 + #define EXCP_CONDITIONAL 13 + #define EXCP_ASSISTEX 14 + #define EXCP_DTLBMISS 15 + #define EXCP_NAITLBMISS 16 + #define EXCP_NADTLBMISS 17 + #define EXCP_DMEMACCESS 26 + #define EXCP_DMEMPROT 27 + #define EXCP_UNALIGNED 28 + #define EXCP_DMEMPROT2 19 + #define EXCP_TLBDIRTY 20 + #define EXCP_PAGEREF 21 + #define EXCP_ASSISTEMU 22 + /* Group 4 interruptions */ + #define EXCP_HIPRIVXFER 23 + #define EXCP_LOPRIVXFER 24 + #define EXCP_TAKENBR 25 + /* the shadow registers map to the following general registers */ // int shrmap[] = { 1, 6, 9, 16, 17, 24, 25 }; |
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From: Randolph C. <ta...@us...> - 2007-03-06 14:41:54
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Update of /cvsroot/hppaqemu/hppaqemu In directory sc8-pr-cvs5.sourceforge.net:/tmp/cvs-serv8436 Modified Files: Makefile.target cpu-exec.c dis-asm.h disas.c Added Files: hppa.ld Log Message: fill in cpu_loop so that it will start running code fill in gen_intermediate_code to fill in translation blocks add link script to link qemu-hppa properly turn on hppa in_asm decoding Index: Makefile.target =================================================================== RCS file: /cvsroot/hppaqemu/hppaqemu/Makefile.target,v retrieving revision 1.4 retrieving revision 1.5 diff -C2 -d -r1.4 -r1.5 *** Makefile.target 4 Mar 2007 23:19:40 -0000 1.4 --- Makefile.target 6 Mar 2007 14:41:50 -0000 1.5 *************** *** 146,149 **** --- 146,150 ---- ifeq ($(ARCH),hppa) OP_CFLAGS=-O1 -fno-delayed-branch + BASE_LDFLAGS+=-Wl,-T,$(SRC_PATH)/$(ARCH).ld endif Index: dis-asm.h =================================================================== RCS file: /cvsroot/hppaqemu/hppaqemu/dis-asm.h,v retrieving revision 1.1.1.1 retrieving revision 1.2 diff -C2 -d -r1.1.1.1 -r1.2 *** dis-asm.h 23 Feb 2007 21:44:02 -0000 1.1.1.1 --- dis-asm.h 6 Mar 2007 14:41:50 -0000 1.2 *************** *** 158,161 **** --- 158,165 ---- bfd_arch_rs6000, /* IBM RS/6000 */ bfd_arch_hppa, /* HP PA RISC */ + #define bfd_mach_hppa10 10 + #define bfd_mach_hppa11 11 + #define bfd_mach_hppa20 20 + #define bfd_mach_hppa20w 25 bfd_arch_d10v, /* Mitsubishi D10V */ bfd_arch_z8k, /* Zilog Z8000 */ --- NEW FILE: hppa.ld --- /* Default linker script, for normal executables */ OUTPUT_FORMAT("elf32-hppa-linux", "elf32-hppa-linux", "elf32-hppa-linux") OUTPUT_ARCH(hppa:hppa1.1) ENTRY(_start) SEARCH_DIR("/usr/hppa-linux-gnu/lib"); SEARCH_DIR("/usr/local/lib"); SEARCH_DIR("/lib"); SEARCH_DIR("/usr/lib"); SECTIONS { /* Read-only sections, merged into text segment: */ PROVIDE (__executable_start = 0x60000000); . = 0x60000000 + SIZEOF_HEADERS; .interp : { *(.interp) } .hash : { *(.hash) } .dynsym : { *(.dynsym) } .dynstr : { *(.dynstr) } .gnu.version : { *(.gnu.version) } .gnu.version_d : { *(.gnu.version_d) } .gnu.version_r : { *(.gnu.version_r) } .rel.init : { *(.rel.init) } .rela.init : { *(.rela.init) } .rel.text : { *(.rel.text .rel.text.* .rel.gnu.linkonce.t.*) } .rela.text : { *(.rela.text .rela.text.* .rela.gnu.linkonce.t.*) } .rel.fini : { *(.rel.fini) } .rela.fini : { *(.rela.fini) } .rel.rodata : { *(.rel.rodata .rel.rodata.* .rel.gnu.linkonce.r.*) } .rela.rodata : { *(.rela.rodata .rela.rodata.* .rela.gnu.linkonce.r.*) } .rel.data.rel.ro : { *(.rel.data.rel.ro* .rel.gnu.linkonce.d.rel.ro.*) } .rela.data.rel.ro : { *(.rela.data.rel.ro* .rela.gnu.linkonce.d.rel.ro.*) } .rel.data : { *(.rel.data .rel.data.* .rel.gnu.linkonce.d.*) } .rela.data : { *(.rela.data .rela.data.* .rela.gnu.linkonce.d.*) } .rel.tdata : { *(.rel.tdata .rel.tdata.* .rel.gnu.linkonce.td.*) } .rela.tdata : { *(.rela.tdata .rela.tdata.* .rela.gnu.linkonce.td.*) } .rel.tbss : { *(.rel.tbss .rel.tbss.* .rel.gnu.linkonce.tb.*) } .rela.tbss : { *(.rela.tbss .rela.tbss.* .rela.gnu.linkonce.tb.*) } .rel.ctors : { *(.rel.ctors) } .rela.ctors : { *(.rela.ctors) } .rel.dtors : { *(.rel.dtors) } .rela.dtors : { *(.rela.dtors) } .rel.got : { *(.rel.got) } .rela.got : { *(.rela.got) } .rel.sdata : { *(.rel.sdata .rel.sdata.* .rel.gnu.linkonce.s.*) } .rela.sdata : { *(.rela.sdata .rela.sdata.* .rela.gnu.linkonce.s.*) } .rel.sbss : { *(.rel.sbss .rel.sbss.* .rel.gnu.linkonce.sb.*) } .rela.sbss : { *(.rela.sbss .rela.sbss.* .rela.gnu.linkonce.sb.*) } .rel.sdata2 : { *(.rel.sdata2 .rel.sdata2.* .rel.gnu.linkonce.s2.*) } .rela.sdata2 : { *(.rela.sdata2 .rela.sdata2.* .rela.gnu.linkonce.s2.*) } .rel.sbss2 : { *(.rel.sbss2 .rel.sbss2.* .rel.gnu.linkonce.sb2.*) } .rela.sbss2 : { *(.rela.sbss2 .rela.sbss2.* .rela.gnu.linkonce.sb2.*) } .rel.bss : { *(.rel.bss .rel.bss.* .rel.gnu.linkonce.b.*) } .rela.bss : { *(.rela.bss .rela.bss.* .rela.gnu.linkonce.b.*) } .rel.plt : { *(.rel.plt) } .rela.plt : { *(.rela.plt) } .init : { KEEP (*(.init)) } =0x08000240 .text : { *(.text .stub .text.* .gnu.linkonce.t.*) KEEP (*(.text.*personality*)) /* .gnu.warning sections are handled specially by elf32.em. */ *(.gnu.warning) } =0x08000240 .fini : { KEEP (*(.fini)) } =0x08000240 PROVIDE (__etext = .); PROVIDE (_etext = .); PROVIDE (etext = .); .rodata : { *(.rodata .rodata.* .gnu.linkonce.r.*) } .rodata1 : { *(.rodata1) } .sdata2 : { *(.sdata2 .sdata2.* .gnu.linkonce.s2.*) } .sbss2 : { *(.sbss2 .sbss2.* .gnu.linkonce.sb2.*) } .PARISC.unwind : { *(.PARISC.unwind) } .eh_frame_hdr : { *(.eh_frame_hdr) } .eh_frame : ONLY_IF_RO { KEEP (*(.eh_frame)) } .gcc_except_table : ONLY_IF_RO { *(.gcc_except_table .gcc_except_table.*) } /* Adjust the address for the data segment. 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The .ctor section from the crtend file contains the end of ctors marker and it must be last */ KEEP (*(EXCLUDE_FILE (*crtend*.o ) .ctors)) KEEP (*(SORT(.ctors.*))) KEEP (*(.ctors)) } .dtors : { KEEP (*crtbegin*.o(.dtors)) KEEP (*(EXCLUDE_FILE (*crtend*.o ) .dtors)) KEEP (*(SORT(.dtors.*))) KEEP (*(.dtors)) } .jcr : { KEEP (*(.jcr)) } .data.rel.ro : { *(.data.rel.ro.local* .gnu.linkonce.d.rel.ro.local.*) *(.data.rel.ro* .gnu.linkonce.d.rel.ro.*) } .dynamic : { *(.dynamic) } .data : { PROVIDE ($global$ = .); *(.data .data.* .gnu.linkonce.d.*) KEEP (*(.gnu.linkonce.d.*personality*)) SORT(CONSTRUCTORS) } .data1 : { *(.data1) } .plt : { *(.plt) } .got : { *(.got.plt) *(.got) } /* We want the small data sections together, so single-instruction offsets can access them all, and initialized data all before uninitialized, so we can shorten the on-disk segment size. */ .sdata : { *(.sdata .sdata.* .gnu.linkonce.s.*) } _edata = .; PROVIDE (edata = .); __bss_start = .; .sbss : { *(.dynsbss) *(.sbss .sbss.* .gnu.linkonce.sb.*) *(.scommon) } .bss : { *(.dynbss) *(.bss .bss.* .gnu.linkonce.b.*) *(COMMON) /* Align here to ensure that the .bss section occupies space up to _end. Align after .bss to ensure correct alignment even if the .bss section disappears because there are no input sections. FIXME: Why do we need it? When there is no .bss section, we don't pad the .data section. */ . = ALIGN(. != 0 ? 32 / 8 : 1); } . = ALIGN(32 / 8); . = ALIGN(32 / 8); _end = .; PROVIDE (end = .); /* Stabs debugging sections. */ .stab 0 : { *(.stab) } .stabstr 0 : { *(.stabstr) } .stab.excl 0 : { *(.stab.excl) } .stab.exclstr 0 : { *(.stab.exclstr) } .stab.index 0 : { *(.stab.index) } .stab.indexstr 0 : { *(.stab.indexstr) } .comment 0 : { *(.comment) } /* DWARF debug sections. Symbols in the DWARF debugging sections are relative to the beginning of the section so we begin them at 0. */ /* DWARF 1 */ .debug 0 : { *(.debug) } .line 0 : { *(.line) } /* GNU DWARF 1 extensions */ .debug_srcinfo 0 : { *(.debug_srcinfo) } .debug_sfnames 0 : { *(.debug_sfnames) } /* DWARF 1.1 and DWARF 2 */ .debug_aranges 0 : { *(.debug_aranges) } .debug_pubnames 0 : { *(.debug_pubnames) } /* DWARF 2 */ .debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) } .debug_abbrev 0 : { *(.debug_abbrev) } .debug_line 0 : { *(.debug_line) } .debug_frame 0 : { *(.debug_frame) } .debug_str 0 : { *(.debug_str) } .debug_loc 0 : { *(.debug_loc) } .debug_macinfo 0 : { *(.debug_macinfo) } /* SGI/MIPS DWARF 2 extensions */ .debug_weaknames 0 : { *(.debug_weaknames) } .debug_funcnames 0 : { *(.debug_funcnames) } .debug_typenames 0 : { *(.debug_typenames) } .debug_varnames 0 : { *(.debug_varnames) } /DISCARD/ : { *(.note.GNU-stack) } } Index: disas.c =================================================================== RCS file: /cvsroot/hppaqemu/hppaqemu/disas.c,v retrieving revision 1.2 retrieving revision 1.3 diff -C2 -d -r1.2 -r1.3 *** disas.c 4 Mar 2007 15:03:22 -0000 1.2 --- disas.c 6 Mar 2007 14:41:50 -0000 1.3 *************** *** 198,201 **** --- 198,204 ---- disasm_info.mach = bfd_mach_sh4; print_insn = print_insn_sh; + #elif defined(TARGET_HPPA) + disasm_info.mach = bfd_mach_hppa11; + print_insn = print_insn_hppa; #else fprintf(out, "0x" TARGET_FMT_lx Index: cpu-exec.c =================================================================== RCS file: /cvsroot/hppaqemu/hppaqemu/cpu-exec.c,v retrieving revision 1.4 retrieving revision 1.5 diff -C2 -d -r1.4 -r1.5 *** cpu-exec.c 4 Mar 2007 23:19:40 -0000 1.4 --- cpu-exec.c 6 Mar 2007 14:41:50 -0000 1.5 *************** *** 297,300 **** --- 297,309 ---- } } + #elif defined(TARGET_HPPA) + if (env1->halted) { + if (env1->interrupt_request & + (CPU_INTERRUPT_HARD | CPU_INTERRUPT_TIMER)) { + env1->halted = 0; + } else { + return EXCP_HALTED; + } + } #endif *************** *** 377,380 **** --- 386,391 ---- #elif defined(TARGET_SH4) do_interrupt(env); + #elif defined(TARGET_HPPA) + do_interrupt(env); #endif } *************** *** 531,534 **** --- 542,551 ---- #elif defined(TARGET_SH4) /* XXXXX */ + #elif defined(TARGET_HPPA) + if (interrupt_request & CPU_INTERRUPT_HARD + && !(env->psw & PSW_I)) { + env->exception_index = EXCP_EXTINT; + do_interrupt(env); + } #endif /* Don't use the cached interupt_request value, |
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From: Randolph C. <ta...@us...> - 2007-03-06 14:41:54
|
Update of /cvsroot/hppaqemu/hppaqemu/linux-user In directory sc8-pr-cvs5.sourceforge.net:/tmp/cvs-serv8436/linux-user Modified Files: elfload.c main.c mmap.c Log Message: fill in cpu_loop so that it will start running code fill in gen_intermediate_code to fill in translation blocks add link script to link qemu-hppa properly turn on hppa in_asm decoding Index: main.c =================================================================== RCS file: /cvsroot/hppaqemu/hppaqemu/linux-user/main.c,v retrieving revision 1.2 retrieving revision 1.3 diff -C2 -d -r1.2 -r1.3 *** main.c 4 Mar 2007 23:19:41 -0000 1.2 --- main.c 6 Mar 2007 14:41:50 -0000 1.3 *************** *** 1533,1538 **** --- 1533,1551 ---- void cpu_loop(CPUHPPAState *env) { + int trapnr; + target_siginfo_t info; + for (;;) { + trapnr = cpu_hppa_exec(env); + switch (trapnr) + { + default: + fprintf(stderr, "qemu: unhandled CPU exception 0x%x - aborting\n", + trapnr); + cpu_dump_state(env, stderr, fprintf, 0); + abort(); + } + process_pending_signals(env); } } Index: mmap.c =================================================================== RCS file: /cvsroot/hppaqemu/hppaqemu/linux-user/mmap.c,v retrieving revision 1.1.1.1 retrieving revision 1.2 diff -C2 -d -r1.1.1.1 -r1.2 *** mmap.c 23 Feb 2007 21:44:25 -0000 1.1.1.1 --- mmap.c 6 Mar 2007 14:41:50 -0000 1.2 *************** *** 158,162 **** long host_start; #if defined(__alpha__) || defined(__sparc__) || defined(__x86_64__) || \ ! defined(__ia64) static target_ulong last_start = 0x40000000; #elif defined(__CYGWIN__) --- 158,162 ---- long host_start; #if defined(__alpha__) || defined(__sparc__) || defined(__x86_64__) || \ ! defined(__ia64) || defined(__hppa__) static target_ulong last_start = 0x40000000; #elif defined(__CYGWIN__) *************** *** 203,207 **** if (!(flags & MAP_FIXED)) { #if defined(__alpha__) || defined(__sparc__) || defined(__x86_64__) || \ ! defined(__ia64) || defined(__CYGWIN__) /* tell the kenel to search at the same place as i386 */ if (real_start == 0) { --- 203,207 ---- if (!(flags & MAP_FIXED)) { #if defined(__alpha__) || defined(__sparc__) || defined(__x86_64__) || \ ! defined(__ia64) || defined(__CYGWIN__) || defined(__hppa__) /* tell the kenel to search at the same place as i386 */ if (real_start == 0) { Index: elfload.c =================================================================== RCS file: /cvsroot/hppaqemu/hppaqemu/linux-user/elfload.c,v retrieving revision 1.2 retrieving revision 1.3 diff -C2 -d -r1.2 -r1.3 *** elfload.c 4 Mar 2007 23:19:40 -0000 1.2 --- elfload.c 6 Mar 2007 14:41:50 -0000 1.3 *************** *** 316,320 **** #ifdef TARGET_HPPA ! #define ELF_START_MMAP 0x40000000 #define elf_check_arch(x) ( (x) == EM_PARISC ) --- 316,320 ---- #ifdef TARGET_HPPA ! #define ELF_START_MMAP 0x80000000 #define elf_check_arch(x) ( (x) == EM_PARISC ) |
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From: Randolph C. <ta...@us...> - 2007-03-05 14:32:33
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Update of /cvsroot/hppaqemu/hppaqemu/target-hppa In directory sc8-pr-cvs5.sourceforge.net:/tmp/cvs-serv16896 Modified Files: op.c translate.c Log Message: define some ops to help things compile Index: translate.c =================================================================== RCS file: /cvsroot/hppaqemu/hppaqemu/target-hppa/translate.c,v retrieving revision 1.7 retrieving revision 1.8 diff -C2 -d -r1.7 -r1.8 *** translate.c 5 Mar 2007 02:27:42 -0000 1.7 --- translate.c 5 Mar 2007 14:32:27 -0000 1.8 *************** *** 268,271 **** --- 268,273 ---- } + #define gen_op_shift_T0(s) gen_op_shift##s##_T0() + static inline int gen_intermediate_code_internal(CPUState *env, TranslationBlock *tb, *************** *** 678,682 **** /* gen_op_space_sel_T0_T1(); */ gen_movl_imm_T1(im14); ! gen_add_T1_T0(); gen_movl_reg_T1(r); switch(op) { --- 680,684 ---- /* gen_op_space_sel_T0_T1(); */ gen_movl_imm_T1(im14); ! gen_op_add_T1_T0(); gen_movl_reg_T1(r); switch(op) { Index: op.c =================================================================== RCS file: /cvsroot/hppaqemu/hppaqemu/target-hppa/op.c,v retrieving revision 1.4 retrieving revision 1.5 diff -C2 -d -r1.4 -r1.5 *** op.c 4 Mar 2007 15:16:27 -0000 1.4 --- op.c 5 Mar 2007 14:32:27 -0000 1.5 *************** *** 285,287 **** --- 285,397 ---- } + void OPPROTO op_addit_T0(void) + { + /* XXX */ + } + + void OPPROTO op_addito_T0(void) + { + /* XXX */ + } + + void OPPROTO op_undef_insn(void) + { + /* XXX */ + } + + void OPPROTO op_ill_insn(void) + { + /* XXX */ + } + + void OPPROTO op_movl_T0_T2(void) + { + /* XXX */ + } + + void OPPROTO op_addo_T1_T0(void) + { + /* XXX */ + } + + void OPPROTO op_addco_T1_T0(void) + { + /* XXX */ + } + + void OPPROTO op_shift1_T0(void) + { + /* XXX */ + } + + void OPPROTO op_shift2_T0(void) + { + /* XXX */ + } + + void OPPROTO op_shift3_T0(void) + { + /* XXX */ + } + + void OPPROTO op_sub_T1_T0(void) + { + /* XXX */ + } + + void OPPROTO op_subo_T1_T0(void) + { + /* XXX */ + } + + void OPPROTO op_subt_T1_T0(void) + { + /* XXX */ + } + + void OPPROTO op_subto_T1_T0(void) + { + /* XXX */ + } + + void OPPROTO op_subb_T1_T0(void) + { + /* XXX */ + } + + void OPPROTO op_subbo_T1_T0(void) + { + /* XXX */ + } + + void OPPROTO op_ds_T1_T0(void) + { + /* XXX */ + } + + void OPPROTO op_uxor_T1_T0(void) + { + /* XXX */ + } + + void OPPROTO op_com_T1(void) + { + /* XXX */ + } + + void OPPROTO op_uaddcmt_T1_T0(void) + { + /* XXX */ + } + + void OPPROTO op_dcor_T0(void) + { + /* XXX */ + } + + void OPPROTO op_idcor_T0(void) + { + /* XXX */ + } + #include "op_mem.h" |
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From: Stuart B. <zu...@us...> - 2007-03-05 02:27:49
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Update of /cvsroot/hppaqemu/hppaqemu/linux-user/hppa In directory sc8-pr-cvs5.sourceforge.net:/tmp/cvs-serv17959/linux-user/hppa Modified Files: termbits.h Log Message: Fix TARGET_SA_RESETHAND macro, fix typo in disas_hppa_insn and replace termbits.h with a PA-RISC version. Index: termbits.h =================================================================== RCS file: /cvsroot/hppaqemu/hppaqemu/linux-user/hppa/termbits.h,v retrieving revision 1.1 retrieving revision 1.2 diff -C2 -d -r1.1 -r1.2 *** termbits.h 4 Mar 2007 23:19:41 -0000 1.1 --- termbits.h 5 Mar 2007 02:27:42 -0000 1.2 *************** *** 8,13 **** unsigned int c_cflag; /* control mode flags */ unsigned int c_lflag; /* local mode flags */ ! unsigned char c_line; /* line discipline */ ! unsigned char c_cc[TARGET_NCCS]; /* control characters */ }; --- 8,13 ---- unsigned int c_cflag; /* control mode flags */ unsigned int c_lflag; /* local mode flags */ ! unsigned char c_line; /* line discipline */ ! unsigned char c_cc[TARGET_NCCS]; /* control characters */ }; *************** *** 18,279 **** #define TARGET_VKILL 3 #define TARGET_VEOF 4 ! #define TARGET_VEOL 5 ! #define TARGET_VEOL2 6 #define TARGET_VSWTC 7 #define TARGET_VSTART 8 #define TARGET_VSTOP 9 - #define TARGET_VSUSP 10 ! #define TARGET_VDSUSP 11 /* SunOS POSIX nicety I do believe... */ #define TARGET_VREPRINT 12 #define TARGET_VDISCARD 13 #define TARGET_VWERASE 14 #define TARGET_VLNEXT 15 ! ! /* Kernel keeps vmin/vtime separated, user apps assume vmin/vtime is ! * shared with eof/eol ! */ ! #define TARGET_VMIN TARGET_VEOF ! #define TARGET_VTIME TARGET_VEOL /* c_iflag bits */ ! #define TARGET_IGNBRK 0x00000001 ! #define TARGET_BRKINT 0x00000002 ! #define TARGET_IGNPAR 0x00000004 ! #define TARGET_PARMRK 0x00000008 ! #define TARGET_INPCK 0x00000010 ! #define TARGET_ISTRIP 0x00000020 ! #define TARGET_INLCR 0x00000040 ! #define TARGET_IGNCR 0x00000080 ! #define TARGET_ICRNL 0x00000100 ! #define TARGET_IUCLC 0x00000200 ! #define TARGET_IXON 0x00000400 ! #define TARGET_IXANY 0x00000800 ! #define TARGET_IXOFF 0x00001000 ! #define TARGET_IMAXBEL 0x00002000 /* c_oflag bits */ ! #define TARGET_OPOST 0x00000001 ! #define TARGET_OLCUC 0x00000002 ! #define TARGET_ONLCR 0x00000004 ! #define TARGET_OCRNL 0x00000008 ! #define TARGET_ONOCR 0x00000010 ! #define TARGET_ONLRET 0x00000020 ! #define TARGET_OFILL 0x00000040 ! #define TARGET_OFDEL 0x00000080 ! #define TARGET_NLDLY 0x00000100 ! #define TARGET_NL0 0x00000000 ! #define TARGET_NL1 0x00000100 ! #define TARGET_CRDLY 0x00000600 ! #define TARGET_CR0 0x00000000 ! #define TARGET_CR1 0x00000200 ! #define TARGET_CR2 0x00000400 ! #define TARGET_CR3 0x00000600 ! #define TARGET_TABDLY 0x00001800 ! #define TARGET_TAB0 0x00000000 ! #define TARGET_TAB1 0x00000800 ! #define TARGET_TAB2 0x00001000 ! #define TARGET_TAB3 0x00001800 ! #define TARGET_XTABS 0x00001800 ! #define TARGET_BSDLY 0x00002000 ! #define TARGET_BS0 0x00000000 ! #define TARGET_BS1 0x00002000 ! #define TARGET_VTDLY 0x00004000 ! #define TARGET_VT0 0x00000000 ! #define TARGET_VT1 0x00004000 ! #define TARGET_FFDLY 0x00008000 ! #define TARGET_FF0 0x00000000 ! #define TARGET_FF1 0x00008000 ! #define TARGET_PAGEOUT 0x00010000 /* SUNOS specific */ ! #define TARGET_WRAP 0x00020000 /* SUNOS specific */ /* c_cflag bit meaning */ ! #define TARGET_CBAUD 0x0000100f ! #define TARGET_B0 0x00000000 /* hang up */ ! #define TARGET_B50 0x00000001 ! #define TARGET_B75 0x00000002 ! #define TARGET_B110 0x00000003 ! #define TARGET_B134 0x00000004 ! #define TARGET_B150 0x00000005 ! #define TARGET_B200 0x00000006 ! #define TARGET_B300 0x00000007 ! #define TARGET_B600 0x00000008 ! #define TARGET_B1200 0x00000009 ! #define TARGET_B1800 0x0000000a ! #define TARGET_B2400 0x0000000b ! #define TARGET_B4800 0x0000000c ! #define TARGET_B9600 0x0000000d ! #define TARGET_B19200 0x0000000e ! #define TARGET_B38400 0x0000000f ! #define TARGET_EXTA B19200 ! #define TARGET_EXTB B38400 ! #define TARGET_CSIZE 0x00000030 ! #define TARGET_CS5 0x00000000 ! #define TARGET_CS6 0x00000010 ! #define TARGET_CS7 0x00000020 ! #define TARGET_CS8 0x00000030 ! #define TARGET_CSTOPB 0x00000040 ! #define TARGET_CREAD 0x00000080 ! #define TARGET_PARENB 0x00000100 ! #define TARGET_PARODD 0x00000200 ! #define TARGET_HUPCL 0x00000400 ! #define TARGET_CLOCAL 0x00000800 ! #define TARGET_CBAUDEX 0x00001000 ! /* We'll never see these speeds with the Zilogs, but for completeness... */ ! #define TARGET_B57600 0x00001001 ! #define TARGET_B115200 0x00001002 ! #define TARGET_B230400 0x00001003 ! #define TARGET_B460800 0x00001004 ! /* This is what we can do with the Zilogs. */ ! #define TARGET_B76800 0x00001005 ! /* This is what we can do with the SAB82532. */ ! #define TARGET_B153600 0x00001006 ! #define TARGET_B307200 0x00001007 ! #define TARGET_B614400 0x00001008 ! #define TARGET_B921600 0x00001009 ! /* And these are the rest... */ ! #define TARGET_B500000 0x0000100a ! #define TARGET_B576000 0x0000100b ! #define TARGET_B1000000 0x0000100c ! #define TARGET_B1152000 0x0000100d ! #define TARGET_B1500000 0x0000100e ! #define TARGET_B2000000 0x0000100f ! /* These have totally bogus values and nobody uses them ! so far. Later on we'd have to use say 0x10000x and ! adjust CBAUD constant and drivers accordingly. ! #define B2500000 0x00001010 ! #define B3000000 0x00001011 ! #define B3500000 0x00001012 ! #define B4000000 0x00001013 */ ! #define TARGET_CIBAUD 0x100f0000 /* input baud rate (not used) */ ! #define TARGET_CMSPAR 0x40000000 /* mark or space (stick) parity */ ! #define TARGET_CRTSCTS 0x80000000 /* flow control */ /* c_lflag bits */ ! #define TARGET_ISIG 0x00000001 ! #define TARGET_ICANON 0x00000002 ! #define TARGET_XCASE 0x00000004 ! #define TARGET_ECHO 0x00000008 ! #define TARGET_ECHOE 0x00000010 ! #define TARGET_ECHOK 0x00000020 ! #define TARGET_ECHONL 0x00000040 ! #define TARGET_NOFLSH 0x00000080 ! #define TARGET_TOSTOP 0x00000100 ! #define TARGET_ECHOCTL 0x00000200 ! #define TARGET_ECHOPRT 0x00000400 ! #define TARGET_ECHOKE 0x00000800 ! #define TARGET_DEFECHO 0x00001000 /* SUNOS thing, what is it? */ ! #define TARGET_FLUSHO 0x00002000 ! #define TARGET_PENDIN 0x00004000 ! #define TARGET_IEXTEN 0x00008000 /* ioctls */ ! /* Big T */ ! #define TARGET_TCGETA TARGET_IOR('T', 1, struct target_termio) ! #define TARGET_TCSETA TARGET_IOW('T', 2, struct target_termio) ! #define TARGET_TCSETAW TARGET_IOW('T', 3, struct target_termio) ! #define TARGET_TCSETAF TARGET_IOW('T', 4, struct target_termio) ! #define TARGET_TCSBRK TARGET_IO('T', 5) ! #define TARGET_TCXONC TARGET_IO('T', 6) ! #define TARGET_TCFLSH TARGET_IO('T', 7) ! #define TARGET_TCGETS TARGET_IOR('T', 8, struct target_termios) ! #define TARGET_TCSETS TARGET_IOW('T', 9, struct target_termios) ! #define TARGET_TCSETSW TARGET_IOW('T', 10, struct target_termios) ! #define TARGET_TCSETSF TARGET_IOW('T', 11, struct target_termios) ! ! /* Note that all the ioctls that are not available in Linux have a ! * double underscore on the front to: a) avoid some programs to ! * thing we support some ioctls under Linux (autoconfiguration stuff) ! */ ! /* Little t */ ! #define TARGET_TIOCGETD TARGET_IOR('t', 0, int) ! #define TARGET_TIOCSETD TARGET_IOW('t', 1, int) ! //#define __TIOCHPCL _IO('t', 2) /* SunOS Specific */ ! //#define __TIOCMODG _IOR('t', 3, int) /* SunOS Specific */ ! //#define __TIOCMODS _IOW('t', 4, int) /* SunOS Specific */ ! //#define __TIOCGETP _IOR('t', 8, struct sgttyb) /* SunOS Specific */ ! //#define __TIOCSETP _IOW('t', 9, struct sgttyb) /* SunOS Specific */ ! //#define __TIOCSETN _IOW('t', 10, struct sgttyb) /* SunOS Specific */ ! #define TARGET_TIOCEXCL TARGET_IO('t', 13) ! #define TARGET_TIOCNXCL TARGET_IO('t', 14) ! //#define __TIOCFLUSH _IOW('t', 16, int) /* SunOS Specific */ ! //#define __TIOCSETC _IOW('t', 17, struct tchars) /* SunOS Specific */ ! //#define __TIOCGETC _IOR('t', 18, struct tchars) /* SunOS Specific */ ! //#define __TIOCTCNTL _IOW('t', 32, int) /* SunOS Specific */ ! //#define __TIOCSIGNAL _IOW('t', 33, int) /* SunOS Specific */ ! //#define __TIOCSETX _IOW('t', 34, int) /* SunOS Specific */ ! //#define __TIOCGETX _IOR('t', 35, int) /* SunOS Specific */ ! #define TARGET_TIOCCONS TARGET_IO('t', 36) ! //#define __TIOCSSIZE _IOW('t', 37, struct sunos_ttysize) /* SunOS Specific */ ! //#define __TIOCGSIZE _IOR('t', 38, struct sunos_ttysize) /* SunOS Specific */ ! #define TARGET_TIOCGSOFTCAR TARGET_IOR('t', 100, int) ! #define TARGET_TIOCSSOFTCAR TARGET_IOW('t', 101, int) ! //#define __TIOCUCNTL _IOW('t', 102, int) /* SunOS Specific */ ! #define TARGET_TIOCSWINSZ TARGET_IOW('t', 103, struct winsize) ! #define TARGET_TIOCGWINSZ TARGET_IOR('t', 104, struct winsize) ! //#define __TIOCREMOTE _IOW('t', 105, int) /* SunOS Specific */ ! #define TARGET_TIOCMGET TARGET_IOR('t', 106, int) ! #define TARGET_TIOCMBIC TARGET_IOW('t', 107, int) ! #define TARGET_TIOCMBIS TARGET_IOW('t', 108, int) ! #define TARGET_TIOCMSET TARGET_IOW('t', 109, int) ! #define TARGET_TIOCSTART TARGET_IO('t', 110) ! #define TARGET_TIOCSTOP TARGET_IO('t', 111) ! #define TARGET_TIOCPKT TARGET_IOW('t', 112, int) ! #define TARGET_TIOCNOTTY TARGET_IO('t', 113) ! #define TARGET_TIOCSTI TARGET_IOW('t', 114, char) ! #define TARGET_TIOCOUTQ TARGET_IOR('t', 115, int) ! //#define __TIOCGLTC _IOR('t', 116, struct ltchars) /* SunOS Specific */ ! //#define __TIOCSLTC _IOW('t', 117, struct ltchars) /* SunOS Specific */ ! /* 118 is the non-posix setpgrp tty ioctl */ ! /* 119 is the non-posix getpgrp tty ioctl */ ! //#define __TIOCCDTR TARGET_IO('t', 120) /* SunOS Specific */ ! //#define __TIOCSDTR TARGET_IO('t', 121) /* SunOS Specific */ ! #define TARGET_TIOCCBRK TARGET_IO('t', 122) ! #define TARGET_TIOCSBRK TARGET_IO('t', 123) ! //#define __TIOCLGET TARGET_IOW('t', 124, int) /* SunOS Specific */ ! //#define __TIOCLSET TARGET_IOW('t', 125, int) /* SunOS Specific */ ! //#define __TIOCLBIC TARGET_IOW('t', 126, int) /* SunOS Specific */ ! //#define __TIOCLBIS TARGET_IOW('t', 127, int) /* SunOS Specific */ ! //#define __TIOCISPACE TARGET_IOR('t', 128, int) /* SunOS Specific */ ! //#define __TIOCISIZE TARGET_IOR('t', 129, int) /* SunOS Specific */ ! #define TARGET_TIOCSPGRP TARGET_IOW('t', 130, int) ! #define TARGET_TIOCGPGRP TARGET_IOR('t', 131, int) ! #define TARGET_TIOCSCTTY TARGET_IO('t', 132) ! #define TARGET_TIOCGSID TARGET_IOR('t', 133, int) ! /* Get minor device of a pty master's FD -- Solaris equiv is ISPTM */ ! #define TARGET_TIOCGPTN TARGET_IOR('t', 134, unsigned int) /* Get Pty Number */ ! #define TARGET_TIOCSPTLCK TARGET_IOW('t', 135, int) /* Lock/unlock PTY */ ! ! /* Little f */ ! #define TARGET_FIOCLEX TARGET_IO('f', 1) ! #define TARGET_FIONCLEX TARGET_IO('f', 2) ! #define TARGET_FIOASYNC TARGET_IOW('f', 125, int) ! #define TARGET_FIONBIO TARGET_IOW('f', 126, int) ! #define TARGET_FIONREAD TARGET_IOR('f', 127, int) ! #define TARGET_TIOCINQ TARGET_FIONREAD ! /* SCARY Rutgers local SunOS kernel hackery, perhaps I will support it ! * someday. This is completely bogus, I know... ! */ ! //#define __TCGETSTAT TARGET_IO('T', 200) /* Rutgers specific */ ! //#define __TCSETSTAT TARGET_IO('T', 201) /* Rutgers specific */ ! /* Linux specific, no SunOS equivalent. */ ! #define TARGET_TIOCLINUX 0x541C ! #define TARGET_TIOCGSERIAL 0x541E ! #define TARGET_TIOCSSERIAL 0x541F ! #define TARGET_TCSBRKP 0x5425 ! #define TARGET_TIOCTTYGSTRUCT 0x5426 ! #define TARGET_TIOCSERCONFIG 0x5453 ! #define TARGET_TIOCSERGWILD 0x5454 ! #define TARGET_TIOCSERSWILD 0x5455 ! #define TARGET_TIOCGLCKTRMIOS 0x5456 ! #define TARGET_TIOCSLCKTRMIOS 0x5457 ! #define TARGET_TIOCSERGSTRUCT 0x5458 /* For debugging only */ #define TARGET_TIOCSERGETLSR 0x5459 /* Get line status register */ #define TARGET_TIOCSERGETMULTI 0x545A /* Get multiport config */ #define TARGET_TIOCSERSETMULTI 0x545B /* Set multiport config */ ! #define TARGET_TIOCMIWAIT 0x545C /* Wait input */ ! #define TARGET_TIOCGICOUNT 0x545D /* Read serial port inline interrupt counts */ --- 18,219 ---- #define TARGET_VKILL 3 #define TARGET_VEOF 4 ! #define TARGET_VTIME 5 ! #define TARGET_VMIN 6 #define TARGET_VSWTC 7 #define TARGET_VSTART 8 #define TARGET_VSTOP 9 #define TARGET_VSUSP 10 ! #define TARGET_VEOL 11 #define TARGET_VREPRINT 12 #define TARGET_VDISCARD 13 #define TARGET_VWERASE 14 #define TARGET_VLNEXT 15 ! #define TARGET_VEOL2 16 /* c_iflag bits */ ! #define TARGET_IGNBRK 0000001 ! #define TARGET_BRKINT 0000002 ! #define TARGET_IGNPAR 0000004 ! #define TARGET_PARMRK 0000010 ! #define TARGET_INPCK 0000020 ! #define TARGET_ISTRIP 0000040 ! #define TARGET_INLCR 0000100 ! #define TARGET_IGNCR 0000200 ! #define TARGET_ICRNL 0000400 ! #define TARGET_IUCLC 0001000 ! #define TARGET_IXON 0002000 ! #define TARGET_IXANY 0004000 ! #define TARGET_IXOFF 0010000 ! #define TARGET_IMAXBEL 0040000 ! #define TARGET_IUTF8 0100000 /* c_oflag bits */ ! #define TARGET_OPOST 0000001 ! #define TARGET_OLCUC 0000002 ! #define TARGET_ONLCR 0000004 ! #define TARGET_OCRNL 0000010 ! #define TARGET_ONOCR 0000020 ! #define TARGET_ONLRET 0000040 ! #define TARGET_OFILL 0000100 ! #define TARGET_OFDEL 0000200 ! #define TARGET_NLDLY 0000400 ! #define TARGET_NL0 0000000 ! #define TARGET_NL1 0000400 ! #define TARGET_CRDLY 0003000 ! #define TARGET_CR0 0000000 ! #define TARGET_CR1 0001000 ! #define TARGET_CR2 0002000 ! #define TARGET_CR3 0003000 ! #define TARGET_TABDLY 0014000 ! #define TARGET_TAB0 0000000 ! #define TARGET_TAB1 0000000 ! #define TARGET_TAB2 0004000 ! #define TARGET_TAB3 0014000 ! #define TARGET_XTABS 0014000 ! #define TARGET_BSDLY 0020000 ! #define TARGET_BS0 0000000 ! #define TARGET_BS1 0020000 ! #define TARGET_VTDLY 0040000 ! #define TARGET_VT0 0000000 ! #define TARGET_VT1 0040000 ! #define TARGET_FFDLY 0100000 ! #define TARGET_FF0 0000000 ! #define TARGET_FF1 0100000 /* c_cflag bit meaning */ ! #define TARGET_CBAUD 0010017 ! #define TARGET_B0 0000000 /* hang up */ ! #define TARGET_B50 0000001 ! #define TARGET_B75 0000002 ! #define TARGET_B110 0000003 ! #define TARGET_B134 0000004 ! #define TARGET_B150 0000005 ! #define TARGET_B200 0000006 ! #define TARGET_B300 0000007 ! #define TARGET_B600 0000010 ! #define TARGET_B1200 0000011 ! #define TARGET_B1800 0000012 ! #define TARGET_B2400 0000013 ! #define TARGET_B4800 0000014 ! #define TARGET_B9600 0000015 ! #define TARGET_B19200 0000016 ! #define TARGET_B38400 0000017 ! #define TARGET_EXTA TARGET_B19200 ! #define TARGET_EXTB TARGET_B38400 ! #define TARGET_CSIZE 0000060 ! #define TARGET_CS5 0000000 ! #define TARGET_CS6 0000020 ! #define TARGET_CS7 0000040 ! #define TARGET_CS8 0000060 ! #define TARGET_CSTOPB 0000100 ! #define TARGET_CREAD 0000200 ! #define TARGET_PARENB 0000400 ! #define TARGET_PARODD 0001000 ! #define TARGET_HUPCL 0002000 ! #define TARGET_CLOCAL 0004000 ! #define TARGET_CBAUDEX 0010000 ! #define TARGET_B57600 0010001 ! #define TARGET_B115200 0010002 ! #define TARGET_B230400 0010003 ! #define TARGET_B460800 0010004 ! #define TARGET_B500000 0010005 ! #define TARGET_B576000 0010006 ! #define TARGET_B921600 0010007 ! #define TARGET_B1000000 0010010 ! #define TARGET_B1152000 0010011 ! #define TARGET_B1500000 0010012 ! #define TARGET_B2000000 0010013 ! #define TARGET_B2500000 0010014 ! #define TARGET_B3000000 0010015 ! #define TARGET_B3500000 0010016 ! #define TARGET_B4000000 0010017 ! #define TARGET_CIBAUD 002003600000 /* input baud rate (not used) */ ! #define TARGET_CMSPAR 010000000000 /* mark or space (stick) parity */ ! #define TARGET_CRTSCTS 020000000000 /* flow control */ /* c_lflag bits */ ! #define TARGET_ISIG 0000001 ! #define TARGET_ICANON 0000002 ! #define TARGET_XCASE 0000004 ! #define TARGET_ECHO 0000010 ! #define TARGET_ECHOE 0000020 ! #define TARGET_ECHOK 0000040 ! #define TARGET_ECHONL 0000100 ! #define TARGET_NOFLSH 0000200 ! #define TARGET_TOSTOP 0000400 ! #define TARGET_ECHOCTL 0001000 ! #define TARGET_ECHOPRT 0002000 ! #define TARGET_ECHOKE 0004000 ! #define TARGET_FLUSHO 0010000 ! #define TARGET_PENDIN 0040000 ! #define TARGET_IEXTEN 0100000 /* ioctls */ ! /* 0x54 is just a magic number to make these relatively unique ('T') */ ! #define TARGET_TCGETS TARGET_IOR('T', 16, struct target_termios) /* TCGETATTR */ ! #define TARGET_TCSETS TARGET_IOW('T', 17, struct target_termios) /* TCSETATTR */ ! #define TARGET_TCSETSW TARGET_IOW('T', 18, struct target_termios) /* TCSETATTRD */ ! #define TARGET_TCSETSF TARGET_IOW('T', 19, struct target_termios) /* TCSETATTRF */ ! #define TARGET_TCGETA TARGET_IOR('T', 1, struct target_termio) ! #define TARGET_TCSETA TARGET_IOW('T', 2, struct target_termio) ! #define TARGET_TCSETAW TARGET_IOW('T', 3, struct target_termio) ! #define TARGET_TCSETAF TARGET_IOW('T', 4, struct target_termio) ! #define TARGET_TCSBRK TARGET_IO('T', 5) ! #define TARGET_TCXONC TARGET_IO('T', 6) ! #define TARGET_TCFLSH TARGET_IO('T', 7) ! #define TARGET_TIOCEXCL 0x540C ! #define TARGET_TIOCNXCL 0x540D ! #define TARGET_TIOCSCTTY 0x540E ! #define TARGET_TIOCGPGRP TARGET_IOR('T', 30, int) ! #define TARGET_TIOCSPGRP TARGET_IOW('T', 29, int) ! #define TARGET_TIOCOUTQ 0x5411 ! #define TARGET_TIOCSTI 0x5412 ! #define TARGET_TIOCGWINSZ 0x5413 ! #define TARGET_TIOCSWINSZ 0x5414 ! #define TARGET_TIOCMGET 0x5415 ! #define TARGET_TIOCMBIS 0x5416 ! #define TARGET_TIOCMBIC 0x5417 ! #define TARGET_TIOCMSET 0x5418 ! #define TARGET_TIOCGSOFTCAR 0x5419 ! #define TARGET_TIOCSSOFTCAR 0x541A ! #define TARGET_FIONREAD 0x541B ! #define TARGET_TIOCINQ TARGET_FIONREAD ! #define TARGET_TIOCLINUX 0x541C ! #define TARGET_TIOCCONS 0x541D ! #define TARGET_TIOCGSERIAL 0x541E ! #define TARGET_TIOCSSERIAL 0x541F ! #define TARGET_TIOCPKT 0x5420 ! #define TARGET_FIONBIO 0x5421 ! #define TARGET_TIOCNOTTY 0x5422 ! #define TARGET_TIOCSETD 0x5423 ! #define TARGET_TIOCGETD 0x5424 ! #define TARGET_TCSBRKP 0x5425 /* Needed for POSIX tcsendbreak() */ ! #define TARGET_TIOCSBRK 0x5427 /* BSD compatibility */ ! #define TARGET_TIOCCBRK 0x5428 /* BSD compatibility */ ! #define TARGET_TIOCGSID TARGET_IOR('T', 20, int) /* Return the session ID of FD */ ! #define TARGET_TIOCGPTN TARGET_IOR('T',0x30, unsigned int) /* Get Pty Number (of pty-mux device) */ ! #define TARGET_TIOCSPTLCK TARGET_IOW('T',0x31, int) /* Lock/unlock Pty */ ! #define TARGET_FIONCLEX 0x5450 /* these numbers need to be adjusted. */ ! #define TARGET_FIOCLEX 0x5451 ! #define TARGET_FIOASYNC 0x5452 ! #define TARGET_TIOCSERCONFIG 0x5453 ! #define TARGET_TIOCSERGWILD 0x5454 ! #define TARGET_TIOCSERSWILD 0x5455 ! #define TARGET_TIOCGLCKTRMIOS 0x5456 ! #define TARGET_TIOCSLCKTRMIOS 0x5457 ! #define TARGET_TIOCSERGSTRUCT 0x5458 /* For debugging only */ #define TARGET_TIOCSERGETLSR 0x5459 /* Get line status register */ #define TARGET_TIOCSERGETMULTI 0x545A /* Get multiport config */ #define TARGET_TIOCSERSETMULTI 0x545B /* Set multiport config */ ! #define TARGET_TIOCMIWAIT 0x545C /* wait for a change on serial input line(s) */ ! #define TARGET_TIOCGICOUNT 0x545D /* read serial port inline interrupt counts */ ! #define TARGET_TIOCGHAYESESP 0x545E /* Get Hayes ESP configuration */ ! #define TARGET_TIOCSHAYESESP 0x545F /* Set Hayes ESP configuration */ ! #define TARGET_FIOQSIZE 0x5460 /* Get exact space used by quota */ + #define TARGET_TIOCSTART 0x5461 + #define TARGET_TIOCSTOP 0x5462 + #define TARGET_TIOCSLTC 0x5462 |
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From: Stuart B. <zu...@us...> - 2007-03-05 02:27:49
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Update of /cvsroot/hppaqemu/hppaqemu/target-hppa In directory sc8-pr-cvs5.sourceforge.net:/tmp/cvs-serv17959/target-hppa Modified Files: translate.c Log Message: Fix TARGET_SA_RESETHAND macro, fix typo in disas_hppa_insn and replace termbits.h with a PA-RISC version. Index: translate.c =================================================================== RCS file: /cvsroot/hppaqemu/hppaqemu/target-hppa/translate.c,v retrieving revision 1.6 retrieving revision 1.7 diff -C2 -d -r1.6 -r1.7 *** translate.c 4 Mar 2007 23:19:41 -0000 1.6 --- translate.c 5 Mar 2007 02:27:42 -0000 1.7 *************** *** 624,628 **** gen_movl_reg_T0(b); gen_movl_imm_T1(im14); ! gen_add_T1_T0(); gen_movl_T0_reg(t); break; --- 624,628 ---- gen_movl_reg_T0(b); gen_movl_imm_T1(im14); ! gen_op_add_T1_T0(); gen_movl_T0_reg(t); break; *************** *** 646,650 **** /* gen_op_space_sel_T0_T1(); */ gen_movl_imm_T1(im14); ! gen_add_T1_T0(); switch(op) { case 0x10: /* LDB */ --- 646,650 ---- /* gen_op_space_sel_T0_T1(); */ gen_movl_imm_T1(im14); ! gen_op_add_T1_T0(); switch(op) { case 0x10: /* LDB */ |
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From: Stuart B. <zu...@us...> - 2007-03-05 02:27:49
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Update of /cvsroot/hppaqemu/hppaqemu/linux-user In directory sc8-pr-cvs5.sourceforge.net:/tmp/cvs-serv17959/linux-user Modified Files: syscall_defs.h Log Message: Fix TARGET_SA_RESETHAND macro, fix typo in disas_hppa_insn and replace termbits.h with a PA-RISC version. Index: syscall_defs.h =================================================================== RCS file: /cvsroot/hppaqemu/hppaqemu/linux-user/syscall_defs.h,v retrieving revision 1.2 retrieving revision 1.3 diff -C2 -d -r1.2 -r1.3 *** syscall_defs.h 4 Mar 2007 23:19:41 -0000 1.2 --- syscall_defs.h 5 Mar 2007 02:27:42 -0000 1.3 *************** *** 321,325 **** #define TARGET_SA_RESTART 0x00000040 #define TARGET_SA_NODEFER 0x00000020 ! #define TARGET_SA_RESETHAND 0x80000004 #define TARGET_SA_RESTORER 0x04000000 #else --- 321,325 ---- #define TARGET_SA_RESTART 0x00000040 #define TARGET_SA_NODEFER 0x00000020 ! #define TARGET_SA_RESETHAND 0x00000004 #define TARGET_SA_RESTORER 0x04000000 #else |
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From: Randolph C. <ta...@us...> - 2007-03-04 23:19:45
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Update of /cvsroot/hppaqemu/hppaqemu/target-hppa In directory sc8-pr-cvs5.sourceforge.net:/tmp/cvs-serv8519/target-hppa Modified Files: translate.c Added Files: helper.c Log Message: check in a few more things to get the hppa-linux-user target to compile Index: translate.c =================================================================== RCS file: /cvsroot/hppaqemu/hppaqemu/target-hppa/translate.c,v retrieving revision 1.5 retrieving revision 1.6 diff -C2 -d -r1.5 -r1.6 *** translate.c 4 Mar 2007 16:13:20 -0000 1.5 --- translate.c 4 Mar 2007 23:19:41 -0000 1.6 *************** *** 268,271 **** --- 268,288 ---- } + static inline int gen_intermediate_code_internal(CPUState *env, + TranslationBlock *tb, + int search_pc) + { + return -1; + } + + int gen_intermediate_code(CPUState *env, TranslationBlock *tb) + { + return gen_intermediate_code_internal(env, tb, 0); + } + + int gen_intermediate_code_pc(CPUState *env, TranslationBlock *tb) + { + return gen_intermediate_code_internal(env, tb, 1); + } + static void disas_hppa_insn(DisasContext * dc) { --- NEW FILE: helper.c --- #include <stdio.h> #include <stdlib.h> #include <string.h> #include "cpu.h" #include "exec-all.h" int cpu_hppa_handle_mmu_fault (CPUState *env, target_ulong address, int rw, int is_user, int is_softmmu) { return 1; } target_ulong cpu_get_phys_page_debug(CPUState *env, target_ulong addr) { return addr; } |
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From: Randolph C. <ta...@us...> - 2007-03-04 23:19:45
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Update of /cvsroot/hppaqemu/hppaqemu/linux-user/hppa In directory sc8-pr-cvs5.sourceforge.net:/tmp/cvs-serv8519/linux-user/hppa Added Files: syscall.h syscall_nr.h termbits.h Log Message: check in a few more things to get the hppa-linux-user target to compile --- NEW FILE: syscall.h --- struct target_pt_regs { target_ulong gr[32]; /* PSW is in gr[0] */ target_ulong sr[ 8]; target_ulong iasq[2]; target_ulong iaoq[2]; }; #define UNAME_MACHINE "parisc" --- NEW FILE: syscall_nr.h --- /* * Linux system call numbers. */ #define TARGET_NR_Linux 0 #define TARGET_NR_restart_syscall (TARGET_NR_Linux + 0) #define TARGET_NR_exit (TARGET_NR_Linux + 1) #define TARGET_NR_fork (TARGET_NR_Linux + 2) #define TARGET_NR_read (TARGET_NR_Linux + 3) #define TARGET_NR_write (TARGET_NR_Linux + 4) #define TARGET_NR_open (TARGET_NR_Linux + 5) #define TARGET_NR_close (TARGET_NR_Linux + 6) #define TARGET_NR_waitpid (TARGET_NR_Linux + 7) #define TARGET_NR_creat (TARGET_NR_Linux + 8) #define TARGET_NR_link (TARGET_NR_Linux + 9) #define TARGET_NR_unlink (TARGET_NR_Linux + 10) #define TARGET_NR_execve (TARGET_NR_Linux + 11) #define TARGET_NR_chdir (TARGET_NR_Linux + 12) #define TARGET_NR_time (TARGET_NR_Linux + 13) #define TARGET_NR_mknod (TARGET_NR_Linux + 14) #define TARGET_NR_chmod (TARGET_NR_Linux + 15) #define TARGET_NR_lchown (TARGET_NR_Linux + 16) #define TARGET_NR_socket (TARGET_NR_Linux + 17) #define TARGET_NR_stat (TARGET_NR_Linux + 18) #define TARGET_NR_lseek (TARGET_NR_Linux + 19) #define TARGET_NR_getpid (TARGET_NR_Linux + 20) #define TARGET_NR_mount (TARGET_NR_Linux + 21) #define TARGET_NR_bind (TARGET_NR_Linux + 22) #define TARGET_NR_setuid (TARGET_NR_Linux + 23) #define TARGET_NR_getuid (TARGET_NR_Linux + 24) #define TARGET_NR_stime (TARGET_NR_Linux + 25) #define TARGET_NR_ptrace (TARGET_NR_Linux + 26) #define TARGET_NR_alarm (TARGET_NR_Linux + 27) #define TARGET_NR_fstat (TARGET_NR_Linux + 28) #define TARGET_NR_pause (TARGET_NR_Linux + 29) #define TARGET_NR_utime (TARGET_NR_Linux + 30) #define TARGET_NR_connect (TARGET_NR_Linux + 31) #define TARGET_NR_listen (TARGET_NR_Linux + 32) #define TARGET_NR_access (TARGET_NR_Linux + 33) #define TARGET_NR_nice (TARGET_NR_Linux + 34) #define TARGET_NR_accept (TARGET_NR_Linux + 35) #define TARGET_NR_sync (TARGET_NR_Linux + 36) #define TARGET_NR_kill (TARGET_NR_Linux + 37) #define TARGET_NR_rename (TARGET_NR_Linux + 38) #define TARGET_NR_mkdir (TARGET_NR_Linux + 39) #define TARGET_NR_rmdir (TARGET_NR_Linux + 40) #define TARGET_NR_dup (TARGET_NR_Linux + 41) #define TARGET_NR_pipe (TARGET_NR_Linux + 42) #define TARGET_NR_times (TARGET_NR_Linux + 43) #define TARGET_NR_getsockname (TARGET_NR_Linux + 44) #define TARGET_NR_brk (TARGET_NR_Linux + 45) #define TARGET_NR_setgid (TARGET_NR_Linux + 46) #define TARGET_NR_getgid (TARGET_NR_Linux + 47) #define TARGET_NR_signal (TARGET_NR_Linux + 48) #define TARGET_NR_geteuid (TARGET_NR_Linux + 49) #define TARGET_NR_getegid (TARGET_NR_Linux + 50) #define TARGET_NR_acct (TARGET_NR_Linux + 51) #define TARGET_NR_umount2 (TARGET_NR_Linux + 52) #define TARGET_NR_getpeername (TARGET_NR_Linux + 53) #define TARGET_NR_ioctl (TARGET_NR_Linux + 54) #define TARGET_NR_fcntl (TARGET_NR_Linux + 55) #define TARGET_NR_socketpair (TARGET_NR_Linux + 56) #define TARGET_NR_setpgid (TARGET_NR_Linux + 57) #define TARGET_NR_send (TARGET_NR_Linux + 58) #define TARGET_NR_uname (TARGET_NR_Linux + 59) #define TARGET_NR_umask (TARGET_NR_Linux + 60) #define TARGET_NR_chroot (TARGET_NR_Linux + 61) #define TARGET_NR_ustat (TARGET_NR_Linux + 62) #define TARGET_NR_dup2 (TARGET_NR_Linux + 63) #define TARGET_NR_getppid (TARGET_NR_Linux + 64) #define TARGET_NR_getpgrp (TARGET_NR_Linux + 65) #define TARGET_NR_setsid (TARGET_NR_Linux + 66) #define TARGET_NR_pivot_root (TARGET_NR_Linux + 67) #define TARGET_NR_sgetmask (TARGET_NR_Linux + 68) #define TARGET_NR_ssetmask (TARGET_NR_Linux + 69) #define TARGET_NR_setreuid (TARGET_NR_Linux + 70) #define TARGET_NR_setregid (TARGET_NR_Linux + 71) #define TARGET_NR_mincore (TARGET_NR_Linux + 72) #define TARGET_NR_sigpending (TARGET_NR_Linux + 73) #define TARGET_NR_sethostname (TARGET_NR_Linux + 74) #define TARGET_NR_setrlimit (TARGET_NR_Linux + 75) #define TARGET_NR_getrlimit (TARGET_NR_Linux + 76) #define TARGET_NR_getrusage (TARGET_NR_Linux + 77) #define TARGET_NR_gettimeofday (TARGET_NR_Linux + 78) #define TARGET_NR_settimeofday (TARGET_NR_Linux + 79) #define TARGET_NR_getgroups (TARGET_NR_Linux + 80) #define TARGET_NR_setgroups (TARGET_NR_Linux + 81) #define TARGET_NR_sendto (TARGET_NR_Linux + 82) #define TARGET_NR_symlink (TARGET_NR_Linux + 83) #define TARGET_NR_lstat (TARGET_NR_Linux + 84) #define TARGET_NR_readlink (TARGET_NR_Linux + 85) #define TARGET_NR_uselib (TARGET_NR_Linux + 86) #define TARGET_NR_swapon (TARGET_NR_Linux + 87) #define TARGET_NR_reboot (TARGET_NR_Linux + 88) #define TARGET_NR_mmap2 (TARGET_NR_Linux + 89) #define TARGET_NR_mmap (TARGET_NR_Linux + 90) #define TARGET_NR_munmap (TARGET_NR_Linux + 91) #define TARGET_NR_truncate (TARGET_NR_Linux + 92) #define TARGET_NR_ftruncate (TARGET_NR_Linux + 93) #define TARGET_NR_fchmod (TARGET_NR_Linux + 94) #define TARGET_NR_fchown (TARGET_NR_Linux + 95) #define TARGET_NR_getpriority (TARGET_NR_Linux + 96) #define TARGET_NR_setpriority (TARGET_NR_Linux + 97) #define TARGET_NR_recv (TARGET_NR_Linux + 98) #define TARGET_NR_statfs (TARGET_NR_Linux + 99) #define TARGET_NR_fstatfs (TARGET_NR_Linux + 100) #define TARGET_NR_stat64 (TARGET_NR_Linux + 101) /* #define TARGET_NR_socketcall (TARGET_NR_Linux + 102) */ #define TARGET_NR_syslog (TARGET_NR_Linux + 103) #define TARGET_NR_setitimer (TARGET_NR_Linux + 104) #define TARGET_NR_getitimer (TARGET_NR_Linux + 105) #define TARGET_NR_capget (TARGET_NR_Linux + 106) #define TARGET_NR_capset (TARGET_NR_Linux + 107) #define TARGET_NR_pread64 (TARGET_NR_Linux + 108) #define TARGET_NR_pwrite64 (TARGET_NR_Linux + 109) #define TARGET_NR_getcwd (TARGET_NR_Linux + 110) #define TARGET_NR_vhangup (TARGET_NR_Linux + 111) #define TARGET_NR_fstat64 (TARGET_NR_Linux + 112) #define TARGET_NR_vfork (TARGET_NR_Linux + 113) #define TARGET_NR_wait4 (TARGET_NR_Linux + 114) #define TARGET_NR_swapoff (TARGET_NR_Linux + 115) #define TARGET_NR_sysinfo (TARGET_NR_Linux + 116) #define TARGET_NR_shutdown (TARGET_NR_Linux + 117) #define TARGET_NR_fsync (TARGET_NR_Linux + 118) #define TARGET_NR_madvise (TARGET_NR_Linux + 119) #define TARGET_NR_clone (TARGET_NR_Linux + 120) #define TARGET_NR_setdomainname (TARGET_NR_Linux + 121) #define TARGET_NR_sendfile (TARGET_NR_Linux + 122) #define TARGET_NR_recvfrom (TARGET_NR_Linux + 123) #define TARGET_NR_adjtimex (TARGET_NR_Linux + 124) #define TARGET_NR_mprotect (TARGET_NR_Linux + 125) #define TARGET_NR_sigprocmask (TARGET_NR_Linux + 126) #define TARGET_NR_create_module (TARGET_NR_Linux + 127) #define TARGET_NR_init_module (TARGET_NR_Linux + 128) #define TARGET_NR_delete_module (TARGET_NR_Linux + 129) #define TARGET_NR_get_kernel_syms (TARGET_NR_Linux + 130) #define TARGET_NR_quotactl (TARGET_NR_Linux + 131) #define TARGET_NR_getpgid (TARGET_NR_Linux + 132) #define TARGET_NR_fchdir (TARGET_NR_Linux + 133) #define TARGET_NR_bdflush (TARGET_NR_Linux + 134) #define TARGET_NR_sysfs (TARGET_NR_Linux + 135) #define TARGET_NR_personality (TARGET_NR_Linux + 136) #define TARGET_NR_afs_syscall (TARGET_NR_Linux + 137) /* Syscall for Andrew File System */ #define TARGET_NR_setfsuid (TARGET_NR_Linux + 138) #define TARGET_NR_setfsgid (TARGET_NR_Linux + 139) #define TARGET_NR__llseek (TARGET_NR_Linux + 140) #define TARGET_NR_getdents (TARGET_NR_Linux + 141) #define TARGET_NR__newselect (TARGET_NR_Linux + 142) #define TARGET_NR_flock (TARGET_NR_Linux + 143) #define TARGET_NR_msync (TARGET_NR_Linux + 144) #define TARGET_NR_readv (TARGET_NR_Linux + 145) #define TARGET_NR_writev (TARGET_NR_Linux + 146) #define TARGET_NR_getsid (TARGET_NR_Linux + 147) #define TARGET_NR_fdatasync (TARGET_NR_Linux + 148) #define TARGET_NR__sysctl (TARGET_NR_Linux + 149) #define TARGET_NR_mlock (TARGET_NR_Linux + 150) #define TARGET_NR_munlock (TARGET_NR_Linux + 151) #define TARGET_NR_mlockall (TARGET_NR_Linux + 152) #define TARGET_NR_munlockall (TARGET_NR_Linux + 153) #define TARGET_NR_sched_setparam (TARGET_NR_Linux + 154) #define TARGET_NR_sched_getparam (TARGET_NR_Linux + 155) #define TARGET_NR_sched_setscheduler (TARGET_NR_Linux + 156) #define TARGET_NR_sched_getscheduler (TARGET_NR_Linux + 157) #define TARGET_NR_sched_yield (TARGET_NR_Linux + 158) #define TARGET_NR_sched_get_priority_max (TARGET_NR_Linux + 159) #define TARGET_NR_sched_get_priority_min (TARGET_NR_Linux + 160) #define TARGET_NR_sched_rr_get_interval (TARGET_NR_Linux + 161) #define TARGET_NR_nanosleep (TARGET_NR_Linux + 162) #define TARGET_NR_mremap (TARGET_NR_Linux + 163) #define TARGET_NR_setresuid (TARGET_NR_Linux + 164) #define TARGET_NR_getresuid (TARGET_NR_Linux + 165) #define TARGET_NR_sigaltstack (TARGET_NR_Linux + 166) #define TARGET_NR_query_module (TARGET_NR_Linux + 167) #define TARGET_NR_poll (TARGET_NR_Linux + 168) #define TARGET_NR_nfsservctl (TARGET_NR_Linux + 169) #define TARGET_NR_setresgid (TARGET_NR_Linux + 170) #define TARGET_NR_getresgid (TARGET_NR_Linux + 171) #define TARGET_NR_prctl (TARGET_NR_Linux + 172) #define TARGET_NR_rt_sigreturn (TARGET_NR_Linux + 173) #define TARGET_NR_rt_sigaction (TARGET_NR_Linux + 174) #define TARGET_NR_rt_sigprocmask (TARGET_NR_Linux + 175) #define TARGET_NR_rt_sigpending (TARGET_NR_Linux + 176) #define TARGET_NR_rt_sigtimedwait (TARGET_NR_Linux + 177) #define TARGET_NR_rt_sigqueueinfo (TARGET_NR_Linux + 178) #define TARGET_NR_rt_sigsuspend (TARGET_NR_Linux + 179) #define TARGET_NR_chown (TARGET_NR_Linux + 180) #define TARGET_NR_setsockopt (TARGET_NR_Linux + 181) #define TARGET_NR_getsockopt (TARGET_NR_Linux + 182) #define TARGET_NR_sendmsg (TARGET_NR_Linux + 183) #define TARGET_NR_recvmsg (TARGET_NR_Linux + 184) #define TARGET_NR_semop (TARGET_NR_Linux + 185) #define TARGET_NR_semget (TARGET_NR_Linux + 186) #define TARGET_NR_semctl (TARGET_NR_Linux + 187) #define TARGET_NR_msgsnd (TARGET_NR_Linux + 188) #define TARGET_NR_msgrcv (TARGET_NR_Linux + 189) #define TARGET_NR_msgget (TARGET_NR_Linux + 190) #define TARGET_NR_msgctl (TARGET_NR_Linux + 191) #define TARGET_NR_shmat (TARGET_NR_Linux + 192) #define TARGET_NR_shmdt (TARGET_NR_Linux + 193) #define TARGET_NR_shmget (TARGET_NR_Linux + 194) #define TARGET_NR_shmctl (TARGET_NR_Linux + 195) #define TARGET_NR_getpmsg (TARGET_NR_Linux + 196) /* Somebody *wants* streams? */ #define TARGET_NR_putpmsg (TARGET_NR_Linux + 197) #define TARGET_NR_lstat64 (TARGET_NR_Linux + 198) #define TARGET_NR_truncate64 (TARGET_NR_Linux + 199) #define TARGET_NR_ftruncate64 (TARGET_NR_Linux + 200) #define TARGET_NR_getdents64 (TARGET_NR_Linux + 201) #define TARGET_NR_fcntl64 (TARGET_NR_Linux + 202) #define TARGET_NR_attrctl (TARGET_NR_Linux + 203) #define TARGET_NR_acl_get (TARGET_NR_Linux + 204) #define TARGET_NR_acl_set (TARGET_NR_Linux + 205) #define TARGET_NR_gettid (TARGET_NR_Linux + 206) #define TARGET_NR_readahead (TARGET_NR_Linux + 207) #define TARGET_NR_tkill (TARGET_NR_Linux + 208) #define TARGET_NR_sendfile64 (TARGET_NR_Linux + 209) #define TARGET_NR_futex (TARGET_NR_Linux + 210) #define TARGET_NR_sched_setaffinity (TARGET_NR_Linux + 211) #define TARGET_NR_sched_getaffinity (TARGET_NR_Linux + 212) #define TARGET_NR_set_thread_area (TARGET_NR_Linux + 213) #define TARGET_NR_get_thread_area (TARGET_NR_Linux + 214) #define TARGET_NR_io_setup (TARGET_NR_Linux + 215) #define TARGET_NR_io_destroy (TARGET_NR_Linux + 216) #define TARGET_NR_io_getevents (TARGET_NR_Linux + 217) #define TARGET_NR_io_submit (TARGET_NR_Linux + 218) #define TARGET_NR_io_cancel (TARGET_NR_Linux + 219) #define TARGET_NR_alloc_hugepages (TARGET_NR_Linux + 220) #define TARGET_NR_free_hugepages (TARGET_NR_Linux + 221) #define TARGET_NR_exit_group (TARGET_NR_Linux + 222) #define TARGET_NR_lookup_dcookie (TARGET_NR_Linux + 223) #define TARGET_NR_epoll_create (TARGET_NR_Linux + 224) #define TARGET_NR_epoll_ctl (TARGET_NR_Linux + 225) #define TARGET_NR_epoll_wait (TARGET_NR_Linux + 226) #define TARGET_NR_remap_file_pages (TARGET_NR_Linux + 227) #define TARGET_NR_semtimedop (TARGET_NR_Linux + 228) #define TARGET_NR_mq_open (TARGET_NR_Linux + 229) #define TARGET_NR_mq_unlink (TARGET_NR_Linux + 230) #define TARGET_NR_mq_timedsend (TARGET_NR_Linux + 231) #define TARGET_NR_mq_timedreceive (TARGET_NR_Linux + 232) #define TARGET_NR_mq_notify (TARGET_NR_Linux + 233) #define TARGET_NR_mq_getsetattr (TARGET_NR_Linux + 234) #define TARGET_NR_waitid (TARGET_NR_Linux + 235) #define TARGET_NR_fadvise64_64 (TARGET_NR_Linux + 236) #define TARGET_NR_set_tid_address (TARGET_NR_Linux + 237) #define TARGET_NR_setxattr (TARGET_NR_Linux + 238) #define TARGET_NR_lsetxattr (TARGET_NR_Linux + 239) #define TARGET_NR_fsetxattr (TARGET_NR_Linux + 240) #define TARGET_NR_getxattr (TARGET_NR_Linux + 241) #define TARGET_NR_lgetxattr (TARGET_NR_Linux + 242) #define TARGET_NR_fgetxattr (TARGET_NR_Linux + 243) #define TARGET_NR_listxattr (TARGET_NR_Linux + 244) #define TARGET_NR_llistxattr (TARGET_NR_Linux + 245) #define TARGET_NR_flistxattr (TARGET_NR_Linux + 246) #define TARGET_NR_removexattr (TARGET_NR_Linux + 247) #define TARGET_NR_lremovexattr (TARGET_NR_Linux + 248) #define TARGET_NR_fremovexattr (TARGET_NR_Linux + 249) #define TARGET_NR_timer_create (TARGET_NR_Linux + 250) #define TARGET_NR_timer_settime (TARGET_NR_Linux + 251) #define TARGET_NR_timer_gettime (TARGET_NR_Linux + 252) #define TARGET_NR_timer_getoverrun (TARGET_NR_Linux + 253) #define TARGET_NR_timer_delete (TARGET_NR_Linux + 254) #define TARGET_NR_clock_settime (TARGET_NR_Linux + 255) #define TARGET_NR_clock_gettime (TARGET_NR_Linux + 256) #define TARGET_NR_clock_getres (TARGET_NR_Linux + 257) #define TARGET_NR_clock_nanosleep (TARGET_NR_Linux + 258) #define TARGET_NR_tgkill (TARGET_NR_Linux + 259) #define TARGET_NR_mbind (TARGET_NR_Linux + 260) #define TARGET_NR_get_mempolicy (TARGET_NR_Linux + 261) #define TARGET_NR_set_mempolicy (TARGET_NR_Linux + 262) #define TARGET_NR_vserver (TARGET_NR_Linux + 263) #define TARGET_NR_add_key (TARGET_NR_Linux + 264) #define TARGET_NR_request_key (TARGET_NR_Linux + 265) #define TARGET_NR_keyctl (TARGET_NR_Linux + 266) #define TARGET_NR_ioprio_set (TARGET_NR_Linux + 267) #define TARGET_NR_ioprio_get (TARGET_NR_Linux + 268) #define TARGET_NR_inotify_init (TARGET_NR_Linux + 269) #define TARGET_NR_inotify_add_watch (TARGET_NR_Linux + 270) #define TARGET_NR_inotify_rm_watch (TARGET_NR_Linux + 271) #define TARGET_NR_migrate_pages (TARGET_NR_Linux + 272) #define TARGET_NR_pselect6 (TARGET_NR_Linux + 273) #define TARGET_NR_ppoll (TARGET_NR_Linux + 274) #define TARGET_NR_openat (TARGET_NR_Linux + 275) #define TARGET_NR_mkdirat (TARGET_NR_Linux + 276) #define TARGET_NR_mknodat (TARGET_NR_Linux + 277) #define TARGET_NR_fchownat (TARGET_NR_Linux + 278) #define TARGET_NR_futimesat (TARGET_NR_Linux + 279) #define TARGET_NR_newfstatat (TARGET_NR_Linux + 280) #define TARGET_NR_unlinkat (TARGET_NR_Linux + 281) #define TARGET_NR_renameat (TARGET_NR_Linux + 282) #define TARGET_NR_linkat (TARGET_NR_Linux + 283) #define TARGET_NR_symlinkat (TARGET_NR_Linux + 284) #define TARGET_NR_readlinkat (TARGET_NR_Linux + 285) #define TARGET_NR_fchmodat (TARGET_NR_Linux + 286) #define TARGET_NR_faccessat (TARGET_NR_Linux + 287) #define TARGET_NR_unshare (TARGET_NR_Linux + 288) #define TARGET_NR_set_robust_list (TARGET_NR_Linux + 289) #define TARGET_NR_get_robust_list (TARGET_NR_Linux + 290) #define TARGET_NR_splice (TARGET_NR_Linux + 291) #define TARGET_NR_sync_file_range (TARGET_NR_Linux + 292) #define TARGET_NR_tee (TARGET_NR_Linux + 293) --- NEW FILE: termbits.h --- /* from asm/termbits.h */ #define TARGET_NCCS 19 struct target_termios { unsigned int c_iflag; /* input mode flags */ unsigned int c_oflag; /* output mode flags */ unsigned int c_cflag; /* control mode flags */ unsigned int c_lflag; /* local mode flags */ unsigned char c_line; /* line discipline */ unsigned char c_cc[TARGET_NCCS]; /* control characters */ }; /* c_cc characters */ #define TARGET_VINTR 0 #define TARGET_VQUIT 1 #define TARGET_VERASE 2 #define TARGET_VKILL 3 #define TARGET_VEOF 4 #define TARGET_VEOL 5 #define TARGET_VEOL2 6 #define TARGET_VSWTC 7 #define TARGET_VSTART 8 #define TARGET_VSTOP 9 #define TARGET_VSUSP 10 #define TARGET_VDSUSP 11 /* SunOS POSIX nicety I do believe... */ #define TARGET_VREPRINT 12 #define TARGET_VDISCARD 13 #define TARGET_VWERASE 14 #define TARGET_VLNEXT 15 /* Kernel keeps vmin/vtime separated, user apps assume vmin/vtime is * shared with eof/eol */ #define TARGET_VMIN TARGET_VEOF #define TARGET_VTIME TARGET_VEOL /* c_iflag bits */ #define TARGET_IGNBRK 0x00000001 #define TARGET_BRKINT 0x00000002 #define TARGET_IGNPAR 0x00000004 #define TARGET_PARMRK 0x00000008 #define TARGET_INPCK 0x00000010 #define TARGET_ISTRIP 0x00000020 #define TARGET_INLCR 0x00000040 #define TARGET_IGNCR 0x00000080 #define TARGET_ICRNL 0x00000100 #define TARGET_IUCLC 0x00000200 #define TARGET_IXON 0x00000400 #define TARGET_IXANY 0x00000800 #define TARGET_IXOFF 0x00001000 #define TARGET_IMAXBEL 0x00002000 /* c_oflag bits */ #define TARGET_OPOST 0x00000001 #define TARGET_OLCUC 0x00000002 #define TARGET_ONLCR 0x00000004 #define TARGET_OCRNL 0x00000008 #define TARGET_ONOCR 0x00000010 #define TARGET_ONLRET 0x00000020 #define TARGET_OFILL 0x00000040 #define TARGET_OFDEL 0x00000080 #define TARGET_NLDLY 0x00000100 #define TARGET_NL0 0x00000000 #define TARGET_NL1 0x00000100 #define TARGET_CRDLY 0x00000600 #define TARGET_CR0 0x00000000 #define TARGET_CR1 0x00000200 #define TARGET_CR2 0x00000400 #define TARGET_CR3 0x00000600 #define TARGET_TABDLY 0x00001800 #define TARGET_TAB0 0x00000000 #define TARGET_TAB1 0x00000800 #define TARGET_TAB2 0x00001000 #define TARGET_TAB3 0x00001800 #define TARGET_XTABS 0x00001800 #define TARGET_BSDLY 0x00002000 #define TARGET_BS0 0x00000000 #define TARGET_BS1 0x00002000 #define TARGET_VTDLY 0x00004000 #define TARGET_VT0 0x00000000 #define TARGET_VT1 0x00004000 #define TARGET_FFDLY 0x00008000 #define TARGET_FF0 0x00000000 #define TARGET_FF1 0x00008000 #define TARGET_PAGEOUT 0x00010000 /* SUNOS specific */ #define TARGET_WRAP 0x00020000 /* SUNOS specific */ /* c_cflag bit meaning */ #define TARGET_CBAUD 0x0000100f #define TARGET_B0 0x00000000 /* hang up */ #define TARGET_B50 0x00000001 #define TARGET_B75 0x00000002 #define TARGET_B110 0x00000003 #define TARGET_B134 0x00000004 #define TARGET_B150 0x00000005 #define TARGET_B200 0x00000006 #define TARGET_B300 0x00000007 #define TARGET_B600 0x00000008 #define TARGET_B1200 0x00000009 #define TARGET_B1800 0x0000000a #define TARGET_B2400 0x0000000b #define TARGET_B4800 0x0000000c #define TARGET_B9600 0x0000000d #define TARGET_B19200 0x0000000e #define TARGET_B38400 0x0000000f #define TARGET_EXTA B19200 #define TARGET_EXTB B38400 #define TARGET_CSIZE 0x00000030 #define TARGET_CS5 0x00000000 #define TARGET_CS6 0x00000010 #define TARGET_CS7 0x00000020 #define TARGET_CS8 0x00000030 #define TARGET_CSTOPB 0x00000040 #define TARGET_CREAD 0x00000080 #define TARGET_PARENB 0x00000100 #define TARGET_PARODD 0x00000200 #define TARGET_HUPCL 0x00000400 #define TARGET_CLOCAL 0x00000800 #define TARGET_CBAUDEX 0x00001000 /* We'll never see these speeds with the Zilogs, but for completeness... */ #define TARGET_B57600 0x00001001 #define TARGET_B115200 0x00001002 #define TARGET_B230400 0x00001003 #define TARGET_B460800 0x00001004 /* This is what we can do with the Zilogs. */ #define TARGET_B76800 0x00001005 /* This is what we can do with the SAB82532. */ #define TARGET_B153600 0x00001006 #define TARGET_B307200 0x00001007 #define TARGET_B614400 0x00001008 #define TARGET_B921600 0x00001009 /* And these are the rest... */ #define TARGET_B500000 0x0000100a #define TARGET_B576000 0x0000100b #define TARGET_B1000000 0x0000100c #define TARGET_B1152000 0x0000100d #define TARGET_B1500000 0x0000100e #define TARGET_B2000000 0x0000100f /* These have totally bogus values and nobody uses them so far. Later on we'd have to use say 0x10000x and adjust CBAUD constant and drivers accordingly. #define B2500000 0x00001010 #define B3000000 0x00001011 #define B3500000 0x00001012 #define B4000000 0x00001013 */ #define TARGET_CIBAUD 0x100f0000 /* input baud rate (not used) */ #define TARGET_CMSPAR 0x40000000 /* mark or space (stick) parity */ #define TARGET_CRTSCTS 0x80000000 /* flow control */ /* c_lflag bits */ #define TARGET_ISIG 0x00000001 #define TARGET_ICANON 0x00000002 #define TARGET_XCASE 0x00000004 #define TARGET_ECHO 0x00000008 #define TARGET_ECHOE 0x00000010 #define TARGET_ECHOK 0x00000020 #define TARGET_ECHONL 0x00000040 #define TARGET_NOFLSH 0x00000080 #define TARGET_TOSTOP 0x00000100 #define TARGET_ECHOCTL 0x00000200 #define TARGET_ECHOPRT 0x00000400 #define TARGET_ECHOKE 0x00000800 #define TARGET_DEFECHO 0x00001000 /* SUNOS thing, what is it? */ #define TARGET_FLUSHO 0x00002000 #define TARGET_PENDIN 0x00004000 #define TARGET_IEXTEN 0x00008000 /* ioctls */ /* Big T */ #define TARGET_TCGETA TARGET_IOR('T', 1, struct target_termio) #define TARGET_TCSETA TARGET_IOW('T', 2, struct target_termio) #define TARGET_TCSETAW TARGET_IOW('T', 3, struct target_termio) #define TARGET_TCSETAF TARGET_IOW('T', 4, struct target_termio) #define TARGET_TCSBRK TARGET_IO('T', 5) #define TARGET_TCXONC TARGET_IO('T', 6) #define TARGET_TCFLSH TARGET_IO('T', 7) #define TARGET_TCGETS TARGET_IOR('T', 8, struct target_termios) #define TARGET_TCSETS TARGET_IOW('T', 9, struct target_termios) #define TARGET_TCSETSW TARGET_IOW('T', 10, struct target_termios) #define TARGET_TCSETSF TARGET_IOW('T', 11, struct target_termios) /* Note that all the ioctls that are not available in Linux have a * double underscore on the front to: a) avoid some programs to * thing we support some ioctls under Linux (autoconfiguration stuff) */ /* Little t */ #define TARGET_TIOCGETD TARGET_IOR('t', 0, int) #define TARGET_TIOCSETD TARGET_IOW('t', 1, int) //#define __TIOCHPCL _IO('t', 2) /* SunOS Specific */ //#define __TIOCMODG _IOR('t', 3, int) /* SunOS Specific */ //#define __TIOCMODS _IOW('t', 4, int) /* SunOS Specific */ //#define __TIOCGETP _IOR('t', 8, struct sgttyb) /* SunOS Specific */ //#define __TIOCSETP _IOW('t', 9, struct sgttyb) /* SunOS Specific */ //#define __TIOCSETN _IOW('t', 10, struct sgttyb) /* SunOS Specific */ #define TARGET_TIOCEXCL TARGET_IO('t', 13) #define TARGET_TIOCNXCL TARGET_IO('t', 14) //#define __TIOCFLUSH _IOW('t', 16, int) /* SunOS Specific */ //#define __TIOCSETC _IOW('t', 17, struct tchars) /* SunOS Specific */ //#define __TIOCGETC _IOR('t', 18, struct tchars) /* SunOS Specific */ //#define __TIOCTCNTL _IOW('t', 32, int) /* SunOS Specific */ //#define __TIOCSIGNAL _IOW('t', 33, int) /* SunOS Specific */ //#define __TIOCSETX _IOW('t', 34, int) /* SunOS Specific */ //#define __TIOCGETX _IOR('t', 35, int) /* SunOS Specific */ #define TARGET_TIOCCONS TARGET_IO('t', 36) //#define __TIOCSSIZE _IOW('t', 37, struct sunos_ttysize) /* SunOS Specific */ //#define __TIOCGSIZE _IOR('t', 38, struct sunos_ttysize) /* SunOS Specific */ #define TARGET_TIOCGSOFTCAR TARGET_IOR('t', 100, int) #define TARGET_TIOCSSOFTCAR TARGET_IOW('t', 101, int) //#define __TIOCUCNTL _IOW('t', 102, int) /* SunOS Specific */ #define TARGET_TIOCSWINSZ TARGET_IOW('t', 103, struct winsize) #define TARGET_TIOCGWINSZ TARGET_IOR('t', 104, struct winsize) //#define __TIOCREMOTE _IOW('t', 105, int) /* SunOS Specific */ #define TARGET_TIOCMGET TARGET_IOR('t', 106, int) #define TARGET_TIOCMBIC TARGET_IOW('t', 107, int) #define TARGET_TIOCMBIS TARGET_IOW('t', 108, int) #define TARGET_TIOCMSET TARGET_IOW('t', 109, int) #define TARGET_TIOCSTART TARGET_IO('t', 110) #define TARGET_TIOCSTOP TARGET_IO('t', 111) #define TARGET_TIOCPKT TARGET_IOW('t', 112, int) #define TARGET_TIOCNOTTY TARGET_IO('t', 113) #define TARGET_TIOCSTI TARGET_IOW('t', 114, char) #define TARGET_TIOCOUTQ TARGET_IOR('t', 115, int) //#define __TIOCGLTC _IOR('t', 116, struct ltchars) /* SunOS Specific */ //#define __TIOCSLTC _IOW('t', 117, struct ltchars) /* SunOS Specific */ /* 118 is the non-posix setpgrp tty ioctl */ /* 119 is the non-posix getpgrp tty ioctl */ //#define __TIOCCDTR TARGET_IO('t', 120) /* SunOS Specific */ //#define __TIOCSDTR TARGET_IO('t', 121) /* SunOS Specific */ #define TARGET_TIOCCBRK TARGET_IO('t', 122) #define TARGET_TIOCSBRK TARGET_IO('t', 123) //#define __TIOCLGET TARGET_IOW('t', 124, int) /* SunOS Specific */ //#define __TIOCLSET TARGET_IOW('t', 125, int) /* SunOS Specific */ //#define __TIOCLBIC TARGET_IOW('t', 126, int) /* SunOS Specific */ //#define __TIOCLBIS TARGET_IOW('t', 127, int) /* SunOS Specific */ //#define __TIOCISPACE TARGET_IOR('t', 128, int) /* SunOS Specific */ //#define __TIOCISIZE TARGET_IOR('t', 129, int) /* SunOS Specific */ #define TARGET_TIOCSPGRP TARGET_IOW('t', 130, int) #define TARGET_TIOCGPGRP TARGET_IOR('t', 131, int) #define TARGET_TIOCSCTTY TARGET_IO('t', 132) #define TARGET_TIOCGSID TARGET_IOR('t', 133, int) /* Get minor device of a pty master's FD -- Solaris equiv is ISPTM */ #define TARGET_TIOCGPTN TARGET_IOR('t', 134, unsigned int) /* Get Pty Number */ #define TARGET_TIOCSPTLCK TARGET_IOW('t', 135, int) /* Lock/unlock PTY */ /* Little f */ #define TARGET_FIOCLEX TARGET_IO('f', 1) #define TARGET_FIONCLEX TARGET_IO('f', 2) #define TARGET_FIOASYNC TARGET_IOW('f', 125, int) #define TARGET_FIONBIO TARGET_IOW('f', 126, int) #define TARGET_FIONREAD TARGET_IOR('f', 127, int) #define TARGET_TIOCINQ TARGET_FIONREAD /* SCARY Rutgers local SunOS kernel hackery, perhaps I will support it * someday. This is completely bogus, I know... */ //#define __TCGETSTAT TARGET_IO('T', 200) /* Rutgers specific */ //#define __TCSETSTAT TARGET_IO('T', 201) /* Rutgers specific */ /* Linux specific, no SunOS equivalent. */ #define TARGET_TIOCLINUX 0x541C #define TARGET_TIOCGSERIAL 0x541E #define TARGET_TIOCSSERIAL 0x541F #define TARGET_TCSBRKP 0x5425 #define TARGET_TIOCTTYGSTRUCT 0x5426 #define TARGET_TIOCSERCONFIG 0x5453 #define TARGET_TIOCSERGWILD 0x5454 #define TARGET_TIOCSERSWILD 0x5455 #define TARGET_TIOCGLCKTRMIOS 0x5456 #define TARGET_TIOCSLCKTRMIOS 0x5457 #define TARGET_TIOCSERGSTRUCT 0x5458 /* For debugging only */ #define TARGET_TIOCSERGETLSR 0x5459 /* Get line status register */ #define TARGET_TIOCSERGETMULTI 0x545A /* Get multiport config */ #define TARGET_TIOCSERSETMULTI 0x545B /* Set multiport config */ #define TARGET_TIOCMIWAIT 0x545C /* Wait input */ #define TARGET_TIOCGICOUNT 0x545D /* Read serial port inline interrupt counts */ |
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From: Randolph C. <ta...@us...> - 2007-03-04 23:19:45
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Update of /cvsroot/hppaqemu/hppaqemu/linux-user In directory sc8-pr-cvs5.sourceforge.net:/tmp/cvs-serv8519/linux-user Modified Files: elfload.c main.c syscall.c syscall_defs.h Log Message: check in a few more things to get the hppa-linux-user target to compile Index: syscall_defs.h =================================================================== RCS file: /cvsroot/hppaqemu/hppaqemu/linux-user/syscall_defs.h,v retrieving revision 1.1.1.1 retrieving revision 1.2 diff -C2 -d -r1.1.1.1 -r1.2 *** syscall_defs.h 23 Feb 2007 21:44:25 -0000 1.1.1.1 --- syscall_defs.h 4 Mar 2007 23:19:41 -0000 1.2 *************** *** 50,54 **** #if defined(TARGET_I386) || defined(TARGET_ARM) || defined(TARGET_SH4) \ ! || defined(TARGET_M68K) #define TARGET_IOC_SIZEBITS 14 --- 50,54 ---- #if defined(TARGET_I386) || defined(TARGET_ARM) || defined(TARGET_SH4) \ ! || defined(TARGET_M68K) || defined(TARGET_HPPA) #define TARGET_IOC_SIZEBITS 14 *************** *** 295,299 **** struct target_sigaction *oact); ! #if defined(TARGET_I386) || defined(TARGET_ARM) || defined(TARGET_SPARC) || defined(TARGET_PPC) || defined(TARGET_MIPS) || defined (TARGET_SH4) || defined(TARGET_M68K) #if defined(TARGET_SPARC) --- 295,299 ---- struct target_sigaction *oact); ! #if defined(TARGET_I386) || defined(TARGET_ARM) || defined(TARGET_SPARC) || defined(TARGET_PPC) || defined(TARGET_MIPS) || defined (TARGET_SH4) || defined(TARGET_M68K) || defined(TARGET_HPPA) #if defined(TARGET_SPARC) *************** *** 314,317 **** --- 314,326 ---- #define TARGET_SA_RESETHAND 0x80000000 #define TARGET_SA_RESTORER 0x04000000 /* Only for o32 */ + #elif defined(TARGET_HPPA) + #define TARGET_SA_NOCLDSTOP 0x00000008 + #define TARGET_SA_NOCLDWAIT 0x00000080 + #define TARGET_SA_SIGINFO 0x00000010 + #define TARGET_SA_ONSTACK 0x00000001 + #define TARGET_SA_RESTART 0x00000040 + #define TARGET_SA_NODEFER 0x00000020 + #define TARGET_SA_RESETHAND 0x80000004 + #define TARGET_SA_RESTORER 0x04000000 #else #define TARGET_SA_NOCLDSTOP 0x00000001 *************** *** 1204,1207 **** --- 1213,1271 ---- int64_t st_blocks; }; + #elif defined(TARGET_HPPA) + struct target_stat { + unsigned int st_dev; /* dev_t is 32 bits on parisc */ + target_ulong st_ino; /* 32 bits */ + unsigned short st_mode; /* 16 bits */ + unsigned short st_nlink; /* 16 bits */ + unsigned short st_reserved1; /* old st_uid */ + unsigned short st_reserved2; /* old st_gid */ + unsigned int st_rdev; + target_ulong st_size; + target_ulong target_st_atime; + unsigned int target_st_atime_nsec; + target_ulong target_st_mtime; + unsigned int target_st_mtime_nsec; + target_ulong target_st_ctime; + unsigned int target_st_ctime_nsec; + int st_blksize; + int st_blocks; + unsigned int __unused1; /* ACL stuff */ + unsigned int __unused2; /* network */ + target_ulong __unused3; /* network */ + unsigned int __unused4; /* cnodes */ + unsigned short __unused5; /* netsite */ + short st_fstype; + unsigned int st_realdev; + unsigned short st_basemode; + unsigned short st_spareshort; + target_ulong st_uid; + target_ulong st_gid; + unsigned int st_spare4[3]; + }; + + struct target_stat64 { + unsigned long long st_dev; + unsigned int __pad1; + + unsigned int __st_ino; /* Not actually filled in */ + unsigned int st_mode; + unsigned int st_nlink; + unsigned int st_uid; + unsigned int st_gid; + unsigned long long st_rdev; + unsigned int __pad2; + signed long long st_size; + signed int st_blksize; + + signed long long st_blocks; + signed int target_st_atime; + unsigned int target_st_atime_nsec; + signed int target_st_mtime; + unsigned int target_st_mtime_nsec; + signed int target_st_ctime; + unsigned int target_st_ctime_nsec; + unsigned long long st_ino; + }; #else #error unsupported CPU Index: syscall.c =================================================================== RCS file: /cvsroot/hppaqemu/hppaqemu/linux-user/syscall.c,v retrieving revision 1.1.1.1 retrieving revision 1.2 diff -C2 -d -r1.1.1.1 -r1.2 *** syscall.c 23 Feb 2007 21:44:25 -0000 1.1.1.1 --- syscall.c 4 Mar 2007 23:19:41 -0000 1.2 *************** *** 44,47 **** --- 44,48 ---- #include <sys/shm.h> #include <sys/sem.h> + #include <sys/msg.h> #include <sys/statfs.h> #include <utime.h> *************** *** 1759,1762 **** --- 1760,1768 ---- new_env->gregs[15] = newsp; /* XXXXX */ + #elif defined(TARGET_HPPA) + if (!newsp) + newsp = env->gr[30]; + new_env->gr[30] = newsp; + /* XXXXX */ #else #error unsupported target CPU *************** *** 2163,2166 **** --- 2169,2173 ---- /* need to look at the data field */ goto unimplemented; + #ifdef TARGET_NR_umount case TARGET_NR_umount: p = lock_user_string(arg1); *************** *** 2168,2171 **** --- 2175,2179 ---- unlock_user(p, arg1, 0); break; + #endif case TARGET_NR_stime: { *************** *** 2205,2208 **** --- 2213,2217 ---- } break; + #ifdef TARGET_NR_utimes case TARGET_NR_utimes: { *************** *** 2221,2224 **** --- 2230,2234 ---- } break; + #endif #ifdef TARGET_NR_stty case TARGET_NR_stty: *************** *** 2361,2364 **** --- 2371,2375 ---- ret = get_errno(setsid()); break; + #ifdef TARGET_NR_sigaction case TARGET_NR_sigaction: { *************** *** 2415,2418 **** --- 2426,2430 ---- } break; + #endif case TARGET_NR_rt_sigaction: { *************** *** 2550,2553 **** --- 2562,2566 ---- } break; + #ifdef TARGET_NR_sigsuspend case TARGET_NR_sigsuspend: { *************** *** 2559,2562 **** --- 2572,2576 ---- } break; + #endif case TARGET_NR_rt_sigsuspend: { *************** *** 2600,2607 **** --- 2614,2623 ---- } break; + #ifdef TARGET_NR_sigreturn case TARGET_NR_sigreturn: /* NOTE: ret is eax, so not transcoding must be done */ ret = do_sigreturn(cpu_env); break; + #endif case TARGET_NR_rt_sigreturn: /* NOTE: ret is eax, so not transcoding must be done */ *************** *** 2718,2723 **** --- 2734,2741 ---- case TARGET_NR_reboot: goto unimplemented; + #ifdef TARGET_NR_readdir case TARGET_NR_readdir: goto unimplemented; + #endif case TARGET_NR_mmap: #if defined(TARGET_I386) || defined(TARGET_ARM) || defined(TARGET_M68K) *************** *** 2859,2866 **** goto unimplemented; #endif case TARGET_NR_socketcall: ret = do_socketcall(arg1, arg2); break; ! #ifdef TARGET_NR_accept case TARGET_NR_accept: --- 2877,2885 ---- goto unimplemented; #endif + #ifdef TARGET_NR_socketcall case TARGET_NR_socketcall: ret = do_socketcall(arg1, arg2); break; ! #endif #ifdef TARGET_NR_accept case TARGET_NR_accept: *************** *** 3099,3105 **** --- 3118,3126 ---- } break; + #ifdef TARGET_NR_ipc case TARGET_NR_ipc: ret = do_ipc(arg1, arg2, arg3, arg4, arg5, arg6); break; + #endif case TARGET_NR_fsync: ret = get_errno(fsync(arg1)); Index: main.c =================================================================== RCS file: /cvsroot/hppaqemu/hppaqemu/linux-user/main.c,v retrieving revision 1.1.1.1 retrieving revision 1.2 diff -C2 -d -r1.1.1.1 -r1.2 *** main.c 23 Feb 2007 21:44:25 -0000 1.1.1.1 --- main.c 4 Mar 2007 23:19:41 -0000 1.2 *************** *** 1529,1532 **** --- 1529,1543 ---- #endif /* TARGET_M68K */ + #ifdef TARGET_HPPA + + void cpu_loop(CPUHPPAState *env) + { + for (;;) + { + } + } + + #endif + void usage(void) { *************** *** 1852,1855 **** --- 1863,1878 ---- env->pc = regs->pc; } + #elif defined(TARGET_HPPA) + { + int i; + + for(i = 0; i < 32; i++) { + env->gr[i] = regs->gr[i]; + } + env->iaoq[0] = regs->iaoq[0]; + env->iaoq[1] = regs->iaoq[1]; + env->iasq[0] = regs->iasq[0]; + env->iasq[1] = regs->iasq[1]; + } #else #error unsupported target CPU Index: elfload.c =================================================================== RCS file: /cvsroot/hppaqemu/hppaqemu/linux-user/elfload.c,v retrieving revision 1.1.1.1 retrieving revision 1.2 diff -C2 -d -r1.1.1.1 -r1.2 *** elfload.c 23 Feb 2007 21:44:23 -0000 1.1.1.1 --- elfload.c 4 Mar 2007 23:19:40 -0000 1.2 *************** *** 314,317 **** --- 314,336 ---- #endif + #ifdef TARGET_HPPA + + #define ELF_START_MMAP 0x40000000 + + #define elf_check_arch(x) ( (x) == EM_PARISC ) + + #define ELF_CLASS ELFCLASS32 + #define ELF_DATA ELFDATA2MSB + #define ELF_ARCH EM_PARISC + + static inline void init_thread(struct target_pt_regs *regs, struct image_info *infop) + { + regs->iaoq[0] = infop->entry; + regs->iaoq[1]= regs->iaoq[0] + 4; + regs->gr[30] = infop->start_stack ; + } + + #endif + #ifndef ELF_PLATFORM #define ELF_PLATFORM (NULL) |
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From: Randolph C. <ta...@us...> - 2007-03-04 23:19:45
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Update of /cvsroot/hppaqemu/hppaqemu In directory sc8-pr-cvs5.sourceforge.net:/tmp/cvs-serv8519 Modified Files: Makefile.target configure cpu-exec.c Log Message: check in a few more things to get the hppa-linux-user target to compile Index: Makefile.target =================================================================== RCS file: /cvsroot/hppaqemu/hppaqemu/Makefile.target,v retrieving revision 1.3 retrieving revision 1.4 diff -C2 -d -r1.3 -r1.4 *** Makefile.target 4 Mar 2007 15:16:26 -0000 1.3 --- Makefile.target 4 Mar 2007 23:19:40 -0000 1.4 *************** *** 276,279 **** --- 276,283 ---- endif + ifeq ($(TARGET_ARCH), hppa) + LIBOBJS+=helper.o + endif + # NOTE: the disassembler code is only needed for debugging LIBOBJS+=disas.o Index: configure =================================================================== RCS file: /cvsroot/hppaqemu/hppaqemu/configure,v retrieving revision 1.3 retrieving revision 1.4 diff -C2 -d -r1.3 -r1.4 *** configure 4 Mar 2007 15:16:26 -0000 1.3 --- configure 4 Mar 2007 23:19:40 -0000 1.4 *************** *** 423,427 **** # the following are Linux specific if [ "$linux_user" = "yes" ] ; then ! target_list="i386-linux-user arm-linux-user armeb-linux-user sparc-linux-user ppc-linux-user mips-linux-user mipsel-linux-user m68k-linux-user $target_list" fi # the following are Darwin specific --- 423,427 ---- # the following are Linux specific if [ "$linux_user" = "yes" ] ; then ! target_list="i386-linux-user arm-linux-user armeb-linux-user sparc-linux-user ppc-linux-user mips-linux-user mipsel-linux-user m68k-linux-user hppa-linux-user $target_list" fi # the following are Darwin specific Index: cpu-exec.c =================================================================== RCS file: /cvsroot/hppaqemu/hppaqemu/cpu-exec.c,v retrieving revision 1.3 retrieving revision 1.4 diff -C2 -d -r1.3 -r1.4 *** cpu-exec.c 4 Mar 2007 15:16:27 -0000 1.3 --- cpu-exec.c 4 Mar 2007 23:19:40 -0000 1.4 *************** *** 41,45 **** //#define DEBUG_SIGNAL ! #if defined(TARGET_ARM) || defined(TARGET_SPARC) || defined(TARGET_M68K) /* XXX: unify with i386 target */ void cpu_loop_exit(void) --- 41,45 ---- //#define DEBUG_SIGNAL ! #if defined(TARGET_ARM) || defined(TARGET_SPARC) || defined(TARGET_M68K) || defined(TARGET_HPPA) /* XXX: unify with i386 target */ void cpu_loop_exit(void) |
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From: Randolph C. <ta...@us...> - 2007-03-04 23:18:32
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Update of /cvsroot/hppaqemu/hppaqemu/linux-user/hppa In directory sc8-pr-cvs5.sourceforge.net:/tmp/cvs-serv8390/linux-user/hppa Log Message: Directory /cvsroot/hppaqemu/hppaqemu/linux-user/hppa added to the repository |
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From: Stuart B. <zu...@us...> - 2007-03-04 16:13:24
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Update of /cvsroot/hppaqemu/hppaqemu/target-hppa In directory sc8-pr-cvs5.sourceforge.net:/tmp/cvs-serv3549 Modified Files: op_mem.h translate.c Log Message: Fix a few obvious typos. Index: translate.c =================================================================== RCS file: /cvsroot/hppaqemu/hppaqemu/target-hppa/translate.c,v retrieving revision 1.4 retrieving revision 1.5 diff -C2 -d -r1.4 -r1.5 *** translate.c 4 Mar 2007 15:16:27 -0000 1.4 --- translate.c 4 Mar 2007 16:13:20 -0000 1.5 *************** *** 467,471 **** break; case 0x26: /* UADDCM */ ! gen_com_T1(); gen_op_addl_T1_T0(); break; --- 467,471 ---- break; case 0x26: /* UADDCM */ ! gen_op_com_T1(); gen_op_addl_T1_T0(); break; *************** *** 698,702 **** gen_op_add_T1_T0(); gen_movl_imm_T0(0); ! gen_movl_TO_reg(t); break; } --- 698,702 ---- gen_op_add_T1_T0(); gen_movl_imm_T0(0); ! gen_movl_T0_reg(t); break; } *************** *** 710,714 **** im11 = field_signext(insn, 0, 11); gen_movl_reg_T0(r); ! op_sub_T1_T0(); break; } --- 710,714 ---- im11 = field_signext(insn, 0, 11); gen_movl_reg_T0(r); ! gen_op_sub_T1_T0(); break; } Index: op_mem.h =================================================================== RCS file: /cvsroot/hppaqemu/hppaqemu/target-hppa/op_mem.h,v retrieving revision 1.1 retrieving revision 1.2 diff -C2 -d -r1.1 -r1.2 *** op_mem.h 27 Feb 2007 23:20:43 -0000 1.1 --- op_mem.h 4 Mar 2007 16:13:20 -0000 1.2 *************** *** 16,19 **** HPPA_ST_OP(stw, stl); ! HPPA_ST_OP(sth, stuw); ! HPPA_ST_OP(stb, stub); --- 16,19 ---- HPPA_ST_OP(stw, stl); ! HPPA_ST_OP(sth, stw); ! HPPA_ST_OP(stb, stb); |
