EduCPU

This is a simple CPU design, written in Verilog, intended for educational purposes. The objective is to provide a simulatable processor where the source code exposes concepts in CPU microarchitecture.

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License

BSD License, MIT License

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Additional Project Details

Intended Audience

Education, Science/Research

Programming Language

VHDL/Verilog

Related Categories

VHDL/Verilog Hardware Platform, VHDL/Verilog Education Software

Registered

2014-07-23

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