[E1000-devel] [ixgbe] Receive Side Scaling and IRQ

[배영부 <ri...@pi...>]

Hi there.

I'm evaluating RSS(Receive-Side Scaling) feature of Intel 82598EB NIC.
I'm evaluating it with two of Quad core Xeon CPUs - as a result, there 
are 4 cpu cores - and ixgbe device driver
version 1.3.56. (Yes, I know that there is newest version 2.0.34.3.)

If you know about RSS, then you maybe know that there are redirection 
table is having 128 entries.
each entry stores RSS output index. If there are 8 CPU cores, then the 
value will be one of from 0 to 7.
and If system can use MSI-X, then rx interrupt vector also will be 8.
In this condition, I have done some test. and I got a result.
Every IRQ interrupt is matched two of redirection table entry values 
like below.
index of the entry is not important.

irq 1 match entry value 7,3
irq 2 match entry value 6,2
irq 3 match entry value 5,1
irq 4 match entry value 4,0
irq 5 match entry value 7,3
irq 6 match entry value 6,2
irq 7 match entry value 5,1
irq 8 match entry value 4,0

It seems like a rule. but I can't find any code about that.
Anyway, I want to change this rule to this.
irq 1 match entry value 0
irq 2 match entry value 1
...
irq 8 match entry value 7

I mean I want to make rule that every irq interrupt have to match just 
one entry value.
could you understand me? Is it possible?
If there is just one of reference code, then please let me know.
Thank you in advance.

Best regards.

P.S. Sorry for my poor English.
If you can't understand because of my poor English, then let me know.
I'll fix them more accurately and send send again.