From: thoduv <th...@us...> - 2006-07-04 18:51:47
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Update of /cvsroot/desmume/desmume/src/arm7 In directory sc8-pr-cvs4.sourceforge.net:/tmp/cvs-serv4978/arm7 Added Files: fw.c fw.h spi.c spi.h Log Message: Reordering directories (arm9 and arm7 folder added). Moved GPU and ARM9 to arm9/ Moved spi and fw (added write support, not tested) to arm7/ Compilation may be broken for gtk version (i'll fix it soon) and windows version (includes have to be changed) --- NEW FILE: fw.c --- #include <stdlib.h> #include "../debug.h" #include "../types.h" #include "spi.h" void fw_init(fw_chip_t *fw) { fw->com = 0; fw->adr = 0; fw->adr_shift = 0; fw->data = NULL; fw->size = 0; fw->write_enable = FALSE; fw->writeable_buffer = FALSE; } u8 *fw_alloc(fw_chip_t *fw, u32 size) { u8 *buffer; buffer = malloc(size); if(!buffer) { return NULL; } fw->data = buffer; fw->size = size; fw->writeable_buffer = TRUE; } void fw_free(fw_chip_t *fw) { if(fw->data) free(fw->data); fw_init(fw); } void fw_reset_com(fw_chip_t *fw) { fw->com = 0; } u8 fw_transfer(fw_chip_t *fw, u8 data) { if(fw->com == NVRAM_CMD_READ || fw->com == NVRAM_CMD_PAGEWRITE) /* check if we are in a command that needs 3 bytes adress */ { if(fw->adr_shift > 0) /* if we got a complete adress */ { fw->adr_shift--; fw->adr |= data << (fw->adr_shift * 8); /* argument is a byte of adress */ } else /* if we have received 3 bytes of adress, proceed command */ { switch(fw->com) { case NVRAM_CMD_READ: if(fw->adr < fw->size) /* check if we can read */ { data = fw->data[fw->adr]; /* return byte */ fw->adr++; /* then increment adress */ } break; case NVRAM_CMD_PAGEWRITE: if(fw->adr < fw->size) { fw->data[fw->adr] = data; /* write byte */ fw->adr++; } break; } } } else if(fw->com == NVRAM_CMD_STATUS) { return 0; } else /* finally, check if it's a new command */ { switch(data) { case 0: break; /* nothing */ case NVRAM_CMD_READ: /* read command */ fw->adr = 0; fw->adr_shift = 3; fw->com = NVRAM_CMD_READ; break; case NVRAM_CMD_WRITEENABLE: /* enable writing */ if(fw->writeable_buffer) { fw->write_enable = TRUE; } break; case NVRAM_CMD_WRITEDISABLE: /* disable writing */ fw->write_enable = FALSE; break; case NVRAM_CMD_PAGEWRITE: /* write command */ if(fw->write_enable) { fw->adr = 0; fw->adr_shift = 3; fw->com = NVRAM_CMD_PAGEWRITE; } else { data = 0; } break; case NVRAM_CMD_STATUS: /* status register command */ fw->com = NVRAM_CMD_STATUS; break; default: LOG("Unhandled FW command: %02X\n", data); break; } } return data; } --- NEW FILE: spi.h --- #ifndef __SPI_H__ #define __SPI_H__ #ifdef __cplusplus extern "C" { #endif #include "../types.h" #include "../nds/serial.h" #include "fw.h" typedef struct { fw_chip_t fw; } nds7_spi_t; #ifdef __cplusplus } #endif #endif /*__SPI_H__*/ --- NEW FILE: spi.c --- #include "spi.h" --- NEW FILE: fw.h --- #ifndef __FW_H__ #define __FW_H__ #ifdef __cplusplus extern "C" { #endif #include "../types.h" #include "../nds/serial.h" typedef struct { u8 com; /* persistent command actually handled */ u32 adr; /* current adress for reading/writing */ u8 adr_shift; /* shift for adress (since adresses are transfered by 3 bytes units) */ BOOL write_enable; /* is write enabled ? */ u8 *data; /* fw memory data */ u32 size; /* fw memory size */ BOOL writeable_buffer; /* is "data" writeable ? */ } fw_chip_t; #define NDS_FW_SIZE_V1 (256 * 1024) /* size of fw memory on nds v1 */ #define NDS_FW_SIZE_V2 (512 * 1024) /* size of fw memory on nds v2 */ void fw_init(fw_chip_t *fw); /* reset and init values for fw struct */ u8 *fw_alloc(fw_chip_t *fw, u32 size); /* alloc fw memory */ void fw_free(fw_chip_t *fw); /* delete fw memory */ void fw_reset_com(fw_chip_t *fw); /* reset communication with firmware */ u8 fw_transfer(fw_chip_t *fw, u8 data); /* transfer to, then receive data from fw */ #ifdef __cplusplus } #endif #endif /*__FW_H__*/ |