blob-cvs-commit — blob CVS commit messages list

CVS: blob/include/blob/proc pxa.h,NONE,1.1

[Jeff S. <je...@us...>]

Update of /cvsroot/blob/blob/include/blob/proc
In directory usw-pr-cvs1:/tmp/cvs-serv22760

Added Files:
	pxa.h 
Log Message:
Added support for PXA processors, Lubbock and PXA IDP machines


--- NEW FILE: pxa.h ---
/*
 * proc/pxa.h - processor specific defines
 * 
 * Copyright (C) 2001  Erik Mouw (J.A...@it...)
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
 *
 */

#ifndef BLOB_PXA_PROC_H
#define BLOB_PXA_PROC_H

/*
 * Intel PXA internal I/O mappings:
 *
 * 0x40000000 - 0x41ffffff <--> 0xf8000000 - 0xf9ffffff
 * 0x44000000 - 0x45ffffff <--> 0xfa000000 - 0xfbffffff
 * 0x48000000 - 0x49ffffff <--> 0xfc000000 - 0xfdffffff
 */

#define io_p2v(x)	( ((x) | 0xbe000000) ^ (~((x) >> 1) & 0x06000000) )
#define io_v2p( x )	( ((x) & 0x41ffffff) ^ ( ((x) & 0x06000000) << 1) )

#ifndef __ASSEMBLY__


# define __REG(x)	(*((volatile u32 *)io_p2v(x)))

# define __REG2(x,y)	\
	( __builtin_constant_p(y) ? (__REG((x) + (y))) \
				  : (*(volatile u32 *)((u32)&__REG(x) + (y))) )

# define __PREG(x)	(io_v2p((u32)&(x)))

#else

# define __REG(x)	io_p2v(x)
# define __PREG(x)	io_v2p(x)

#endif


#define __ASM_ARCH_HARDWARE_H
#include <asm-arm/arch-pxa/pxa-regs.h>

/* memory start and end */
/* are these values proc or arch specific? */
#define MEMORY_START		(0xa0000000)
#define MEMORY_END		(0xc0000000)

/**********************************************************************
 *  Memory Config Register Indices
 *  based on 0xA0000000
 */

#define MDCNFG_OFFSET    0x0
#define MDREFR_OFFSET    0x4
#define MSC0_OFFSET      0x8
#define MSC1_OFFSET      0xC
#define MSC2_OFFSET      0x10
#define MECR_OFFSET      0x14
#define SXLCR_OFFSET     0x18
#define SXCNFG_OFFSET    0x1C
#define FLYCNFG_OFFSET   0x20
#define SXMRS_OFFSET     0x24                                       
#define MCMEM0_OFFSET    0x28
#define MCMEM1_OFFSET    0x2C
#define MCATT0_OFFSET    0x30
#define MCATT1_OFFSET    0x34
#define MCIO0_OFFSET     0x38
#define MCIO1_OFFSET     0x3C
#define MDMRS_OFFSET     0x40

#define MDCNFG_DE0       (1 << 0)
#define MDCNFG_DE1       (1 << 1)
#define MDCNFG_DE2       (1 << 16)
#define MDCNFG_DE3       (1 << 17)
#define MDCNFG_DWID0_32B (0 << 3)

#endif

CVS: blob/include/blob/arch lubbock.h,NONE,1.1 pxa_idp.h,NONE,1.1 Makefile.am,1.9,1.10

[Jeff S. <je...@us...>]

Update of /cvsroot/blob/blob/include/blob/arch
In directory usw-pr-cvs1:/tmp/cvs-serv20812

Modified Files:
	Makefile.am 
Added Files:
	lubbock.h pxa_idp.h 
Log Message:




--- NEW FILE: lubbock.h ---
/*
 * lubbock.h: Lubbock specific defines
 *
 * Copyright (C) 2002 Intel Corporation
 * Written by Rusty Geldmacher (rus...@in...)
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
 *
 */

#ifndef BLOB_ARCH_LUBBOCK_H
#define BLOB_ARCH_LUBBOCK_H

/* boot CPU speed */
#define CPU_SPEED		(0x0b)


/* the base address were BLOB is loaded by the first stage loader */
#define BLOB_ABS_BASE_ADDR	(0xc0200400)


/* where do various parts live in RAM */
#define BLOB_RAM_BASE		(0xc0100000)
#define KERNEL_RAM_BASE		(0xC0008000)
#define PARAM_RAM_BASE		(0xc0110000)
#define RAMDISK_RAM_BASE	(0xC0400000)


/* and where do they live in flash */
#define BLOB_FLASH_BASE		(0x00000000)
#define BLOB_FLASH_LEN		(256 * 1024)
#define PARAM_FLASH_BASE	(BLOB_FLASH_BASE + BLOB_FLASH_LEN)
#define PARAM_FLASH_LEN		(256 * 1024)
#define KERNEL_FLASH_BASE	(PARAM_FLASH_BASE + PARAM_FLASH_LEN)
#define KERNEL_FLASH_LEN	(1024 * 1024)
#define LOAD_RAMDISK		1 /* load ramdisk into ram */
#define RAMDISK_FLASH_BASE	(KERNEL_FLASH_BASE + KERNEL_FLASH_LEN)
#define RAMDISK_FLASH_LEN	(4 * 1024 * 1024)


/* the position of the kernel boot parameters */
#define BOOT_PARAMS		(0xc0000100)


/* the size (in kbytes) to which the compressed ramdisk expands */
#define RAMDISK_SIZE		(8 * 1024)


/* Memory configuration */
/* get these values later */

#endif 

--- NEW FILE: pxa_idp.h ---
/*
 * pxa_idp.h: Accelent PXA-IDP specific defines
 *
 * Copyright (C) 2001  Erik Mouw (J.A...@it...)
 * Copyright (C) 2002  Holger Schurig <h.s...@mn...>
 * Copyright (c) 2002  Jeff Sutherland <je...@ac...>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
 *
 */

#ifndef BLOB_ARCH_PXA_IDP_H
#define BLOB_ARCH_PXA_IDP_H

/* speed definitions are more complex on Xscale- need core, internal bus,
 * and memory numbers.  Not all combinations are valid.
 */

#undef  CPU_SPEED_400

/* boot CPU speed */
#ifdef CPU_SPEED_100
#       define CPU_SPEED                (0x05)
#else
#       define CPU_SPEED                (0x0a)
#endif

/* serial port */
#define USE_SERIAL1
#define TERMINAL_SPEED baud_115200

/* GPIO for the LED */
#define LED_GPIO		(0x00000002) /* GPIO 1 */


/* the base address were BLOB is loaded by the first stage loader */
#define BLOB_ABS_BASE_ADDR	(0xa0200400)


/* where do various parts live in RAM */
#define BLOB_RAM_BASE		(0xa0100000)
#define KERNEL_RAM_BASE		(0xa0008000)
#define PARAM_RAM_BASE		(0xa0110000)
#define RAMDISK_RAM_BASE	(0xa0400000)


/* and where do they live in flash */
#define BLOB_FLASH_BASE		(0x00000000)
#define BLOB_FLASH_LEN		(256 * 1024)
#define PARAM_FLASH_BASE	(BLOB_FLASH_BASE + BLOB_FLASH_LEN)
#define PARAM_FLASH_LEN		(256 * 1024)
#define KERNEL_FLASH_BASE	(PARAM_FLASH_BASE + PARAM_FLASH_LEN)
#define KERNEL_FLASH_LEN	(1024 * 1024)
#define LOAD_RAMDISK		1 /* load ramdisk into ram */
#define RAMDISK_FLASH_BASE	(KERNEL_FLASH_BASE + KERNEL_FLASH_LEN)
#define RAMDISK_FLASH_LEN	(4 * 1024 * 1024)


/* the position of the kernel boot parameters */
#define BOOT_PARAMS		(0xa0000100)


/* the size (in kbytes) to which the compressed ramdisk expands */
#define RAMDISK_SIZE		(8 * 1024)

/* #ifdef BLOB_NEED_MEMCONFIG */

#if 1

/* this is full tilt boogie (400MHz cpu, 100Mhz mem, 100MHz clk)

#define MDCNFG_VALUE	0x0A000AC9
#define MDREFR_VALUE	0x0085C017
#define MSC0_VALUE	0x29DCA4D2
#define MSC1_VALUE	0x439C493C
#define MSC2_VALUE	0x7FD449D1
#define MECR_VALUE	0x00000003

*/

/* I took these from the Lubbock setup, they should probably be changed
 * for actual IDP values, but these are there for now :-)
 */

#define PERIF_BASE_PHYSICAL 0x40000000
#define MEMC_BASE_PHYSICAL  0x48000000
#define SDRAM_BASE_PHYSICAL 0xA0000000

#define OST_OFFSET          0x00A00000
#define OSCR_OFFSET         0x10

#define OST_BASE_PHYSICAL   (PERIF_BASE_PHYSICAL + OST_OFFSET)
#define OSCR_BASE_PHYSICAL  (OST_BASE_PHYSICAL + OSCR_OFFSET)

#define MSC0_VAL            0x23F223F2
#define MSC1_VAL            0x3FF1A441
#define MSC2_VAL            0x7FF17FF1
#define MECR_VAL            0x00000000
#define MCMEM0_VAL          0x00010504
#define MCMEM1_VAL          0x00010504
#define MCATT0_VAL          0x00010504
#define MCATT1_VAL          0x00010504
#define MCIO0_VAL           0x00004715
#define MCIO1_VAL           0x00004715
#define MDREFR_VAL          0x00018018
#define MDCNFG_VAL          0x00001AC9
#define MDMRS_VAL           0x00000000

/*
#ifndef __ASSEMBLY__

memregs->sxlcr =    0x00000000
memregs->sxcnfg =   0x00000000
memregs->flycnfg =  0x01FE01FE
memregs->sxmrs =    0x00000000
memregs->mcmem0 =   0x00014405
memregs->mcmem1 =   0x00014405
memregs->mcatt0 =   0x00014405
memregs->mcatt1 =   0x00014405
memregs->mcio0 =    0x00014405
memregs->mcio1 =    0x00014405
memregs->mdmrs =    0x00320032
memregs->boot_def = 0x00000008

#endif
*/

#else

// Do a low speed version at some point...

#endif

/* #endif */


// the control-registers in the FPGA
#define CONTROL_REG     __REG(0x42000000)


/* Debugging macros used in accelent code */
#define ACCELENT_DEBUG 1

#ifdef ACCELENT_DEBUG
#	define _DBGU32( x )	SerialOutputString( #x"=0x" ); \
				SerialOutputHex( (u32)x ); \
				serial_write( '\n' );
#else
#	define _DBGU32( x )
#endif


#endif

Index: Makefile.am
===================================================================
RCS file: /cvsroot/blob/blob/include/blob/arch/Makefile.am,v
retrieving revision 1.9
retrieving revision 1.10
diff -u -d -r1.9 -r1.10
--- Makefile.am	27 May 2002 10:01:48 -0000	1.9
+++ Makefile.am	14 Aug 2002 20:57:56 -0000	1.10
@@ -21,12 +21,14 @@
 	idr.h \
 	jornada720.h \
 	lart.h \
+	lubbock.h \
 	miniprint.h \
 	nesa.h \
 	pleb.h \
 	shannon.h \
 	system3.h \
-	trizeps.h
+	trizeps.h \
+	pxa_idp.h
 
 
 CLEANFILES	= ${srcdir}/*~

CVS: blob configure.in,1.53,1.54

[Jeff S. <je...@us...>]

Update of /cvsroot/blob/blob
In directory usw-pr-cvs1:/tmp/cvs-serv16397

Modified Files:
	configure.in 
Log Message:
Support for PXA processors, Lubbock and PXA IDP machines


Index: configure.in
===================================================================
RCS file: /cvsroot/blob/blob/configure.in,v
retrieving revision 1.53
retrieving revision 1.54
diff -u -d -r1.53 -r1.54
--- configure.in	27 May 2002 10:01:47 -0000	1.53
+++ configure.in	14 Aug 2002 20:48:09 -0000	1.54
@@ -85,11 +85,13 @@
                             idr          Vercel UD-1
                             jornada720   HP Jornada 720 with Flash board
                             lart         LART
+                            lubbock      Intel HCDDBCTA1 (Lubbock)
                             nesa         NESA
                             pleb         PLEB
                             shannon      TuxScreen (Shannon)
                             system3      Prueftechnik Digital Board
                             trizeps      Keith & Koep Trizeps Board
+			    pxa_idp	 Accelent PXA-based IDP
                           Default board is lart],
 	board_name="$withval",
 	board_name="lart")
@@ -203,6 +205,16 @@
 	use_cpu="sa1100"
 	use_lcd="no"
 	;;
+    lubbock)
+    	board_name="Intel HCDDBCTA1 (Lubbock)"
+	AC_DEFINE(LUBBOCK)
+	AC_MSG_WARN([Warning: untested platform!])
+	BLOB_PLATFORM_OBJS="lubbock.o"
+	BLOB_FLASH_OBJS="intel32.o"
+	DIAG_PLATFORM_OBJS="lubbock.o"
+	use_cpu="pxa250"
+	use_lcd="no"
+	;;	
     miniprint)
         board_name="FGAG miniprint"
         AC_DEFINE(MINIPRINT)
@@ -260,6 +272,15 @@
 	use_cpu="sa1110"
 	use_lcd="no"
 	;;
+    pxa_idp)
+	board_name="Accelent PXA250 IDP"
+	AC_DEFINE(PXA_IDP)
+	BLOB_PLATFORM_OBJS="pxa_idp.o"
+	BLOB_FLASH_OBJS="intel32.o"
+	DIAG_PLATFORM_OBJS="pxa_idp.o"
+	use_cpu="pxa250"
+	use_lcd="no"
+	;;
     *)
 	AC_MSG_RESULT(unknown)
 	AC_MSG_ERROR([Unknown board name \"$board_name\", bailing out])
@@ -285,11 +306,19 @@
 	dnl SA1100 CPU: EDORAM memory setup code
 	BLOB_STARTCODE_OBJS="start-sa11x0.o"
 	BLOB_MEMSETUP_OBJS="memsetup-sa1100.o"
+	BLOB_SERIAL_DRIVER_OBJS="serial-sa11x0.o"
 	;;
     sa1110)
 	dnl SA1110 CPU: SDRAM memory setup code
 	BLOB_STARTCODE_OBJS="start-sa11x0.o"
 	BLOB_MEMSETUP_OBJS="memsetup-sa1110.o"
+	BLOB_SERIAL_DRIVER_OBJS="serial-sa11x0.o"
+	;;
+    pxa250)
+	dnl PXA250 CPU: SDRAM memory setup code
+	BLOB_STARTCODE_OBJS="start-pxa.o"
+	BLOB_MEMSETUP_OBJS="memsetup-pxa250.o"
+	BLOB_SERIAL_DRIVER_OBJS="serial-pxa.o"
 	;;
     *)
 	AC_MSG_ERROR([Unknown CPU name \"$use_cpu\", bailing out]);
@@ -299,6 +328,7 @@
 dnl Define in configuration
 AC_SUBST(BLOB_STARTCODE_OBJS)
 AC_SUBST(BLOB_MEMSETUP_OBJS)
+AC_SUBST(BLOB_SERIAL_DRIVER_OBJS)
 
 
 
@@ -582,6 +612,10 @@
 case "$use_cpu" in
     sa11?0)
 	cpu_cflags="-march=armv4 -mtune=strongarm1100"
+	;;
+    pxa2?0)
+	dnl was: cpu_cflags="-march=armv4 -Wa,-mxscale -mtune=strongarm"
+	cpu_cflags="-march=armv4"
 	;;
     *)
 	cpu_cflags=""

CVS: blob acconfig.h,1.20,1.21

[Jeff S. <je...@us...>]

Update of /cvsroot/blob/blob
In directory usw-pr-cvs1:/tmp/cvs-serv16102

Modified Files:
	acconfig.h 
Log Message:
Support for PXA processors, Lubbock and PXA IDP machines


Index: acconfig.h
===================================================================
RCS file: /cvsroot/blob/blob/acconfig.h,v
retrieving revision 1.20
retrieving revision 1.21
diff -u -d -r1.20 -r1.21
--- acconfig.h	27 May 2002 10:01:47 -0000	1.20
+++ acconfig.h	14 Aug 2002 20:47:38 -0000	1.21
@@ -92,6 +92,9 @@
 /* Define for LART boards */
 #undef LART
 
+/* Define for Lubock boards */
+#undef LUBBOCK
+
 /* Define for MINIPRINT boards */
 #undef MINIPRINT
 
@@ -109,6 +112,9 @@
 
 /* Define for Trizeps boards */
 #undef TRIZEPS
+
+/* Define for Accelent PXA-based IDP */
+#undef PXA_IDP
 
 /* Define if LCD support is wanted */
 #undef CONFIG_LCD_SUPPORT

CVS: blob AUTHORS,1.10,1.11

[Jeff S. <je...@us...>]

Update of /cvsroot/blob/blob
In directory usw-pr-cvs1:/tmp/cvs-serv15842

Modified Files:
	AUTHORS 
Log Message:
Support for PXA processors, Lubbock and PXA IDP machines


Index: AUTHORS
===================================================================
RCS file: /cvsroot/blob/blob/AUTHORS,v
retrieving revision 1.10
retrieving revision 1.11
diff -u -d -r1.10 -r1.11
--- AUTHORS	27 May 2002 10:01:47 -0000	1.10
+++ AUTHORS	14 Aug 2002 20:47:12 -0000	1.11
@@ -92,3 +92,12 @@
 * FGAG miniprint port
 =====================
 - Urs Kaufmann <u_k...@bl...>
+
+* Accelent PXA IDP port
+=======================
+- Jeff Sutherland <je...@ac...>
+
+* Intel Lubbock port, PXA processor support
+===========================================
+- Russell Geldmacher <rus...@in...>
+

CVS: blob/include/blob serial.h,1.7,1.8

[Jeff S. <je...@us...>]

Update of /cvsroot/blob/blob/include/blob
In directory usw-pr-cvs1:/tmp/cvs-serv3055

Modified Files:
	serial.h 
Log Message:
Added support for pxa processors' serial ports


Index: serial.h
===================================================================
RCS file: /cvsroot/blob/blob/include/blob/serial.h,v
retrieving revision 1.7
retrieving revision 1.8
diff -u -d -r1.7 -r1.8
--- serial.h	5 Feb 2002 14:47:54 -0000	1.7
+++ serial.h	30 Jul 2002 18:41:54 -0000	1.8
@@ -74,7 +74,7 @@
 
 /* implemented serial drivers */
 extern serial_driver_t sa11x0_serial_driver;
-
+extern serial_driver_t pxa_serial_driver;
 
 /* should be filled out by the architecture dependent files */
 extern serial_driver_t *serial_driver;

CVS: blob/include/blob pxa-regs.h,NONE,1.1

[Jeff S. <je...@us...>]

Update of /cvsroot/blob/blob/include/blob
In directory usw-pr-cvs1:/tmp/cvs-serv32268

Added Files:
	pxa-regs.h 
Log Message:
Initial entry into repository.


--- NEW FILE: pxa-regs.h ---
/*
 * pxa-regs.h: wrapper file to include asm/arch-pxa/pxa-regs.h
 *
 * Copyright (C) 2001  Erik Mouw (J.A...@it...)
 * Copyright (C) 2002  Jeff Sutherland <je...@ac...>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
 *
 */

#ifndef BLOB_PXA_REGS_H
#define BLOB_PXA_REGS_H

#define io_p2v(x) (x)
#define __REG(x)      (*((volatile u32 *)io_p2v(x)))

#define __ASM_ARCH_HARDWARE_H
#include <asm-arm/arch-pxa/pxa-regs.h>

#endif

CVS: blob/include/blob/proc - New directory

[Jeff S. <je...@us...>]

Update of /cvsroot/blob/blob/include/blob/proc
In directory usw-pr-cvs1:/tmp/cvs-serv30424/proc

Log Message:
Directory /cvsroot/blob/blob/include/blob/proc added to the repository

CVS: blob/src/lib serial-pxa.c,1.1,1.2

[Jeff S. <je...@us...>]

Update of /cvsroot/blob/blob/src/lib
In directory usw-pr-cvs1:/tmp/cvs-serv11252

Modified Files:
	serial-pxa.c 
Log Message:
Really should have taken one more look before entering initial code...


Index: serial-pxa.c
===================================================================
RCS file: /cvsroot/blob/blob/src/lib/serial-pxa.c,v
retrieving revision 1.1
retrieving revision 1.2
diff -u -d -r1.1 -r1.2
--- serial-pxa.c	30 Jul 2002 15:49:59 -0000	1.1
+++ serial-pxa.c	30 Jul 2002 17:45:18 -0000	1.2
@@ -88,7 +88,7 @@
 		if(SerialLSR & (LSR_FE | LSR_PE | LSR_OE))
 			return -ESERIAL;
 
-		tmp = SerialUTDR;
+		tmp = SerialDATA;
 	}
 
 	return 0;

CVS: blob/src/lib serial-pxa.c,NONE,1.1

[Jeff S. <je...@us...>]

Update of /cvsroot/blob/blob/src/lib
In directory usw-pr-cvs1:/tmp/cvs-serv1419

Added Files:
	serial-pxa.c 
Log Message:
Inital entry into repository


--- NEW FILE: serial-pxa.c ---
/*
 * serial-pxa.c: PXA250/210 serial port driver
 *
 * Copyright (C) 2002  Erik Mouw <J.A...@it...>
 * Copyright (C) 2002  Jeff Sutherland <je...@ac...>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
 *
 */

#ifdef HAVE_CONFIG_H
# include <blob/config.h>
#endif

#include <blob/arch.h>
#include <blob/errno.h>
#include <blob/pxa-regs.h>
#include <blob/serial.h>
#include <blob/types.h>

#if defined USE_SERIAL1

# define SerialDATA  FFRBR
# define SerialFIFO  FFFCR
# define SerialLCR   FFLCR
# define SerialMCR   FFMCR
# define SerialLSR   FFLSR
# define SerialMSR   FFMSR
# define SerialIER   FFIER

#else /* defined USE_SERIAL1 */

#if defined USE_SERIAL2

# define SerialDATA  BTRBR
# define SerialFIFO  BTFCR
# define SerialLCR   BTLCR
# define SerialMCR   BTMCR
# define SerialLSR   BTLSR
# define SerialIER   BTIER
# define SerialMSR   BTMSR

#else /* defined USE_SERIAL2 */

#if defined USE_SERIAL3

/* using an Xscale CPU and not having any serial port defined is an
 * error, but because we're using the driver in the library we can't
 * bail out over here
 */

# define SerialDATA  STRBR
# define SerialFIFO  STFCR
# define SerialLCR   STLCR
# define SerialMCR   STMCR
# define SerialLSR   STLSR
# define SerialIER   STIER
# define SerialMSR   STMSR

#endif /* defined USE_SERIAL3 */

#endif /* defined USE_SERIAL2 */

#endif /* defined USE_SERIAL1 */


/* flush serial input queue. returns 0 on success or negative error
 * number otherwise
 */
static int pxa_serial_flush_input(void)
{
	volatile u32 tmp;

	/* keep on reading as long as the receiver is not empty */
	while(SerialLSR & LSR_DR) {
		if(SerialLSR & (LSR_FE | LSR_PE | LSR_OE))
			return -ESERIAL;

		tmp = SerialUTDR;
	}

	return 0;
}


/* flush output queue. returns 0 on success or negative error number
 * otherwise.  This only waits for space in the tx fifo, NOT until the fifo
 * has completely emptied.
 */
static int pxa_serial_flush_output(void)
{
	/* wait until the transmitter is no longer busy */
	while(SerialLSR & ~LSR_TDRQ) {
	}

	return 0;
}


/* initialise serial port at the request baudrate. returns 0 on
 * success, or a negative error number otherwise
 */
static int pxa_serial_init(serial_baud_t baud)
{
	u32 divisor;

	/* get correct divisor */
	switch(baud) {
	case baud_1200:
		divisor = 768;
		break;

	case baud_9600:
		divisor = 96;
		break;

	case baud_19200:
		divisor = 48;
		break;

	case baud_38400:
		divisor = 24;
		break;

	case baud_57600:
		divisor = 16;
		break;

	case baud_115200:
		divisor = 8;
		break;

	case baud_230400:
		divisor = 4;
		break;

	default:
		return -ERANGE;
	}

	pxa_serial_flush_output();

	/* switch receiver and transmitter off */
	SerialIER = 0x00;
	
	/* Gain access to divisor latch */
	SerialLCR = LCR_DLAB;

	/* Load baud rate divisor in two steps, lsb, then msb of value */

	SerialDATA = divisor & 0xff;
	SerialIER = (divisor & 0xff00) >> 8;
	

	/* set the port to sensible defaults (no break, no interrupts,
	 * no parity, 8 databits, 1 stopbit, transmitter and receiver
	 * enabled), reset dlab bit:
	 */
	SerialLCR = ( LCR_WLS1 | LCR_WLS0 );

	/* turn on tx/rx fifo's */
	SerialFIFO = FCR_TRFIFOE;
	
	/* turn the receiver and transmitter back on */
	SerialIER = IER_UUE;

	return 0;
}


/* check if there is a character available to read. returns 1 if there
 * is a character available, 0 if not, and negative error number on
 * failure */
static int pxa_serial_poll(void)
{
	/* check for errors */
	if(SerialLSR & (LSR_FE | LSR_PE | LSR_OE))
		return -ESERIAL;

	if(SerialLSR & LSR_DR)
		return 1;
	else
		return 0;
}


/* read one character from the serial port. return character (between
 * 0 and 255) on success, or negative error number on failure. this
 * function is blocking */
static int pxa_serial_read(void)
{
	int rv;

	for(;;) {
		rv = pxa_serial_poll();

		if(rv < 0)
			return rv;

		if(rv > 0)
			return SerialDATA & 0xff;
	}
}


/* write character to serial port. return 0 on success, or negative
 * error number on failure. this function is blocking
 */
static int pxa_serial_write(int c)
{
	/* wait for room in the transmit FIFO */
	while((SerialLSR & LSR_TDRQ) == 0) {
	}

	SerialDATA = c & 0xff;

	return 0;
}


/* export serial driver */
serial_driver_t pxa_serial_driver = {
	init:		pxa_serial_init,
	read:		pxa_serial_read,
	write:		pxa_serial_write,
	poll:		pxa_serial_poll,
	flush_input:	pxa_serial_flush_input,
	flush_output:	pxa_serial_flush_output
};

CVS: blob/src/blob start-sa11x0.S,1.4,1.5

[Christopher H. <ch...@us...>]

Update of /cvsroot/blob/blob/src/blob
In directory usw-pr-cvs1:/tmp/cvs-serv4677

Modified Files:
	start-sa11x0.S 
Log Message:
revert to 1.3

Index: start-sa11x0.S
===================================================================
RCS file: /cvsroot/blob/blob/src/blob/start-sa11x0.S,v
retrieving revision 1.4
retrieving revision 1.5
diff -u -d -r1.4 -r1.5
--- start-sa11x0.S	25 Jul 2002 17:25:20 -0000	1.4
+++ start-sa11x0.S	26 Jul 2002 07:22:36 -0000	1.5
@@ -44,16 +44,16 @@
 /* some defines to make life easier */
 /* Register addresses can be found in [1] Appendix A */
 IC_BASE:        .word   0x90050000
-#define _ICMR    0x04
+#define ICMR    0x04
 	
 PWR_BASE:	.word	0x90020000
-#define _PSSR	0x04
-#define _PSPR	0x08
-#define _PPCR	0x14
-#define _POSR	0x1C
+#define PSSR	0x04
+#define PSPR	0x08
+#define PPCR	0x14
+#define POSR	0x1C
 	
 RST_BASE:	.word	0x90030000
-#define _RCSR	0x04
+#define RCSR	0x04
 
 
 
@@ -76,16 +76,16 @@
 	/* First, mask **ALL** interrupts */
 	ldr	r0, IC_BASE
 	mov	r1, #0x00
-	str	r1, [r0, #_ICMR]
+	str	r1, [r0, #ICMR]
 
 	/* switch CPU to correct speed */
 	ldr	r0, PWR_BASE
 	ldr	r1, cpuspeed
-	str	r1, [r0, #_PPCR]
+	str	r1, [r0, #PPCR]
 
 	/* check if this is a wake-up from sleep */
 	ldr	r0, RST_BASE
-	ldr	r1, [r0, #_RCSR]
+	ldr	r1, [r0, #RCSR]
 	and	r1, r1, #0x0f
 	tst	r1, #0x08	/* check the Sleep Mode Reset bit */
 	beq	real_reset	/* no, continue booting */
@@ -93,14 +93,14 @@
 	/* Wait for the oscillator to stabilize */
 	ldr	r0, PWR_BASE
 wait_for_OOK:
-	ldr	r1, [r0, #_POSR]
+	ldr	r1, [r0, #POSR]
 	tst	r1, #1		/* test Oscillator OK bit */
 	beq	wait_for_OOK
 
 	/* yes, a wake-up. clear RCSR by writing a 1 (see 9.6.2.1 from [1]) */
 	ldr	r0, RST_BASE
 	mov	r1, #0x08
-	str	r1, [r0, #_RCSR]	;
+	str	r1, [r0, #RCSR]	;
 
 	/* setup memory */
 	bl	memsetup
@@ -108,14 +108,14 @@
 	/* handle Power Manager Sleep Status Register (PSSR)
 	 * see 9.5.7.5 from [1]*/
 	ldr	r0, PWR_BASE
-	ldr r1, [r0, #_PSSR]
+	ldr r1, [r0, #PSSR]
 	/* clear PH bit, bring periperal pins out from sleep state */
 	orr r1, r1, #0x10
-	str r1, [r0, #_PSSR]
+	str r1, [r0, #PSSR]
 	
 	/* get the value from the PSPR and jump to it */
 	ldr	r0, PWR_BASE
-	ldr	r1, [r0, #_PSPR]
+	ldr	r1, [r0, #PSPR]
 	mov	pc, r1
 
 	

Re: Blob port to xscale processors

[Holger S. <h.s...@mn...>]

> I've finally got off my rear and started the port to the PXA250
> processor. Anyone else working on this, or have plans to?  I know of
> at least one list member that has an Accelent PXA IDP besides
> myself...

That's me.

However, my JTAG cable is still not working correctly, I don't get a 
reliable JTAG-ID out of the PXA, so I can't jump in right now.

Greetings,
Holger

-- 
MN-Logistik GmbH         http://www.mn-logistik.de
Holger Schurig           Network Administrator
Dieselstr. 18
61191 Rosbach v.d.Höhe
Tel: 06003/9141-0        Fax: 06003/9141-49

CVS: blob/include/blob/arch badge4.h,1.10,1.11

[Christopher H. <ch...@us...>]

Update of /cvsroot/blob/blob/include/blob/arch
In directory usw-pr-cvs1:/tmp/cvs-serv4024

Modified Files:
	badge4.h 
Log Message:
cannot use GPIO_GPIOx defined for LED_GPIO

Index: badge4.h
===================================================================
RCS file: /cvsroot/blob/blob/include/blob/arch/badge4.h,v
retrieving revision 1.10
retrieving revision 1.11
diff -u -d -r1.10 -r1.11
--- badge4.h	25 Jul 2002 21:54:36 -0000	1.10
+++ badge4.h	26 Jul 2002 07:20:04 -0000	1.11
@@ -80,7 +80,7 @@
 #define TERMINAL_SPEED baud_115200
 
 /* GPIO for the LED */
-#define LED_GPIO		GPIO_GPIO9  /* aka BADGE4_GPIO_LGP9 */
+#define LED_GPIO		(1<<9)  /* GPIO_GPIO9/BADGE4_GPIO_LGP9 */
 
 #define SA1111_BASE		BADGE4_SA1111_BASE
 

CVS: blob/include/blob memsetup.h,1.9,1.10

[Christopher H. <ch...@us...>]

Update of /cvsroot/blob/blob/include/blob
In directory usw-pr-cvs1:/tmp/cvs-serv3677

Modified Files:
	memsetup.h 
Log Message:
revert to 1.8

Index: memsetup.h
===================================================================
RCS file: /cvsroot/blob/blob/include/blob/memsetup.h,v
retrieving revision 1.9
retrieving revision 1.10
diff -u -d -r1.9 -r1.10
--- memsetup.h	25 Jul 2002 17:30:34 -0000	1.9
+++ memsetup.h	26 Jul 2002 07:18:37 -0000	1.10
@@ -36,19 +36,19 @@
  *  Memory Config Register Indices
  *  based on 0xA0000000
  */
-#define	_MDCNFG	0x0
-#define _MDCAS00	0x04
-#define _MDCAS01	0x08
-#define _MDCAS02	0x0c
-#define _MCS0	0x10
-#define _MCS1	0x14
-#define	_MECR	0x18
-#define _MDREFR	0x1C
-#define _MDCAS20	0x20
-#define _MDCAS21	0x24
-#define _MDCAS22	0x28
-#define _MCS2	0x2C
-#define	_SMCNFG	0x30
+#define	MDCNFG	0x0
+#define MDCAS00	0x04
+#define MDCAS01	0x08
+#define MDCAS02	0x0c
+#define MCS0	0x10
+#define MCS1	0x14
+#define	MECR	0x18
+#define MDREFR	0x1C
+#define MDCAS20	0x20
+#define MDCAS21	0x24
+#define MDCAS22	0x28
+#define MCS2	0x2C
+#define	SMCNFG	0x30
 
 /**********************************************************************
  *  MDCNFG masks

CVS: blob/include/blob sa1100.h,1.3,1.4 bitfield.h,1.1,NONE

[Christopher H. <ch...@us...>]

Update of /cvsroot/blob/blob/include/blob
In directory usw-pr-cvs1:/tmp/cvs-serv3264

Modified Files:
	sa1100.h 
Removed Files:
	bitfield.h 
Log Message:
revert to 1.2

Index: sa1100.h
===================================================================
RCS file: /cvsroot/blob/blob/include/blob/sa1100.h,v
retrieving revision 1.3
retrieving revision 1.4
diff -u -d -r1.3 -r1.4
--- sa1100.h	25 Jul 2002 17:30:01 -0000	1.3
+++ sa1100.h	26 Jul 2002 07:17:01 -0000	1.4
@@ -1,6 +1,5 @@
 /*
- * sa1100.h: Defines and macros for accessing the SA1100. Created from
- * the kernel source.
+ * sa1100.h: wrapper file to include asm/arch-sa1100/SA-1100.h
  *
  * Copyright (C) 2001  Erik Mouw (J.A...@it...)
  *
@@ -25,1860 +24,11 @@
 #ifndef BLOB_SA1100_H
 #define BLOB_SA1100_H
 
[...1842 lines suppressed...]
-#define LCCR3_OutEnL	(LCCR3_OEP*1)	/*  Output Enable active Low       */
-
-#define CPU_REVISION	(processor_id & 15)
-#define CPU_SA1110_A0	(0)
-#define CPU_SA1110_B0	(4)
-#define CPU_SA1110_B1	(5)
-#define CPU_SA1110_B2	(6)
-#define CPU_SA1110_B4	(8)
+#define io_p2v(x) (x)
+#define __REG(x)      (*((volatile u32 *)io_p2v(x)))
 
-#define CPU_SA1100_ID	(0x4401a110)
-#define CPU_SA1100_MASK	(0xfffffff0)
-#define CPU_SA1110_ID	(0x6901b110)
-#define CPU_SA1110_MASK	(0xfffffff0)
+/* Tell SA-1100.h to shut up; we're including it anyway. Nyah nyah ;-) */
+#define __ASM_ARCH_HARDWARE_H
+#include <asm-arm/arch-sa1100/SA-1100.h>
 
 #endif

--- bitfield.h DELETED ---

CVS: blob/src/blob ledasm.S,1.4,1.5

[Christopher H. <ch...@us...>]

Update of /cvsroot/blob/blob/src/blob
In directory usw-pr-cvs1:/tmp/cvs-serv32023

Modified Files:
	ledasm.S 
Log Message:
revert to 1.3

Index: ledasm.S
===================================================================
RCS file: /cvsroot/blob/blob/src/blob/ledasm.S,v
retrieving revision 1.4
retrieving revision 1.5
diff -u -d -r1.4 -r1.5
--- ledasm.S	25 Jul 2002 17:24:36 -0000	1.4
+++ ledasm.S	26 Jul 2002 07:01:01 -0000	1.5
@@ -33,15 +33,16 @@
 #endif
 
 #include <blob/arch.h>
-#include <blob/sa1100.h>
+
+
 
 .text
 
 LED:		.long LED_GPIO
 GPIO_BASE:	.long 0x90040000
-#define	_GPDR	0x00000004
-#define _GPSR	0x00000008
-#define _GPCR	0x0000000c
+#define	GPDR	0x00000004
+#define GPSR	0x00000008
+#define GPCR	0x0000000c
 
 
 
@@ -53,8 +54,8 @@
 ledinit:
 	ldr	r0, GPIO_BASE
 	ldr	r1, LED
-	str	r1, [r0, #_GPDR]		/* LED GPIO is output */
-	str	r1, [r0, #_GPSR]		/* turn LED on */
+	str	r1, [r0, #GPDR]		/* LED GPIO is output */
+	str	r1, [r0, #GPSR]		/* turn LED on */
 	mov	pc, lr
 
 
@@ -65,7 +66,7 @@
 led_on:
 	ldr	r0, GPIO_BASE
 	ldr	r1, LED
-	str	r1, [r0, #_GPSR]
+	str	r1, [r0, #GPSR]
 	mov	pc, lr
 
 
@@ -76,7 +77,7 @@
 led_off:
 	ldr	r0, GPIO_BASE
 	ldr	r1, LED
-	str	r1, [r0, #_GPCR]
+	str	r1, [r0, #GPCR]
 	mov	pc, lr
 
 

Re: CVS: blob/src/blob ledasm.S,1.3,1.4

[Erik M. <J.A...@it...>]

On Thu, Jul 25, 2002 at 04:56:44PM -0700, Christopher Hoover wrote:
> 
> If you configure and compile for badge4, you'll find that including
> sa1100.h in ledasm.S is necessary as badge4.h defines LED_GPIO as
> GPIO_GPIOxx.  That seems more perspicuous than a hex constant or even an
> expression (1<<x).

See my previous message. IMHO the advantage of cleaner code outweighs
the disadvantage of having to use 1<<x.

> But this isn't important and isn't the real reason I made those changes
> -- 
> 
> I've got some additional assembly that I haven't checked in that depends
> on sa1100.h.

What kind of additional assembly needs to be in the first stage loader?
Unless it does some very creepy things with memory banks, it can be
easily put in the platform specific C files.

The first stage loader is one of the hardest parts of blob *because*
it's written in assembly. I did my utmost to get most of the platform
dependencies out of the first stage loader into the second stage
loader. The second stage loader is easier to understand because it's
written in C.

> Using that header is cleaner than continually duplicating
> register bases and offsets already defined in sa1100.h.

The main problem of SA-1100.h is that it doesn't use offsets. Therefore
it's useless for assembly (see my previous message).

> Or is it just the _ prefix you don't like?

I don't like changes to fragile parts of the code, unless there is a
very good reason for it. So far I haven't seen that reason.


Erik
[who goes zzz right now]

-- 
J.A.K. (Erik) Mouw
Email: J.A...@it...
WWW: http://www-ict.its.tudelft.nl/~erik/

Re: CVS: blob/include/blob sa1100.h,1.2,1.3

[Erik M. <J.A...@it...>]

On Thu, Jul 25, 2002 at 10:30:03AM -0700, Christopher Hoover wrote:
> Update of /cvsroot/blob/blob/include/blob
> In directory usw-pr-cvs1:/tmp/cvs-serv26723
> 
> Modified Files:
> 	sa1100.h 
> Log Message:

> our own sa1100.h (created from linux-2.5.26-rmk1); safe to include in
> assembly now (define __ASSEMBLY__); does not conflict with memsetup.h

No. The memsetup.h argument doesn't hold, sa1100.h and memsetup.h were
never meant to be used together. memsetup.h was written for
memsetup-sa1110.S with the idea in mind that a cleaned up version of
memsetup-sa1100.S could use the same include file. In retrospect
memsetup.h should have been named memsetup-sa11x0.h.

We don't even need sa1100.h in assembly. The Digital people thought
it would be cool to be able to use the same include file in C and
assembly, but they were plain wrong. You don't *want* C includes in
assembly simply because assembly has a programming style that
completely differs from C.

SA-1100.h defines MDCNFG & friends as absolute values, but the assembly
memsetup code needs offsets relative to the memory controller base
register so we have to define it ourselves anyway. If we use MDCNFG
defined as in SA-1100.h, we need lots of code to reach exactly the same
goal and we loose a lot in clarity and readability:

        /* Set up the SDRAM */
        ldr     r0, MEM_REG_BASE
        adr     r1, MEMORY_CONFIG

        ldr     r2, [r1, #MDCNFG ]
        str     r2, [r0, #MDCNFG ]

        ldr     r2, [r1, #MDCAS00 ]
        str     r2, [r0, #MDCAS00 ]

Would become:

        /* Set up the SDRAM */
	adr	r1, MEMORY_CONFIG

	ldr	r0, MDCNFG
	ldr	r2, [r1, 0x00]
	str	r2, [r0]

	ldr	r0, MDCAS0
	ldr	r2, [r1, 0x04]
	STR	r2, [r0]

I'd rather see the elegancy of the first version; having a specially
edited sa1100.h makes things worse.


Now about the kernel include file problem:

Yes, we have problems with changing include files in the kernel, but
I'd rather solve this problem the Right Way [tm]. Stefan, Russ, and I
have discussed this a while ago on IRC, and the way to solve this issue
goes like this: take a set of include files from a stable kernel
version (2.4.18-rmk7 or so, not a moving target like 2.5.x), put those
include files into the blob source tree and stay with that. Don't put
the kernel include files in include/ , but in linux-include/ . Normal
users get the known stable kernel headers from linux-include/ , but the
hackers among us can still override that with the --with-linux-prefix
configure flag. Using unmodified kernel headers has other advantages:
reduced chance on errors due to editing, and drop-in updates. All this
boils down to the same thing: better long term maintainability.

Please back out your patches, they try to solve a non-existent problem.


Erik

PS: the #blob IRC channel moved from OPN to OFTC. See www.oftc.net for
  an IRC server near you, or just point your IRC client to irc.oftc.net.

-- 
J.A.K. (Erik) Mouw
Email: J.A...@it...
WWW: http://www-ict.its.tudelft.nl/~erik/

RE: CVS: blob/src/blob ledasm.S,1.3,1.4

[Christopher H. <ch...@mu...>]

If you configure and compile for badge4, you'll find that including
sa1100.h in ledasm.S is necessary as badge4.h defines LED_GPIO as
GPIO_GPIOxx.  That seems more perspicuous than a hex constant or even an
expression (1<<x).

But this isn't important and isn't the real reason I made those changes
-- 

I've got some additional assembly that I haven't checked in that depends
on sa1100.h.  Using that header is cleaner than continually duplicating
register bases and offsets already defined in sa1100.h.

Or is it just the _ prefix you don't like?

-ch

> -----Original Message-----
> From: blo...@li... 
> [mailto:blo...@li...] On 
> Behalf Of Erik Mouw
> Sent: Thursday, July 25, 2002 4:27 PM
> To: Christopher Hoover
> Cc: blo...@li...
> Subject: Re: CVS: blob/src/blob ledasm.S,1.3,1.4
> 
> 
> On Thu, Jul 25, 2002 at 10:24:38AM -0700, Christopher Hoover wrote:
> > Update of /cvsroot/blob/blob/src/blob
> > In directory usw-pr-cvs1:/tmp/cvs-serv24870
> > 
> > Modified Files:
> > 	ledasm.S
> > Log Message:
> > prefix register offsets with _ so as to not conflict with 
> sa1100.h defines
> > 
> > Index: ledasm.S 
> > ===================================================================
> > RCS file: /cvsroot/blob/blob/src/blob/ledasm.S,v
> > retrieving revision 1.3
> > retrieving revision 1.4
> > diff -u -d -r1.3 -r1.4
> > --- ledasm.S	28 Oct 2001 20:29:05 -0000	1.3
> > +++ ledasm.S	25 Jul 2002 17:24:36 -0000	1.4
> > @@ -33,16 +33,15 @@
> >  #endif
> >  
> >  #include <blob/arch.h>
> > -
> > -
> > +#include <blob/sa1100.h>
>    ^^^^^^^^^^^^^^^^^^^^^^^^
> Unnecessary include.
> 
> >  .text
> >  
> >  LED:		.long LED_GPIO
> >  GPIO_BASE:	.long 0x90040000
> > -#define	GPDR	0x00000004
> > +#define	_GPDR	0x00000004
> 
> Unnecessary cosmetical difference.
> 
> It already helps a *lot* when you don't include blob/sa1100.h 
> in the first place. We don't need it in assembly, I'd rather 
> keep the stuff readable instead of having unnecessary 
> underscores before every identifier. Please back out this 
> patch (same for all the other .S patches).
> 
> 
> Erik
> 
> -- 
> J.A.K. (Erik) Mouw
> Email: J.A...@it...
> WWW: http://www-ict.its.tudelft.nl/~erik/
> 
> 
> -------------------------------------------------------
> This sf.net email is sponsored by: Jabber - The world's 
> fastest growing 
> real-time communications platform! Don't just IM. Build it in! 
> http://www.jabber.com/osdn/xim 
> _______________________________________________
> blob-cvs-commit mailing list blo...@li...
> https://lists.sourceforge.net/lists/listinfo/blob-cvs-commit
> 

Re: CVS: blob/src/blob ledasm.S,1.3,1.4

[Erik M. <J.A...@it...>]

On Thu, Jul 25, 2002 at 10:24:38AM -0700, Christopher Hoover wrote:
> Update of /cvsroot/blob/blob/src/blob
> In directory usw-pr-cvs1:/tmp/cvs-serv24870
> 
> Modified Files:
> 	ledasm.S 
> Log Message:
> prefix register offsets with _ so as to not conflict with sa1100.h defines
> 
> Index: ledasm.S
> ===================================================================
> RCS file: /cvsroot/blob/blob/src/blob/ledasm.S,v
> retrieving revision 1.3
> retrieving revision 1.4
> diff -u -d -r1.3 -r1.4
> --- ledasm.S	28 Oct 2001 20:29:05 -0000	1.3
> +++ ledasm.S	25 Jul 2002 17:24:36 -0000	1.4
> @@ -33,16 +33,15 @@
>  #endif
>  
>  #include <blob/arch.h>
> -
> -
> +#include <blob/sa1100.h>
   ^^^^^^^^^^^^^^^^^^^^^^^^
Unnecessary include.

>  .text
>  
>  LED:		.long LED_GPIO
>  GPIO_BASE:	.long 0x90040000
> -#define	GPDR	0x00000004
> +#define	_GPDR	0x00000004

Unnecessary cosmetical difference.

It already helps a *lot* when you don't include blob/sa1100.h in the
first place. We don't need it in assembly, I'd rather keep the stuff
readable instead of having unnecessary underscores before every
identifier. Please back out this patch (same for all the other .S
patches).


Erik

-- 
J.A.K. (Erik) Mouw
Email: J.A...@it...
WWW: http://www-ict.its.tudelft.nl/~erik/

CVS: blob/include/blob/arch badge4.h,1.9,1.10

[Christopher H. <ch...@us...>]

Update of /cvsroot/blob/blob/include/blob/arch
In directory usw-pr-cvs1:/tmp/cvs-serv14002/include/blob/arch

Modified Files:
	badge4.h 
Log Message:
remove unused define

Index: badge4.h
===================================================================
RCS file: /cvsroot/blob/blob/include/blob/arch/badge4.h,v
retrieving revision 1.9
retrieving revision 1.10
diff -u -d -r1.9 -r1.10
--- badge4.h	25 Jul 2002 17:32:40 -0000	1.9
+++ badge4.h	25 Jul 2002 21:54:36 -0000	1.10
@@ -82,9 +82,6 @@
 /* GPIO for the LED */
 #define LED_GPIO		GPIO_GPIO9  /* aka BADGE4_GPIO_LGP9 */
 
-/* GPIO for wakeup */
-#define WAKEUP_GPIO		BADGE4_GPIO_TESTPT_J7 /* aka GPIO_GPIO16 */
-
 #define SA1111_BASE		BADGE4_SA1111_BASE
 
 /* the base address were BLOB is loaded by the first stage loader */

CVS: blob/include/blob sa1111.h,1.6,1.7

[Christopher H. <ch...@us...>]

Update of /cvsroot/blob/blob/include/blob
In directory usw-pr-cvs1:/tmp/cvs-serv27982/include/blob

Modified Files:
	sa1111.h 
Log Message:
use our own bitfield.h

Index: sa1111.h
===================================================================
RCS file: /cvsroot/blob/blob/include/blob/sa1111.h,v
retrieving revision 1.6
retrieving revision 1.7
diff -u -d -r1.6 -r1.7
--- sa1111.h	29 Apr 2002 09:37:11 -0000	1.6
+++ sa1111.h	25 Jul 2002 17:33:35 -0000	1.7
@@ -29,6 +29,8 @@
 
 #include <blob/arch.h>
 
+#include <blob/bitfield.h>
+
 #define SA1111_VBASE	0x40000000
 
 /*

CVS: blob/include/blob bitfield.h,NONE,1.1

[Christopher H. <ch...@us...>]

Update of /cvsroot/blob/blob/include/blob
In directory usw-pr-cvs1:/tmp/cvs-serv27906/include/blob

Added Files:
	bitfield.h 
Log Message:
bitfield.h from the kernel sources

--- NEW FILE: bitfield.h ---
/* From the kernel sources. */

/*
 *	FILE    	bitfield.h
 *
 *	Version 	1.1
 *	Author  	Copyright (c) Marc A. Viredaz, 1998
 *	        	DEC Western Research Laboratory, Palo Alto, CA
 *	Date    	April 1998 (April 1997)
 *	System  	Advanced RISC Machine (ARM)
 *	Language	C or ARM Assembly
 *	Purpose 	Definition of macros to operate on bit fields.
 */



#ifndef __BITFIELD_H
#define __BITFIELD_H

#ifndef __ASSEMBLY__
#define UData(Data)	((unsigned long) (Data))
#else
#define UData(Data)	(Data)
#endif


/*
 * MACRO: Fld
 *
 * Purpose
 *    The macro "Fld" encodes a bit field, given its size and its shift value
 *    with respect to bit 0.
 *
 * Note
 *    A more intuitive way to encode bit fields would have been to use their
 *    mask. However, extracting size and shift value information from a bit
 *    field's mask is cumbersome and might break the assembler (255-character
 *    line-size limit).
 *
 * Input
 *    Size      	Size of the bit field, in number of bits.
 *    Shft      	Shift value of the bit field with respect to bit 0.
 *
 * Output
 *    Fld       	Encoded bit field.
 */

#define Fld(Size, Shft)	(((Size) << 16) + (Shft))


/*
 * MACROS: FSize, FShft, FMsk, FAlnMsk, F1stBit
 *
 * Purpose
 *    The macros "FSize", "FShft", "FMsk", "FAlnMsk", and "F1stBit" return
 *    the size, shift value, mask, aligned mask, and first bit of a
 *    bit field.
 *
 * Input
 *    Field     	Encoded bit field (using the macro "Fld").
 *
 * Output
 *    FSize     	Size of the bit field, in number of bits.
 *    FShft     	Shift value of the bit field with respect to bit 0.
 *    FMsk      	Mask for the bit field.
 *    FAlnMsk   	Mask for the bit field, aligned on bit 0.
 *    F1stBit   	First bit of the bit field.
 */

#define FSize(Field)	((Field) >> 16)
#define FShft(Field)	((Field) & 0x0000FFFF)
#define FMsk(Field)	(((UData (1) << FSize (Field)) - 1) << FShft (Field))
#define FAlnMsk(Field)	((UData (1) << FSize (Field)) - 1)
#define F1stBit(Field)	(UData (1) << FShft (Field))


/*
 * MACRO: FInsrt
 *
 * Purpose
 *    The macro "FInsrt" inserts a value into a bit field by shifting the
 *    former appropriately.
 *
 * Input
 *    Value     	Bit-field value.
 *    Field     	Encoded bit field (using the macro "Fld").
 *
 * Output
 *    FInsrt    	Bit-field value positioned appropriately.
 */

#define FInsrt(Value, Field) \
                	(UData (Value) << FShft (Field))


/*
 * MACRO: FExtr
 *
 * Purpose
 *    The macro "FExtr" extracts the value of a bit field by masking and
 *    shifting it appropriately.
 *
 * Input
 *    Data      	Data containing the bit-field to be extracted.
 *    Field     	Encoded bit field (using the macro "Fld").
 *
 * Output
 *    FExtr     	Bit-field value.
 */

#define FExtr(Data, Field) \
                	((UData (Data) >> FShft (Field)) & FAlnMsk (Field))


#endif /* __BITFIELD_H */

CVS: blob/include/blob/arch badge4.h,1.8,1.9

[Christopher H. <ch...@us...>]

Update of /cvsroot/blob/blob/include/blob/arch
In directory usw-pr-cvs1:/tmp/cvs-serv27649/arch

Modified Files:
	badge4.h 
Log Message:
additional gpio defines

Index: badge4.h
===================================================================
RCS file: /cvsroot/blob/blob/include/blob/arch/badge4.h,v
retrieving revision 1.8
retrieving revision 1.9
diff -u -d -r1.8 -r1.9
--- badge4.h	13 Jul 2002 00:44:34 -0000	1.8
+++ badge4.h	25 Jul 2002 17:32:40 -0000	1.9
@@ -31,18 +31,47 @@
 
 /* GPIOs on the BadgePAD 4 */
 #define BADGE4_GPIO_INT_1111		GPIO_GPIO0   /* SA-1111 IRQ */
+
+#define BADGE4_GPIO_INT_VID		GPIO_GPIO1   /* Video expansion */
+#define BADGE4_GPIO_LGP2		GPIO_GPIO2   /* GPIO_LDD8 */
+#define BADGE4_GPIO_LGP3		GPIO_GPIO3   /* GPIO_LDD9 */
+#define BADGE4_GPIO_LGP4		GPIO_GPIO4   /* GPIO_LDD10 */
+#define BADGE4_GPIO_LGP5		GPIO_GPIO5   /* GPIO_LDD11 */
+#define BADGE4_GPIO_LGP6		GPIO_GPIO6   /* GPIO_LDD12 */
+#define BADGE4_GPIO_LGP7		GPIO_GPIO7   /* GPIO_LDD13 */
+#define BADGE4_GPIO_LGP8		GPIO_GPIO8   /* GPIO_LDD14 */
+#define BADGE4_GPIO_LGP9		GPIO_GPIO9   /* GPIO_LDD15 */
+#define BADGE4_GPIO_GPA_VID		GPIO_GPIO10  /* Video expansion */
+#define BADGE4_GPIO_GPB_VID		GPIO_GPIO11  /* Video expansion */
+#define BADGE4_GPIO_GPC_VID		GPIO_GPIO12  /* Video expansion */
+
+#define BADGE4_GPIO_UART_HS1		GPIO_GPIO13
+#define BADGE4_GPIO_UART_HS2		GPIO_GPIO14
+
+#define BADGE4_GPIO_MUXSEL0		GPIO_GPIO15
+#define BADGE4_GPIO_TESTPT_J7		GPIO_GPIO16
+
 #define BADGE4_GPIO_SDSDA		GPIO_GPIO17  /* SDRAM SPD Data */
 #define BADGE4_GPIO_SDSCL		GPIO_GPIO18  /* SDRAM SPD Clock */
 #define BADGE4_GPIO_SDTYP0		GPIO_GPIO19  /* SDRAM Type Control */
 #define BADGE4_GPIO_SDTYP1		GPIO_GPIO20  /* SDRAM Type Control */
+
+#define BADGE4_GPIO_BGNT_1111		GPIO_GPIO21  /* GPIO_MBGNT */
+#define BADGE4_GPIO_BREQ_1111		GPIO_GPIO22  /* GPIO_TREQA */
+
+#define BADGE4_GPIO_TESTPT_J6		GPIO_GPIO23
+
 #define BADGE4_GPIO_PCMEN5V		GPIO_GPIO24  /* 5V power */
+
 #define BADGE4_GPIO_SA1111_NRST		GPIO_GPIO25  /* SA-1111 nRESET */
+
+#define BADGE4_GPIO_TESTPT_J5		GPIO_GPIO26
+
 #define BADGE4_GPIO_CLK_1111		GPIO_GPIO27  /* GPIO_32_768kHz */
 
 /* Interrupts on the BadgePAD 4 */
 #define BADGE4_IRQ_GPIO_SA1111		IRQ_GPIO0    /* SA-1111 interrupt */
 
-
 /* boot CPU speed */
 #define CPU_SPEED		CPU_CORE_SPEED_206mhz
 
@@ -51,7 +80,10 @@
 #define TERMINAL_SPEED baud_115200
 
 /* GPIO for the LED */
-#define LED_GPIO		(0x00000001<<9) /* GPIO 9 */
+#define LED_GPIO		GPIO_GPIO9  /* aka BADGE4_GPIO_LGP9 */
+
+/* GPIO for wakeup */
+#define WAKEUP_GPIO		BADGE4_GPIO_TESTPT_J7 /* aka GPIO_GPIO16 */
 
 #define SA1111_BASE		BADGE4_SA1111_BASE
 
@@ -59,10 +91,10 @@
 #define BLOB_ABS_BASE_ADDR	(0x08000400)  /* sram */
 
 /* where do various parts live in RAM */
-#define BLOB_RAM_BASE		(0XC0100000)
-#define KERNEL_RAM_BASE		(0xC0008000)
-#define PARAM_RAM_BASE		(0XC0110000)
-#define RAMDISK_RAM_BASE	(0xC0600000)
+#define BLOB_RAM_BASE		(0xc0100000)
+#define KERNEL_RAM_BASE		(0xc0008000)
+#define PARAM_RAM_BASE		(0xc0110000)
+#define RAMDISK_RAM_BASE	(0xc0600000)
 
 /* and where do they live in flash */
 #define BLOB_FLASH_BASE		(0x00000000)
@@ -117,20 +149,21 @@
 #define BADGE4_MSC2 (BADGE4_CS4 | (BADGE4_CS5<<16)) /* was: 0xfff90000 */
 
 
-#ifdef BLOB_NEED_MEMCONFIG
-#	define MDCNFG_VALUE	BADGE4_MDCNFG		/* 0x0  MDCNFG */
-#	define MDCAS00_VALUE	0xAAAAAAA7		/* 0x04 MDCAS00 */
-#	define MDCAS01_VALUE	0xAAAAAAAA		/* 0x08 MDCAS01 */
-#	define MDCAS02_VALUE	0xAAAAAAAA		/* 0x0c MDCAS02 */
-#	define MSC0_VALUE	BADGE4_MSC0		/* 0x10 MSC0 */
-#	define MSC1_VALUE	BADGE4_MSC1		/* 0x14 MSC1 */
-#	define MECR_VALUE	0x994a994a		/* 0x18 MECR */
-#	define MDREFR_VALUE	DO_NOT_USE_THIS_VALUE__GETS_AUTOMAGICALLY_COMPUTED
-#	define MDCAS20_VALUE	0xAAAAAA7F		/* 0x20 MDCAS20 */
-#	define MDCAS21_VALUE	0xAAAAAAAA		/* 0x24 MDCAS21 */
-#	define MDCAS22_VALUE	0xAAAAAAAA		/* 0x28 MDCAS22 */
-#	define MSC2_VALUE	BADGE4_MSC2		/* 0x2C MSC2 */
-#	define SMCNFG_VALUE	0x00000000		/* 0x30 SMCNFG */
-#endif
+#define MDCNFG_VALUE	BADGE4_MDCNFG		/* 0x0  MDCNFG */
+#define MDCAS00_VALUE	0xAAAAAAA7		/* 0x04 MDCAS00 */
+#define MDCAS01_VALUE	0xAAAAAAAA		/* 0x08 MDCAS01 */
+#define MDCAS02_VALUE	0xAAAAAAAA		/* 0x0c MDCAS02 */
+#define MSC0_VALUE	BADGE4_MSC0		/* 0x10 MSC0 */
+#define MSC1_VALUE	BADGE4_MSC1		/* 0x14 MSC1 */
+#define MECR_VALUE	0x994a994a		/* 0x18 MECR */
+#define MDREFR_VALUE	DO_NOT_USE_THIS_VALUE__GETS_AUTOMAGICALLY_COMPUTED
+#define MDCAS20_VALUE	0xAAAAAA7F		/* 0x20 MDCAS20 */
+#define MDCAS21_VALUE	0xAAAAAAAA		/* 0x24 MDCAS21 */
+#define MDCAS22_VALUE	0xAAAAAAAA		/* 0x28 MDCAS22 */
+#define MSC2_VALUE	BADGE4_MSC2		/* 0x2C MSC2 */
+#define SMCNFG_VALUE	0x00000000		/* 0x30 SMCNFG */
+
+//#define ARCH_SPECIFIC_MEMSETUP	     /* we do our own thing */
+//#define ARCH_SPECIFIC_MEMSETUP_STD   /* we also use the standard thing */
 
 #endif

CVS: blob/include/blob memsetup.h,1.8,1.9

[Christopher H. <ch...@us...>]

Update of /cvsroot/blob/blob/include/blob
In directory usw-pr-cvs1:/tmp/cvs-serv26927

Modified Files:
	memsetup.h 
Log Message:
prefix register offsets with _ so as to not conflict with sa1100.h defines

Index: memsetup.h
===================================================================
RCS file: /cvsroot/blob/blob/include/blob/memsetup.h,v
retrieving revision 1.8
retrieving revision 1.9
diff -u -d -r1.8 -r1.9
--- memsetup.h	23 Apr 2002 12:26:43 -0000	1.8
+++ memsetup.h	25 Jul 2002 17:30:34 -0000	1.9
@@ -36,19 +36,19 @@
  *  Memory Config Register Indices
  *  based on 0xA0000000
  */
-#define	MDCNFG	0x0
-#define MDCAS00	0x04
-#define MDCAS01	0x08
-#define MDCAS02	0x0c
-#define MCS0	0x10
-#define MCS1	0x14
-#define	MECR	0x18
-#define MDREFR	0x1C
-#define MDCAS20	0x20
-#define MDCAS21	0x24
-#define MDCAS22	0x28
-#define MCS2	0x2C
-#define	SMCNFG	0x30
+#define	_MDCNFG	0x0
+#define _MDCAS00	0x04
+#define _MDCAS01	0x08
+#define _MDCAS02	0x0c
+#define _MCS0	0x10
+#define _MCS1	0x14
+#define	_MECR	0x18
+#define _MDREFR	0x1C
+#define _MDCAS20	0x20
+#define _MDCAS21	0x24
+#define _MDCAS22	0x28
+#define _MCS2	0x2C
+#define	_SMCNFG	0x30
 
 /**********************************************************************
  *  MDCNFG masks