#27 BUG. NAND FLASH with OOB size 128 byte

[q2l]

Hello.
I'm developer of custom BF527 board. On my board I have NAND FLASH

NAND device: Manufacturer ID: 0x01, Chip ID: 0xdc (AMD/Spansion S34ML04G2), 512MiB, page size: 2048, OOB size: 128

I build BUILDROOT project
blackfin-buildroot-2014R1-RC1
kernel 3.10.10
toolchain 2012RC1

Kernel boot succesful. But when FS mounting I have some error, like this

bf5xx-nand bf5xx-nand.0: calced[0x002f75ee], stored[0x00ffffff]
bf5xx-nand bf5xx-nand.0: More than 1-bit error, non-correctable error.
bf5xx-nand bf5xx-nand.0: Please discard data, mark bad block
bf5xx-nand bf5xx-nand.0: syndrome[0] 0x00d854f5
bf5xx-nand bf5xx-nand.0: syndrome[1] 0x000004f5
bf5xx-nand bf5xx-nand.0: syndrome[2] 0x000007ff
bf5xx-nand bf5xx-nand.0: syndrome[3] 0x00000000
bf5xx-nand bf5xx-nand.0: syndrome[4] 0x000007ff

I'm add some debug message in
/blackfin-buildroot/linux/linux-kernel/drivers/mtd/nand/nand_base.c

and evaluate that for this NAND FLASH actual ECC schem like OOB size 64 byte.

After this patch all right

--- nand_base.c 2015-06-11 15:38:13.963430095 +0300
+++ nand_base.c 2015-06-11 15:38:04.255403175 +0300
@@ -3435,7 +3435,7 @@
chip->ecc.layout = &nand_oob_64;
break;
case 128:
- chip->ecc.layout = &nand_oob_64;
+ chip->ecc.layout = &nand_oob_128;
break;
default:
pr_warn("No oob scheme defined for oobsize %d\n",