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[#7822] spi bug: multiple chip selects activated in mode 0
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Submitted By: Mike Sinkovsky
Open Date
2013-07-02 14:41:00
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Details: (Edit)
If SPI device configured in mode 0 and hardware (not PIO) chip select mode - this chip select is set active on each transfer to each other device.
From BF533 datasheet:
"If CPHA =0, the SPI hardware sets the output value and the FLGx
bits are ignored. The SPI protocol requires that the slave select be
deasserted between transferred words. In this case, the SPI hard-
ware controls the pins."
So in this mode driver must manipulate not FLGx bit, but FLSx bit.
Patch attached, for me it fixes this issue.
Follow-ups
--- Mike Sinkovsky 2013-07-02 16:21:03
diff --git a/drivers/spi/spi-bfin5xx.c b/drivers/spi/spi-bfin5xx.c
index 9bb4d4a..c765fbf 100644
--- a/drivers/spi/spi-bfin5xx.c
+++ b/drivers/spi/spi-bfin5xx.c
@@ -164,7 +164,7 @@ static int bfin_spi_flush(struct bfin_spi_master_data
drv_data)
static void bfin_spi_cs_active(struct bfin_spi_master_data drv_data, struct
bfin_spi_slave_data *chip)
{
if (likely(chip->chip_select_num < MAX_CTRL_CS))
@@ -186,15 +186,11 @@ static void bfin_spi_cs_deactive(struct
bfin_spi_master_data drv_data,
static inline void bfin_spi_cs_enable(struct bfin_spi_master_data drv_data,
struct bfin_spi_slave_data *chip)
{
static inline void bfin_spi_cs_disable(struct bfin_spi_master_data drv_data,
struct bfin_spi_slave_data chip)
{
/ stop controller and re-config current chip/
--- Scott Jiang 2013-07-02 17:13:41
Please read Documentation/blackfin/bfin-spi-notes.txt.
--- Mike Sinkovsky 2013-07-03 01:48:04
I've seen it, of course - but our hardware needs precisely this mode - mode 0
with hardware chip selects. With this patch it works in all modes, including
this.
But if you don't want this in mainline - ok, we can maintain as our local
patch.