Open Source VHDL/Verilog Video Software
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VHDL/Verilog Video Software
View 215 business solutionsBrowse free open source VHDL/Verilog Video Software and projects below. Use the toggles on the left to filter open source VHDL/Verilog Video Software by OS, license, language, programming language, and project status.
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This is the award-winning FALCON I object recognition system! Capable of tracking up to 12 different objects simultaneously, and with over 6 times the raw resolution of the CMUCam, this is one of the most powerful vision systems in its class.
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Genode FX is a composition of hardware and software components that enable the creation of fully fledged graphical user interfaces as system-on-chip solutions using commodity FPGAs such as Xilinx' Spartan3 and Virtex FPGAs.
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The H.264 VHDL core is a hardware implementation of the H.264 video compression algorithm. The core accepts up to the highest resolution HDTV video stream as input and outputs the encoded bitstream. Simple, fully synchronous design with low gate count.
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This is an image coder with fixed sampling, at a rate of up to 24 images per second (on XC2V1000-4 @ 40 MHz with res. up to 352x288).
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AI-based, Comprehensive Service Management for Businesses and IT ProvidersChangeGear provides IT staff with the functions required to manage everything from ticketing to incident, change and asset management and more. ChangeGear includes a virtual agent, self-service portals and AI-based features to support analyst and end user productivity.
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This card will capture High Definition Video 1280x720 at 30fps, and soon be capable of 60fps and maybe even 1080p. This is a hardware project so source code, RTL, and board CAD files will be involved. All IC's and parts should be easily available.
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An FPGA based system, using captured video as source of a basketball movement. Human movement is detected and translated into motion vectors to hit a virtual ball.
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This is a fork of the Elphel cameras firmware CVS, fully open to contributions from the elphel users and developers community Everyone can submit patches or obtain CVS access for this fork Stable changes will be ported to the main CVS upon approv
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A hardware H.264 video encoder written in VHDL suited to non-interlaced IP cameras and megapixel cameras. Designed to be synthesized into an FPGA or ASIC. Fast and small. Modular. Extensible.
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