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hardh264

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Description

A hardware H.264 video encoder written in VHDL suited to non-interlaced IP cameras and megapixel cameras. Designed to be synthesized into an FPGA or ASIC. Fast and small. Modular. Extensible.

hardh264 Web Site

Categories

Codec, Realtime Processing

License

BSD License

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Additional Project Details

Intended Audience

Developers

Programming Language

VHDL/Verilog

Registered

2008-06-13

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