Search Results for "gnu compiler codeblocks"

Showing 7 open source projects for "gnu compiler codeblocks"

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  • 1
    GHDL

    GHDL

    VHDL 2008/93/87 simulator

    This directory contains the sources of GHDL, the open-source analyzer, compiler, simulator and (experimental) synthesizer for VHDL, a Hardware Description Language (HDL). GHDL is not an interpreter: it allows you to analyze and elaborate sources for generating machine code from your design. Native program execution is the only way for high-speed simulation. Full support for the 1987, 1993, 2002 versions of the IEEE 1076 VHDL standard, and partial for the 2008 and 2019 revisions. By using a code...
    Downloads: 17 This Week
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  • 2
    Icarus Verilog is an open source Verilog compiler that supports the IEEE-1364 Verilog HDL including IEEE1364-2005 plus extensions.
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    Downloads: 119 This Week
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  • 3
    BlueSVEP

    BlueSVEP

    Bluespec SystemVerilog Eclipse Plugin

    BlueSVEP is an Eclipse-based IDE for Bluespec SystemVerilog, a functional hardware description language based on a synthesizable subset of Haskell and SystemVerilog.
    Downloads: 0 This Week
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  • 4

    OpenShader

    Open architecture GPU simulator and implementation

    Documentation, simulator, compiler, and Verilog implementation of a completely open-architecture graphics processing unit. This design is intended for academic and commercial purposes. The first step is to develop a detailed GPU simulator and compiler. The second step is to implement the GPU in synthesizable Verilog. The third step is to develop a feedback loop between the simulator and implementation, allowing power, performance, and reliability aspects of the hardware to feed back...
    Downloads: 0 This Week
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  • 5

    ASDM-NoC

    Asynchronous Spatial Division Multiplexing Router for On-Chip Networks

    ... testbench provided Languages: * Routers are written in synthesizable SystemVerilog * Test benches are provided by SystemC Software requirements: * The open source Nangate 45nm cell library * Synopsys Design Compiler (Synthesis) * Cadence IUS -- NC Simulator (for SystemC/Verilog co-simulation)
    Downloads: 0 This Week
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  • 6
    vcomp is a verilog compiler for x86 linux targets - it was a commercial product which is now in the process of being GPL'd
    Downloads: 0 This Week
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  • 7
    Picode is the ultimate VHDL picode 16 to 32 bits controller. It is described in only one entity and is implementable in standard FPGAs. It has it own compiler. Picode is designed to take only one or two clock cycle duration per instruction.
    Downloads: 0 This Week
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