Showing 111 open source projects for "drcom-for-linux"

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  • 1
    GHDL

    GHDL

    VHDL 2008/93/87 simulator

    ... generator (LLVM, GCC or, x86_64/i386 only, a built-in one), it is much faster than any interpreted simulator. It can handle very large designs, such as leon3/grlib. GHDL runs on GNU/Linux, Windows and macOS; on x86, x86_64, armv6/armv7/aarch32, aarch64 and ppc64. You can freely download nightly assets, use OCI images (aka Docker/Podman containers), or try building it on your own machine.
    Downloads: 19 This Week
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  • 2
    AWS EC2 FPGA

    AWS EC2 FPGA

    AWS EC2 FPGA hardware and software development Kit

    AWS EC2 FPGA Development Kit is a set of development and runtime tools to develop, simulate, debug, compile and run hardware-accelerated applications on Amazon EC2 F1 instances. It is distributed between this GitHub repository and FPGA Developer AMI - Centos/AL2 provided by AWS with no cost of development tools. After creating an FPGA design (also called CL - Custom logic), developers can create an Amazon FPGA Image (AFI) and easily deploy it to an F1 instance. AFIs are reusable, shareable...
    Downloads: 0 This Week
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  • 3
    Icarus Verilog is an open source Verilog compiler that supports the IEEE-1364 Verilog HDL including IEEE1364-2005 plus extensions.
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    Downloads: 161 This Week
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  • 4
    OCM-PLD Source Code Repository
    MSX++ Official Firmware for the following machines. 1st Gen => 1chipMSX, Zemmix Neo (KR), Zemmix Neo BR, SX-1 and SX-1 Mini/Mini+. 2nd Gen => SM-X and SX-2.
    Downloads: 0 This Week
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  • 5

    Computer From Scratch

    Verilog source files for a basic computer

    This project follows The Elements of Computing fundamentals book, except all the hardware is written in Verilog . This is currently a hobby project, eventually I plan on implementing this onto a FPGA and tinkering with it some more.
    Downloads: 0 This Week
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  • 6
    A new 64-bit RISC platform, complemented by a set of development tools, standards specifications and synthesizable VHDL implementations.
    Downloads: 0 This Week
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  • 7
    Gwyscope

    Gwyscope

    Open hardware SPM controller with advanced sampling support.

    Gwyscope is a low cost, open hardware, Digital Signal Processor (DSP) suitable for Scanning Probe Microscopy measurements, focusing on demonstrating the concept of adaptive scanning, general XYZ data acquisition and statistical data processing on the controller level. More details can be found in: M. Valtr et al., Scanning Probe Microscopy controller with advanced sampling support, HardwareX, Volume 15, e00451 https://www.hardware-x.com/article/S2468-0672(23)00058-5/fulltext It...
    Downloads: 0 This Week
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  • 8
    Firmware development/ improvement for the digital storage oscilloscope "Welec 2000a- series".
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    Downloads: 15 This Week
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  • 9

    pyrpl

    PyRPL turns your Red Pitaya into a powerful analog feedback device.

    The Red Pitaya is a commercial, affordable FPGA board with fast analog inputs and outputs. This makes it useful for quantum optics experiments, in particular as a digital feedback controller for analog systems. Based on the open source software provided by the board manufacturer, PyRPL (Python RedPitaya Lockbox) implements many devices that are needed for optics experiments with the Red Pitaya. PyRPL implements various digital signal processing (DSP) modules (see features below). It allows...
    Downloads: 42 This Week
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  • 10

    verilog_code_collection

    my personal verilog code collection

    some basic stuff, basic building blocks, which might result in some electric drive, DSP, microprocessor code...
    Downloads: 0 This Week
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  • 11

    VlibTools

    Tools and libraries for use with systemc and verilog

    Tool suite and libraries for developing system-c models. Tools for managing RTL projects.
    Downloads: 0 This Week
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  • 12
    vrq is verilog parser that supports plugin tools to process verilog. Current plugins include tools to perform x-propagation and to auto build hiearchy.
    Downloads: 0 This Week
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  • 13
    Controlix

    Controlix

    An operating system written in RTL

    Controlix is a virtual-circuit based operating system written in RTL.
    Downloads: 0 This Week
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  • 14

    SmGen

    Verilog Finite State Machine (FSM) Code Generator

    SmGen is a finite state machine (FSM) generator for Verilog. On the other hand, it is not an FSM entry tool. The input is behavioral Verilog with clock boundaries specifically set by the designer. SmGen unrolls this behavioral code and generates an FSM from it in synthesizable Verilog. Clock boundaries are explicitly provided by the designer so there is good control on the expected timing
    Downloads: 1 This Week
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  • 15

    Wheefun Computer Prototyping Kit

    A Toolkit for Designing Computers

    This package is designed for people who are a) interested in writing emulators or b) integrating this level of detain into their applications (e.g., a video game). The ability to do this is useful because a) it allows for tinkering far before physical implementation of the design is. In addition to a strong core, WFCPK will also include modules emulating various processors (e.g., the MOS 6502 and the Zilog Z80) as well as the Video-Audio Interface (a custom VGA-compatible display and...
    Downloads: 0 This Week
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  • 16
    Convert C++ software programs into synthesisable Verilog using the Clang compiler frontend to parse and SystemC for intermediates.
    Downloads: 0 This Week
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  • 17
    Tools for FPGA development and IP cores. This project provides tools, cores and documentation to develope FPGA applications. The project focuses on VHDL.
    Downloads: 17 This Week
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  • 18

    ipdbg

    IPDBG are free tools to debug intellectual properties (IP cores).

    Downloads: 0 This Week
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  • 19
    bel_fft

    bel_fft

    FFT co-processor in Verilog based on the KISS FFT

    ... and the Wishbone bus are supported. However, bel_fft's architecture allows an easy adaptation to further bus architectures (e.g. AMBA AHB). It comes with a Java wizard to configure the co-processor and to generate all required files (e.g. twiddle ROMs). It comes with integration into Xilinx Vivado, EDK, and Altera QSYS and includes example designs for Xilinx Zynq and with PCI-Express core (including Linux driver and application). bel_fft is distributed under the GNU Lesser Public License 2.1.
    Downloads: 0 This Week
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  • 20
    adms
    ADMS is a code generator that converts electrical compact device models specified in high-level description language into ready-to-compile c code for the API of spice simulators. Repository migrated to: https://github.com/Qucs/ADMS For checkout do: git clone https://github.com/Qucs/ADMS.git
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    Downloads: 11 This Week
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  • 21
    Project 2306 IDE Rad MacOS MCU DeveR

    Project 2306 IDE Rad MacOS MCU DeveR

    Electronic design and programming tools suite like Eagle, MpLab

    Currently Only MacOS is Present, PreAlpha means not Ready to use, Application is provided Without Strict Garantee, License not OSI. All others platform Windows, Linux, HaikuOS STILL under TEST, Dummy "Hello world" is provided instead Project2306 IDE : Application pour la programmation de Microcontroleurs et d' Application Electronique Project2306 IDE : for All whom want to Create and Develop on Embed Platform Software as Programming Tools suite and PCB Design Planned Features...
    Downloads: 1 This Week
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  • 22

    lpACLib

    An Open-Source Library for Low-Power Approximate Computing Modules

    The “lpACLib” library contains the VHDL description of accurate and approximate versions of several arithmetic modules (like adders and multiplier of different bit-widths) and accelerators. Moreover, it also provides the corresponding software behavioral models/implementations developed in C and MATLAB to enable quality characterization. Besides our novel designs, it also contains implementations for several state-of-the-art arithmetic modules and their approximate versions. This open-source...
    Downloads: 0 This Week
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  • 23

    ghdl-updates

    GHDL - a VHDL simulator

    GHDL is the leading open source VHDL simulator. *** Now on github.com/tgingold/ghdl *** We have binary distributions for Debian Linux, Mac OSX and Windows. On other systems, getting GHDL from here means downloading the current source package and building GHDL from source. Alternatively you can get the latest source version (warning : occasionally unstable!) by pulling a snapshot from the git repository.
    Downloads: 7 This Week
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  • 24

    PLP

    Powerfull pre-processor

    Powerful Verilog Preprocessor. PLP stands for Perl Pre-processor. Perl is used as "control language" that is embedded in the Verilog code (or any other code) to generate code on the fly. It is used commonly as a Verilog pre-processor but can be used with any target/output language (C, C++, Java, VHDL, plain text etc)
    Downloads: 0 This Week
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  • 25

    COFILOS

    A Development Framework for Coldfire

    Contains a framework for Coldfire MCUs like 52254. The framework supports a Command Line Interface (CLI) that may work from Serial port, USB or ENET. The framework uses Processor Expert and IDE requirement is MCU Eclipse 10.4 from Freescale. Includes the FunkOS Realtime Operating System by Funkenstein Software Consulting, available at http://funkos.sourceforge.net Mainly it is a support package for the development board Perseus, but I have ported also the RTOS to MCF52233DEMO...
    Downloads: 0 This Week
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