Showing 7 open source projects for "fpga project"

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  • 1
    Icestudio

    Icestudio

    Visual editor for open FPGA boards

    Visual editor for open FPGA boards. Built on top of the Icestorm project using Apio.
    Downloads: 2 This Week
    Last Update:
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  • 2
    FuseSoC

    FuseSoC

    Package manager and build abstraction tool for FPGA/ASIC development

    FuseSoC is a package manager and build abstraction tool for hardware description language (HDL) code, aimed at simplifying the development and reuse of IP cores. It provides a standardized way to describe, manage, and build hardware projects, facilitating collaboration and reducing duplication of effort in FPGA and ASIC development. ​
    Downloads: 0 This Week
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  • 3
    BSC

    BSC

    Bluespec Compiler (BSC)

    BSC is the open source compiler toolchain for Bluespec SystemVerilog, a high-level, rule-based hardware design language. It translates Bluespec descriptions into synthesizable Verilog, letting developers bring typed, modular abstractions into mainstream FPGA/ASIC flows. The compiler performs scheduling of atomic rules, elaborates parameterized modules, and enforces interface contracts, producing predictable RTL that integrates with existing EDA tools. A companion simulator enables fast...
    Downloads: 1 This Week
    Last Update:
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  • 4
    ALCHA

    ALCHA

    A New Programming Language for FPGA Projects

    ALCHA aims to reduce FPGA project develop time by means of automation and abstraction, but without loosing the low-level control that HDLs, such as Verilog, provides. It will support an object oriented programming model, abstract data and signal types, and compile-time scripting.
    Downloads: 0 This Week
    Last Update:
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  • 5
    RISC-V BOOM

    RISC-V BOOM

    SonicBOOM: The Berkeley Out-of-Order Machine

    The riscv-boom project (also called BOOM or SonicBOOM) implements a high-performance, synthesizable out-of-order RISC-V core written in the Chisel hardware construction language. It targets the RV64GC (i.e. 64-bit with general + compressed + floating point) instruction set and supports features such as virtual memory, caches, atomics, and IEEE-754 floating point. The design is parameterizable, meaning users can tune pipeline widths, buffer sizes, functional units, and other...
    Downloads: 0 This Week
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  • 6
    Writing Testbenches for FPGA/ASIC design is always a very fastidious and boring task. This project helps any FPGA/ASIC designer by providing a full RTL test environment with C support.
    Downloads: 0 This Week
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  • 7
    This project aims to develop a colour-based vision processing system for use in RoboCup. We are using a CCD camera for input to an FPGA. The system locates coloured objects and outputs detected corners.
    Downloads: 0 This Week
    Last Update:
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