Search Results for "cpu-z linux"

DLD V 2.0 Released Digital Logic Design is a Software tool for designing and simulating digital circuits. It provides digital parts ranging from simple gates to Arithmetic Logic Unit. You may start your circuit from simple gates and flipflops and keep on converting them into ICs. These ICs, later on, may be incorporated into other circuits to built more complex circuits like CPU. You may even use SOP expressions to generate digital circuits in IC form. You can use this software to...

ART is a flexible simulation framework for wind instruments. It includes a growing library of modelling elements. So far bore discontinuities, branches, tone holes, cylindrical and conical tubes, Bessel horns and bent tubes are available for frequency domain modelling. In the time domain generic bidirectional propagation elements, scattering elements, fractional delays, convolution with reflection functions and general z-domain networks are available and can be described using MuParserX...

Analog Insydes is a Mathematica toolbox for symbolic analysis of analog electronic circuits. This project provides a set of free add-ons to Analog Insydes, including a Java front-end and a native netlister for Cadence's Analog Design Environment (ADE).

Aquila 2.0, an open-source cross-platform software architecture for cognitive robotics that makes use of independent heterogeneous CPU-GPU modules with loosely coupled dynamically generated graphical user interfaces.

KEMP is a fast FDTD solver on a GPU-based cluster. The FDTD (Finite-Difference Time-Domain) method is a popular numerical method for electromagnetic field simulations. KEMP enables hardware accelerations suitable for multi-GPU, multi-core CPU and GPU cluster. KEMP also provide easy configuration by using Python scripting language.

A parallel-programming framework for concurrently running large numbers of small autonomous jobs, or microthreads, across multiple cores in a CPU or CPUs in a cluster. NeuraNEP emulates a distributed processing environment capable of handling millions of microthreads in parallel, for example running neural networks with millions of spiking cells. Microthreads are general processing elements that can also represent non-neural elements, such as cell populations, extracellular space, emulating...

DICE is a Discrete Integrated Circuit Emulator. It emulates computer systems that lack any type of CPU, consisting only of discrete logic components.

An experimental ISS for freescale's e500v2 core. It is meant to simulate only cpu and memory subsystem and is purely intended for academic/learning purposes only.

A parallel-programming framework for concurrently running large numbers of small autonomous jobs, or microthreads, across multiple cores in a CPU or CPUs in a cluster. Each microthread is conceptually similar to a task in Ada and it is much lighter weight than an operating system thread. SpikeOS was designed to handle millions of microthreads, for example in a neural network hosting millions of spiking model neurons. SpikeOS handles microthread scheduling, synchronization, distribution...

An Interactive Fiction Player written for Java Virtual Machine. It implements the Z-machine and Glulx specifications and can be used either standalone or as an applet. The Z-Code/Glulx interpreter runs adventures made by Infocom and contemporary Inte

Emulator of the newer Hewlett Packard Handheld Calculator Models with ARM CPU (HP49g+ HP50).

Visual Turing Machine is a tool for visually designing Turing machines. This means no coding in abstract scripting languages, but simple point&click design. It uses the a..z symbol set, plus the "empty" # symbol, and also simulates an infinite tape.

JSim8086 is platform-independent Assembly Language Simulator of the Intel 8086 CPU. It was designed to be a learning tool (CAL) for first year Computing students who are learning Computer Systems Organisation and Assembly Programming.

JCPUSim is a CPU (Central Processing Unit) simulator written in Java. It is intended to aid in teaching how the fetch-decode-execute cycle, CPU, registers, memory and assembly programming language work in a computer system.

GI-Gaia ist ein portables Framework zur Berechnung und Visualisierung verteilter Algorithmen (z. B. Bestimmung des größten gemeinsamen Teilers im Ring). Die konkreten Simulationen sind von den Basisdiensten getrennt und werden als Plugins nachgeladen.

YDLX is a generic CPU instruction simulator. It is designed to make it easy to add support for new CPUs and hardware devices in an object-oriented, "plug and play" fashion.