PyRPL turns your Red Pitaya into a powerful analog feedback device.
Tools and libraries for use with systemc and verilog
Verilog Finite State Machine (FSM) Code Generator
FFT co-processor in Verilog based on the KISS FFT
SEL for access verilog via PLI/VPI API. Tested with Icarus Verilog.
PID_control, real_time, matlab_simulink, xilinx_ise, fpga_spartan3e
The aim of FAZIA project is to build a 4Pi array for charged particles
SystemVerilog module to substitute Verilog PLA system tasks.